* Fix race in POSIX port `vPortEndScheduler`
The `vPortEndScheduler` checks whether it's a FreeRTOS thread after signalling the scheduler thread to stop. This creates a race between the check and the destruction of the thread key. By moving the signal to the scheduler thread after the check, the race is prevented.
* Code review suggestions
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
FreeRTOS MPU: Remove MPU region number check
This change removes the assertion and runtime check that enforces
matching between configTOTAL_MPU_REGIONS and physical MPU
regions,. This allows applications running on devices with 16 MPU
regions to manage 8 MPU regions while leaving the remaining 8
for the kernel.
Signed-off-by: Erick Reyes <erickreyes@google.com>
Use architecture-dependent UBaseType_t instead of fixed type for
ullMachineTimerCompareRegisterBase. This type is defined to uint32_t or
uint64_t based on XLEN, resolving warnings on 32-bit platforms.
Reported by landretk@ on the PR FreeRTOS/FreeRTOS-Kernel#1176.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
RISC-V: refine fpu reg context offset
pxCode and mstatus stored at index 0 and 1 are based on XLEN.
Therefore, the correct formula to calculate the FPU register index
should be ( ( 2 * portWORD_SIZE ) + ( regIndex * portFPU_REG_SIZE ) ).
Signed-off-by: wangfei_chen <wangfei_chen@realsil.com.cn>
* port: riscv: Split the number of registers and the size of the context
* port: riscv: Create some macros for the FPU context
* port: riscv: Add a couple of macros that store fpu context
* port: riscv: Update the stack init function to include the fpu context size
* port: riscv: Add a chip_specific_extensions file that includes the F extension
* Update dictionary to include some risc-v instructions
* port: riscv: Fix a few typos
* port: riscv: Apply @aggarg's sugestions
Disable stack overflow check for MPU ports
Stack overflow check is not straight forward to implement for MPU ports
because of the following reasons:
1. The context is stroed in TCB and as a result, pxTopOfStack member
points to the context location in TCB.
2. System calls are executed on a separate privileged only stack.
It is still okay because an MPU region is used to protect task stack
which means task stack overflow will trigger an MPU fault.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Include current task runtime in ulTaskGetRunTimeCounter
Update ulTaskGetRunTimeCounter to include elapsed time since the last
context switch when called for the currently running task. Previously,
this time was not included in the calculation.
Fixes#1202.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
While using the macOS default LLDB debugger, a call to vTaskEndScheduler results in an unhandled SIGUSR1 (aka SIGRESUME) when restoring the scheduler thread's signals with pthread_sigmask. This crashes the program.
Added instructions in portable/ThirdParty/GCC/Posix/port.c to suppress SIGUSR1 to prevent LLDB debugger interference when exiting xPortStartScheduler
Thanks to: @johnboiles for pointing it out in #1224
This commit updates the definition of taskRESERVED_TASK_NAME_LENGTH in
tasks.c to fix an unreachable preprocessor condition.
Signed-off-by: Sudeep Mohanty <sudeep.mohanty@espressif.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
On FreeBSD pthread_once_t is a struct and cast is required.
Otherwise there's compilation error:
../../mocks/freertos/port.c:261:23: error: expected expression
hSigSetupThread = PTHREAD_ONCE_INIT;
^
PTHREAD_ONCE_INIT is defined as: { PTHREAD_NEEDS_INIT, NULL } on FreeBSD
Co-authored-by: Jakub Tymejczyk <jakub.tymejczyk@enigma.com.pl>
Mark mutex as robust to prevent deadlocks
Prevent application hangs that occur when a thread dies while holding a
mutex, particularly during vTaskEndScheduler or exit calls. This is
achieved by setting the PTHREAD_MUTEX_ROBUST attribute on the mutex.
Fixes:
- GitHub issue: FreeRTOS/FreeRTOS-Kernel#1217
- Forum thread: freertos.org/t/22287
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
fix: SA violation fixes and simplification for idle task length restrictions
This change:
* Removes the dependency on strings.h for the prvCreateIdleTask function
* Resolves several static analysis violations reported by tools like Parasoft
Builds off of - https://github.com/FreeRTOS/FreeRTOS-Kernel/pull/1203
Fix the context array size for MPU ports
Ensure the saved context location falls within the reserved context area
rather than overlapping with the next MPU_SETTINGS structure member.
This never caused a problem because actual read/write operations
start from one word before the saved context location.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
The application writer needs to name their IRQ handler as:
1. vApplicationIRQHandler if the IRQ handler does not use FPU registers.
2. vApplicationFPUSafeIRQHandler is the IRQ handler uses FPU registers.
When the application uses vApplicationFPUSafeIRQHandler, a default
implementation of vApplicationIRQHandler is used which stores FPU
registers and then calls vApplicationFPUSafeIRQHandler.
Note that recent versions of GCC may use FP/SIMD registers to optimize 16-bytes
copy and especially when using va_start()/va_arg() functions (e.g printing some thing
in IRQ handlers may trigger usage of FPU registers)
This implementation is heavily inspired by both the ARM_CA9 port and the ARM_CRx_No_GIC
port done in [1]
[1] https://github.com/FreeRTOS/FreeRTOS-Kernel/pull/1113
Signed-off-by: Marouen Ghodhbane <marouen.ghodhbane@nxp.com>
FPSR and FPCR are two 64-bits registers where only the lower 32 bits are defined.
Save them when doing context switch with FPU context saving enabled.
Signed-off-by: Marouen Ghodhbane <marouen.ghodhbane@nxp.com>
This is a direct backport of upstream commit [1] for aarch64 (legacy operation port)
done under [2]
The same code can be applied on the aarch SRE port to be able to enable FPU context
saving on all tasks context switch to mitigate GCC optimization to use SIMD registers
for copy.
[1] "55eceb22: Add configUSE_TASK_FPU_SUPPORT to AARCH64 port (#1048)"
[2] https://github.com/FreeRTOS/FreeRTOS-Kernel/pull/1048
Signed-off-by: Marouen Ghodhbane <marouen.ghodhbane@nxp.com>
Add xQueueCreateSetStatic method for static allocation of Queue Sets
This commit introduces the xQueueCreateSetStatic function, which allows for the static allocation of Queue Sets in FreeRTOS when both configUSE_QUEUE_SETS and configSUPPORT_STATIC_ALLOCATION are enabled.
armv8.1-m: Add task dedicated PAC key
To harden the security, each task is assigned a dedicated PAC key, so that attackers needs to guess the all the tasks' PAC keys right to exploit the system using Return Oriented Programming.
The kernel is now updated to support the following:
* A PAC key set with a random number generated and is saved in the task's context when a task is created.
* As part of scheduling, the task's PAC key is stored/restored to/from the task's context when a task is unscheduled/scheduled from/to run.
stack-overflow-check: Introduce portGET_CURRENT_TOP_OF_STACK macro
When MPU wrapper v2 is used, the task's context is stored in TCB and `pxTopOfStack`` member of TCB points to the context location in TCB. We, therefore, need to read PSP to find the task's current top of stack.
Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com>
The function vApplicationFPUSafeIRQHandler gets the value of ICCIAR as
parameter, but a constant containing the address of ICCIAR was also
defined. Fix the name of the constant to align it with what it actually
holds.
* fix(freertos): Limit idle task name copy operation and ensure null termination
This commit:
- Limits the idle task name length copy operation to prevent
Out-of-bounds memory access warnings from static code analyzers.
- Fixes a bug where in the idle task name could be non null-terminated
string for SMP configuration.
Signed-off-by: Sudeep Mohanty <sudeep.mohanty@espressif.com>
* Pass core ID to CRITICAL_NESTING_COUNT macros
* Match existing data type for xCoreID
* Get core ID when interrupts are disabled
* Implement get core ID with interrupt disabled
* Get core ID inline within vTaskSuspendAll() to resolve compiler warning
* Fix formatting check
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Ching-Hsin,Lee <chinglee@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
There is a regression issue introduced in
cfc268814a.
This PR was intended to update MIT licensed header from v9 to v10.
But it accidentally changed "portYIELD_FROM_ISR( x )" in MSVC-MingW/portmacro.h.
It caused "portYIELD_FROM_ISR( x )" does not return correct value to "prvProcessSimulatedInterrupts".
Release tags use a capitalized V.
Our manifest tag is used by our SBOM
script to generate the URL and so
this needs to be capitalized to generate
a valid URL.
Add public dependency to hardware_sync because portable\ThirdParty\GCC\RP2040\include\portmacro.h exposes include "hardware/sync.h" to FreeRTOS.h which is PUBLIC.
Add private dependency to pico_multicore because of usage prvFIFOInterruptHandler() and sio_hw in portable/ThirdParty/GCC/RP2040/port.c.
The PACBTI is an optional hardware security feature,
the current implementation assumes that every SoC that
has Armv8.1-M architecture extension, has the PACBTI
hardware feature, which does not have to be the case.
Hence, the `portHAS_PACBTI_FEATURE` is removed
and the implementation is modified to rely on
`configENABLE_PAC` and `configENABLE_BTI` macros
that can either be set using CMake or FreeRTOSConfig.h
header file.
Enabling PAC and/or BTI on a port variant that
doesn't have the PACBTI hardware feature would be
caught by a `configASSERT` statement.
Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com>
Co-authored-by: Tony Josi <tonyjosi@amazon.com>
This commit adds new API functionality to reset xMinimumEverFreeBytesRemaining.
This functionality provides ability to get heap statistics during a particular period of time.
Signed-off-by: Tomas Galbicka <tomas.galbicka@nxp.com>
* Fix SMP debugging issue on rp2040
Related to #1172
Add `multicore_reset_core1` before `multicore_launch_core1` in `xPortStartScheduler` function to fix debugging issue on rp2040 with SMP enabled.
* Modify `portable/ThirdParty/GCC/RP2040/port.c` to include a call to `multicore_reset_core1` before `multicore_launch_core1` within the `#if portRUNNING_ON_BOTH_CORES` block.
* Recover comments back
---------
Co-authored-by: ActoryOu <jay2002824@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
Related to #189
Update `configMTIMECMP_BASE_ADDRESS` to be stored in a 64-bit integer.
* Change the type of `ullMachineTimerCompareRegisterBase` to `uint64_t` in `portable/GCC/RISC-V/port.c`.
* Change the type of `ullMachineTimerCompareRegisterBase` to `uint64_t` in `portable/IAR/RISC-V/port.c`.
* Update the initialization of `ullMachineTimerCompareRegisterBase` to use `configMTIMECMP_BASE_ADDRESS` in both files.
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Since `freertos_config` is an interface library,
`INTERFACE` scope shall be used to define compile
definitions.
Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com>
We have removed the use of pthread_attr_setstack and as a result,
the task stack is no longer used as the corresponding pthread's stack.
There is no use of calling pthread_attr_setstacksize as the default is
always good enough and we don't need to handle OS specific cases.
This PR simplifies the code by removing the call to pthread_attr_setstacksize.
Signed-off-by: Paul Hollinsky <paulhollinsky@gmail.com>
* copyright-checker: Add FreeRTOS Arm collab copyright
FreeRTOS Arm collab files shall have both Amazon's
and Arm's copyright headers. Hence, the copyright
checker is modified to check for both copyrights.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* armv8-m: Add support for IAR with TFM FREERTOS PORT
As the case for ARMClang, and GCC toolchains, IAR
with TFM FreeRTOS Port support is added.
Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com>
* armv8-m: Do not overwrite Control register value
The current ARMv8-M FreeRTOS-Kernel Port code
implementation is modified in a way that allows
the CONTROL register's value to be retained
rather than being overwritten.
This is needed for adding PACBTI support as
the special-purpose CONTROL register `PAC_EN`,
`UPAC_EN`, `BTI_EN`, and `UBTI_EN` PACBTI
enablement bits should be configured before calling
`vRestoreContextOfFirstTask()` function which currently
overwrite the value inside the CONTROL register.
Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com>
* armv8.1-m: Add PACBTI support to kernel non-secure implementation
In this commit, Pointer Authentication, and Branch Target
Identification Extension (PACBTI) support is added for
Non-Secure and Non-TrustZone variants of Cortex-M85
FreeRTOS-Kernel Port.
The PACBTI support is added for Arm Compiler For
Embedded, and IAR toolchains only. The support in
the kernel is not yet enabled for GNU toolchain
due to known issues.
Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com>
* Fix CI check
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com>
Co-authored-by: Ahmed Ismail <ahmism01@e133373.arm.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
In environments that do not support static allocation
(configSUPPORT_STATIC_ALLOCATION == 0), at prvCreateIdleTasks(), call
xCreateTask() and compare its return value to pdFAIL to check whether
xCreateTask() failed. However, xCreateTask() returns
errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY as the error value, so the
result of this comparison is always false.
This commit fixes this problem by changing the return value comparison
to pdPASS instead of pdFAIL.
* Xtensa support moved to Partner-Supported ports
Removing legacy Xtensa port; leave README with pointer to latest code
* Updated submodule ThirdParty/FreeRTOS-Kernel-Partner-Supported-Ports
refactor: change methods ENTER|EXIT critical
The read and write of BaseType_t are atomic for a number of ports
and therefore, do not require taskENTER_CRITICAL/taskEXIT_CRITICAL.
This PR introduces portBASE_TYPE_ENTER_CRITICAL and
portBASE_TYPE_EXIT_CRITICAL which default to taskENTER_CRITICAL
and taskEXIT_CRITICAL. The APIs that read/write BaseType_t are updated
to use these new macros.
The next change would to be to define portBASE_TYPE_ENTER_CRITICAL and
portBASE_TYPE_EXIT_CRITICAL to nothing for ports where BaseType_t
read and write are atomic.
Signed-off-by: guilherme giacomo simoes <trintaeoitogc@gmail.com>
Add missing MPU prototypes
This commit address the following issues with MPU prototypes:
1. Fix the decorator according to which MPU wrapper is used.
2. Add the missing prototypes for v1.
3. Add the corresponding mapping to mpu_wrappers.h.
4. Update MPU v1 wrappers for vTaskList and vTaskGetRunTimeStats.
This was reported here - https://forums.freertos.org/t/cortex-m55-and-16-region-mpu-support/21470/5.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Support for 16 MPU regions was added to Cortex-M33, M35P, M55 and M85
ports was added but the compile time error check was not removed. This
results in compilation error when 16 MPU regions are used. This PR
removes the not needed compile time error check.
It was reported here - https://forums.freertos.org/t/cortex-m55-and-16-region-mpu-support/21470.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Add configVALIDATE_HEAP_BLOCK_POINTER on heap_5
heap_5 is used for multiple separated memory spaces. In the
previous implementation, it only verifies the highest and
lowest addresses. A pointer may not be within heap regions,
but is still located between the highest and lowest addressed.
Add maco configVALIDATE_HEAP_BLOCK_POINTER to provide
customized heap block pointers detection based on the settings
of heap regions.
Signed-off-by: wangfei_chen <wangfei_chen@realsil.com.cn>
Event Groups: snapshot xEventGroupSetBits returning value while in
vTaskSuspendAll. Fixes uxEventBits dereference after event group
deleted by higher priority thread.
When a task deletes itself, it calls portPRE_TASK_DELETE_HOOK which
translates to vPortCloseRunningThread on the Windows port.
vPortCloseRunningThread never returns and as a result,
taskYIELD_WITHIN_API in vTaskDelete does not get called. As a result,
the next task is not scheduled when configUSE_PREEMPTION is set to 0.
This change records that a yield is pending so that the next tick
interrupt switches out the task that was deleted.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
When validate those allocated heap block structure, the canary is not used.
Do xor with canary when allocating a new block.
Signed-off-by: wangfei_chen <wangfei_chen@realsil.com.cn>
Co-authored-by: wangfei_chen <wangfei_chen@realsil.com.cn>
* Remove hardware dependence in portmacros.h
The IAR MSP430X port `#include "msp430.h"` which pulls all the hardware
register definitions into anything which `#include "FreeRTOS.h"`. This
removes that hardware dependency "leak" by removing the header file
and re-defining the `portDISABLE_INTERRUPTS()` and
`portENABLE_INTERRUPTS()` macros in terms of `__asm`.
* Code review suggestions
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
* Fix compilation issue of IAR32 port
* Add new line at EOF
* Fix header check
---------
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
The original implementation only initializes the first
variable. After executing xTaskIncrementTick, the schedule
might not behave as expected.
When configUSE_PREEMPTION == 1 & configUSE_TIME_SLICING == 1,
replace setting xYieldRequiredForCore[ xCoreID ] with setting
xYieldPendings[ xCoreID ].
And when configUSE_PREEMPTION == 1, simplify the check
condition to only check xYieldPendings[ xCoreID ].
Signed-off-by: cymzier <cymb103u@cs.ccu.edu.tw>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
This PR adds support for vApplicationFPUSafeIRQHandler. The application
writer needs to name their IRQ handler as:
1. vApplicationIRQHandler if the IRQ handler does not use FPU registers.
2. vApplicationFPUSafeIRQHandler is the IRQ handler uses FPU registers.
When the application uses vApplicationFPUSafeIRQHandler, a default
implementation of vApplicationIRQHandler is used which stores FPU
registers and then calls vApplicationFPUSafeIRQHandler.
* Reset xNextTaskUnblockTime in task notify FromISR APIs
If a task is blocked waiting for a notification then
xNextTaskUnblockTime might be set to the blocked task's timeout time. If
the task is unblocked for a reason other than a timeout
xNextTaskUnblockTime is normally left unchanged, because it will
automatically get reset to a new value when the tick count equals
xNextTaskUnblockTime. However if tickless idle is used it is important
to enter sleep mode at the earliest possible time - so reset
xNextTaskUnblockTime here to ensure it is updated at the earliest
possible time.
This was reported here -
https://forums.freertos.org/t/the-vtaskgenericnotifygivefromisr-function-need-call-prvresetnexttaskunblocktime/21090
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
This PR makes the following improvements to the ARM_CRx_No_GIC port-
1. Remove inline assembly and move all the assembly code to the portASM.S
file.
2. Add support for configUSE_TASK_FPU_SUPPORT -
- When configUSE_TASK_FPU_SUPPORT is defined to 1, tasks are created
without floating point context. Tasks that want to use floating point, need
to call portTASK_USES_FLOATING_POINT(). This is the current behavior.
- When configUSE_TASK_FPU_SUPPORT is defined to 2, each task is created
with a floating point context.
If left undefined, configUSE_TASK_FPU_SUPPORT defaults to 1 for backward compatibility.
3. The application writer can now implement vApplicationSVCHandler to handle the
SVC calls raised within the application. SVC 0 is used for the yield kernel operation
and the application can use all the SVC calls other than 0.
Signed-off-by: kar-rahul-aws <karahulx@amazon.com>
Fix warning from "gcc -Wsign-compare" in the file
portable/ThirdParty/GCC/Posix/port.c since PTHREAD_STACK_MIN
is used from system headers.
Signed-off-by: Florian La Roche <Florian.LaRoche@gmail.com>
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
* Fix kexcept function
* Create dummy pxCurrentTCBs for xcore.ai port
* Additional commentary
* Add a layer of indirection to cope with singlecore
* Clarify use of _DoException
FreeRTOS MPU: Add privileged execute never MPU attribute
A new MPU region attribute Privileged eXecute Never (PXN)
is introduced in Armv8.1-M architecture, where if an MPU
region has PXN attribute set and the processor attempts
to execute the code inside with privileged level,
the Memory Management Fault exception would be triggered,
with IACCVIOL bit in MemManage Fault State Register set
to 1. The PXN feature allows privileged software to ensure
specific application tasks (threads) to execute in
unprivileged level only.
Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com>
In `prvCheckForRunStateChange()`, enabling interrupts should cause this core to immediately service the pending interrupt and yield. Upon the next scheduling of the task, the assertion `configASSERT(pxThisTCB->xTaskRunState != taskTASK_SCHEDULED_TO_YIELD);` may not be true, as other cores could have requested a yield for this task before it evaluates its run state within the assertion. To address this, the task re-evaluates its run state in critical section within a loop until it is eligible for execution, which is the current implementation. Consequently, this assertion should be removed to ensure correct behavior.
* Fix traceMALLOC() memory count is inaccurate. (#1078)
Modify xWantedSize to the size of a free block when not split blocks.
Ensure that the sizes within traceMALLOC() and traceFREE() macros are equal.
* Create a new variable xAllocatedBlockSize for traceMALLOC()
---------
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Update the link to the getting started guide for Code Sonar.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
* Add traceSTARTING_SCHEDULER tracing hook.
Discussed here: https://forums.freertos.org/t/tracing-improvements/20097
This hook enables tracers to run code on startup after all RTOS
resources are created and to detect that the scheduler is starting without
relying on traceENTER/traceEXIT macros.
It also provides tracers access to the task handle of all IDLE tasks,
allowing them to be identified unambiguously and without relying on
INCLUDE_xTaskGetIdleTaskHandle.
Use _GNU_SOURCE macro instead of __USE_GNU and define it before
including portmacro.h. The reason is that portmacro.h includes limits.h
which in-turn includes features.h - this results in __USE_GNU getting
incorrectly undefined.
* event_create(): check malloc() to be non-NULL
Check malloc() to return non-NULL before writing data
in the function event_create().
Signed-off-by: Florian La Roche <Florian.LaRoche@gmail.com>
* Code review suggestion
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Florian La Roche <Florian.LaRoche@gmail.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Discussed here: https://forums.freertos.org/t/tracing-improvements/20097
Changes the value of queueQUEUE_TYPE_SET to a unique value (5) to allow
tracers to differentiate between normal queues and queue sets.
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
Discussed here: https://forums.freertos.org/t/tracing-improvements/20097
Adds a note to the (confusingly named) xTaskNumber member of TaskStatus_t
explaining that the value is different to the TaskNumber that can be
accessed using the vTaskSetTaskNumber and vTaskGetTaskNumber functions.
The value returned is actually the value of uxTCBNumber in the TCB.
* Add _Noreturn attribute in the template function to fix MISRA 17.11 advisory warnings
* Add _Noreturn attribute in function declaration
* Code review suggestions
Earlier the code was suspending the current thread after calling
vTaskSwitchContext. This left a gap where the current thread could
access incorrect pxCurrentTCB after it was changed by
vTaskSwitchContext.
This commit addresses the problem by suspending the current thread
before calling vTaskSwitchContext.
It was reported here - https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/1054.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Add configUSE_TASK_FPU_SUPPORT to AARCH64 port
NEON SIMD is required by standard AARCH64 and its registers are
frequently utilized by standard functions such as memcpy().
This means that even simple tasks that do not use any floating point
arithmetics may still alter the contents of the FPU registers.
For this reason it makes sense to add support for
configUSE_TASK_FPU_SUPPORT to be able to enforce FPU register saving and
restoring globally.
The implementation was largely adopted from the ARM_CA9 port. However,
the FPU registers must be placed on the stack before the critical
nesting count to match the AARCH64 portASM.S.
Add GCC/ARM_CM0/mpu_wrappers_v2_asm.c and GCC/ARM_CM0/portasm.c as source files to 'freertos_kernel_port' library.
This fixes the FREERTOS_PORT "GCC_ARM_CM0" CMake configuration.
* Fix the constant suffix to U
* Fix more unsigned contant suffix
---------
Co-authored-by: Ubuntu <ubuntu@ip-172-31-34-245.ap-northeast-1.compute.internal>
Currently in Armv8-M GCC/ArmClang ports, constant pool is used to
define literals needed for `ldr` instructions. However, those
constant pools are defined with `.align 4` which increases code size.
Instead of defining the constant pool with `.align 4`, let the
compiler hanlde the constant pool and the required alignment.
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
The `portable/ThirdParty/GCC/ARM_TFM/README.md` and
`portable/ThirdParty/GCC/ARM_TFM/os_wrapper_freertos.c` are updated to
support `TF-Mv2.0.0` of trusted-firmware-m release.
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
The difference between a stream buffer and a stream batching buffer is when
a task performs read on a non-empty buffer:
- The task reading from a non-empty stream buffer returns immediately
regardless of the amount of data in the buffer.
- The task reading from a non-empty steam batching buffer blocks until the
amount of data in the buffer exceeds the trigger level or the block time
expires.
* Add readme to example directory
* Add readme to example directory
* Add readme to example directory
* Add readme to example directory
* remove whitespace
* Update wording
* Update examples/README.md
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
* Add Coverity webpage link
---------
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
Update alignment in ARM_CR5 port.
This is the same patch as 553caa18ce
provided by Richard Barry for issue #426 (ARM_CA9).
Signed-off-by: Florian La Roche <Florian.LaRoche@gmail.com>
* Add in a removed check for if a task is attempting to read a variable from a location it has write access to in xPortIsAuthorizedToAccessBuffer.
* Add in a portDONT_DISCARD symbol as well.
* Remove duplicate pop instruction from portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/mpu_wrappers_v2_asm.c
* Remove duplicate pop instruction from portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/mpu_wrappers_v2_asm.c
* Remove duplicate pop instruction from portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/mpu_wrappers_v2_asm.c
* Remove duplicate pop instruction from portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/mpu_wrappers_v2_asm.c
* Remove duplicate pop instruction from portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/mpu_wrappers_v2_asm.S
* Remove duplicate pop instruction from portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/mpu_wrappers_v2_asm.S
* Remove duplicate pop instruction from portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/mpu_wrappers_v2_asm.S
* Remove duplicate pop instruction from portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/mpu_wrappers_v2_asm.S
* Run the copy_files.py script to update the ARMv8M ports to remove the duplicate pop instruction in mpu_wrappers_v2_asm
* Remove duplicate pop instruction from portable/GCC/ARM_CM3_MPU/mpu_wrappers_v2_asm.c
* Remove duplicate pop instruction from portable/GCC/ARM_CM4_MPU/mpu_wrappers_v2_asm.c
* Remove duplicate pop instruction from portable/IAR/ARM_CM4F_MPU/mpu_wrappers_v2_asm.S
* Remove duplicate pop instruction from portable/RVDS/ARM_CM4_MPU/mpu_wrappers_v2_asm.c
---------
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
* 64bit TickType_t is supported on Windows port.(MSVC and MinGW)
Especially it is introduced for 64bit compiler.(x64 platform on MSVC and MinGW-w64)
* Unnecessary compiler warning for the cast operation is disabled locally.(MinGW-w64 only)
* Modify the condition for ignoring compiler warning for the cast operation.
Before modification: Compiler warning was ignored only on MinGW64
After modification: Compiler warning is ignored on MinGW32 and MinGW64
Reason of modification: The cast warning here is unavoidable not only on MinGW64 but also on MinGW32.
"__GNUC__" macro is used because MSVC does not recognize this #pragma directive.
Add a compile time check that emits a helpful error message if the user
attempts to create a daemon task startup hook without also creating the
timer/daemon task.
The timer/daemon task startup hook runs in the context of the timer/daemon
task. Therefore, it won't run even if configUSE_DAEMON_TASK_STARTUP_HOOK
is set to 1 if the timer task isn't created. The timer task is only created if
configUSE_TIMERS is not equal to 0.
* pxIndex should only be used when selecting next task. Altering pxIndex
of a ready list will cause the scheduler to be unable to select the
right task to run. Using a for loop if traversing the list for trace
utility is required.
* Not defining listGET_OWNER_OF_NEXT_ENTRY when using SMP scheduler
---------
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Fix small bugs
* Cast sizeof to BaseType_t
* Test removing assert to fix UT
* Revert change to tasks.c
Since configIDLE_TASK_NAME must be defined as a string according to
the documentation, the macro will always be NULL terminated. Which
means that the check `if( cIdleName[ xIdleTaskNameIndex ] == ( char ) 0x00 )`
will catch the end of string.
* Update coverity config; Add coverity version; Update pvPortMalloc declaration to match the definitions.
* Add port files to sed command
* Remove warnings about unused parameters in port code
---------
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
* Update task notification scheduler suspension
Previously ulTaskGenericNotifyTake() and xTaskGenericNotifyWait() would suspend
the scheduler while inside a critical section.
This commit changes the order by wrapping the critical sections in a scheduler
suspension block. This logic is more inuitive and allows the SMP scheduler
suspension logic to be simplified.
* tasks.c: Fix typo
* Use a complete sentence in comment
* Check portGET_CRITICAL_NESTING_COUNT when scheduler is running
* Prevent potential NULL pointer access when scheduler is not running
---------
Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
Co-authored-by: Ching-Hsin Lee <chinglee@amazon.com>
* Request a task to yield after been suspended or deleted to prevent this task puts itself back to another list
* Fix volatile variable access order to ensure ensure compliance with MISRA C 2012 Rule 13.5
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
* Rename Arm_AARCH64 to ARM_AARCH64
* Rename Arm_AARCH64_SRE to ARM_AARCH64_SRE
* Update cmake for ARM port folder capitalization
* Update in portable/CmakeLists.txt
* Use capitalization name in port README.md
---------
Co-authored-by: Ching-Hsin Lee <chinglee@amazon.com>
Enable xTaskGetCurrentTaskHandleForCore() for single core builds
---------
Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: Ching-Hsin Lee <chinglee@amazon.com>
* Initial set of SA fixes
* Revert function parameter name changes
* Reverted parameter name for Static version of function by mistake
* Update mpu_wrappers_v2.c to only include 20.7 fixes
* Update queue.c to remove non-20.7 fixes
* Update tasks.c to remove non-20.7 fixes
---------
Co-authored-by: bjbsmith <bjbsmith@uafeb6a6bcdce55.ant.amazon.com>
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
* Update vTaskDelete() to delete a task directly when scheduler is stopped instead of putting it on the xTasksWaitingTermination list.
* Delete the idle tasks and timer task in vTaskEndScheduler().
* Reclaim resources for all the tasks on the xTasksWaitingTermination list in vTaskEndScheduler().
* Update POSIX to no longer delete FreeRTOS tasks in the port.
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Modify portable/CMakeLists.txt to create only one static library containing both the common kernel code and kernel port.
Change the freertos_kernel_port target from a STATIC library to an OBJECT library and introduce a new freertos_kernel_port_headers INTERFACE library target.
---------
Co-authored-by: ABARNAT <ahmed.barnat@actia-engineering.tn>
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Unnecessary white space was introduced in PR #768
which affected the formatting of assembly code. This PR
returns the correct formatting. No functional change.
Add a check for configENABLE_MVE to M23, M33 ports
configENABLE_MVE is only applicable to Cortex-M55 and Cortex-M85 ports.
It must not be defined to 1 for other ARMv8_m ports.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
The number of MPU regions is not configurable for Cortex-M3 port and
therefore, it is misleading to have configTOTAL_MPU_REGIONS in
portmacro.h.
It was added in PR #952.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Add code to allow building for x64 in MSVC
- Add code for x64 arch.
- Add initial value for local otherwise it won't get proper value in x64.
* Moving init local to portGET_HIGHEST_PRIORITY
- From code review.
* More changes following review
* Another style fix from review
* Update formatting
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com>
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
According to the MSP430 EABI [1] section 3.3,
Arguments are assigned, in declared order, to the first available
register single, pair, or quad from the following list into which it
fits (with the following special exceptions). For MSP430 and
MSP430X, the argument registers are: R12, R13, R14, R15
Therefore, pvParameters should be passed in R12, as it is the first
argument, not R15. Keep passing the parameter in R15 for the
MSP430 EABI, if anyone is still using it.
[1] https://www.ti.com/lit/an/slaa534a/slaa534a.pdf
PR #914 caused Posix Port to fail to build on MacOS. This PR fixes
teh build failure.
This PR also adds a Matrix configuration to the GitHub kernel-demo
workflow to build the Posix Demos on MacOS.
---------
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* MicroblazeV9: Add support for 64 bit microblaze
* MicroblazeV9: Add support for generation of run time task stats
* MicroblazeV9: Add default implementation for callback functions
---------
Signed-off-by: Mubin Usman Sayyed <mubin.usman.sayyed@xilinx.com>
* Allow access to any buffer in xPortIsAuthorizedToAccessBuffer if xSchedulerRunning is set to pdFALSE
* Allow access to any buffer in xPortIsAuthorizedToAccessBuffer if xSchedulerRunning is set to pdFALSE in the copied ARMv8M Port Files
* Add runtime check to see if the target even has a MPU
* Add missing extern symbols for __ARMCC_VERSION support
* Add default for configTOTAL_MPU_REGIONS and change a runtime assert to compile time error
* Simplify check and link to reference documentation
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
---------
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
Co-authored-by: jasonpcarroll <23126711+jasonpcarroll@users.noreply.github.com>
* Error when configSUPPORT_STATIC_ALLOCATION is set for MPU ports
* Uncrustify: triggered by comment.
---------
Co-authored-by: GitHub Action <action@github.com>
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
Change from pthread_attr_setstack() to pthread_attr_setstacksize(), and automatically adjust the stack size
to be at least PTHREAD_STACK_MIN if it wasn't already, removing the size warning.
This permits the user to increase the pthread stack size beyond the PTHREAD_STACK_MIN default of 16384 if
desired, without producing a warning in the typical case where stacks are minimized for RAM limited targets.
Continue to store thread paramters on the provided stack, for consistency with the MCU targets.
Previously pthread_attr_setstack() was used to enable user defined stacks.
Note that:
1. The stack size can still be specified by the user.
2. pxPortInitialiseStack(), and pthread_addr_setstack() was failing on stacks of typical size, as
these are smaller than PTHREAD_STACK_MIN (16384) bytes, and printing out a series of warnings.
Improve usability by having the posix port automatically increase the stack size to be
at least PTHREAD_STACK_MIN as posix platforms have enough memory for this not to be a concern.
3. Reuse of stack memory will also result in valgrind 'invalid write' errors to what is demonstrably
valid memory. Root cause is that Valgrind is tracking a stack pointer as the stack is used.
Reuse of a stack buffer results in the stack being used at its start, in an area that Valgrind thinks
is far away from the start of the stack. There are ways to notify Valgrind of these changes
however this would require linking against and calling Valgrind functions from the FreeRTOS application using
the posix port, https://valgrind.org/docs/manual/manual-core-adv.html#manual-core-adv.clientreq.
Also, apparently it isn't permitted by posix to reuse stack memory once its been used in a pthread via pthread_attr_setstack(),
see https://stackoverflow.com/a/5422134
For a clean shutdown where memory is freed, it is necessary for all pthreads to be joined
at shutdown.
Previously there was explicit cancellation of the idle task and timer daemon task, however
there may be a number of other tasks in the system, both system created and user created,
and those tasks/threads were being left at shutdown.
This change calls pthread_cancel()/pthread_join() on all FreeRTOS managed pthreads upon
shutdown.
Improve upon the elegant approach of using signals to cause task/pthreads
suspension and scheduler execution by using directed signals.
This fixes:
- Deadlocks in non-FreeRTOS pthreads
- Multiple FreeRTOS tasks(pthreads) incorrectly running at the same time
By directing the signals using pthread_kill() the signal handler in the presently running
FreeRTOS task/pthread will be called, ensuring that the scheduler runs both in the context
of a FreeRTOS task/pthread and from the presently executing FreeRTOS task/pthread.
Details
==============
The POSIX port uses signals to preempt FreeRTOS tasks (implemented as pthreads), a very neat and elegant
approach to forcing tasks/pthreads to suspend and run the scheduler.
Signal handlers are process global.
Posix timers generate signals when the timer expires, and the signal is sent to the currently
running pthread.
In systems where there are pthreads that are NOT a result of creating FreeRTOS tasks, such as the
entry point thread that calls main(), or user created pthreads, this poses a serious issue.
While the POSIX port only allows a single FreeRTOS pthread to run at once, by causing all suspended
threads to not be scheduled due to their waiting on a pthread condition variable,
this isn't the case with non-FreeRTOS pthreads.
Thus it is possible that a non-FreeRTOS pthread is running when the timer expires and the signal
is generated. This results in the signal handler running in the non-FreeRTOS thread.
The sequence of events results in these events from signal handler context:
- vPortSystemTickHandler() being called
- The scheduler running
- Selecting another FreeRTOS task to run and switching the active task
- The newly selected task released from suspension by pthread_cond_signal()
- The presently active thread calling event_wait()
- The pthread calling pthread_cond_wait(), suspending the thread and allowing the host OS scheduler
to schedule another thread to run.
If this occurs from a non-FreeRTOS thread this results in:
- The active FreeRTOS pthread (Task A/Thread A) continuing to run (as the signal handler that calls
event_wait() ran instead in a non-FreeRTOS pthread.
- The pthread where the signal handler did run (Thread B) will call event_wait() and pthread_cond_wait(),
but on the condition variable of the previously active FreeRTOS task, oops. This causes the
non-FreeRTOS pthread to block unexpectedly relative to what the developer might have expected.
- The newly selected FreeRTOS Task (Task C/Thread C) will resume and start running.
At this point Task A/Thread A is running concurrently with Task C/Thread C. While this may not
necessarily be an issue, it does not replicate the expected behavior of a single Task running at
once.
Note that Thread B will resume if/when Task A/ThreadA is switched to. However, this could be delayed
by an arbitrary amount of time, or could never occur.
Also note that if there are multiple non-FreeRTOS pthreads that Thread D, E, F...etc could suffer the
same fate as Thread B, if the scheduler were to suspend Task C/Thread C and resume Task E/Thread E.
Implementation
==============
Timer details
-------------
A standalone pthread for the signal generation thread was chosen, rather than using
a posix timer_settime() handler function because the latter creates a temporary
pthread for each handler callback. This makes debugging much more difficult due to
gdb detecting the creation and destruction of these temporary threads.
Signal delivery
--------------
While signal handlers are per-thread, it is possible for pthreads to selectively block
signals, rather than using thread directed signals. However, the approach of blocking
signals in non-FreeRTOS pthreads adds complexity to each of these non-FreeRTOS pthreads
including ensuring that these signals are blocked at thread creation, prior to the thread
starting up. Directed signals removes the requirement for non-FreeRTOS pthreads to be aware
of and take action to protect against these signals, reducing complexity.
* Introduce portHAS_NESTED_INTERRUPTS to identify if port has nested interrupt or not.
* Update atomic.h to use portHAS_NESTED_INTERRUPTS instead of portSET_INTERRUPT_MASK_FROM_ISR definition.
---------
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: ActoryOu <jay2002824@gmail.com>
Export the PRIVILEGED_FUNCTION, PRIVILEGED_DATA, and FREERTOS_SYSTEM_CALL
attributes to make it easier for end users to add their own privileged functions and
system calls.
Remove the idle_task_static_memory.c and use the new default implementations
to allows for FreeRTOS-Kernel-Static to be used with configNUMBER_OF_CORES > 1
* GCC: MSP430F449: Add missing attributes
Apparently at some point in the past, GCC (or TI's GCC) used to define
these attributes. Define them ourselves so that we can compile the demo
application.
* GCC: MSP430F449: Make interrupts return void
If a return type of a function is not specified, it defaults to int. Set
the return type of interrupts to void to avoid warnings.
* GCC: MSP430F449: Define portPOINTER_SIZE_TYPE
portPOINTER_SIZE_TYPE defaults to uint32_t if undefined. Define it to
uint16_t, which is correct for this port.
This commit adds a portTASK_SWITCH_HOOK() macro which allows ports to inject
behavior immediately after a context switch. For example, this macro could be
used by ports that need to set an end of stack watchpoint after a context
swtich.
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
Co-authored-by: Tony Josi <tonyjosi@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Verify that the application has correctly installed PendSV
and SVCall handlers. The application can choose to
disable these checks by setting configCHECK_HANDLER_INSTALLATION
to 0 in their FreeRTOSConfig.h.
* Add a u or U suffix for unsigned numerical literals
* Fix formatting
* Replace u with U for naming convention
---------
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Assign return value of xPortStartScheduler API to a variable
* Add void datatype
---------
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Update xTaskGetIdleTaskHandle() in SMP
This commit updates xTaskGetIdleTaskHandle() for SMP in the following ways:
- xTaskGetIdleTaskHandle() no longer accepts xCoreID argument in SMP so that
there is not change in API between single-core and SMP
- xTaskGetIdleTaskHandle() now returns the Active idle task handle in SMP,
which matches the behavior in single-core.
- Added xTaskGetIdleTaskHandleForCore() in SMP which accepts an xCoreID
argument. This function can be used to obtain the Passive idle task handles.
* Update xTaskGetIdleTaskHandle
---------
Co-authored-by: Ching-Hsin Lee <chinglee@amazon.com>
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Add SMP template port and example
* Add readme file for smp configuration
* Update SMP build flow and add CI build
---------
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
* Add portMEMORY_BARRIER() to RX MCU ports
* Remove the memory barrier from the SH2A_FPU portable directory
---------
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
* Revert "The curl command to send the report expects the tar file to be in its current directory. The step either needed to have the working-directory: set to the build directory, or the tar file needs to be created in the parent directory. (#903)"
This reverts commit 76f3aa5b05.
* Update to separate build and upload steps
---------
Co-authored-by: tony-josi-aws <tonyjosi@amazon.com>
* The value of an expression shall not be assigned to an object with a narrower essential type or of a different essential type category.
---------
Co-authored-by: Ubuntu <ubuntu@ip-172-31-34-245.ap-northeast-1.compute.internal>
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Currently the Coverity Scan attempts to run on every fork that pulls
the file. This leads to anybody who pulls this file getting emails that
their workflow failed to run when the cron job attempts to run. This
PR sets the scan to only run if the repo is FreeRTOS/FreeRTOS-Kernel.
Also, change the scan from a cron job to a job that runs on a commit
to mainline, or if triggered manually.
Earlier the System Call entry from an unprivileged task
looked like:
1. SVC for entering system call.
2. System call implementation.
3. SVC for exiting system call.
Now, the system call entry needs to make only one SVC
call and everything else is handled internally.
This PR also makes the following changes:
1. Update the Access Control List (ACL) mechanism to
grant access to all the kernel objects before the
scheduler is started.
2. Add one struct param for system calls with 5 parameters.
This removes the need for special handling for system
calls with 5 parameters.
3. Remove raise privilege SVC when MPU wrapper v2 is used.
4. Add additional run time parameter checks to MPU wrappers
for xTaskGenericNotify and xQueueTakeMutexRecursive APIs.
* Update vApplicationGetIdleTaskMemory prototype for SMP. Now SMP and
single core use the same prototype for compatibility.
* Add vApplicationGetPassiveIdleTaskMemory for SMP to get passive idle
task memory.
This commit updates the following time conversion macros:
- pdMS_TO_TICKS: Added cast to "uint64_t" to prevent overflow
- pdTICKS_TO_MS: Added macro to convert ticks to milliseconds
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
* Fix prvTaskIsTaskSuspended.
Just like eTaskGetState, distinguish waiting for notify from suspend.
* Fix vTaskGetInfo.
Just like eTaskGetState, distinguish block state (waiting on notification)
from suspend state.
* Add missing definition of variable x.
* Fix formatting syntax.
---------
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Tony Josi <tonyjosi@amazon.com>
The function vTaskSwitchContext in smp has an parameter of core id,
which means this function is not only used for the core who call it.
Thus we should use the task running on the specific core id,
instead of use the task running on the core who call this function.
Co-authored-by: moral-hao <405197809@qq.com>
The Cortex-A53 ports are generic and can be used as a starting point
for other Armv8-A application processors. Therefore, rename
`ARM_CA53_64_BIT` to `Arm_AARCH64` and `ARM_CA53_64_BIT_SRE` to
`Arm_AARCH64_SRE`.
With this renaming, existing projects that use old port, should
migrate to renamed port as follows:
* `ARM_CA53_64_BIT` -> `Arm_AARCH64`
* `ARM_CA53_64_BIT_SRE` -> `Arm_AARCH64_SRE`
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Move GCC compile option to GCC folder with toolchain option
* Add CI flow to build cmake example
* Fix CI
* formatting && enable Werror
* Add useless variable to test CI
* revert useless variable
* Add comments as examples.
* Remove default compile options.
* Formatting
* Remove compile option in kernel cmake and put the sample in examples/cmake_example
---------
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
* Support configurable RISC-V chip extension
Added the FREERTOS_RISCV_EXTENSION option to allow the user
to select which chip extension they want included. Removed the
port for pulpino to instead use the new option.
* Add port GCC_RISC_V_GENERIC and IAR_RISC_V_GENERIC
* Add two rics-v generic ports to support FREERTOS_RISCV_EXTENSION
config
---------
Co-authored-by: Joe Benczarski <jbenczarski@trijicon.com>
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
Co-authored-by: Ching-Hsin Lee <chinglee@amazon.com>
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
* fix build on 64 bit platform
* moving sample cmake project to a separate root level dir
* moving sample cmake project to a separate root level dir
* updating paths for the sample cmake project
* rename example folder
* use configKERNEL_PROVIDED_STATIC_MEMORY
* update comments
* update comments
* rename folder to examples
* fix formatting
This commit renames "CPU" to "Core" for any public facing API for consistency
with other SMP related APIs (e.g., "configNUMBER_OF_CORES").
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
To build a complete static application (configSUPPORT_DYNAMIC_ALLOCATION
set to 0) an ugly workaround is necessary, because when FREERTOS_HEAP is
not set, heap 4 is automatically selected in the current CMake.
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
* Perform sparse checkout of just the .github folder for the header check instead of all the files. Update python checkout version being used. Update the version of the get changed files action being used.
* Use echo groups on the header check
This PR fixes the bug described in the following issue:
https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/612.
This was originally contributed in the following PR:
https://github.com/FreeRTOS/FreeRTOS-Kernel/pull/625.
The implementation suspends the scheduler before exiting the
critical section (i.e. before enabling interrupts). If we do not do
so, a notification sent from an ISR, which happens after exiting
the critical section and before suspending the scheduler, will
get lost. The sequence of events will be:
1. Exit critical section.
2. Interrupt - ISR calls xTaskNotifyFromISR which adds the task to
the Ready list.
3. Suspend scheduler.
4. prvAddCurrentTaskToDelayedList moves the task to the delayed
or suspended list.
5. Resume scheduler does not touch the task (because it is not on
the pendingReady list), effectively losing the notification from
the ISR.
The same does not happen when we suspend the scheduler before
exiting the critical section. The sequence of events in this case will
be:
1. Suspend scheduler.
2. Exit critical section.
3. Interrupt - ISR calls xTaskNotifyFromISR which adds the task to
the pendingReady list as the scheduler is suspended.
4. prvAddCurrentTaskToDelayedList adds the task to delayed or
suspended list. Note that this operation does not nullify the add
to pendingReady list done in the above step because a different
list item, namely xEventListItem, is used for adding the task to the
pendingReady list. In other words, the task still remains on the
pendingReady list.
5. Resume scheduler moves the task from pendingReady list to the Ready list.
------------
Co-authored-by: Jacob Carver <karver8@github.com>
This PR introduces the configTIMER_SERVICE_TASK_CORE_AFFINITY option
which allows the system to configure the core affinity of the Timer
Service Task on an SMP system. The default affinity of the Timer Service
Task is set to tskNO_AFFINITY which is the current behavior on SMP
systems.
Signed-off-by: Sudeep Mohanty <sudp.mohanty@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* re-adding main.c to the minimal example
* Uncrustify: triggered by comment.
* Update minimal_freertos_example/main.c
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
* Add in the deleted cmake list
* Added a single newline at the end of the cmake
* Cleanup the CMakelists
* updates the main & Cmake
* Formatting
---------
Co-authored-by: GitHub Action <action@github.com>
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
* Add static idle task memory support for SMP
* Rename vApplicationMinimalIdleTask to vApplicationPassiveIdleTask
* Rename the macro configUSE_MINIMAL_IDLE_HOOK to configUSE_PASSIVE_IDLE_HOOK
* Update xTaskGetIdleTaskHandle for SMP
* Add more check in xTaskGetIdleTaskHandle
* Support configKERNEL_PROVIDED_STATIC_MEMORY for SMP
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Add configCONTROL_INFINITE_LOOP in FreeRTOS.h
* Use configCONTROL_INFINITE_LOOP in tasks.c and timer.c
---------
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
* Implement prvYieldCore with macro for performance and memory
* Remove the portCHECK_IF_IN_ISR macro check. It is not required in SMP
now
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* removed the copyright and license header for files expected to be copied by users
* fixed a bug in the kernel checker. temporarily restored the copyright in the sample config to allow this PR to pass the checks.
* Uncrustify: triggered by comment.
---------
Co-authored-by: GitHub Action <action@github.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Aligns the stack end to a page boundary before computing its
size, since the size depends on both the start and end.
The original change which introduced stack alignment (#674)
only worked for cases where the round + trunc operation would
wind up within the same area, but would lead to segfaults in
other cases.
Also adds a typecast to the `mach_vm_round_page()` call, as
it is actually a macro which casts to `mach_vm_offset_t` and
the result here is used as a `StackType_t` pointer.
Tested on ARM64 and Intel MacOS, as well as ARM64 and Intel
Linux. The test code included a single-task case, as well
as a case with two tasks passing queue messages.
* config file experiments
* adding a config file for an example
* Added a template port and updated the CMakeLists
* template and default configuration build
* finalising the sample FreeRTOSConfig.h header file
* removed .config hidden file
* further reductions in the template port
* Uncrustify: triggered by comment.
* Uncrustify: triggered by comment.
* minor readme updates
* fixed spelling error in HTTP
* fixed a type and added a link to the sample readme
* uncrustified FreeRTOSConfig.h
* Uncrustify: triggered by comment.
* Revert "Uncrustify: triggered by comment."
This reverts commit e534f46f2d.
* Revert "Revert "Uncrustify: triggered by comment.""
This reverts commit c9058dd383.
* excluding the FreeRTOSConfig.h from copyright+license check because this file is intended to be incorporated into user code
* Removed the copyright and license from the template files
* put license copy in the template and sample files
* Uncrustify: triggered by comment.
---------
Co-authored-by: GitHub Action <action@github.com>
According to Armv8-M technical reference manual, if the main extension
is not implemented then PSPLIM_NS is RES0. Update the cortex-M23
port to not use the reserved PSPLIM_NS.
This change necessitates the introduction of 2 new APIs:
void vTaskListTasks( char * pcWriteBuffer, size_t uxBufferLength );
void vTaskGetRunTimeStatistics( char * pcWriteBuffer, size_t uxBufferLength );
These 2 APIs behave exactly as vTaskList and vTaskGetRunTimeStats
except the fact that they take the length of the pcWriteBuffer as the
second argument to ensure that we do not write past the buffer.
vTaskList and vTaskGetRunTimeStats assume that the length of the
buffer is configSTATS_BUFFER_MAX_LENGTH which defaults to 0xFFFF.
This is done to ensure that the existing applications do not break.
New applications should use the new APIs to avoid memory corruption.
A task's privilege level is stored in ulTaskFlag member in the TCB. Current
implementation of portSWITCH_TO_USER_MODE() does not update this
flag but just lowers the processor's privilege level. This results in many
APIs incorrectly determining task's privilege level and access permissions -
- xPortIsAuthorizedToAccessBuffer
- xPortIsTaskPrivileged
- xPortIsAuthorizedToAccessKernelObject
This PR fixes the portSWITCH_TO_USER_MODE() implementation to correctly
update the ulTaskFlag member in the TCB before lowering the processor's
privilege level.
Add trace hook macro for most ports
In pull request #659 we introduced better support for tracing
tools like systemview. This patchset adds support for more
ports as requested in the original pull request.
This pull-request adds out-of-the-box support for different tracing
tools. New trace hook macros have been added for all public API
functions, one for each function entry and one for each exit. There are
no functional changes, as the macros are by default empty.
For more information see following forum post:
https://forums.freertos.org/t/add-tracing-functionality-for-all-api-calls/18007.
This PR introduces configKERNEL_PROVIDED_STATIC_MEMORY option
which the application can set to 1 to use the default implementations
of vApplicationGetIdleTaskMemory and vApplicationGetTimerTaskMemory
functions.
If the application enables static allocation (i.e. sets
configUSE_STATIC_ALLOCATION to 1) and does not provide the above 2
functions, it will result in linker error. The application has two options:
1. Set configKERNEL_PROVIDED_STATIC_MEMORY to 1 to use the default
implementations of these functions.
2. Provide implementations of these 2 functions.
Note that default definitions are only available for non-MPU ports. The
reason is that the stack alignment requirements vary for different
architectures.
This PR adds Access Control to kernel objects on a per task basis to MPU
ports. The following needs to be defined in the `FreeRTOSConfig.h` to
enable this feature:
```c
#define configUSE_MPU_WRAPPERS_V1 0
#define configENABLE_ACCESS_CONTROL_LIST 1
```
This PR adds the following new APIs:
```c
void vGrantAccessToTask( TaskHandle_t xTask,
TaskHandle_t xTaskToGrantAccess );
void vRevokeAccessToTask( TaskHandle_t xTask,
TaskHandle_t xTaskToRevokeAccess );
void vGrantAccessToSemaphore( TaskHandle_t xTask,
SemaphoreHandle_t xSemaphoreToGrantAccess );
void vRevokeAccessToSemaphore( TaskHandle_t xTask,
SemaphoreHandle_t xSemaphoreToRevokeAccess );
void vGrantAccessToQueue( TaskHandle_t xTask,
QueueHandle_t xQueueToGrantAccess );
void vRevokeAccessToQueue( TaskHandle_t xTask,
QueueHandle_t xQueueToRevokeAccess );
void vGrantAccessToQueueSet( TaskHandle_t xTask,
QueueSetHandle_t xQueueSetToGrantAccess );
void vRevokeAccessToQueueSet( TaskHandle_t xTask,
QueueSetHandle_t xQueueSetToRevokeAccess );
void vGrantAccessToEventGroup( TaskHandle_t xTask,
EventGroupHandle_t xEventGroupToGrantAccess );
void vRevokeAccessToEventGroup( TaskHandle_t xTask,
EventGroupHandle_t xEventGroupToRevokeAccess );
void vGrantAccessToStreamBuffer( TaskHandle_t xTask,
StreamBufferHandle_t xStreamBufferToGrantAccess );
void vRevokeAccessToStreamBuffer( TaskHandle_t xTask,
StreamBufferHandle_t xStreamBufferToRevokeAccess );
void vGrantAccessToMessageBuffer( TaskHandle_t xTask,
MessageBufferHandle_t xMessageBufferToGrantAccess );
void vRevokeAccessToMessageBuffer( TaskHandle_t xTask,
MessageBufferHandle_t xMessageBufferToRevokeAccess );
void vGrantAccessToTimer( TaskHandle_t xTask,
TimerHandle_t xTimerToGrantAccess );
void vRevokeAccessToTimer( TaskHandle_t xTask,
TimerHandle_t xTimerToRevokeAccess );
```
An unprivileged task by default has access to itself only and no other
kernel object. The application writer needs to explicitly grant an
unprivileged task access to all the kernel objects it needs. The best
place to do that is before starting the scheduler when all the kernel
objects are created.
For example, let's say an unprivileged tasks needs access to a queue and
an event group, the application writer needs to do the following:
```c
vGrantAccessToQueue( xUnprivilegedTaskHandle, xQueue );
vGrantAccessToEventGroup( xUnprivilegedTaskHandle, xEventGroup );
```
The application writer MUST revoke all the accesses before deleting a
task. Failing to do so will result in undefined behavior. In the above
example, the application writer needs to make the following 2 calls
before deleting the task:
```c
vRevokeAccessToQueue( xUnprivilegedTaskHandle, xQueue );
vRevokeAccessToEventGroup( xUnprivilegedTaskHandle, xEventGroup );
```
* Add taskYIELD_TASK_CORE_IF_USING_PREEMPTION and taskYIELD_ANY_CORE_IF_USING_PREEMPTION to align task yield behavior for single core and SMP.
---------
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
* Add Trace Hook Macros and function that returns the start of the stack.
* Remove obsolete functions.
---------
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Rahul Kar <karahulx@amazon.com>
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
* Add macro taskTASK_IS_RUNNING_OR_SCHEDULED_TO_YIELD macro to align single core and SMP
* Update for explicit precedence in vTaskDelete
* Update comment when deleting a running task
* Move the configUSE_PORT_OPTIMISED_TASK_SELECTION check to FreeRTOS.h
* SMP also use taskSELECT_HIGHEST_PRIORITY_TASK macro
---------
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
* Use new version of CI-CD Actions
* Use cSpell spell check, and use ubuntu-20.04 for formatting check
* Format and spell check all files in the portable directory
* Remove the https:// from #errors and #warnings as uncrustify attempts to change it to /*
* Use checkout@v3 instead of checkout@v2 on all jobs
---------
Setting configENABLE_HEAP_PROTECTOR to 1 obfuscates heap
block pointers by XORing them with an application supplied
canary value. This obfuscation helps to catch heap corruption
should a heap buffer overflow occur.
This PR also adds heap bounds checking to heap_4 and heap_5.
This PR also adds some additional integer underflow checks.
* Add runtime parameter checks
This commit adds runtime checks for function parameters to mpu_wrappers_v2 file. The same checks are performed
in the API implementation using asserts.
Signed-off-by: kar-rahul-aws <karahulx@amazon.com>
The size calculation in pvPortMalloc uses only parameters and read
only constants and therefore, can be moved out of critical section
to make the critical section as small as possible.
The pxTopOfStack calculation in configINIT_TLS_BLOCK for picolib needs
to decrement pxTopOfStack in order to meet the expectation of
pxPortInitialiseStack function.
The change addresses the following warning:
```
tasks.c:5549:40: warning: assignment discards 'volatile' qualifier from
pointer target type [-Wdiscarded-qualifiers]
5549 | pxTaskStatus->pxTopOfStack = pxTCB->pxTopOfStack;
|
```
Also add the "Build Posix_GCC Demo for Coverage Test" in the PR checks
as coverage test target treats warnings as errors and therefore, will
catch such warnings in PR checks.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
pxTopOfStack is always available and pxEndOfStack is available whenever you have:
(portSTACK_GROWTH > 0) or ( configRECORD_STACK_HIGH_ADDRESS == 1)
Include it in the info report whenever it is available to the tcb.
Co-authored-by: Vince Burns <vburns@sensata.com>
* Set SysTick CLKSOURCE bit before enabling SysTick
* Use portNVIC_SYSTICK_CLK_BIT_CONFIG
The workaround now uses portNVIC_SYSTICK_CLK_BIT_CONFIG instead of
portNVIC_SYSTICK_CLK_BIT, which saves us from having to explain in the
comments why it's OK to temporarily set the CLKSOURCE bit even if the
user's FreeRTOS configuration clears the CLKSOURCE bit.
Using portNVIC_SYSTICK_CLK_BIT_CONFIG here still correctly prevents the
firmware from triggering the QEMU bug.
* Fix warning issue for warnign in arithmnetic conversion for UBaseType_t
* Fix warning in streamBuffer
* Add cast to queue.c file changes
* Minor fix to cast
* Fix formatting
* Revert minor fix to cast
---------
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Define (U)BaseType_t to 64-bit types on Windows
This ensures that BaseType_t and UBaseType_t are correctly defined to
64-bit types on 64-bit Windows.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
FreeRTOS SMP feature is developed in a separate SMP branch. This commit merges the SMP branch to main along with some fixes. User of SMP branch needs to apply the following changes in the port:
* Rename configNUM_CORES to configNUMBER_OF_CORES
* Define portSET/CLEAR_INTERRUPT_MASK for SMP
* Define portENTER/EXIT_CRITICAL_FROM_ISR for SMP. vTaskEnterCriticalFromISR and vTaskExitCriticalFromISR should be used for these port macros
* Update portSET/CLEAR_INTERRUPT_MASK_FROM_ISR implementation to mask interrupt only Call xTaskIncrementTick in critical section in port
History of the development branch:
* Add vTaskYieldWithinAPI for taskYIELD_IF_USING_PREEMPTION
* Add configNUM_CORES config for SMP
* Add portGET_CORE_ID porting config and default return 0 to compatible
with single core demos
* Replace xYieldPending with xYieldPendings for multiple cores
* Add vTaskYieldWithinAPI function for yield pending if the task is in
criticial section. This check are enabled only when portCRITICAL_NESTING_IN_TCB
is enabled
* taskYIELD_IF_USING_PREEMPTION use vTaskYieldWithinAPI when
configUSE_PREEMPTION is set to 1
The following sections will be updated in other commits
* taskYIELD_IF_USING_PREEMPTION usage in multiple cores
* xYieldPendings usage in multiple cores
* Use portYIELD_WITHIN_API for portYIELD_WITHIN_API for single core
* Add xTaskRunState and xIsIdle in TCB
* Add xTaskRunState and xIsIdle in TCB
* Use xTaskAttribute to replace the xIsIdle in SMP TCB
* Add pxCurrentTCBs for multiple cores
* Keep pxCurrentTCB for single core
* Add pxCurrentTCBs for SMP
* Add xTaskGetCurrentTaskHandle for SMP
* Replace taskSELECT_HIGHEST_PRIORITY_TASK with temporary prvSelectHighestPriorityTask
* Add SMP critical section functions
* Update vTaskEnterCritical and vTaskExitCritical functions for SMP
* Add vTaskEnterCriticalFromISR and vTaskExitCriticalFromISR for SMP
* Add SMP prvYieldCore and prvYieldForTask
* Add idle tasks for SMP
* Add minimal idle task function declaration
* Align to use 0x00 for null terminator
* Merge vTaskSuspendAll and xTaskResumeAll from SMP branch
* Merge vTaskResume and xTaskResumeFromISR from SMP
* Merge xTaskIncrementTick from SMP
* Update prvYieldForTask usage in kernel APIs
* Merge prvAddNewTaskToReadyList from SMP
* Merge vTaskSwitchContext from SMP
* Add vTaskSwitchContextForCore APIs to switch context for specific core
* vTaskSwitchContext will switch context for current core
* Merge vTaskDelete from SMP
* Add prvYeildCore for single core to reduce multicore macros
* Add taskTASK_IS_RUNNING for single core
* Add taskTASK_IS_YIELDING
* Merge vTaskSuspend from SMP
* Set minimal idle task idle attribute
* Set minimal idle task idle attribute in prvInitialiseNewTask
* Move prvCreateIdleTasks forward and check return value
* Add minimal idle hook config check
* Fix xTaskResumeAll in SMP
* xTaskRusmeAll do nothing when scheduler not running in SMP
* check scheduler suspended when scheduler is running
* Move suspend scheduler inside critical section
* Update comment for uxSchedulerSuspended
* Add back xPendingReadyList for single core
* Use critical section for SMP
* Add in ISR check in prvCheckForRunStateChange function
* Add critical section protect for context switch
* Add vTaskSwitchContextForCore declaration
* Fix missing macro and check for single core
* Fix task delete condition
* Latest kernel move out the prvDeleteTask and the check condition should be
TASK_IS_RUNNING
* Use critical section to protect more in SMP for vTaskDelete
* The condition task is running is not thread safe in SMP
* Once we add the task to termination the task is still running and may
add it back to other list. Which cause memory corruption.
* Merge SMP prvSelectHighestPriorityTask to main
* Merge prvCheckTasksWaitingTermination from SMP branch
* Move prvDeleteTCB outside of critical section
* Add NULL pointer check in prvCheckTasksWaitingTermination
* Update for performance
* Remove prvSelectHighestPriorityTask and vTaskSwitchContextForCore for
-O0 performance in single core
* Update prvSelectHighestPriorityTask
* Merge vTaskYieldWithinAPI from SMP
Update vTaskYieldWithinAPI from SMP
* xTaskDelayUntil
* xTaskDelay
* ulTaskGenericNotifyTake
* xTaskGenericNotifyWait
* event_groups.c
* queue.c
* timers.c
Add critical section protection
* xTaskGetSchedulerState
Update state check macro
* vTaskGetInfo
* eTaskGetState
* Merge vTaskPrioritySet from SMP branch
* Void prvYieldForTask return value in vTaskPrioritySet
* Yield for SMP when set priority
* Move vTaskDelay check uxSchedulerSuspended
* Update code logic for performance
* Fix yield for task in single core
* Merge timer change from SMP branch
* Split xTimerGenericCommand into xTimerGenericCommandFromTask and
xTimerGenericCommandFromISR to remove the recursion path when called from ISRs.
* Add portTIMER_CALLBACK_ATTRIBUTE for timer callback function
* Add RP2040 SMP porting support
* Seperate task state for SMP and single core
* Merge configRUN_MULTIPLE_PRIORITIES from SMP branch
* Merge configUSE_TASK_PREEMPTION_DISABLE from SMP
* Merge configUSE_CORE_AFFINITY from SMP
* Update pxYieldSpinLocks to per-cpu variable in SMP
* Remove TODO log
* Add suppport for ARM CM55 (#494)
* Add supposrt for ARM CM55
* Fix file header
* Remove duplicate code
* Refactor portmacro.h
1. portmacro.h is re-factored into 2 parts - portmacrocommon.h which is
common to all ARMv8-M ports and portmacro.h which is different for
different compiler and architecture. This enables us to provide
Cortex-M55 ports without code duplication.
2. Update copy_files.py so that it copies Cortex-M55 ports correctly -
all files except portmacro.h are used from Cortex-M33 ports.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
* add extra check for compiler time (#499)
minor change to add extra check for compiler time to prevent bad config
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Update feature_request.md (#500)
* Update feature_request.md
* Remove trailing spaces
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
* Add callback overrides for stream buffer and message buffers (#437)
* Let each stream/message can use its own sbSEND_COMPLETED
In FreeRTOS.h, set the default value of configUSE_SB_COMPLETED_CALLBACK
to zero, and add additional space for the function pointer when
the buffer created statically.
In stream_buffer.c, modify the macro of sbSEND_COMPLETED which let
the stream buffer to use its own implementation, and then add an
pointer to the stream buffer's structure, and modify the
implementation of the buffer creating and initializing
Co-authored-by: eddie9712 <qw1562435@gmail.com>
* Add configUSE_MUTEXES to function declarations in header (#504)
This commit adds the configUSE_MUTEXES guard to the function
declarations in semphr.h which are only available when configUSE_MUTEXES
is set to 1.
It was reported here - https://forums.freertos.org/t/mutex-missing-reference-to-configuse-mutexes-on-the-online-documentation/15231
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* RP2040: Remove incorrect assertion (#508)
After the xEventGroupWaitBits in vProtLockInternalSpinUnlockWithWait there was an assertion about
pxYiledSpinLock being NULL, however when xEventGroupWaitBits returns, IRQs have been re-enabled
and so it is no longer safe to assert on the state which is protected by IRQs being disabled.
Co-authored-by: graham sanderson <graham.sanderson@raspeberryi.com>
* Ensure that xTaskGetCurrentTaskHandle is included (#507)
This commits adds a check that INCLUDE_xTaskGetCurrentTaskHandle is
set to 1. A compile time error message is produced if it is not set to
1. This is needed because stream_buffer.c uses xTaskGetCurrentTaskHandle.
This was reported here - https://forums.freertos.org/t/xstreambufferreceive-include-xtaskgetcur/15283
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* RP2040: Allow FreeRTOS to be added to the parent CMake project post initialization of the Pico SDK (#497)
Co-authored-by: graham sanderson <graham.sanderson@raspeberryi.com>
* Update to TF-M version TF-Mv1.6.0 (#517)
Signed-off-by: Xinyu Zhang <xinyu.zhang@arm.com>
Change-Id: I0c15564b342873f9bd7a8240822e770950a0563e
* Update submodule pointer of Community Supported Ports (#486)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
* Add Cortex M7 r0p1 Errata 837070 workaround to CM4_MPU ports (#513)
* Clarify Cortex M7 r0p1 errata number in r0p1 specific port.
* Add ARM Cortex M7 r0p0 / r0p1 Errata 837070 workaround to CM4 MPU ports.
Optionally, enable the errata workaround by defining configTARGET_ARM_CM7_r0p0 or configTARGET_ARM_CM7_r0p1 in FreeRTOSConfig.h.
* Add r0p1 errata support to IAR port as well
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Change macro name to configENABLE_ERRATA_837070_WORKAROUND
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
* RP2040: Use indirect reference for pxCurrentTCB (#525)
* Posix: Removed unused signal set from port (#528)
Co-authored-by: Jakob Hasse <0xjakob@users.noreply.github.com>
* Add SBOM Generation in auto_release.yml (#524)
* add portDONT_DISCARD to pxCurrentTCB (#479)
This fixes link failures with LTO:
/tmp/ccJbaKaD.ltrans0.ltrans.o: in function `pxCurrentTCBConst2':
/root/project/FreeRTOS/portable/GCC/ARM_CM4F/port.c:249: undefined reference to `pxCurrentTCB'
/usr/lib/gcc/arm-none-eabi/11.2.0/../../../../arm-none-eabi/bin/ld: /tmp/ccJbaKaD.ltrans0.ltrans.o: in function `pxCurrentTCBConst':
/root/project/FreeRTOS/portable/GCC/ARM_CM4F/port.c:443: undefined reference to `pxCurrentTCB'
* Implement MicroBlazeV9 stack protection (#523)
* Implement stack protection for MicroBlaze (without MPU wrappers)
* Update codecov action to v3.1.0
* Add vPortRemoveInterruptHandler API (#533)
* Add xPortRemoveInterruptHandler API
This API is added to the MicroBlazeV9 port. It enables the application
writer to remove an interrupt handler.
This was originally contributed in this PR - https://github.com/FreeRTOS/FreeRTOS-Kernel/pull/523
* Change API signature to return void
This makes the API similar to vPortDisableInterrupt.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gavin Lambert <uecasm@users.noreply.github.com>
* Fix NULL pointer dereference in vPortGetHeapStats
When the heap is exhausted (no free block), start and end markers are
the only blocks present in the free block list:
+---------------+ +-----------> NULL
| | |
| V |
+ ----- + + ----- +
| | | | | |
| | | | | |
+ ----- + + ----- +
xStart pxEnd
The code block which traverses the list of free blocks to calculate heap
stats used a do..while loop that moved past the end marker when the heap
had no free block resulting in a NULL pointer dereference. This commit
changes the do..while loop to while loop thereby ensuring that we never
move past the end marker.
This was reported here - https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/534
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Change type of message buffer handle (#537)
* Block SIG_RESUME in the main thread of the Posix port so that sigwait works as expected (#532)
Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>
* Update History.txt (#535)
* Update History.txt
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Add .syntax unified to GCC assembly functions (#538)
This fixes the compilation issue with XC32 compiler.
It was reported here - https://forums.freertos.org/t/xc32-v4-00-error-with-building-freertos-portasm-c/14357/4
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Paul Bartell <pbartell@amazon.com>
* Generalize Thread Local Storage (TLS) support (#540)
* Generalize Thread Local Storage (TLS) support
FreeRTOS's Thread Local Storage (TLS) support used variables and
functions from newlib, thereby making the TLS support specific to
newlib. This commit generalizes the TLS support so that it can be used
with other c-runtime libraries also. The default behavior for newlib
support is still kept same for backward compatibility.
The application writer would need to set configUSE_C_RUNTIME_TLS_SUPPORT
to 1 in their FreeRTOSConfig.h and define the following macros to
support TLS for a c-runtime library:
1. configTLS_BLOCK_TYPE - Type used to define the TLS block in TCB.
2. configINIT_TLS_BLOCK( xTLSBlock ) - Allocate and initialize memory
block for the task's TLS Block.
3. configSET_TLS_BLOCK( xTLSBlock ) - Switch C-Runtime's TLS Block to
point to xTLSBlock.
4. configDEINIT_TLS_BLOCK( xTLSBlock ) - Free up the memory allocated
for the task's TLS Block.
The following is an example to support TLS for picolibc:
#define configUSE_C_RUNTIME_TLS_SUPPORT 1
#define configTLS_BLOCK_TYPE void*
#define configINIT_TLS_BLOCK( xTLSBlock ) _init_tls( xTLSBlock )
#define configSET_TLS_BLOCK( xTLSBlock ) _set_tls( xTLSBlock )
#define configDEINIT_TLS_BLOCK( xTLSBlock )
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Change default value of INCLUDE_xTaskGetCurrentTaskHandle (#542)
* Include string.h at the top of portable/GCC/ARM_CA9/port.c to prevent memset() generating a warning. (#430)
Co-authored-by: none <unknown>
* Move some of the complex pre-processor guards on prvWriteNameToBuffer() to compile time checks in FreeRTOS.h.
Co-authored-by: Paul Bartell <pbartell@amazon.com>
* Fix formatting of FreeRTOS.h
* correct grammar in include/FreeRTOS.h
Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com>
* Fix warnings in posix port (#544)
Fixes warnings about unused parameters and variables when built with
`-Wall -Wextra`.
* Add support for MISRA rule 20.7 (#546)
Misra rule 20.7 requires parenthesis to all parameter names
in macro definitions.
The issue was reported here : https://forums.freertos.org/t/misra-20-7-compatibility/15385
* Add FreeRTOS config directory to include dirs (#548)
This allows the application write to set FREERTOS_CONFIG_FILE_DIRECTORY
to whichever directory the FreeRTOSConfig.h file exists in.
This was reported here - https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/545
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* [Fix] Type for pointers operations (#550)
* fix type for pointers operations in some places: size_t -> portPOINTER_SIZE_TYPE
* fix pointer arithmetics
* fix xAddress type
* RISC-V: Add support for RV32E extension in GCC port (#543)
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
* Added checks for index in ThreadLocalStorage APIs (#552)
Added checks for ( xIndex >= 0 ) in ThreadLocalStorage APIs
* Update of three badly terminated macro definitions (#555)
* Update of three badly terminated macro definitions
- vTaskDelayUntil() to conform to usual pattern do { ... } while(0)
- vTaskNotifyGiveFromISR() and
- vTaskGenericNotifyGiveFromISR() to remove extra terminating semicolons
- This PR addresses issues #553 and #554
* Adjust formatting of task.h
Co-authored-by: Paul Bartell <pbartell@amazon.com>
* M85 support (#556)
* Extend support to Arm Cortex-M85
Signed-off-by: Gabor Toth <gabor.toth@arm.com>
Change-Id: I679ba8e193638126b683b651513f08df445f9fe6
* Add generated Cortex-M85 support files
Signed-off-by: Gabor Toth <gabor.toth@arm.com>
Change-Id: Ib329d88623c2936ffe3e9a24f5d6e07655e4e5c8
* Extend Trusted Firmware M port
Extend Trusted Firmware M port to Cortex-M23,
Cortex-M55 and Cortex-M85.
Signed-off-by: Gabor Toth <gabor.toth@arm.com>
Change-Id: If8f1081acfd04e547b3227579e70e355a6adffe3
* Re-run copy_files.py script
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Signed-off-by: Gabor Toth <gabor.toth@arm.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
* portable-RP2040: Fix typo in README.md (#559)
Replace "import" with "include" in cmake code sample.
* Update CMakeLists.txt for Cortex-M55 and Cortex-M85 ports (#560)
* Annotate ports CMakeLists.txt with port details
* CMake: Add Cortex-M55 and Cortex-M85 ports
* Use highest numbered MPU regions for kernel
ARMv7-M allows overlapping MPU regions. When 2 MPU regions overlap, the
MPU configuration of the higher numbered MPU region is applied. For
example, if a memory area is covered by 2 MPU regions 0 and 1, the
memory permissions for MPU region 1 are applied.
We use 5 MPU regions for kernel code and kernel data protections and
leave the remaining for the application writer. We were using lowest
numbered MPU regions (0-4) for kernel protections and leaving the
remaining for the application writer. The application writer could
configure those higher numbered MPU regions to override kernel
protections.
This commit changes the code to use highest numbered MPU regions for
kernel protections and leave the remaining for the application writer.
This ensures that the application writer cannot override kernel
protections.
We thank the SecLab team at Northeastern University for reporting this
issue.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Make RAM regions non-executable
This commit makes the privileged RAM and stack regions non-executable.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Remove local stack variable form MPU wrappers
It was possible for a third party that had already independently gained
the ability to execute injected code to achieve further privilege
escalation by branching directly inside a FreeRTOS MPU API wrapper
function with a manually crafted stack frame. This commit removes the
local stack variable `xRunningPrivileged` so that a manually crafted
stack frame cannot be used for privilege escalation by branching
directly inside a FreeRTOS MPU API wrapper.
We thank Certibit Consulting, LLC, Huazhong University of Science and
Technology and the SecLab team at Northeastern University for reporting
this issue.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Restrict unpriv task to invoke code with privilege
It was possible for an unprivileged task to invoke any function with
privilege by passing it as a parameter to MPU_xTaskCreate,
MPU_xTaskCreateStatic, MPU_xTimerCreate, MPU_xTimerCreateStatic, or
MPU_xTimerPendFunctionCall.
This commit ensures that MPU_xTaskCreate and MPU_xTaskCreateStatic can
only create unprivileged tasks. It also removes the following APIs:
1. MPU_xTimerCreate
2. MPU_xTimerCreateStatic
3. MPU_xTimerPendFunctionCall
We thank Huazhong University of Science and Technology for reporting
this issue.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Update History.txt
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Update History.txt as per the PR feedback
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Update RISC-V IAR port to support vector mode. (#458)
* Update RISC-V IAR port to support vector mode.
* uncrustify
Co-authored-by: David Chalco <david@chalco.io>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>
* Added better pointer declaration readability (#567)
* Add better pointer declaration readability
I revised the declaration of single-line pointers by splitting it into
multiple lines. Now, every pointer is declared (and initialized
accordingly) on its own line. This refactoring should enhance
readability and decrease the probability of error when a new pointer is
added/removed or a current one has its initialization value modified.
Signed-off-by: Cristian Cristea <cristiancristea00@gmail.com>
* Remove unnecessary whitespace characters and lines
It removes whitespace characters at the end of lines (empty or
othwerwise) and clear lines at the end of the file (only one remains).
It is an automatic operation done by git.
Signed-off-by: Cristian Cristea <cristiancristea00@gmail.com>
Signed-off-by: Cristian Cristea <cristiancristea00@gmail.com>
* Update doc comments in task.h (#570)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Tickless idle fixes/improvement (#59)
* Fix tickless idle when stopping systick on zero...
...and don't stop SysTick at all in the eAbortSleep case.
Prior to this commit, if vPortSuppressTicksAndSleep() happens to stop
the SysTick on zero, then after tickless idle ends, xTickCount advances
one full tick more than the time that actually elapsed as measured by
the SysTick. See "bug 1" in this forum post:
https://forums.freertos.org/t/ultasknotifytake-timeout-accuracy/9629/40
SysTick
-------
The SysTick is the hardware timer that provides the OS tick interrupt
in the official ports for Cortex M. SysTick starts counting down from
the value stored in its reload register. When SysTick reaches zero, it
requests an interrupt. On the next SysTick clock cycle, it loads the
counter again from the reload register. To get periodic interrupts
every N SysTick clock cycles, the reload register must be N - 1.
Bug Example
-----------
- Idle task calls vPortSuppressTicksAndSleep(xExpectedIdleTime = 2).
[Doesn't have to be "2" -- could be any number.]
- vPortSuppressTicksAndSleep() stops SysTick, and the current-count
register happens to stop on zero.
- SysTick ISR executes, setting xPendedTicks = 1
- vPortSuppressTicksAndSleep() masks interrupts and calls
eTaskConfirmSleepModeStatus() which confirms the sleep operation. ***
- vPortSuppressTicksAndSleep() configures SysTick for 1 full tick
(xExpectedIdleTime - 1) plus the current-count register (which is 0)
- One tick period elapses in sleep.
- SysTick wakes CPU, ISR executes and increments xPendedTicks to 2.
- vPortSuppressTicksAndSleep() calls vTaskStepTick(1), then returns.
- Idle task resumes scheduler, which increments xTickCount twice (for
xPendedTicks = 2)
In the end, two ticks elapsed as measured by SysTick, but the code
increments xTickCount three times. The root cause is that the code
assumes the SysTick current-count register always contains the number of
SysTick counts remaining in the current tick period. However, when the
current-count register is zero, there are ulTimerCountsForOneTick
counts remaining, not zero. This error is not the kind of time slippage
normally associated with tickless idle.
*** Note that a recent commit https://github.com/FreeRTOS/FreeRTOS-Kernel/commit/e1b98f0
results in eAbortSleep in this case, due to xPendedTicks != 0. That
commit does mostly resolve this bug without specifically mentioning
it, and without this commit. But that resolution allows the code in
port.c not to directly address the special case of stopping SysTick on
zero in any code or comments. That commit also generates additional
instances of eAbortSleep, and a second purpose of this commit is to
optimize how vPortSuppressTicksAndSleep() behaves for eAbortSleep, as
noted below.
This commit also includes an optimization to avoid stopping the SysTick
when eTaskConfirmSleepModeStatus() returns eAbortSleep. This
optimization belongs with this fix because the method of handling the
SysTick being stopped on zero changes with this optimization.
* Fix imminent tick rescheduled after tickless idle
Prior to this commit, if something other than systick wakes the CPU from
tickless idle, vPortSuppressTicksAndSleep() might cause xTickCount to
increment once too many times. See "bug 2" in this forum post:
https://forums.freertos.org/t/ultasknotifytake-timeout-accuracy/9629/40
SysTick
-------
The SysTick is the hardware timer that provides the OS tick interrupt
in the official ports for Cortex M. SysTick starts counting down from
the value stored in its reload register. When SysTick reaches zero, it
requests an interrupt. On the next SysTick clock cycle, it loads the
counter again from the reload register. To get periodic interrupts
every N SysTick clock cycles, the reload register must be N - 1.
Bug Example
-----------
- CPU is sleeping in vPortSuppressTicksAndSleep()
- Something other than the SysTick wakes the CPU.
- vPortSuppressTicksAndSleep() calculates the number of SysTick counts
until the next tick. The bug occurs only if this number is small.
- vPortSuppressTicksAndSleep() puts this small number into the SysTick
reload register, and starts SysTick.
- vPortSuppressTicksAndSleep() calls vTaskStepTick()
- While vTaskStepTick() executes, the SysTick expires. The ISR pends
because interrupts are masked, and SysTick starts a 2nd period still
based on the small number of counts in its reload register. This 2nd
period is undesirable and is likely to cause the error noted below.
- vPortSuppressTicksAndSleep() puts the normal tick duration into the
SysTick's reload register.
- vPortSuppressTicksAndSleep() unmasks interrupts before the SysTick
starts a new period based on the new value in the reload register.
[This is a race condition that can go either way, but for the bug
to occur, the race must play out this way.]
- The pending SysTick ISR executes and increments xPendedTicks.
- The SysTick expires again, finishing the second very small period, and
starts a new period this time based on the full tick duration.
- The SysTick ISR increments xPendedTicks (or xTickCount) even though
only a tiny fraction of a tick period has elapsed since the previous
tick.
The bug occurs when *two* consecutive small periods of the SysTick are
both counted as ticks. The root cause is a race caused by the small
SysTick period. If vPortSuppressTicksAndSleep() unmasks interrupts
*after* the small period expires but *before* the SysTick starts a
period based on the full tick period, then two small periods are
counted as ticks when only one should be counted.
The end result is xTickCount advancing nearly one full tick more than
time actually elapsed as measured by the SysTick. This is not the kind
of time slippage normally associated with tickless idle.
After this commit the code starts the SysTick and then immediately
modifies the reload register to ensure the very short cycle (if any) is
conducted only once. This strategy requires special consideration for
the build option that configures SysTick to use a divided clock. To
avoid waiting around for the SysTick to load value from the reload
register, the new code temporarily configures the SysTick to use the
undivided clock. The resulting timing error is typical for tickless
idle. The error (commonly known as drift or slippage in kernel time)
caused by this strategy is equivalent to one or two counts in
ulStoppedTimerCompensation.
This commit also updates comments and #define symbols related to the
SysTick clock option. The SysTick can optionally be clocked by a
divided version of the CPU clock (commonly divide-by-8). The new code
in this commit adjusts these comments and symbols to make them clearer
and more useful in configurations that use the divided clock. The fix
made in this commit requires the use of these symbols, as noted in the
code comments.
* Fix tickless idle with alternate systick clocking
Prior to this commit, in configurations using the alternate SysTick
clocking, vPortSuppressTicksAndSleep() might cause xTickCount to jump
ahead as much as the entire expected idle time or fall behind as much
as one full tick compared to time as measured by the SysTick.
SysTick
-------
The SysTick is the hardware timer that provides the OS tick interrupt
in the official ports for Cortex M. SysTick starts counting down from
the value stored in its reload register. When SysTick reaches zero, it
requests an interrupt. On the next SysTick clock cycle, it loads the
counter again from the reload register. The SysTick has a configuration
option to be clocked by an alternate clock besides the core clock.
This alternate clock is MCU dependent.
Scenarios Fixed
---------------
The new code in this commit handles the following scenarios that were
not handled correctly prior to this commit.
1. Before the sleep, vPortSuppressTicksAndSleep() stops the SysTick on
zero, long after SysTick reached zero. Prior to this commit, this
scenario caused xTickCount to jump ahead one full tick for the same
reason documented here: 0c7b04bd3a
2. After the sleep, vPortSuppressTicksAndSleep() stops the SysTick
before it loads the counter from the reload register. Prior to this
commit, this scenario caused xTickCount to jump ahead by the entire
expected idle time (xExpectedIdleTime) because the current-count
register is zero before it loads from the reload register.
3. Prior to return, vPortSuppressTicksAndSleep() attempts to start a
short SysTick period when the current SysTick clock cycle has a lot of
time remaining. Prior to this commit, this scenario could cause
xTickCount to fall behind by as much as nearly one full tick because the
short SysTick cycle never started.
Note that #3 is partially fixed by 967acc9b20
even though that commit addresses a different issue. So this commit
completes the partial fix.
* Improve comments and name of preprocessor symbol
Add a note in the code comments that SysTick requests an interrupt when
decrementing from 1 to 0, so that's why stopping SysTick on zero is a
special case. Readers might unknowingly assume that SysTick requests
an interrupt when wrapping from 0 back to the load-register value.
Reconsider new "_SETTING" suffix since "_CONFIG" suffix seems more
descriptive. The code relies on *both* of these preprocessor symbols:
portNVIC_SYSTICK_CLK_BIT
portNVIC_SYSTICK_CLK_BIT_CONFIG **new**
A meaningful suffix is really helpful to distinguish the two symbols.
* Revert introduction of 2nd name for NVIC register
When I added portNVIC_ICSR_REG I didn't realize there was already a
portNVIC_INT_CTRL_REG, which identifies the same register. Not good
to have both. Note that portNVIC_INT_CTRL_REG is defined in portmacro.h
and is already used in this file (port.c).
* Replicate to other Cortex M ports
Also set a new fiddle factor based on tests with a CM4F. I used gcc,
optimizing at -O1. Users can fine-tune as needed.
Also add configSYSTICK_CLOCK_HZ to the CM0 ports to be just like the
other Cortex M ports. This change allowed uniformity in the default
tickless implementations across all Cortex M ports. And CM0 is likely
to benefit from configSYSTICK_CLOCK_HZ, especially considering new CM0
devices with very fast CPU clock speeds.
* Revert changes to IAR-CM0-portmacro.h
portNVIC_INT_CTRL_REG was already defined in port.c. No need to define
it in portmacro.h.
* Handle edge cases with slow SysTick clock
Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
Co-authored-by: abhidixi11 <44424462+abhidixi11@users.noreply.github.com>
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>
* Merge SMP commit 45dd83a8e
* 45dd83a8e | 2022-06-09 | Fix RP2040 assertion due to yield spin lock info being wrongly shared between multiple cores (#501)
* Merge SMP b87dfa3e9
* b87dfa3e9 | 2022-06-04 | RP2040: Allow FreeRTOS to be added to the parent CMake project post initialization of the Pico SDK
* Merge SMP 13f034eb7
* 13f034eb7 | 2022-06-24 | RP2040: Fix compiler warning and comment (#509)
* Fix compiler warning and spelling
* Fix Add new task for single core when scheduler not running
* Fix priority set when task is not in ready list for single core
* Fix vTaskResume when task is not running
* Fix uncrustify formating warning
* Add portCHECK_IF_IN_ISR for SMP
* Format vTaskSwitchContext
* Fix vTaskSwitchContextForCore bug due to uncrustify
* First review - did not build yet
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Corresponding changes in FreeRTOS.h and task.h
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Fix the single core compilation
* vTaskSwtichContextForCore rename vTaskSwitchContext
* vTaskYieldWithinAPI for single core
* pxCurrentTCBs for single core in xTaskIncrementTick
* Fix compilation warning
* Update xTaskGetCurrentTaskHandleCPU API
* Use BaseType_t instead of UBaseType_t
* Make the list traverse loop more readable
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Remove unnecessary loop in xTaskIncrementTick for single core
* Update uxSchedulerSuspended with ISR lock in prvCheckForRunStateChange
* Updated ESP32 port-layer to ESP-IDF `v4.4.2` (#572)
* Xtensa_ESP32: Added esp-idf v4.4.2 specific changes
* Xtensa_ESP32: Updated SPDX license identifiers
* Add warning message to ensure min stack size (#575)
Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>
* Removed the 'configASSERT( xInheritanceOccurred == pdFALSE )' assertion from xQueueSemaphoreTake as the reasoning behind it is wrong; it can trigger on wrongly on highly-contested semaphores on multicore systems. See https://forums.freertos.org/t/15967 (#576)
Co-authored-by: Niklas Gürtler <niklas.guertler@tacterion.com>
* Update the NIOSII port to enable longer jumps (#578)
Update the NIOSII port so it works on systems with more RAM as
per https://forums.freertos.org/t/nios-ii-r-nios2-call26-noat-linker-error/16028
* Update Cortex-M55 and Cortex-M85 ports (#579)
These were missed when PR #59 was merged.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Fix context switch when time slicing is off (#568)
* Fix context switch when time slicing is off
When time slicing is off, context switch should only happen when a
task with priority higher than the currently executing one is unblocked.
Earlier the code was invoking a context switch even when a task with
priority equal the currently executing task was unblocked. This commit
fixes the code to only do a context switch when a higher priority
task is unblocked.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Merge commit "Add support for retrieving a task's uxCoreAffinityMask
with the vTaskGetInfo() API"
* Merge commit 8128208bde
* Use taskENTER/EXIT_CRITICAL_FROM_ISR (#38)
* Enter critical section from is implemented differently for single core
and smp. Use taskENTER/EXIT_CRITICAL_FROM_ISR in source.
* Improve single core unit test coverage (#42)
* prvCreateIldeTask use configNUM_CORES
* First time yield in idle task in SMP only
* prvCheckTasksWaitingTermination check pxTCB NULL pointer for SMP only.
Single core won't have to check the pxTCB
* Yield for task when core affinity changed (#41)
* Yield for task when the task is linked to new allowed cores
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
* Remove builtin clz in prvSelectHighestPriorityTask (#37)
* Remove builtin clz in prvSelectHighestPriorityTask
* Move critical nesting count to port (#47)
* Move the critical nesting management to port layer
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Move critical nesting in TCB macro to tasks.c
* Add RP2040 support maintain critical nesting count in TCB
* Fix formatting
* RP2040 maintain critical nesting count in port
* Fix constant type
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
* Rename config num cores (#48)
* Rename configNUM_CORES to configNUMBER_OF_CORES
* Fix the task selection when task yields (#54)
* Move xTaskIncrementTick critical section to port (#55)
* Port should use taskENTER/EXIT_CRITICAL_FROM_ISR
* Not preempt equal priority task in the following functions (#56)
Not to preempt equal priority task in the following functions
* vTaskResume
* vTaskResumeFromISR
* vTaskPrioritySet
* vTaskCoreAffinitySet
* Remove implicit test (#49)
* Remove taskTASK_IS_RUNNING implicit test
* Remove portCHECK_IF_IN_ISR implicit test
* Fix taskVALID_CORE_ID implicit test
* Remove configASSERT implicit test
* Fix preempt equal priority task in xTaskIncrementTick (#58)
* Not preempt equal priority when a task is removed from delay list.
Process time sharing is handle in the logic below.
* Remove the xPreemptEqualPriority parameter of prvYieldForTask
* Remove prvSelectHighestPriorityTask call in vTaskSuspend (#59)
* Every core starts with an idle task in SMP implementation and
taskTASK_IS_RUNNING only return ture when the task is idle task before
scheduler started. So prvSelectHighestPriorityTask won't be called in
vTaskSuspend before scheduler started.
* Update prvSelectHighestPriorityTask to ensure that this function is
called only when scheduler started.
* Adding portIDLE_TASK_TEST_MOCK in idle task function (#66)
* Adding configIDLE_TASK_HOOK in idle task function
* Add INFINITE_LOOP macro to test idle task function (#67)
* Remove configIDLE_TASK_HOOK
* Add INFINIT_LOOP. Unit test can redefine this macro to mock the
function.
* portYield is not called when exit critical section from ISR (#60)
* Reference SMP branch
* Fix list index is moved in prvSearchForNameWithinSingleList (#61)
* index pointer should not be moved in SMP
* Yield for priority inherit and disinherit (#64)
* Yield the core runs the task with prority changed when priority
inheritance and disinheritance.
* fix performance counting for SMP (#65)
* performance counting: ulTaskSwitchedInTime and ulTotalRunTime must be (#618)
arrays, index is core number
---------
Co-authored-by: Hardy Griech <ntbox@gmx.net>
* Remomve unreachable assert in prvCheckForRunStateChange (#68)
* Previous assert already ensure this assert won't be triggered
* Remove unreachable code in preYieldForTask (#69)
* xLowestPriorityCore index can't be greater than configNUMBER_OF_CORES
* Add first version of XCOREAI port (#63)
* xTaskIncrementTick need to be called in critical section
* Rename configNUM_CORES to configNUMBER_OF_CORES
* Define portENTER/EXIT_CRITICAL_FROM_ISR for SMP
* portSET/CLEAR_INTERRUPT_MASK_FROM_ISR is not used in SMP
* Fix configDEINIT_TLS_BLOCK (#73)
configDEINIT_TLS_BLOCK() should deinit the TLS block of the task to being
deleted instead of the currently running task.
* Sync with main branch (#71)
* Fix array-bounds compiler warning on gcc11+ in list.h (#580)
listGET_OWNER_OF_NEXT_ENTRY computes `( pxConstList )->pxIndex->pxNext` after
verifying that `( pxConstList )->pxIndex` points to `xListEnd`, which due to
being a MiniListItem_t, can be shorter than a ListItem_t. Thus,
`( pxConstList )->pxIndex` is a `ListItem_t *` that extends past the end of the
`List_t` whose `xListEnd` it points to. This is fixed by accessing `pxNext`
through a `MiniListItem_t` instead.
* move the prototype for vApplicationIdleHook to task.h. (#600)
Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Update equal priority task preemption (#603)
* vTaskResume and vTaskPrioritySet don't preempt equal priority task
* Update vTaskResumeAll not to preempt task with equal priority
* Fix in xTaskResumeFromISR
* Update FreeRTOS/FreeRTOS build checks (#613)
This is needed to be compatible with the refactoring done in this
PR - https://github.com/FreeRTOS/FreeRTOS/pull/889
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Add ulTaskGetRunTimeCounter and ulTaskGetRunTimePercent (#611)
Allow ulTaskGetIdleRunTimeCounter and ulTaskGetIdleRunTimePercent to be
used whenever configGENERATE_RUN_TIME_STATS is enabled, as this is the
only requirement for these functions to work.
* Fix some CMake documentation typos (#616)
The quick start instructions for CMake mention the "master"
git branch which has been replaced by "main" in the current
repo.
The main CMakeLists.txt documents how to integrate a
custom port. Fix a typo in the suggested CMake code.
* Added support of 64bit events. (#597)
* Added support of 64bit even
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Added missing brackets
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Made proper name for tick macro.
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Improved macro evaluation
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Fixed missed port files + documentation
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Changes made on PR
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Fix macro definition.
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Formatted code with uncrustify
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
---------
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Introduce portMEMORY_BARRIER for Microblaze port. (#621)
The introduction of `portMEMORY_BARRIER` will ensure
the places in the kernel use a barrier will work.
For example, `xTaskResumeAll` has a memory barrier
to ensure its correctness when compiled with optimization
enabled. Without the barrier `xTaskResumeAll` can fail
(e.g. start reading and writing to address 0 and/or
infinite looping) when `xPendingReadyList` contains more
than one task to restore.
In `xTaskResumeAll` the compiler chooses to cache the
`pxTCB` the first time through the loop for use
in every subsequent loop. This is incorrect as the
removal of `pxTCB->xEventListItem` will actually
change the value of `pxTCB` if it was read again
at the top of the loop. The barrier forces the compiler
to read `pxTCB` again at the top of the loop.
The compiler is operating correctly. The removal
`pxTCB->xEventListItem` executes on a `List_t *`
and `ListItem_t *`. This means that the compiler
can assume that any `MiniListItem_t` values are
unchanged by the loop (i.e. "strict-aliasing").
This allows the compiler to cache `pxTCB` as it
is obtained via a `MiniListItem_t`. This is incorrect
in this case because it is possible for a `ListItem_t *`
to actually alias a `MiniListItem_t`. This is technically
a "violation of aliasing rules" so we use the the barrier
to disable the strict-aliasing optimization in this loop.
* Do not call exit() on MSVC Port when calling vPortEndScheduler (#624)
* make port exitable
* correctly set xPortRunning to False
* add suggestions from Review
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* add suggestions from Review
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
---------
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Update PR template to include checkbox for Unit Test related changes (#627)
* Fix build failure introduced in PR #597 (#629)
The PR #597 introduced a new config option configTICK_TYPE_WIDTH_IN_BITS
which can be defined to one of the following:
* TICK_TYPE_WIDTH_16_BITS - Tick type is 16 bit wide.
* TICK_TYPE_WIDTH_32_BITS - Tick type is 32 bit wide.
* TICK_TYPE_WIDTH_64_BITS - Tick type is 64 bit wide.
Earlier we supported 16 and 32 bit width for tick type which was
controlled using the config option configUSE_16_BIT_TICKS. The PR
tried to maintain backward compatibility by honoring
configUSE_16_BIT_TICKS. The backward compatibility did not work as
expected though, as the macro configTICK_TYPE_WIDTH_IN_BITS was used
before it was defined. This PR addresses it by ensuring that the macro
configTICK_TYPE_WIDTH_IN_BITS is defined before it is used.
Testing
1. configUSE_16_BIT_TICKS is defined to 0.
Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```
Assembly:
```
109e: 4b50 ldr r3, [pc, #320] ; (11e0 <xTaskIncrementTick+0x150>)
10a0: f8d3 4134 ldr.w r4, [r3, #308] ; 0x134
10a4: 3401 adds r4, #1
10a6: f8c3 4134 str.w r4, [r3, #308] ; 0x134
```
It is clear from assembly that the tick type is 32 bit.
2. configUSE_16_BIT_TICKS is defined to 1.
Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```
Assembly:
```
10e2: 4b53 ldr r3, [pc, #332] ; (1230 <xTaskIncrementTick+0x15c>)
10e4: f8b3 4134 ldrh.w r4, [r3, #308] ; 0x134
10e8: b2a4 uxth r4, r4
10ea: 3401 adds r4, #1
10ec: b2a4 uxth r4, r4
10ee: f8a3 4134 strh.w r4, [r3, #308] ; 0x134
```
It is clear from assembly that the tick type is 16 bit.
3. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_16_BITS.
Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```
Assembly:
```
10e2: 4b53 ldr r3, [pc, #332] ; (1230 <xTaskIncrementTick+0x15c>)
10e4: f8b3 4134 ldrh.w r4, [r3, #308] ; 0x134
10e8: b2a4 uxth r4, r4
10ea: 3401 adds r4, #1
10ec: b2a4 uxth r4, r4
10ee: f8a3 4134 strh.w r4, [r3, #308] ; 0x134
```
It is clear from assembly that the tick type is 16 bit.
4. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_32_BITS.
Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```
Assembly:
```
109e: 4b50 ldr r3, [pc, #320] ; (11e0 <xTaskIncrementTick+0x150>)
10a0: f8d3 4134 ldr.w r4, [r3, #308] ; 0x134
10a4: 3401 adds r4, #1
10a6: f8c3 4134 str.w r4, [r3, #308] ; 0x134
```
It is clear from assembly that the tick type is 32 bit.
5. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_64_BITS.
```
#error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
```
The testing was done for GCC/ARM_CM3 port which does not support 64 bit
tick type.
6. Neither configUSE_16_BIT_TICKS nor configTICK_TYPE_WIDTH_IN_BITS
defined.
```
#error Missing definition: One of configUSE_16_BIT_TICKS and
configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h.
See the Configuration section of the FreeRTOS API documentation for
details.
```
7. Both configUSE_16_BIT_TICKS and configTICK_TYPE_WIDTH_IN_BITS defined.
```
#error Only one of configUSE_16_BIT_TICKS and
configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h.
See the Configuration section of the FreeRTOS API documentation for
details.
```
Related issue - https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/628
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Feature/fixing clang gnu compiler warnings (#620)
* Adding in ability to support a library for freertos_config and a custom freertos_kernel_port (#558)
* Using single name definition for libraries everywhere. (#558)
* Supporting backwards compatibility with FREERTOS_CONFIG_FILE_DIRECTORY (#571)
* Removing compiler warnings for GNU and Clang. (#571)
* Added in documentation on how to consume from a main project. Added default PORT selection for native POSIX and MINGW platforms.
* Only adding freertos_config if it exists. Removing auto generation of it from a FREERTOS_CONFIG_FILE_DIRECTORY.
* Fixing clang and gnu compiler warnings.
* Adding in project information and how to compile for GNU/clang
* Fixing compiler issue with unused variable - no need to declare variable.
* Adding in compile warnings for linux builds that kernel is okay with using.
* Fixing more extra-semi-stmt clang warnings.
* Moving definition of hooks into header files if features are enabled.
* Fixing formatting with uncrustify.
* Fixing merge conflicts with main merge.
* Fixing compiler errors due to merge issues and formatting.
* Fixing Line feeds.
* Adding 'portNORETURN' into portmacros.h. Other Updates based on PR request
* Further clean-up of clang and clang-tidy issues.
* Removing compiler specific pragmas from common c files.
* Fixing missing lexicon entry and uncrustify formatting changes.
* Resolving merge issue multiple defnitions of proto for prvIdleTask
* Fixing formatting issues that are not covered by uncrustify. Use clang-tidy instead if you want this level of control.
* More uncrustify formatting issues.
* Fixing extra bracket in #if statement.
---------
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* POSIX port fixes (#626)
* Fix types in POSIX port
Use TaskFunction_t and StackType_t as other ports do.
* Fix portTICK_RATE_MICROSECONDS in POSIX port
---------
Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Cortex-M35P: Add Cortex-M35P port (#631)
* Cortex-M35P: Add Cortex-M35P port
The Cortex-M35P support added to kernel. The port hasn't been
validated yet with TF-M. Hence TF-M support is not included in this
port.
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
* Add portNORETURN to the newly added portmacro.h
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
* Introduced Github Status Badge for Unit Tests (#634)
* Introduced Github Status Badge for Unit Tests
* Github status badge to point to latest run
* Github status badge UT points to latest results
* Fixed URL for Github Status badge
---------
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
* Remove C99 requirement from CMake file (#633)
* Remove C99 requirement from CMake file
The kernel source is C89 compliant and does not need C99.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Explicitly set C89 requirement for kernel
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Add Thread Local Storage (TLS) support using Picolibc functions (#343)
* Pass top of stack to configINIT_TLS_BLOCK
Picolibc wants to allocate the per-task TLS block within the stack
segment, so it will need to modify the top of stack value. Pass the
pxTopOfStack variable to make this explicit.
Signed-off-by: Keith Packard <keithpac@amazon.com>
* Move newlib-specific definitions to separate file
This reduces the clutter in FreeRTOS.h caused by having newlib-specific
macros present there.
Signed-off-by: Keith Packard <keithpac@amazon.com>
* Make TLS code depend only on configUSE_C_RUNTIME_TLS_SUPPORT
Remove reference to configUSE_NEWLIB_REENTRANT as that only works
when using newlib. configUSE_C_RUNTIME_TLS_SUPPORT is always
set when configUSE_NEWLIB_REENTRANT is set, so using both was
redundant in that case.
Signed-off-by: Keith Packard <keithpac@amazon.com>
* portable-ARC: Adapt ARC support to use generalized TLS support
With generalized thread local storage (TLS) support present in the
core, the two ARC ports need to have the changes to the TCB mirrored
to them.
Signed-off-by: Keith Packard <keithpac@amazon.com>
* Add Thread Local Storage (TLS) support using Picolibc functions
This patch provides definitions of the general TLS support macros in
terms of the Picolibc TLS support functions.
Picolibc is normally configured to use TLS internally for all
variables that are intended to be task-local, so these changes are
necessary for picolibc to work correctly with FreeRTOS.
The picolibc helper functions rely on elements within the linker
script to arrange the TLS data in memory and define some symbols.
Applications wanting to use this mechanism will need changes in their
linker script when migrating to picolibc.
Signed-off-by: Keith Packard <keithpac@amazon.com>
---------
Signed-off-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Interrupt priority assert improvements for CM3/4/7 (#602)
* Interrupt priority assert improvements for CM3/4/7
In the ARM_CM3, ARM_CM4, and ARM_CM7 ports, change the assertion that
`configMAX_SYSCALL_INTERRUPT_PRIORITY` is nonzero to account for the
number of priority bits implemented by the hardware.
Change these ports to also use the lowest priority for PendSV and
SysTick, ignoring `configKERNEL_INTERRUPT_PRIORITY`.
* Remove not needed configKERNEL_INTERRUPT_PRIORITY define
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
* Introduced code coverage status badge (#635)
* Introduced code coverage status badge
* Trying to fix the URL checker issue
* Fix URL check
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* added portPOINTER_SIZE_TYPE and SIZE_MAX definition to PIC24/dsPIC port (#636)
* added portPOINTER_SIZE_TYPE definition to PIC24/dsPIC port
* Added SIZE_MAX definition to PIC24/dsPIC33
* Fix TLS and stack alignment when using picolibc (#637)
Both the TLS block and stack must be correctly aligned when using
picolibc. The architecture stack alignment is represented by the
portBYTE_ALIGNMENT_MASK and the TLS block alignment is provided by the
Picolibc _tls_align() inline function for Picolibc version 1.8 and
above. For older versions of Picolibc, we'll assume that the TLS block
requires the same alignment as the stack.
For downward growing stacks, this requires aligning the start of the
TLS block to the maximum of the stack alignment and the TLS
alignment. With this, both the TLS block and stack will now be
correctly aligned.
For upward growing stacks, the two areas must be aligned
independently; the TLS block is aligned from the start of the stack,
then the tls space is allocated, and then the stack is aligned above
that.
It's probably useful to know here that the linker ensures that
variables within the TLS block are assigned offsets that match their
alignment requirements. If the TLS block itself is correctly aligned,
then everything within will also be.
I have only tested the downward growing stack branch of this patch.
Signed-off-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Enable building the GCC Cortex-R5 port without an FPU (#586)
* Ensure configUSE_TASK_FPU_SUPPORT option is set correctly
If one does enable the FPU of the Cortex-R5 processor, then the GCC
compiler will define the macro __ARM_FP. This can be used to ensure,
that the configUSE_TASK_FPU_SUPPORT is set accordingly.
* Enable the implementation of vPortTaskUsesFPU only if configUSE_TASK_FPU_SUPPORT is set to 1
* Remove error case in pxPortInitialiseStack
The case of configUSE_TASK_FPU_SUPPORT is 0 is now handled
* Enable access to FPU registers only if FPU is enabled
* Make minor formating changes
* Format ARM Cortex-R5 port
* Address review comments from @ChristosZosi
* Minor code review suggestions
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
* Fix freertos_kernel cmake property, Posix Port (#640)
* Fix freertos_kernel cmake property, Posix Port
* Moves the `set_property()` call below the target definition in top level CMakeLists file
* Corrects billion value from `ULL` suffix (not C90 compliant) to `UL` suffix with cast to uint64_t
* Add blank line to CMakeLists.txt
* Add missing FreeRTOS+ defines
* Run kernel demos and unit tests for PR changes (#645)
* Run kernel demos and unit tests for PR changes
Kernel demos check builds multiple demos from FreeRTOS/FreeRTOS and
unit tests check runs unit tests in FreeRTOS/FreeRTOS. Both of these
checks currently use main branch of FreeRTOS-Kernel. This commits
updates these checks to use the changes in the PR.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Do not specify PR SHA explicitly as that is default
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Remove explicit PR SHA from kernel checks
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Add functions to get the buffers of statically created objects (#641)
Added various ...GetStaticBuffer() functions to get the buffers of statically
created objects.
---------
Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
* Cortex-M Assert when NVIC implements 8 PRIO bits (#639)
* Cortex-M Assert when NVIC implements 8 PRIO bits
* Fix CM3 ports
* Fix ARM_CM3_MPU
* Fix ARM CM3
* Fix ARM_CM4_MPU
* Fix ARM_CM4
* Fix GCC ARM_CM7
* Fix IAR ARM ports
* Uncrustify changes
* Fix MikroC_ARM_CM4F port
* Fix MikroC_ARM_CM4F port-(2)
* Fix RVDS ARM ports
* Revert changes for Tasking/ARM_CM4F port
* Revert changes for Tasking/ARM_CM4F port-(2)
* Update port.c
Fix GCC/ARM_CM4F port
* Update port.c
* update GCC\ARM_CM4F port
* update port.c
* Assert to check configMAX_SYSCALL_INTERRUPT_PRIORITY is set to higher priority
* Fix merge error: remove duplicate code
* Fix typos
---------
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal>
* Remove C90 requirement from CMakeLists (#649)
This is needed as it is breaking projects - https://forums.freertos.org/t/freertos-gcc-cmake/16984
We will re-evaluate and accordingly add this later.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Only add alignment padding when needed (#650)
Heap 4 and Heap 5 add some padding to ensure that the allocated blocks
are always aligned to portBYTE_ALIGNMENT bytes. The code until now was
adding padding always even if the resulting block was already aligned.
This commits updates the code to only add padding if the resulting block
is not aligned.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* add a missing comma (#651)
* fix conversion warning (#658)
FreeRTOS-Kernel/portable/GCC/ARM_CM4F/port.c:399:41: error: conversion from 'uint32_t' {aka 'long unsigned int'} to 'uint8_t' {aka 'unsigned char'} may change value [-Werror=conversion]
Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Keith Packard <keithpac@amazon.com>
Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com>
Co-authored-by: Archit Gupta <71798289+archigup@users.noreply.github.com>
Co-authored-by: tcpluess <tpluess@ieee.org>
Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Chris Copeland <chris@chrisnc.net>
Co-authored-by: David J. Fiddes <35607151+davefiddes@users.noreply.github.com>
Co-authored-by: Dusan Cervenka <cervenka@acrios.com>
Co-authored-by: bbain <16752579+bbain@users.noreply.github.com>
Co-authored-by: Ju1He1 <93189163+Ju1He1@users.noreply.github.com>
Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com>
Co-authored-by: phelter <paulheltera@gmail.com>
Co-authored-by: jacky309 <jacques.guillou@gmail.com>
Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com>
Co-authored-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com>
Co-authored-by: Keith Packard <keithp@keithp.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com>
Co-authored-by: Kody Stribrny <89810515+kstribrnAmzn@users.noreply.github.com>
Co-authored-by: Holden <holden-zenithaerotech.com>
Co-authored-by: Darian <32921628+Dazza0@users.noreply.github.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal>
Co-authored-by: Nicolas <nicolas.brunner@heig-vd.ch>
Co-authored-by: Vo Trung Chi <chi.votrung@vn.bosch.com>
* Smp dev merge main 20230410 (#74)
* Fix array-bounds compiler warning on gcc11+ in list.h (#580)
listGET_OWNER_OF_NEXT_ENTRY computes `( pxConstList )->pxIndex->pxNext` after
verifying that `( pxConstList )->pxIndex` points to `xListEnd`, which due to
being a MiniListItem_t, can be shorter than a ListItem_t. Thus,
`( pxConstList )->pxIndex` is a `ListItem_t *` that extends past the end of the
`List_t` whose `xListEnd` it points to. This is fixed by accessing `pxNext`
through a `MiniListItem_t` instead.
* move the prototype for vApplicationIdleHook to task.h. (#600)
Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Update equal priority task preemption (#603)
* vTaskResume and vTaskPrioritySet don't preempt equal priority task
* Update vTaskResumeAll not to preempt task with equal priority
* Fix in xTaskResumeFromISR
* Update FreeRTOS/FreeRTOS build checks (#613)
This is needed to be compatible with the refactoring done in this
PR - https://github.com/FreeRTOS/FreeRTOS/pull/889
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Add ulTaskGetRunTimeCounter and ulTaskGetRunTimePercent (#611)
Allow ulTaskGetIdleRunTimeCounter and ulTaskGetIdleRunTimePercent to be
used whenever configGENERATE_RUN_TIME_STATS is enabled, as this is the
only requirement for these functions to work.
* Fix some CMake documentation typos (#616)
The quick start instructions for CMake mention the "master"
git branch which has been replaced by "main" in the current
repo.
The main CMakeLists.txt documents how to integrate a
custom port. Fix a typo in the suggested CMake code.
* Added support of 64bit events. (#597)
* Added support of 64bit even
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Added missing brackets
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Made proper name for tick macro.
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Improved macro evaluation
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Fixed missed port files + documentation
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Changes made on PR
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Fix macro definition.
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Formatted code with uncrustify
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
---------
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Introduce portMEMORY_BARRIER for Microblaze port. (#621)
The introduction of `portMEMORY_BARRIER` will ensure
the places in the kernel use a barrier will work.
For example, `xTaskResumeAll` has a memory barrier
to ensure its correctness when compiled with optimization
enabled. Without the barrier `xTaskResumeAll` can fail
(e.g. start reading and writing to address 0 and/or
infinite looping) when `xPendingReadyList` contains more
than one task to restore.
In `xTaskResumeAll` the compiler chooses to cache the
`pxTCB` the first time through the loop for use
in every subsequent loop. This is incorrect as the
removal of `pxTCB->xEventListItem` will actually
change the value of `pxTCB` if it was read again
at the top of the loop. The barrier forces the compiler
to read `pxTCB` again at the top of the loop.
The compiler is operating correctly. The removal
`pxTCB->xEventListItem` executes on a `List_t *`
and `ListItem_t *`. This means that the compiler
can assume that any `MiniListItem_t` values are
unchanged by the loop (i.e. "strict-aliasing").
This allows the compiler to cache `pxTCB` as it
is obtained via a `MiniListItem_t`. This is incorrect
in this case because it is possible for a `ListItem_t *`
to actually alias a `MiniListItem_t`. This is technically
a "violation of aliasing rules" so we use the the barrier
to disable the strict-aliasing optimization in this loop.
* Do not call exit() on MSVC Port when calling vPortEndScheduler (#624)
* make port exitable
* correctly set xPortRunning to False
* add suggestions from Review
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* add suggestions from Review
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
---------
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Update PR template to include checkbox for Unit Test related changes (#627)
* Fix build failure introduced in PR #597 (#629)
The PR #597 introduced a new config option configTICK_TYPE_WIDTH_IN_BITS
which can be defined to one of the following:
* TICK_TYPE_WIDTH_16_BITS - Tick type is 16 bit wide.
* TICK_TYPE_WIDTH_32_BITS - Tick type is 32 bit wide.
* TICK_TYPE_WIDTH_64_BITS - Tick type is 64 bit wide.
Earlier we supported 16 and 32 bit width for tick type which was
controlled using the config option configUSE_16_BIT_TICKS. The PR
tried to maintain backward compatibility by honoring
configUSE_16_BIT_TICKS. The backward compatibility did not work as
expected though, as the macro configTICK_TYPE_WIDTH_IN_BITS was used
before it was defined. This PR addresses it by ensuring that the macro
configTICK_TYPE_WIDTH_IN_BITS is defined before it is used.
Testing
1. configUSE_16_BIT_TICKS is defined to 0.
Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```
Assembly:
```
109e: 4b50 ldr r3, [pc, #320] ; (11e0 <xTaskIncrementTick+0x150>)
10a0: f8d3 4134 ldr.w r4, [r3, #308] ; 0x134
10a4: 3401 adds r4, #1
10a6: f8c3 4134 str.w r4, [r3, #308] ; 0x134
```
It is clear from assembly that the tick type is 32 bit.
2. configUSE_16_BIT_TICKS is defined to 1.
Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```
Assembly:
```
10e2: 4b53 ldr r3, [pc, #332] ; (1230 <xTaskIncrementTick+0x15c>)
10e4: f8b3 4134 ldrh.w r4, [r3, #308] ; 0x134
10e8: b2a4 uxth r4, r4
10ea: 3401 adds r4, #1
10ec: b2a4 uxth r4, r4
10ee: f8a3 4134 strh.w r4, [r3, #308] ; 0x134
```
It is clear from assembly that the tick type is 16 bit.
3. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_16_BITS.
Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```
Assembly:
```
10e2: 4b53 ldr r3, [pc, #332] ; (1230 <xTaskIncrementTick+0x15c>)
10e4: f8b3 4134 ldrh.w r4, [r3, #308] ; 0x134
10e8: b2a4 uxth r4, r4
10ea: 3401 adds r4, #1
10ec: b2a4 uxth r4, r4
10ee: f8a3 4134 strh.w r4, [r3, #308] ; 0x134
```
It is clear from assembly that the tick type is 16 bit.
4. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_32_BITS.
Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```
Assembly:
```
109e: 4b50 ldr r3, [pc, #320] ; (11e0 <xTaskIncrementTick+0x150>)
10a0: f8d3 4134 ldr.w r4, [r3, #308] ; 0x134
10a4: 3401 adds r4, #1
10a6: f8c3 4134 str.w r4, [r3, #308] ; 0x134
```
It is clear from assembly that the tick type is 32 bit.
5. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_64_BITS.
```
#error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
```
The testing was done for GCC/ARM_CM3 port which does not support 64 bit
tick type.
6. Neither configUSE_16_BIT_TICKS nor configTICK_TYPE_WIDTH_IN_BITS
defined.
```
#error Missing definition: One of configUSE_16_BIT_TICKS and
configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h.
See the Configuration section of the FreeRTOS API documentation for
details.
```
7. Both configUSE_16_BIT_TICKS and configTICK_TYPE_WIDTH_IN_BITS defined.
```
#error Only one of configUSE_16_BIT_TICKS and
configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h.
See the Configuration section of the FreeRTOS API documentation for
details.
```
Related issue - https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/628
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Feature/fixing clang gnu compiler warnings (#620)
* Adding in ability to support a library for freertos_config and a custom freertos_kernel_port (#558)
* Using single name definition for libraries everywhere. (#558)
* Supporting backwards compatibility with FREERTOS_CONFIG_FILE_DIRECTORY (#571)
* Removing compiler warnings for GNU and Clang. (#571)
* Added in documentation on how to consume from a main project. Added default PORT selection for native POSIX and MINGW platforms.
* Only adding freertos_config if it exists. Removing auto generation of it from a FREERTOS_CONFIG_FILE_DIRECTORY.
* Fixing clang and gnu compiler warnings.
* Adding in project information and how to compile for GNU/clang
* Fixing compiler issue with unused variable - no need to declare variable.
* Adding in compile warnings for linux builds that kernel is okay with using.
* Fixing more extra-semi-stmt clang warnings.
* Moving definition of hooks into header files if features are enabled.
* Fixing formatting with uncrustify.
* Fixing merge conflicts with main merge.
* Fixing compiler errors due to merge issues and formatting.
* Fixing Line feeds.
* Adding 'portNORETURN' into portmacros.h. Other Updates based on PR request
* Further clean-up of clang and clang-tidy issues.
* Removing compiler specific pragmas from common c files.
* Fixing missing lexicon entry and uncrustify formatting changes.
* Resolving merge issue multiple defnitions of proto for prvIdleTask
* Fixing formatting issues that are not covered by uncrustify. Use clang-tidy instead if you want this level of control.
* More uncrustify formatting issues.
* Fixing extra bracket in #if statement.
---------
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* POSIX port fixes (#626)
* Fix types in POSIX port
Use TaskFunction_t and StackType_t as other ports do.
* Fix portTICK_RATE_MICROSECONDS in POSIX port
---------
Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Cortex-M35P: Add Cortex-M35P port (#631)
* Cortex-M35P: Add Cortex-M35P port
The Cortex-M35P support added to kernel. The port hasn't been
validated yet with TF-M. Hence TF-M support is not included in this
port.
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
* Add portNORETURN to the newly added portmacro.h
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
* Introduced Github Status Badge for Unit Tests (#634)
* Introduced Github Status Badge for Unit Tests
* Github status badge to point to latest run
* Github status badge UT points to latest results
* Fixed URL for Github Status badge
---------
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
* Remove C99 requirement from CMake file (#633)
* Remove C99 requirement from CMake file
The kernel source is C89 compliant and does not need C99.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Explicitly set C89 requirement for kernel
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Add Thread Local Storage (TLS) support using Picolibc functions (#343)
* Pass top of stack to configINIT_TLS_BLOCK
Picolibc wants to allocate the per-task TLS block within the stack
segment, so it will need to modify the top of stack value. Pass the
pxTopOfStack variable to make this explicit.
Signed-off-by: Keith Packard <keithpac@amazon.com>
* Move newlib-specific definitions to separate file
This reduces the clutter in FreeRTOS.h caused by having newlib-specific
macros present there.
Signed-off-by: Keith Packard <keithpac@amazon.com>
* Make TLS code depend only on configUSE_C_RUNTIME_TLS_SUPPORT
Remove reference to configUSE_NEWLIB_REENTRANT as that only works
when using newlib. configUSE_C_RUNTIME_TLS_SUPPORT is always
set when configUSE_NEWLIB_REENTRANT is set, so using both was
redundant in that case.
Signed-off-by: Keith Packard <keithpac@amazon.com>
* portable-ARC: Adapt ARC support to use generalized TLS support
With generalized thread local storage (TLS) support present in the
core, the two ARC ports need to have the changes to the TCB mirrored
to them.
Signed-off-by: Keith Packard <keithpac@amazon.com>
* Add Thread Local Storage (TLS) support using Picolibc functions
This patch provides definitions of the general TLS support macros in
terms of the Picolibc TLS support functions.
Picolibc is normally configured to use TLS internally for all
variables that are intended to be task-local, so these changes are
necessary for picolibc to work correctly with FreeRTOS.
The picolibc helper functions rely on elements within the linker
script to arrange the TLS data in memory and define some symbols.
Applications wanting to use this mechanism will need changes in their
linker script when migrating to picolibc.
Signed-off-by: Keith Packard <keithpac@amazon.com>
---------
Signed-off-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Interrupt priority assert improvements for CM3/4/7 (#602)
* Interrupt priority assert improvements for CM3/4/7
In the ARM_CM3, ARM_CM4, and ARM_CM7 ports, change the assertion that
`configMAX_SYSCALL_INTERRUPT_PRIORITY` is nonzero to account for the
number of priority bits implemented by the hardware.
Change these ports to also use the lowest priority for PendSV and
SysTick, ignoring `configKERNEL_INTERRUPT_PRIORITY`.
* Remove not needed configKERNEL_INTERRUPT_PRIORITY define
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
* Introduced code coverage status badge (#635)
* Introduced code coverage status badge
* Trying to fix the URL checker issue
* Fix URL check
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* added portPOINTER_SIZE_TYPE and SIZE_MAX definition to PIC24/dsPIC port (#636)
* added portPOINTER_SIZE_TYPE definition to PIC24/dsPIC port
* Added SIZE_MAX definition to PIC24/dsPIC33
* Fix TLS and stack alignment when using picolibc (#637)
Both the TLS block and stack must be correctly aligned when using
picolibc. The architecture stack alignment is represented by the
portBYTE_ALIGNMENT_MASK and the TLS block alignment is provided by the
Picolibc _tls_align() inline function for Picolibc version 1.8 and
above. For older versions of Picolibc, we'll assume that the TLS block
requires the same alignment as the stack.
For downward growing stacks, this requires aligning the start of the
TLS block to the maximum of the stack alignment and the TLS
alignment. With this, both the TLS block and stack will now be
correctly aligned.
For upward growing stacks, the two areas must be aligned
independently; the TLS block is aligned from the start of the stack,
then the tls space is allocated, and then the stack is aligned above
that.
It's probably useful to know here that the linker ensures that
variables within the TLS block are assigned offsets that match their
alignment requirements. If the TLS block itself is correctly aligned,
then everything within will also be.
I have only tested the downward growing stack branch of this patch.
Signed-off-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Enable building the GCC Cortex-R5 port without an FPU (#586)
* Ensure configUSE_TASK_FPU_SUPPORT option is set correctly
If one does enable the FPU of the Cortex-R5 processor, then the GCC
compiler will define the macro __ARM_FP. This can be used to ensure,
that the configUSE_TASK_FPU_SUPPORT is set accordingly.
* Enable the implementation of vPortTaskUsesFPU only if configUSE_TASK_FPU_SUPPORT is set to 1
* Remove error case in pxPortInitialiseStack
The case of configUSE_TASK_FPU_SUPPORT is 0 is now handled
* Enable access to FPU registers only if FPU is enabled
* Make minor formating changes
* Format ARM Cortex-R5 port
* Address review comments from @ChristosZosi
* Minor code review suggestions
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
* Fix freertos_kernel cmake property, Posix Port (#640)
* Fix freertos_kernel cmake property, Posix Port
* Moves the `set_property()` call below the target definition in top level CMakeLists file
* Corrects billion value from `ULL` suffix (not C90 compliant) to `UL` suffix with cast to uint64_t
* Add blank line to CMakeLists.txt
* Add missing FreeRTOS+ defines
* Run kernel demos and unit tests for PR changes (#645)
* Run kernel demos and unit tests for PR changes
Kernel demos check builds multiple demos from FreeRTOS/FreeRTOS and
unit tests check runs unit tests in FreeRTOS/FreeRTOS. Both of these
checks currently use main branch of FreeRTOS-Kernel. This commits
updates these checks to use the changes in the PR.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Do not specify PR SHA explicitly as that is default
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Remove explicit PR SHA from kernel checks
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Add functions to get the buffers of statically created objects (#641)
Added various ...GetStaticBuffer() functions to get the buffers of statically
created objects.
---------
Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
* Cortex-M Assert when NVIC implements 8 PRIO bits (#639)
* Cortex-M Assert when NVIC implements 8 PRIO bits
* Fix CM3 ports
* Fix ARM_CM3_MPU
* Fix ARM CM3
* Fix ARM_CM4_MPU
* Fix ARM_CM4
* Fix GCC ARM_CM7
* Fix IAR ARM ports
* Uncrustify changes
* Fix MikroC_ARM_CM4F port
* Fix MikroC_ARM_CM4F port-(2)
* Fix RVDS ARM ports
* Revert changes for Tasking/ARM_CM4F port
* Revert changes for Tasking/ARM_CM4F port-(2)
* Update port.c
Fix GCC/ARM_CM4F port
* Update port.c
* update GCC\ARM_CM4F port
* update port.c
* Assert to check configMAX_SYSCALL_INTERRUPT_PRIORITY is set to higher priority
* Fix merge error: remove duplicate code
* Fix typos
---------
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal>
* Remove C90 requirement from CMakeLists (#649)
This is needed as it is breaking projects - https://forums.freertos.org/t/freertos-gcc-cmake/16984
We will re-evaluate and accordingly add this later.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Only add alignment padding when needed (#650)
Heap 4 and Heap 5 add some padding to ensure that the allocated blocks
are always aligned to portBYTE_ALIGNMENT bytes. The code until now was
adding padding always even if the resulting block was already aligned.
This commits updates the code to only add padding if the resulting block
is not aligned.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* add a missing comma (#651)
* fix conversion warning (#658)
FreeRTOS-Kernel/portable/GCC/ARM_CM4F/port.c:399:41: error: conversion from 'uint32_t' {aka 'long unsigned int'} to 'uint8_t' {aka 'unsigned char'} may change value [-Werror=conversion]
Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Keith Packard <keithpac@amazon.com>
Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com>
Co-authored-by: Archit Gupta <71798289+archigup@users.noreply.github.com>
Co-authored-by: tcpluess <tpluess@ieee.org>
Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Chris Copeland <chris@chrisnc.net>
Co-authored-by: David J. Fiddes <35607151+davefiddes@users.noreply.github.com>
Co-authored-by: Dusan Cervenka <cervenka@acrios.com>
Co-authored-by: bbain <16752579+bbain@users.noreply.github.com>
Co-authored-by: Ju1He1 <93189163+Ju1He1@users.noreply.github.com>
Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com>
Co-authored-by: phelter <paulheltera@gmail.com>
Co-authored-by: jacky309 <jacques.guillou@gmail.com>
Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com>
Co-authored-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com>
Co-authored-by: Keith Packard <keithp@keithp.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com>
Co-authored-by: Kody Stribrny <89810515+kstribrnAmzn@users.noreply.github.com>
Co-authored-by: Holden <holden-zenithaerotech.com>
Co-authored-by: Darian <32921628+Dazza0@users.noreply.github.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal>
Co-authored-by: Nicolas <nicolas.brunner@heig-vd.ch>
Co-authored-by: Vo Trung Chi <chi.votrung@vn.bosch.com>
* Not yield for running task in prvYieldForTask (#72)
* Raise priority of a running task should not alter other cores
* Remove unreachable code in prvSelectHighestPriorityTask (#70)
* Remove unreachable code in prvSelectHighestPriorityTask
* Remove unreachable assert condition
* Update comment
* Move static idle task memory to global scope (#75)
* Update XMOS AICORE conflict (#77)
* Define portBASE_TYPE in XMOS AICORE porting
* Update enter critical from ISR API
* Fix run time stats for SMP (#76)
* Update get idle tasks stats
* Fix get task stats
* Fix missing configNUM_CORES
* Update the uxSchedulerSuspended after prvCheckForRunStateChange (#62)
* Update the uxSchedulerSuspended after the prvCheckForRunStateChange to
prevent race condition in fromISR APIs
* Fix SMP dev branch CI errors (#79)
* Fix uncrustify
* Update lexicon
* Remove tailing space
* Ignore XMOS AICORE header check
* Fix ulTotalRunTime and ulTaskSwitchedInTime (#80)
* SMP has multiple ulTotalRunTime and ulTaskSwitchedInTime
* Smp dev compelete merge main 20230424 (#78)
* Fix array-bounds compiler warning on gcc11+ in list.h (#580)
listGET_OWNER_OF_NEXT_ENTRY computes `( pxConstList )->pxIndex->pxNext` after
verifying that `( pxConstList )->pxIndex` points to `xListEnd`, which due to
being a MiniListItem_t, can be shorter than a ListItem_t. Thus,
`( pxConstList )->pxIndex` is a `ListItem_t *` that extends past the end of the
`List_t` whose `xListEnd` it points to. This is fixed by accessing `pxNext`
through a `MiniListItem_t` instead.
* move the prototype for vApplicationIdleHook to task.h. (#600)
Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Update equal priority task preemption (#603)
* vTaskResume and vTaskPrioritySet don't preempt equal priority task
* Update vTaskResumeAll not to preempt task with equal priority
* Fix in xTaskResumeFromISR
* Update FreeRTOS/FreeRTOS build checks (#613)
This is needed to be compatible with the refactoring done in this
PR - https://github.com/FreeRTOS/FreeRTOS/pull/889
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Add ulTaskGetRunTimeCounter and ulTaskGetRunTimePercent (#611)
Allow ulTaskGetIdleRunTimeCounter and ulTaskGetIdleRunTimePercent to be
used whenever configGENERATE_RUN_TIME_STATS is enabled, as this is the
only requirement for these functions to work.
* Fix some CMake documentation typos (#616)
The quick start instructions for CMake mention the "master"
git branch which has been replaced by "main" in the current
repo.
The main CMakeLists.txt documents how to integrate a
custom port. Fix a typo in the suggested CMake code.
* Added support of 64bit events. (#597)
* Added support of 64bit even
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Added missing brackets
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Made proper name for tick macro.
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Improved macro evaluation
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Fixed missed port files + documentation
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Changes made on PR
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Fix macro definition.
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Formatted code with uncrustify
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
---------
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Introduce portMEMORY_BARRIER for Microblaze port. (#621)
The introduction of `portMEMORY_BARRIER` will ensure
the places in the kernel use a barrier will work.
For example, `xTaskResumeAll` has a memory barrier
to ensure its correctness when compiled with optimization
enabled. Without the barrier `xTaskResumeAll` can fail
(e.g. start reading and writing to address 0 and/or
infinite looping) when `xPendingReadyList` contains more
than one task to restore.
In `xTaskResumeAll` the compiler chooses to cache the
`pxTCB` the first time through the loop for use
in every subsequent loop. This is incorrect as the
removal of `pxTCB->xEventListItem` will actually
change the value of `pxTCB` if it was read again
at the top of the loop. The barrier forces the compiler
to read `pxTCB` again at the top of the loop.
The compiler is operating correctly. The removal
`pxTCB->xEventListItem` executes on a `List_t *`
and `ListItem_t *`. This means that the compiler
can assume that any `MiniListItem_t` values are
unchanged by the loop (i.e. "strict-aliasing").
This allows the compiler to cache `pxTCB` as it
is obtained via a `MiniListItem_t`. This is incorrect
in this case because it is possible for a `ListItem_t *`
to actually alias a `MiniListItem_t`. This is technically
a "violation of aliasing rules" so we use the the barrier
to disable the strict-aliasing optimization in this loop.
* Do not call exit() on MSVC Port when calling vPortEndScheduler (#624)
* make port exitable
* correctly set xPortRunning to False
* add suggestions from Review
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* add suggestions from Review
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
---------
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Update PR template to include checkbox for Unit Test related changes (#627)
* Fix build failure introduced in PR #597 (#629)
The PR #597 introduced a new config option configTICK_TYPE_WIDTH_IN_BITS
which can be defined to one of the following:
* TICK_TYPE_WIDTH_16_BITS - Tick type is 16 bit wide.
* TICK_TYPE_WIDTH_32_BITS - Tick type is 32 bit wide.
* TICK_TYPE_WIDTH_64_BITS - Tick type is 64 bit wide.
Earlier we supported 16 and 32 bit width for tick type which was
controlled using the config option configUSE_16_BIT_TICKS. The PR
tried to maintain backward compatibility by honoring
configUSE_16_BIT_TICKS. The backward compatibility did not work as
expected though, as the macro configTICK_TYPE_WIDTH_IN_BITS was used
before it was defined. This PR addresses it by ensuring that the macro
configTICK_TYPE_WIDTH_IN_BITS is defined before it is used.
Testing
1. configUSE_16_BIT_TICKS is defined to 0.
Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```
Assembly:
```
109e: 4b50 ldr r3, [pc, #320] ; (11e0 <xTaskIncrementTick+0x150>)
10a0: f8d3 4134 ldr.w r4, [r3, #308] ; 0x134
10a4: 3401 adds r4, #1
10a6: f8c3 4134 str.w r4, [r3, #308] ; 0x134
```
It is clear from assembly that the tick type is 32 bit.
2. configUSE_16_BIT_TICKS is defined to 1.
Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```
Assembly:
```
10e2: 4b53 ldr r3, [pc, #332] ; (1230 <xTaskIncrementTick+0x15c>)
10e4: f8b3 4134 ldrh.w r4, [r3, #308] ; 0x134
10e8: b2a4 uxth r4, r4
10ea: 3401 adds r4, #1
10ec: b2a4 uxth r4, r4
10ee: f8a3 4134 strh.w r4, [r3, #308] ; 0x134
```
It is clear from assembly that the tick type is 16 bit.
3. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_16_BITS.
Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```
Assembly:
```
10e2: 4b53 ldr r3, [pc, #332] ; (1230 <xTaskIncrementTick+0x15c>)
10e4: f8b3 4134 ldrh.w r4, [r3, #308] ; 0x134
10e8: b2a4 uxth r4, r4
10ea: 3401 adds r4, #1
10ec: b2a4 uxth r4, r4
10ee: f8a3 4134 strh.w r4, [r3, #308] ; 0x134
```
It is clear from assembly that the tick type is 16 bit.
4. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_32_BITS.
Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```
Assembly:
```
109e: 4b50 ldr r3, [pc, #320] ; (11e0 <xTaskIncrementTick+0x150>)
10a0: f8d3 4134 ldr.w r4, [r3, #308] ; 0x134
10a4: 3401 adds r4, #1
10a6: f8c3 4134 str.w r4, [r3, #308] ; 0x134
```
It is clear from assembly that the tick type is 32 bit.
5. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_64_BITS.
```
#error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
```
The testing was done for GCC/ARM_CM3 port which does not support 64 bit
tick type.
6. Neither configUSE_16_BIT_TICKS nor configTICK_TYPE_WIDTH_IN_BITS
defined.
```
#error Missing definition: One of configUSE_16_BIT_TICKS and
configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h.
See the Configuration section of the FreeRTOS API documentation for
details.
```
7. Both configUSE_16_BIT_TICKS and configTICK_TYPE_WIDTH_IN_BITS defined.
```
#error Only one of configUSE_16_BIT_TICKS and
configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h.
See the Configuration section of the FreeRTOS API documentation for
details.
```
Related issue - https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/628
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Feature/fixing clang gnu compiler warnings (#620)
* Adding in ability to support a library for freertos_config and a custom freertos_kernel_port (#558)
* Using single name definition for libraries everywhere. (#558)
* Supporting backwards compatibility with FREERTOS_CONFIG_FILE_DIRECTORY (#571)
* Removing compiler warnings for GNU and Clang. (#571)
* Added in documentation on how to consume from a main project. Added default PORT selection for native POSIX and MINGW platforms.
* Only adding freertos_config if it exists. Removing auto generation of it from a FREERTOS_CONFIG_FILE_DIRECTORY.
* Fixing clang and gnu compiler warnings.
* Adding in project information and how to compile for GNU/clang
* Fixing compiler issue with unused variable - no need to declare variable.
* Adding in compile warnings for linux builds that kernel is okay with using.
* Fixing more extra-semi-stmt clang warnings.
* Moving definition of hooks into header files if features are enabled.
* Fixing formatting with uncrustify.
* Fixing merge conflicts with main merge.
* Fixing compiler errors due to merge issues and formatting.
* Fixing Line feeds.
* Adding 'portNORETURN' into portmacros.h. Other Updates based on PR request
* Further clean-up of clang and clang-tidy issues.
* Removing compiler specific pragmas from common c files.
* Fixing missing lexicon entry and uncrustify formatting changes.
* Resolving merge issue multiple defnitions of proto for prvIdleTask
* Fixing formatting issues that are not covered by uncrustify. Use clang-tidy instead if you want this level of control.
* More uncrustify formatting issues.
* Fixing extra bracket in #if statement.
---------
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* POSIX port fixes (#626)
* Fix types in POSIX port
Use TaskFunction_t and StackType_t as other ports do.
* Fix portTICK_RATE_MICROSECONDS in POSIX port
---------
Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Cortex-M35P: Add Cortex-M35P port (#631)
* Cortex-M35P: Add Cortex-M35P port
The Cortex-M35P support added to kernel. The port hasn't been
validated yet with TF-M. Hence TF-M support is not included in this
port.
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
* Add portNORETURN to the newly added portmacro.h
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
* Introduced Github Status Badge for Unit Tests (#634)
* Introduced Github Status Badge for Unit Tests
* Github status badge to point to latest run
* Github status badge UT points to latest results
* Fixed URL for Github Status badge
---------
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
* Remove C99 requirement from CMake file (#633)
* Remove C99 requirement from CMake file
The kernel source is C89 compliant and does not need C99.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Explicitly set C89 requirement for kernel
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Add Thread Local Storage (TLS) support using Picolibc functions (#343)
* Pass top of stack to configINIT_TLS_BLOCK
Picolibc wants to allocate the per-task TLS block within the stack
segment, so it will need to modify the top of stack value. Pass the
pxTopOfStack variable to make this explicit.
Signed-off-by: Keith Packard <keithpac@amazon.com>
* Move newlib-specific definitions to separate file
This reduces the clutter in FreeRTOS.h caused by having newlib-specific
macros present there.
Signed-off-by: Keith Packard <keithpac@amazon.com>
* Make TLS code depend only on configUSE_C_RUNTIME_TLS_SUPPORT
Remove reference to configUSE_NEWLIB_REENTRANT as that only works
when using newlib. configUSE_C_RUNTIME_TLS_SUPPORT is always
set when configUSE_NEWLIB_REENTRANT is set, so using both was
redundant in that case.
Signed-off-by: Keith Packard <keithpac@amazon.com>
* portable-ARC: Adapt ARC support to use generalized TLS support
With generalized thread local storage (TLS) support present in the
core, the two ARC ports need to have the changes to the TCB mirrored
to them.
Signed-off-by: Keith Packard <keithpac@amazon.com>
* Add Thread Local Storage (TLS) support using Picolibc functions
This patch provides definitions of the general TLS support macros in
terms of the Picolibc TLS support functions.
Picolibc is normally configured to use TLS internally for all
variables that are intended to be task-local, so these changes are
necessary for picolibc to work correctly with FreeRTOS.
The picolibc helper functions rely on elements within the linker
script to arrange the TLS data in memory and define some symbols.
Applications wanting to use this mechanism will need changes in their
linker script when migrating to picolibc.
Signed-off-by: Keith Packard <keithpac@amazon.com>
---------
Signed-off-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Interrupt priority assert improvements for CM3/4/7 (#602)
* Interrupt priority assert improvements for CM3/4/7
In the ARM_CM3, ARM_CM4, and ARM_CM7 ports, change the assertion that
`configMAX_SYSCALL_INTERRUPT_PRIORITY` is nonzero to account for the
number of priority bits implemented by the hardware.
Change these ports to also use the lowest priority for PendSV and
SysTick, ignoring `configKERNEL_INTERRUPT_PRIORITY`.
* Remove not needed configKERNEL_INTERRUPT_PRIORITY define
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
* Introduced code coverage status badge (#635)
* Introduced code coverage status badge
* Trying to fix the URL checker issue
* Fix URL check
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* added portPOINTER_SIZE_TYPE and SIZE_MAX definition to PIC24/dsPIC port (#636)
* added portPOINTER_SIZE_TYPE definition to PIC24/dsPIC port
* Added SIZE_MAX definition to PIC24/dsPIC33
* Fix TLS and stack alignment when using picolibc (#637)
Both the TLS block and stack must be correctly aligned when using
picolibc. The architecture stack alignment is represented by the
portBYTE_ALIGNMENT_MASK and the TLS block alignment is provided by the
Picolibc _tls_align() inline function for Picolibc version 1.8 and
above. For older versions of Picolibc, we'll assume that the TLS block
requires the same alignment as the stack.
For downward growing stacks, this requires aligning the start of the
TLS block to the maximum of the stack alignment and the TLS
alignment. With this, both the TLS block and stack will now be
correctly aligned.
For upward growing stacks, the two areas must be aligned
independently; the TLS block is aligned from the start of the stack,
then the tls space is allocated, and then the stack is aligned above
that.
It's probably useful to know here that the linker ensures that
variables within the TLS block are assigned offsets that match their
alignment requirements. If the TLS block itself is correctly aligned,
then everything within will also be.
I have only tested the downward growing stack branch of this patch.
Signed-off-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Enable building the GCC Cortex-R5 port without an FPU (#586)
* Ensure configUSE_TASK_FPU_SUPPORT option is set correctly
If one does enable the FPU of the Cortex-R5 processor, then the GCC
compiler will define the macro __ARM_FP. This can be used to ensure,
that the configUSE_TASK_FPU_SUPPORT is set accordingly.
* Enable the implementation of vPortTaskUsesFPU only if configUSE_TASK_FPU_SUPPORT is set to 1
* Remove error case in pxPortInitialiseStack
The case of configUSE_TASK_FPU_SUPPORT is 0 is now handled
* Enable access to FPU registers only if FPU is enabled
* Make minor formating changes
* Format ARM Cortex-R5 port
* Address review comments from @ChristosZosi
* Minor code review suggestions
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
* Fix freertos_kernel cmake property, Posix Port (#640)
* Fix freertos_kernel cmake property, Posix Port
* Moves the `set_property()` call below the target definition in top level CMakeLists file
* Corrects billion value from `ULL` suffix (not C90 compliant) to `UL` suffix with cast to uint64_t
* Add blank line to CMakeLists.txt
* Add missing FreeRTOS+ defines
* Run kernel demos and unit tests for PR changes (#645)
* Run kernel demos and unit tests for PR changes
Kernel demos check builds multiple demos from FreeRTOS/FreeRTOS and
unit tests check runs unit tests in FreeRTOS/FreeRTOS. Both of these
checks currently use main branch of FreeRTOS-Kernel. This commits
updates these checks to use the changes in the PR.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Do not specify PR SHA explicitly as that is default
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Remove explicit PR SHA from kernel checks
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Add functions to get the buffers of statically created objects (#641)
Added various ...GetStaticBuffer() functions to get the buffers of statically
created objects.
---------
Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
* Cortex-M Assert when NVIC implements 8 PRIO bits (#639)
* Cortex-M Assert when NVIC implements 8 PRIO bits
* Fix CM3 ports
* Fix ARM_CM3_MPU
* Fix ARM CM3
* Fix ARM_CM4_MPU
* Fix ARM_CM4
* Fix GCC ARM_CM7
* Fix IAR ARM ports
* Uncrustify changes
* Fix MikroC_ARM_CM4F port
* Fix MikroC_ARM_CM4F port-(2)
* Fix RVDS ARM ports
* Revert changes for Tasking/ARM_CM4F port
* Revert changes for Tasking/ARM_CM4F port-(2)
* Update port.c
Fix GCC/ARM_CM4F port
* Update port.c
* update GCC\ARM_CM4F port
* update port.c
* Assert to check configMAX_SYSCALL_INTERRUPT_PRIORITY is set to higher priority
* Fix merge error: remove duplicate code
* Fix typos
---------
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal>
* Remove C90 requirement from CMakeLists (#649)
This is needed as it is breaking projects - https://forums.freertos.org/t/freertos-gcc-cmake/16984
We will re-evaluate and accordingly add this later.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Only add alignment padding when needed (#650)
Heap 4 and Heap 5 add some padding to ensure that the allocated blocks
are always aligned to portBYTE_ALIGNMENT bytes. The code until now was
adding padding always even if the resulting block was already aligned.
This commits updates the code to only add padding if the resulting block
is not aligned.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* add a missing comma (#651)
* fix conversion warning (#658)
FreeRTOS-Kernel/portable/GCC/ARM_CM4F/port.c:399:41: error: conversion from 'uint32_t' {aka 'long unsigned int'} to 'uint8_t' {aka 'unsigned char'} may change value [-Werror=conversion]
Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com>
* ARMv7M: Adjust implemented priority bit assertions (#665)
Adjust assertions related to the CMSIS __NVIC_PRIO_BITS and FreeRTOS
configPRIO_BITS configuration macros such that these macros specify the
minimum number of implemented priority bits supported by a config
build rather than the exact number of implemented priority bits.
Related to Qemu issue #1122
* Format portmacro.h in arm CM0 ports
* portable/ARM_CM0: Add xPortIsInsideInterrupt
Add missing xPortIsInsideInterrupt function to Cortex-M0 port.
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Keith Packard <keithpac@amazon.com>
Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com>
Co-authored-by: Archit Gupta <71798289+archigup@users.noreply.github.com>
Co-authored-by: tcpluess <tpluess@ieee.org>
Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Chris Copeland <chris@chrisnc.net>
Co-authored-by: David J. Fiddes <35607151+davefiddes@users.noreply.github.com>
Co-authored-by: Dusan Cervenka <cervenka@acrios.com>
Co-authored-by: bbain <16752579+bbain@users.noreply.github.com>
Co-authored-by: Ju1He1 <93189163+Ju1He1@users.noreply.github.com>
Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com>
Co-authored-by: phelter <paulheltera@gmail.com>
Co-authored-by: jacky309 <jacques.guillou@gmail.com>
Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com>
Co-authored-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com>
Co-authored-by: Keith Packard <keithp@keithp.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com>
Co-authored-by: Kody Stribrny <89810515+kstribrnAmzn@users.noreply.github.com>
Co-authored-by: Holden <holden-zenithaerotech.com>
Co-authored-by: Darian <32921628+Dazza0@users.noreply.github.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal>
Co-authored-by: Nicolas <nicolas.brunner@heig-vd.ch>
Co-authored-by: Vo Trung Chi <chi.votrung@vn.bosch.com>
* Update coverity violation for SMP (#81)
* Update coverity violation for SMP ( code surrounded by configNUMBER_OF_CORES > 1 ).
* Single core and common code are still scanned by lint tool.
* Smp dev merge main 0527 (#82)
* Fix array-bounds compiler warning on gcc11+ in list.h (#580)
listGET_OWNER_OF_NEXT_ENTRY computes `( pxConstList )->pxIndex->pxNext` after
verifying that `( pxConstList )->pxIndex` points to `xListEnd`, which due to
being a MiniListItem_t, can be shorter than a ListItem_t. Thus,
`( pxConstList )->pxIndex` is a `ListItem_t *` that extends past the end of the
`List_t` whose `xListEnd` it points to. This is fixed by accessing `pxNext`
through a `MiniListItem_t` instead.
* move the prototype for vApplicationIdleHook to task.h. (#600)
Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Update equal priority task preemption (#603)
* vTaskResume and vTaskPrioritySet don't preempt equal priority task
* Update vTaskResumeAll not to preempt task with equal priority
* Fix in xTaskResumeFromISR
* Update FreeRTOS/FreeRTOS build checks (#613)
This is needed to be compatible with the refactoring done in this
PR - https://github.com/FreeRTOS/FreeRTOS/pull/889
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Add ulTaskGetRunTimeCounter and ulTaskGetRunTimePercent (#611)
Allow ulTaskGetIdleRunTimeCounter and ulTaskGetIdleRunTimePercent to be
used whenever configGENERATE_RUN_TIME_STATS is enabled, as this is the
only requirement for these functions to work.
* Fix some CMake documentation typos (#616)
The quick start instructions for CMake mention the "master"
git branch which has been replaced by "main" in the current
repo.
The main CMakeLists.txt documents how to integrate a
custom port. Fix a typo in the suggested CMake code.
* Added support of 64bit events. (#597)
* Added support of 64bit even
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Added missing brackets
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Made proper name for tick macro.
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Improved macro evaluation
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Fixed missed port files + documentation
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Changes made on PR
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Fix macro definition.
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Formatted code with uncrustify
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
---------
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Introduce portMEMORY_BARRIER for Microblaze port. (#621)
The introduction of `portMEMORY_BARRIER` will ensure
the places in the kernel use a barrier will work.
For example, `xTaskResumeAll` has a memory barrier
to ensure its correctness when compiled with optimization
enabled. Without the barrier `xTaskResumeAll` can fail
(e.g. start reading and writing to address 0 and/or
infinite looping) when `xPendingReadyList` contains more
than one task to restore.
In `xTaskResumeAll` the compiler chooses to cache the
`pxTCB` the first time through the loop for use
in every subsequent loop. This is incorrect as the
removal of `pxTCB->xEventListItem` will actually
change the value of `pxTCB` if it was read again
at the top of the loop. The barrier forces the compiler
to read `pxTCB` again at the top of the loop.
The compiler is operating correctly. The removal
`pxTCB->xEventListItem` executes on a `List_t *`
and `ListItem_t *`. This means that the compiler
can assume that any `MiniListItem_t` values are
unchanged by the loop (i.e. "strict-aliasing").
This allows the compiler to cache `pxTCB` as it
is obtained via a `MiniListItem_t`. This is incorrect
in this case because it is possible for a `ListItem_t *`
to actually alias a `MiniListItem_t`. This is technically
a "violation of aliasing rules" so we use the the barrier
to disable the strict-aliasing optimization in this loop.
* Do not call exit() on MSVC Port when calling vPortEndScheduler (#624)
* make port exitable
* correctly set xPortRunning to False
* add suggestions from Review
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* add suggestions from Review
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
---------
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Update PR template to include checkbox for Unit Test related changes (#627)
* Fix build failure introduced in PR #597 (#629)
The PR #597 introduced a new config option configTICK_TYPE_WIDTH_IN_BITS
which can be defined to one of the following:
* TICK_TYPE_WIDTH_16_BITS - Tick type is 16 bit wide.
* TICK_TYPE_WIDTH_32_BITS - Tick type is 32 bit wide.
* TICK_TYPE_WIDTH_64_BITS - Tick type is 64 bit wide.
Earlier we supported 16 and 32 bit width for tick type which was
controlled using the config option configUSE_16_BIT_TICKS. The PR
tried to maintain backward compatibility by honoring
configUSE_16_BIT_TICKS. The backward compatibility did not work as
expected though, as the macro configTICK_TYPE_WIDTH_IN_BITS was used
before it was defined. This PR addresses it by ensuring that the macro
configTICK_TYPE_WIDTH_IN_BITS is defined before it is used.
Testing
1. configUSE_16_BIT_TICKS is defined to 0.
Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```
Assembly:
```
109e: 4b50 ldr r3, [pc, #320] ; (11e0 <xTaskIncrementTick+0x150>)
10a0: f8d3 4134 ldr.w r4, [r3, #308] ; 0x134
10a4: 3401 adds r4, #1
10a6: f8c3 4134 str.w r4, [r3, #308] ; 0x134
```
It is clear from assembly that the tick type is 32 bit.
2. configUSE_16_BIT_TICKS is defined to 1.
Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```
Assembly:
```
10e2: 4b53 ldr r3, [pc, #332] ; (1230 <xTaskIncrementTick+0x15c>)
10e4: f8b3 4134 ldrh.w r4, [r3, #308] ; 0x134
10e8: b2a4 uxth r4, r4
10ea: 3401 adds r4, #1
10ec: b2a4 uxth r4, r4
10ee: f8a3 4134 strh.w r4, [r3, #308] ; 0x134
```
It is clear from assembly that the tick type is 16 bit.
3. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_16_BITS.
Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```
Assembly:
```
10e2: 4b53 ldr r3, [pc, #332] ; (1230 <xTaskIncrementTick+0x15c>)
10e4: f8b3 4134 ldrh.w r4, [r3, #308] ; 0x134
10e8: b2a4 uxth r4, r4
10ea: 3401 adds r4, #1
10ec: b2a4 uxth r4, r4
10ee: f8a3 4134 strh.w r4, [r3, #308] ; 0x134
```
It is clear from assembly that the tick type is 16 bit.
4. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_32_BITS.
Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```
Assembly:
```
109e: 4b50 ldr r3, [pc, #320] ; (11e0 <xTaskIncrementTick+0x150>)
10a0: f8d3 4134 ldr.w r4, [r3, #308] ; 0x134
10a4: 3401 adds r4, #1
10a6: f8c3 4134 str.w r4, [r3, #308] ; 0x134
```
It is clear from assembly that the tick type is 32 bit.
5. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_64_BITS.
```
#error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
```
The testing was done for GCC/ARM_CM3 port which does not support 64 bit
tick type.
6. Neither configUSE_16_BIT_TICKS nor configTICK_TYPE_WIDTH_IN_BITS
defined.
```
#error Missing definition: One of configUSE_16_BIT_TICKS and
configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h.
See the Configuration section of the FreeRTOS API documentation for
details.
```
7. Both configUSE_16_BIT_TICKS and configTICK_TYPE_WIDTH_IN_BITS defined.
```
#error Only one of configUSE_16_BIT_TICKS and
configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h.
See the Configuration section of the FreeRTOS API documentation for
details.
```
Related issue - https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/628
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Feature/fixing clang gnu compiler warnings (#620)
* Adding in ability to support a library for freertos_config and a custom freertos_kernel_port (#558)
* Using single name definition for libraries everywhere. (#558)
* Supporting backwards compatibility with FREERTOS_CONFIG_FILE_DIRECTORY (#571)
* Removing compiler warnings for GNU and Clang. (#571)
* Added in documentation on how to consume from a main project. Added default PORT selection for native POSIX and MINGW platforms.
* Only adding freertos_config if it exists. Removing auto generation of it from a FREERTOS_CONFIG_FILE_DIRECTORY.
* Fixing clang and gnu compiler warnings.
* Adding in project information and how to compile for GNU/clang
* Fixing compiler issue with unused variable - no need to declare variable.
* Adding in compile warnings for linux builds that kernel is okay with using.
* Fixing more extra-semi-stmt clang warnings.
* Moving definition of hooks into header files if features are enabled.
* Fixing formatting with uncrustify.
* Fixing merge conflicts with main merge.
* Fixing compiler errors due to merge issues and formatting.
* Fixing Line feeds.
* Adding 'portNORETURN' into portmacros.h. Other Updates based on PR request
* Further clean-up of clang and clang-tidy issues.
* Removing compiler specific pragmas from common c files.
* Fixing missing lexicon entry and uncrustify formatting changes.
* Resolving merge issue multiple defnitions of proto for prvIdleTask
* Fixing formatting issues that are not covered by uncrustify. Use clang-tidy instead if you want this level of control.
* More uncrustify formatting issues.
* Fixing extra bracket in #if statement.
---------
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* POSIX port fixes (#626)
* Fix types in POSIX port
Use TaskFunction_t and StackType_t as other ports do.
* Fix portTICK_RATE_MICROSECONDS in POSIX port
---------
Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Cortex-M35P: Add Cortex-M35P port (#631)
* Cortex-M35P: Add Cortex-M35P port
The Cortex-M35P support added to kernel. The port hasn't been
validated yet with TF-M. Hence TF-M support is not included in this
port.
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
* Add portNORETURN to the newly added portmacro.h
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
* Introduced Github Status Badge for Unit Tests (#634)
* Introduced Github Status Badge for Unit Tests
* Github status badge to point to latest run
* Github status badge UT points to latest results
* Fixed URL for Github Status badge
---------
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
* Remove C99 requirement from CMake file (#633)
* Remove C99 requirement from CMake file
The kernel source is C89 compliant and does not need C99.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Explicitly set C89 requirement for kernel
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Add Thread Local Storage (TLS) support using Picolibc functions (#343)
* Pass top of stack to configINIT_TLS_BLOCK
Picolibc wants to allocate the per-task TLS block within the stack
segment, so it will need to modify the top of stack value. Pass the
pxTopOfStack variable to make this explicit.
Signed-off-by: Keith Packard <keithpac@amazon.com>
* Move newlib-specific definitions to separate file
This reduces the clutter in FreeRTOS.h caused by having newlib-specific
macros present there.
Signed-off-by: Keith Packard <keithpac@amazon.com>
* Make TLS code depend only on configUSE_C_RUNTIME_TLS_SUPPORT
Remove reference to configUSE_NEWLIB_REENTRANT as that only works
when using newlib. configUSE_C_RUNTIME_TLS_SUPPORT is always
set when configUSE_NEWLIB_REENTRANT is set, so using both was
redundant in that case.
Signed-off-by: Keith Packard <keithpac@amazon.com>
* portable-ARC: Adapt ARC support to use generalized TLS support
With generalized thread local storage (TLS) support present in the
core, the two ARC ports need to have the changes to the TCB mirrored
to them.
Signed-off-by: Keith Packard <keithpac@amazon.com>
* Add Thread Local Storage (TLS) support using Picolibc functions
This patch provides definitions of the general TLS support macros in
terms of the Picolibc TLS support functions.
Picolibc is normally configured to use TLS internally for all
variables that are intended to be task-local, so these changes are
necessary for picolibc to work correctly with FreeRTOS.
The picolibc helper functions rely on elements within the linker
script to arrange the TLS data in memory and define some symbols.
Applications wanting to use this mechanism will need changes in their
linker script when migrating to picolibc.
Signed-off-by: Keith Packard <keithpac@amazon.com>
---------
Signed-off-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Interrupt priority assert improvements for CM3/4/7 (#602)
* Interrupt priority assert improvements for CM3/4/7
In the ARM_CM3, ARM_CM4, and ARM_CM7 ports, change the assertion that
`configMAX_SYSCALL_INTERRUPT_PRIORITY` is nonzero to account for the
number of priority bits implemented by the hardware.
Change these ports to also use the lowest priority for PendSV and
SysTick, ignoring `configKERNEL_INTERRUPT_PRIORITY`.
* Remove not needed configKERNEL_INTERRUPT_PRIORITY define
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
* Introduced code coverage status badge (#635)
* Introduced code coverage status badge
* Trying to fix the URL checker issue
* Fix URL check
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* added portPOINTER_SIZE_TYPE and SIZE_MAX definition to PIC24/dsPIC port (#636)
* added portPOINTER_SIZE_TYPE definition to PIC24/dsPIC port
* Added SIZE_MAX definition to PIC24/dsPIC33
* Fix TLS and stack alignment when using picolibc (#637)
Both the TLS block and stack must be correctly aligned when using
picolibc. The architecture stack alignment is represented by the
portBYTE_ALIGNMENT_MASK and the TLS block alignment is provided by the
Picolibc _tls_align() inline function for Picolibc version 1.8 and
above. For older versions of Picolibc, we'll assume that the TLS block
requires the same alignment as the stack.
For downward growing stacks, this requires aligning the start of the
TLS block to the maximum of the stack alignment and the TLS
alignment. With this, both the TLS block and stack will now be
correctly aligned.
For upward growing stacks, the two areas must be aligned
independently; the TLS block is aligned from the start of the stack,
then the tls space is allocated, and then the stack is aligned above
that.
It's probably useful to know here that the linker ensures that
variables within the TLS block are assigned offsets that match their
alignment requirements. If the TLS block itself is correctly aligned,
then everything within will also be.
I have only tested the downward growing stack branch of this patch.
Signed-off-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Enable building the GCC Cortex-R5 port without an FPU (#586)
* Ensure configUSE_TASK_FPU_SUPPORT option is set correctly
If one does enable the FPU of the Cortex-R5 processor, then the GCC
compiler will define the macro __ARM_FP. This can be used to ensure,
that the configUSE_TASK_FPU_SUPPORT is set accordingly.
* Enable the implementation of vPortTaskUsesFPU only if configUSE_TASK_FPU_SUPPORT is set to 1
* Remove error case in pxPortInitialiseStack
The case of configUSE_TASK_FPU_SUPPORT is 0 is now handled
* Enable access to FPU registers only if FPU is enabled
* Make minor formating changes
* Format ARM Cortex-R5 port
* Address review comments from @ChristosZosi
* Minor code review suggestions
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
* Fix freertos_kernel cmake property, Posix Port (#640)
* Fix freertos_kernel cmake property, Posix Port
* Moves the `set_property()` call below the target definition in top level CMakeLists file
* Corrects billion value from `ULL` suffix (not C90 compliant) to `UL` suffix with cast to uint64_t
* Add blank line to CMakeLists.txt
* Add missing FreeRTOS+ defines
* Run kernel demos and unit tests for PR changes (#645)
* Run kernel demos and unit tests for PR changes
Kernel demos check builds multiple demos from FreeRTOS/FreeRTOS and
unit tests check runs unit tests in FreeRTOS/FreeRTOS. Both of these
checks currently use main branch of FreeRTOS-Kernel. This commits
updates these checks to use the changes in the PR.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Do not specify PR SHA explicitly as that is default
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Remove explicit PR SHA from kernel checks
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Add functions to get the buffers of statically created objects (#641)
Added various ...GetStaticBuffer() functions to get the buffers of statically
created objects.
---------
Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
* Cortex-M Assert when NVIC implements 8 PRIO bits (#639)
* Cortex-M Assert when NVIC implements 8 PRIO bits
* Fix CM3 ports
* Fix ARM_CM3_MPU
* Fix ARM CM3
* Fix ARM_CM4_MPU
* Fix ARM_CM4
* Fix GCC ARM_CM7
* Fix IAR ARM ports
* Uncrustify changes
* Fix MikroC_ARM_CM4F port
* Fix MikroC_ARM_CM4F port-(2)
* Fix RVDS ARM ports
* Revert changes for Tasking/ARM_CM4F port
* Revert changes for Tasking/ARM_CM4F port-(2)
* Update port.c
Fix GCC/ARM_CM4F port
* Update port.c
* update GCC\ARM_CM4F port
* update port.c
* Assert to check configMAX_SYSCALL_INTERRUPT_PRIORITY is set to higher priority
* Fix merge error: remove duplicate code
* Fix typos
---------
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal>
* Remove C90 requirement from CMakeLists (#649)
This is needed as it is breaking projects - https://forums.freertos.org/t/freertos-gcc-cmake/16984
We will re-evaluate and accordingly add this later.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Only add alignment padding when needed (#650)
Heap 4 and Heap 5 add some padding to ensure that the allocated blocks
are always aligned to portBYTE_ALIGNMENT bytes. The code until now was
adding padding always even if the resulting block was already aligned.
This commits updates the code to only add padding if the resulting block
is not aligned.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* add a missing comma (#651)
* fix conversion warning (#658)
FreeRTOS-Kernel/portable/GCC/ARM_CM4F/port.c:399:41: error: conversion from 'uint32_t' {aka 'long unsigned int'} to 'uint8_t' {aka 'unsigned char'} may change value [-Werror=conversion]
Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com>
* ARMv7M: Adjust implemented priority bit assertions (#665)
Adjust assertions related to the CMSIS __NVIC_PRIO_BITS and FreeRTOS
configPRIO_BITS configuration macros such that these macros specify the
minimum number of implemented priority bits supported by a config
build rather than the exact number of implemented priority bits.
Related to Qemu issue #1122
* Format portmacro.h in arm CM0 ports
* portable/ARM_CM0: Add xPortIsInsideInterrupt
Add missing xPortIsInsideInterrupt function to Cortex-M0 port.
* tree-wide: Unify formatting of __cplusplus ifdefs
* Paranthesize expression-like macro (#668)
* Updated tasks.c checks for scheduler suspension (#670)
This commit updates the checks for the variable uxSchedulerSuspended in
tasks.c module to use a uniform format.
Signed-off-by: Sudeep Mohanty <sudp.mohanty@gmail.com>
* Fix cast alignment warning (#669)
* Fix cast alignment warning
Without this change, the code produces the following warning when
compiled with `-Wcast-align` flag:
```
cast increases required alignment of target type
```
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Align StackSize and StackAddress for macOS (#674)
* Armv8-M (except Cortex-M23) interrupt priority checking (#673)
* Armv8-M: Formatting changes
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
* Armv8-M: Add support for interrupt priority check
FreeRTOS provides `FromISR` system calls which can be called directly
from interrupt service routines. It is crucial that the priority of
these ISRs is set to same or lower value (numerically higher) than that
of `configMAX_SYSCALL_INTERRUPT_PRIORITY`. For more information refer
to https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html.
Add a check to trigger an assert when an ISR with priority higher
(numerically lower) than `configMAX_SYSCALL_INTERRUPT_PRIORITY` calls
`FromISR` system calls if `configASSERT` macro is defined.
In addition, add a config option
`configQEMU_DISABLE_INTERRUPT_PRIO_BITS_CHECK` to disable interrupt
priority check while running on QEMU. Based on the discussion
https://gitlab.com/qemu-project/qemu/-/issues/1122, The interrupt
priority bits in QEMU do not match the real hardware. Therefore the
assert that checks the number of implemented bits and __NVIC_PRIO_BITS
will always fail. The config option
`configQEMU_DISABLE_INTERRUPT_PRIO_BITS_CHECK` should be defined in the
`FreeRTOSConfig.h` for QEMU targets.
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
* Use SHPR2 for calculating interrupt priority bits
This removes the dependency on the secure software to mark the interrupt
as non-secure.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Use the extended movx instruction instead of mov (#676)
The following is from the MSP430X instruction set -
```
MOVX.W Move source word to destination word.
The source operand is copied to the destination. The source operand is
not affected. Both operands may be located in the full address space.
```
The movx instruction allows both the operands to be located in the full
address space and therefore, works with large data model as well.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Keith Packard <keithpac@amazon.com>
Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com>
Signed-off-by: Sudeep Mohanty <sudp.mohanty@gmail.com>
Co-authored-by: Archit Gupta <71798289+archigup@users.noreply.github.com>
Co-authored-by: tcpluess <tpluess@ieee.org>
Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Chris Copeland <chris@chrisnc.net>
Co-authored-by: David J. Fiddes <35607151+davefiddes@users.noreply.github.com>
Co-authored-by: Dusan Cervenka <cervenka@acrios.com>
Co-authored-by: bbain <16752579+bbain@users.noreply.github.com>
Co-authored-by: Ju1He1 <93189163+Ju1He1@users.noreply.github.com>
Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com>
Co-authored-by: phelter <paulheltera@gmail.com>
Co-authored-by: jacky309 <jacques.guillou@gmail.com>
Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com>
Co-authored-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com>
Co-authored-by: Keith Packard <keithp@keithp.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com>
Co-authored-by: Kody Stribrny <89810515+kstribrnAmzn@users.noreply.github.com>
Co-authored-by: Holden <holden-zenithaerotech.com>
Co-authored-by: Darian <32921628+Dazza0@users.noreply.github.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal>
Co-authored-by: Nicolas <nicolas.brunner@heig-vd.ch>
Co-authored-by: Vo Trung Chi <chi.votrung@vn.bosch.com>
Co-authored-by: Sudeep Mohanty <91244425+sudeep-mohanty@users.noreply.github.com>
Co-authored-by: Monika Singh <108652024+moninom1@users.noreply.github.com>
* Merge main to SMP branch (#86)
* Fix array-bounds compiler warning on gcc11+ in list.h (#580)
listGET_OWNER_OF_NEXT_ENTRY computes `( pxConstList )->pxIndex->pxNext` after
verifying that `( pxConstList )->pxIndex` points to `xListEnd`, which due to
being a MiniListItem_t, can be shorter than a ListItem_t. Thus,
`( pxConstList )->pxIndex` is a `ListItem_t *` that extends past the end of the
`List_t` whose `xListEnd` it points to. This is fixed by accessing `pxNext`
through a `MiniListItem_t` instead.
* move the prototype for vApplicationIdleHook to task.h. (#600)
Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Update equal priority task preemption (#603)
* vTaskResume and vTaskPrioritySet don't preempt equal priority task
* Update vTaskResumeAll not to preempt task with equal priority
* Fix in xTaskResumeFromISR
* Update FreeRTOS/FreeRTOS build checks (#613)
This is needed to be compatible with the refactoring done in this
PR - https://github.com/FreeRTOS/FreeRTOS/pull/889
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Add ulTaskGetRunTimeCounter and ulTaskGetRunTimePercent (#611)
Allow ulTaskGetIdleRunTimeCounter and ulTaskGetIdleRunTimePercent to be
used whenever configGENERATE_RUN_TIME_STATS is enabled, as this is the
only requirement for these functions to work.
* Fix some CMake documentation typos (#616)
The quick start instructions for CMake mention the "master"
git branch which has been replaced by "main" in the current
repo.
The main CMakeLists.txt documents how to integrate a
custom port. Fix a typo in the suggested CMake code.
* Added support of 64bit events. (#597)
* Added support of 64bit even
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Added missing brackets
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Made proper name for tick macro.
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Improved macro evaluation
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Fixed missed port files + documentation
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Changes made on PR
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Fix macro definition.
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Formatted code with uncrustify
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
---------
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Introduce portMEMORY_BARRIER for Microblaze port. (#621)
The introduction of `portMEMORY_BARRIER` will ensure
the places in the kernel use a barrier will work.
For example, `xTaskResumeAll` has a memory barrier
to ensure its correctness when compiled with optimization
enabled. Without the barrier `xTaskResumeAll` can fail
(e.g. start reading and writing to address 0 and/or
infinite looping) when `xPendingReadyList` contains more
than one task to restore.
In `xTaskResumeAll` the compiler chooses to cache the
`pxTCB` the first time through the loop for use
in every subsequent loop. This is incorrect as the
removal of `pxTCB->xEventListItem` will actually
change the value of `pxTCB` if it was read again
at the top of the loop. The barrier forces the compiler
to read `pxTCB` again at the top of the loop.
The compiler is operating correctly. The removal
`pxTCB->xEventListItem` executes on a `List_t *`
and `ListItem_t *`. This means that the compiler
can assume that any `MiniListItem_t` values are
unchanged by the loop (i.e. "strict-aliasing").
This allows the compiler to cache `pxTCB` as it
is obtained via a `MiniListItem_t`. This is incorrect
in this case because it is possible for a `ListItem_t *`
to actually alias a `MiniListItem_t`. This is technically
a "violation of aliasing rules" so we use the the barrier
to disable the strict-aliasing optimization in this loop.
* Do not call exit() on MSVC Port when calling vPortEndScheduler (#624)
* make port exitable
* correctly set xPortRunning to False
* add suggestions from Review
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* add suggestions from Review
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
---------
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Update PR template to include checkbox for Unit Test related changes (#627)
* Fix build failure introduced in PR #597 (#629)
The PR #597 introduced a new config option configTICK_TYPE_WIDTH_IN_BITS
which can be defined to one of the following:
* TICK_TYPE_WIDTH_16_BITS - Tick type is 16 bit wide.
* TICK_TYPE_WIDTH_32_BITS - Tick type is 32 bit wide.
* TICK_TYPE_WIDTH_64_BITS - Tick type is 64 bit wide.
Earlier we supported 16 and 32 bit width for tick type which was
controlled using the config option configUSE_16_BIT_TICKS. The PR
tried to maintain backward compatibility by honoring
configUSE_16_BIT_TICKS. The backward compatibility did not work as
expected though, as the macro configTICK_TYPE_WIDTH_IN_BITS was used
before it was defined. This PR addresses it by ensuring that the macro
configTICK_TYPE_WIDTH_IN_BITS is defined before it is used.
Testing
1. configUSE_16_BIT_TICKS is defined to 0.
Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```
Assembly:
```
109e: 4b50 ldr r3, [pc, #320] ; (11e0 <xTaskIncrementTick+0x150>)
10a0: f8d3 4134 ldr.w r4, [r3, #308] ; 0x134
10a4: 3401 adds r4, #1
10a6: f8c3 4134 str.w r4, [r3, #308] ; 0x134
```
It is clear from assembly that the tick type is 32 bit.
2. configUSE_16_BIT_TICKS is defined to 1.
Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```
Assembly:
```
10e2: 4b53 ldr r3, [pc, #332] ; (1230 <xTaskIncrementTick+0x15c>)
10e4: f8b3 4134 ldrh.w r4, [r3, #308] ; 0x134
10e8: b2a4 uxth r4, r4
10ea: 3401 adds r4, #1
10ec: b2a4 uxth r4, r4
10ee: f8a3 4134 strh.w r4, [r3, #308] ; 0x134
```
It is clear from assembly that the tick type is 16 bit.
3. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_16_BITS.
Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```
Assembly:
```
10e2: 4b53 ldr r3, [pc, #332] ; (1230 <xTaskIncrementTick+0x15c>)
10e4: f8b3 4134 ldrh.w r4, [r3, #308] ; 0x134
10e8: b2a4 uxth r4, r4
10ea: 3401 adds r4, #1
10ec: b2a4 uxth r4, r4
10ee: f8a3 4134 strh.w r4, [r3, #308] ; 0x134
```
It is clear from assembly that the tick type is 16 bit.
4. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_32_BITS.
Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```
Assembly:
```
109e: 4b50 ldr r3, [pc, #320] ; (11e0 <xTaskIncrementTick+0x150>)
10a0: f8d3 4134 ldr.w r4, [r3, #308] ; 0x134
10a4: 3401 adds r4, #1
10a6: f8c3 4134 str.w r4, [r3, #308] ; 0x134
```
It is clear from assembly that the tick type is 32 bit.
5. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_64_BITS.
```
#error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
```
The testing was done for GCC/ARM_CM3 port which does not support 64 bit
tick type.
6. Neither configUSE_16_BIT_TICKS nor configTICK_TYPE_WIDTH_IN_BITS
defined.
```
#error Missing definition: One of configUSE_16_BIT_TICKS and
configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h.
See the Configuration section of the FreeRTOS API documentation for
details.
```
7. Both configUSE_16_BIT_TICKS and configTICK_TYPE_WIDTH_IN_BITS defined.
```
#error Only one of configUSE_16_BIT_TICKS and
configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h.
See the Configuration section of the FreeRTOS API documentation for
details.
```
Related issue - https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/628
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Feature/fixing clang gnu compiler warnings (#620)
* Adding in ability to support a library for freertos_config and a custom freertos_kernel_port (#558)
* Using single name definition for libraries everywhere. (#558)
* Supporting backwards compatibility with FREERTOS_CONFIG_FILE_DIRECTORY (#571)
* Removing compiler warnings for GNU and Clang. (#571)
* Added in documentation on how to consume from a main project. Added default PORT selection for native POSIX and MINGW platforms.
* Only adding freertos_config if it exists. Removing auto generation of it from a FREERTOS_CONFIG_FILE_DIRECTORY.
* Fixing clang and gnu compiler warnings.
* Adding in project information and how to compile for GNU/clang
* Fixing compiler issue with unused variable - no need to declare variable.
* Adding in compile warnings for linux builds that kernel is okay with using.
* Fixing more extra-semi-stmt clang warnings.
* Moving definition of hooks into header files if features are enabled.
* Fixing formatting with uncrustify.
* Fixing merge conflicts with main merge.
* Fixing compiler errors due to merge issues and formatting.
* Fixing Line feeds.
* Adding 'portNORETURN' into portmacros.h. Other Updates based on PR request
* Further clean-up of clang and clang-tidy issues.
* Removing compiler specific pragmas from common c files.
* Fixing missing lexicon entry and uncrustify formatting changes.
* Resolving merge issue multiple defnitions of proto for prvIdleTask
* Fixing formatting issues that are not covered by uncrustify. Use clang-tidy instead if you want this level of control.
* More uncrustify formatting issues.
* Fixing extra bracket in #if statement.
---------
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* POSIX port fixes (#626)
* Fix types in POSIX port
Use TaskFunction_t and StackType_t as other ports do.
* Fix portTICK_RATE_MICROSECONDS in POSIX port
---------
Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Cortex-M35P: Add Cortex-M35P port (#631)
* Cortex-M35P: Add Cortex-M35P port
The Cortex-M35P support added to kernel. The port hasn't been
validated yet with TF-M. Hence TF-M support is not included in this
port.
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
* Add portNORETURN to the newly added portmacro.h
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
* Introduced Github Status Badge for Unit Tests (#634)
* Introduced Github Status Badge for Unit Tests
* Github status badge to point to latest run
* Github status badge UT points to latest results
* Fixed URL for Github Status badge
---------
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
* Remove C99 requirement from CMake file (#633)
* Remove C99 requirement from CMake file
The kernel source is C89 compliant and does not need C99.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Explicitly set C89 requirement for kernel
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Add Thread Local Storage (TLS) support using Picolibc functions (#343)
* Pass top of stack to configINIT_TLS_BLOCK
Picolibc wants to allocate the per-task TLS block within the stack
segment, so it will need to modify the top of stack value. Pass the
pxTopOfStack variable to make this explicit.
Signed-off-by: Keith Packard <keithpac@amazon.com>
* Move newlib-specific definitions to separate file
This reduces the clutter in FreeRTOS.h caused by having newlib-specific
macros present there.
Signed-off-by: Keith Packard <keithpac@amazon.com>
* Make TLS code depend only on configUSE_C_RUNTIME_TLS_SUPPORT
Remove reference to configUSE_NEWLIB_REENTRANT as that only works
when using newlib. configUSE_C_RUNTIME_TLS_SUPPORT is always
set when configUSE_NEWLIB_REENTRANT is set, so using both was
redundant in that case.
Signed-off-by: Keith Packard <keithpac@amazon.com>
* portable-ARC: Adapt ARC support to use generalized TLS support
With generalized thread local storage (TLS) support present in the
core, the two ARC ports need to have the changes to the TCB mirrored
to them.
Signed-off-by: Keith Packard <keithpac@amazon.com>
* Add Thread Local Storage (TLS) support using Picolibc functions
This patch provides definitions of the general TLS support macros in
terms of the Picolibc TLS support functions.
Picolibc is normally configured to use TLS internally for all
variables that are intended to be task-local, so these changes are
necessary for picolibc to work correctly with FreeRTOS.
The picolibc helper functions rely on elements within the linker
script to arrange the TLS data in memory and define some symbols.
Applications wanting to use this mechanism will need changes in their
linker script when migrating to picolibc.
Signed-off-by: Keith Packard <keithpac@amazon.com>
---------
Signed-off-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Interrupt priority assert improvements for CM3/4/7 (#602)
* Interrupt priority assert improvements for CM3/4/7
In the ARM_CM3, ARM_CM4, and ARM_CM7 ports, change the assertion that
`configMAX_SYSCALL_INTERRUPT_PRIORITY` is nonzero to account for the
number of priority bits implemented by the hardware.
Change these ports to also use the lowest priority for PendSV and
SysTick, ignoring `configKERNEL_INTERRUPT_PRIORITY`.
* Remove not needed configKERNEL_INTERRUPT_PRIORITY define
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
* Introduced code coverage status badge (#635)
* Introduced code coverage status badge
* Trying to fix the URL checker issue
* Fix URL check
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* added portPOINTER_SIZE_TYPE and SIZE_MAX definition to PIC24/dsPIC port (#636)
* added portPOINTER_SIZE_TYPE definition to PIC24/dsPIC port
* Added SIZE_MAX definition to PIC24/dsPIC33
* Fix TLS and stack alignment when using picolibc (#637)
Both the TLS block and stack must be correctly aligned when using
picolibc. The architecture stack alignment is represented by the
portBYTE_ALIGNMENT_MASK and the TLS block alignment is provided by the
Picolibc _tls_align() inline function for Picolibc version 1.8 and
above. For older versions of Picolibc, we'll assume that the TLS block
requires the same alignment as the stack.
For downward growing stacks, this requires aligning the start of the
TLS block to the maximum of the stack alignment and the TLS
alignment. With this, both the TLS block and stack will now be
correctly aligned.
For upward growing stacks, the two areas must be aligned
independently; the TLS block is aligned from the start of the stack,
then the tls space is allocated, and then the stack is aligned above
that.
It's probably useful to know here that the linker ensures that
variables within the TLS block are assigned offsets that match their
alignment requirements. If the TLS block itself is correctly aligned,
then everything within will also be.
I have only tested the downward growing stack branch of this patch.
Signed-off-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Enable building the GCC Cortex-R5 port without an FPU (#586)
* Ensure configUSE_TASK_FPU_SUPPORT option is set correctly
If one does enable the FPU of the Cortex-R5 processor, then the GCC
compiler will define the macro __ARM_FP. This can be used to ensure,
that the configUSE_TASK_FPU_SUPPORT is set accordingly.
* Enable the implementation of vPortTaskUsesFPU only if configUSE_TASK_FPU_SUPPORT is set to 1
* Remove error case in pxPortInitialiseStack
The case of configUSE_TASK_FPU_SUPPORT is 0 is now handled
* Enable access to FPU registers only if FPU is enabled
* Make minor formating changes
* Format ARM Cortex-R5 port
* Address review comments from @ChristosZosi
* Minor code review suggestions
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
* Fix freertos_kernel cmake property, Posix Port (#640)
* Fix freertos_kernel cmake property, Posix Port
* Moves the `set_property()` call below the target definition in top level CMakeLists file
* Corrects billion value from `ULL` suffix (not C90 compliant) to `UL` suffix with cast to uint64_t
* Add blank line to CMakeLists.txt
* Add missing FreeRTOS+ defines
* Run kernel demos and unit tests for PR changes (#645)
* Run kernel demos and unit tests for PR changes
Kernel demos check builds multiple demos from FreeRTOS/FreeRTOS and
unit tests check runs unit tests in FreeRTOS/FreeRTOS. Both of these
checks currently use main branch of FreeRTOS-Kernel. This commits
updates these checks to use the changes in the PR.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Do not specify PR SHA explicitly as that is default
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Remove explicit PR SHA from kernel checks
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Add functions to get the buffers of statically created objects (#641)
Added various ...GetStaticBuffer() functions to get the buffers of statically
created objects.
---------
Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
* Cortex-M Assert when NVIC implements 8 PRIO bits (#639)
* Cortex-M Assert when NVIC implements 8 PRIO bits
* Fix CM3 ports
* Fix ARM_CM3_MPU
* Fix ARM CM3
* Fix ARM_CM4_MPU
* Fix ARM_CM4
* Fix GCC ARM_CM7
* Fix IAR ARM ports
* Uncrustify changes
* Fix MikroC_ARM_CM4F port
* Fix MikroC_ARM_CM4F port-(2)
* Fix RVDS ARM ports
* Revert changes for Tasking/ARM_CM4F port
* Revert changes for Tasking/ARM_CM4F port-(2)
* Update port.c
Fix GCC/ARM_CM4F port
* Update port.c
* update GCC\ARM_CM4F port
* update port.c
* Assert to check configMAX_SYSCALL_INTERRUPT_PRIORITY is set to higher priority
* Fix merge error: remove duplicate code
* Fix typos
---------
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal>
* Remove C90 requirement from CMakeLists (#649)
This is needed as it is breaking projects - https://forums.freertos.org/t/freertos-gcc-cmake/16984
We will re-evaluate and accordingly add this later.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Only add alignment padding when needed (#650)
Heap 4 and Heap 5 add some padding to ensure that the allocated blocks
are always aligned to portBYTE_ALIGNMENT bytes. The code until now was
adding padding always even if the resulting block was already aligned.
This commits updates the code to only add padding if the resulting block
is not aligned.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* add a missing comma (#651)
* fix conversion warning (#658)
FreeRTOS-Kernel/portable/GCC/ARM_CM4F/port.c:399:41: error: conversion from 'uint32_t' {aka 'long unsigned int'} to 'uint8_t' {aka 'unsigned char'} may change value [-Werror=conversion]
Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com>
* ARMv7M: Adjust implemented priority bit assertions (#665)
Adjust assertions related to the CMSIS __NVIC_PRIO_BITS and FreeRTOS
configPRIO_BITS configuration macros such that these macros specify the
minimum number of implemented priority bits supported by a config
build rather than the exact number of implemented priority bits.
Related to Qemu issue #1122
* Format portmacro.h in arm CM0 ports
* portable/ARM_CM0: Add xPortIsInsideInterrupt
Add missing xPortIsInsideInterrupt function to Cortex-M0 port.
* tree-wide: Unify formatting of __cplusplus ifdefs
* Paranthesize expression-like macro (#668)
* Updated tasks.c checks for scheduler suspension (#670)
This commit updates the checks for the variable uxSchedulerSuspended in
tasks.c module to use a uniform format.
Signed-off-by: Sudeep Mohanty <sudp.mohanty@gmail.com>
* Fix cast alignment warning (#669)
* Fix cast alignment warning
Without this change, the code produces the following warning when
compiled with `-Wcast-align` flag:
```
cast increases required alignment of target type
```
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Align StackSize and StackAddress for macOS (#674)
* Armv8-M (except Cortex-M23) interrupt priority checking (#673)
* Armv8-M: Formatting changes
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
* Armv8-M: Add support for interrupt priority check
FreeRTOS provides `FromISR` system calls which can be called directly
from interrupt service routines. It is crucial that the priority of
these ISRs is set to same or lower value (numerically higher) than that
of `configMAX_SYSCALL_INTERRUPT_PRIORITY`. For more information refer
to https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html.
Add a check to trigger an assert when an ISR with priority higher
(numerically lower) than `configMAX_SYSCALL_INTERRUPT_PRIORITY` calls
`FromISR` system calls if `configASSERT` macro is defined.
In addition, add a config option
`configQEMU_DISABLE_INTERRUPT_PRIO_BITS_CHECK` to disable interrupt
priority check while running on QEMU. Based on the discussion
https://gitlab.com/qemu-project/qemu/-/issues/1122, The interrupt
priority bits in QEMU do not match the real hardware. Therefore the
assert that checks the number of implemented bits and __NVIC_PRIO_BITS
will always fail. The config option
`configQEMU_DISABLE_INTERRUPT_PRIO_BITS_CHECK` should be defined in the
`FreeRTOSConfig.h` for QEMU targets.
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
* Use SHPR2 for calculating interrupt priority bits
This removes the dependency on the secure software to mark the interrupt
as non-secure.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Use the extended movx instruction instead of mov (#676)
The following is from the MSP430X instruction set -
```
MOVX.W Move source word to destination word.
The source operand is copied to the destination. The source operand is
not affected. Both operands may be located in the full address space.
```
The movx instruction allows both the operands to be located in the full
address space and therefore, works with large data model as well.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Fix eTaskGetState for pending ready tasks (#679)
This commit fixes eTaskGetState so that eReady is returned for pending ready
tasks.
Co-authored-by: Darian Leung <darian@espressif.com>
* Generates SBOM after source files are updated with release tag (#680)
* update source file with release version info before SBOM generation
* delete tag branch during cleanup
* Add back croutines by reverting PR#590 (#685)
* Add croutines to the code base
* Add croutine changes to cmake, lexicon and readme
* Add croutine file to portable cmake file
* Add back more references from PR 591
* Remove __NVIC_PRIO_BITS and configPRIO_BITS check in port (#683)
* Remove __NVIC_PRIO_BITS and configPRIO_BITS check in CM3, CM4 and ARMv8.
* Add hardware not implemented bits check. These bits should be zero.
---------
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Use UBaseType_t as interrupt mask (#689)
* Use UBaseType_t as interrupt mask
* Update GCC posix port to use UBaseType_t as interrupt mask
* Fix clang warning in croutine and stream buffer (#686)
* Fix document warning in croutine
* Fix cast-qual warning in stream buffer
* Use portTASK_FUNCTION_PROTO to replace portNORETURN (#688)
* Use portTASK_FUNCTION_PROTO to replace portNORETURN
* Fix typo in check comment of configMAX_SYSCALL_INTERRUPT_PRIORITY (#690)
* Add constant type for portMAX_DELAY in port (#691)
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Update static stream buffer size check (#693)
* Use volatile size instead of sizeof directly to prevent always
true/false warning
* Fix typos in comments for the AT91SAM7S port (#695)
Co-authored-by: RichardBarry <3073890+RichardBarry@users.noreply.github.com>
* Fix#697: Missing portPOINTER_SIZE_TYPE definition for ATmega port (#698)
* Remove empty expression statement compiler warning (#692)
* Add do while( 0 ) loop for empty expression statement compiler warning
* Update uxTaskGetSystemState for tasks in pending ready list (#702)
* Update uxTaskGetSystemState to sync with eTaskGetState
* Update in vTaskGetInfo for tasks in pending ready list should be in
ready state.
* Fix circular dependency in CMake project (#700)
* Fix circular dependency in cmake project
Fix for https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/687
In order for custom ports to also break the cycle, they must link
against freertos_kernel_include instead of freertos_kernel.
* Simplify include path
* Memory Protection Unit (MPU) Enhancements (#705)
Memory Protection Unit (MPU) Enhancements
This commit introduces a new MPU wrapper that places additional
restrictions on unprivileged tasks. The following is the list of changes
introduced with the new MPU wrapper:
1. Opaque and indirectly verifiable integers for kernel object handles:
All the kernel object handles (for example, queue handles) are now
opaque integers. Previously object handles were raw pointers.
2. Saving the task context in Task Control Block (TCB): When a task is
swapped out by the scheduler, the task's context is now saved in its
TCB. Previously the task's context was saved on its stack.
3. Execute system calls on a separate privileged only stack: FreeRTOS
system calls, which execute with elevated privilege, now use a
separate privileged only stack. Previously system calls used the
calling task's stack. The application writer can control the size of
the system call stack using new configSYSTEM_CALL_STACK_SIZE config
macro.
4. Memory bounds checks: FreeRTOS system calls which accept a pointer
and de-reference it, now verify that the calling task has required
permissions to access the memory location referenced by the pointer.
5. System call restrictions: The following system calls are no longer
available to unprivileged tasks:
- vQueueDelete
- xQueueCreateMutex
- xQueueCreateMutexStatic
- xQueueCreateCountingSemaphore
- xQueueCreateCountingSemaphoreStatic
- xQueueGenericCreate
- xQueueGenericCreateStatic
- xQueueCreateSet
- xQueueRemoveFromSet
- xQueueGenericReset
- xTaskCreate
- xTaskCreateStatic
- vTaskDelete
- vTaskPrioritySet
- vTaskSuspendAll
- xTaskResumeAll
- xTaskGetHandle
- xTaskCallApplicationTaskHook
- vTaskList
- vTaskGetRunTimeStats
- xTaskCatchUpTicks
- xEventGroupCreate
- xEventGroupCreateStatic
- vEventGroupDelete
- xStreamBufferGenericCreate
- xStreamBufferGenericCreateStatic
- vStreamBufferDelete
- xStreamBufferReset
Also, an unprivileged task can no longer use vTaskSuspend to suspend
any task other than itself.
We thank the following people for their inputs in these enhancements:
- David Reiss of Meta Platforms, Inc.
- Lan Luo, Xinhui Shao, Yumeng Wei, Zixia Liu, Huaiyu Yan and Zhen Ling
of School of Computer Science and Engineering, Southeast University,
China.
- Xinwen Fu of Department of Computer Science, University of
Massachusetts Lowell, USA.
- Yuequi Chen, Zicheng Wang, Minghao Lin of University of Colorado
Boulder, USA.
* Update History for Version 10.6.0 (#706)
Signed-off-by: kar-rahul-aws <karahulx@amazon.com>
* Fixed compile options polluting project (#694)
* Fixed compile options polluting project
Moved add_library higher
* Apply suggestions from code review
Co-authored-by: Paul Bartell <paul.bartell@gmail.com>
* fixed cmakelists keeping in mind the suggestions
---------
Co-authored-by: Paul Bartell <paul.bartell@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com>
* Fix the comments in the CM3 and CM4 MPU Ports about the MPU Region numbers being loaded (#707)
Co-authored-by: Soren Ptak <skptak@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Update xSemaphoreGetStaticBuffer prototype in comment (#704)
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Correct the misspelled name (#708)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Keith Packard <keithpac@amazon.com>
Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com>
Signed-off-by: Sudeep Mohanty <sudp.mohanty@gmail.com>
Signed-off-by: kar-rahul-aws <karahulx@amazon.com>
Co-authored-by: Archit Gupta <71798289+archigup@users.noreply.github.com>
Co-authored-by: tcpluess <tpluess@ieee.org>
Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Chris Copeland <chris@chrisnc.net>
Co-authored-by: David J. Fiddes <35607151+davefiddes@users.noreply.github.com>
Co-authored-by: Dusan Cervenka <cervenka@acrios.com>
Co-authored-by: bbain <16752579+bbain@users.noreply.github.com>
Co-authored-by: Ju1He1 <93189163+Ju1He1@users.noreply.github.com>
Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com>
Co-authored-by: phelter <paulheltera@gmail.com>
Co-authored-by: jacky309 <jacques.guillou@gmail.com>
Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com>
Co-authored-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com>
Co-authored-by: Keith Packard <keithp@keithp.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com>
Co-authored-by: Kody Stribrny <89810515+kstribrnAmzn@users.noreply.github.com>
Co-authored-by: Holden <holden-zenithaerotech.com>
Co-authored-by: Darian <32921628+Dazza0@users.noreply.github.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal>
Co-authored-by: Nicolas <nicolas.brunner@heig-vd.ch>
Co-authored-by: Vo Trung Chi <chi.votrung@vn.bosch.com>
Co-authored-by: Sudeep Mohanty <91244425+sudeep-mohanty@users.noreply.github.com>
Co-authored-by: Monika Singh <108652024+moninom1@users.noreply.github.com>
Co-authored-by: Darian Leung <darian@espressif.com>
Co-authored-by: Tony Josi <tonyjosi@amazon.com>
Co-authored-by: Evgeny Ermakov <22344340+unspecd@users.noreply.github.com>
Co-authored-by: RichardBarry <3073890+RichardBarry@users.noreply.github.com>
Co-authored-by: Joris Putcuyps <joris.putcuyps@gmail.com>
Co-authored-by: Patrick Cook <114708437+cookpate@users.noreply.github.com>
Co-authored-by: Mr. Jake <norbertzpilicy@gmail.com>
Co-authored-by: Paul Bartell <paul.bartell@gmail.com>
Co-authored-by: Soren Ptak <Skptak@outlook.com>
Co-authored-by: Soren Ptak <skptak@amazon.com>
* Merge main to SMP branch 0721 (#90)
* Fix array-bounds compiler warning on gcc11+ in list.h (#580)
listGET_OWNER_OF_NEXT_ENTRY computes `( pxConstList )->pxIndex->pxNext` after
verifying that `( pxConstList )->pxIndex` points to `xListEnd`, which due to
being a MiniListItem_t, can be shorter than a ListItem_t. Thus,
`( pxConstList )->pxIndex` is a `ListItem_t *` that extends past the end of the
`List_t` whose `xListEnd` it points to. This is fixed by accessing `pxNext`
through a `MiniListItem_t` instead.
* move the prototype for vApplicationIdleHook to task.h. (#600)
Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Update equal priority task preemption (#603)
* vTaskResume and vTaskPrioritySet don't preempt equal priority task
* Update vTaskResumeAll not to preempt task with equal priority
* Fix in xTaskResumeFromISR
* Update FreeRTOS/FreeRTOS build checks (#613)
This is needed to be compatible with the refactoring done in this
PR - https://github.com/FreeRTOS/FreeRTOS/pull/889
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Add ulTaskGetRunTimeCounter and ulTaskGetRunTimePercent (#611)
Allow ulTaskGetIdleRunTimeCounter and ulTaskGetIdleRunTimePercent to be
used whenever configGENERATE_RUN_TIME_STATS is enabled, as this is the
only requirement for these functions to work.
* Fix some CMake documentation typos (#616)
The quick start instructions for CMake mention the "master"
git branch which has been replaced by "main" in the current
repo.
The main CMakeLists.txt documents how to integrate a
custom port. Fix a typo in the suggested CMake code.
* Added support of 64bit events. (#597)
* Added support of 64bit even
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Added missing brackets
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Made proper name for tick macro.
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Improved macro evaluation
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Fixed missed port files + documentation
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Changes made on PR
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Fix macro definition.
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Formatted code with uncrustify
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
---------
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
* Introduce portMEMORY_BARRIER for Microblaze port. (#621)
The introduction of `portMEMORY_BARRIER` will ensure
the places in the kernel use a barrier will work.
For example, `xTaskResumeAll` has a memory barrier
to ensure its correctness when compiled with optimization
enabled. Without the barrier `xTaskResumeAll` can fail
(e.g. start reading and writing to address 0 and/or
infinite looping) when `xPendingReadyList` contains more
than one task to restore.
In `xTaskResumeAll` the compiler chooses to cache the
`pxTCB` the first time through the loop for use
in every subsequent loop. This is incorrect as the
removal of `pxTCB->xEventListItem` will actually
change the value of `pxTCB` if it was read again
at the top of the loop. The barrier forces the compiler
to read `pxTCB` again at the top of the loop.
The compiler is operating correctly. The removal
`pxTCB->xEventListItem` executes on a `List_t *`
and `ListItem_t *`. This means that the compiler
can assume that any `MiniListItem_t` values are
unchanged by the loop (i.e. "strict-aliasing").
This allows the compiler to cache `pxTCB` as it
is obtained via a `MiniListItem_t`. This is incorrect
in this case because it is possible for a `ListItem_t *`
to actually alias a `MiniListItem_t`. This is technically
a "violation of aliasing rules" so we use the the barrier
to disable the strict-aliasing optimization in this loop.
* Do not call exit() on MSVC Port when calling vPortEndScheduler (#624)
* make port exitable
* correctly set xPortRunning to False
* add suggestions from Review
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* add suggestions from Review
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
---------
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Update PR template to include checkbox for Unit Test related changes (#627)
* Fix build failure introduced in PR #597 (#629)
The PR #597 introduced a new config option configTICK_TYPE_WIDTH_IN_BITS
which can be defined to one of the following:
* TICK_TYPE_WIDTH_16_BITS - Tick type is 16 bit wide.
* TICK_TYPE_WIDTH_32_BITS - Tick type is 32 bit wide.
* TICK_TYPE_WIDTH_64_BITS - Tick type is 64 bit wide.
Earlier we supported 16 and 32 bit width for tick type which was
controlled using the config option configUSE_16_BIT_TICKS. The PR
tried to maintain backward compatibility by honoring
configUSE_16_BIT_TICKS. The backward compatibility did not work as
expected though, as the macro configTICK_TYPE_WIDTH_IN_BITS was used
before it was defined. This PR addresses it by ensuring that the macro
configTICK_TYPE_WIDTH_IN_BITS is defined before it is used.
Testing
1. configUSE_16_BIT_TICKS is defined to 0.
Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```
Assembly:
```
109e: 4b50 ldr r3, [pc, #320] ; (11e0 <xTaskIncrementTick+0x150>)
10a0: f8d3 4134 ldr.w r4, [r3, #308] ; 0x134
10a4: 3401 adds r4, #1
10a6: f8c3 4134 str.w r4, [r3, #308] ; 0x134
```
It is clear from assembly that the tick type is 32 bit.
2. configUSE_16_BIT_TICKS is defined to 1.
Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```
Assembly:
```
10e2: 4b53 ldr r3, [pc, #332] ; (1230 <xTaskIncrementTick+0x15c>)
10e4: f8b3 4134 ldrh.w r4, [r3, #308] ; 0x134
10e8: b2a4 uxth r4, r4
10ea: 3401 adds r4, #1
10ec: b2a4 uxth r4, r4
10ee: f8a3 4134 strh.w r4, [r3, #308] ; 0x134
```
It is clear from assembly that the tick type is 16 bit.
3. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_16_BITS.
Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```
Assembly:
```
10e2: 4b53 ldr r3, [pc, #332] ; (1230 <xTaskIncrementTick+0x15c>)
10e4: f8b3 4134 ldrh.w r4, [r3, #308] ; 0x134
10e8: b2a4 uxth r4, r4
10ea: 3401 adds r4, #1
10ec: b2a4 uxth r4, r4
10ee: f8a3 4134 strh.w r4, [r3, #308] ; 0x134
```
It is clear from assembly that the tick type is 16 bit.
4. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_32_BITS.
Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```
Assembly:
```
109e: 4b50 ldr r3, [pc, #320] ; (11e0 <xTaskIncrementTick+0x150>)
10a0: f8d3 4134 ldr.w r4, [r3, #308] ; 0x134
10a4: 3401 adds r4, #1
10a6: f8c3 4134 str.w r4, [r3, #308] ; 0x134
```
It is clear from assembly that the tick type is 32 bit.
5. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_64_BITS.
```
#error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
```
The testing was done for GCC/ARM_CM3 port which does not support 64 bit
tick type.
6. Neither configUSE_16_BIT_TICKS nor configTICK_TYPE_WIDTH_IN_BITS
defined.
```
#error Missing definition: One of configUSE_16_BIT_TICKS and
configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h.
See the Configuration section of the FreeRTOS API documentation for
details.
```
7. Both configUSE_16_BIT_TICKS and configTICK_TYPE_WIDTH_IN_BITS defined.
```
#error Only one of configUSE_16_BIT_TICKS and
configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h.
See the Configuration section of the FreeRTOS API documentation for
details.
```
Related issue - https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/628
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Feature/fixing clang gnu compiler warnings (#620)
* Adding in ability to support a library for freertos_config and a custom freertos_kernel_port (#558)
* Using single name definition for libraries everywhere. (#558)
* Supporting backwards compatibility with FREERTOS_CONFIG_FILE_DIRECTORY (#571)
* Removing compiler warnings for GNU and Clang. (#571)
* Added in documentation on how to consume from a main project. Added default PORT selection for native POSIX and MINGW platforms.
* Only adding freertos_config if it exists. Removing auto generation of it from a FREERTOS_CONFIG_FILE_DIRECTORY.
* Fixing clang and gnu compiler warnings.
* Adding in project information and how to compile for GNU/clang
* Fixing compiler issue with unused variable - no need to declare variable.
* Adding in compile warnings for linux builds that kernel is okay with using.
* Fixing more extra-semi-stmt clang warnings.
* Moving definition of hooks into header files if features are enabled.
* Fixing formatting with uncrustify.
* Fixing merge conflicts with main merge.
* Fixing compiler errors due to merge issues and formatting.
* Fixing Line feeds.
* Adding 'portNORETURN' into portmacros.h. Other Updates based on PR request
* Further clean-up of clang and clang-tidy issues.
* Removing compiler specific pragmas from common c files.
* Fixing missing lexicon entry and uncrustify formatting changes.
* Resolving merge issue multiple defnitions of proto for prvIdleTask
* Fixing formatting issues that are not covered by uncrustify. Use clang-tidy instead if you want this level of control.
* More uncrustify formatting issues.
* Fixing extra bracket in #if statement.
---------
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* POSIX port fixes (#626)
* Fix types in POSIX port
Use TaskFunction_t and StackType_t as other ports do.
* Fix portTICK_RATE_MICROSECONDS in POSIX port
---------
Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Cortex-M35P: Add Cortex-M35P port (#631)
* Cortex-M35P: Add Cortex-M35P port
The Cortex-M35P support added to kernel. The port hasn't been
validated yet with TF-M. Hence TF-M support is not included in this
port.
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
* Add portNORETURN to the newly added portmacro.h
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
* Introduced Github Status Badge for Unit Tests (#634)
* Introduced Github Status Badge for Unit Tests
* Github status badge to point to latest run
* Github status badge UT points to latest results
* Fixed URL for Github Status badge
---------
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
* Remove C99 requirement from CMake file (#633)
* Remove C99 requirement from CMake file
The kernel source is C89 compliant and does not need C99.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Explicitly set C89 requirement for kernel
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Add Thread Local Storage (TLS) support using Picolibc functions (#343)
* Pass top of stack to configINIT_TLS_BLOCK
Picolibc wants to allocate the per-task TLS block within the stack
segment, so it will need to modify the top of stack value. Pass the
pxTopOfStack variable to make this explicit.
Signed-off-by: Keith Packard <keithpac@amazon.com>
* Move newlib-specific definitions to separate file
This reduces the clutter in FreeRTOS.h caused by having newlib-specific
macros present there.
Signed-off-by: Keith Packard <keithpac@amazon.com>
* Make TLS code depend only on configUSE_C_RUNTIME_TLS_SUPPORT
Remove reference to configUSE_NEWLIB_REENTRANT as that only works
when using newlib. configUSE_C_RUNTIME_TLS_SUPPORT is always
set when configUSE_NEWLIB_REENTRANT is set, so using both was
redundant in that case.
Signed-off-by: Keith Packard <keithpac@amazon.com>
* portable-ARC: Adapt ARC support to use generalized TLS support
With generalized thread local storage (TLS) support present in the
core, the two ARC ports need to have the changes to the TCB mirrored
to them.
Signed-off-by: Keith Packard <keithpac@amazon.com>
* Add Thread Local Storage (TLS) support using Picolibc functions
This patch provides definitions of the general TLS support macros in
terms of the Picolibc TLS support functions.
Picolibc is normally configured to use TLS internally for all
variables that are intended to be task-local, so these changes are
necessary for picolibc to work correctly with FreeRTOS.
The picolibc helper functions rely on elements within the linker
script to arrange the TLS data in memory and define some symbols.
Applications wanting to use this mechanism will need changes in their
linker script when migrating to picolibc.
Signed-off-by: Keith Packard <keithpac@amazon.com>
---------
Signed-off-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Interrupt priority assert improvements for CM3/4/7 (#602)
* Interrupt priority assert improvements for CM3/4/7
In the ARM_CM3, ARM_CM4, and ARM_CM7 ports, change the assertion that
`configMAX_SYSCALL_INTERRUPT_PRIORITY` is nonzero to account for the
number of priority bits implemented by the hardware.
Change these ports to also use the lowest priority for PendSV and
SysTick, ignoring `configKERNEL_INTERRUPT_PRIORITY`.
* Remove not needed configKERNEL_INTERRUPT_PRIORITY define
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
* Introduced code coverage status badge (#635)
* Introduced code coverage status badge
* Trying to fix the URL checker issue
* Fix URL check
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* added portPOINTER_SIZE_TYPE and SIZE_MAX definition to PIC24/dsPIC port (#636)
* added portPOINTER_SIZE_TYPE definition to PIC24/dsPIC port
* Added SIZE_MAX definition to PIC24/dsPIC33
* Fix TLS and stack alignment when using picolibc (#637)
Both the TLS block and stack must be correctly aligned when using
picolibc. The architecture stack alignment is represented by the
portBYTE_ALIGNMENT_MASK and the TLS block alignment is provided by the
Picolibc _tls_align() inline function for Picolibc version 1.8 and
above. For older versions of Picolibc, we'll assume that the TLS block
requires the same alignment as the stack.
For downward growing stacks, this requires aligning the start of the
TLS block to the maximum of the stack alignment and the TLS
alignment. With this, both the TLS block and stack will now be
correctly aligned.
For upward growing stacks, the two areas must be aligned
independently; the TLS block is aligned from the start of the stack,
then the tls space is allocated, and then the stack is aligned above
that.
It's probably useful to know here that the linker ensures that
variables within the TLS block are assigned offsets that match their
alignment requirements. If the TLS block itself is correctly aligned,
then everything within will also be.
I have only tested the downward growing stack branch of this patch.
Signed-off-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Enable building the GCC Cortex-R5 port without an FPU (#586)
* Ensure configUSE_TASK_FPU_SUPPORT option is set correctly
If one does enable the FPU of the Cortex-R5 processor, then the GCC
compiler will define the macro __ARM_FP. This can be used to ensure,
that the configUSE_TASK_FPU_SUPPORT is set accordingly.
* Enable the implementation of vPortTaskUsesFPU only if configUSE_TASK_FPU_SUPPORT is set to 1
* Remove error case in pxPortInitialiseStack
The case of configUSE_TASK_FPU_SUPPORT is 0 is now handled
* Enable access to FPU registers only if FPU is enabled
* Make minor formating changes
* Format ARM Cortex-R5 port
* Address review comments from @ChristosZosi
* Minor code review suggestions
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
* Fix freertos_kernel cmake property, Posix Port (#640)
* Fix freertos_kernel cmake property, Posix Port
* Moves the `set_property()` call below the target definition in top level CMakeLists file
* Corrects billion value from `ULL` suffix (not C90 compliant) to `UL` suffix with cast to uint64_t
* Add blank line to CMakeLists.txt
* Add missing FreeRTOS+ defines
* Run kernel demos and unit tests for PR changes (#645)
* Run kernel demos and unit tests for PR changes
Kernel demos check builds multiple demos from FreeRTOS/FreeRTOS and
unit tests check runs unit tests in FreeRTOS/FreeRTOS. Both of these
checks currently use main branch of FreeRTOS-Kernel. This commits
updates these checks to use the changes in the PR.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Do not specify PR SHA explicitly as that is default
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Remove explicit PR SHA from kernel checks
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Add functions to get the buffers of statically created objects (#641)
Added various ...GetStaticBuffer() functions to get the buffers of statically
created objects.
---------
Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
* Cortex-M Assert when NVIC implements 8 PRIO bits (#639)
* Cortex-M Assert when NVIC implements 8 PRIO bits
* Fix CM3 ports
* Fix ARM_CM3_MPU
* Fix ARM CM3
* Fix ARM_CM4_MPU
* Fix ARM_CM4
* Fix GCC ARM_CM7
* Fix IAR ARM ports
* Uncrustify changes
* Fix MikroC_ARM_CM4F port
* Fix MikroC_ARM_CM4F port-(2)
* Fix RVDS ARM ports
* Revert changes for Tasking/ARM_CM4F port
* Revert changes for Tasking/ARM_CM4F port-(2)
* Update port.c
Fix GCC/ARM_CM4F port
* Update port.c
* update GCC\ARM_CM4F port
* update port.c
* Assert to check configMAX_SYSCALL_INTERRUPT_PRIORITY is set to higher priority
* Fix merge error: remove duplicate code
* Fix typos
---------
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal>
* Remove C90 requirement from CMakeLists (#649)
This is needed as it is breaking projects - https://forums.freertos.org/t/freertos-gcc-cmake/16984
We will re-evaluate and accordingly add this later.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Only add alignment padding when needed (#650)
Heap 4 and Heap 5 add some padding to ensure that the allocated blocks
are always aligned to portBYTE_ALIGNMENT bytes. The code until now was
adding padding always even if the resulting block was already aligned.
This commits updates the code to only add padding if the resulting block
is not aligned.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* add a missing comma (#651)
* fix conversion warning (#658)
FreeRTOS-Kernel/portable/GCC/ARM_CM4F/port.c:399:41: error: conversion from 'uint32_t' {aka 'long unsigned int'} to 'uint8_t' {aka 'unsigned char'} may change value [-Werror=conversion]
Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com>
* ARMv7M: Adjust implemented priority bit assertions (#665)
Adjust assertions related to the CMSIS __NVIC_PRIO_BITS and FreeRTOS
configPRIO_BITS configuration macros such that these macros specify the
minimum number of implemented priority bits supported by a config
build rather than the exact number of implemented priority bits.
Related to Qemu issue #1122
* Format portmacro.h in arm CM0 ports
* portable/ARM_CM0: Add xPortIsInsideInterrupt
Add missing xPortIsInsideInterrupt function to Cortex-M0 port.
* tree-wide: Unify formatting of __cplusplus ifdefs
* Paranthesize expression-like macro (#668)
* Updated tasks.c checks for scheduler suspension (#670)
This commit updates the checks for the variable uxSchedulerSuspended in
tasks.c module to use a uniform format.
Signed-off-by: Sudeep Mohanty <sudp.mohanty@gmail.com>
* Fix cast alignment warning (#669)
* Fix cast alignment warning
Without this change, the code produces the following warning when
compiled with `-Wcast-align` flag:
```
cast increases required alignment of target type
```
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Align StackSize and StackAddress for macOS (#674)
* Armv8-M (except Cortex-M23) interrupt priority checking (#673)
* Armv8-M: Formatting changes
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
* Armv8-M: Add support for interrupt priority check
FreeRTOS provides `FromISR` system calls which can be called directly
from interrupt service routines. It is crucial that the priority of
these ISRs is set to same or lower value (numerically higher) than that
of `configMAX_SYSCALL_INTERRUPT_PRIORITY`. For more information refer
to https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html.
Add a check to trigger an assert when an ISR with priority higher
(numerically lower) than `configMAX_SYSCALL_INTERRUPT_PRIORITY` calls
`FromISR` system calls if `configASSERT` macro is defined.
In addition, add a config option
`configQEMU_DISABLE_INTERRUPT_PRIO_BITS_CHECK` to disable interrupt
priority check while running on QEMU. Based on the discussion
https://gitlab.com/qemu-project/qemu/-/issues/1122, The interrupt
priority bits in QEMU do not match the real hardware. Therefore the
assert that checks the number of implemented bits and __NVIC_PRIO_BITS
will always fail. The config option
`configQEMU_DISABLE_INTERRUPT_PRIO_BITS_CHECK` should be defined in the
`FreeRTOSConfig.h` for QEMU targets.
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
* Use SHPR2 for calculating interrupt priority bits
This removes the dependency on the secure software to mark the interrupt
as non-secure.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Use the extended movx instruction instead of mov (#676)
The following is from the MSP430X instruction set -
```
MOVX.W Move source word to destination word.
The source operand is copied to the destination. The source operand is
not affected. Both operands may be located in the full address space.
```
The movx instruction allows both the operands to be located in the full
address space and therefore, works with large data model as well.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Fix eTaskGetState for pending ready tasks (#679)
This commit fixes eTaskGetState so that eReady is returned for pending ready
tasks.
Co-authored-by: Darian Leung <darian@espressif.com>
* Generates SBOM after source files are updated with release tag (#680)
* update source file with release version info before SBOM generation
* delete tag branch during cleanup
* Add back croutines by reverting PR#590 (#685)
* Add croutines to the code base
* Add croutine changes to cmake, lexicon and readme
* Add croutine file to portable cmake file
* Add back more references from PR 591
* Remove __NVIC_PRIO_BITS and configPRIO_BITS check in port (#683)
* Remove __NVIC_PRIO_BITS and configPRIO_BITS check in CM3, CM4 and ARMv8.
* Add hardware not implemented bits check. These bits should be zero.
---------
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Use UBaseType_t as interrupt mask (#689)
* Use UBaseType_t as interrupt mask
* Update GCC posix port to use UBaseType_t as interrupt mask
* Fix clang warning in croutine and stream buffer (#686)
* Fix document warning in croutine
* Fix cast-qual warning in stream buffer
* Use portTASK_FUNCTION_PROTO to replace portNORETURN (#688)
* Use portTASK_FUNCTION_PROTO to replace portNORETURN
* Fix typo in check comment of configMAX_SYSCALL_INTERRUPT_PRIORITY (#690)
* Add constant type for portMAX_DELAY in port (#691)
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Update static stream buffer size check (#693)
* Use volatile size instead of sizeof directly to prevent always
true/false warning
* Fix typos in comments for the AT91SAM7S port (#695)
Co-authored-by: RichardBarry <3073890+RichardBarry@users.noreply.github.com>
* Fix#697: Missing portPOINTER_SIZE_TYPE definition for ATmega port (#698)
* Remove empty expression statement compiler warning (#692)
* Add do while( 0 ) loop for empty expression statement compiler warning
* Update uxTaskGetSystemState for tasks in pending ready list (#702)
* Update uxTaskGetSystemState to sync with eTaskGetState
* Update in vTaskGetInfo for tasks in pending ready list should be in
ready state.
* Fix circular dependency in CMake project (#700)
* Fix circular dependency in cmake project
Fix for https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/687
In order for custom ports to also break the cycle, they must link
against freertos_kernel_include instead of freertos_kernel.
* Simplify include path
* Memory Protection Unit (MPU) Enhancements (#705)
Memory Protection Unit (MPU) Enhancements
This commit introduces a new MPU wrapper that places additional
restrictions on unprivileged tasks. The following is the list of changes
introduced with the new MPU wrapper:
1. Opaque and indirectly verifiable integers for kernel object handles:
All the kernel object handles (for example, queue handles) are now
opaque integers. Previously object handles were raw pointers.
2. Saving the task context in Task Control Block (TCB): When a task is
swapped out by the scheduler, the task's context is now saved in its
TCB. Previously the task's context was saved on its stack.
3. Execute system calls on a separate privileged only stack: FreeRTOS
system calls, which execute with elevated privilege, now use a
separate privileged only stack. Previously system calls used the
calling task's stack. The application writer can control the size of
the system call stack using new configSYSTEM_CALL_STACK_SIZE config
macro.
4. Memory bounds checks: FreeRTOS system calls which accept a pointer
and de-reference it, now verify that the calling task has required
permissions to access the memory location referenced by the pointer.
5. System call restrictions: The following system calls are no longer
available to unprivileged tasks:
- vQueueDelete
- xQueueCreateMutex
- xQueueCreateMutexStatic
- xQueueCreateCountingSemaphore
- xQueueCreateCountingSemaphoreStatic
- xQueueGenericCreate
- xQueueGenericCreateStatic
- xQueueCreateSet
- xQueueRemoveFromSet
- xQueueGenericReset
- xTaskCreate
- xTaskCreateStatic
- vTaskDelete
- vTaskPrioritySet
- vTaskSuspendAll
- xTaskResumeAll
- xTaskGetHandle
- xTaskCallApplicationTaskHook
- vTaskList
- vTaskGetRunTimeStats
- xTaskCatchUpTicks
- xEventGroupCreate
- xEventGroupCreateStatic
- vEventGroupDelete
- xStreamBufferGenericCreate
- xStreamBufferGenericCreateStatic
- vStreamBufferDelete
- xStreamBufferReset
Also, an unprivileged task can no longer use vTaskSuspend to suspend
any task other than itself.
We thank the following people for their inputs in these enhancements:
- David Reiss of Meta Platforms, Inc.
- Lan Luo, Xinhui Shao, Yumeng Wei, Zixia Liu, Huaiyu Yan and Zhen Ling
of School of Computer Science and Engineering, Southeast University,
China.
- Xinwen Fu of Department of Computer Science, University of
Massachusetts Lowell, USA.
- Yuequi Chen, Zicheng Wang, Minghao Lin of University of Colorado
Boulder, USA.
* Update History for Version 10.6.0 (#706)
Signed-off-by: kar-rahul-aws <karahulx@amazon.com>
* Fixed compile options polluting project (#694)
* Fixed compile options polluting project
Moved add_library higher
* Apply suggestions from code review
Co-authored-by: Paul Bartell <paul.bartell@gmail.com>
* fixed cmakelists keeping in mind the suggestions
---------
Co-authored-by: Paul Bartell <paul.bartell@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com>
* Fix the comments in the CM3 and CM4 MPU Ports about the MPU Region numbers being loaded (#707)
Co-authored-by: Soren Ptak <skptak@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Update xSemaphoreGetStaticBuffer prototype in comment (#704)
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Correct the misspelled name (#708)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Keith Packard <keithpac@amazon.com>
Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com>
Signed-off-by: Sudeep Mohanty <sudp.mohanty@gmail.com>
Signed-off-by: kar-rahul-aws <karahulx@amazon.com>
Co-authored-by: Archit Gupta <71798289+archigup@users.noreply.github.com>
Co-authored-by: tcpluess <tpluess@ieee.org>
Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Chris Copeland <chris@chrisnc.net>
Co-authored-by: David J. Fiddes <35607151+davefiddes@users.noreply.github.com>
Co-authored-by: Dusan Cervenka <cervenka@acrios.com>
Co-authored-by: bbain <16752579+bbain@users.noreply.github.com>
Co-authored-by: Ju1He1 <93189163+Ju1He1@users.noreply.github.com>
Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com>
Co-authored-by: phelter <paulheltera@gmail.com>
Co-authored-by: jacky309 <jacques.guillou@gmail.com>
Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com>
Co-authored-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com>
Co-authored-by: Keith Packard <keithp@keithp.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com>
Co-authored-by: Kody Stribrny <89810515+kstribrnAmzn@users.noreply.github.com>
Co-authored-by: Holden <holden-zenithaerotech.com>
Co-authored-by: Darian <32921628+Dazza0@users.noreply.github.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal>
Co-authored-by: Nicolas <nicolas.brunner@heig-vd.ch>
Co-authored-by: Vo Trung Chi <chi.votrung@vn.bosch.com>
Co-authored-by: Sudeep Mohanty <91244425+sudeep-mohanty@users.noreply.github.com>
Co-authored-by: Monika Singh <108652024+moninom1@users.noreply.github.com>
Co-authored-by: Darian Leung <darian@espressif.com>
Co-authored-by: Tony Josi <tonyjosi@amazon.com>
Co-authored-by: Evgeny Ermakov <22344340+unspecd@users.noreply.github.com>
Co-authored-by: RichardBarry <3073890+RichardBarry@users.noreply.github.com>
Co-authored-by: Joris Putcuyps <joris.putcuyps@gmail.com>
Co-authored-by: Patrick Cook <114708437+cookpate@users.noreply.github.com>
Co-authored-by: Mr. Jake <norbertzpilicy@gmail.com>
Co-authored-by: Paul Bartell <paul.bartell@gmail.com>
Co-authored-by: Soren Ptak <Skptak@outlook.com>
Co-authored-by: Soren Ptak <skptak@amazon.com>
* Move default configNUMBER_OF_CORES definition forward in FreeRTOSConfig.h (#88)
* Move default configNUMBER_OF_CORES definition forward in FreeRTOSConfig.h.
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Signed-off-by: Xinyu Zhang <xinyu.zhang@arm.com>
Signed-off-by: Gabor Toth <gabor.toth@arm.com>
Signed-off-by: Cristian Cristea <cristiancristea00@gmail.com>
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Keith Packard <keithpac@amazon.com>
Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com>
Signed-off-by: Sudeep Mohanty <sudp.mohanty@gmail.com>
Signed-off-by: kar-rahul-aws <karahulx@amazon.com>
Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: AndreiCherniaev <dungeonlords789@yandex.ru>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Tanmoy Sen <33438891+tanmoysen@users.noreply.github.com>
Co-authored-by: Ravishankar Bhagavandas <bhagavar@amazon.com>
Co-authored-by: eddie9712 <qw1562435@gmail.com>
Co-authored-by: Graham Sanderson <graham.sanderson@raspberrypi.com>
Co-authored-by: graham sanderson <graham.sanderson@raspeberryi.com>
Co-authored-by: Xinyu Zhang <68640626+xinyu-tfm@users.noreply.github.com>
Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
Co-authored-by: NomiChirps <70026509+NomiChirps@users.noreply.github.com>
Co-authored-by: 0xjakob <18257824+0xjakob@users.noreply.github.com>
Co-authored-by: Jakob Hasse <0xjakob@users.noreply.github.com>
Co-authored-by: Xin Lin <47510956+xlin7799@users.noreply.github.com>
Co-authored-by: Patrick Oppenlander <patrick.oppenlander@gmail.com>
Co-authored-by: Gavin Lambert <uecasm@users.noreply.github.com>
Co-authored-by: Chris Copeland <chris@chrisnc.net>
Co-authored-by: RichardBarry <3073890+RichardBarry@users.noreply.github.com>
Co-authored-by: Paul Bartell <paul.bartell@gmail.com>
Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com>
Co-authored-by: Archit Gupta <71798289+archigup@users.noreply.github.com>
Co-authored-by: Monika Singh <108652024+moninom1@users.noreply.github.com>
Co-authored-by: Octaviarius <gomanchuk.as@gmail.com>
Co-authored-by: Jakub Lužný <jakub@luzny.cz>
Co-authored-by: newbrain <17814222+newbrain@users.noreply.github.com>
Co-authored-by: Gabor Toth <gabor.toth@arm.com>
Co-authored-by: Ming Yue <mingyue86010@gmail.com>
Co-authored-by: David Chalco <david@chalco.io>
Co-authored-by: Cristian Cristea <cristiancristea00@gmail.com>
Co-authored-by: Jeff Tenney <jeff.tenney@gmail.com>
Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
Co-authored-by: abhidixi11 <44424462+abhidixi11@users.noreply.github.com>
Co-authored-by: Laukik Hase <laukik.hase@espressif.com>
Co-authored-by: arshi016 <arshilife16@gmail.com>
Co-authored-by: Niklas Gürtler <Erlkoenig90@users.noreply.github.com>
Co-authored-by: Niklas Gürtler <niklas.guertler@tacterion.com>
Co-authored-by: Hardy Griech <ntbox@gmx.net>
Co-authored-by: Darian <32921628+Dazza0@users.noreply.github.com>
Co-authored-by: tcpluess <tpluess@ieee.org>
Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch>
Co-authored-by: David J. Fiddes <35607151+davefiddes@users.noreply.github.com>
Co-authored-by: Dusan Cervenka <cervenka@acrios.com>
Co-authored-by: bbain <16752579+bbain@users.noreply.github.com>
Co-authored-by: Ju1He1 <93189163+Ju1He1@users.noreply.github.com>
Co-authored-by: phelter <paulheltera@gmail.com>
Co-authored-by: jacky309 <jacques.guillou@gmail.com>
Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com>
Co-authored-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com>
Co-authored-by: Keith Packard <keithp@keithp.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com>
Co-authored-by: Kody Stribrny <89810515+kstribrnAmzn@users.noreply.github.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal>
Co-authored-by: Nicolas <nicolas.brunner@heig-vd.ch>
Co-authored-by: Vo Trung Chi <chi.votrung@vn.bosch.com>
Co-authored-by: Sudeep Mohanty <91244425+sudeep-mohanty@users.noreply.github.com>
Co-authored-by: Darian Leung <darian@espressif.com>
Co-authored-by: Tony Josi <tonyjosi@amazon.com>
Co-authored-by: Evgeny Ermakov <22344340+unspecd@users.noreply.github.com>
Co-authored-by: Joris Putcuyps <joris.putcuyps@gmail.com>
Co-authored-by: Patrick Cook <114708437+cookpate@users.noreply.github.com>
Co-authored-by: Mr. Jake <norbertzpilicy@gmail.com>
Co-authored-by: Soren Ptak <Skptak@outlook.com>
Co-authored-by: Soren Ptak <skptak@amazon.com>
Memory Protection Unit (MPU) Enhancements
This commit introduces a new MPU wrapper that places additional
restrictions on unprivileged tasks. The following is the list of changes
introduced with the new MPU wrapper:
1. Opaque and indirectly verifiable integers for kernel object handles:
All the kernel object handles (for example, queue handles) are now
opaque integers. Previously object handles were raw pointers.
2. Saving the task context in Task Control Block (TCB): When a task is
swapped out by the scheduler, the task's context is now saved in its
TCB. Previously the task's context was saved on its stack.
3. Execute system calls on a separate privileged only stack: FreeRTOS
system calls, which execute with elevated privilege, now use a
separate privileged only stack. Previously system calls used the
calling task's stack. The application writer can control the size of
the system call stack using new configSYSTEM_CALL_STACK_SIZE config
macro.
4. Memory bounds checks: FreeRTOS system calls which accept a pointer
and de-reference it, now verify that the calling task has required
permissions to access the memory location referenced by the pointer.
5. System call restrictions: The following system calls are no longer
available to unprivileged tasks:
- vQueueDelete
- xQueueCreateMutex
- xQueueCreateMutexStatic
- xQueueCreateCountingSemaphore
- xQueueCreateCountingSemaphoreStatic
- xQueueGenericCreate
- xQueueGenericCreateStatic
- xQueueCreateSet
- xQueueRemoveFromSet
- xQueueGenericReset
- xTaskCreate
- xTaskCreateStatic
- vTaskDelete
- vTaskPrioritySet
- vTaskSuspendAll
- xTaskResumeAll
- xTaskGetHandle
- xTaskCallApplicationTaskHook
- vTaskList
- vTaskGetRunTimeStats
- xTaskCatchUpTicks
- xEventGroupCreate
- xEventGroupCreateStatic
- vEventGroupDelete
- xStreamBufferGenericCreate
- xStreamBufferGenericCreateStatic
- vStreamBufferDelete
- xStreamBufferReset
Also, an unprivileged task can no longer use vTaskSuspend to suspend
any task other than itself.
We thank the following people for their inputs in these enhancements:
- David Reiss of Meta Platforms, Inc.
- Lan Luo, Xinhui Shao, Yumeng Wei, Zixia Liu, Huaiyu Yan and Zhen Ling
of School of Computer Science and Engineering, Southeast University,
China.
- Xinwen Fu of Department of Computer Science, University of
Massachusetts Lowell, USA.
- Yuequi Chen, Zicheng Wang, Minghao Lin of University of Colorado
Boulder, USA.
* Fix circular dependency in cmake project
Fix for https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/687
In order for custom ports to also break the cycle, they must link
against freertos_kernel_include instead of freertos_kernel.
* Simplify include path
* Remove __NVIC_PRIO_BITS and configPRIO_BITS check in CM3, CM4 and ARMv8.
* Add hardware not implemented bits check. These bits should be zero.
---------
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Add croutines to the code base
* Add croutine changes to cmake, lexicon and readme
* Add croutine file to portable cmake file
* Add back more references from PR 591
The following is from the MSP430X instruction set -
```
MOVX.W Move source word to destination word.
The source operand is copied to the destination. The source operand is
not affected. Both operands may be located in the full address space.
```
The movx instruction allows both the operands to be located in the full
address space and therefore, works with large data model as well.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Armv8-M: Formatting changes
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
* Armv8-M: Add support for interrupt priority check
FreeRTOS provides `FromISR` system calls which can be called directly
from interrupt service routines. It is crucial that the priority of
these ISRs is set to same or lower value (numerically higher) than that
of `configMAX_SYSCALL_INTERRUPT_PRIORITY`. For more information refer
to https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html.
Add a check to trigger an assert when an ISR with priority higher
(numerically lower) than `configMAX_SYSCALL_INTERRUPT_PRIORITY` calls
`FromISR` system calls if `configASSERT` macro is defined.
In addition, add a config option
`configQEMU_DISABLE_INTERRUPT_PRIO_BITS_CHECK` to disable interrupt
priority check while running on QEMU. Based on the discussion
https://gitlab.com/qemu-project/qemu/-/issues/1122, The interrupt
priority bits in QEMU do not match the real hardware. Therefore the
assert that checks the number of implemented bits and __NVIC_PRIO_BITS
will always fail. The config option
`configQEMU_DISABLE_INTERRUPT_PRIO_BITS_CHECK` should be defined in the
`FreeRTOSConfig.h` for QEMU targets.
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
* Use SHPR2 for calculating interrupt priority bits
This removes the dependency on the secure software to mark the interrupt
as non-secure.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Fix cast alignment warning
Without this change, the code produces the following warning when
compiled with `-Wcast-align` flag:
```
cast increases required alignment of target type
```
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
This commit updates the checks for the variable uxSchedulerSuspended in
tasks.c module to use a uniform format.
Signed-off-by: Sudeep Mohanty <sudp.mohanty@gmail.com>
Adjust assertions related to the CMSIS __NVIC_PRIO_BITS and FreeRTOS
configPRIO_BITS configuration macros such that these macros specify the
minimum number of implemented priority bits supported by a config
build rather than the exact number of implemented priority bits.
Related to Qemu issue #1122
FreeRTOS-Kernel/portable/GCC/ARM_CM4F/port.c:399:41: error: conversion from 'uint32_t' {aka 'long unsigned int'} to 'uint8_t' {aka 'unsigned char'} may change value [-Werror=conversion]
Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com>
Heap 4 and Heap 5 add some padding to ensure that the allocated blocks
are always aligned to portBYTE_ALIGNMENT bytes. The code until now was
adding padding always even if the resulting block was already aligned.
This commits updates the code to only add padding if the resulting block
is not aligned.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Added various ...GetStaticBuffer() functions to get the buffers of statically
created objects.
---------
Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
* Run kernel demos and unit tests for PR changes
Kernel demos check builds multiple demos from FreeRTOS/FreeRTOS and
unit tests check runs unit tests in FreeRTOS/FreeRTOS. Both of these
checks currently use main branch of FreeRTOS-Kernel. This commits
updates these checks to use the changes in the PR.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Do not specify PR SHA explicitly as that is default
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Remove explicit PR SHA from kernel checks
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Fix freertos_kernel cmake property, Posix Port
* Moves the `set_property()` call below the target definition in top level CMakeLists file
* Corrects billion value from `ULL` suffix (not C90 compliant) to `UL` suffix with cast to uint64_t
* Add blank line to CMakeLists.txt
* Ensure configUSE_TASK_FPU_SUPPORT option is set correctly
If one does enable the FPU of the Cortex-R5 processor, then the GCC
compiler will define the macro __ARM_FP. This can be used to ensure,
that the configUSE_TASK_FPU_SUPPORT is set accordingly.
* Enable the implementation of vPortTaskUsesFPU only if configUSE_TASK_FPU_SUPPORT is set to 1
* Remove error case in pxPortInitialiseStack
The case of configUSE_TASK_FPU_SUPPORT is 0 is now handled
* Enable access to FPU registers only if FPU is enabled
* Make minor formating changes
* Format ARM Cortex-R5 port
* Address review comments from @ChristosZosi
* Minor code review suggestions
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Both the TLS block and stack must be correctly aligned when using
picolibc. The architecture stack alignment is represented by the
portBYTE_ALIGNMENT_MASK and the TLS block alignment is provided by the
Picolibc _tls_align() inline function for Picolibc version 1.8 and
above. For older versions of Picolibc, we'll assume that the TLS block
requires the same alignment as the stack.
For downward growing stacks, this requires aligning the start of the
TLS block to the maximum of the stack alignment and the TLS
alignment. With this, both the TLS block and stack will now be
correctly aligned.
For upward growing stacks, the two areas must be aligned
independently; the TLS block is aligned from the start of the stack,
then the tls space is allocated, and then the stack is aligned above
that.
It's probably useful to know here that the linker ensures that
variables within the TLS block are assigned offsets that match their
alignment requirements. If the TLS block itself is correctly aligned,
then everything within will also be.
I have only tested the downward growing stack branch of this patch.
Signed-off-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Interrupt priority assert improvements for CM3/4/7
In the ARM_CM3, ARM_CM4, and ARM_CM7 ports, change the assertion that
`configMAX_SYSCALL_INTERRUPT_PRIORITY` is nonzero to account for the
number of priority bits implemented by the hardware.
Change these ports to also use the lowest priority for PendSV and
SysTick, ignoring `configKERNEL_INTERRUPT_PRIORITY`.
* Remove not needed configKERNEL_INTERRUPT_PRIORITY define
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
* Pass top of stack to configINIT_TLS_BLOCK
Picolibc wants to allocate the per-task TLS block within the stack
segment, so it will need to modify the top of stack value. Pass the
pxTopOfStack variable to make this explicit.
Signed-off-by: Keith Packard <keithpac@amazon.com>
* Move newlib-specific definitions to separate file
This reduces the clutter in FreeRTOS.h caused by having newlib-specific
macros present there.
Signed-off-by: Keith Packard <keithpac@amazon.com>
* Make TLS code depend only on configUSE_C_RUNTIME_TLS_SUPPORT
Remove reference to configUSE_NEWLIB_REENTRANT as that only works
when using newlib. configUSE_C_RUNTIME_TLS_SUPPORT is always
set when configUSE_NEWLIB_REENTRANT is set, so using both was
redundant in that case.
Signed-off-by: Keith Packard <keithpac@amazon.com>
* portable-ARC: Adapt ARC support to use generalized TLS support
With generalized thread local storage (TLS) support present in the
core, the two ARC ports need to have the changes to the TCB mirrored
to them.
Signed-off-by: Keith Packard <keithpac@amazon.com>
* Add Thread Local Storage (TLS) support using Picolibc functions
This patch provides definitions of the general TLS support macros in
terms of the Picolibc TLS support functions.
Picolibc is normally configured to use TLS internally for all
variables that are intended to be task-local, so these changes are
necessary for picolibc to work correctly with FreeRTOS.
The picolibc helper functions rely on elements within the linker
script to arrange the TLS data in memory and define some symbols.
Applications wanting to use this mechanism will need changes in their
linker script when migrating to picolibc.
Signed-off-by: Keith Packard <keithpac@amazon.com>
---------
Signed-off-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Remove C99 requirement from CMake file
The kernel source is C89 compliant and does not need C99.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Explicitly set C89 requirement for kernel
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Introduced Github Status Badge for Unit Tests
* Github status badge to point to latest run
* Github status badge UT points to latest results
* Fixed URL for Github Status badge
---------
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
* Cortex-M35P: Add Cortex-M35P port
The Cortex-M35P support added to kernel. The port hasn't been
validated yet with TF-M. Hence TF-M support is not included in this
port.
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
* Add portNORETURN to the newly added portmacro.h
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
* Fix types in POSIX port
Use TaskFunction_t and StackType_t as other ports do.
* Fix portTICK_RATE_MICROSECONDS in POSIX port
---------
Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* Adding in ability to support a library for freertos_config and a custom freertos_kernel_port (#558)
* Using single name definition for libraries everywhere. (#558)
* Supporting backwards compatibility with FREERTOS_CONFIG_FILE_DIRECTORY (#571)
* Removing compiler warnings for GNU and Clang. (#571)
* Added in documentation on how to consume from a main project. Added default PORT selection for native POSIX and MINGW platforms.
* Only adding freertos_config if it exists. Removing auto generation of it from a FREERTOS_CONFIG_FILE_DIRECTORY.
* Fixing clang and gnu compiler warnings.
* Adding in project information and how to compile for GNU/clang
* Fixing compiler issue with unused variable - no need to declare variable.
* Adding in compile warnings for linux builds that kernel is okay with using.
* Fixing more extra-semi-stmt clang warnings.
* Moving definition of hooks into header files if features are enabled.
* Fixing formatting with uncrustify.
* Fixing merge conflicts with main merge.
* Fixing compiler errors due to merge issues and formatting.
* Fixing Line feeds.
* Adding 'portNORETURN' into portmacros.h. Other Updates based on PR request
* Further clean-up of clang and clang-tidy issues.
* Removing compiler specific pragmas from common c files.
* Fixing missing lexicon entry and uncrustify formatting changes.
* Resolving merge issue multiple defnitions of proto for prvIdleTask
* Fixing formatting issues that are not covered by uncrustify. Use clang-tidy instead if you want this level of control.
* More uncrustify formatting issues.
* Fixing extra bracket in #if statement.
---------
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
The PR #597 introduced a new config option configTICK_TYPE_WIDTH_IN_BITS
which can be defined to one of the following:
* TICK_TYPE_WIDTH_16_BITS - Tick type is 16 bit wide.
* TICK_TYPE_WIDTH_32_BITS - Tick type is 32 bit wide.
* TICK_TYPE_WIDTH_64_BITS - Tick type is 64 bit wide.
Earlier we supported 16 and 32 bit width for tick type which was
controlled using the config option configUSE_16_BIT_TICKS. The PR
tried to maintain backward compatibility by honoring
configUSE_16_BIT_TICKS. The backward compatibility did not work as
expected though, as the macro configTICK_TYPE_WIDTH_IN_BITS was used
before it was defined. This PR addresses it by ensuring that the macro
configTICK_TYPE_WIDTH_IN_BITS is defined before it is used.
Testing
1. configUSE_16_BIT_TICKS is defined to 0.
Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```
Assembly:
```
109e: 4b50 ldr r3, [pc, #320] ; (11e0 <xTaskIncrementTick+0x150>)
10a0: f8d3 4134 ldr.w r4, [r3, #308] ; 0x134
10a4: 3401 adds r4, #1
10a6: f8c3 4134 str.w r4, [r3, #308] ; 0x134
```
It is clear from assembly that the tick type is 32 bit.
2. configUSE_16_BIT_TICKS is defined to 1.
Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```
Assembly:
```
10e2: 4b53 ldr r3, [pc, #332] ; (1230 <xTaskIncrementTick+0x15c>)
10e4: f8b3 4134 ldrh.w r4, [r3, #308] ; 0x134
10e8: b2a4 uxth r4, r4
10ea: 3401 adds r4, #1
10ec: b2a4 uxth r4, r4
10ee: f8a3 4134 strh.w r4, [r3, #308] ; 0x134
```
It is clear from assembly that the tick type is 16 bit.
3. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_16_BITS.
Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```
Assembly:
```
10e2: 4b53 ldr r3, [pc, #332] ; (1230 <xTaskIncrementTick+0x15c>)
10e4: f8b3 4134 ldrh.w r4, [r3, #308] ; 0x134
10e8: b2a4 uxth r4, r4
10ea: 3401 adds r4, #1
10ec: b2a4 uxth r4, r4
10ee: f8a3 4134 strh.w r4, [r3, #308] ; 0x134
```
It is clear from assembly that the tick type is 16 bit.
4. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_32_BITS.
Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```
Assembly:
```
109e: 4b50 ldr r3, [pc, #320] ; (11e0 <xTaskIncrementTick+0x150>)
10a0: f8d3 4134 ldr.w r4, [r3, #308] ; 0x134
10a4: 3401 adds r4, #1
10a6: f8c3 4134 str.w r4, [r3, #308] ; 0x134
```
It is clear from assembly that the tick type is 32 bit.
5. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_64_BITS.
```
#error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
```
The testing was done for GCC/ARM_CM3 port which does not support 64 bit
tick type.
6. Neither configUSE_16_BIT_TICKS nor configTICK_TYPE_WIDTH_IN_BITS
defined.
```
#error Missing definition: One of configUSE_16_BIT_TICKS and
configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h.
See the Configuration section of the FreeRTOS API documentation for
details.
```
7. Both configUSE_16_BIT_TICKS and configTICK_TYPE_WIDTH_IN_BITS defined.
```
#error Only one of configUSE_16_BIT_TICKS and
configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h.
See the Configuration section of the FreeRTOS API documentation for
details.
```
Related issue - https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/628
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* make port exitable
* correctly set xPortRunning to False
* add suggestions from Review
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* add suggestions from Review
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
---------
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
The introduction of `portMEMORY_BARRIER` will ensure
the places in the kernel use a barrier will work.
For example, `xTaskResumeAll` has a memory barrier
to ensure its correctness when compiled with optimization
enabled. Without the barrier `xTaskResumeAll` can fail
(e.g. start reading and writing to address 0 and/or
infinite looping) when `xPendingReadyList` contains more
than one task to restore.
In `xTaskResumeAll` the compiler chooses to cache the
`pxTCB` the first time through the loop for use
in every subsequent loop. This is incorrect as the
removal of `pxTCB->xEventListItem` will actually
change the value of `pxTCB` if it was read again
at the top of the loop. The barrier forces the compiler
to read `pxTCB` again at the top of the loop.
The compiler is operating correctly. The removal
`pxTCB->xEventListItem` executes on a `List_t *`
and `ListItem_t *`. This means that the compiler
can assume that any `MiniListItem_t` values are
unchanged by the loop (i.e. "strict-aliasing").
This allows the compiler to cache `pxTCB` as it
is obtained via a `MiniListItem_t`. This is incorrect
in this case because it is possible for a `ListItem_t *`
to actually alias a `MiniListItem_t`. This is technically
a "violation of aliasing rules" so we use the the barrier
to disable the strict-aliasing optimization in this loop.
The quick start instructions for CMake mention the "master"
git branch which has been replaced by "main" in the current
repo.
The main CMakeLists.txt documents how to integrate a
custom port. Fix a typo in the suggested CMake code.
Allow ulTaskGetIdleRunTimeCounter and ulTaskGetIdleRunTimePercent to be
used whenever configGENERATE_RUN_TIME_STATS is enabled, as this is the
only requirement for these functions to work.
This is needed to be compatible with the refactoring done in this
PR - https://github.com/FreeRTOS/FreeRTOS/pull/889
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* vTaskResume and vTaskPrioritySet don't preempt equal priority task
* Update vTaskResumeAll not to preempt task with equal priority
* Fix in xTaskResumeFromISR
listGET_OWNER_OF_NEXT_ENTRY computes `( pxConstList )->pxIndex->pxNext` after
verifying that `( pxConstList )->pxIndex` points to `xListEnd`, which due to
being a MiniListItem_t, can be shorter than a ListItem_t. Thus,
`( pxConstList )->pxIndex` is a `ListItem_t *` that extends past the end of the
`List_t` whose `xListEnd` it points to. This is fixed by accessing `pxNext`
through a `MiniListItem_t` instead.
The .git-blame-ignore-revs allows easy filtering out large commits
from calls to git blame.
This can be configured frome the git command line via the following:
git config blame.ignoreRevsFile .git-blame-ignore-revs
Adds RV32E support to the IAR port. This is done by
reducing our register usage to the first 16 registers
only.
Influenced by changes in https://github.com/FreeRTOS/FreeRTOS-Kernel/pull/543
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
* Add support for the configUSE_TASK_FPU_SUPPORT in the GCC/ARM_CR5 port
This is done almost identically as in the GCC/ARM_CA9 port
* Adjust task stack initialitation of the GCC/ARM_CR5 port
Ensure that the task stack initialization is done correctly for the
different options of configUSE_TASK_FPU_SUPPORT.
This is very similar to the GCC/ARM_CA9 port. The only meaningful
difference is, that the FPU of the Cortex-R5 has just sixteen 64-bit
floating point registers as it implements the VFPv3-D16 architecture.
You may also refer to the ARM documentation
* Add support for FPU safe interrupts to the GCC/ARM_CR5 port
Similar to GCC/ARM_CA9 port
* Clarify comment about the size of the FPU registers of Cortex R5
* Fix context switch when time slicing is off
When time slicing is off, context switch should only happen when a
task with priority higher than the currently executing one is unblocked.
Earlier the code was invoking a context switch even when a task with
priority equal the currently executing task was unblocked. This commit
fixes the code to only do a context switch when a higher priority
task is unblocked.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Fix tickless idle when stopping systick on zero...
...and don't stop SysTick at all in the eAbortSleep case.
Prior to this commit, if vPortSuppressTicksAndSleep() happens to stop
the SysTick on zero, then after tickless idle ends, xTickCount advances
one full tick more than the time that actually elapsed as measured by
the SysTick. See "bug 1" in this forum post:
https://forums.freertos.org/t/ultasknotifytake-timeout-accuracy/9629/40
SysTick
-------
The SysTick is the hardware timer that provides the OS tick interrupt
in the official ports for Cortex M. SysTick starts counting down from
the value stored in its reload register. When SysTick reaches zero, it
requests an interrupt. On the next SysTick clock cycle, it loads the
counter again from the reload register. To get periodic interrupts
every N SysTick clock cycles, the reload register must be N - 1.
Bug Example
-----------
- Idle task calls vPortSuppressTicksAndSleep(xExpectedIdleTime = 2).
[Doesn't have to be "2" -- could be any number.]
- vPortSuppressTicksAndSleep() stops SysTick, and the current-count
register happens to stop on zero.
- SysTick ISR executes, setting xPendedTicks = 1
- vPortSuppressTicksAndSleep() masks interrupts and calls
eTaskConfirmSleepModeStatus() which confirms the sleep operation. ***
- vPortSuppressTicksAndSleep() configures SysTick for 1 full tick
(xExpectedIdleTime - 1) plus the current-count register (which is 0)
- One tick period elapses in sleep.
- SysTick wakes CPU, ISR executes and increments xPendedTicks to 2.
- vPortSuppressTicksAndSleep() calls vTaskStepTick(1), then returns.
- Idle task resumes scheduler, which increments xTickCount twice (for
xPendedTicks = 2)
In the end, two ticks elapsed as measured by SysTick, but the code
increments xTickCount three times. The root cause is that the code
assumes the SysTick current-count register always contains the number of
SysTick counts remaining in the current tick period. However, when the
current-count register is zero, there are ulTimerCountsForOneTick
counts remaining, not zero. This error is not the kind of time slippage
normally associated with tickless idle.
*** Note that a recent commit https://github.com/FreeRTOS/FreeRTOS-Kernel/commit/e1b98f0
results in eAbortSleep in this case, due to xPendedTicks != 0. That
commit does mostly resolve this bug without specifically mentioning
it, and without this commit. But that resolution allows the code in
port.c not to directly address the special case of stopping SysTick on
zero in any code or comments. That commit also generates additional
instances of eAbortSleep, and a second purpose of this commit is to
optimize how vPortSuppressTicksAndSleep() behaves for eAbortSleep, as
noted below.
This commit also includes an optimization to avoid stopping the SysTick
when eTaskConfirmSleepModeStatus() returns eAbortSleep. This
optimization belongs with this fix because the method of handling the
SysTick being stopped on zero changes with this optimization.
* Fix imminent tick rescheduled after tickless idle
Prior to this commit, if something other than systick wakes the CPU from
tickless idle, vPortSuppressTicksAndSleep() might cause xTickCount to
increment once too many times. See "bug 2" in this forum post:
https://forums.freertos.org/t/ultasknotifytake-timeout-accuracy/9629/40
SysTick
-------
The SysTick is the hardware timer that provides the OS tick interrupt
in the official ports for Cortex M. SysTick starts counting down from
the value stored in its reload register. When SysTick reaches zero, it
requests an interrupt. On the next SysTick clock cycle, it loads the
counter again from the reload register. To get periodic interrupts
every N SysTick clock cycles, the reload register must be N - 1.
Bug Example
-----------
- CPU is sleeping in vPortSuppressTicksAndSleep()
- Something other than the SysTick wakes the CPU.
- vPortSuppressTicksAndSleep() calculates the number of SysTick counts
until the next tick. The bug occurs only if this number is small.
- vPortSuppressTicksAndSleep() puts this small number into the SysTick
reload register, and starts SysTick.
- vPortSuppressTicksAndSleep() calls vTaskStepTick()
- While vTaskStepTick() executes, the SysTick expires. The ISR pends
because interrupts are masked, and SysTick starts a 2nd period still
based on the small number of counts in its reload register. This 2nd
period is undesirable and is likely to cause the error noted below.
- vPortSuppressTicksAndSleep() puts the normal tick duration into the
SysTick's reload register.
- vPortSuppressTicksAndSleep() unmasks interrupts before the SysTick
starts a new period based on the new value in the reload register.
[This is a race condition that can go either way, but for the bug
to occur, the race must play out this way.]
- The pending SysTick ISR executes and increments xPendedTicks.
- The SysTick expires again, finishing the second very small period, and
starts a new period this time based on the full tick duration.
- The SysTick ISR increments xPendedTicks (or xTickCount) even though
only a tiny fraction of a tick period has elapsed since the previous
tick.
The bug occurs when *two* consecutive small periods of the SysTick are
both counted as ticks. The root cause is a race caused by the small
SysTick period. If vPortSuppressTicksAndSleep() unmasks interrupts
*after* the small period expires but *before* the SysTick starts a
period based on the full tick period, then two small periods are
counted as ticks when only one should be counted.
The end result is xTickCount advancing nearly one full tick more than
time actually elapsed as measured by the SysTick. This is not the kind
of time slippage normally associated with tickless idle.
After this commit the code starts the SysTick and then immediately
modifies the reload register to ensure the very short cycle (if any) is
conducted only once. This strategy requires special consideration for
the build option that configures SysTick to use a divided clock. To
avoid waiting around for the SysTick to load value from the reload
register, the new code temporarily configures the SysTick to use the
undivided clock. The resulting timing error is typical for tickless
idle. The error (commonly known as drift or slippage in kernel time)
caused by this strategy is equivalent to one or two counts in
ulStoppedTimerCompensation.
This commit also updates comments and #define symbols related to the
SysTick clock option. The SysTick can optionally be clocked by a
divided version of the CPU clock (commonly divide-by-8). The new code
in this commit adjusts these comments and symbols to make them clearer
and more useful in configurations that use the divided clock. The fix
made in this commit requires the use of these symbols, as noted in the
code comments.
* Fix tickless idle with alternate systick clocking
Prior to this commit, in configurations using the alternate SysTick
clocking, vPortSuppressTicksAndSleep() might cause xTickCount to jump
ahead as much as the entire expected idle time or fall behind as much
as one full tick compared to time as measured by the SysTick.
SysTick
-------
The SysTick is the hardware timer that provides the OS tick interrupt
in the official ports for Cortex M. SysTick starts counting down from
the value stored in its reload register. When SysTick reaches zero, it
requests an interrupt. On the next SysTick clock cycle, it loads the
counter again from the reload register. The SysTick has a configuration
option to be clocked by an alternate clock besides the core clock.
This alternate clock is MCU dependent.
Scenarios Fixed
---------------
The new code in this commit handles the following scenarios that were
not handled correctly prior to this commit.
1. Before the sleep, vPortSuppressTicksAndSleep() stops the SysTick on
zero, long after SysTick reached zero. Prior to this commit, this
scenario caused xTickCount to jump ahead one full tick for the same
reason documented here: 0c7b04bd3a
2. After the sleep, vPortSuppressTicksAndSleep() stops the SysTick
before it loads the counter from the reload register. Prior to this
commit, this scenario caused xTickCount to jump ahead by the entire
expected idle time (xExpectedIdleTime) because the current-count
register is zero before it loads from the reload register.
3. Prior to return, vPortSuppressTicksAndSleep() attempts to start a
short SysTick period when the current SysTick clock cycle has a lot of
time remaining. Prior to this commit, this scenario could cause
xTickCount to fall behind by as much as nearly one full tick because the
short SysTick cycle never started.
Note that #3 is partially fixed by 967acc9b20
even though that commit addresses a different issue. So this commit
completes the partial fix.
* Improve comments and name of preprocessor symbol
Add a note in the code comments that SysTick requests an interrupt when
decrementing from 1 to 0, so that's why stopping SysTick on zero is a
special case. Readers might unknowingly assume that SysTick requests
an interrupt when wrapping from 0 back to the load-register value.
Reconsider new "_SETTING" suffix since "_CONFIG" suffix seems more
descriptive. The code relies on *both* of these preprocessor symbols:
portNVIC_SYSTICK_CLK_BIT
portNVIC_SYSTICK_CLK_BIT_CONFIG **new**
A meaningful suffix is really helpful to distinguish the two symbols.
* Revert introduction of 2nd name for NVIC register
When I added portNVIC_ICSR_REG I didn't realize there was already a
portNVIC_INT_CTRL_REG, which identifies the same register. Not good
to have both. Note that portNVIC_INT_CTRL_REG is defined in portmacro.h
and is already used in this file (port.c).
* Replicate to other Cortex M ports
Also set a new fiddle factor based on tests with a CM4F. I used gcc,
optimizing at -O1. Users can fine-tune as needed.
Also add configSYSTICK_CLOCK_HZ to the CM0 ports to be just like the
other Cortex M ports. This change allowed uniformity in the default
tickless implementations across all Cortex M ports. And CM0 is likely
to benefit from configSYSTICK_CLOCK_HZ, especially considering new CM0
devices with very fast CPU clock speeds.
* Revert changes to IAR-CM0-portmacro.h
portNVIC_INT_CTRL_REG was already defined in port.c. No need to define
it in portmacro.h.
* Handle edge cases with slow SysTick clock
Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
Co-authored-by: abhidixi11 <44424462+abhidixi11@users.noreply.github.com>
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>
* Add better pointer declaration readability
I revised the declaration of single-line pointers by splitting it into
multiple lines. Now, every pointer is declared (and initialized
accordingly) on its own line. This refactoring should enhance
readability and decrease the probability of error when a new pointer is
added/removed or a current one has its initialization value modified.
Signed-off-by: Cristian Cristea <cristiancristea00@gmail.com>
* Remove unnecessary whitespace characters and lines
It removes whitespace characters at the end of lines (empty or
othwerwise) and clear lines at the end of the file (only one remains).
It is an automatic operation done by git.
Signed-off-by: Cristian Cristea <cristiancristea00@gmail.com>
Signed-off-by: Cristian Cristea <cristiancristea00@gmail.com>
* Update RISC-V IAR port to support vector mode.
* uncrustify
Co-authored-by: David Chalco <david@chalco.io>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>
It was possible for an unprivileged task to invoke any function with
privilege by passing it as a parameter to MPU_xTaskCreate,
MPU_xTaskCreateStatic, MPU_xTimerCreate, MPU_xTimerCreateStatic, or
MPU_xTimerPendFunctionCall.
This commit ensures that MPU_xTaskCreate and MPU_xTaskCreateStatic can
only create unprivileged tasks. It also removes the following APIs:
1. MPU_xTimerCreate
2. MPU_xTimerCreateStatic
3. MPU_xTimerPendFunctionCall
We thank Huazhong University of Science and Technology for reporting
this issue.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
It was possible for a third party that had already independently gained
the ability to execute injected code to achieve further privilege
escalation by branching directly inside a FreeRTOS MPU API wrapper
function with a manually crafted stack frame. This commit removes the
local stack variable `xRunningPrivileged` so that a manually crafted
stack frame cannot be used for privilege escalation by branching
directly inside a FreeRTOS MPU API wrapper.
We thank Certibit Consulting, LLC, Huazhong University of Science and
Technology and the SecLab team at Northeastern University for reporting
this issue.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
ARMv7-M allows overlapping MPU regions. When 2 MPU regions overlap, the
MPU configuration of the higher numbered MPU region is applied. For
example, if a memory area is covered by 2 MPU regions 0 and 1, the
memory permissions for MPU region 1 are applied.
We use 5 MPU regions for kernel code and kernel data protections and
leave the remaining for the application writer. We were using lowest
numbered MPU regions (0-4) for kernel protections and leaving the
remaining for the application writer. The application writer could
configure those higher numbered MPU regions to override kernel
protections.
This commit changes the code to use highest numbered MPU regions for
kernel protections and leave the remaining for the application writer.
This ensures that the application writer cannot override kernel
protections.
We thank the SecLab team at Northeastern University for reporting this
issue.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Update of three badly terminated macro definitions
- vTaskDelayUntil() to conform to usual pattern do { ... } while(0)
- vTaskNotifyGiveFromISR() and
- vTaskGenericNotifyGiveFromISR() to remove extra terminating semicolons
- This PR addresses issues #553 and #554
* Adjust formatting of task.h
Co-authored-by: Paul Bartell <pbartell@amazon.com>
This allows the application write to set FREERTOS_CONFIG_FILE_DIRECTORY
to whichever directory the FreeRTOSConfig.h file exists in.
This was reported here - https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/545
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Generalize Thread Local Storage (TLS) support
FreeRTOS's Thread Local Storage (TLS) support used variables and
functions from newlib, thereby making the TLS support specific to
newlib. This commit generalizes the TLS support so that it can be used
with other c-runtime libraries also. The default behavior for newlib
support is still kept same for backward compatibility.
The application writer would need to set configUSE_C_RUNTIME_TLS_SUPPORT
to 1 in their FreeRTOSConfig.h and define the following macros to
support TLS for a c-runtime library:
1. configTLS_BLOCK_TYPE - Type used to define the TLS block in TCB.
2. configINIT_TLS_BLOCK( xTLSBlock ) - Allocate and initialize memory
block for the task's TLS Block.
3. configSET_TLS_BLOCK( xTLSBlock ) - Switch C-Runtime's TLS Block to
point to xTLSBlock.
4. configDEINIT_TLS_BLOCK( xTLSBlock ) - Free up the memory allocated
for the task's TLS Block.
The following is an example to support TLS for picolibc:
#define configUSE_C_RUNTIME_TLS_SUPPORT 1
#define configTLS_BLOCK_TYPE void*
#define configINIT_TLS_BLOCK( xTLSBlock ) _init_tls( xTLSBlock )
#define configSET_TLS_BLOCK( xTLSBlock ) _set_tls( xTLSBlock )
#define configDEINIT_TLS_BLOCK( xTLSBlock )
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
When the heap is exhausted (no free block), start and end markers are
the only blocks present in the free block list:
+---------------+ +-----------> NULL
| | |
| V |
+ ----- + + ----- +
| | | | | |
| | | | | |
+ ----- + + ----- +
xStart pxEnd
The code block which traverses the list of free blocks to calculate heap
stats used a do..while loop that moved past the end marker when the heap
had no free block resulting in a NULL pointer dereference. This commit
changes the do..while loop to while loop thereby ensuring that we never
move past the end marker.
This was reported here - https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/534
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Add xPortRemoveInterruptHandler API
This API is added to the MicroBlazeV9 port. It enables the application
writer to remove an interrupt handler.
This was originally contributed in this PR - https://github.com/FreeRTOS/FreeRTOS-Kernel/pull/523
* Change API signature to return void
This makes the API similar to vPortDisableInterrupt.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gavin Lambert <uecasm@users.noreply.github.com>
This fixes link failures with LTO:
/tmp/ccJbaKaD.ltrans0.ltrans.o: in function `pxCurrentTCBConst2':
/root/project/FreeRTOS/portable/GCC/ARM_CM4F/port.c:249: undefined reference to `pxCurrentTCB'
/usr/lib/gcc/arm-none-eabi/11.2.0/../../../../arm-none-eabi/bin/ld: /tmp/ccJbaKaD.ltrans0.ltrans.o: in function `pxCurrentTCBConst':
/root/project/FreeRTOS/portable/GCC/ARM_CM4F/port.c:443: undefined reference to `pxCurrentTCB'
* Clarify Cortex M7 r0p1 errata number in r0p1 specific port.
* Add ARM Cortex M7 r0p0 / r0p1 Errata 837070 workaround to CM4 MPU ports.
Optionally, enable the errata workaround by defining configTARGET_ARM_CM7_r0p0 or configTARGET_ARM_CM7_r0p1 in FreeRTOSConfig.h.
* Add r0p1 errata support to IAR port as well
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Change macro name to configENABLE_ERRATA_837070_WORKAROUND
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
This commits adds a check that INCLUDE_xTaskGetCurrentTaskHandle is
set to 1. A compile time error message is produced if it is not set to
1. This is needed because stream_buffer.c uses xTaskGetCurrentTaskHandle.
This was reported here - https://forums.freertos.org/t/xstreambufferreceive-include-xtaskgetcur/15283
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
After the xEventGroupWaitBits in vProtLockInternalSpinUnlockWithWait there was an assertion about
pxYiledSpinLock being NULL, however when xEventGroupWaitBits returns, IRQs have been re-enabled
and so it is no longer safe to assert on the state which is protected by IRQs being disabled.
Co-authored-by: graham sanderson <graham.sanderson@raspeberryi.com>
* Let each stream/message can use its own sbSEND_COMPLETED
In FreeRTOS.h, set the default value of configUSE_SB_COMPLETED_CALLBACK
to zero, and add additional space for the function pointer when
the buffer created statically.
In stream_buffer.c, modify the macro of sbSEND_COMPLETED which let
the stream buffer to use its own implementation, and then add an
pointer to the stream buffer's structure, and modify the
implementation of the buffer creating and initializing
Co-authored-by: eddie9712 <qw1562435@gmail.com>
* Add supposrt for ARM CM55
* Fix file header
* Remove duplicate code
* Refactor portmacro.h
1. portmacro.h is re-factored into 2 parts - portmacrocommon.h which is
common to all ARMv8-M ports and portmacro.h which is different for
different compiler and architecture. This enables us to provide
Cortex-M55 ports without code duplication.
2. Update copy_files.py so that it copies Cortex-M55 ports correctly -
all files except portmacro.h are used from Cortex-M33 ports.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
vApplicationMallocFailedHook was declared in each Heap file. which forces users to declare it and can cause problems if the prototype of the function changes.
Co-authored-by: Pierre-Noel Bouteville <pnb990@gmail.com>
This is needed to support the case when SysTick timer is not clocked
from the same source as CPU. This support already exists in other
Cortex-M ports.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* replace duplicated if branch because empty by a comment to avoid warning/error with option GCC -Wduplicated-branches
* Missing ';'
* cosmetic comment
* update comment as suggested by Gaurav-Aggarwal-AWS
* cosmetic
Co-authored-by: Pierre-Noel Bouteville <pnb990@gmail.com>
* Add a guard around mpu_wrappers.c
This avoid linker errors when this file is accidently compiled in
projects using non-MPU ports.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Fix formatting check
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Update the size calculations such that we only need to check for add
overflow only once. Also, change the way we detect add overflow so that
we do not need to cause an overflow to detect an overflow.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
We use the MSB of the size member of a BlockLink_t to track whether not
a block is allocated. Consequently, the size must not be so large that
the MSB is set. The check to see if the MSB in the size is set needs to
be done after the final size (metadata + alignment) is calculated.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Heap improvements
This commit makes the following improvements:
1. Add a check to heap_2 to track if a memory block is allocated to the
application or not. The MSB of the size field is used for this
purpose. The same check already exists in heap_4 and heap_5. This
check prevents against double free.
2. Add a new flag configHEAP_CLEAR_MEMORY_ON_FREE to heap_2, heap_4 and
heap_5. The application writer can set it to 1 in their
FreeRTOSConfig.h to ensure that a block of memory allocated using
pvPortMalloc is cleared (i.e. set to zero) when it is freed using
vPortFree. If left undefined, configHEAP_CLEAR_MEMORY_ON_FREE
defaults to 0 for backward compatibility. We recommend setting
configHEAP_CLEAR_MEMORY_ON_FREE to 1 for better security.
3. Add a new API pvPortCalloc to heap_2, heap_4 and heap_5. This API
has the following signature:
void * pvPortCalloc( size_t xNum, size_t xSize );
It allocates memory for an array of xNum objects each of which is of
xSize and initializes all bytes in the allocated storage to zero. If
allocation succeeds, it returns a pointer to the lowest byte in the
allocated memory block. On failure, it returns a null pointer.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Add support for 16 MPU regions to GCC Cortex-M33 TZ port
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Add support for 16 MPU regions to Cortex-M33 NTZ GCC port
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
The configuration was updated using
uncrustify -c .github/uncrustify.cfg -o .github/uncrustify.cfg --update-config-with-doc
to align with the actually used uncrustify version used, i.e., all
configuration is now explicitly set (and no longer implicit).
The files that are common to all ports ("portable/MemMang*" and
"portable/Common/mpu_wrappers.c" are now also autoformatted.
Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>
* Add CMake build
Allows to build and link FreeRTOS using CMake build system.
From top-level project it looks like this:
set(FREERTOS_PORT_GCC_ARM_CM4F ON)
set(FREERTOS_CONFIG_FILE_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR} CACHE STRING "")
add_subdirectory(third_party/FreeRTOS-Kernel)
Where FREERTOS_PORT_GCC_ARM_CM4F is FreeRTOS port name.
freertos is target name, which can be used in target_link_libraries()
* Add feature to set custom heap source file
Example how to set it from top-level project:
set(FREERTOS_HEAP ${CMAKE_CURRENT_LIST_DIR}/path_to/my_heap.c CACHE STRING "")
* Set cmake_minimum_required to 3.15
* Fail build when FREERTOS_CONFIG_FILE_DIRECTORY not set
* Rename library to freertos_kernel
* Rework FREERTOS_PORT option to act as combobox
* Use freertos_kernel_port cmake target
* Split port sources multiline
Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com>
Co-authored-by: Paul Bartell <pbartell@amazon.com>
* Add configUSE_MINI_LIST_ITEM configuration option to enable the MiniListItem_t type.
When configUSE_MINI_LIST_ITEM == 0:
MiniListItem_t and ListItem_t are both typedefs of struct xLIST_ITEM.
When configUSE_MINI_LIST_ITEM == 1 (the default in projdefs.h):
MiniListItem_t is a typedef of struct xMINI_LIST_ITEM, which contains 3 fewer fields than a struct xLIST_ITEM.
This configuration saves approximately sizeof(TickType_t) + 2 * sizeof( void * ) bytes of ram, however it also violates strict aliasing rules which some compilers depend on for optimization.
configUSE_MINI_LIST_ITEM defaults to 1 when not defined.
* Add pp_indent_brace option to uncrustify config
Improves compliance with the FreeRTOS code style guide:
https://www.freertos.org/FreeRTOS-Coding-Standard-and-Style-Guide.html
* Fix support for stepping maximum number of ticks
This commit fixes support for tickless implementations that call
vTaskStepTick() with the maximum number of allowed ticks to step.
vTaskStepTick()
---------------
Function vTaskStepTick() provides a way for the tickless idle
implementation to account for ticks that elapse during tickless idle.
The maximum number of stepped ticks allowed is the number passed to
portSUPPRESS_TICKS_AND_SLEEP(). It is the number of ticks between
xTickCount and xNextTaskUnblockTime.
vTaskStepTick() is specifically intended for use with tickless idle,
so it always executes with the scheduler disabled. For reference,
compare it with the more general function xTaskCatchUpTicks().
Without this Change
-------------------
Prior to this commit, if a task is supposed to wake at xTickCount ==
0xFFFFFFFF, then when tickless idle ends, function vTaskStepTick()
sets the tick to 0xFFFFFFFF but the task remains on the delayed list
because xTaskIncrementTick() does not execute. One tick later,
xTaskIncrementTick() executes because it's time to increment xTickCount
to 0x00000000. An assertion failure occurs in
taskSWITCH_DELAYED_LISTS() because the delayed task list is not
empty. Other examples of valling vTaskStepTick() with the maximum
allowed number of ticks merely result in a task waking one tick late.
Default Tickless Implementations
--------------------------------
Note that the default tickless implementations never pass the maximum
allowed value to vTaskStepTick(). The default implementations use the
tick interrupt to finish the sleep and allow that one tick to be
counted normally via the tick ISR and xTaskIncrementTick().
* Protect xPendedTicks with critical section
Function xTaskIncrementTick() increments xPendedTicks when the
scheduler is disabled. That function typically executes inside the tick
ISR. So code in xTaskCatchUpTicks() must mask interrupts when modifying
xPendedTicks.
* uncrustify tasks.c
* Update tasks.c
Style changes only - added comment and indentation to the two modified files.
* uncrustify
* Add test coverage for new conditional
* Add typecast
Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
Co-authored-by: RichardBarry <3073890+RichardBarry@users.noreply.github.com>
Add a cap to the queue locks
cRxLock and cTxLock members of the queue data structure count the
number items received and sent to the queue while the queue was locked.
These are later used to unblock tasks waiting on the queue when the
queue is unlocked. The data type of these members is int8_t and this can
trigger overflow check assert if an ISR continuously reads/writes to the
queue in a loop as reported in this issue: https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/419.
Note due to the length of the operation is it not recommended to write to
the queue that many times from an ISR - stream buffers are a better option,
or alternatively, defer the operation to a task by just having the ISR send a
direct to task notification to unblock the task.
This PR caps the values of the cRxLock and cTxLock to the number of tasks in
the system because we cannot unblocks more tasks than there are in the system.
Note that the same assert could still be triggered is the application creates more
than 127 tasks.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* fix alignment exception for ullPortInterruptNesting.
While loading (LDR X5, ullPortInterruptNestingConst) the ullPortInterruptNesting
variable, the program control seems to be stuck and there is no abort or stack
trace observed (as there is no exception handler is installed to catch unaligned
access exception).
Program control moves forward, if one just declares this varible to be 2 bytes
aligned but then varible is not updated properly.
One of my colleague, pointed out that issue is due to the fact that
ullPortInterruptNesting must be at 8 bytes aligned address but since
"vApplicationIRQHandler" (that has 4 bytes of address) is sitting between
two 8 bytes aligned addresses that forces ullPortInterruptNesting to be at
4 byte aligned address, causing all sort of mess.
It works on QEMU (on ARM64) as it is, since there is no such check for
unaligned access but on real hardware it is prohibited.
Workaround to this problem is, either we skip 4 byets (using .align 4) after
vApplicationIRQHandler declaration or declare it the end of all declarations.
This commit does the latter one.
Signed-off-by: Amit Singh Tomar <atomar25opensource@gmail.com>
* Update portASM.S
Remove 1 tab = 4 spaces
Co-authored-by: Amit Singh Tomar <atomar25opensource@gmail.com>
Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
* RP2040: malloc needs to be thread safe for FreeRTOS whether both cores are used or not
* RP2040: CMake file had broken left over test code
* RP2040: portIS_FREE_RTOS_CORE() returned an incorrect value prior to scheduler init when the application was compiled without multicore support
* RP2040: Bad initialization code was causing IRQs to get disabled before main() was called when using non static allocation
This commit introduces a new config
configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS which enables developers to
prevent critical sections from unprivileged tasks. It defaults to 1 for
backward compatibility. Application should set it to 0 to disable
critical sections from unprivileged tasks.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
The example was trying to create a timer with period 0 which is not a
valid period.
This was reported here - https://forums.freertos.org/t/multiple-timers/13884
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
The public function xEventGroupWaitBits passes xTicksToWait to the
function vTaskPlaceOnUnorderedEventList, which passes the number of
ticks to prvAddCurrentTaskToDelayedList and sets xCanBlockIndefinitely
to pdTRUE, causing the latter to block indefinitely if
xTicksToWait == portMAX_DELAY and INCLUDE_vTaskSuspend == 1.
There's already a portYIELD_FROM_ISR() macro that calls vPortYield() which wraps the FromISR code.
It doesn't appear that vPortYieldFromISR() is intended to be publicly accessible in this port so
I've marked it as private to silence the warning.
event_create() also got flagged due to missing void in prototype.
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
prvWriteMessageToBuffer wrote the first sbBYTES_TO_STORE_MESSAGE_LENGTH
bytes of the size_t-typed length to the buffer as the data length. While
this functions on little endian, it copies the wrong bytes on big
endian. This fix converts the length to configMESSAGE_BUFFER_LENGTH_TYPE
first, and then copies the exact amount, thus fixing the issue.
Additionally it adds an assert to verify the size is not greater than
the max value of configMESSAGE_BUFFER_LENGTH_TYPE; previously this would
truncate silently.
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Mention that FreeRTOS_IRQ_Handler should not be used for FIQs and the
reason for assuming Group 1 for Interrupt Acknowledge and End Of
Interrupt registers.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Let the FreeRTOS IRQ handler properly store and restore the ICCIAR
register value around the vApplicationIRQHandler() call.
Signed-off-by: Stephane Viau <stephane.viau@oss.nxp.com>
Co-authored-by: Stephane Viau <stephane.viau@oss.nxp.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
The secure side context management code now checks that the secure
context being saved or restored belongs to the task being switched-out
or switched-in respectively.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
This commit improves ARMv8-M security by pre-allocating secure-side task
context structures and changing how tasks reference a secure-side
context structure when calling a secure function. The new configuration
constant secureconfigMAX_SECURE_CONTEXTS sets the number of secure
context structures to pre-allocate. secureconfigMAX_SECURE_CONTEXTS
defaults to 8 if left undefined.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Example usage is actually correct, so remove the -1. but update
the incorrect parameter description for pucStreamBufferStorageArea
and pucMessageBufferStorageArea.
* Tidy up the 8051 sdcc port
* Replace tabs with spaces in SDCC Cygnal port.c file.
Co-authored-by: John Lin <shaojun.lin@delonghigroup.com>
Co-authored-by: Paul Bartell <pbartell@amazon.com>
* Indent contents of a taskENTER_CRITICAL/taskEXIT_CRITICAL block.
Move a few configASSERT() statements out of a path where they would always be triggered to prevent "condition is always true" compiler warnings.
* Replace configASSERT() positions due to unintended semantic change from the version where asserts were at the top of the file.
Co-authored-by: RichardBarry <richardbarry.c@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
* uncrustify with github workflows
* Fix find expression
* Add uncrustify configuration file
* Uncrustify some files
* uncrustify some more files
* uncrustify more files
* Fix whitespace at end of lines
Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
* Use cast to fix warnings.
* Remove all empty definitions of portCLEAN_UP_TCB( pxTCB ) and
portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) from ports.
When these are undefined, the default empty definition is defined
in FreeRTOS.h.
The difference between this port and portable/GCC/ARM_CA53_64_BIT is
that this port uses System Register interface to access CPU interface
while the other one uses Memory-mapped interface.
Signed-off-by: Gaurav Aggarwal
Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
* Introduce configRUN_TIME_COUNTER_TYPE which enables developers to define the type used to hold run time statistic counters. Defaults to uint32_t for backward compatibility. #define configRUN_TIME_COUNTER_TYPE to a type (for example, uint64_t) in FreeRTOSConfig.h to override the default.
Introduce ulTaskGetIdleRunTimePercent() to complement the pre-existing ulTaskGetIdleRunTimeCounter(). Whereas the pre-existing function returns the raw run time counter value, the new function returns the percentage of the entire run time consumed by the idle task. Note the amount of idle time is only a good measure of the slack time in a system if there are no other tasks executing at the idle priority, tickless
idle is not used, and configIDLE_SHOULD_YIELD is set to 0.
* Add ultaskgetidleruntimepercent to lexicon.txt.
* Update History file.
Add the MPU version of ulTaskGetIdleRunTimePercent().
* Update include/FreeRTOS.h to correct comment as per aggarg@ suggestion.
* Fix alignment in mpu_wrappers.h.
Commit changes to mpu_prototypes.h which were missed from the original commit.
event_wait_timed() was ignoring a timeout of 1000 ms.
Presumably this is because pthread_cond_timedwait() only
considers tv_nsec less than one second.
Convert the timeout in miliseconds to second and nanosecond
components to fix this.
Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>
* updated history.txt for 10.4.4
* Update the release date in History.txt
* added link to SMP branch to History.txt
* Added comment explaining the + in the version string
* corrected typos in the + comment
Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>
Co-authored-by: Paul Bartell <pbartell@amazon.com>
Adding text into this new field updates the following macros in task.h in the main branch:
tskKERNEL_VERSION_NUMBER (alphanumeric string)
tskKERNEL_VERSION_MAJOR (numeric only)
tskKERNEL_VERSION_MINOR (numeric only)
tskKERNEL_VERSION_BUILD (numeric only)
* Replace configASSERT( pcQueueName ) in vQueueAddToRegistry with a NULL pointer check.
FixesFreeRTOS/FreeRTOS-Kernel#311
* Make NULL checks consistent.
* Remove support for tmrCOMMAND_START_DONT_TRACE
Prior to this commit, the timer task used tmrCOMMAND_START_DONT_TRACE
to reload a "backlogged" auto-reload timer -- one for which a reload
operation would have started a period that had already elapsed. If the
command queue contained a stop or delete command when
tmrCOMMAND_START_DONT_TRACE was put into the queue for a reload, the
timer unexpectedly restarted when the timer task processed
tmrCOMMAND_START_DONT_TRACE. This commit implements a new method of
reloading auto-reload timers and eliminates support for
tmrCOMMAND_START_DONT_TRACE. No other code sends this private command.
However, the symbol tmrCOMMAND_START_DONT_TRACE remains defined, with
its original command value, so as not to impact trace applications.
Also fix one-shot timers that were not reliably being marked as not
active:
- when they expired before the start command could be processed
- when the expiration was processed during the timer list switch
Also improve consistency:
- Always reload auto-reload timers *before* calling the callback.
- Always call traceTIMER_EXPIRED() just prior to the callback.
* fix indent
* Revert unnecessary change to prvTimerTask()
Change was intended to faithfully work through a backlog that spanned a
list switch, and before processing a stop or delete command. But, (1)
it isn't important to do that, and (2) the code didn't accomplish the
intention when *two* auto-reload timers were backlogged across a list
switch. Best to simply leave this part of the code as it was before.
* fix style
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
Overwrite an existing entry for a given xQueue handle when vQueueAddToRegistry is called with an xQueue handle of a queue that is already in the QueueRegistry.
configSTACK_ALLOCATION_FROM_SEPARATE_HEAP was added recently in
https://github.com/FreeRTOS/FreeRTOS-Kernel/pull/267. This macro was
used in portable.h before its default value was defined, resulting in a
warning when built with -Wundef. This changes moves the default value
definition for configSTACK_ALLOCATION_FROM_SEPARATE_HEAP to portable.h
to ensure that it is defined before first use.
portUSING_MPU_WRAPPERS check in mpu_wrappers.h was updated in
https://github.com/FreeRTOS/FreeRTOS-Kernel/pull/285. The new check
results in a warning when built with -Wundef because
portUSING_MPU_WRAPPERS is not defined yet. This changes adds the default
value definition for portUSING_MPU_WRAPPERS to portable.h to ensure that
it is defined before first use.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Check NULL pointer input for vEventGroupDelete.
* Change the input parameter check with assertion.
Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
* Adjust portPOINTER_SIZE_TYPE to correct size
portPOINTER_SIZE_TYPE wasn't yet set correctly to be 16 bit
* Fixed FreeRTOS file header to comply with automatic checks
Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
The tick interrupt priority must be configured to ensure that it cannot
interrupt a critical section. This change updates the comment to help
the application writer while debugging.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Add an LCOV_BRANCH exception for the check that sizeof( StaticQueue_t ) == sizeof( Queue_t )
* Add LCOV_BRANCH coverage exception for a configASSERT on pxQueueSetContainer with a condition that is unreachable.
* Add configASSERTs to alert when invalid parameters are passed into Queue Registry related functions.
* Assert that the semaphore handle passed into xQueueGetMutexHolder is not NULL.
* Correct some typos in queue.c
* Update lexicon.txt
The change adds support for allocating task stacks from separate heap.
When configSTACK_ALLOCATION_FROM_SEPARATE_HEAP is defined as 1 in
FreeRTOSConfig.h, task stacks are allocated and freed using
pvPortMallocStack and vPortFreeStack functions. This allows the
application writer to provide a separate allocator for task stacks.
When configSTACK_ALLOCATION_FROM_SEPARATE_HEAP is defined as 0, task
stacks are allocated and freed using FreeRTOS heap functions
pvPortMalloc and vPortFree.
For backward compatibility, configSTACK_ALLOCATION_FROM_SEPARATE_HEAP
defaults to 0.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Update URL in history.txt
* Configure CI header checker to ignore .txt files
Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>
* Revert "Reintroduce Espressif's IDF v4.2 changes to ESP32 port (#193)"
This reverts commit 3d4d17178f.
* Update ESP32 port files to work with ESP-IDF v4.2 as well as ESP-IDF v3.3
Add changes required to support ESP32-S2
* portmacro.h: Change return type of vApplicationSleep to void
This fixes build failure when automatic light sleep is enabled
* prevent header checks for files with different licensing
Co-authored-by: David Chalco <david@chalco.io>
* decouple kernel check configs from fr/fr + checker sources from PR ref
* Combo of various small edits
* enable compatibility with git action + create autorelease action
This change removes the FreeRTOS System Calls (aka MPU wrappers) for the
following kernel APIs:
- xTaskCreateRestricted
- xTaskCreateRestrictedStatic
- vTaskAllocateMPURegions
A system call allows an unprivileged task to execute a kernel API which
is otherwise accessible to privileged software only. The above 3 APIs
can create a new task with a different MPU configuration or alter the
MPU configuration of an existing task. This an be (mis)used by an
unprivileged task to grant itself access to a region which it does not
have access to.
Removing the system calls for these APIs ensures that an unprivileged
task cannot execute this APIs. If an unprivileged task attempts to
execute any of these API, it will result in a Memory Fault.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Critical sections in FreeRTOS are implemented using the following two
functions:
void vPortEnterCritical( void )
{
portDISABLE_INTERRUPTS();
uxCriticalNesting++;
}
void vPortExitCritical( void )
{
uxCriticalNesting--;
if( uxCriticalNesting == 0 )
{
portENABLE_INTERRUPTS();
}
}
uxCriticalNesting is initialized to a large value at the start and set
to zero when the scheduler is started (xPortStartScheduler). As a
result, before the scheduler is started, a pair of enter/exit critical
section will leave the interrupts disabled because uxCriticalNesting
will not reach zero in the vPortExitCritical function. This is done to
ensure that the interrupts remain disabled from the time first FreeRTOS
API is called to the time when the scheduler is started. The scheduler
starting code is expected to enure that interrupts are enabled before
the first task starts executing.
Cortex-M33 ports were not enabling interrupts before starting the first
task and as a result, the first task was started with interrupts
disabled. This PR fixes the issue by ensuring that interrupts are
enabled before the first task is started.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Xtensa: fix the coproc_area incorrect issue
foss-xtensa/amazon-freertos#2 mentioned a issue:
1.
In function pxPortInitialiseStack(StackType_t *pxTopOfStack....)
p = (uint32_t *)(((uint32_t) pxTopOfStack - XT_CP_SIZE) & ~0xf);
In function prvInitialiseNewTask (file: task.c)
pxTopOfStack = (pxStack + (ulStackDepth - 1)) & (~portBYTE_ALIGNMENT_MASK)
So the co-processor area is at
p = (uint32_t *)(((uint32_t)((pxStack + (ulStackDepth - 1)) & (~portBYTE_ALIGNMENT_MASK)) - XT_CP_SIZE) & ~0xf);
2.
In function vPortStoreTaskMPUSettings( .... , StackType_t pxBottomOfStack ...)
xMPUSettings->coproc_area = (StackType_t)((((uint32_t)(pxBottomOfStack + usStackDepth - 1)) - XT_CP_SIZE) & ~0xf);
pxBottomOfStack = pxStack
=> xMPUSettings->coproc_area = (StackType_t*)((((uint32_t)(pxStack+ ulStackDepth - 1)) - XT_CP_SIZE ) & ~0xf);
The p is coproc_area that should be equal to xMPUSettings->coproc_area.
For example, assume pxStack is 0xa0000000, ulStackDepth is 0x2000,
portBYTE_ALIGNMENT_MASK is 0x7f, XT_CP_SIZE is 0x100.
The p = (uint32_t)(((uint32_t)((pxStack + (ulStackDepth - 1)) & (~portBYTE_ALIGNMENT_MASK)) - XT_CP_SIZE) & ~0xf)
= 0xa0001e80
The xMPUSettings->coproc_area = (StackType_t)((((uint32_t)(pxStack+ usStackDepth - 1)) - XT_CP_SIZE ) & ~0xf)
= 0xa0001ef0
Obviously, the p is not equal to the xMPUSettings->coproc_area, which will cause context switching error.
Signed-off-by: magicse7en <magicse7en@outlook.com>
* Update port.c
Co-authored-by: Carl Lundin <53273776+lundinc2@users.noreply.github.com>
In function pxPortInitialiseStack of port.c:
sp = ( StackType_t * ) ( ( ( UBaseType_t ) ( pxTopOfStack + 1 ) - XT_CP_SIZE - XT_STK_FRMSZ ) & ~0xf );
We assume XT_CP_SIZE is 0xE4, XT_STK_FRMSZ is 0xA0, pxTopOfStack is 0xA0000000, sp is 0x9FFFFE80.
From port.c, we know the frame->a1 as below:
frame->a1 = ( UBaseType_t ) sp + XT_STK_FRMSZ; /* physical top of stack frame */
So frame->a1 is 0x9FFFFF20. Therefore the interrupt stack frame range is 0x9FFFFE80 ~ 0x9FFFFF20.
The coproc_area is: p = ( uint32_t * ) ( ( ( uint32_t ) pxTopOfStack - XT_CP_SIZE ) & ~0xf );
So its value is 0x9FFFFF10. Obviously, the interrupt stack frame overlaps the coproc_area.
Co-authored-by: Carl Lundin <53273776+lundinc2@users.noreply.github.com>
If a higher priority task than the currently running task was resumed
using xTaskResumeFromISR and the user chose to ignore the return value
of xTaskResumeFromISR to initiate a context switch using
portYIELD_FROM_ISR, we were not doing the context switch on the next run
of the scheduler. This change fixes this by marking a yield as pending
to ensure that the context switch is performed on the next run of the
scheduler.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
This PR:
Changes the INCLUDE_vTaskDelayUntil compile time constant to INCLUDE_xTaskDelayUntil.
Updates FreeRTOS.h to ensure backward compatibility for projects that already have INCLUDE_vTaskDelayUntil defined.
Updates the MPU prototypes, wrapper and implementation to use the updated xTaskDelayUntil() function.
Tests to be checked into the FreeRTOS/FreeRTOS repository after this PR.
* Renamed old port to ESP_IDF_V3
* Update ESP32 port files to support IDF v4.2.
* Add changes required to support ESP32-S2
Co-authored-by: Shubham Kulkarni <shubham.kulkarni@espressif.com>
* Posix: Fix no task switching issue if a task ended
When the main function of a task exits, no task switching happened.
This is because all the remaining tasks are waiting on the condition
variable. The fix is to trigger a task switch and mark the exiting
task as "Dying" to be suspened and exited properly from the scheduler.
* Posix: Assert and stop if the Task function returned
* Posix: just assert if a task returned from its main function
Co-authored-by: alfred gedeon <alfred2g@hotmail.com>
* Posix: Free Idle task resources after ending the scheduler
In case of using Posix simulator and ending the scheduler, it does
not free the resources allocated by the idle task. This
causes the memory checkers (Valgrind, Address Sanitizers, ..) to
complain.
* Posix: Free the condition variable memory in the correct place
In case of deleting a task from another task, the deletion happens
immediately and the thread is canceled but the memory allocated by
the task condition variable is not freed. This causes the memory
checkers (Valgrind, Address sanitizers, ..) to complain.
* Posix: End Timer thread and free its resources after ending the scheduler
* Maintenance: Add readme.txt in each Renesas RX folder to show recomended port
* Update readme.txt in each Renesas RX folder regarding to Notes *1 and *2 (both are RX100 port)
* Remove non needed spell checks
* FreeRTOS Kernel Spelling Update (#170)
* FreeRTOS Kernel Spelling Update
* Added spell check to kernel repository.
* Fixed small spelling errors in various kernel source files.
* Added documentation for spellcheck.
Note: Only kernel files are checked for spelling, and portable files are ignored.
* Fix exit 0
* Remove spell
* add echo
* Call script from ci
* Fix script location
* Print pwd
* Fix script
* Fix script
* Remove some lines from script
* uncomment lines and fix exit
* use bash instead of sh
* Move url checker to the action directory
* Separate spell and url checkers
* Fix bad merge from master
* Fix yml file error
* Add another step to the url checker
Co-authored-by: Carl Lundin <53273776+lundinc2@users.noreply.github.com>
* Style: fix some broken/redirect links
* Fix: atmel url
* Fix microchip typo
* Fix url links
* Fix shortcut link
* Comment: fix line wrapping
* Style: fix line wrapping to 80 chars
* Add now microchip beside Atmel
* Fix link in History
* Add Now Microchip before Atmel link
* Comment: add *
* FreeRTOS Kernel Spelling Update
* Added spell check to kernel repository.
* Fixed small spelling errors in various kernel source files.
* Added documentation for spellcheck.
Note: Only kernel files are checked for spelling, and portable files are ignored.
* Change vPortSetupTimerInterrupt in order to have 64bits access on rv64
* Support RV32E - RISC-V architecture (GCC)
Signed-off-by: Emmanuel Puerto <emmanuel.puerto@sifive.com>
* Support FPU - RISC-V architecture (GCC)
Signed-off-by: Emmanuel Puerto <emmanuel.puerto@sifive.com>
* Fix interrupt managment and FPU initialization
* Synopsys Port: Adding support to Synopsys ARC v1 series cores
ARC v1 cores include ARC605, ARC610d, and ARC710d
Signed-off-by: Yuguo Zou <yuguo.zou@synopsys.com>
* Synopsys ARC v1 port: run uncrustify to fix code style
Signed-off-by: Yuguo Zou <yuguo.zou@synopsys.com>
* Synopsys port: modify license headers, change copyright only
Signed-off-by: Yuguo Zou <yuguo.zou@synopsys.com>
* Replace the following code that was used to force an assert:
configASSERT( pxTCB->ulNotifiedValue[ uxIndexToNotify ] == ~0UL );
with:
configASSERT( xTickCount == ( TickType_t ) 0 );
Because the former generates a warning on 64-bit architectures.
* Add RX200 GCC compiler
Signed-off-by: Dinh Van Nam <vannam.dinh.xt@renesas.com>
* Update GCC compiler for:
* RX600v2
* RX600
* RX100
Signed-off-by: Dinh Van Nam <vannam.dinh.xt@renesas.com>
* Use configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H flag
* Use configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H flag RX100, RX200
Co-authored-by: Dinh Van Nam <vannam.dinh.xt@renesas.com>
* Style: make freertos.org = FreeRTOS.org also add https
* Style: Fix freertos into FreeRTOS
* Style: Fix freertos into FreeRTOS
Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
* Style: Change FreeRTOS websites in comments
* Style: Change freertos to FreeRTOS in comments
* Style: Remove broken link
Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
* Removing StackMacros.h
* Moving 4 Function Prototypes out of the C files into the headers
* Revert "Removing StackMacros.h"
This reverts commit cdd8307817.
Add necessary checks when sending data to the stream/message buffer in order to avoid a task deadlock when attempting to write a longer stream/message than the underlying buffer can write.
* Update port.c
I discovered a very snicky and tricky race condition scenario when integrating tracealyzer code into our project.
A little background on CortexR5 : When the IRQ line (comming from the interrupt controller, to which every peripheral IRQ lines connect) of the processor rises and the IRQ Enable bit in the status register of the CPU permits it, the CPU traps into interrupt mode. Several things happen. First, the CPU finishes the instruction it was performing. Second, it places the content of the CPSR register into the SPSR_irq register. And third, the mode of the CPU is changed to IRQ_Mode and /!\ THE IRQ ENABLE BIT IN CPSR_irq IS AUTOMATICALLY CLEARED /!\. The reason is to ensure that upon landing into IRQ code, we find ourselves automatically in a critical section because we cannot be interrupted again because the bit is cleared. The programmer can, if he wants, re-enable IRQs inside IRQ code itself to allow interrupt nesting. But it has to be wanted and meditated.
Now, inside portASM.S, at the end of 'FreeRTOS_IRQ_Handler' assembly function, a call to 'vTaskSwitchContextConst' is made if the variable 'ulPortYieldRequired' was set by someone while executing the interrupt. Before branching to that function, a 'CPSID i' instruction was placed to ensure that interrupts are disabled in case someone re-enabled it. Inside 'vTaskSwitchContext', there is the macro 'traceTASK_SWITCHED_OUT' that gets populated when tracing is enabled.
The bug is right there.. If the macro is populated and inside that macro there is a matching call to 'ulPortSetInterruptMask' and 'vPortClearInterruptMask', a race condition can occure is there is a OS Tick timer interrupt waiting at the interrupt controller's door. Upon calling 'vTaskSwitchContext', the interrupts are not masked in the interrupt controller, the only barrier against the CPU servicing that tick interrupt while already performing the function is that the IRQ Enable bit cleared. 'ulPortSetInterruptMask'
does what's its supposed to do, but doesn't take into account the IRQ Enable bit in CPSR. Wheter or not the bit was cleared, the function sets it at the end. When calling the matching 'vPortClearInterruptMask', the function clears the interrupt mask in the interrupt controller. Because the IRQ Enable bit (that was cleared) has been set no matter what in 'ulPortSetInterruptMask', the CPU services the OS Tick Interrupt right away.
The bug is there : instead of completing the 'vTaskSwitchContext' function, the CPU re-enters the switch context path right after 'traceTASK_SWITCHED_OUT' thus corrupting the CPU state and eventually triggering either an undefined instruction, data or instruction abort.
* Update port.c
Error on my part, this is the right inline asm code to retreive CPSR register
* Update port.c
Forgot an * while writing comment..
ulTaskGenericNotifyValueClear() returned the notification value of the
currently running task, not the target task. Now it returns the
notification value of the target task.
Some users expected xTaskCheckForTimeOut() to clear the 'last wake time'
value each time a timeout occurred, whereas it only did that in one path.
It now clears the last wake time in all paths that return that a timeout
occurred.
The TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits define
the memory type, and where necessary the cacheable and shareable
properties of the memory region.
The default values for these bits, as configured in our MPU ports, are
sometimes not suitable for application. One such example is when the MCU
has a cache, the application writer may not want to mark the memory as
shareable to avoid disabling the cache. This change allows the
application writer to override default vales for TEX, S C and B bits for
Flash and RAM in their FreeRTOSConfig.h. The following two new
configurations are introduced:
- configTEX_S_C_B_FLASH
- configTEX_S_C_B_SRAM
If undefined, the default values for the above configurations are
TEX=000, S=1, C=1, B=1. This ensures backward compatibility.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Removed TICK_stop() macro from portable/GCC/{AVR_AVRDx, AVR_Mega0}/porthardware.h because it is not used anywhere.
* Updated indentation in portable/GCC/{AVR_AVRDx, AVR_Mega0}/* files.
* Added portable/IAR/{AVR_AVRDx, AVR_Mega0 folders.
The expected behaviour of portIS_PRIVILEGED is:
- return 0 if the processor is not running privileged.
- return 1 if the processor is running privileged.
Some TI ports do not return 1 when the processor is running privileged
causing the following check to fail: if( xRunningPrivileged != pdTRUE )
This commit change the check to: if( xRunningPrivileged == pdFALSE ). It
ensures that the check is successful even on the ports which return incorrect
value from portIS_PRIVILEGED when the processor is running privileged.
See https://forums.freertos.org/t/kernel-bug-nested-mpu-wrapper-calls-generate-an-exception/10391
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
configSYSTICK_CLOCK_HZ should be used to configure SysTick to support
the use case when the clock for SysTick timer is scaled from the main
CPU clock.
configSYSTICK_CLOCK_HZ is defined to configCPU_CLOCK_HZ when it is not
defined in FreeRTOSConfig.h.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
ARMv7-M supports 8 or 16 MPU regions. FreeRTOS Cortex-M4 MPU ports so
far assumed 8 regions. This change adds support for 16 MPU regions. The
hardware with 16 MPU regions must define configTOTAL_MPU_REGIONS to 16
in their FreeRTOSConfig.h.
If left undefined, it defaults to 8 for backward compatibility.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Update BSP APIs to latest version
Remove unused macro which could have caused warnings
(Code Style) Manually align some macros
Signed-off-by: Yuguo Zou <yuguo.zou@synopsys.com>
These definitions were not useful because the corresponding mapping was
removed from mpu_wrappers.h earlier.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
The reason for the change is that the register is called System Handler
Priority Register 3 (SHPR3).
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Some of the privileged symbols were not being placed in their respective
sections. This commit addresses those and places them in
privileged_functions or privileged_data section.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
If xTaskCreate API is used to create a task, the task's stack is
allocated on heap using pvPortMalloc. This places the task's stack
in the privileged data section, if the heap is placed in the
privileged data section.
We use a separate MPU region to grant a task access to its stack.
If the task's stack is in the privileged data section, this results in
overlapping MPU regions as privileged data section is already protected
using a separate MPU region. ARMv8-M does not allow overlapping MPU
regions and this results in a fault. This commit ensures to not use a
separate MPU region for the task's stack if it lies within the
privileged data section.
Note that if the heap memory is placed in the privileged data section,
the xTaskCreate API cannot be used to create an unprivileged task as
the task's stack will be in the privileged data section and the task
won't have access to it. xTaskCreateRestricted and
xTaskCreateRestrictedStatic API should be used to create unprivileged
tasks.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Added protection for xQueueGenericCreate
* prevent eventual invalid state change from int8 overflow
* Append period at end of comment. To be consistent with file.
* check operand, not destination
* parantheses -- to not show assumptive precendence
* Per request, less dependence on stdint by defining and checking against queueINT8_MAX instead
When Link Time Optimization (LTO) is enabled, some of the LDR
instructions result in out of range access. The reason is that the
default generated literal pool is too far and not within the permissible
range of 4K.
This commit adds LTORG assembly instructions at required places to
ensure that access to literals remain in the permissible range of 4K.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* * Renamed trace point in prvNotifyQueueSetContainer() so it isn't a duplicate of the trace point in xQueueGenericSend()
* * Fixed backwards compatibility.
Co-authored-by: Erik Tamlin <erik.tamlin@percepio.com>
Refer to https://www.freertos.org/a00133.html.
The issue with the implementation is that, if only stop kernel tick the program will keep executing current task.
The desired behavior is to at least return/jump to the next instruction after vTaskStartScheduler().
Signed-off-by: Yuhui Zheng <10982575+yuhui-zheng@users.noreply.github.com>
Description
Before this change each task had a single direct to task notification value and state as described here: https://www.FreeRTOS.org/RTOS-task-notifications.html. After this change each task has an array of task notifications, so more than one task notification value and state per task. The new FreeRTOSConfig.h compile time constant configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the array.
Each notification within the array operates independently - a task can only block on one notification within the array at a time and will not be unblocked by a notification sent to any other array index.
Task notifications were introduced as a light weight method for peripheral drivers to pass data and events to tasks without the need for an intermediary object such as a semaphore - for example, to unblock a task from an ISR when the operation of a peripheral completed. That use case only requires a single notification value. Their popularity and resultant expanded use cases have since made the single value a limitation - especially as FreeRTOS stream and message buffers themselves use the notification mechanism. This change resolves that limitation. Stream and message buffers still use the task notification at array index 0, but now application writers can avoid any conflict that might have with their own use of task notifications by using notifications at array indexes other than 0.
The pre-existing task notification API functions work in a backward compatible way by always using the task notification at array index 0. For each such function there is now an equivalent that is postfixed "Indexed" and takes an additional parameter to specify which index within the array it should operate upon. For example, xTaskNotify() is the original that only operates on array index 0. xTaskNotifyIndexed() is the new function that can operate on any array index.
Test Steps
The update is tested using the Win32 demo (PR to be created in the FreeRTOS/FreeRTOS github repo), which has been updated to build and run a new test file FreeRTOS/Demo/Common/Minimal/TaskNotifyArray.c. The tests in that file are in addition to, not a replacement for those in FreeRTOS/Demo/Common/Minimal/TaskNotify.c.
By submitting this pull request, I confirm that you can use, modify, copy, and redistribute this contribution, under the terms of your choice.
* fix: CLEAR MIE BIT IN INITIAL RISC-V MSTATUS VALUE
The MIE bit in the RISC-V MSTATUS register is used to globally enable
or disable interrupts. It is copied into the MPIE bit and cleared
on entry to an interrupt, and then copied back from the MPIE bit on
exit from an interrupt.
When a task is created it is given an initial MSTATUS value that is
derived from the current MSTATUS value with the MPIE bit force to 1,
but the MIE bit is not forced into any state. This change forces
the MIE bit to 0 (interrupts disabled).
Why:
If a task is created before the scheduler is started the MIE bit
will happen to be 0 (interrupts disabled), which is fine. If a
task is created after the scheduler has been started the MIE bit
is set (interrupts enabled), causing interrupts to unintentionally
become enabled inside the interrupt in which the task is first
moved to the running state - effectively breaking a critical
section which in turn could cause a crash if enabling interrupts
causes interrupts to nest. It is only an issue when starting a
newly created task that was created after the scheduler was started.
Related Issues:
https://forums.freertos.org/t/risc-v-port-pxportinitialisestack-issue-about-mstatus-value-onto-the-stack/9622
Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
Enabling Link Time Optimization (LTO) causes some of the functions used
in assembly to be incorrectly stripped off, resulting in linker error.
To avoid this, these functions are marked with portDONT_DISCARD macro,
definition of which is port specific. This commit adds the definition
of portDONT_DISCARD for ARMv7-M ports.
Signed-off-by: Gaurav Aggarwal
Problem Description
-------------------
The current flash organization in ARMv7-M MPU ports looks as follows:
__FLASH_segment_start__ ------->+-----------+<----- __FLASH_segment_start__
| Vector |
| Table |
| + |
| Kernel |
| Code |
+-----------+<----- __privileged_functions_end__
| |
| |
| |
| Other |
| Code |
| |
| |
| |
__FLASH_segment_end__ ------>+-----------+
The FreeRTOS kernel sets up the following MPU regions:
* Unprivileged Code - __FLASH_segment_start__ to __FLASH_segment_end__.
* Privileged Code - __FLASH_segment_start__ to __privileged_functions_end__.
The above setup assumes that the FreeRTOS kernel code
(i.e. privileged_functions) is placed at the beginning of the flash and,
therefore, uses __FLASH_segment_start__ as the starting location of the
privileged code. This prevents a user from placing the FreeRTOS kernel
code outside of flash (say to an external RAM) and still have vector
table at the beginning of flash (which is many times a hardware
requirement).
Solution
--------
This commit addresses the above limitation by using a new variable
__privileged_functions_start__ as the starting location of the
privileged code. This enables users to place the FreeRTOS kernel code
wherever they choose.
The FreeRTOS kernel now sets up the following MPU regions:
* Unprivileged Code - __FLASH_segment_start__ to __FLASH_segment_end__.
* Privileged Code - __privileged_functions_start__ to __privileged_functions_end__.
As a result, a user can now place the kernel code to an external RAM. A
possible organization is:
Flash External RAM
+------------+ +-----------+<------ __privileged_functions_start__
| Vector | | |
| Table | | |
| | | |
__FLASH_segment_start__ ----->+------------+ | Kernel |
| | | Code |
| | | |
| | | |
| | | |
| Other | | |
| Code | +-----------+<------ __privileged_functions_end__
| |
| |
| |
__FLASH_segment_end__ ----->+------------+
Note that the above configuration places the vector table in an unmapped
region. This is okay because we enable the background region, and so the
vector table will still be accessible to the privileged code and not
accessible to the unprivileged code (vector table is only needed by the
privileged code).
Backward Compatibility
----------------------
The FreeRTOS kernel code now uses a new variable, namely
__privileged_functions_start__, which needs to be exported from linker
script to indicate the starting location of the privileged code. All of
our existing demos already export this variable and therefore, they will
continue to work.
If a user has created a project which does not export this variable,
they will get a linker error for unresolved symbol
__privileged_functions_start__. They need to export a variable
__privileged_functions_start__ with the value equal to
__FLASH_segment_start__.
Issue
-----
https://sourceforge.net/p/freertos/feature-requests/56/
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
This is similar to the Windows port, allowing FreeRTOS kernel
applications to run as regular applications on Posix (Linux) systems.
You can use this in a 32-bit or 64-bit application (although there are
dynamic memory allocation trace points that do not support 64-bit
addresses).
Many of the same caveats of running an RTOS on a non-real-time system
apply, but this is still very useful for easy debugging/testing
applications in a simulated environment. In particular, it allows easy
use of tools such as valgrind.
You can call standard library functions from tasks but care must be
taken with any that internally take mutexes or block. This includes
malloc()/free() and many stdio functions (e.g., printf()).
Replacement malloc(), free(), realloc(), and calloc() functions are
provided which are safe. printf() needs to be called with a FreeRTOS
mutex help (or called from only a single task).
Each task is run in its own pthread, which makes debugging with
standard tools (such as GDB) easier backtraces for individual tasks
are available. Threads for non-running tasks are blocked in sigwait().
The stack for each task (thread) is allocated when the thread is
created, and the stack provided during task creation is not used. This
is so the stack has guard pages, to help with detecting stack
overflows.
Task switch is done by resuming the thread for the next task by
sending it the resume signal (SIGUSR1) and then suspending the current
thread.
The timer interrupt uses SIGALRM and care is taken to ensure that the
signal handler runs only on the thread for the current task.
The additional data needed per-thread is stored at the top on the
task's stack.
When a running task is being deleted, its thread is marked it as dying
so when we switch away from it it exits instead of suspending. This
ensures that even if the idle task doesn't run, threads are deleted
which allows for more threads to be created (if many tasks are being
created and deleted in rapid succession).
To further aid debugging, SIGINT (^C) is not blocked inside critical
sections. This allows it to be used break into GDB while in a critical
section. This means that care must be taken with any custom SIGINT
handlers as these are like NMIs.
This is somewhat inspired by an existing port by William Davy
(https://www.freertos.org/FreeRTOS-simulator-for-Linux.html) but it
takes a number of different approaches to make it switch tasks
reliableand there's little similarly with the original implementation.
- Critical sections block scheduling/"interrupts" by blocking signals
using pthread_sigmask(). This is more expensive than attempting to
use flags but works reliably and is analogous to the interrupt
enable/disable on real hardware.
- Care is take to ensure that the SIGALRM handler (for the timer tick)
is runnable only on the pthread for the running task. This makes
tasks switches more straight-forward and reliable as we can suspend
the thread while in the signal handler.
- Task switches save/restore the critical nesting on the stack.
- Only uses a single (SIGUSR1) signal which is ignored and thus GDB's
default signal handling options won't trap/print on this signal.
- Extra per-thread data is stored on the task's stack, making it
accessible in O(1) instead of performing a O(n) lookup of the array.
- Uses the task create/delete hooks in a similar way to the Windows
port, rather than overloading trace points.
Adding bug report, documentation, and general inquiry templates.
There's no easy way to redirect "general inquiry" directly to forum. If better option is available later, will update.
Move the prototype and documentation for xTaskCatchUpTicks() into the correct place in the task.h header file (in the public documentation from the private documentation).
Rename the variable that holds the return value in xTaskCatchUpTicks() to more accurately represent its meaning.
An error on trace argument.
In "xTaskPriorityDisinherit", the disinherit priority should be "pxTCB->uxBasePriority".
And, in "vTaskPriorityDisinheritAfterTimeout", the disinherit priority should be "uxPriorityToUse", which might not be "pxTCB->uxBasePriority".
xtensa_loadstore_handler.S uses _iram_end to prevent modification of IRAM
code. With the LoadStore exception handler in place, IRAM can also be
used for .bss and .data section. Hence the sanity check should be based
upon _iram_text_end and not _iram_end
+ The idle task decides to enter sleep mode on the following line.
```
if( xExpectedIdleTime >= configEXPECTED_IDLE_TIME_BEFORE_SLEEP )
```
+ The scheduler is suspended, preventing any context switches.
[Potentially a tick interrupt could occur here. That could happen if other tasks executing consumed a lot of time since the above code line executed. If a tick interrupt occurs here the interrupt will be entered but the interrupt will not do anything other than increment xPendedTicks.]
+ The expected idle time is checked again. No context switches can occur now so the code will execute until the scheduler is unsuspended. Assuming configEXPECTED_IDLE_TIME_BEFORE_SLEEP is set to a sensible value, a tick interrupt won't occur for some time.
+ portSUPPRESS_TICKS_AND_SLEEP() is called.
+ The default implementation of the tickless function calls eTaskConfirmSleep() - which prior to this change does not return eAbortSleep even though xPendedTicks is not 0, and after this change does return eAbortSleep.
NOTE: Co-routines are a deprecated feature. This change was made to close off an old ticket as the source control transitions from SourceForge to Github.
Make clock setup functions weak symbols in ARMv8-M ports.
Update Cortex-M33 ports to use an interrupt mask in place of globally disabling interrupts, as per the other Cortex-M ports.
Projects under FreeRTOS-Labs directory are in beta, developers updating projects please make sure you are using the correct version of -CLI -TCP -Trace. If you must edit -CLI -TCP and -Trace, please ensure the copies are synced.
Notes:
- header has version 2.2.0.
- This sync did not bring in ./test directory, though we should.
- New NetworkInterfaces are introduced by this merge.
- Keil compiler support.
- FreeRTOS_IP.h new API xApplicationGetRandomNumber().
- FreeRTOS_IP_Private.h new eIPEvent_t eNetworkTxEvent.
- FreeRTOS_Stream_Buffer.h removing static xStreamBufferIsEmpty() and xStreamBufferIsFull().
- FreeRTOSConfigDefaults.h provides default ipconfigDNS_RECEIVE_BLOCK_TIME_TICKS.
- other type changes.
For projects depending on either of these two ports, please update your projects according to below:
Wiced_CY -- Use GCC/ARM_CRx_No_GIC instead.
nrf52840-dk -- Use GCC/ARM_CM7/r0p1 instead. Please note that, kernel port shall only take dependency on MCU core, not MCU peripherals. (Please take out RTC related from kernel port.) For low power feature (tickless) in FreeRTOS, please follow this page https://www.freertos.org/low-power-ARM-cortex-rtos.html. In case ARM_CM7/rop1 is missing any feature, reach out to us.
- System calls are now only allowed from kernel code. This change can be turned on
or off using configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY.
- MPU is disabled before reprogramming it and enabled afterwards to be compliant
with ARM recommendations.
Added tests for xTaskAbortDelayFromISR() into Demo/Common/Minimal/AbortDelay.c.
Added tests for ulTaskNotifyValueClear() into Demo/Common/Minimal/TaskNotify.c.
- Added back power static library for GCC and IAR. (Power management related interface definitions are in drivers/fsl_power.h. power.c is empty due to "implementation is in header file and power library")
- Note for GCC link: the command used for linking is `arm-none-eabi-gcc -nostdlib -L<additional lib search path> -Xlinker ... -o "CORTEX_M0+_LPC51U68_LPCXpresso.axf" <all *.o> -lpower`. Per GCC doc, static library name in file system is libpower.a.
- System calls are now only allowed from kernel code. This change can be turned on
or off using configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY.
- MPU is disabled before reprogramming it and enabled afterwards to be compliant
with ARM recommendations.
- System calls are now only allowed from kernel code. This change can be turned on
or off using configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY.
- MPU is disabled before reprogramming it and enabled afterwards to be compliant
with ARM recommendations.
- System calls are now only allowed from kernel code. This change can be turned on
or off using configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY.
- MPU is disabled before reprogramming it and enabled afterwards to be compliant
with ARM recommendations.
Earlier we were using hard-coded addresses for MPU setup which
were ensured to be the same as linker script setup. This change
updates the Keil uVision project for Nuvoton Numaker-PFM-M2351
to use the variables exported from the linker script. This ensures
that the MPU setup never goes out of sync with linker script.
Earlier we were using hard-coded addresses for MPU setup which
were ensured to be the same as linker script setup. This change
updates the Keil Simulator demo to use the variables exported
from the linker script. This ensures that the MPU setup does not
go out of sync with linker script.
IAR produces some warnings which can not be fixed in the source code because
then other compilers start generating warnings. We suppressed those warnings
in the project file before. This change moves the warning suppression from
project files to portmacro.h.
prvTransferConnect() now returns:
- pdTRUE: everything's good. pdTRUE = 1.
- -pdFREERTOS_ERRNO_ENOMEM: FreeRTOS_socket() failed. -pdFREERTOS_ERRNO_ENOMEM = -12.
- -pdFREERTOS_ERRNO_EINVAL || -pdFREERTOS_ERRNO_ECANCELED: FreeRTOS_bind() failed. Negative values.
Thus, at line 569 and line 617, needs to check != pdTRUE instead of == pdFALSE.
This commit is done on behalf of Alfred.
Update RISC-V ports so the interrupt stack is set to a known value before the scheduler is started if the interrupt stack is statically defined rather than re-using the main.c() stack.
Improve commenting in RISC-V GCC port.
Fix IAR RISC-V port so the first task starts with interrupts enabled.
Add references to third party page ref using newlib with FreeRTOS into the tasks.c file in each place newlib is referenced.
Move the position of the traceTASK_DELETE() trace macro in case of use with a memory allocator that writes over freed memory even when inside a critical section.
Efficiency improvement: Make sure xTaskIncrementTick() does not return pdTRUE when the scheduler is locked. This just prevents an unnecessary yield interrupt (unnecessary as it is ignored) when xYieldPending happens to be pdTRUE.
+ Added xTaskCatchUpTicks() which corrects the tick count value after the application code has held interrupts disabled for an extended period.
+ Updated the xTaskResumeAll() implementation so it uses the new xTaskCatchUpTicks() function mentioned above to unwind ticks that were pended while the scheduler was suspended.
+ Various maintenance on the message buffer, stream buffer and abort delay demos.
+ Change type of uxPendedTicks from UBaseType_t to TickType_t to ensure it has same type as variables it is compared to, and therefore also rename the variable xPendingTicks.
+ Correct spelling mistake within a comment that was common to all the ARMv7-M ports.
The cut down version of the task pool has only one task pool, namely,
system task pool. All the task pool API functions accept NULL as a
valid parameter for IotTaskPool_t and use the system task pool when
NULL is passed for the system task pool.
IOT_SYSTEM_TASKPOOL is defined to NULL to use system task pool and
therefore the above assert is no longer valid.
IotTaskPool_GetSystemTaskPool has been removed from the cut down version
of the task pool. define IOT_SYSTEM_TASKPOOL to NULL so that the MQTT library
builds successfully.
Use the new #defines in the iot_config.h.
The DNS cache entry size was not big enough to fit the DNS name and
as a result the DNS reply parsing code returned error. Increased the
size of the entry to ensure that the DNS name can fit in.
The example now creates a recyclable job, schedules it and returns it
back to the task pool when it is done. It then again creates a
recyclable job and ensures that the task pool the same job present
it its cache.
The macro taskRESET_READY_PRIORITY checks if the task being removed from the
ready list is the last one and only then resets the top ready priority
by calling portRESET_READY_PRIORITY. If we already know that it is the
last ready task being removed then there is no need to perform the check
again and the macro portRESET_READY_PRIORITY can be called directly. We were
doing the unnecessary check at two places and this commit fixes them.
This commit also increases the time period of check task to ensure that all
the demo tasks get a chance to run before the check is performed.
We had a copy of ARMCM33_DSP_FP_TZ_config.txt file within the project directory
and it used to get outdated with each release of MDK because of non-backward
compatible changes in MDK. This change removes the copy in the project and
instead uses the one shipped with the MDK installation.
IotTaskPool_CreateSystemTaskPool() calls synchronisation primitives, so cannot be called before the scheduler starts. Add a configASSERT() to ensure the scheduler is running when it executes.
IotTaskPool_CreateSystemTaskPool() can conceivably be called from multiple different libraries that depend on the thread pool. In this version _IotSystemTaskPool.running can be used to check the system task pool has not already been created. If the task pool has been created simply return from IotTaskPool_CreateSystemTaskPool() instead of re-creating it (which would leak memory and leave orphaned tasks).
Call taskENTER_CRITICAL() and taskEXIT_CRITICAL() directly in place of mapping them to TASKPOOL_ENTER_CRITICAL() and TASKPOOL_EXIT_CRITICAL() in the same file.
Rename _timerThread() _timerCallback(), as it is a callback function and not a thread.
Remove the unused flags parameter from _scheduleInternal().
portHAS_STACK_OVERFLOW_CHECKING was getting defined too late before
being used in portable.h for the platforms that do not have stack
overflow checking registers. This commit ensures that it is defined
before it is used.
tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE was not correctly defined resulting in
dynamically allocated TCB not being freed when MPU was enabled. This commit fixes
the definition to ensure that dynamically allocated RAM (Stack and TCB) is freed
always.
When dynamic allocation is not enabled, vPortFree is not available. The current code used
vPortFree and this resulted in linker error. This commit removes the use of vPortFree when
dynamic allocation is not enabled.
Added the portTASK_FUNCTION_PROTO macros around the timer task, as the macros are already used by the idle task.
Add a PDF of the RISC-V documentation into the repo as the web page is not yet live.
+ Switch positions of the asm functions used to start the kernel and handle traps to enable one to reference to the other.
+ Handle external interrupts (working with Renode emulator).
+ The _sp linker variable is now called __freertos_irq_stack_top.
+ Set configENABLE_BACKWARD_COMPATIBILITY to 1 in FreeRTOSConfig.h to account for the fact that a member of the List_t structure has been renamed.
+ Provide a dummy implementation of ulApplicationGetNextSequenceNumber() to prevent linker warnings.
which was brought into the main download in FreeRTOS V10.0.0. FreeRTOS+TCP can
be configured as a UDP only stack, and FreeRTOS+UDP does not contain the patches
applied to FreeRTOS+TCP.
Update to V2.0.7 of the TCP/IP stack:
+ Multiple security improvements and fixes in packet parsing routines, DNS
caching, and TCP sequence number and ID generation.
+ Disable NBNS and LLMNR by default.
+ Add TCP hang protection by default.
We thank Ori Karliner of Zimperium zLabs Team for reporting these issues.
Updated pvContainer member of list items to List_t * rather than void * as they are always contained in a list if anywhere.
Made EventGroupHandle_t typesafe pointer to forward referenced struct rather than void pointer.
Made TaskHandle_t typesafe pointer to forward referenced struct, rather than a void pointer.
Ensure tasks that are blocked indefinitely on a direct to task notification return their state as eBlocked, previously was returned as eSuspended - making its behaviour consistent with event objects.
Fix typo in stream_buffer.c where "size_t xBytesAvailable ); PRIVILEGED_FUNCTION" had the semicolon in the wrong place.
Add testing of Stream Buffers to the AbortDelay.c tests.
Guard inclusion of C code when FreeRTOSConfig.h is included from an assembly file in the ARM7_LPC2129_IAR demo.
Fix minor typos in the Windows demo comment blocks.
Update the MingW/Eclipse project to add a code coverage build configuration in addition to the existing Debug build configuration.
Update StreamBufferDemo.c so functions are called directly, rather than via configASSERT(), so their code coverage can be measured when configASSERT() is not defined.
In the Win32 port, replace the call to TerminateProcess() in vPortEndScheduler() with exit( 0 ) - which triggers the writing of the code coverage data to the disk.
Fix bug in ucStreamBufferGetStreamBufferType() - which is only used by the Percepio trace tool.
Update the line within vTaskStartScheduler() that was setting xTickCount to 0 to instead set it to configINITIAL_TICK_COUNT.
Update queue code to allow an overwrite operation on a queue that is in a queue set, and add prvTestQueueOverwriteWithQueueSet() to test function.
Update Eclipse Win32 project to bring it closer the the Visual Studio equivalent.
Correct definition of StaticTask_t in the case that portUSE_MPU_WRAPPERS is set to 1.
prvTaskCheckFreeStackSpace() now returns configSTACK_DEPTH_TYPE to allow return values greater than max uint16_t value if required.
xStreamBufferSend() and xStreamBufferReceive() no longer clear task notification bits - clearing was unnecessary as only the task notification state is used.
FreeRTOS+TCP: Improve print output when using WinPCap to assist in selecting the correct network interface.
FreeRTOS kernel: Fix extern "C" { in stream_buffer.h.
FreeRTOS kernel: Correct tskKERNEL_VERSION_NUMBER and tskKERNEL_VERSION_MAJOR constants for V10.
Ensure the currently executing task is printed correctly in vTaskList().
Correct alignment issue in GCC Cortex-R port that was preventing full floating point usage in interrupts (other ports will be updated likewise).
Update the UltraScale R5 demo to test the GCC Cortex-A9 port layer modification mentioned on the line above.
Added test code to GenQTest to test the new priority dis-inheritance functionality.
Allow the default names given to the Idle and Timer tasks to be overwridden by definitions in FreeRTOSConfig.h.
Introduce configSTACK_DEPTH_TYPE so the application writer change the type used to specify a stack size from uint16_t to whatever they like. Defaults to uint16_t if not defined.
Introduce configINITIAL_TICK_COUNT to allow users to start the tick count at something other than 0. Used for testing, but overflows can be better tested by setting configUSE_16_BIT_TICKS to 1.
Split xQueueGenericReceive() into xQueueReceive(), xQueuePeek() and xQueueSemaphoreTake() as the first step in refactoring xQueueGenericReceive().
Add Cortex-M3 port layer for Code Composer Studio - previously there was only a Cortex-M4F port.
Introduce configPRE_SUPPRESS_TICKS_AND_SLEEP_PROCESSING() to allow applications to prevent portSUPPRESS_TICKS_AND_SLEEP() being called. Previously the portPRE_SLEEP_PROCESSING() macro could only be used to abort entry into sleep time after clocks had been re-programmed for the distant wake time.
Introduce configINCLUDE_FREERTOS_TASK_C_ADDITIONS_H, which allows a user provided header file to be included at the bottom of the tasks.c source file, which can add user functions and access file scope data.
Replace global on/off switches used for lint errors with save/restore switches.
+ Add configASSERT() into ARM Cortex-M ports to check the number of priority
bit settings.
+ Clear the 'control' register before starting ARM Cortex-M4F ports in case
the FPU is used before the scheduler is started. This just saves a few
bytes on the main stack as it prevents space being left for a later save
of FPU registers.
+ Added xSemaphoreGetMutexHolderFromISR().
+ Corrected use of portNVIC_PENDSVSET to portNVIC_PENDSVSET_BIT in MPU ports.
- Clear the SysTick current value register before starting the SysTick (only required if something uses SysTick before starting the scheduler).
- Ensure atomic operations are thread safe by executing clrex in the context switch.
+ Set flash wait states on MSP432 demos.
+ Remove use of obsolete IO library in PIC32 demos.
+ Remove obsolete item left on stack of first task to run in the Cortex-M0 ports.
+ Correct IA32 GCC vPortExitCritical() implementation when configMAX_API_CALL_INTERRUPT_PRIORITY == portMAX_PRIORITY.
Add an MPU demo that uses the Keil simulator that also uses the Keil compiler.
Correct a few version numbers for files recently added to the repository.
Add RVDS ARM Cortex-M4F MPU port.
Increase the size of each buffer allocated to pbufs in the Microblaze lwIP demo to prevent pbufs chaining.
Use _start as the top of the stack for each Microblaze task, rather than NULL, as NULL was causing the Xilinx SDK to try and unwind the stack too far.
Tidy up CEC1302 demo.
Ensure bit 0 of the task address is clear when setting up stack of initial Cortex-M3/4/7 stacks (for strict compliance, although not practically necessary).
vTaskGetTaskInfo() changed to vTaskGetInfo() - with a macro added for backward compatibility.
Reduce the number of xTaskCreateStatic() parameters by having the function return the task handle, rather than pass the task handle out using a parameter. This is also consistent with other objectCreate() functions.
+ The MPU port is not supported in this revision number.
+ The documentation for the static allocation functions in the header files has not yet been updated for this revision.
Kernel updates:
+ Simplify the static allocation of objects implementation.
+ Introduce configSUPPORT_DYNAMIC_ALLOCATION in addition to the existing configSUPPORT_STATIC_ALLOCATION so FreeRTOS can be built without providing a heap at all.
Demo application updates:
+ Update the demos to take into account the new configSUPPORT_DYNAMIC_ALLOCATION constant.
+ Add an MSVC demo that only uses static allocation, and does not include a FreeRTOS heap.
+ Update the MSVC project to use both configSUPPORT_STATIC_ALLOCATION and configSUPPORT_DYNAMIC_ALLOCATION.
+ Update the MingW project to use only configSUPPORT_DYNAMIC_ALLOCATION.
Fix build error when configSUPPORT_STATIC_ALLOCATION and configNUM_THREAD_LOCAL_STORAGE_POINTERS were greater than zero at the same time.
Allow the pdMS_TO_TICKS macro to be overridden by a definition in FreeRTOSConfig.h.
- Remove the standard demo files that used the [long since deprecated] alternative API.
- Add standard demo task that tests the new xTaskAbortDelay() function.
- Update the Win32 Visual Studio project to use Visual Studio 2015 Community Edition.
- Rename the xGenericListItem TCB member to xStateListItem as it better describes the member's purpose.
+ Added xTaskAbortDelay() function, which causes a task to exit the Blocked state even before the timeout has expired or the event the task is waiting for has occurred.
+ For efficiency and code size reasons on some architectures, replace many instances of "== pdTRUE" with "!= pdFALSE".
- Major refactor to consolidate the multiple places where a task is removed from a ready list and placed in a delay list into a single function, reducing code size, and enabling the easy addition of up-coming functionality.
- Replace the enum used for task notification states with a uint8_t to reduce the TCB struct size with some compilers, and allow additional members to be added without increasing its size.
- Rearrange FreeRTOS.h so all INCLUDE_ defaults are grouped together.
+ Added xPortIsInsideInterrupt() to RVDS ARM CM4F port - the same will get added to other ports in time.
Demo application code:
+ Added first pass Microchip CEC1302 demo for Keil.
+ Harden the new StaticAllocation.c standard demo tasks against integer promotion rules causing problems on 16-bit architectures.
Add a member to the TaskStatus_t structure that is used to return the base address of the stack used by the task being queried.
Add xTaskGetTaskHandle() that allows the handle of a task to be looked up from the task's text name.
Continue to document the macros that allow RTOS objects to be created using statically allocated memory.
Introduced vApplicationDaemonTaskStartupHook(), which allows initialisation that that needs to be executed after the scheduler has been started to be executed from the RTOS daemon task.
Call prvResetNextTaskUnblockTime() in xTaskResumeAll() if a task is moved from the pending ready list - this can prevent an unnecessary wake from sleep mode if a task is unblocked by an interrupt while in a low power tickless state.
Move structures used for static allocation of tasks and queues into FreeRTOS.h from their individual API header files.
Add SAME70 Xplained Atmel Studio project.
Update SAMV71 Atmel Studio project to use Studio 7.
Revert some changes to GenQTest.c standard demo task which only function correctly when a queue registry was used.
Minor change to xQueueGenericReceive() to catch the extreme case of data being placed into a queue between a task timing out and leaving the xQueueGenericReceive() function.
Added xSemaphoreGetCount() macro.
Demo app changes:
Updated countsem.c to test the new xSemaphoreGetCount() macro.
+ Add the pre-existing 64-bit Cortex-A53 port layer into the head revision of the main repository.
Demo application updates:
+ Update Zynq demo to use SDK version 2015.4
+ Add task static allocation standard demo to Zynq demo.
+ Make the XScuGic object accessible outside of the vConfigureTickInterrupt(), again in the Zynq demo.
+ Introduced xTaskCreateStatic() to allow tasks to be created without any dynamic memory allocation.
+ When a task notification is used to unblock a task from an ISR, but the xHigherPriorityTaskWoken parameter is not used, then pend a context switch to occur during the next tick interrupt.
Demo application changes:
+ Updated TaskNotify.c to test the case where a task is unblocked by an ISR, but does not use its xHigherPriorityTaskWoken parameter.
+ Updated the Win32 MSVC project to test statically allocated tasks being created and deleted.
+ Introduced StaticAllocation.c standard demo task.
+ Previously, if a task was deleted, the memory allocated to the task by the RTOS was freed in the Idle task. Now if a task deletes another task the memory is freed immediately. The idle task is however still responsible for freeing the memory when a task deletes itself.
+ Added pcQueueGetQueueName() function to return the name of a queue from its handle, assuming the queue is registers.
Demo application:
+ Update GenQTest to exercise the new pcQueueGetQueueName() function.
+ Delete workspaces from old Eclipse examples, leaving just the projects.
+ Rework comments in the MSVC simply blinky demo.
+ Updated all ARM Cortex-M0 ports to include an additional ISB instruction as the scheduler is started.
Demo app files:
+ Fixex build issues in XMC1000 demos.
+ heap_1.c and heap_2.c now support configAPPLICATION_ALLOCATED_HEAP (heap_4.c already did) which allows the heap to be placed by the user rather than the linker.
Demo app changes:
+ SAMD20 project has been updated to use Atmel Studio 7.
+ Support tickless idle when configUSE_PREEMPTION is 0 (previously tickless idle was only supported when the pre-emptive scheduler was being used).
+ If a stack was statically allocated, then don't try freeing it if the TCB cannot be allocated.
+ Remove use of INCLUDE_xEventGroupsSetBitsFromISR() pre-processor macro, as it was not tested anyway.
Demo app changes:
+ Updated SAM4L Atmel Studio project to use Atmel Studio 7.
Kernel source changes:
- Added xTaskNotifyStateClear() API function.
- Added the GCC Cortex-R port (existed for a while) into the main download.
- Improved the IAR RL78 port's handling of different memory model combinations.
- Removed some compiler warnings in heap_5.c.
Demo app changes:
- Added example use of xTaskNotifyStateClear() to the TaskNotify standard demo tasks.
Bug fix - issue introduced in V8.2.2 when the current timer list is empty and the overflow timer list is not empty.
Add PIC32MZ EF (floating point) support and update the MZ demo project to test the flop context switching.
Improve efficiency of the stack overflow checking.
Add CLI to RX71M demo.
General tidy up of new RZ and RX projects - including ensuring the UART driver copes with 0 length strings.
Add stack overflow checking to the [old] PIC24 demo.
- Complete the demo projects for the RX113 using IAR, GCC and Renesas compilers by including a basic UART CLI.
Standard demo tasks:
- Add some volatile qualifiers to variables in IntQueue.c.
Add additional asserts into timers.c.
Trivial changes and changes in demo applications:
RX113 IAR project is not building and running.
Make FreeRTOS_SetupInterrupt() and FreeRTOS_ClearInterrupt() weak symbols in the Zynq SDK repository.
Correct typo in the port layer comments that was cut and paste into multiple files.
+ Added Renesas RXv2 port for IAR.
Demo apps:
+ Demo/Rename the CORTEX_R4F_T_GCC_IAR_ARM directory to just Rename the CORTEX_R4F_T_GCC_IAR.
+ Add IAR project for the RX113.
+ Add RX231 e2studio projects for the RX231.
- Remove configASSERT() if a queue cannot be created, malloc failed hook will be called anyway.
Demo apps:
- RZ/T blinky demo working, but still lots to do to improve the port.
FreeRTOS+Trace:
- Add trace macros for task notifications.
- Update to the latest trace recorder library.
Demo projects:
- Only include the CLI command to show run time states if configGENERATE_RUN_TIME_STATS is set to 1.
- Back out changes that allow mutexes to be given from a semaphore after tests showed issues that would not be fast to fix.
Demo projects:
- Update the Microblaze Kintex 7 project and BSP to use version 2015.2 of the Xilinx SDK.
Zynq ZC702 demo application:
Update the memcpy, memset and memcmp implementations so they don't err with -O3 optimisation.
Update to use the 2015.2 version of the SDK.
Kernel changes:
- Remove an assert that was preventing xQueueSendFromISR() being used to give a mutex from an ISR (mutexes cannot be given using xSemaphoreGiveFromISR()).
- Introduce xTaskNotifyAndQueryFromISR() as the interrupt safe version of xTaskNotifyAndQuery().
Common demo task changes:
- Update IntSemTest.c to prove the theory that it is safe to give a mutex type semaphore from an interrupt using xQueueSendFromISR() instead of xSemaphoreGiveFromISR().
- Update TaskNotify.c to test the new xTaskNotifyAndQuery() from ISR fuction.
Add additional NOPs as required by hardware manual.
Microblaze:
Previously a task inherited the exception enable state from the context from which xTaskCreate() was called. Now tasks all have exceptions enabled if they are enabled in the hardware.
Windows/GCC:
Improve the implementation of portGET_HIGHEST_PRIORITY.
Common code:
Simplify the pointer use in xQueueGenericCreate()
Demo apps:
Remove jpg images that were used to create web pages.
Fix capitalisation issues in some demos where some header files are incldued with the wrong case, preventing building on Linux.
Remove the Microblaze demos that are using obsolete tools.
Update main_blinky for the Windows port demo to include a software timer example.
Windows port: Add code to ensure Windows threads are truely suspended before resuming another thread.
Typo correction to the task notification standard demo task.
Correct case of some include file names to fix build issues on Linux.
+ The timer task now blocks indefinitely if there are no timers active, allowing eTaskConfirmSleepModeStatus to return eNoTasksWaitingTimeout when configUSE_TIMERS is set to 1.
+ The next unblock time is calculated automatically after a task unblocks when waiting for a notification, allowing deep sleep to be entered earlier.
Update WinPCap NetworkInterface.c for FreeRTOS+UDP to correctly store a pointer to the network buffer structure at the beginning of the network buffer.
Remove redundant global definition vPortInstallFreeRTOSVectorTable from the GCC ARM_CA9 portASM.S file.
Ensure correct sequence of start up sequence when the Windows port is used on multi-core Windows machines by starting one thread in the suspended state.
Move initialisation of xNextTaskUnblockTime to the function that starts the scheduler, rather than from where the variable is declared - this fixes a compiler warning in newer IAR compilers.
Fix "elif (SELECTED_PORT == PORT_MICROCHIP_PIC32MX || PORT_MICROCHIP_PIC32MZ)" in the FreeRTOS+Trace trcHardwarePort.h header file.
Exclude the entire croutine.c file when configUSE_CO_ROUTINES is 0.
New ports:
Added Cortex-M7 IAR and Keil port layers that include a minor errata workaround r0p1 Cortex-M7 devices.
Added Cortex-M4F port layer for CCS.
New demo applications:
Added demo application for STM32F7.
Added demo application for SAMv71.
+ Added mtCOVERAGE_TEST_DELAY() macro to facilitate getting better code coverage during testing.
+ Update prvNotifyQueueSetContainer() so it does not call xTaskRemoveFromEventList() if it is called from an interrupt, and the queue is locked.
Demo apps:
Added QueueSetPolling.c/h demo/test functions.
+ Added vTimerSetTimerID() to compliment vTimerGetTimerID(). Now the timer ID can be used as timer local storage.
+ Updated comments and added some additional assert() calls.
Win32 port:
+ Some changes to allow easier 64-bit builds
PIC24/dsPIC port:
+ Added NOP after disable interrupt instruction.
Add a "query heap" command to the standard sample CLI commands.
Remove casting from configMAX_PRIORITIES setting in Win32 simulator demos as it was preventing a clean build.
Source code changes.
General tidy up and addition of assert points.
+ Made xTaskNotifyGiveFromISR() its own function, rather than a macro that calls xTaskNotifyFromISR() (minor performance improvement).
+ GCC and Keil Cortex-M4F ports now use vPortRaiseBASEPRI() in place of ulPortRaiseBASEPRI() where the return value is not required (minor performance improvement).
Demo changes:
Change the [very basic] FreeRTOS+UDP SAM4E driver to use task notifications rather than a semaphore (execution time now 55% what it was in FreeRTOS V8.1.2!).
Robustness improvements to IntQueue.c standard demo task.h.
Added the latest standard demo tasks, reg test tasks and int q tasks to the SAM4E demo.
+ Do not attempt to free the stack of a deleted task if the stack was statically allocated.
+ Introduce configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES - which optionally writes known values into the list and list item data structures in order to assist with the detection of memory corruptions.
Microblase port:
+Change occurrences of #if XPAR_MICROBLAZE_0_USE_FPU == 1 to #if XPAR_MICROBLAZE_0_USE_FPU != 0 as the value can also be 2 or 3.
Demo app modifications:
+ Update Zynq project to use the 2014.4 tools and add in tests for the new task notification feature.
+ Update SAM4S project to include tests for the new task notification feature.
+ Fix a few compiler warnings.
+ Add TickType_t specific critical sections so critical sections are not used when accessing the tick count in cases where the access is atomic (32-bit tick count, 32-bit architecture).
+ Optimise Cortex-M4F ports by inlining some critical section macros.
+ Original ports used a #define to set the path to portmacro.h - that method has been obsolete for years and now all the old definitions have been moved into a separate header files called deprecated_definitions.h.
+ Cortex-M port now check the active vector bits against 0xff when determining if a function is called from an interrupt - previously only a subset of the bits (0x1f) were checked.
+ Add in new standard demo/test files TaskNotify.c/h and include the files in the simulator demos.
+ Update trace recorder code, and some demos to use the new version (more to do).
+ Introduce uxTaskPriorityGetFromISR().
+ Minor typo corrections.
+ Update MingW simulator demo to match the MSVC simulator demo.
Allow the stats formatting functions to be built in without stdio.h being included inside tasks.c.
Kernel port code:
- Slight change to the Cortex-A GIC-less port to move all non portable code to the application level.
SAMA5D4 demo project:
- Update the Atmel provided library to V1.1.
- Create a DDR build configuration.
- Ensure interrupts are all edge sensitive.
- Update the regtest code to use all 32 flop registers.
+ Change how queues are allocated and deleted so only one pvPortMalloc() or vPortFree() is required in place of the previous 2.
+ Where the TCB is allocated in relation to the stack is now dependent on the stack growth direction. The stack will not grow into the TCB.
+ Introduce the configAPPLICATION_ALLOCATED_HEAP constant to allow the application to provide the array used by heap_4.c as its heap. This allows the application writer to use qualifiers on the array to, for example, force the memory into faster RAM.
Demo application:
+ Add demo for SAMA5D4 using IAR.
+ Introduce xSemaphoreGenericGiveFromISR() as an optimisation when giving semaphores and mutexes from an interrupt.
Demo applications:
+ Update IntSemTest.c to provide more code coverage in xSemaphoreGenericGiveFromISR().
+ Ensure the MMU is turned on in the RZ IAR demo. It was already on in the RZ ARM demo.
- Re-introduce the ability to give a mutex from an ISR.
Common demo code:
- Add additional tests into the GenQTest files for priority inheritance and using a mutex from an ISR.
+ Update the RZ IAR project so it targets the RZ RSK rather than custom hardware.
+ Update the RZ ARM/DS-5 project so it targets the RZ RSK rather than custom hardware.
+ Updated RX64M demos to use the new iodefine.h naming.
Cortex-A9 port related:
+ Update IAR, ARM and GCC Cortex-A9 port layers to include a 'task exit error' function which is called if a task attempts to incorrectly exit its implementing function.
+ Moved the instruction which switches into system mode out of the restore context macro, as it is only needed when starting the first task.
Core kernel files related:
+ Ensure there are no references to the mutexes held count when mutexes are excluded from the build.
- Add additional tests to GenQTest.c to test the updated priority inheritance mechanism.
- Slightly increase some delays in recmutex.c to prevent it reporting false errors in high load test cases.
SAMA5D3 Xplained IAR demo:
- Remove space being allocated for stacks that are not used.
- Remove explicit enabling of interrupts in ISR handers as this is now done from the central ISR callback before the individual handers are invoked.
- Reduce both the allocated heap size and the stack allocated to each task.
- Enable I cache.
- Slight improvement to the save context macro.
- Remove some #warning remarks.
- Enable interrupts before calling the ISR handler rather than in the ISR handler.
- Add in the assert when a task attempts to exit its implementing function without deleting itself.
- Remove obsolete code from the context switch asm code (obsoleted by the fact that there is no mask register).
- Attempt to make code more generic by using definitions for additional register addresses.
- Add full interrupt nesting tests.
- Add additional critical section/context switching tests.
- Set interrupt priorities so everything can run at once without any software watchdog errors.
- Re-enable interrupts in each IRQ handler.
- Add in run-time stats.
Add additional asserts to the Keil CM3 and CM4F ports (other CM3/4 ports already updated).
Add the additional yield necessitated by the mutex held count to the case when configUSE_QUEUE_SETS is 0.
Remove some apparently obsolete code from xTaskPriorityDisinherit() (a task cannot be both blocked and giving bac a mutex at the same time].
Update the new "mutex held count" increment and decrement functions to allow mutexes to be created before the scheduler is started.
Helper updates to allow a count of the number of mutexes held to be added.
Updates to the CCS Cortex-R4 implementation necessitated by a change in compiler semantics.
Update PIC32MX and MZ ports to assert if a non ISR safe function is called from an ISR.
Add C implementations of some standard library functions to the Zynq demo to prevent the GCC libraries (which use floating point registers as scratch registers) being linked in.
Fix issue in and simplify the xTaskRemoveFromUnorderedEventList() function. The function is new to the V8 release candidates so does not effect official released code.
Replace LDMFD with POP instructions in IAR and RVDS Cortex-A9 ports.
Replace branch to address with indirect branch and exchange to address in register in the IAR and RVDS Cortex-A9 ports.
Change INCLUDE_xTimerPendFunctionCallFromISR to INCLUDE_xTimerPendFunctionCall
Update event group trace macros to match the new trace recorder code.
Ensure parameter name consistency by renaming any occurrences of xBlockTime and xBlockTimeTicks to xTicksToWait.
Continue work on GCC/RL78 port - still a work in progress.
Adjust how the critical section was used in xQueueAddToSet.
Remove obsolete extern declaration of vTaskSwitchContext() from the MPX430X IAR portmacro.h (other older portmacro.h header files contain the same declaration).
When a task is unblocked the need for a context switch is only signalled if the unblocked task has a priority higher than the currently running task, instead of higher than or equal to the priority of the currently running task.
Replace #define types with typedefs.
Rename all typedefs to have a _t extension.
Add #defines to automatically convert old FreeRTOS specific types to their new names (with the _t).
Introduce xPortRunning variable into Win32 simulator port layer.
Add port optimised task selection macro for the GCC Win32 port layer (the MSVC version has had one for a while).
Ensure the event list item value does not get modified by code in tasks.c (priority inheritance, or priority change) when it is in use by the event group implementation.
Reset the expected block time variable when a task is suspended or deleted in case the value held in the variables was associated with the task just suspended or deleted.
Add a task pre-delete hook to allow the insertion of any port specific clean up when a task is deleted.
Increase use of 'const' qualifiers.
Add vPortCloseRunningThread() into the Win32 port layer to attempt to allow Windows threads to be closed more gracefully when a task deletes itself.
Add configCLEAR_TICK_TIMER_INTERRUPT into PIC32 port layer to allow the timer configuration to be changed without any edits to the port layer being required.
Add prvTaskExitError() into the PIC32 port layer to trap tasks that attempt to exit from their implementing function.
Provide the ability to trap interrupt stack overflows in the PIC32 port.
Radically improve the timing in the Win32 simulator port layer.
Change configCHECK_FOR_STACK_OVERFLOW to 3 to also check the interrupt stack.
Add a build configuration to allow use on the PIC32 USBII starter kit.
Increase some delays when talking to the LCD to ensure it always displays correctly.
Rewrite the register test tasks.
Correct header comments in the UARTCommandConsole.c file used in the SmartFusion2 demo.
Exercise the new xQueueSpacesAvailable() function in the MSVC demo.
Add defaults for the new traceMALLOC and traceFREE trace macros.
Catch tasks trying to exit their functions in the Cortex-M0 ports.
Add additional comments to timers.c in response to a support forum question.
Initialise _impure_ptr prior to the first task being started.
Prior to V7.5.0 a yield pended in the tick hook would have occurred during the same tick interrupt. Return pdTRUE from xTaskIncrementTick() if a yield is pending to revert to that behaviour.
Correct the check to ensure the application network event hook is not called when the first network down event is sent.
Add in defaults for the Nabto task stack and priority.
Don't reset the stack location when starting the scheduler in Cortex-M0 ports as the vector offset register is not implemented and XMC1000 devices have their application vector address somewhere other than 0x00.
Update the Cortex-A9 port to include asserts if an ISR safe FreeRTOS function is called from an interrupt that has a higher logical priority than configMAX_SYSCALL_INTERRUPT_PRIORITY (or whatever the CA9 equivalent is called), and also assert if the binary point is not set correctly.
Relegate the vTaskList() and vTaskGetRunTimeStats() functions to "sample" functions demonstrating how to use xTaskGetSystemState() to generate human readable status information.
Introduce and default configINCLUDE_STATS_FORMATTING_FUNCTIONS which must now be defined to use vTaskList() and vTaskGetRunTimeStats().
Update the Rowley MPU demo to use a version of debug_printf that runs in privileged mode to get around the problem of the RAM it uses not being under the control of the kernel.
Add portYIELD_FROM_ISR() macros to Cortex-M ports. The new macro just calls the exiting portEND_SWITCHING_ISR() macro.
Remove code from the MSVC port layer that was left over from a previous implementation and become obsolete.
Update the tickless idle implementations that use up counters for tick interrupt generate to ensure they remain in low power mode for the desired time instead of one tick less than the desired time.
Correct the header comments in het.c and het.h (RM48/TMS570 demo) which were corrupt.
Correct version numbers in RX63N Renesas compiler demo.
Ensure stacks set up for tasks in the RX200 port layer end on 8 byte boundaries (was 4, which didn't matter but didn't match the definition).
Replaced unqualified (unsigned) in calls to standard functions with (size_t).
+ Add RL78G14 specific linker script.
+ Move the call to the function that sets up the clocks to before the code that sets up the .data and .bss sections.
- Abstract out the IO port handling for the LED output so the same code can be used on multiple eval boards.
- Add in the RESTORE_CONTEXT macros.
- Swap to use heap_1.c instead of heap_4.c.
- Add data model macros to FreeRTOSConfig.h (may be removed if only one data model is supported by the compiler).
- Install interrupt handlers.
Add eTaskConfirmSleepModeStatus() (not yet tested).
Only call prvQueueUnregisterQueue() when a queue or semaphore is deleted if configQUEUE_REGISTRY_SIZE > 0.
Back out change that checks the configUSE_PORT_OPTMISED_TASK_SELECTION value before uxPriorityUsedOnEntry is set in vTaskPrioritySet as it generated more warnings (with other compilers) than it fixed.
Made queue function prototypes consistent so xQueueHandle parameters are always xQueue, and xQUEUE * parameters pxQueue.
Likewise make the task API using px for pointers to TCBs, and just x for task handles.
Heap_x functions now automatically align the start of the heap without using the portDOUBLE union member.
Queue.c now includes queue.h.
Changed eTaskStateGet() to eTaskGetState() and added #define to ensure backward compatibility.
Added configEXPECTED_IDLE_TIME_BEFORE_SLEEP definition - was previously hard coded to 2.
Slight change to the default CM3 tickless sleep function to allow the idle time to be set to zero in the pre-sleep processing macro.
Changed stack alignment for the FreeRTOS-MPU port to ensure it didn't trigger the assert() in the generic create function.
Add EDS support in the PIC24 port layer.
Remove unnecessary EHB instructions from PIC32 port.
In the PIC32 port assembly code, replace the &= code with a single ins instruction.
Move location of traceTASK_CREATE() macro call.
Remove obsolete handling of trmCOMMAND_PROCESS_TIMER_OVERFLOW as the command was never used in release versions.
Replaced the #error that traps configMAX_SYSCALL_INTERRUPT_PRIORITY being set to 0 with a configASSERT() for GCC Cortex-M3/4 ports as the #error does not work if configMAX_SYSCALL_INTERRUPT_PRIORITY includes any casting. Not a problem for other compilers as they cannot have casting anyway as that would break the assembly code.
Added volatile key word to the queue xRxLock and xTxLock members.
Ensure the portPRIVILEGED_BIT bit is set when the timer task is being created by the kernel - as it was for the idle task. Necessary for MPU port.
Add #error strings if configMAX_SYSCALL_INTERRUPT_PRIORITY is set to 0.
Corrected the prototype of vApplicationStackOverflowHook().
Changed the dimensioning of the buffer declared in prvListTaskWithinSingleList() to make use of the configMAX_TASK_NAME_LEN setting.
Removed the "-rc1" that was accidentally left on the version number of some Win32 port files.
Changed the behaviour of xQueueGenericReset() so queues can be reset when tasks are blocked on them.
Update example source code in timers.h so the parameter names match those in timers.c.
Fix "known issue" bug in xTaskResumeFromISR() (which was missing a critical section).
+ Comment serial.c
+ Improve the interaction between InterruptNetTest.c and main.c so both too short and too long periods are trapped.
+ Remove debug code from FreeRTOSConfig.h.
critical section. xTaskGetTickCountFromISR() contains its own critical
section, and the ISR safe critical sections are not designed to nest,
so reset the critical section. */
portSET_INTERRUPT_MASK_FROM_ISR();
in main.c.
Somewhat optimise the calling of vTaskSwitchContext() from interrupts in the new MicroBlaze port to ensure it does not get called multiple times when more than one peripheral is called from the same interrupt.
Rearrange the order in which registers are saved to the stack in an interrupt to make it more logical, and introduce #defines for the offset from the stack pointer for each variable.
Change the sprintf() in prvGenerateRunTimeStatsForTasksInList() to accept unsigned long instead of unsigned int parameters so it works on 16bit devices too.
Separate out the interrupt handlers into separate functions so they can be installed into the array of interrupt handlers.
Reverse the priorities of the pseudo interrupt handler and tick generate threads so the extra hand shaking event can be removed.
Change LED numbers to match silk screen.
Include Ethernet port pin configuration in HardwareSetup().
Convert EMAC.c to be correct for the RX (was based on SH2A file).
Add uIP task creation into main.c.
+ Add a traceTASK_SWITCHED_OUT macro as part of the RegTest.c.
+ Add task to test the saving and restoring of the interrupt mask.
+ Change the serial port interrupt handlers to use naked functions.
+ Changed the method used to force a context switch within an ISR for the
ARM7/9 GCC ports only. The portENTER_SWITCHING_ISR() and
portEXIT_SWITCHING_ISR() macros are no longer supported. This is to
ensure correct behaviour no matter which GCC version is used, with or
without the -fomit-frame-pointer option, and at all optimisation levels.
+ Corrected the prototype for xQueueGenericSend() within queue.h.
Thank you for your interest in contributing to our project. Whether it's a bug report, new feature, code, or
documentation, we welcome our community to be involved in this project.
Please read through this document before submitting any issues or pull requests to ensure we are able to help you and all members of the community as effectively as possible.
## Code of conduct
This project has adopted the [Amazon Open Source Code of Conduct](https://aws.github.io/code-of-conduct).
For more information see the [Code of Conduct FAQ](https://aws.github.io/code-of-conduct-faq) or contact
opensource-codeofconduct@amazon.com with any additional questions or comments.
## Security issue notifications
If you discover a potential security issue in this project we ask that you notify AWS/Amazon Security via our [vulnerability reporting page](https://aws.amazon.com/security/vulnerability-reporting/). Please do **not** create a public github issue.
## Submitting a bugs/feature request
Have a bug to report or feature to request? Follow these steps:
1. Search on the [FreeRTOS Community Support Forums](https://forums.freertos.org/) and [GitHub issue tracker](https://github.com/FreeRTOS/FreeRTOS/issues?utf8=%E2%9C%93&q=is%3Aissue) to be sure this hasn't been already reported or discussed.
2. If your search turns up empty, create a new topic in the [forums](https://forums.freertos.org/) and work with the community to help clarify issues or refine the idea. Include as many of the details listed below.
3. Once the community has had time to discuss and digest, we welcome you to create an [issue](https://github.com/FreeRTOS/FreeRTOS/issues) to report bugs or suggest features.
When creating a new topic on the forums or filing an issue, please include as many relevant details as possible. Examples include:
* A clear description of the situation - what you observe, what you expect, and your view on how the two differ.
* A reproducible test case or sequence of steps.
* The version of our code being used.
* Any modifications you've made relevant to the bug.
* Details of your environment or deployment. Highlight anything unusual.
## Contributing via pull request
Contributions via pull requests are much appreciated. Before sending us a pull request, please ensure that:
1. You are working against the latest source on the *main* branch.
2. You check existing open, and recently merged, pull requests to make sure someone else hasn't addressed the problem already.
3. You open an issue to discuss any significant work - we would hate for your time to be wasted.
To send us a pull request, please:
1. Fork the repository.
2. Modify the source; focus on the specific change you are contributing. If you also reformat all the code, it will be hard for us to focus on your change.
3. Follow the [coding style guide](https://www.FreeRTOS.org/FreeRTOS-Coding-Standard-and-Style-Guide.html).
4. Commit to your fork using clear commit messages.
5. Send us a pull request, answering any default questions in the pull request interface.
NOTE: Please make sure the default option (Allow edits from maintainers) is left checked.
6. Pay attention to any automated CI failures reported in the pull request, and stay involved in the conversation.
GitHub provides additional document on [forking a repository](https://help.github.com/articles/fork-a-repo/) and
[creating a pull request](https://help.github.com/articles/creating-a-pull-request/).
## Coding style
* Please ensure that your code complies to the [FreeRTOS coding style guidelines](https://www.FreeRTOS.org/FreeRTOS-Coding-Standard-and-Style-Guide.html).
## Getting your pull request merged
All pull requests must be approved by our review team before it can be merged in. We appreciate your patience while pull requests are reviewed. The time it takes to review will depend on complexity and consideration of wider implications. For more information on the pull request process, please see the documentation [here](pull_request_process.md).
## Finding contributions to work on
Looking at the existing issues is a great way to find something to contribute on. As our projects, by default, use the default GitHub issue labels (enhancement/bug/duplicate/help wanted/invalid/question/wontfix), tackling open 'help wanted' issues is a great place to start.
## Licensing
The FreeRTOS kernel is released under the MIT open source license, the text of which can be found [here](https://github.com/FreeRTOS/FreeRTOS/blob/main/FreeRTOS/License/license.txt)
Additional license files can be found in the folders containing any supplementary libraries licensed by their respective copyright owners where applicable.
We may ask you to sign a [Contributor License Agreement (CLA)](https://en.wikipedia.org/wiki/Contributor_License_Agreement) for larger changes.
This document explains the stages that a Pull Request (PR) goes through when a pull request is submitted to a git repository in the FreeRTOS organization in Github. Before you start a PR, please read and familiarize yourself with [CONTRIBUTING.md](CONTRIBUTING.md)
## ****Terminologies****
**FreeRTOS Partner Contributors**: These are selected developers and experts from community.
**FreeRTOS Team**: The FreeRTOS team consists of “AWS employees”.
**CODEOWNERS**: For all the FreeRTOS repositories, “FreeRTOS Team” and/or “FreeRTOS Partner contributors” will be CODEOWNER.
**Contributor**: The Contributor is the person who submitted the pull request.
**Assignee**: The Assignee is an AWS Employee who is responsible for identifying reviewers and managing the PR. They track the progress of pull requests and ensure that they are reviewed and merged in a timely manner.
**Reviewer**: Reviewers are responsible for reviewing pull requests and providing feedback to the contributor. Two approving reviews, one of which must be from the CODEOWNER of the reposiroty, are required for a PR to be merged.
## ****Pull Request Life-Cycle****
Once a pull request (PR) is submitted, it goes through the following stages:
1. Open
1. The PR is created.
2. All the GitHub Actions pass and the PR is ready to be reviewed.
2. Triage
1. The PR is assigned to an assignee.
2. The assignee assigns a reviewer from the FreeRTOS Team to the PR.
3. Review
1. The reviewer provides feedback and discusses open questions with the contributor, if needed.
2. If the contributor and the reviewer conclude, after discussion, that the PR will not be merged, then the PR is closed.
3. The PR contributor addresses the feedback and makes changes to the PR, if needed.
4. The reviewer approves the PR and assigns a second reviewer.
4. Second Review
1. The second reviewer reviews the PR and provides feedback, if needed.
2. The PR contributor addresses the feedback and makes changes to the PR, if needed.
3. The second reviewer approves the PR.
5. Testing
1. One of the reviewers tests the PR to ensure that it works correctly.
6. Ready to Merge
A PR becomes Ready to Merge when all the branch protection rules are satisfied. We have branch protection rules which require the following:
1. At least 2 reviews.
2. One review from the CODEOWNER of the given repository.
3. All PR checks must pass.
7. Merge
1. The PR is merged.
</br>
The status of a PR is indicated through GitHub labels added by Reviewers/Assignees. The following are the most common status indicators: Triaged, Reviewer Assigned, Concept ACK/NACK, First Code Review In Progress, First Code Review Complete, Second Code Review In Progress, Second Code Review Complete, Testing In Progress and Testing Complete.
Please note that we may decide to skip some stages depending on the type of PR. For example, a PR with a simple doc update will likely not go through all the above stages, however every PR is required to get approvals from 2 reviewers.
The pictorial representation of our PR process is shown below.

</br>
## **Turnaround Times**
The length of time required to review a PR is unpredictable and varies from PR to PR since it depends on the complexity of the changes, availability of reviewers, and overall workload of the team. We generally attempt to resolve each PR in accordance with the timeframes below, excluding weekends and public holidays:
* Triage: <24hours
* Concept ACK/NACK: 1-2 weeks
* Code Review: 1-2 weeks
* Testing: 1-2 weeks
## **Addressing the changes requested by reviewers**
The author should address any review comments in 4 weeks or less. If the author is unable to address the comments in that time, we will do one of the following:
* Make the required changes ourselves and merge the pull request.
* Close the pull request.
</br>
### **Best Practices for Faster Reviews**
Here are some best practices to follow so that your PR gets reviewed quickly.
1. If you plan to contribute a new feature to FreeRTOS, please get confirmation beforehand that the FreeRTOS team and community want, and will accept, this feature. This is true especially when you plan to make large or significant changes. To get confirmation and feedback from FreeRTOS Team and community, create a post in the FreeRTOS forums.
2. Smaller is better. Small, focused PR’s are reviewed more quickly and thoroughly, are simpler to rollback, and involve less wasted effort if rejected. Avoid opening pull requests that span the whole repository.
3. Don’t mix refactoring, bug fixes and feature development into a single PR. Lets say you are developing feature-x and you come across poorly named variables or incomplete/incorrect comments. You should consider fixing those, but in a separate PR, not in the same PR as feature-x.
4. Comments matter. The code you develop will need to be maintained for a long time. Well placed comments provide context to your reviewers, maintainers and users, and also prevent them from misunderstanding the purpose of the code. However, DO NOT add comments to explain things which are obvious by just glancing at the code. [Good Read: https://stackoverflow.blog/2021/12/23/best-practices-for-writing-code-comments/]
5. Test your PR. In your PR, please accompany your changes with suitable unit tests and any other tests that will be helpful, and include descriptions of how to perform any manual tests. Instructions for unit tests can be found at [freertos.org](https://freertos.org/FreeRTOS-Coding-Standard-and-Style-Guide.html#Testing) and [Github](https://github.com/FreeRTOS/FreeRTOS/blob/main/FreeRTOS/Test/CMock/Readme.md)
**Push Back its ok:**
Sometimes reviewers make mistakes. If a reviewer has requested you to make changes and you feel strongly about doing it a certain way, you are free to debate the merits of the requested change with the reviewer, while still following the code of conduct. You might be overruled, but you might also prevail.
**Be Pragmatic**
Put a bit of thought into how your PR can be made easier to review and merge. No document can replace common sense and good taste. The best practices shared here and the contribution guidelines, if followed, will help you get your code reviewed and merged with less friction.
</br>
### **Why is my PR closed?**
Pull requests older than 120 days or not in-line with scope of the project will be closed. Exceptions can be made for pull requests that have active review comments, or that are awaiting other dependent pull requests. Closed pull requests are easy to recreate, and little work is lost by closing a pull request that is subsequently reopened. We want to limit the total number of pull requests in flight to:
* Maintain a clean project
* Remove old pull requests that would be difficult to rebase since the underlying code has changed over time
* Encourage code velocity
### **Why is my PR not getting reviewed/merged?**
* It may be because of a feature freeze due to an upcoming release. During this time, only bug fixes are taken into consideration. If your pull request is a new feature, it will not be prioritised until after the release. Wait for the release.
* It could be related to best practices (see contributing.md) not being followed. One common issue is that the pull request is too big to review. Let’s say you’ve touched 21 files and have 9347 insertions. When your would-be reviewers pull up the diffs, they run away - this pull request is going to take a few hours to review and they don’t have a few hours right now. They’ll get to it later, just as soon as they have more free time (ha!).
* If you think the above two situations are not the reason, and you are not getting some pull request love, please drop a couple of reminders on the PR comments. If everything else fails, please create a post on FreeRTOS forums with link to PR.
' * the Software, and to permit persons to whom the Software is furnished to do so,\n',
' * subject to the following conditions:\n',
' *\n',
' * The above copyright notice and this permission notice shall be included in all\n',
' * copies or substantial portions of the Software.\n',
' *\n',
' * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\n',
' * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\n',
' * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\n',
' * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\n',
' * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\n',
' * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\n',
' *\n',
' * https://www.FreeRTOS.org\n',
' * https://github.com/FreeRTOS\n',
' *\n',
' */\n',
]
FREERTOS_COPYRIGHT_REGEX=r"^(;|#)?( *(\/\*|\*|#|\/\/))? Copyright \(C\) 20\d\d Amazon.com, Inc. or its affiliates. All Rights Reserved\.( \*\/)?$"
FREERTOS_ARM_COLLAB_COPYRIGHT_REGEX=r"(^(;|#)?( *(\/\*|\*|#|\/\/))? Copyright \(C\) 20\d\d Amazon.com, Inc. or its affiliates. All Rights Reserved\.( \*\/)?$)|"+ \
r"(^(;|#)?( *(\/\*|\*|#|\/\/))? Copyright 20\d\d Arm Limited and/or its affiliates( \*\/)?$)|"+ \
#define AT91C_EBI_RCB ((unsigned int) 0x1 << 0) // (EBI) 0 = No effect. 1 = Cancels the remapping (performed at reset) of the page zero memory devices.