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V4.2.0 ... main

Author SHA1 Message Date
arctic-alpaca 03db672b8f
Fix race in POSIX port vPortEndScheduler (#1262)
* Fix race in POSIX port `vPortEndScheduler`

The `vPortEndScheduler` checks whether it's a FreeRTOS thread after signalling the scheduler thread to stop. This creates a race between the check and the destruction of the thread key. By moving the signal to the scheduler thread after the check, the race is prevented.

* Code review suggestions

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2025-04-03 14:32:44 +05:30
Jonathan Cubides 0030d609a4
Add support for Vector context save support on RISC-V (#1260)
port: riscv: Add vector context save support
2025-03-27 15:22:22 +05:30
ErickReyesR b9aa064591
FreeRTOS MPU: Remove MPU region number check (#1261)
FreeRTOS MPU: Remove MPU region number check

This change removes the assertion and runtime check that enforces
matching between configTOTAL_MPU_REGIONS and physical MPU
regions,. This allows applications running on devices with 16 MPU
regions to manage 8 MPU regions while leaving the remaining 8
for the kernel.

Signed-off-by: Erick Reyes <erickreyes@google.com>
2025-03-19 15:01:22 +05:30
Gaurav-Aggarwal-AWS dacce186cf
Use UBaseType_t for ullMachineTimerCompareRegisterBase (#1258)
Use architecture-dependent UBaseType_t instead of fixed type for
ullMachineTimerCompareRegisterBase. This type is defined to uint32_t or
uint64_t based on XLEN, resolving warnings on 32-bit platforms.

Reported by landretk@ on the PR FreeRTOS/FreeRTOS-Kernel#1176.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2025-03-17 16:41:11 +05:30
Saiiijchan 64fd9291ef
RISC-V: refine fpu reg context offset (#1257)
RISC-V: refine fpu reg context offset

pxCode and mstatus stored at index 0 and 1 are based on XLEN.
Therefore, the correct formula to calculate the FPU register index
should be ( ( 2 * portWORD_SIZE ) + ( regIndex * portFPU_REG_SIZE ) ).

Signed-off-by: wangfei_chen <wangfei_chen@realsil.com.cn>
2025-03-13 21:10:51 +05:30
Saiiijchan bb47bc02f2
RISC-V: refine fpu offset according to portFPU_REG_SIZE (#1256)
Signed-off-by: wangfei_chen <wangfei_chen@realsil.com.cn>
Co-authored-by: wangfei_chen <wangfei_chen@realsil.com.cn>
2025-03-13 11:22:38 +05:30
Jonathan Cubides 4d9cd906d3
RISCV Add FPU context save (#1250)
* port: riscv: Split the number of registers and the size of the context

* port: riscv: Create some macros for the FPU context

* port: riscv: Add a couple of macros that store fpu context

* port: riscv: Update the stack init function to include the fpu context size

* port: riscv: Add a chip_specific_extensions file that includes the F extension

* Update dictionary to include some risc-v instructions

* port: riscv: Fix a few typos

* port: riscv: Apply @aggarg's sugestions
2025-03-06 10:34:48 -08:00
Stefan Innerhofer 742729ed29
Add an assert o catch overflow of recursive mutex counter (#1254)
Add an assert o catch overflow of recursive mutex counter.
2025-03-04 15:25:19 +05:30
Rahul Kar 60f34f8503
Add history.txt for release V11.2.0 (#1253)
* Add history.txt for release V11.2.0

* Fix spelling

Co-authored-by: Ahmed Ismail <64546783+AhmedIsmail02@users.noreply.github.com>

---------

Co-authored-by: Ahmed Ismail <64546783+AhmedIsmail02@users.noreply.github.com>
2025-03-04 13:18:43 +05:30
Rahul Kar 3fd7f174db
Fix MISRA violations for Kernel release V11.2.0 (#1251)
* Fix MISRA violations for Kernel release V11.2.0

* Fix formatting

* Remove redundant configASSERT in timers.c
2025-02-28 17:10:08 +05:30
Gaurav-Aggarwal-AWS df0aa5a815
Disable stack overflow check for MPU ports (#1231)
Disable stack overflow check for MPU ports

Stack overflow check is not straight forward to implement for MPU ports
because of the following reasons:
1. The context is stroed in TCB and as a result, pxTopOfStack member
   points to the context location in TCB.
2. System calls are executed on a separate privileged only stack.

It is still okay because an MPU region is used to protect task stack
which means task stack overflow will trigger an MPU fault.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2025-02-24 21:54:15 +05:30
Bhoomika R S 1a1ae36f9a
Update instruction to suppress SIGUSR1 in Posix with LLDB debugger (#1248) 2025-02-13 15:03:23 +05:30
John Boiles 15ec8b8995
POSIX Simulator: Assert if vPortYield called from a non-FreeRTOS thread (#1247) 2025-02-13 10:44:22 +05:30
Gaurav-Aggarwal-AWS 29e817b70e
Include current task runtime in ulTaskGetRunTimeCounter (#1234)
* Include current task runtime in ulTaskGetRunTimeCounter

Update ulTaskGetRunTimeCounter to include elapsed time since the last
context switch when called for the currently running task. Previously,
this time was not included in the calculation.

Fixes #1202.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2025-02-12 20:57:18 +05:30
Bhoomika R S 51a1598e4e
Add instruction to suppress SIGUSR1 in Posix with LLDB debugger (#1245)
While using the macOS default LLDB debugger, a call to vTaskEndScheduler results in an unhandled SIGUSR1 (aka SIGRESUME) when restoring the scheduler thread's signals with pthread_sigmask. This crashes the program.

Added instructions in portable/ThirdParty/GCC/Posix/port.c to suppress SIGUSR1 to prevent LLDB debugger interference when exiting xPortStartScheduler

Thanks to: @johnboiles for pointing it out in #1224
2025-02-12 14:57:03 +05:30
Sudeep Mohanty fbaeba352e
fix(freertos): Correct taskRESERVED_TASK_NAME_LENGTH macro definition (#1241)
This commit updates the definition of taskRESERVED_TASK_NAME_LENGTH in
tasks.c to fix an unreachable preprocessor condition.

Signed-off-by: Sudeep Mohanty <sudeep.mohanty@espressif.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2025-02-10 13:47:36 +05:30
Graham Sanderson a470b2d375
RP2040: update FreeRTOS_Kernel_import.cmake to match the newer version in Community-Supported-Ports (#1243)
- The newer version looks in Community-Supported-Ports too

Co-authored-by: graham sanderson <graham.sanderson@raspeberryi.com>
2025-02-10 11:02:36 +05:30
Jakub Tymejczyk d10ee46811
Fix GCC/Posix port compilation on FreeBSD (#1239) (#1240)
On FreeBSD pthread_once_t is a struct and cast is required.
Otherwise there's compilation error:
../../mocks/freertos/port.c:261:23: error: expected expression
    hSigSetupThread = PTHREAD_ONCE_INIT;
                      ^
PTHREAD_ONCE_INIT is defined as: { PTHREAD_NEEDS_INIT, NULL } on FreeBSD

Co-authored-by: Jakub Tymejczyk <jakub.tymejczyk@enigma.com.pl>
2025-02-07 06:51:34 +05:30
Rahul Kar ae0a5913c8
Call key creation before checking if a thread is FreeRTOS (#1238) 2025-02-06 14:41:19 +05:30
Ben Nicholls 0f7edaff73
Reinstate "Fix inaccurate ticks in windows port" (#1198)
Reinstates PR https://github.com/FreeRTOS/FreeRTOS-Kernel/pull/142 that was reverted in https://github.com/FreeRTOS/FreeRTOS-Kernel/pull/143

Co-authored-by: Ben Nicholls <benn@smartbadge.com.au>
2025-02-04 11:03:44 +05:30
Gaurav-Aggarwal-AWS ad4e723829
Mark mutex as robust to prevent deadlocks (#1233)
Mark mutex as robust to prevent deadlocks

Prevent application hangs that occur when a thread dies while holding a
mutex, particularly during vTaskEndScheduler or exit calls. This is
achieved by setting the PTHREAD_MUTEX_ROBUST attribute on the mutex.

Fixes:
- GitHub issue: FreeRTOS/FreeRTOS-Kernel#1217
- Forum thread: freertos.org/t/22287

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2025-01-29 07:27:30 +05:30
Kody Stribrny f94bc89108
fix: SA violation fixes and simplification for idle task length restrictions (#1227)
fix: SA violation fixes and simplification for idle task length restrictions

This change:
* Removes the dependency on strings.h for the prvCreateIdleTask function
* Resolves several static analysis violations reported by tools like Parasoft

Builds off of - https://github.com/FreeRTOS/FreeRTOS-Kernel/pull/1203
2025-01-28 22:43:17 +05:30
Cavin McKinley b421abc7c3
Update Community-Supported-Ports submod to fix RP2350 port - FreeRTOS-Kernel#1220 (#1232)
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2025-01-25 15:08:49 +05:30
Gaurav-Aggarwal-AWS 11d0caa614
Fix the context array size for MPU ports (#1230)
Fix the context array size for MPU ports

Ensure the saved context location falls within the reserved context area
rather than overlapping with the next MPU_SETTINGS structure member.

This never caused a problem because actual read/write operations
start from one word before the saved context location.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2025-01-25 13:34:03 +05:30
John Boiles 2b35979a1a
POSIX Simulator: Handle pthreads not created by FreeRTOS differently (#1223) 2025-01-24 16:56:59 -08:00
Marouen Ghodhbane 72bb476bf3 portable: aarch64_sre: Add support for vApplicationFPUSafeIRQHandler
The application writer needs to name their IRQ handler as:
1. vApplicationIRQHandler if the IRQ handler does not use FPU registers.
2. vApplicationFPUSafeIRQHandler is the IRQ handler uses FPU registers.

When the application uses vApplicationFPUSafeIRQHandler, a default
implementation of vApplicationIRQHandler is used which stores FPU
registers and then calls vApplicationFPUSafeIRQHandler.

Note that recent versions of GCC may use FP/SIMD registers to optimize 16-bytes
copy and especially when using va_start()/va_arg() functions (e.g printing some thing
in IRQ handlers may trigger usage of FPU registers)

This implementation is heavily inspired by both the ARM_CA9 port and the ARM_CRx_No_GIC
port done in [1]

[1] https://github.com/FreeRTOS/FreeRTOS-Kernel/pull/1113

Signed-off-by: Marouen Ghodhbane <marouen.ghodhbane@nxp.com>
2025-01-22 17:00:50 -08:00
Marouen Ghodhbane 630cfb5b79 portable: aarch64_sre: add the configuration and status registers to the fpu saved context
FPSR and FPCR are two 64-bits registers where only the lower 32 bits are defined.
Save them when doing context switch with FPU context saving enabled.

Signed-off-by: Marouen Ghodhbane <marouen.ghodhbane@nxp.com>
2025-01-22 17:00:50 -08:00
Marouen Ghodhbane ff0989e46b portable: aarch64_sre: add configUSE_TASK_FPU_SUPPORT support
This is a direct backport of upstream commit [1] for aarch64 (legacy operation port)
done under [2]
The same code can be applied on the aarch SRE port to be able to enable FPU context
saving on all tasks context switch to mitigate GCC optimization to use SIMD registers
for copy.

[1] "55eceb22: Add configUSE_TASK_FPU_SUPPORT to AARCH64 port (#1048)"
[2] https://github.com/FreeRTOS/FreeRTOS-Kernel/pull/1048

Signed-off-by: Marouen Ghodhbane <marouen.ghodhbane@nxp.com>
2025-01-22 17:00:50 -08:00
kzorer 1b8f5965d3
Add xQueueCreateSetStatic method for static allocation of Queue Sets (#1228)
Add xQueueCreateSetStatic method for static allocation of Queue Sets

This commit introduces the xQueueCreateSetStatic function, which allows for the static allocation of Queue Sets in FreeRTOS when both configUSE_QUEUE_SETS and configSUPPORT_STATIC_ALLOCATION are enabled.
2025-01-22 14:53:35 +05:30
Gaurav-Aggarwal-AWS b5d1b972cc
Update stream and message buffer documentation (#1226)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2025-01-21 15:17:10 +05:30
John Boiles a58579681c
POSIX Simulator: Remove unused __APPLE__ mach_vm.h include (#1225)
Remove unused __APPLE__ mach_vm.h include
2025-01-21 14:20:16 +05:30
Ahmed Ismail 78e0cc778a
ARMv8.1-M: Add task dedicated PAC key support (#1195)
armv8.1-m: Add task dedicated PAC key

To harden the security, each task is assigned a dedicated PAC key, so that attackers needs to guess the all the tasks' PAC keys right to exploit the system using Return Oriented Programming.

The kernel is now updated to support the following:
* A PAC key set with a random number generated and is saved in the task's context when a task is created.
* As part of scheduling, the task's PAC key is stored/restored to/from the task's context when a task is unscheduled/scheduled from/to run.

stack-overflow-check: Introduce portGET_CURRENT_TOP_OF_STACK macro

When MPU wrapper v2 is used, the task's context is stored in TCB and `pxTopOfStack`` member of TCB points to the context location in TCB. We, therefore, need to read PSP to find the task's current top of stack.

Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com>
2025-01-14 10:50:52 +05:30
creiter64 c38427eea4
Fix function parameter shadowing global variable. (#1221)
The function vApplicationFPUSafeIRQHandler gets the value of ICCIAR as
parameter, but a constant containing the address of ICCIAR was also
defined. Fix the name of the constant to align it with what it actually
holds.
2025-01-13 14:48:10 -08:00
iotah 3a7b3082cf
Update community supported ports submodulees (#1218)
Signed-off-by: Hua Zheng <hua.zheng@embeddedboys.com>
Co-authored-by: Hua Zheng <hua.zheng@embeddedboys.com>
2025-01-06 11:05:53 +05:30
Ren Mingrui e55bde2133
Add a stack pointer bounds check when configCHECK_FOR_STACK_OVERFLOW is set to 2. (#1216)
Add a stack pointer bounds check when configCHECK_FOR_STACK_OVERFLOW is set to 2.
2024-12-30 14:41:52 +05:30
Felix van Oost f05244a8d5
Pass core ID to port lock macros (#1212)
Pass core ID to task/ISR lock functions
2024-12-30 14:28:49 +05:30
wwhheerree f63bc2b5cc
Add an example of human readable table generated by vTaskListTasks() to tash.h (#1215)
* Add an example of human readable table generated by vTaskListTasks() to task.h
2024-12-24 16:41:44 +05:30
Sudeep Mohanty f31787d35d
fix(freertos): Limit idle task name length copy operation and ensure null-termination of the idle task name string (#1203)
* fix(freertos): Limit idle task name copy operation and ensure null termination

This commit:
- Limits the idle task name length copy operation to prevent
  Out-of-bounds memory access warnings from static code analyzers.
- Fixes a bug where in the idle task name could be non null-terminated
  string for SMP configuration.

Signed-off-by: Sudeep Mohanty <sudeep.mohanty@espressif.com>
2024-12-20 13:13:04 +05:30
Gaurav-Aggarwal-AWS cc31510088
Remove unused config parameters (#1211)
These were reported here - https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/1210.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2024-12-20 00:08:52 +05:30
Felix van Oost 31dd1e39cb
Pass core ID to critical nesting count macros (#1206)
* Pass core ID to CRITICAL_NESTING_COUNT macros

* Match existing data type for xCoreID

* Get core ID when interrupts are disabled

* Implement get core ID with interrupt disabled

* Get core ID inline within vTaskSuspendAll() to resolve compiler warning

* Fix formatting check

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Ching-Hsin,Lee <chinglee@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2024-12-19 14:20:43 +05:30
Saiiijchan e169442c29
Refine VFP context for Coretex-A9 (#1209)
s0–s15 (d0–d7, q0–q3) and d16–d31 (q8–q15) are caller save
register

Signed-off-by: wangfei_chen <wangfei_chen@realsil.com.cn>
Co-authored-by: wangfei_chen <wangfei_chen@realsil.com.cn>
2024-12-17 17:25:20 +05:30
wwhheerree 3ddfffda04
Regression Bug Fix: Fix Incorrect Return of MSVC-MingW portYIELD_FROM_ISR (#1207)
There is a regression issue introduced in
    cfc268814a.
    This PR was intended to update MIT licensed header from v9 to v10.
    But it accidentally changed "portYIELD_FROM_ISR( x )" in MSVC-MingW/portmacro.h.
    It caused "portYIELD_FROM_ISR( x )" does not return correct value to "prvProcessSimulatedInterrupts".
2024-12-16 18:48:54 +05:30
Rahul Kar b58005a4da
Add macro guard configUSE_MPU_WRAPPERS_V1 to remove definition missing warning. (#1208)
Add macro guard to removed definition missing warning
2024-12-16 18:26:43 +05:30
Kody Stribrny 974351fe4a
Update manifest to use 'V' (#1201)
Release tags use a capitalized V.
Our manifest tag is used by our SBOM
script to generate the URL and so
this needs to be capitalized to generate
a valid URL.
2024-12-02 11:29:36 -08:00
yh-sb 682f0515c9
Fix CMake build for RP2040 (#1197)
Add public dependency to hardware_sync because portable\ThirdParty\GCC\RP2040\include\portmacro.h exposes include "hardware/sync.h" to FreeRTOS.h which is PUBLIC.

Add private dependency to pico_multicore because of usage prvFIFOInterruptHandler() and sio_hw in portable/ThirdParty/GCC/RP2040/port.c.
2024-11-25 10:54:41 +05:30
Ryan 874fa7bed4
Removing the old -RV32 directory name from parts of the documentation (#1196) 2024-11-20 12:08:15 +05:30
Tony Josi 7e419c2dd5
Update partner supported and community supported ports submodulees (#1194) 2024-11-14 11:09:55 +05:30
Ahmed Ismail 25f9222fed
armv8.1-m: Remove portHAS_PACBTI_FEATURE macro (#1192)
The PACBTI is an optional hardware security feature,
the current implementation assumes that every SoC that
has Armv8.1-M architecture extension, has the PACBTI
hardware feature, which does not have to be the case.
Hence, the `portHAS_PACBTI_FEATURE` is removed
and the implementation is modified to rely on
`configENABLE_PAC` and `configENABLE_BTI` macros
that can either be set using CMake or FreeRTOSConfig.h
header file.

Enabling PAC and/or BTI on a port variant that
doesn't have the PACBTI hardware feature would be
caught by a `configASSERT` statement.

Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com>
Co-authored-by: Tony Josi <tonyjosi@amazon.com>
2024-11-14 10:01:06 +05:30
Graham Sanderson 73f6e3a1b4
RP2040 Updates: (#1193)
* Standardize on configNUMBER_OF_CORES != 1 to select SMP functionality
* Fix SDK pico_sync interoperability (configSUPPORT_PICO_SYNC_INTEROP == 1)

Co-authored-by: graham sanderson <graham.sanderson@raspeberryi.com>
2024-11-14 09:47:50 +05:30
Gaurav-Aggarwal-AWS f239da06ec
Add xPortResetHeapMinimumEverFreeHeapSize to heap5 (#1191)
The same was added to heap 4 in this PR - https://github.com/FreeRTOS/FreeRTOS-Kernel/pull/1189.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2024-11-13 13:31:41 +05:30
Jeff Tenney 8f7f451c2a
Don't suspend scheduler if task already notified (#1190)
* Don't suspend scheduler if task already notified
2024-11-12 16:35:33 +05:30
Tomas Galbicka 9736947af2
Heap: add new API to reset xMinimumEverFreeBytesRemaining. (#1189)
This commit adds new API functionality to reset xMinimumEverFreeBytesRemaining.
This functionality provides ability to get heap statistics during a particular period of time.

Signed-off-by: Tomas Galbicka <tomas.galbicka@nxp.com>
2024-11-12 09:58:38 +05:30
Trong Nguyen d0d55f3031
Enhancements and Bug Fixes for F1Kx Port (#1169)
Fix FPU stack order issue and Improve FPU checking flow
Fix Interrupt depth comparison logic
Fix parameter mismatch in portmacro.h file
Add comment to explain assembly code
2024-11-05 13:39:50 +05:30
Vishwanath Martur f0d79459d6
Fix SMP debugging issue on rp2040 (#1174)
* Fix SMP debugging issue on rp2040

Related to #1172

Add `multicore_reset_core1` before `multicore_launch_core1` in `xPortStartScheduler` function to fix debugging issue on rp2040 with SMP enabled.

* Modify `portable/ThirdParty/GCC/RP2040/port.c` to include a call to `multicore_reset_core1` before `multicore_launch_core1` within the `#if portRUNNING_ON_BOTH_CORES` block.

* Recover comments back

---------

Co-authored-by: ActoryOu <jay2002824@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
2024-11-04 21:51:51 +05:30
Vishwanath Martur b4a970729b
Fix RISC-V configMTIMECMP_BASE_ADDRESS (64-bit) stored in 32-bit int (#1176)
Related to #189

Update `configMTIMECMP_BASE_ADDRESS` to be stored in a 64-bit integer.

* Change the type of `ullMachineTimerCompareRegisterBase` to `uint64_t` in `portable/GCC/RISC-V/port.c`.
* Change the type of `ullMachineTimerCompareRegisterBase` to `uint64_t` in `portable/IAR/RISC-V/port.c`.
* Update the initialization of `ullMachineTimerCompareRegisterBase` to use `configMTIMECMP_BASE_ADDRESS` in both files.

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2024-11-04 18:02:35 +05:30
ActoryOu a27d6650ee
Move configASSERT default definition above before including portable.h. (#1185)
Move configASSERT default definition above before including portable.h.
2024-11-04 16:35:52 +05:30
ActoryOu 445336aad9
Follow GitHub recommendation to update release.yml (#1178)
GitHub recommends to store user inputs in environments variables
and then use them in scripts. This PR updates the code as per the
GitHub recommendation.

Details here - https://docs.github.com/en/actions/security-for-github-actions/security-guides/security-hardening-for-github-actions#understanding-the-risk-of-script-injections.
2024-11-04 14:53:28 +05:30
Rahul Kar 7d76dceaad
Add assert check for NULL TCB handle (#1177)
Co-authored-by: ActoryOu <jay2002824@gmail.com>
2024-11-02 10:43:53 +08:00
Kody Stribrny a081ba8b9c
Fix variable name mismatch, mpu_wrappers type mismatch. (#1181)
Fix variable name mismatch introduced by #1166.
Fix MPU v2 wrappers incorrectly using UBaseType_t instead
of BaseType.
2024-11-01 10:56:18 -07:00
ActoryOu de276eb023
Fix spelling typos (#1168)
* Fix spelling

---------

Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
2024-11-01 10:09:49 -07:00
Kody Stribrny 8225a7f554
Fix AutoReload variable name (#1166)
Removes the 'u' prefix as the variable is no longer unsigned.
2024-10-31 21:33:25 +05:30
Ahmed Ismail c0585ad814
freertos-config: Fix library definitions scope (#1164)
Since `freertos_config` is an interface library,
`INTERFACE` scope shall be used to define compile
definitions.

Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com>
2024-10-25 15:33:33 -07:00
Paul Hollinsky 7215c89aa8
POSIX Port: Remove pthread_attr_setstacksize call (#1161)
We have removed the use of pthread_attr_setstack and as a result,
the task stack is no longer used as the corresponding pthread's stack.
There is no use of calling pthread_attr_setstacksize as the default is
always good enough and we don't need to handle OS specific cases.

This PR simplifies the code by removing the call to pthread_attr_setstacksize.

Signed-off-by: Paul Hollinsky <paulhollinsky@gmail.com>
2024-10-24 12:12:27 +05:30
Ahmed Ismail 7081e76f5a
Armv8.1-m: Add pacbti support (#1147)
* copyright-checker: Add FreeRTOS Arm collab copyright

FreeRTOS Arm collab files shall have both Amazon's
and Arm's copyright headers. Hence, the copyright
checker is modified to check for both copyrights.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* armv8-m: Add support for IAR with TFM FREERTOS PORT

As the case for ARMClang, and GCC toolchains, IAR
with TFM FreeRTOS Port support is added.

Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com>

* armv8-m: Do not overwrite Control register value

The current ARMv8-M FreeRTOS-Kernel Port code
implementation is modified in a way that allows
the CONTROL register's value to be retained
rather than being overwritten.

This is needed for adding PACBTI support as
the special-purpose CONTROL register `PAC_EN`,
`UPAC_EN`, `BTI_EN`, and `UBTI_EN` PACBTI
enablement bits should be configured before calling
`vRestoreContextOfFirstTask()` function which currently
overwrite the value inside the CONTROL register.

Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com>

* armv8.1-m: Add PACBTI support to kernel non-secure implementation

In this commit, Pointer Authentication, and Branch Target
Identification Extension (PACBTI) support is added for
Non-Secure and Non-TrustZone variants of Cortex-M85
FreeRTOS-Kernel Port.

The PACBTI support is added for Arm Compiler For
Embedded, and IAR toolchains only. The support in
the kernel is not yet enabled for GNU toolchain
due to known issues.

Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com>

* Fix CI check

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com>
Co-authored-by: Ahmed Ismail <ahmism01@e133373.arm.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2024-10-24 11:55:16 +05:30
Tony Josi e400cc93b7
Update .github/CODEOWNERS (#1162) 2024-10-22 18:16:46 +05:30
kakkoko a49c35b5dc
Fix incorrect error checking of prvCreateIdleTasks (#1158)
In environments that do not support static allocation
(configSUPPORT_STATIC_ALLOCATION == 0), at prvCreateIdleTasks(), call
xCreateTask() and compare its return value to pdFAIL to check whether
xCreateTask() failed. However, xCreateTask() returns
errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY as the error value, so the
result of this comparison is always false.

This commit fixes this problem by changing the return value comparison
to pdPASS instead of pdFAIL.
2024-10-16 15:06:20 +05:30
Ian Thompson 5f3bab1a32
Xtensa support updated and moved to Partner-Supported submodules (#1156)
* Xtensa support moved to Partner-Supported ports

Removing legacy Xtensa port; leave README with pointer to latest code

* Updated submodule ThirdParty/FreeRTOS-Kernel-Partner-Supported-Ports
2024-10-15 09:02:11 -07:00
K.Kashi f5cf45d86e
[Fixed the Issue] Fixed the Issue#1102 of RL78 of the Context switch issue. https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/1102 (#1157) 2024-10-15 11:09:45 +05:30
Guilherme Giácomo Simões e81ad46b0e
refactor: change methods ENTER|EXIT critical (#1140)
refactor: change methods ENTER|EXIT critical

The read and write of BaseType_t are atomic for a number of ports
and therefore, do not require taskENTER_CRITICAL/taskEXIT_CRITICAL.
This PR introduces portBASE_TYPE_ENTER_CRITICAL and
portBASE_TYPE_EXIT_CRITICAL which default to  taskENTER_CRITICAL
and taskEXIT_CRITICAL. The APIs that read/write BaseType_t are updated
to use these new macros. 

The next change would to be to define portBASE_TYPE_ENTER_CRITICAL and
portBASE_TYPE_EXIT_CRITICAL to nothing for ports where BaseType_t 
read and write are atomic.

Signed-off-by: guilherme giacomo simoes <trintaeoitogc@gmail.com>
2024-10-07 10:37:50 +05:30
Gaurav-Aggarwal-AWS 1cb8042961
Update MPU prototypes (#1150)
Add missing MPU prototypes

This commit address the following issues with MPU prototypes:
1. Fix the decorator according to which MPU wrapper is used.
2. Add the missing prototypes for v1.
3. Add the corresponding mapping to mpu_wrappers.h.
4. Update MPU v1 wrappers for vTaskList and vTaskGetRunTimeStats.

This was reported here - https://forums.freertos.org/t/cortex-m55-and-16-region-mpu-support/21470/5.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2024-09-30 11:41:52 +05:30
Gaurav-Aggarwal-AWS de7c014e92
Change the cast from UBaseType_t to size_t (#1153)
This was causing problem for 8-bit ports.

This was reported here - https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/1151

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2024-09-30 11:20:04 +05:30
Gaurav-Aggarwal-AWS c0bfbb9692
Remove error for 16 MPU resgion from IAR ports (#1149)
Support for 16 MPU regions was added to Cortex-M33, M35P, M55 and M85
ports was added but the compile time error check was not removed. This
results in compilation error when 16 MPU regions are used. This PR
removes the not needed compile time error check.

It was reported here - https://forums.freertos.org/t/cortex-m55-and-16-region-mpu-support/21470.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2024-09-23 10:39:29 +05:30
Florian La Roche 9788e7e46a
modernize ARM assembler syntax (#1148)
modernize ARM assembler syntax

Signed-off-by: Florian La Roche <Florian.LaRoche@gmail.com>
2024-09-20 10:19:09 -07:00
Saiiijchan 61440fc664
Refine heap_5 heap protector (#1146)
Add configVALIDATE_HEAP_BLOCK_POINTER on heap_5

heap_5 is used for multiple separated memory spaces. In the
previous implementation, it only verifies the highest and
lowest addresses. A pointer may not be within heap regions,
but is still located between the highest and lowest addressed.

Add maco configVALIDATE_HEAP_BLOCK_POINTER to provide
customized heap block pointers detection based on the settings
of heap regions.

Signed-off-by: wangfei_chen <wangfei_chen@realsil.com.cn>
2024-09-19 10:36:52 +05:30
あく d3052f1f50
Event Groups: snapshot xEventGroupSetBits returning value while in vTaskSuspendAll (#1143)
Event Groups: snapshot xEventGroupSetBits returning value while in
vTaskSuspendAll. Fixes uxEventBits dereference after event group
deleted by higher priority thread.
2024-09-11 23:07:08 +05:30
あく d806240dfe
Task: fix compiler warning for architectures that does not define portARMV8M_MINOR_VERSION (#1144) 2024-09-11 19:26:16 +05:30
Gaurav-Aggarwal-AWS 40031cfc4c
Update upload-artifact GH action's version (#1145)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2024-09-11 11:36:58 +05:30
Oliver Mueller 310ace5dd0
Add configuration include to secure_heap.c (#1141)
Add configuration include to secure_heap.c

Enables actually changing the size of the secure heal
2024-09-10 11:16:40 +05:30
Ryzee119 93e8199078
Fix IA32 compilation with common IRQ entry disabled (#1137) 2024-09-09 12:54:38 +05:30
Rahul Kar a045081f73
Update config macro for xTaskGetCurrentTaskHandle (#1136) 2024-09-04 15:01:42 +05:30
Rahul Kar 4a3c9204ff
Update comment in the example for declaration of xTimerReset (#1133)
* Update comment in the example for declaration of xTimerReset

* Fix formatting
2024-09-02 21:16:23 +05:30
Gaurav-Aggarwal-AWS 6dab25ae4e
Pend a yield in portPRE_TASK_DELETE_HOOK (#1132)
When a task deletes itself, it calls portPRE_TASK_DELETE_HOOK which
translates to vPortCloseRunningThread on the Windows port.
vPortCloseRunningThread never returns and as a result,
taskYIELD_WITHIN_API in vTaskDelete does not get called. As a result,
the next task is not scheduled when configUSE_PREEMPTION is set to 0.

This change records that a yield is pending so that the next tick
interrupt switches out the task that was deleted.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2024-08-29 08:51:35 -07:00
Tomas Galbicka e6d8308fde
GCC: ARM_CM0: Fix L6286E error on Keil MDK (#1131)
Change the .b instruction to .bx with higher range to solve error
reported by MDK descibed bellow.

Fix:
Error: L6286E: Relocation #REL:0 in portasm.o(.text.SVC_Handler) with respect to vPortSVCHandler_C. Value(0x1a04) out of range(-0x800 - 0x7fe) for (R_ARM_THM_JUMP11)

Compiler: Keil MDK ARMClang 6.22.0

https://developer.arm.com/documentation/ka002847/latest/
https://developer.arm.com/documentation/dui0496/m/Linker-Errors-and-Warnings/List-of-the-armlink-error-and-warning-messages

Signed-off-by: Tomas Galbicka <tomas.galbicka@nxp.com>
2024-08-29 14:06:33 +05:30
Rahul Kar 23cfd114d3
Update CMakeLists.txt to proper name for the ports (#1129) 2024-08-22 10:03:58 +05:30
Rahul Kar 0b904a553a
Remove access check from ISR function (#1127) 2024-08-21 15:24:46 +05:30
Saiiijchan 18a168bcd2
Add heap protector to allocted heap blocks (#1125)
When validate those allocated heap block structure, the canary is not used.
Do xor with canary when allocating a new block.

Signed-off-by: wangfei_chen <wangfei_chen@realsil.com.cn>
Co-authored-by: wangfei_chen <wangfei_chen@realsil.com.cn>
2024-08-20 18:34:43 +05:30
chinglee-iot e43553af1e
Yield for task when core affinity of a ready task is changed (#1123)
* The SMP scheduler should re-select a core to yield when the core
  affinity of a ready task is changed.
2024-08-20 12:34:01 +08:00
mayl 2faa8bc154
Remove hardware dependence in portmacros.h (#1112)
* Remove hardware dependence in portmacros.h

The IAR MSP430X port `#include "msp430.h"` which pulls all the hardware
register definitions into anything which `#include "FreeRTOS.h"`.  This
removes that hardware dependency "leak" by removing the header file
and re-defining the `portDISABLE_INTERRUPTS()` and
`portENABLE_INTERRUPTS()` macros in terms of `__asm`.

* Code review suggestions

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2024-08-19 11:31:30 +05:30
Rahul Kar 49e88310be
Fix compilation issue of IA32_flat port (#1122)
* Fix compilation issue of IAR32 port

* Add new line at EOF

* Fix header check

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2024-08-19 11:07:24 +05:30
Chen YM 294569e495
Optimize xTaskIncrementTick for configNUMBER_OF_CORES > 1 (#1118)
The original implementation only initializes the first
variable. After executing xTaskIncrementTick, the schedule
might not behave as expected.

When configUSE_PREEMPTION == 1 & configUSE_TIME_SLICING == 1,
replace setting xYieldRequiredForCore[ xCoreID ] with setting
xYieldPendings[ xCoreID ].

And when configUSE_PREEMPTION == 1, simplify the check
condition to only check xYieldPendings[ xCoreID ].

Signed-off-by: cymzier <cymb103u@cs.ccu.edu.tw>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2024-08-19 10:34:33 +05:30
xuelix a936c10e2c
Modify the name of a private function to reflect what it actually does (#1119) 2024-08-14 11:08:32 -07:00
xuelix 40dbccf142
Updated the return values for functions in queue.c based on the actua… (#1117)
* Updated the return values for functions in queue.c based on the actual code.
2024-08-12 15:47:30 -07:00
superroc 190906aeaf
Add portMEMORY_BARRIER defination to fix over-optimization in xTaskResumeAll. (#1116)
Co-authored-by: owen <owen@freqchip.com>
2024-08-12 17:06:47 +05:30
Trong Nguyen da3c35aa48
Add CC-RH port for Renesas F1Kx devices (#1100)
Add CC-RH port for Renesas F1Kx devices
2024-08-09 11:21:21 +05:30
Rahul Kar c963d24001
Add support for vApplicationFPUSafeIRQHandler (#1113)
This PR adds support for vApplicationFPUSafeIRQHandler. The application
writer needs to name their IRQ handler as:
1. vApplicationIRQHandler if the IRQ handler does not use FPU registers.
2. vApplicationFPUSafeIRQHandler is the IRQ handler uses FPU registers.

When the application uses vApplicationFPUSafeIRQHandler, a default
implementation of vApplicationIRQHandler is used which stores FPU
registers and then calls vApplicationFPUSafeIRQHandler.
2024-08-08 21:07:11 +05:30
Gaurav-Aggarwal-AWS 53c7e7c46f
Reset xNextTaskUnblockTime in task notify FromISR APIs (#1111)
* Reset xNextTaskUnblockTime in task notify FromISR APIs

If a task is blocked waiting for a notification then
xNextTaskUnblockTime might be set to the blocked task's timeout time. If
the task is unblocked for a reason other than a timeout
xNextTaskUnblockTime is normally left unchanged, because it will
automatically get reset to a new value when the tick count equals
xNextTaskUnblockTime. However if tickless idle is used it is important
to enter sleep mode at the earliest possible time - so reset
xNextTaskUnblockTime here to ensure it is updated at the earliest
possible time.

This was reported here -
https://forums.freertos.org/t/the-vtaskgenericnotifygivefromisr-function-need-call-prvresetnexttaskunblocktime/21090

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2024-08-06 10:49:48 +05:30
Daniel Otte d750173b76
Only check for stream buffer dependencies, if configUSE_STREAM_BUFFERS==1. (#1109)
Signed-off-by: Daniel Otte <d.otte@wut.de>
2024-08-05 16:11:33 +05:30
Rahul Kar 3d935e86d9
Update broken links in readme and comments (#1110)
Update broken links in readme and comments
2024-08-05 16:00:47 +05:30
Björn Schäpers fffed5e809
Define vApplicationGetTimerTaskMemory only when configUSE_TIMERS is set (#1104)
Otherwise it is very reasonable that config_TIMER_TASK_STACK_DEPTH is
undefined.
2024-07-26 12:18:35 +05:30
Gaurav-Aggarwal-AWS d844312131
Fix POSIX port to respect configUSE_TIME_SLICING (#1103)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2024-07-26 10:42:33 +05:30
Rahul Kar 5588ae68c8
Update ARM_CRx_No_GIC port (#1101)
This PR makes the following improvements to the ARM_CRx_No_GIC port-

1. Remove inline assembly and move all the assembly code to the portASM.S
    file.

2. Add support for configUSE_TASK_FPU_SUPPORT -
   - When configUSE_TASK_FPU_SUPPORT is defined to 1, tasks are created
      without floating point context. Tasks that want to use floating point, need
      to call portTASK_USES_FLOATING_POINT(). This is the current behavior.
   - When configUSE_TASK_FPU_SUPPORT is defined to 2, each task is created
      with a floating point context.
  If left undefined, configUSE_TASK_FPU_SUPPORT defaults to 1 for backward compatibility.

3. The application writer can now implement vApplicationSVCHandler to handle the
    SVC calls raised within the application. SVC 0 is used for the yield kernel operation
    and the application can use all the SVC calls other than 0.

Signed-off-by: kar-rahul-aws <karahulx@amazon.com>
2024-07-22 21:05:17 +05:30
chinglee-iot 0452603a94
Update LTS 202406 information (#1099) 2024-07-01 14:32:00 +05:30
Florian La Roche f4f2e1596b
Fix gcc warning in posix port (#1098)
Fix warning from "gcc -Wsign-compare" in the file
portable/ThirdParty/GCC/Posix/port.c since PTHREAD_STACK_MIN
is used from system headers.

Signed-off-by: Florian La Roche <Florian.LaRoche@gmail.com>
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
2024-06-29 11:20:45 -04:00
Florian La Roche 646881e7f9
fix typo gab -> gap and adjust indentation level (#1097)
Signed-off-by: Florian La Roche <Florian.LaRoche@gmail.com>
2024-06-29 11:37:15 +05:30
Angel Cascarino 17dfd0f808
Update XMOS xcore.ai port to be compatible with v11.x (#1096)
* Fix kexcept function

* Create dummy pxCurrentTCBs for xcore.ai port

* Additional commentary

* Add a layer of indirection to cope with singlecore

* Clarify use of _DoException
2024-06-27 15:49:53 -07:00
Eric Dawe 9e838293c2
Update README.md (#1094)
Fix spelling of the word 'the' ('thw') in line 29
2024-06-24 17:10:51 +05:30
Ahmed Ismail 31419bfcee
FreeRTOS MPU: Add Privileged eXecute Never MPU attribute support (#1092)
FreeRTOS MPU: Add privileged execute never MPU attribute

A new MPU region attribute Privileged eXecute Never (PXN)
is introduced in Armv8.1-M architecture, where if an MPU
region has PXN attribute set and the processor attempts
to execute the code inside with privileged level,
the Memory Management Fault exception would be triggered,
with IACCVIOL bit in MemManage Fault State Register set
to 1. The PXN feature allows privileged software to ensure
specific application tasks (threads) to execute in
unprivileged level only.

Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com>
2024-06-19 20:42:50 +05:30
chinglee-iot 0c79e74eaa
Remove run state assertion in prvCheckForRunStateChange (#1093)
In `prvCheckForRunStateChange()`, enabling interrupts should cause this core to immediately service the pending interrupt and yield. Upon the next scheduling of the task, the assertion `configASSERT(pxThisTCB->xTaskRunState != taskTASK_SCHEDULED_TO_YIELD);` may not be true, as other cores could have requested a yield for this task before it evaluates its run state within the assertion. To address this, the task re-evaluates its run state in critical section within a loop until it is eligible for execution, which is the current implementation. Consequently, this assertion should be removed to ensure correct behavior.
2024-06-19 18:29:04 +08:00
耀眼的大神 76eb443821
Fix traceMALLOC() allocated bytes (#1089)
* Fix traceMALLOC() memory count is inaccurate. (#1078)

Modify xWantedSize to the size of a free block when not split blocks.

Ensure that the sizes within traceMALLOC() and traceFREE() macros are equal.

* Create a new variable xAllocatedBlockSize for traceMALLOC()

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2024-06-13 10:55:54 +05:30
Gaurav-Aggarwal-AWS 663eaad1b2
Update link in third_party_tools.md (#1090)
Update the link to the getting started guide for Code Sonar.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
2024-06-12 13:43:43 +05:30
haydenridd 28b6a141ea
- Changed macro __VFP_FP__ to __ARM_FP for ports GCC/ARM_CM7, GCC/ARM_CM4_MPU, and GCC/ARM_CM4F to accurately reflect if floating point hardware support is enabled (#1088)
Co-authored-by: Hayden Riddiford <hayden@terrakaffe.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2024-06-11 10:30:08 +05:30
Philipp Schilk e64d1e06b3
Add traceSTARTING_SCHEDULER tracing hook. (#1082)
* Add traceSTARTING_SCHEDULER tracing hook.

Discussed here: https://forums.freertos.org/t/tracing-improvements/20097

This hook enables tracers to run code on startup after all RTOS
resources are created and to detect that the scheduler is starting without
relying on traceENTER/traceEXIT macros.

It also provides tracers access to the task handle of all IDLE tasks,
allowing them to be identified unambiguously and without relying on
INCLUDE_xTaskGetIdleTaskHandle.
2024-06-10 23:14:10 +05:30
maxiao bee9037c46
Fix compilation warning about undelcared pthread_setname_np (#1079)
Use _GNU_SOURCE macro instead of __USE_GNU and define it before
including portmacro.h. The reason is that portmacro.h includes limits.h
which in-turn includes features.h - this results in __USE_GNU getting
incorrectly undefined.
2024-06-10 16:02:04 +05:30
Florian La Roche c431b358c8
event_create(): check malloc() return value to be non-NULL (#1084)
* event_create(): check malloc() to be non-NULL

Check malloc() to return non-NULL before writing data
in the function event_create().

Signed-off-by: Florian La Roche <Florian.LaRoche@gmail.com>

* Code review suggestion

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Florian La Roche <Florian.LaRoche@gmail.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2024-06-07 13:47:13 +05:30
Gaurav-Aggarwal-AWS 11174fb860
Add a list of third party tools (#1080)
* Add a list of third party tools

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2024-06-07 11:50:56 +05:30
Philipp Schilk 5a0898288d
Give queue set queues a unique type number. (#1083)
Discussed here: https://forums.freertos.org/t/tracing-improvements/20097

Changes the value of queueQUEUE_TYPE_SET to a unique value (5) to allow
tracers to differentiate between normal queues and queue sets.

Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
2024-06-06 21:06:09 +05:30
Philipp Schilk 69e1b7c64a
Clarify documentation of xTaskNumber in TaskStatus_t. (#1081)
Discussed here: https://forums.freertos.org/t/tracing-improvements/20097

Adds a note to the (confusingly named) xTaskNumber member of TaskStatus_t
explaining that the value is different to the TaskNumber that can be
accessed using the vTaskSetTaskNumber and vTaskGetTaskNumber functions.

The value returned is actually the value of uxTCBNumber in the TCB.
2024-06-06 10:23:34 +05:30
Ethan Slattery 65e6297b68 Add missing Extern "C" to MSVC portmacro.h 2024-05-29 14:03:51 -07:00
wdfk-prog 9f22177c02
Readability enhancements in heap_1.c (#1074)
* Remove  that Heap_1.c unnecessary judgment and code logic

* Remove useless alignment calculations and increase heap usage size

* Revert "Remove useless alignment calculations and increase heap usage size"

This reverts commit 7832a4bc11.

* Readability improvements

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: huangly <huangly@milesight.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2024-05-29 23:43:07 +05:30
Rahul Kar ef22228bda
Change UBaseType_t to BaseType_t for a boolean variable (#1072) 2024-05-24 12:53:54 +05:30
Florian La Roche 27c4feff66
typo: add space to examples/template_configuration/FreeRTOSConfig.h (#1069)
Signed-off-by: Florian La Roche <Florian.LaRoche@gmail.com>
2024-05-23 15:21:29 +05:30
Gaurav-Aggarwal-AWS 9697f8c9b0
Update documentation of prvGetExpectedIdleTime (#1061)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2024-05-20 14:24:54 +05:30
Rahul Kar 0801c91bc6
Add Noreturn attribute in template port for static analysis (#1060)
* Add _Noreturn attribute in the template function to fix MISRA 17.11 advisory warnings

* Add _Noreturn attribute in function declaration

* Code review suggestions
2024-05-16 21:11:05 +05:30
Joseph Julicher c9e3949f02
added configUSE_POSIX_ERRNO to the template FreeRTOSConfig.h (#1052)
* added a reference to configUSE_POSIX_ERRNO

* fixed formatting

* format changes from PR check
2024-05-15 09:28:41 +05:30
Gaurav-Aggarwal-AWS a8376dbe81
Revert the change introduced in PR #1051 (#1056)
As pointed out by Jeff Tenney, the comment introduced in the PR is not
accurate.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2024-05-14 16:24:49 +05:30
Gaurav-Aggarwal-AWS 2e0c623351
Fix race in prvProcessSimulatedInterrupts (#1055)
Earlier the code was suspending the current thread after calling
vTaskSwitchContext. This left a gap where the current thread could
access incorrect pxCurrentTCB after it was changed by
vTaskSwitchContext.

This commit addresses the problem by suspending the current thread
before calling vTaskSwitchContext.

It was reported here - https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/1054.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2024-05-14 16:15:54 +05:30
Gabriel Staples 29b202a41e
list.c: improve code comments to point to official documentation about problems which may cause code to get stuck inside of list.c (#1051)
list.c: improve documentation about initializing binary semaphores
2024-05-13 16:49:50 +05:30
StefanBalt 55eceb2203
Add configUSE_TASK_FPU_SUPPORT to AARCH64 port (#1048)
* Add configUSE_TASK_FPU_SUPPORT to AARCH64 port

NEON SIMD is required by standard AARCH64 and its registers are
frequently utilized by standard functions such as memcpy().
This means that even simple tasks that do not use any floating point
arithmetics may still alter the contents of the FPU registers.

For this reason it makes sense to add support for
configUSE_TASK_FPU_SUPPORT to be able to enforce FPU register saving and
restoring globally.

The implementation was largely adopted from the ARM_CA9 port. However,
the FPU registers must be placed on the stack before the critical
nesting count to match the AARCH64 portASM.S.
2024-05-08 17:07:52 +05:30
chinglee-iot 067d04e44e
Add vPortGenerateSimulatedInterruptFromWindowsThread in MSVC port (#1044)
Add vPortGenerateSimulatedInterruptFromWindowsThread  in MSVC port
to enable native windows threads to notify FreeRTOS tasks.
2024-05-08 12:03:11 +05:30
Gaurav-Aggarwal-AWS 78c8bbde0e
Update xPortRunning before resuming first task (#1049)
The variable `xPortRunning` is now updated before starting the first
task.

It fixes the following issue -
https://forums.freertos.org/t/possible-bug-in-the-way-prvtimertask-thread-function-is-started-in-win32-port/19959/

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2024-05-07 20:47:14 +05:30
Holden 2eb2d653bf
Move header includes before extern c (#1047) 2024-05-06 17:24:05 -07:00
0mhu 30afc1a2c0
Fix wrong source file list in CMake of GCC_ARM_CM0 port. (#1045)
Add GCC/ARM_CM0/mpu_wrappers_v2_asm.c and GCC/ARM_CM0/portasm.c as source files to 'freertos_kernel_port' library.
This fixes the FREERTOS_PORT "GCC_ARM_CM0" CMake configuration.
2024-04-29 20:51:35 +05:30
chinglee-iot 8e07366994
Update kernel version v11.1.0+ in tasks.h (#1043) 2024-04-22 17:48:45 +08:00
chinglee-iot 111e775060
Update History.txt for V11.1.0 (#1042) 2024-04-22 15:35:18 +08:00
chinglee-iot c02a347880
Use suffix "U" for unsigned constant (#1041)
* Fix the constant suffix to U

* Fix more unsigned contant suffix

---------

Co-authored-by: Ubuntu <ubuntu@ip-172-31-34-245.ap-northeast-1.compute.internal>
2024-04-19 14:41:16 +05:30
chinglee-iot fdf4695c1e
Adding SMP coverity example (#1039)
* Adding SMP coverity example

* Add coverity scan flow

* Fix format

* Update README.md

* Code review suggestions

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-34-245.ap-northeast-1.compute.internal>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2024-04-19 10:18:00 +05:30
chinglee-iot 2a014ce0b3
Update submodule pointer (#1040) 2024-04-19 12:39:36 +08:00
Devaraj Ranganna 8d280217cd
armv8-m: Remove redundant constant pools (#1035)
Currently in Armv8-M GCC/ArmClang ports, constant pool is used to
define literals needed for `ldr` instructions. However, those
constant pools are defined with `.align 4` which increases code size.
Instead of defining the constant pool with `.align 4`, let the
compiler hanlde the constant pool and the required alignment.

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2024-04-19 00:15:04 +05:30
Rahul Kar bbc058967b
Fix cmake example errors (#1037)
Add typecasts to prevent compiler warnings. Remove ULL suffix to adhere
to C90.
2024-04-18 19:08:51 +05:30
Devaraj Ranganna e143832ad4
tf-m: Update tf-m to TF-Mv2.0.0 release (#1038)
The `portable/ThirdParty/GCC/ARM_TFM/README.md` and
`portable/ThirdParty/GCC/ARM_TFM/os_wrapper_freertos.c` are updated to
support `TF-Mv2.0.0` of trusted-firmware-m release.

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
2024-04-18 17:55:14 +05:30
Tony Josi c6487d9472
Fix build with C90 (#1036)
* Fix build with C90

* Fix formatting
2024-04-18 14:42:53 +05:30
Caleb Perkinson f69b1db45c
Add Stream Batching Buffer (#916)
The difference between a stream buffer and a stream batching buffer is when
a task performs read on a non-empty buffer:
- The task reading from a non-empty stream buffer returns immediately
   regardless of the amount of data in the buffer.
- The task reading from a non-empty steam batching buffer blocks until the
   amount of data in the buffer exceeds the trigger level or the block time
   expires.
2024-04-17 20:24:00 +05:30
Rahul Kar 5a72344c9a
Add MPU wrapper from xStreamBufferResetFromISR (#1034)
* Add MPU wrapper from xStreamBufferResetFromISR in V10.6.x

* Code review suggestions

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2024-04-17 16:57:58 +08:00
HagaiMoshe 9bfd0abb55
Add IRQ safe API for message buffer reset (#1033)
* Add API xStreamBufferResetFromISR

Allow reseting the stream buffer from ISR context

Signed-off-by: hagai.moshe <hagaimoshe@outlook.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: hagai.moshe <hagai.moshe@tandemg.com>
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: kar-rahul-aws <karahulx@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2024-04-16 15:41:55 -07:00
Aniruddha Kanhere 1ed681cc43
Add readme to example directory (#1032)
* Add readme to example directory

* Add readme to example directory

* Add readme to example directory

* Add readme to example directory

* remove whitespace

* Update wording

* Update examples/README.md

Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>

* Add Coverity webpage link

---------

Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
2024-04-16 10:11:50 +05:30
Soren Ptak 6de0d7a737
Fix the pxTopcOfStack typo in the RISC-V ports. (#1030)
* Fix the pxTopcOfStack typo in the RISC-V ports.

* Add a missing o to to
2024-04-15 10:10:10 +05:30
chinglee-iot 4d4f8d0d50
Fix vTaskSuspendAll assert for critical nesting count (#1029)
* Accessing the critical nesting count in current task's TCB is performed with interrupt disabled to ensure atomicity.
2024-04-11 15:12:03 +08:00
Rahul Kar 73851fb6da
Remove unwanted volatile keyword (#1028)
* Remove unwanted volatile keyword

* Declare variable initially
2024-04-11 11:30:29 +05:30
Rahul Kar 2829f3eccc
Replace volatile with configLIST_VOLATILE (#1027) 2024-04-10 20:58:48 +05:30
Rahul Kar 030c1aa646
Add event group and stream buffer config option in template (#1026)
* Add config descriptions in template configuration file

---------

Co-authored-by: GitHub Action <action@github.com>
2024-04-09 15:26:34 +05:30
Florian La Roche 6270e2aebf
Update the memory alignment within the Cortex-R5 port asm code (#1023)
Update alignment in ARM_CR5 port.

This is the same patch as 553caa18ce
provided by Richard Barry for issue #426 (ARM_CA9).

Signed-off-by: Florian La Roche <Florian.LaRoche@gmail.com>
2024-04-09 10:51:12 +05:30
Rahul Kar 5da55ba8ad
Add configCHECK_HANDLER_INSTALLATION description in template file (#1025)
Add configconfigCHECK_HANDLER_INSTALLATION description in template
configuration file
2024-04-09 10:31:53 +05:30
Rahul Kar f0ff3834bc
Fix spelling in comment (#1024)
Co-authored-by: ActoryOu <jay2002824@gmail.com>
2024-04-09 10:00:23 +05:30
Florian La Roche 8afb3a5b82
fix typos in comments: interace -> interface, swtich -> switch (#1022)
Fix typos in comments: interace -> interface, swtich -> switch.

Signed-off-by: Florian La Roche <Florian.LaRoche@gmail.com>
2024-04-08 17:50:55 -07:00
Kody Stribrny 8c49c54987
Fix TFM about link (#1021)
This page does not look to
exist anymore which is
failing our link verifier
check.
2024-04-05 10:40:43 +05:30
chinglee-iot ccbbf04e5b
Update coverity example README (#1020)
* Update coverity example README

* Update main.c for comment

---------

Co-authored-by: Ubuntu <ubuntu@ip-172-31-34-245.ap-northeast-1.compute.internal>
2024-04-04 11:59:36 +05:30
Soren Ptak 52ee9faa72
Add in CI-CD builds of the Cortex-Rx MPU Demos (#1018) 2024-03-29 11:07:38 +05:30
Soren Ptak 7c910499ec
Update checkout action used in workflow files (#1017)
* Use the latest tagged release of the checkout action.
* Cleanup some of the echo group prints in the workflow files
2024-03-28 10:47:34 -07:00
Rahul Kar e8289dfee6
Add config option for event groups and stream buffers (#994)
* Add configUSE_EVENT_GROUPS in source files

* Add configUSE_EVENT_GROUPS macro in MPU wrapper files

* Add configUSE_EVENT_GROUPS macro in MPU port files for GCC and RVDS compilers

* Fix Formatting

* Add configUSE_STREAM_BUFFERS in source files

* Add configUSE_STREAM_BUFFERS  macro in MPU wrapper files

* Add configUSE_STREAM_BUFFERS macro in MPU port files for GCC and RVDS compilers

* Update FreeRTOS.h post latest commit

* Update the ARM_CRx_MPU Port to account for the new configuration changes

* Formatting suggestions

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Code review suggestions

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: joshzarr <joshzarr@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2024-03-27 14:49:47 +05:30
Rahul Kar 39dbff7204
Allow xPortIsAuthorizedToAccessBuffer() API call only from mpu_wrappers_v2 (#992)
* Add support to call xPortxPortIsAuthorizedToAccessBuffer function only when using latest MPU wrappers

* Fix build issue in ARM CM3 MPU port

* Code review suggestions

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2024-03-27 14:05:20 +05:30
Soren Ptak a455b86bd3
Add removed unprivileged access check to ARM_CRx_MPU xPortIsAuthorizedToAccessBuffer() (#1016)
* Add in a removed check for if a task is attempting to read a variable from a location it has write access to in xPortIsAuthorizedToAccessBuffer.

* Add in a portDONT_DISCARD symbol as well.
2024-03-27 10:37:11 +05:30
Soren Ptak 345a86d49b
ARM CM0+ MPU Port (#1005)
* Add MPU Support to the ARM CM0+ GCC Port.
* Co-authored by @aggarg
2024-03-26 13:25:07 -07:00
Soren Ptak 625b24a104
Remove duplicate pop from MPU Wrappers ASM Files (#1008)
* Remove duplicate pop instruction from portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/mpu_wrappers_v2_asm.c

* Remove duplicate pop instruction from portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/mpu_wrappers_v2_asm.c

* Remove duplicate pop instruction from portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/mpu_wrappers_v2_asm.c

* Remove duplicate pop instruction from portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/mpu_wrappers_v2_asm.c

* Remove duplicate pop instruction from portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/mpu_wrappers_v2_asm.S

* Remove duplicate pop instruction from portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/mpu_wrappers_v2_asm.S

* Remove duplicate pop instruction from portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/mpu_wrappers_v2_asm.S

* Remove duplicate pop instruction from portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/mpu_wrappers_v2_asm.S

* Run the copy_files.py script to update the ARMv8M ports to remove the duplicate pop instruction in mpu_wrappers_v2_asm

* Remove duplicate pop instruction from portable/GCC/ARM_CM3_MPU/mpu_wrappers_v2_asm.c

* Remove duplicate pop instruction from portable/GCC/ARM_CM4_MPU/mpu_wrappers_v2_asm.c

* Remove duplicate pop instruction from portable/IAR/ARM_CM4F_MPU/mpu_wrappers_v2_asm.S

* Remove duplicate pop instruction from portable/RVDS/ARM_CM4_MPU/mpu_wrappers_v2_asm.c

---------

Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
2024-03-18 16:21:21 +05:30
wat 6dcce92490
Improvement for 64bit Windows port (#1011)
* 64bit TickType_t is supported on Windows port.(MSVC and MinGW)
Especially it is introduced for 64bit compiler.(x64 platform on MSVC and MinGW-w64)

* Unnecessary compiler warning for the cast operation is disabled locally.(MinGW-w64 only)

* Modify the condition for ignoring compiler warning for the cast operation.

Before modification: Compiler warning was ignored only on MinGW64
After modification: Compiler warning is ignored on MinGW32 and MinGW64
Reason of modification: The cast warning here is unavoidable not only on MinGW64 but also on MinGW32.
"__GNUC__" macro is used because MSVC does not recognize this #pragma directive.
2024-03-18 14:09:49 +08:00
RichardBarry 4732b96dba
Add daemon task startup hook / timer task creation consistency check (#1009)
Add a compile time check that emits a helpful error message if the user
attempts to create a daemon task startup hook without also creating the 
timer/daemon task.

The timer/daemon task startup hook runs in the context of the timer/daemon
task.  Therefore, it won't run even if configUSE_DAEMON_TASK_STARTUP_HOOK
is set to 1 if the timer task isn't created.  The timer task is only created if
configUSE_TIMERS is not equal to 0.
2024-03-07 12:38:15 +05:30
chinglee-iot d95451d924
Define portNOP in RP2040 port (#1003) 2024-03-06 16:24:19 +08:00
chinglee-iot 30f6061f48
Not using pxIndex to iterate ready list in trace utility (#1000)
* pxIndex should only be used when selecting next task. Altering pxIndex
  of a ready list will cause the scheduler to be unable to select the
  right task to run. Using a for loop if traversing the list for trace
  utility is required.
* Not defining listGET_OWNER_OF_NEXT_ENTRY when using SMP scheduler

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2024-03-06 15:34:21 +08:00
Gaurav-Aggarwal-AWS cff947acd0
Update comment in template FreeRTOSConfig.h (#1007)
Update the comment for configKERNEL_INTERRUPT_PRIORITY in the template
FreeRTOSConfig.h.

It was reported here - https://forums.freertos.org/t/migration-from-v10-5-1-to-v11-0-1-fails-with-new-freertosconfig-h-file/19276/

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2024-03-04 10:48:05 +05:30
Asmeili 83b5b24950
Fix typo in croutine.c (#1004) 2024-02-28 16:51:29 +05:30
Soren Ptak 61111b1460
Add ARMv7-R MPU Port (#938)
* Apply git review patch created by @aggargr
* Add necessary changes to the CMakeLists.txt file to build the port
2024-02-26 11:01:25 -08:00
Soren Ptak 839ccb719b
Use Regex for Copyright Year in Header Check (#1002) 2024-02-26 09:26:42 -08:00
Aniruddha Kanhere 2fcb0f48b1
Fix small bugs in Kernel (#998)
* Fix small bugs

* Cast sizeof to BaseType_t

* Test removing assert to fix UT

* Revert change to tasks.c

Since configIDLE_TASK_NAME must be defined as a string according to
the documentation, the macro will always be NULL terminated. Which
means that the check `if( cIdleName[ xIdleTaskNameIndex ] == ( char ) 0x00 )`
will catch the end of string.

* Update coverity config; Add coverity version; Update pvPortMalloc declaration to match the definitions.

* Add port files to sed command

* Remove warnings about unused parameters in port code

---------

Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
2024-02-20 22:19:41 +05:30
chinglee-iot 1a500f1a74
Support reset kernel state for restarting scheduler (#944)
* Adding the following functions to reset kernel state. These functions are only required for application which 
needs to restart the scheduler.
 - void vTaskResetState( void )
 - void vTimerResetState( void )
 - void vPortHeapResetState( void )
 - void vCoRoutineResetState( void )

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Chris Morgan <cmorgan@boston-engineering.com>
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2024-02-19 14:39:31 +08:00
Christoph Seitz e68975fcf7
Add default core affinity config value. (#996)
* Add default core affinity config value.

---------

Co-authored-by: Anubhav Rawal <rawalexe@amazon.com>
2024-02-16 11:12:18 +05:30
bradleysmith23 4d34700bcc
Fix MISRA C 2012 Rule 13.3 Violations (#988)
* MISRA Rule 13.3 Fixes

* Add semiicolons that were accidentally removed

* Add parentheses back around pxList->uxNumberOfItems where removed.

* Formatting fix

* Add Casts to UBaseType_t

---------

Co-authored-by: bjbsmith <bjbsmith@uafeb6a6bcdce55.ant.amazon.com>
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
2024-02-14 11:48:35 +05:30
Rahul Kar 8c10944575
Remove PRIVILEGED FUNCTION from function definiton (#989) 2024-02-13 20:10:20 +05:30
bradleysmith23 8cfa7152f7
Fix MISRA C 2012 Rule 13.2 Violations (#979)
* Fix violations of MISRA rule 13.2

* Fix typo in UBaseType_t

* Uncrustify: triggered by comment.

* Run Github Actions.

* Remove temp variable for uxCurrentNumberOfTasks

Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>

* Declare uxCurrentListLength at top of function, update comment.

* Update location of uxCurrentListLength Declaration

* Uncrustify: triggered by comment.

* Run Github Actions

* Uncrustify: triggered by comment.

* Run Github Actions.

* Update comment explaining use of temp variable

---------

Co-authored-by: GitHub Action <action@github.com>
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
2024-02-13 10:41:30 +05:30
Rahul Kar bd652237fb
Update default value of configSTACK_DEPTH_TYPE in config file (#987) 2024-02-13 10:09:32 +05:30
Darian 7284d84dc8
Update task notification scheduler suspension usage (#982)
* Update task notification scheduler suspension

Previously ulTaskGenericNotifyTake() and xTaskGenericNotifyWait() would suspend
the scheduler while inside a critical section.

This commit changes the order by wrapping the critical sections in a scheduler
suspension block. This logic is more inuitive and allows the SMP scheduler
suspension logic to be simplified.

* tasks.c: Fix typo

* Use a complete sentence in comment

* Check portGET_CRITICAL_NESTING_COUNT when scheduler is running

* Prevent potential NULL pointer access when scheduler is not running

---------

Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
Co-authored-by: Ching-Hsin Lee <chinglee@amazon.com>
2024-02-07 13:14:04 +08:00
chinglee-iot 57a5ed7f67
Fix SMP task self void run state change (#984)
* Request a task to yield after been suspended or deleted to prevent this task puts itself back to another list
* Fix volatile variable access order to ensure ensure compliance with MISRA C 2012 Rule 13.5

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2024-02-06 20:41:34 +08:00
Paul Bartell 23afc48fc3
Update version number (#983)
* Update version number to 11.0.1+ in task.h

* Update Third Party Port version to <DEVELOPMENT BRANCH>

* Update version to 11.0.1 in manifest.yml
2024-02-06 15:48:14 +05:30
Eric Jackson 938ec0f7bf
Correct ARM port folder capitalization (#981)
* Rename Arm_AARCH64 to ARM_AARCH64

* Rename Arm_AARCH64_SRE to ARM_AARCH64_SRE

* Update cmake for ARM port folder capitalization

* Update in portable/CmakeLists.txt
* Use capitalization name in port README.md

---------

Co-authored-by: Ching-Hsin Lee <chinglee@amazon.com>
2024-02-05 10:31:52 -08:00
bradleysmith23 1065389c4e
Fix MISRA C 2012 Rule 10.4 Violations (#972)
Fixes for violations of MISRA rule 10.4
2024-02-05 18:08:15 +05:30
bradleysmith23 c19b13cdfc
Fix MISRA C 2012 Rule 14.4 Violations. (#975)
* Fix MISRA rule 14.4 violations.

* Use pdFALSE instead of 0 in comparison

Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>

* Uncrustify: triggered by comment.

* Run Github Actions.

---------

Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
Co-authored-by: GitHub Action <action@github.com>
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
2024-02-02 14:28:43 -08:00
Darian 1c35cb3bc9
Enable xTaskGetCurrentTaskHandleForCore() for single core builds (#978)
Enable xTaskGetCurrentTaskHandleForCore() for single core builds

---------
Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: Ching-Hsin Lee <chinglee@amazon.com>
2024-02-02 11:46:20 -08:00
bradleysmith23 1189198a5e
Fix MISRA C 2012 Rule 20.7 Violations (#971)
* Initial set of SA fixes

* Revert function parameter name changes

* Reverted parameter name for Static version of function by mistake

* Update mpu_wrappers_v2.c to only include 20.7 fixes

* Update queue.c to remove non-20.7 fixes

* Update tasks.c to remove non-20.7 fixes

---------

Co-authored-by: bjbsmith <bjbsmith@uafeb6a6bcdce55.ant.amazon.com>
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
2024-02-02 01:27:22 +05:30
Rahul Kar b4da9e301f
Fix MISRA directive 4.7 warning (#977) 2024-02-01 17:38:24 +05:30
bradleysmith23 d94db2d11d
Fix MISRA C 2012 Rule 10.3 Violations (#974)
* Resolve violations for MISRA Rule 10.3-b2

* Formatting fix

---------

Co-authored-by: bjbsmith <bjbsmith@uafeb6a6bcdce55.ant.amazon.com>
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
2024-02-01 14:58:24 +05:30
bradleysmith23 cd8c6c1f22
Fix MISRA C 2012 Rule 9.3 violations (#973)
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2024-02-01 14:31:53 +05:30
bradleysmith23 edd35e8f6e
Fix MISRA Rule 10.1 violations (#976)
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2024-02-01 12:36:56 +05:30
chinglee-iot 1de764ba87
Delete kernel created task in vTaskEndScheduler (#962)
* Update vTaskDelete() to delete a task directly when scheduler is stopped instead of putting it on the xTasksWaitingTermination list.
* Delete the idle tasks and timer task in vTaskEndScheduler().
* Reclaim resources for all the tasks on the xTasksWaitingTermination list in vTaskEndScheduler().
* Update POSIX to no longer delete FreeRTOS tasks in the port.

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2024-02-01 11:12:08 +08:00
Rahul Kar ba1e2dad3c
Update ARMv8-M config definitions in template file (#970)
* Update ARMV8-M config definitions in template file

---------

Co-authored-by: GitHub Action <action@github.com>
2024-01-31 12:25:56 +05:30
barnatahmed c565fd45c1
Cmake: Create a single static library including port
Modify portable/CMakeLists.txt to create only one static library containing both the common kernel code and kernel port.

Change the freertos_kernel_port target from a STATIC library to an OBJECT library and introduce a new freertos_kernel_port_headers  INTERFACE library target.

---------

Co-authored-by: ABARNAT <ahmed.barnat@actia-engineering.tn>
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2024-01-30 11:44:27 -08:00
Phillip Stevens 8622bd5f49
Fix ThirdParty/GCC/ATmega formatting (#965)
Unnecessary white space was introduced in PR #768
which affected the formatting of assembly code. This PR
returns the correct formatting. No functional change.
2024-01-30 11:12:20 +05:30
Gaurav-Aggarwal-AWS 04cb022e44
Add a check for configENABLE_MVE to M23, M33 ports (#968)
Add a check for configENABLE_MVE to M23, M33 ports

configENABLE_MVE is only applicable to Cortex-M55 and Cortex-M85 ports.
It must not be defined to 1 for other ARMv8_m ports.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2024-01-30 10:43:53 +05:30
Gaurav-Aggarwal-AWS 5a2237a1e2
Remove configTOTAL_MPU_REGIONS from M3 MPU port (#966)
The number of MPU regions is not configurable for Cortex-M3 port and
therefore, it is misleading to have configTOTAL_MPU_REGIONS in
portmacro.h.

It was added in PR #952.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2024-01-29 23:59:18 +05:30
Soren Ptak d63434493a
Add missing Task Notification IFDEF (#967)
Wrap the task notification check in vTaskGetInfo() in in a  #if ( configUSE_TASK_NOTIFICATIONS == 1 )
2024-01-29 22:49:09 +05:30
José Simões 722596eaae
Add code to allow building for x64 in MSVC (#924)
* Add code to allow building for x64 in MSVC

- Add code for x64 arch.
- Add initial value for local otherwise it won't get proper value in x64.

* Moving init local to portGET_HIGHEST_PRIORITY

- From code review.

* More changes following review

* Another style fix from review

* Update formatting

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com>
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2024-01-29 12:05:10 +05:30
Forty-Bot 1860c9ad09
GCC: MSP430F449: Fix pxPortInitialiseStack on EABI (#947)
According to the MSP430 EABI [1] section 3.3,

Arguments are assigned, in declared order, to the first available
register single, pair, or quad from the following list into which it
fits (with the following special exceptions). For MSP430 and
MSP430X, the argument registers are: R12, R13, R14, R15

Therefore, pvParameters should be passed in R12, as it is the first
argument, not R15. Keep passing the parameter in R15 for the
MSP430 EABI, if anyone is still using it.

[1] https://www.ti.com/lit/an/slaa534a/slaa534a.pdf
2024-01-29 11:07:43 +05:30
Soren Ptak b1ee2e6e14
Fix MacOS Posix port (#957)
PR #914 caused Posix Port to fail to build on MacOS. This PR fixes
teh build failure.

This PR also adds a Matrix configuration to the GitHub kernel-demo
workflow to build the Posix Demos on MacOS.
---------

Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2024-01-28 18:41:03 +05:30
Phillip Stevens 14dd5b503a
use configSTACK_DEPTH_TYPE consequently (updated for 11.0.x) (#942)
* use configSTACK_DEPTH_TYPE consequently

* update default to uint32_t

* Update FreeRTOS.h

Revert for backwards compatibility

* Update portable.h

* configSTACK_DEPTH_TYPE - unify stack variable naming

* update lexicon.txt

* update typo lexicon.txt

* Update task.h

* Update timers.h

* fix merge typo

* fix stack type

* fix timer stack type

* fix timer stack more

* fix affinity set stack

* adjust ports to use configSTACK_DEPTH_TYPE

* fix vTaskListTasks

* set default stack depth type in portable.h

* fix History.txt

* update affinityset

* resolve reviewer comments

* fix prvTaskCheckFreeStackSpace for variable stack size type

* restore CoRoutine defines

* remove obsolete stack ttype casts

* fix (attempt) for format portable.h

* Formatting fixes

* prvTaskCheckFreeStackSpace make variable naming compliant

* Update portable/GCC/ARM_CM33/non_secure/port.c

Co-authored-by: Soren Ptak <ptaksoren@gmail.com>

* Update portable/GCC/ARM_CM23/non_secure/port.c

Co-authored-by: Soren Ptak <ptaksoren@gmail.com>

* Apply suggestions from code review

Update ulStackDepth to uxStackDepth

Co-authored-by: Soren Ptak <ptaksoren@gmail.com>

* Correct uxStackDepth in port.c

Also add uint32_t cast prvGetMPURegionSizeSetting.

* Update ARM CM3 MPU port.c

Revert casting of ( uint32_t ) pxBottomOfStack

* Code review suggestions

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2024-01-27 10:56:55 +05:30
Mubin Sayyed 5040a67939
Sync up MicroblazeV9 port with Xilinx tree (#220)
* MicroblazeV9: Add support for 64 bit microblaze
* MicroblazeV9: Add support for generation of run time task stats
* MicroblazeV9: Add default implementation for callback functions
---------
Signed-off-by: Mubin Usman Sayyed <mubin.usman.sayyed@xilinx.com>
2024-01-25 22:21:44 -05:00
Soren Ptak 8e664fc984
Add check for if the scheduler is running to ARMv8M MPU ports (#960)
* Allow access to any buffer in xPortIsAuthorizedToAccessBuffer if xSchedulerRunning is set to pdFALSE

* Allow access to any buffer in xPortIsAuthorizedToAccessBuffer if xSchedulerRunning is set to pdFALSE in the copied ARMv8M Port Files
2024-01-25 00:22:13 +05:30
chinglee-iot 72c7d86276
Update for unpaired critical section in vTaskSuspend (#959)
* Move the taskEXIT_CRITICAL out of the configNUMBER_OF_CORES macro block to improve readability.
2024-01-24 19:48:31 +08:00
Soren Ptak 4d9f6522e5
Add check for if the scheduler is running to MPU ports (#954)
* In the ARM_CM3_MPU and ARM_CM4_MPU Port function xPortIsAuthorizedToAccessBuffer() grant access to the buffer if xSchedulerRunning is false.
2024-01-23 11:48:20 -08:00
chinglee-iot cf2366c949
Update unpaired critical section in vTaskDelete for readability (#958)
* Modify unpaired critical section for readability
* Move prvDeleteTCB out of critical section for SMP

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2024-01-23 17:02:15 +08:00
Mikhail Paulyshka e6f6d0ecf4
Posix port - set name for threads (#950)
Co-authored-by: jasonpcarroll <23126711+jasonpcarroll@users.noreply.github.com>
2024-01-18 11:35:16 -08:00
IsaacDynamo 52ab3d0f22
MPU assert for ARM_CM3_MPU (#952)
* Add runtime check to see if the target even has a MPU

* Add missing extern symbols for __ARMCC_VERSION support

* Add default for configTOTAL_MPU_REGIONS and change a runtime assert to compile time error

* Simplify check and link to reference documentation

Co-authored-by: Soren Ptak <ptaksoren@gmail.com>

---------

Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
Co-authored-by: jasonpcarroll <23126711+jasonpcarroll@users.noreply.github.com>
2024-01-18 11:12:21 -08:00
IsaacDynamo aa07289c24
Make configSUPPORT_STATIC_ALLOCATION==1 an error for MPU ports (#953)
* Error when configSUPPORT_STATIC_ALLOCATION is set for MPU ports

* Uncrustify: triggered by comment.

---------

Co-authored-by: GitHub Action <action@github.com>
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
2024-01-18 11:02:41 -08:00
IsaacDynamo c083af972a
Add mpu_wrappers_v2_asm.c to MPU ports (#951)
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
2024-01-17 12:22:32 -08:00
Tony Josi c053ffeacc
Fix -Werror=unused-parameter in GCC posix prvTimerTickHandler() (#949) 2024-01-13 21:43:05 +05:30
Chris Morgan 3baa3dd98b POSIX port - Switch from allowing the user to specify the stack memory itself, to allowing them to specify the stack size
Change from pthread_attr_setstack() to pthread_attr_setstacksize(), and automatically adjust the stack size
to be at least PTHREAD_STACK_MIN if it wasn't already, removing the size warning.

This permits the user to increase the pthread stack size beyond the PTHREAD_STACK_MIN default of 16384 if
desired, without producing a warning in the typical case where stacks are minimized for RAM limited targets.

Continue to store thread paramters on the provided stack, for consistency with the MCU targets.

Previously pthread_attr_setstack() was used to enable user defined stacks.

Note that:

1. The stack size can still be specified by the user.

2. pxPortInitialiseStack(), and pthread_addr_setstack() was failing on stacks of typical size, as
   these are smaller than PTHREAD_STACK_MIN (16384) bytes, and printing out a series of warnings.
   Improve usability by having the posix port automatically increase the stack size to be
   at least PTHREAD_STACK_MIN as posix platforms have enough memory for this not to be a concern.

3. Reuse of stack memory will also result in valgrind 'invalid write' errors to what is demonstrably
   valid memory. Root cause is that Valgrind is tracking a stack pointer as the stack is used.
   Reuse of a stack buffer results in the stack being used at its start, in an area that Valgrind thinks
   is far away from the start of the stack. There are ways to notify Valgrind of these changes
   however this would require linking against and calling Valgrind functions from the FreeRTOS application using
   the posix port, https://valgrind.org/docs/manual/manual-core-adv.html#manual-core-adv.clientreq.

   Also, apparently it isn't permitted by posix to reuse stack memory once its been used in a pthread via pthread_attr_setstack(),
   see https://stackoverflow.com/a/5422134
2024-01-11 10:53:54 -08:00
Ching-Hsin Lee 62220666ba Revert pthread_attr_setstacksize 2024-01-11 10:53:54 -08:00
Ching-Hsin,Lee b6c0c51cbe Revert timer tick function 2024-01-11 10:53:54 -08:00
Ching-Hsin,Lee 5ed9c7022b Add back event signal 2024-01-11 10:53:54 -08:00
Ching-Hsin,Lee 14903c380e Remove redundent cancellation point 2024-01-11 10:53:54 -08:00
Ching-Hsin,Lee a7d39c3e3a format and header file 2024-01-11 10:53:54 -08:00
Ching-Hsin,Lee 0fac0859af Add back heap setup code 2024-01-11 10:53:54 -08:00
Ching-Hsin,Lee 3dade5b5a5 UPdate format 2024-01-11 10:53:54 -08:00
Ching-Hsin Lee 7ba4124c78 Add back the pthread stack fit 2024-01-11 10:53:54 -08:00
Ching-Hsin,Lee 6b698ff6bc Fix potential race condition 2024-01-11 10:53:54 -08:00
Chris Morgan 88d3540b54 POSIX port - Cancel and join all FreeRTOS managed pthreads upon shutdown
For a clean shutdown where memory is freed, it is necessary for all pthreads to be joined
at shutdown.

Previously there was explicit cancellation of the idle task and timer daemon task, however
there may be a number of other tasks in the system, both system created and user created,
and those tasks/threads were being left at shutdown.

This change calls pthread_cancel()/pthread_join() on all FreeRTOS managed pthreads upon
shutdown.
2024-01-11 10:53:54 -08:00
Chris Morgan ddc89fa985 POSIX - Switch from posix timers to a timer thread to fix signal handling with non-FreeRTOS pthreads
Improve upon the elegant approach of using signals to cause task/pthreads
suspension and scheduler execution by using directed signals.

This fixes:
- Deadlocks in non-FreeRTOS pthreads
- Multiple FreeRTOS tasks(pthreads) incorrectly running at the same time

By directing the signals using pthread_kill() the signal handler in the presently running
FreeRTOS task/pthread will be called, ensuring that the scheduler runs both in the context
of a FreeRTOS task/pthread and from the presently executing FreeRTOS task/pthread.

Details
==============

The POSIX port uses signals to preempt FreeRTOS tasks (implemented as pthreads), a very neat and elegant
approach to forcing tasks/pthreads to suspend and run the scheduler.

Signal handlers are process global.

Posix timers generate signals when the timer expires, and the signal is sent to the currently
running pthread.

In systems where there are pthreads that are NOT a result of creating FreeRTOS tasks, such as the
entry point thread that calls main(), or user created pthreads, this poses a serious issue.

While the POSIX port only allows a single FreeRTOS pthread to run at once, by causing all suspended
threads to not be scheduled due to their waiting on a pthread condition variable,
this isn't the case with non-FreeRTOS pthreads.

Thus it is possible that a non-FreeRTOS pthread is running when the timer expires and the signal
is generated. This results in the signal handler running in the non-FreeRTOS thread.

The sequence of events results in these events from signal handler context:
- vPortSystemTickHandler() being called
- The scheduler running
- Selecting another FreeRTOS task to run and switching the active task
- The newly selected task released from suspension by pthread_cond_signal()
- The presently active thread calling event_wait()
- The pthread calling pthread_cond_wait(), suspending the thread and allowing the host OS scheduler
  to schedule another thread to run.

If this occurs from a non-FreeRTOS thread this results in:
- The active FreeRTOS pthread (Task A/Thread A) continuing to run (as the signal handler that calls
  event_wait() ran instead in a non-FreeRTOS pthread.
- The pthread where the signal handler did run (Thread B) will call event_wait() and pthread_cond_wait(),
  but on the condition variable of the previously active FreeRTOS task, oops. This causes the
  non-FreeRTOS pthread to block unexpectedly relative to what the developer might have expected.
- The newly selected FreeRTOS Task (Task C/Thread C) will resume and start running.

At this point Task A/Thread A is running concurrently with Task C/Thread C. While this may not
necessarily be an issue, it does not replicate the expected behavior of a single Task running at
once.

Note that Thread B will resume if/when Task A/ThreadA is switched to. However, this could be delayed
by an arbitrary amount of time, or could never occur.

Also note that if there are multiple non-FreeRTOS pthreads that Thread D, E, F...etc could suffer the
same fate as Thread B, if the scheduler were to suspend Task C/Thread C and resume Task E/Thread E.

Implementation
==============

Timer details
-------------
A standalone pthread for the signal generation thread was chosen, rather than using
a posix timer_settime() handler function because the latter creates a temporary
pthread for each handler callback. This makes debugging much more difficult due to
gdb detecting the creation and destruction of these temporary threads.

Signal delivery
--------------
While signal handlers are per-thread, it is possible for pthreads to selectively block
signals, rather than using thread directed signals. However, the approach of blocking
signals in non-FreeRTOS pthreads adds complexity to each of these non-FreeRTOS pthreads
including ensuring that these signals are blocked at thread creation, prior to the thread
starting up. Directed signals removes the requirement for non-FreeRTOS pthreads to be aware
of and take action to protect against these signals, reducing complexity.
2024-01-11 10:53:54 -08:00
Soren Ptak 529de5606e
Revert #768 on the XCC/Xtensa portable files (#948) 2024-01-10 20:28:45 +05:30
chinglee-iot 94cb87ad30
Assign idle task to each core before SMP scheduler start (#945)
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
2024-01-09 14:03:47 +08:00
Soren Ptak 460e953076
Add new common words to the cSpellWordList.txt (#946) 2024-01-08 11:58:18 +05:30
Gabriele Monaco 1947dd2f94
Added ability to change task notification index for streambuffers (#939)
* Added possibility to change notification index for streambuffers

* Uncrustify: triggered by comment.

* Minor code review suggestions.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: GitHub Action <action@github.com>
Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2024-01-04 11:43:34 -08:00
Eric Jackson 4568507507
Fix documentation for xQueueTakeMutexRecursive (#943) 2024-01-03 11:49:02 -08:00
chinglee-iot be880a1fc8
Fix portSET_INTERRUPT_MASK_FROM_ISR definition for atomic operation (#940)
* Introduce portHAS_NESTED_INTERRUPTS to identify if port has nested interrupt or not.
* Update atomic.h to use portHAS_NESTED_INTERRUPTS instead of portSET_INTERRUPT_MASK_FROM_ISR definition.

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: ActoryOu <jay2002824@gmail.com>
2024-01-03 15:47:05 +08:00
dps.lwk 75c4044b7e
RP2040: Fix removal of idle_task_static_memory.c (#935)
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
2024-01-03 11:06:04 +05:30
Jeff Tenney 5544c78299
Fix build error for MSP430 and Cortex A with IAR (#937)
* fix whitespace in asm macros

* Revert formatting ARM_CA5_No_GIC and ARM_CA9
2023-12-29 11:48:56 -08:00
Soren Ptak 58f0d36e76
Export MPU Section Attributes (#931)
Export the PRIVILEGED_FUNCTION, PRIVILEGED_DATA, and FREERTOS_SYSTEM_CALL
attributes to make it easier for end users to add their own privileged functions and
system calls.
2023-12-26 16:06:50 +05:30
dps.lwk 93380c02a1
RP2040: FreeRTOS-Kernel-Static use configKERNEL_PROVIDED_STATIC_MEMORY (#934)
Remove the idle_task_static_memory.c and use the new default implementations
to allows for FreeRTOS-Kernel-Static to be used with configNUMBER_OF_CORES > 1
2023-12-26 17:02:47 +08:00
Forty-Bot ec93432a59
Fix build with modern GCC (#933)
* GCC: MSP430F449: Add missing attributes

Apparently at some point in the past, GCC (or TI's GCC) used to define
these attributes. Define them ourselves so that we can compile the demo
application.

* GCC: MSP430F449: Make interrupts return void

If a return type of a function is not specified, it defaults to int. Set
the return type of interrupts to void to avoid warnings.

* GCC: MSP430F449: Define portPOINTER_SIZE_TYPE

portPOINTER_SIZE_TYPE defaults to uint32_t if undefined. Define it to
uint16_t, which is correct for this port.
2023-12-22 14:09:55 -07:00
Rahul Kar 4e7ca2d704
Update History.txt for V11.0.1 (#932)
* Update History for V11.0.1
2023-12-21 11:43:30 +05:30
chinglee-iot 5bb2b59db4
Update History.txt for v11.0.0 (#926)
* Update History.txt for v11.0.0
2023-12-18 17:16:22 +08:00
Rahul Kar b0439d3283
Rename sample configuration to template configuration (#927)
* Rename sample configuration to template configuration

* Rename sample configuration to template configuration in cmake example file
2023-12-18 10:43:08 +05:30
Soren Ptak 553b0ad5d3
Update comments related to portYIELD_FROM_ISR() in queue.h #925 2023-12-15 09:34:52 -08:00
Rahul Kar 1384c68dc7
Update sample configuration file (#923)
* Update sample configuration file in the examples folder

* Add SMP Configuration definitions

* Fix build issue in cmake example

* Add CoRoutine Configuration definitions

* Code review suggestions

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Fix formatting

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-12-15 12:31:18 +08:00
chinglee-iot e0bb21f832
Remove the sample smp configuration folder (#922)
* Remove the sample smp configuration folder
2023-12-13 13:41:29 +05:30
Darian bd0f87c18b
Add portTASK_SWITCH_HOOK (#867)
This commit adds a portTASK_SWITCH_HOOK() macro which allows ports to inject
behavior immediately after a context switch. For example, this macro could be
used by ports that need to set an end of stack watchpoint after a context
swtich.

Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
Co-authored-by: Tony Josi <tonyjosi@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-12-11 15:12:53 +08:00
Jeff Tenney 30e6b8a5ea
Detect more startup config errors on Cortex M (#832)
Verify that the application has correctly installed PendSV
and SVCall handlers. The application can choose to
disable these checks by setting configCHECK_HANDLER_INSTALLATION
to 0 in their FreeRTOSConfig.h.
2023-12-11 10:27:47 +05:30
RichardBarry 553caa18ce
Update the memory alignment within the Cortex-A9 port asm code (#426)
Update alignment in ARM_CA9 port.
2023-12-09 14:49:39 +05:30
chinglee-iot a79752a04a
Remove lint suppression comment (#920)
Remove lint suppression comment
2023-12-08 12:19:42 +05:30
chinglee-iot a2712b5e38
Add constanst suffix to prevent potential type conversion (#921)
Co-authored-by: Ubuntu <ubuntu@ip-172-31-34-245.ap-northeast-1.compute.internal>
2023-12-08 11:36:55 +05:30
chinglee-iot 5dbfd380f0
Add coverity example (#870)
* Add coverity example

* Update for CI

* Fix for CI 2

* Update kernel_misra.config

* Rename coverity example to coverity

* Update FreeRTOSConfig.h for coverity project

* Update MISRA.md

* Move coverity config to coverity_misra.config

* Update coverity misra config

* Add README.md file

* Update FreeRTOSConfig.h for coverity

* Fix uncrustify and spell

* Update README.md for relative link path

Update README.md for relative link path

* Update README.md for relative link 2

* Update MISRA.md for relateive path

* Fix for format

* Update coverity_misra.config

* Update configuration folder

* Update README.md for link

* Code review suggestions

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-34-245.ap-northeast-1.compute.internal>
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-12-08 00:54:20 +05:30
Soren Ptak ac7fc396a0
Revert Portable/BCC formatting (#828)
Revert Portable/BCC formatting
2023-12-07 22:21:11 +05:30
Soren Ptak bcf7bdaa13
Revert Portable/oWatcom formatting (#829)
Revert the formatting on oWatcom ports
2023-12-07 22:10:50 +05:30
Soren Ptak 0debe8c669
Revert Portable/Paradigm formatting (#830)
Revert the formatting on Paradigm ports
2023-12-07 22:02:49 +05:30
Soren Ptak db5df4bfde
Revert Portable/CodeWarrior formatting (#831)
Revert the formatting on CodeWarrior ports
2023-12-07 21:46:33 +05:30
chinglee-iot de2c0c1a95
Update partner and community supported port submodule pointer (#919) 2023-12-07 19:43:02 +08:00
chinglee-iot d95b05ea5f
Suppress MISRA C:2012 rule 21.6 for snprintf (#877)
Suppress MISRA C:2012 rule 21.6 for snprintf
2023-12-07 16:21:14 +05:30
chinglee-iot 877484cd7e
Fix MISRA C 2012 Rule 11.1 deviations (#856)
* Update callback function prototype to align with definition
* Suppress unused function pointer parameter

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-34-245.ap-northeast-1.compute.internal>
Co-authored-by: GitHub Action <action@github.com>
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-12-07 18:15:19 +08:00
chinglee-iot 15af8e072d
Add description about overrun warning in queue.c (#869)
* Add description about overrun warning in queue.c

* Remove the unreachable configASSERT

* Code review suggestions

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Fix formatting

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-34-245.ap-northeast-1.compute.internal>
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-12-07 15:22:21 +05:30
Rahul Kar 93ef558fa8
Declare variable without initializer (#841)
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-12-07 14:56:44 +05:30
chinglee-iot 51437bf943
Fix MISRA C 2012 rule 8.6 errors (#862)
* Fix MISRA C 2012 rule 8.6 errors

* Add suppression for hook function

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-34-245.ap-northeast-1.compute.internal>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-12-07 14:23:02 +05:30
Rahul Kar 55094e2ddf
Fix MISRA_C_2012 rule 13.2 violation (#855)
* Assign volatile variables to local non-volatile variables before read

* Fix stack macro overflow check volatile access

* Explicit the read order of volatile variable

* Fix issue : ISO C90 forbids mixed declarations and code



---------

Co-authored-by: Ubuntu <ubuntu@ip-172-31-34-245.ap-northeast-1.compute.internal>
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
Co-authored-by: Monika Singh <moninom@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-12-07 12:15:09 +05:30
Rahul Kar d1a0202125
Fix MISRA_C_2012 rule 8.4 violation (#844)
Fix MISRA_C_2012 rule 8.4 violation
2023-12-07 11:27:50 +05:30
Rahul Kar 22eb827b3d
Add parameter name for function type (#845)
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-12-06 21:53:52 +05:30
Rahul Kar ce41f6ec74
Fix MISRA_C_2012 rule 7.2 violation (#842)
* Add a u or U suffix for unsigned numerical literals

* Fix formatting

* Replace u with U for naming convention

---------

Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-12-06 21:37:52 +05:30
Rahul Kar 71d86f9a6e
Fix MISRA_C_2012 rule 17.7 violation (#848)
* Assign return value of xPortStartScheduler API to a variable

* Add void datatype

---------

Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-12-06 16:33:18 +05:30
Rahul Kar edce1e94b3
Fix MISRA_C_2012 rule 20.7 violation (#843)
* Wrap macro parameter expansion by parentheses
* Update parentheses in SMP macro definition

---------

Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
Co-authored-by: Monika Singh <moninom@amazon.com>
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
2023-12-06 16:27:10 +08:00
chinglee-iot 84c0047ccd
Suppress MISRA C:2012 rule 11.5 deviations (#878)
* Suppress MISRA C:2012 rule 11.5 deviations by comment also remove this rule in global config

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-34-245.ap-northeast-1.compute.internal>
Co-authored-by: Rahul Kar <karahulx@amazon.com>
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-12-06 09:51:52 +08:00
Darian cd5c774b2b
Update xTaskGetIdleTaskHandle() For SMP (#868)
* Update xTaskGetIdleTaskHandle() in SMP

This commit updates xTaskGetIdleTaskHandle() for SMP in the following ways:

- xTaskGetIdleTaskHandle() no longer accepts xCoreID argument in SMP so that
there is not change in API between single-core and SMP
- xTaskGetIdleTaskHandle() now returns the Active idle task handle in SMP,
which matches the behavior in single-core.
- Added xTaskGetIdleTaskHandleForCore() in SMP which accepts an xCoreID
argument. This function can be used to obtain the Passive idle task handles.

* Update xTaskGetIdleTaskHandle

---------

Co-authored-by: Ching-Hsin Lee <chinglee@amazon.com>
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-12-05 14:31:11 +08:00
chinglee-iot c0ce725293
Add SMP template port and example (#900)
* Add SMP template port and example
* Add readme file for smp configuration
* Update SMP build flow and add CI build

---------

Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
2023-12-04 10:49:41 +08:00
Rahul Kar f8ef5f605b
Fix prototype of MPU_vTimerSetReloadMode (#913) 2023-11-30 00:17:56 +00:00
Legend 592bfe0e01
Fix typo in comment (#910)
Co-authored-by: Tony Josi <tonyjosi@amazon.com>
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com>
2023-11-29 21:02:30 +05:30
Soren Ptak 6a9f5a244a
Add portMEMORY_BARRIER() to RX MCU ports (#864)
* Add portMEMORY_BARRIER() to RX MCU ports

* Remove the memory barrier from the SH2A_FPU portable directory

---------

Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
2023-11-29 15:52:16 +05:30
Soren Ptak 6a41432498
Upgrade msvc port to winsock2 (#895)
* Add the changes needed to the MSVC windows port to get it to build with winsock2.h
* Rely upon the WIN32_LEAN_AND_MEAN define to include winsock2.h
2023-11-28 20:16:16 +00:00
Soren Ptak 147f34ab5f
Revert Portable/Renesas formatting (#876)
* Revert the formatting on Renesas ports
2023-11-28 10:56:15 -08:00
Rahul Kar a2a4485ed3
Coverity Report Directory Fix (#909)
* Revert "The curl command to send the report expects the tar file to be in its current directory. The step either needed to have the working-directory: set to the build directory, or the tar file needs to be created in the parent directory. (#903)"

This reverts commit 76f3aa5b05.

* Update to separate build and upload steps

---------

Co-authored-by: tony-josi-aws <tonyjosi@amazon.com>
2023-11-28 19:16:15 +05:30
chinglee-iot dabbc05a39
Suppress MISRA C rule 11.3 in MISRA.md (#857)
Suppress MISRA C rule 11.3 in MISRA.md
2023-11-28 19:04:29 +05:30
chinglee-iot f2637bae55
Fix MISRA 2012 Rule 10.8 violation (#853)
Co-authored-by: Ubuntu <ubuntu@ip-172-31-34-245.ap-northeast-1.compute.internal>
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-11-28 17:04:13 +05:30
chinglee-iot 1813a4551e
Fix MISRA 2012 rule 10.4 violations (#852)
Fix MISRA 2012 rule 10.4 violations
2023-11-28 16:51:03 +05:30
chinglee-iot ce88adea2a
Fix MISRA C 2012 Rule 10.3 errors (#860)
* The value of an expression shall not be assigned to an object with a narrower essential type or of a different essential type category.
---------

Co-authored-by: Ubuntu <ubuntu@ip-172-31-34-245.ap-northeast-1.compute.internal>
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-11-28 13:29:07 +08:00
Soren Ptak 76f3aa5b05
The curl command to send the report expects the tar file to be in its current directory. The step either needed to have the working-directory: set to the build directory, or the tar file needs to be created in the parent directory. (#903)
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-11-28 10:38:57 +05:30
Tony Josi 61f35dc6b1
Coverity scan and upload in single step (#902) 2023-11-27 09:20:41 +05:30
chinglee-iot ac4313560f
Not to use object modified in the loop body (#861)
Co-authored-by: Ubuntu <ubuntu@ip-172-31-34-245.ap-northeast-1.compute.internal>
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-11-24 11:38:34 +05:30
Soren Ptak 09c4c4bae9
Coverity Scan Workflow Fix (#891)
Currently the Coverity Scan attempts to run on every fork that pulls
the file. This leads to anybody who pulls this file getting emails that 
their workflow failed to run when the cron job attempts to run. This
PR sets the scan to only run if the repo is FreeRTOS/FreeRTOS-Kernel.
Also, change the scan from a cron job to a job that runs on a commit
to mainline, or if triggered manually.
2023-11-23 22:17:31 +05:30
Soren Ptak cb196ddbb1
Revert Portable/WizC Formatting (#888)
* Revert formatting on WizC ports

* Fix spelling mistakes

---------

Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-11-23 17:34:07 +05:30
Soren Ptak b3febb7416
Revert formatting on Tasking ports (#887)
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-11-23 17:21:23 +05:30
Soren Ptak 92365c9784
Revert Portable/Softune Formatting (#886)
* Revert formatting on Softune ports

* Fix spelling mistakes

---------

Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-11-23 17:09:28 +05:30
Soren Ptak 96cdeaa725
Revert formatting on SDCC ports (#885)
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-11-23 16:44:36 +05:30
Soren Ptak 9a2ce912ff
Revert formatting on Rowley ports (#884)
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-11-23 16:23:55 +05:30
Soren Ptak 8d1da77d0d
Revert Portable/MPLAB Formatting (#883)
* Revert the formatting PR

* Fix spelling mistakes

---------

Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-11-23 15:59:40 +05:30
Soren Ptak 2dfc5142f4
Revert the formatting changes on MikroC ports. (#882)
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-11-23 15:50:15 +05:30
Soren Ptak a8a17dc4b5
Revert formatting on CCS port files (#881)
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-11-23 15:39:09 +05:30
Gaurav-Aggarwal-AWS 76be28cdc6
Update system call entry mechanism (#898)
Earlier the System Call entry from an unprivileged task
looked like:

1. SVC for entering system call.
2. System call implementation.
3. SVC for exiting system call.

Now, the system call entry needs to make only one SVC
call and everything else is handled internally.

This PR also makes the following changes:

1. Update the Access Control List (ACL) mechanism to
    grant access to all the kernel objects before the
    scheduler is started.
2. Add one struct param for system calls with 5 parameters.
    This removes the need for special handling for system
    calls with 5 parameters.
3. Remove raise privilege SVC when MPU wrapper v2 is used.
4. Add additional run time parameter checks to MPU wrappers
    for xTaskGenericNotify and xQueueTakeMutexRecursive APIs.
2023-11-23 10:47:47 +05:30
Ha Thach 4ff01a7a4a
fix IAR/CM0/portmacro.h missing semicolon (#894)
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
2023-11-18 13:31:50 +05:30
Moral-Hao 5f2bb1b48b
In smp, every core has a idle task. (#893)
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
2023-11-16 11:53:27 -08:00
chinglee-iot dc09a3dd51
Add vApplicationGetPassiveIdleTaskMemory for SMP (#890)
* Update vApplicationGetIdleTaskMemory prototype for SMP. Now SMP and
  single core use the same prototype for compatibility.
* Add vApplicationGetPassiveIdleTaskMemory for SMP to get passive idle
  task memory.
2023-11-16 09:04:05 +08:00
Soren Ptak ad13a1f8df
CI-CD URL Check Change (#880)
* Remove the Kernel's custom URL check to just use the CI-CD Actions one
* Exclude portable directory from formatting check.
2023-11-09 15:00:06 -08:00
Darian 9c649ea7d1
Add time conversion macros (#866)
This commit updates the following time conversion macros:

- pdMS_TO_TICKS: Added cast to "uint64_t" to prevent overflow
- pdTICKS_TO_MS: Added macro to convert ticks to milliseconds

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
2023-11-08 11:04:53 +05:30
Moral-Hao 0640b2e486
Distinguish waiting for notify status from suspend status (#865)
* Fix prvTaskIsTaskSuspended.

Just like eTaskGetState, distinguish waiting for notify from suspend.

* Fix vTaskGetInfo.

Just like eTaskGetState, distinguish block state (waiting on notification)
from suspend state.

* Add missing definition of variable x.

* Fix formatting syntax.

---------

Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Tony Josi <tonyjosi@amazon.com>
2023-11-07 15:33:07 +08:00
Moral-Hao 8ede50cafd
Fix vTaskSwitchContext for smp. (#879)
The function vTaskSwitchContext in smp has an parameter of core id,
which means this function is not only used for the core who call it.
Thus we should use the task running on the specific core id,
instead of use the task running on the core who call this function.

Co-authored-by: moral-hao <405197809@qq.com>
2023-11-06 17:50:32 +08:00
Devaraj Ranganna 83083a8a13
aarch64: Rename ARM_CA53_64_BIT/_SRE to Arm_AARCH64/_SRE (#822)
The Cortex-A53 ports are generic and can be used as a starting point
for other Armv8-A application processors. Therefore, rename
`ARM_CA53_64_BIT` to `Arm_AARCH64` and `ARM_CA53_64_BIT_SRE` to
`Arm_AARCH64_SRE`.

With this renaming, existing projects that use old port, should
migrate to renamed port as follows:

* `ARM_CA53_64_BIT` -> `Arm_AARCH64`
* `ARM_CA53_64_BIT_SRE` -> `Arm_AARCH64_SRE`

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-10-31 10:06:39 +05:30
ActoryOu ef0104e768
Move cmake compile options to the example project (#872)
* Move GCC compile option to GCC folder with toolchain option

* Add CI flow to build cmake example

* Fix CI

* formatting && enable Werror

* Add useless variable to test CI

* revert useless variable

* Add comments as examples.

* Remove default compile options.

* Formatting

* Remove compile option in kernel cmake and put the sample in examples/cmake_example

---------

Co-authored-by: Joseph Julicher <jjulicher@mac.com>
2023-10-30 08:35:42 -07:00
Tony Josi 1c465a0890
update coverity scan email (#871) 2023-10-30 18:19:29 +05:30
Joe Benczarski 37678b0656
Support configurable RISC-V chip extension (#773)
* Support configurable RISC-V chip extension

Added the FREERTOS_RISCV_EXTENSION option to allow the user
to select which chip extension they want included. Removed the
port for pulpino to instead use the new option.

* Add port GCC_RISC_V_GENERIC and IAR_RISC_V_GENERIC

* Add two rics-v generic ports to support FREERTOS_RISCV_EXTENSION
  config

---------

Co-authored-by: Joe Benczarski <jbenczarski@trijicon.com>
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
Co-authored-by: Ching-Hsin Lee <chinglee@amazon.com>
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
2023-10-27 11:57:52 -07:00
Tony Josi 5281427a99
Add nightly coverity scan (#859)
* coverity scan job

* coverity scan badge in readme

* Update cron schedule

* revert adding badge

* update description

* updating review feedback
2023-10-26 11:27:45 +05:30
Darian 4ef0bb676c
vTaskListTasks prints core affinity mask (#850)
This commit updates vTaskListTasks so that it prints uxCoreAffinityMask if
core affinity is enabled in configuration.
2023-10-25 14:45:03 -07:00
Tony Josi a8650b99a3
Update example cmake project path (#851)
* fix build on 64 bit platform

* moving sample cmake project to a separate root level dir

* moving sample cmake project to a separate root level dir

* updating paths for the sample cmake project

* rename example folder

* use configKERNEL_PROVIDED_STATIC_MEMORY

* update comments

* update comments

* rename folder to examples

* fix formatting
2023-10-23 14:50:41 +05:30
Darian fc7aca7ff2
Rename CPU to Core (#849)
This commit renames "CPU" to "Core" for any public facing API for consistency
with other SMP related APIs (e.g., "configNUMBER_OF_CORES").

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-10-23 12:50:24 +05:30
Boris van der Meer 9f4a0e308b
Remove default behaviour of FREERTOS_HEAP. (#807)
To build a complete static application (configSUPPORT_DYNAMIC_ALLOCATION
set to 0) an ugly workaround is necessary, because when FREERTOS_HEAP is
not set, heap 4 is automatically selected in the current CMake.

Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
2023-10-23 14:57:54 +08:00
Gaurav-Aggarwal-AWS 7562ebc6e1
Covert object type check to runtime check (#846)
* Covert object type check to runtime check

It was checked using assert earlier.

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-10-20 22:08:03 +05:30
Soren Ptak a936a1b156
Kernel Checker CI Workflow File Updates (#804)
* Perform sparse checkout of just the .github folder for the header check instead of all the files. Update python checkout version being used. Update the version of the get changed files action being used.

* Use echo groups on the header check
2023-10-19 10:08:24 -07:00
Rahul Kar b32aafe4dc
Fix size alignment in the integer overflow issue (#839) 2023-10-19 12:08:22 +05:30
Rahul Kar 220771565f
Removes redundant API calls in MPU wrappers (#838)
* Remove redundant API calls in Queue wrappers
2023-10-19 11:20:19 +05:30
Gaurav-Aggarwal-AWS 4ada1d7d5e
Fix possible integer overflow (#836)
* Fix possible integer overflow

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-10-17 21:31:43 +05:30
Rahul Kar 59ba98b2e3
Fix reliability issues in CMake sample (#835)
* Fix reliability issues in CMake example sample.
2023-10-17 19:59:37 +05:30
Rahul Kar 30283b57df
Fix xTaskNotifyWait & ulTaskNotifyTake determinism. (#833)
This PR fixes the bug described in the following issue:
https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/612.
This was originally contributed in the following PR:
https://github.com/FreeRTOS/FreeRTOS-Kernel/pull/625.

The implementation suspends the scheduler before exiting the
critical section (i.e. before enabling interrupts). If we do not do
so, a notification sent from an ISR, which happens after exiting
the critical section and before suspending the scheduler, will
get lost. The sequence of events will be:

1. Exit critical section.
2. Interrupt - ISR calls xTaskNotifyFromISR which adds the task to
    the Ready list.
3. Suspend scheduler.
4. prvAddCurrentTaskToDelayedList moves the task to the delayed
    or suspended list.
5. Resume scheduler does not touch the task (because it is not on
    the pendingReady list), effectively losing the notification from
    the ISR.

The same does not happen when we suspend the scheduler before
exiting the critical section. The sequence of events in this case will
be:

1. Suspend scheduler.
2. Exit critical section.
3. Interrupt - ISR calls xTaskNotifyFromISR which adds the task to
    the pendingReady list as the scheduler is suspended.
4. prvAddCurrentTaskToDelayedList adds the task to delayed or
    suspended list. Note that this operation does not nullify the add
    to pendingReady list done in the above step because a different
    list item, namely xEventListItem, is used for adding the task to the
    pendingReady list. In other words, the task still remains on the
    pendingReady list.
5. Resume scheduler moves the task from pendingReady list to the Ready list.

------------

Co-authored-by: Jacob Carver <karver8@github.com>
2023-10-17 15:05:18 +05:30
chinglee-iot 7ffc6a7465
Add base priority get APIs (#818)
* Add base priority get APIs
* Add MPU changes

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-10-17 12:19:17 +08:00
Sudeep Mohanty 631ae9e6e4
Add option to set the core affinity for the Timer Svc Task on SMP systems (#805)
This PR introduces the configTIMER_SERVICE_TASK_CORE_AFFINITY option
which allows the system to configure the core affinity of the Timer
Service Task on an SMP system. The default affinity of the Timer Service
Task is set to tskNO_AFFINITY which is the current behavior on SMP
systems.

Signed-off-by: Sudeep Mohanty <sudp.mohanty@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-10-16 12:38:55 +05:30
Joseph Julicher 1b2b0904ce
Added the minimal example (#823)
* re-adding main.c to the minimal example

* Uncrustify: triggered by comment.

* Update minimal_freertos_example/main.c

Co-authored-by: Soren Ptak <ptaksoren@gmail.com>

* Add in the deleted cmake list

* Added a single newline at the end of the cmake

* Cleanup the CMakelists

* updates the main & Cmake

* Formatting

---------

Co-authored-by: GitHub Action <action@github.com>
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
2023-10-14 08:00:25 -07:00
chinglee-iot 2be332ae21
Separate the task create function for core affinity (#789)
* Separate the task create function for core affinity
* Update function prototype and comment
* Code review suggestions

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-10-12 17:30:24 +08:00
chinglee-iot 4bfb9b2d70
Update SMP get idle task memory for static allocation (#784)
* Add static idle task memory support for SMP
* Rename vApplicationMinimalIdleTask to vApplicationPassiveIdleTask
* Rename the macro configUSE_MINIMAL_IDLE_HOOK to configUSE_PASSIVE_IDLE_HOOK
* Update xTaskGetIdleTaskHandle for SMP
* Add more check in xTaskGetIdleTaskHandle
* Support configKERNEL_PROVIDED_STATIC_MEMORY for SMP

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-10-12 10:41:16 +08:00
Soren Ptak 92a4d175e6
Link to the CONTRIBUTING.md file in this repo, not the github repo itself (#827) 2023-10-11 12:04:01 +05:30
Monika Singh abb5452a12
Update pull request information in readme (#821)
* Update pull request infomation in readme.

* Update link
2023-10-09 14:40:59 +05:30
Gaurav-Aggarwal-AWS 3d575b58a4
Make taskYIELD available to unprivileged tasks (#817)
Make taskYIELD available to unprivileged tasks on ARMv8-M
ports.
2023-10-06 10:22:06 +05:30
chinglee-iot d442d7908a
Add configCONTROL_INFINITE_LOOP for loop control in unit test (#783)
* Add configCONTROL_INFINITE_LOOP in FreeRTOS.h
* Use configCONTROL_INFINITE_LOOP in tasks.c and timer.c

---------

Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
2023-10-05 16:57:53 +08:00
chinglee-iot 97d48ba94a
Add more comment for core affinity in prvSelectHighestPriorityTask (#801)
* Add more comment for core affinity in prvSelectHighestPriorityTask

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-10-05 15:39:24 +08:00
chinglee-iot 317bc0c89c
Move trace macro after declaration (#820)
* Move trace macro after declaration to comply with ISO C90
2023-10-05 14:46:38 +08:00
chinglee-iot 30e13dac2b
Implement prvYieldCore with macro (#785)
* Implement prvYieldCore with macro for performance and memory
* Remove the portCHECK_IF_IN_ISR macro check. It is not required in SMP
  now

Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-10-04 19:33:28 +08:00
chinglee-iot 830533d49e
Add taskYIELD_WITHIN_API macro (#782)
Add taskYIELD_WITHIN_API macro for readability improvement.
2023-10-04 15:08:27 +05:30
Joseph Julicher 5cdb1bc4e1
removed the copyright and license header for select files (#815)
* removed the copyright and license header for files expected to be copied by users

* fixed a bug in the kernel checker.  temporarily restored the copyright in the sample config to allow this PR to pass the checks.

* Uncrustify: triggered by comment.

---------

Co-authored-by: GitHub Action <action@github.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-10-03 10:43:45 -07:00
Michael Fairman 57f9eed00d
bugfix: correct computation of stack size on Mac Posix port (#816)
Aligns the stack end to a page boundary before computing its
size, since the size depends on both the start and end.

The original change which introduced stack alignment (#674)
only worked for cases where the round + trunc operation would
wind up within the same area, but would lead to segfaults in
other cases.

Also adds a typecast to the `mach_vm_round_page()` call, as
it is actually a macro which casts to `mach_vm_offset_t` and
the result here is used as a `StackType_t` pointer.

Tested on ARM64 and Intel MacOS, as well as ARM64 and Intel
Linux.  The test code included a single-task case, as well
as a case with two tasks passing queue messages.
2023-10-03 11:30:33 +05:30
Joseph Julicher 5a9d7c8388
Sample FreeRTOSConfig.h and template port (#812)
* config file experiments

* adding a config file for an example

* Added a template port and updated the CMakeLists

* template and default configuration build

* finalising the sample FreeRTOSConfig.h header file

* removed .config hidden file

* further reductions in the template port

* Uncrustify: triggered by comment.

* Uncrustify: triggered by comment.

* minor readme updates

* fixed spelling error in HTTP

* fixed a type and added a link to the sample readme

* uncrustified FreeRTOSConfig.h

* Uncrustify: triggered by comment.

* Revert "Uncrustify: triggered by comment."

This reverts commit e534f46f2d.

* Revert "Revert "Uncrustify: triggered by comment.""

This reverts commit c9058dd383.

* excluding the FreeRTOSConfig.h from copyright+license check because this file is intended to be incorporated into user code

* Removed the copyright and license from the template files

* put license copy in the template and sample files

* Uncrustify: triggered by comment.

---------

Co-authored-by: GitHub Action <action@github.com>
2023-09-29 19:11:55 -07:00
Devaraj Ranganna 9d2571d2ed
Cortex-M23: Do not use PSPLIM_NS (#791)
According to Armv8-M technical reference manual, if the main extension
is not implemented then PSPLIM_NS is RES0. Update the cortex-M23
port to not use the reserved PSPLIM_NS.
2023-09-28 14:38:55 +05:30
Soren Ptak a695b671aa
Apply formatting bot fix (#806) 2023-09-27 12:03:41 -07:00
Gaurav-Aggarwal-AWS 96d6190b61
Replace sprintf with snprintf (#802)
This change necessitates the introduction of 2 new APIs:

void vTaskListTasks( char * pcWriteBuffer, size_t uxBufferLength );
void vTaskGetRunTimeStatistics( char * pcWriteBuffer, size_t uxBufferLength );

These 2 APIs behave exactly as vTaskList and vTaskGetRunTimeStats
except the fact that they take the length of the pcWriteBuffer as the
second argument to ensure that we do not write past the buffer.

vTaskList and vTaskGetRunTimeStats assume that the length of the
buffer is configSTATS_BUFFER_MAX_LENGTH which defaults to 0xFFFF.
This is done to ensure that the existing applications do not break.
New applications should use the new APIs to avoid memory corruption.
2023-09-26 23:07:18 +05:30
Soren Ptak 84bdb05bd2
Fix portSWITCH_TO_USER_MODE() on Armv7-M MPU ports (#803)
A task's privilege level is stored in ulTaskFlag member in the TCB. Current
implementation of portSWITCH_TO_USER_MODE() does not update this
flag but just lowers the processor's privilege level. This results in many
APIs incorrectly determining task's privilege level and access permissions -

- xPortIsAuthorizedToAccessBuffer
- xPortIsTaskPrivileged
- xPortIsAuthorizedToAccessKernelObject

This PR fixes the portSWITCH_TO_USER_MODE() implementation to correctly
update the ulTaskFlag member in the TCB before lowering the processor's
privilege level.
2023-09-26 14:36:23 +05:30
kar-rahul-aws ac5deb155d
Remove unwanted variable portACL_ENTRY_SIZE_BYTES (#810) 2023-09-26 09:58:02 +05:30
Moral-Hao 2f25cb94f5
Reduce memory usage of ACL. (#809)
Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com>
2023-09-25 16:52:55 +05:30
chinglee-iot 2bc6188be3
Update pxMutexHolder is NULL check description (#800) 2023-09-24 15:21:15 -07:00
Boris van der Meer d43062ba78
Add trace hook macro for most ports (#794)
Add trace hook macro for most ports

In pull request #659 we introduced better support for tracing
tools like systemview. This patchset adds support for more
ports as requested in the original pull request.
2023-09-20 16:19:42 +05:30
Sebastian Brosch 83861f5b1d
Add Trace Hook Macros to all API calls (#786)
This pull-request adds out-of-the-box support for different tracing
tools. New trace hook macros have been added for all public API
functions, one for each function entry and one for each exit. There are
no functional changes, as the macros are by default empty.

For more information see following forum post:
https://forums.freertos.org/t/add-tracing-functionality-for-all-api-calls/18007.
2023-09-20 15:47:42 +05:30
Robert Berger 15e0364968
xQueueSendToFromFromISR --> xQueueSendToFrontFromISR (#795)
Co-authored-by: Robert Berger <Robert.Berger@ReliableEmbeddedSystems.com>
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
2023-09-20 14:33:56 +05:30
Robert Berger c59ce22c8f
Fix xQueueSendToFront code comment (#796)
Co-authored-by: Robert Berger <Robert.Berger@ReliableEmbeddedSystems.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
2023-09-20 15:47:26 +08:00
kar-rahul-aws c6ec8295e8
Remove CORTEX_M3_MPS2_QEMU_GCC Demo from kernel demos yaml file (#798) 2023-09-20 13:04:14 +05:30
Mehdi 7cd201c290
Add default implementations of vApplicationGetIdleTaskMemory and vApplicationGetTimerTaskMemory (#790)
This PR introduces configKERNEL_PROVIDED_STATIC_MEMORY option
which the application can set to 1 to use the default implementations
of vApplicationGetIdleTaskMemory and vApplicationGetTimerTaskMemory
functions.

If the application enables static allocation (i.e. sets
configUSE_STATIC_ALLOCATION to 1) and does not provide the above 2
functions, it will result in linker error. The application has two options:

1. Set configKERNEL_PROVIDED_STATIC_MEMORY to 1 to use the default
    implementations of these functions.
2. Provide implementations of these 2 functions.

Note that default definitions are only available for non-MPU ports. The
reason is that the stack alignment requirements vary for different
architectures.
2023-09-20 11:09:37 +05:30
Gaurav-Aggarwal-AWS c3ece08119
Fix prototype in mpu_prototypes.h (#797)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-09-20 10:14:39 +05:30
Soren Ptak 596292f874
Add the formatting bot action to FreeRTOS-Kernel (#787) 2023-09-18 12:48:26 -07:00
kar-rahul-aws 170a291d4d
Add Access Control List to MPU ports (#765)
This PR adds Access Control to kernel objects on a per task basis to MPU
ports. The following needs to be defined in the `FreeRTOSConfig.h` to
enable this feature:

```c
#define configUSE_MPU_WRAPPERS_V1 0
#define configENABLE_ACCESS_CONTROL_LIST 1
```

This PR adds the following new APIs:

```c
void vGrantAccessToTask( TaskHandle_t xTask,
                         TaskHandle_t xTaskToGrantAccess );
void vRevokeAccessToTask( TaskHandle_t xTask,
                          TaskHandle_t xTaskToRevokeAccess );

void vGrantAccessToSemaphore( TaskHandle_t xTask,
                              SemaphoreHandle_t xSemaphoreToGrantAccess );
void vRevokeAccessToSemaphore( TaskHandle_t xTask,
                               SemaphoreHandle_t xSemaphoreToRevokeAccess );

void vGrantAccessToQueue( TaskHandle_t xTask,
                          QueueHandle_t xQueueToGrantAccess );
void vRevokeAccessToQueue( TaskHandle_t xTask,
                           QueueHandle_t xQueueToRevokeAccess );

void vGrantAccessToQueueSet( TaskHandle_t xTask,
                             QueueSetHandle_t xQueueSetToGrantAccess );
void vRevokeAccessToQueueSet( TaskHandle_t xTask,
                              QueueSetHandle_t xQueueSetToRevokeAccess );

void vGrantAccessToEventGroup( TaskHandle_t xTask,
                               EventGroupHandle_t xEventGroupToGrantAccess );
void vRevokeAccessToEventGroup( TaskHandle_t xTask,
                                EventGroupHandle_t xEventGroupToRevokeAccess );

void vGrantAccessToStreamBuffer( TaskHandle_t xTask,
                                 StreamBufferHandle_t xStreamBufferToGrantAccess );
void vRevokeAccessToStreamBuffer( TaskHandle_t xTask,
                                  StreamBufferHandle_t xStreamBufferToRevokeAccess );

void vGrantAccessToMessageBuffer( TaskHandle_t xTask,
                                  MessageBufferHandle_t xMessageBufferToGrantAccess );
void vRevokeAccessToMessageBuffer( TaskHandle_t xTask,
                                   MessageBufferHandle_t xMessageBufferToRevokeAccess );

void vGrantAccessToTimer( TaskHandle_t xTask,
                          TimerHandle_t xTimerToGrantAccess );
void vRevokeAccessToTimer( TaskHandle_t xTask,
                           TimerHandle_t xTimerToRevokeAccess );
```

An unprivileged task by default has access to itself only and no other
kernel object. The application writer needs to explicitly grant an
unprivileged task access to all the kernel objects it needs. The best
place to do that is before starting the scheduler when all the kernel
objects are created. 

For example, let's say an unprivileged tasks needs access to a queue and
an event group, the application writer needs to do the following:

```c
vGrantAccessToQueue( xUnprivilegedTaskHandle, xQueue );
vGrantAccessToEventGroup( xUnprivilegedTaskHandle, xEventGroup );
```

The application writer MUST revoke all the accesses before deleting a
task. Failing to do so will result in undefined behavior. In the above
example, the application writer needs to make the following 2 calls
before deleting the task:

```c
vRevokeAccessToQueue( xUnprivilegedTaskHandle, xQueue );
vRevokeAccessToEventGroup( xUnprivilegedTaskHandle, xEventGroup );

```
2023-09-18 15:34:42 +05:30
chinglee-iot 7db0e87af1
Update taskYIELD_IF_USING_PREEMPTION macro (#769)
* Add taskYIELD_TASK_CORE_IF_USING_PREEMPTION and taskYIELD_ANY_CORE_IF_USING_PREEMPTION to align task yield behavior for single core and SMP.
---------

Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
2023-09-18 10:53:03 +08:00
kar-rahul-aws 26c48dec46
Fix xStreamBufferCreateStatic() API for buffer size 1 (#793) 2023-09-13 11:22:17 +05:30
Boris van der Meer 2f94b181a2
Add Trace Hook Macros and function that returns the start of the stack. (#659)
* Add Trace Hook Macros and function that returns the start of the stack.

* Remove obsolete functions.

---------

Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Rahul Kar <karahulx@amazon.com>
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
2023-09-07 16:20:13 -07:00
chinglee-iot f13ad7789b
Add macro taskTASK_IS_RUNNING_OR_SCHEDULED_TO_YIELD (#780)
* Add macro taskTASK_IS_RUNNING_OR_SCHEDULED_TO_YIELD macro to align single core and SMP
* Update for explicit precedence in vTaskDelete
* Update comment when deleting a running task
2023-09-06 19:18:43 +08:00
chinglee-iot f7565c2d5e
Add configUSE_CORE_AFFINITY bits check (#776)
* Add core affinity bits check
* Add taskBITS_PER_BYTES
2023-09-06 19:09:52 +08:00
chinglee-iot c93d3865f7
Update task running state type and related macros (#770)
* Remove unnecessary type TaskRunning_t
* Rename taskTASK_YIELD to taskTASK_SCHEDULED_TO_YIELD
---------
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
2023-09-06 18:30:02 +08:00
chinglee-iot 53229b1537
Assert if prvCheckForRunStateChange is called in ISR (#779)
* Assert if prvCheckForRunStateChange is called in ISR
2023-09-06 17:47:41 +08:00
chinglee-iot 288d143357
Update taskSELECT_HIGHEST_PRIORITY_TASK macro for SMP (#777)
* Move the configUSE_PORT_OPTIMISED_TASK_SELECTION check to FreeRTOS.h
* SMP also use taskSELECT_HIGHEST_PRIORITY_TASK macro
---------

Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
2023-09-06 15:13:34 +08:00
Soren Ptak 5fb9b50da8
CI-CD Updates (#768)
* Use new version of CI-CD Actions
* Use cSpell spell check, and use ubuntu-20.04 for formatting check
* Format and spell check all files in the portable directory
* Remove the https:// from #errors and #warnings as uncrustify attempts to change it to /*
* Use checkout@v3 instead of checkout@v2 on all jobs
---------
2023-09-05 14:24:04 -07:00
Gaurav-Aggarwal-AWS d6bccb1f4c
Fix heap address calculation issue (#781)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-09-05 10:46:31 -07:00
kar-rahul-aws 231278eded
Fix cast alignment warning in heap_4.c and heap_5.c (#771)
* Fix cast alignment warning
---------

Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
Co-authored-by: chinglee-iot <61685396+chinglee-iot@users.noreply.github.com>
2023-09-04 22:51:58 +05:30
chinglee-iot 1aaa318f1c
Update INFINITE_LOOP control (#775)
* Use for loop instead of while loop for INFINITE_LOOP control
2023-09-04 18:10:36 +08:00
chinglee-iot 80a390cbbb
Update block validate macro in heap_5 (#774)
* Update block validate macro in heap_5, and update for readability
* Don't validate block pointer when configENABLE_HEAP_PROTECTOR is not set to 1
2023-09-02 18:19:26 -07:00
Jordan Williams af2904b01c
Fix typo in the include directory for the the GCC_ARM_CM55_TFM port (#764)
Should be CM55 not CM85.
2023-08-25 11:16:36 +05:30
oliverlavery 0d9649ca45
Heap protect (#747)
Setting configENABLE_HEAP_PROTECTOR to 1 obfuscates heap
block pointers by XORing them with an application supplied
canary value. This obfuscation helps to catch heap corruption
should a heap buffer overflow occur.

This PR also adds heap bounds checking to heap_4 and heap_5.

This PR also adds some additional integer underflow checks.
2023-08-23 10:27:54 +05:30
Gaurav-Aggarwal-AWS b9f488a713
Fix remarks emitted by IAR compiler (#763)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-08-21 14:48:22 +05:30
Moral-Hao 7372519cba
Use the bigger priority whenever possible. (#760)
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-08-18 21:35:10 +05:30
kar-rahul-aws cdd3678c29
Add runtime parameter checks (#761)
* Add runtime parameter checks

This commit adds runtime checks for function parameters to mpu_wrappers_v2 file. The same checks are performed
in the API implementation using asserts.

Signed-off-by: kar-rahul-aws <karahulx@amazon.com>
2023-08-18 14:24:44 +05:30
kar-rahul-aws cd87a39736
Update version number in manifest.yml (#755)
* Add automation to update version number in manifest.yml

* Make updater file executable
2023-08-17 13:37:58 +05:30
Chien Wong b1a85116bd
Add missing stack alignment adjustment if stack grows upwards (#751)
Signed-off-by: Chien Wong <m@xv97.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-08-17 10:23:10 +05:30
Moral-Hao bd720c316a
Bring the heap_4 improvements to secure_heap (#749)
This includes improvements like addition overflow checks,
readability improvements.
2023-08-16 21:56:58 +05:30
Moral-Hao bcd6dbd772
Move size calculation out of critical section (#748)
The size calculation in pvPortMalloc uses only parameters and read
only constants and therefore, can be moved out of critical section
to make the critical section as small as possible.
2023-08-16 21:31:17 +05:30
kar-rahul-aws 6f3586516a
fix MPU wrapper for vTaskDelete for calling task deletion (#745) 2023-08-08 12:18:34 +05:30
bebebib-rs b5f670f826
Fix pxTopOfStack calculation in configINIT_TLS_BLOCK for picolib (#739)
The pxTopOfStack calculation in configINIT_TLS_BLOCK for picolib needs
to decrement pxTopOfStack in order to meet the expectation of
 pxPortInitialiseStack function.
2023-08-07 11:52:52 +05:30
kar-rahul-aws 05d93e0990
Fix API for NULL task parameter (#741)
* Fix API for NULL task parameter

* Fix uncrustify

---------

Co-authored-by: Ching-Hsin Lee <chinglee@amazon.com>
2023-08-07 10:27:54 +05:30
Leonardo de Araujo 4689d8ff86
fix: typos in README.md (#744)
Co-authored-by: ActoryOu <jay2002824@gmail.com>
2023-08-06 20:42:05 -07:00
Moral-Hao ee0a82be1b
Fix bug of heap_2 introduced by pr738. (#743)
* Fix bug of heap_2 introduced by pr738.
* Fix formatting check

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: moral-hao <405197809@qq.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-08-05 23:07:44 -07:00
kar-rahul-aws 02be485e04
Update MPU wrapper for pcTaskGetName API (#737)
* Update MPU wrapper for pcTaskGetName

* Fix Formatting

* Fix mpu wrappers V1

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-08-04 12:22:28 +05:30
Moral-Hao a5bf4d9a7f
Improve the speed of split memory. (#738)
Co-authored-by: moral-hao <405197809@qq.com>
Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-08-03 17:46:12 +05:30
ActoryOu dd1b87dae9
Fix RP2040 compile warning (#736)
* Fix Pico compile warning -- port layer

* Warning resolved for volatile discard task.c (#5)

---------

Co-authored-by: Pranjal Chanda <40349163+pranjalchanda08@users.noreply.github.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-08-03 16:56:42 +08:00
Nikhil Kamath 20300df3c3
PR Process for Open Source Contribution (#717)
* Initial Version Pull Request Workflow

* Updated Contributing.md

* Improved contributing.md

* added pr process image and some edits based on peer feedback

* fixed links to image

* Fixed truncation

* Updated reviewer description

* Review feedback

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-08-03 12:26:59 +05:30
Gaurav-Aggarwal-AWS 85d2cba801
Fix warning introduced in PR 730 (#735)
The change addresses the following warning:

```
tasks.c:5549:40: warning: assignment discards 'volatile' qualifier from
pointer target type [-Wdiscarded-qualifiers]
 5549 |             pxTaskStatus->pxTopOfStack = pxTCB->pxTopOfStack;
      |
```

Also add the "Build Posix_GCC Demo for Coverage Test" in the PR checks
as coverage test target treats warnings as errors and therefore, will
catch such warnings in PR checks.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-08-02 14:42:45 +05:30
kar-rahul-aws b51a37314c
Update MPU wrapper for xTimerGenericCommand API (#734)
* Update xTimerGenericCommand API as per SMP branch

Signed-off-by: kar-rahul-aws <karahulx@amazon.com>

* Fix formatting

* Code review changes

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Fix Formatting

---------

Signed-off-by: kar-rahul-aws <karahulx@amazon.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-08-01 20:12:58 +05:30
Gaurav-Aggarwal-AWS 0066c28cb2
Update submodule pointer for contributed Ports (#733)
Update submodule pointer for partners supported and community supported
ports.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-07-31 07:12:59 -07:00
Ju1He1 225bace85c
Enable MSVC Port to leave the prvProcessSimulatedInterrupts loop when scheduler is stopped (#728)
* allow to leave loop

* add missing brace

* Code review suggestions

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-07-31 17:35:17 +08:00
ActoryOu 8d80cf697a
Fix Pico compile warning (#732)
* Fix Pico compile warning

* Add type cast for portGET_CORE_ID

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-07-31 16:38:26 +08:00
vinceburns da2428fbb1
Feature: Add top/end of stack to task info report whenever it is available. (#729) (#730)
pxTopOfStack is always available and pxEndOfStack is available whenever you have:
(portSTACK_GROWTH > 0) or ( configRECORD_STACK_HIGH_ADDRESS == 1)

Include it in the info report whenever it is available to the tcb.

Co-authored-by: Vince Burns <vburns@sensata.com>
2023-07-31 13:29:11 +08:00
Zim Kalinowski 785250de45
Align some Linux and RL78 port types with other ports (#727) 2023-07-28 14:12:18 +05:30
kar-rahul-aws 3786856b72
Remove stdint.h in stream buffer file (#725)
* Remove stdint.h in stream buffer file

Signed-off-by: kar-rahul-aws <karahulx@amazon.com>
2023-07-28 11:41:59 +05:30
chinglee-iot 95c638b39b
Update GNU ARM Toolchain demo workflow (#726)
* Update GNU ARM Toolchain demo workflow
---------

Co-authored-by: Paul Bartell <paul.bartell@gmail.com>
2023-07-28 11:20:31 +08:00
Nuno Guterres Nogueira 1544768719
Updated README.md for cross-compilation (#723)
* Update README.md
2023-07-27 15:41:22 +05:30
Jeff Tenney b13e2698bb
Work around SysTick bug for QEMU ARMv8-M (#724)
* Set SysTick CLKSOURCE bit before enabling SysTick

* Use portNVIC_SYSTICK_CLK_BIT_CONFIG

The workaround now uses portNVIC_SYSTICK_CLK_BIT_CONFIG instead of
portNVIC_SYSTICK_CLK_BIT, which saves us from having to explain in the
comments why it's OK to temporarily set the CLKSOURCE bit even if the
user's FreeRTOS configuration clears the CLKSOURCE bit.

Using portNVIC_SYSTICK_CLK_BIT_CONFIG here still correctly prevents the
firmware from triggering the QEMU bug.
2023-07-27 10:22:13 +05:30
kar-rahul-aws d02ab775f3
Fix warning issue for warning in arithmetic conversion for UBaseType_t (#720)
* Fix warning issue for warnign in arithmnetic conversion for UBaseType_t

* Fix warning in streamBuffer

* Add cast to queue.c file changes

* Minor fix to cast

* Fix formatting

* Revert minor fix to cast

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-07-26 14:50:27 +05:30
Gaurav-Aggarwal-AWS dbef667bf4
Update attribution in History.txt (#722)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-07-26 11:12:16 +05:30
Gaurav-Aggarwal-AWS cfd4c73b5b
Fix compilation warnings with Clang (#721)
Fix compilation warnings with Clang

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-07-25 20:00:41 +05:30
Gaurav-Aggarwal-AWS a33ba8e646
Define (U)BaseType_t to 64-bit types on Windows (#715)
Define (U)BaseType_t to 64-bit types on Windows

This ensures that BaseType_t and UBaseType_t are correctly defined to
64-bit types on 64-bit Windows.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-07-24 18:03:49 +05:30
chinglee-iot ae3a498e43
Merge SMP feature to main (#716)
FreeRTOS SMP feature is developed in a separate SMP branch. This commit merges the SMP branch to main along with some fixes. User of SMP branch needs to apply the following changes in the port:

* Rename configNUM_CORES to configNUMBER_OF_CORES
* Define portSET/CLEAR_INTERRUPT_MASK for SMP
* Define portENTER/EXIT_CRITICAL_FROM_ISR for SMP. vTaskEnterCriticalFromISR and vTaskExitCriticalFromISR should be used for these port macros
* Update portSET/CLEAR_INTERRUPT_MASK_FROM_ISR implementation to mask interrupt only Call xTaskIncrementTick in critical section in port

History of the development branch:
* Add vTaskYieldWithinAPI for taskYIELD_IF_USING_PREEMPTION

* Add configNUM_CORES config for SMP
* Add portGET_CORE_ID porting config and default return 0 to compatible
  with single core demos
* Replace xYieldPending with xYieldPendings for multiple cores
* Add vTaskYieldWithinAPI function for yield pending if the task is in
  criticial section. This check are enabled only when portCRITICAL_NESTING_IN_TCB
  is enabled
* taskYIELD_IF_USING_PREEMPTION use vTaskYieldWithinAPI when
  configUSE_PREEMPTION is set to 1

The following sections will be updated in other commits
* taskYIELD_IF_USING_PREEMPTION usage in multiple cores
* xYieldPendings usage in multiple cores

* Use portYIELD_WITHIN_API for portYIELD_WITHIN_API for single core

* Add xTaskRunState and xIsIdle in TCB

* Add xTaskRunState and xIsIdle in TCB
* Use xTaskAttribute to replace the xIsIdle in SMP TCB

* Add pxCurrentTCBs for multiple cores

* Keep pxCurrentTCB for single core
* Add pxCurrentTCBs for SMP
* Add xTaskGetCurrentTaskHandle for SMP
* Replace taskSELECT_HIGHEST_PRIORITY_TASK with temporary prvSelectHighestPriorityTask

* Add SMP critical section functions

* Update vTaskEnterCritical and vTaskExitCritical functions for SMP
* Add vTaskEnterCriticalFromISR and vTaskExitCriticalFromISR for SMP

* Add SMP prvYieldCore and prvYieldForTask

* Add idle tasks for SMP

* Add minimal idle task function declaration
* Align to use 0x00 for null terminator

* Merge vTaskSuspendAll and xTaskResumeAll from SMP branch

* Merge vTaskResume and xTaskResumeFromISR from SMP

* Merge xTaskIncrementTick from SMP

* Update prvYieldForTask usage in kernel APIs

* Merge prvAddNewTaskToReadyList from SMP

* Merge vTaskSwitchContext from SMP

* Add vTaskSwitchContextForCore APIs to switch context for specific core
* vTaskSwitchContext will switch context for current core

* Merge vTaskDelete from SMP

* Add prvYeildCore for single core to reduce multicore macros
* Add taskTASK_IS_RUNNING for single core
* Add taskTASK_IS_YIELDING

* Merge vTaskSuspend from SMP

* Set minimal idle task idle attribute

* Set minimal idle task idle attribute in prvInitialiseNewTask

* Move prvCreateIdleTasks forward and check return value

* Add minimal idle hook config check

* Fix xTaskResumeAll in SMP

* xTaskRusmeAll do nothing when scheduler not running in SMP

* check scheduler suspended when scheduler is running

* Move suspend scheduler inside critical section

* Update comment for uxSchedulerSuspended

* Add back xPendingReadyList for single core

* Use critical section for SMP

* Add in ISR check in prvCheckForRunStateChange function

* Add critical section protect for context switch

* Add vTaskSwitchContextForCore declaration

* Fix missing macro and check for single core

* Fix task delete condition

* Latest kernel move out the prvDeleteTask and the check condition should be
  TASK_IS_RUNNING

* Use critical section to protect more in SMP for vTaskDelete

* The condition task is running is not thread safe in SMP
* Once we add the task to termination the task is still running and may
  add it back to other list. Which cause memory corruption.

* Merge SMP prvSelectHighestPriorityTask to main

* Merge prvCheckTasksWaitingTermination from SMP branch

* Move prvDeleteTCB outside of critical section

* Add NULL pointer check in prvCheckTasksWaitingTermination

* Update for performance

* Remove prvSelectHighestPriorityTask and vTaskSwitchContextForCore for
  -O0 performance in single core

* Update prvSelectHighestPriorityTask

* Merge vTaskYieldWithinAPI from SMP

Update vTaskYieldWithinAPI from SMP
* xTaskDelayUntil
* xTaskDelay
* ulTaskGenericNotifyTake
* xTaskGenericNotifyWait
* event_groups.c
* queue.c
* timers.c

Add critical section protection
* xTaskGetSchedulerState

Update state check macro
* vTaskGetInfo
* eTaskGetState

* Merge vTaskPrioritySet from SMP branch

* Void prvYieldForTask return value in vTaskPrioritySet

* Yield for SMP when set priority

* Move vTaskDelay check uxSchedulerSuspended

* Update code logic for performance

* Fix yield for task in single core

* Merge timer change from SMP branch

* Split xTimerGenericCommand into xTimerGenericCommandFromTask and
  xTimerGenericCommandFromISR to remove the recursion path when called from ISRs.
* Add portTIMER_CALLBACK_ATTRIBUTE for timer callback function

* Add RP2040 SMP porting support

* Seperate task state for SMP and single core

* Merge configRUN_MULTIPLE_PRIORITIES from SMP branch

* Merge configUSE_TASK_PREEMPTION_DISABLE from SMP

* Merge configUSE_CORE_AFFINITY from SMP

* Update pxYieldSpinLocks to per-cpu variable in SMP

* Remove TODO log

* Add suppport for ARM CM55 (#494)

* Add supposrt for ARM CM55

* Fix file header

* Remove duplicate code

* Refactor portmacro.h

1. portmacro.h is re-factored into 2 parts - portmacrocommon.h which is
   common to all ARMv8-M ports and portmacro.h which is different for
   different compiler and architecture. This enables us to provide
   Cortex-M55 ports without code duplication.
2. Update copy_files.py so that it copies Cortex-M55 ports correctly -
   all files except portmacro.h are used from Cortex-M33 ports.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>

* add extra check for compiler time (#499)

minor change to add extra check for compiler time to prevent bad config

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Update feature_request.md (#500)

* Update feature_request.md

* Remove trailing spaces

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>

* Add callback overrides for stream buffer and message buffers (#437)

* Let each stream/message can use its own sbSEND_COMPLETED

In FreeRTOS.h, set the default value of configUSE_SB_COMPLETED_CALLBACK
to zero, and add additional space for the function pointer when
the buffer created statically.

In stream_buffer.c, modify the macro of sbSEND_COMPLETED which let
the stream buffer to use its own implementation, and then add an
pointer to the stream buffer's structure, and modify the
implementation of the buffer creating and initializing

Co-authored-by: eddie9712 <qw1562435@gmail.com>

* Add configUSE_MUTEXES to function declarations in header (#504)

This commit adds the configUSE_MUTEXES guard to the function
declarations in semphr.h which are only available when configUSE_MUTEXES
is set to 1.

It was reported here - https://forums.freertos.org/t/mutex-missing-reference-to-configuse-mutexes-on-the-online-documentation/15231

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* RP2040: Remove incorrect assertion (#508)

After the xEventGroupWaitBits in vProtLockInternalSpinUnlockWithWait there was an assertion about
pxYiledSpinLock being NULL, however when xEventGroupWaitBits returns, IRQs have been re-enabled
and so it is no longer safe to assert on the state which is protected by IRQs being disabled.

Co-authored-by: graham sanderson <graham.sanderson@raspeberryi.com>

* Ensure that xTaskGetCurrentTaskHandle is included (#507)

This commits adds a check that INCLUDE_xTaskGetCurrentTaskHandle is
set to 1. A compile time error message is produced if it is not set to
1. This is needed because stream_buffer.c uses xTaskGetCurrentTaskHandle.

This was reported here - https://forums.freertos.org/t/xstreambufferreceive-include-xtaskgetcur/15283

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* RP2040: Allow FreeRTOS to be added to the parent CMake project post initialization of the Pico SDK (#497)

Co-authored-by: graham sanderson <graham.sanderson@raspeberryi.com>

* Update to TF-M version TF-Mv1.6.0 (#517)

Signed-off-by: Xinyu Zhang <xinyu.zhang@arm.com>
Change-Id: I0c15564b342873f9bd7a8240822e770950a0563e

* Update submodule pointer of Community Supported Ports (#486)

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: Joseph Julicher <jjulicher@mac.com>

* Add Cortex M7 r0p1 Errata 837070 workaround to CM4_MPU ports (#513)

* Clarify Cortex M7 r0p1 errata number in r0p1 specific port.

* Add ARM Cortex M7 r0p0 / r0p1 Errata 837070 workaround to CM4 MPU ports.

Optionally, enable the errata workaround by defining configTARGET_ARM_CM7_r0p0 or configTARGET_ARM_CM7_r0p1 in FreeRTOSConfig.h.

* Add r0p1 errata support to IAR port as well

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Change macro name to configENABLE_ERRATA_837070_WORKAROUND

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>

* RP2040: Use indirect reference for pxCurrentTCB (#525)

* Posix: Removed unused signal set from port (#528)

Co-authored-by: Jakob Hasse <0xjakob@users.noreply.github.com>

* Add SBOM Generation in auto_release.yml (#524)

* add portDONT_DISCARD to pxCurrentTCB (#479)

This fixes link failures with LTO:

/tmp/ccJbaKaD.ltrans0.ltrans.o: in function `pxCurrentTCBConst2':
/root/project/FreeRTOS/portable/GCC/ARM_CM4F/port.c:249: undefined reference to `pxCurrentTCB'
/usr/lib/gcc/arm-none-eabi/11.2.0/../../../../arm-none-eabi/bin/ld: /tmp/ccJbaKaD.ltrans0.ltrans.o: in function `pxCurrentTCBConst':
/root/project/FreeRTOS/portable/GCC/ARM_CM4F/port.c:443: undefined reference to `pxCurrentTCB'

* Implement MicroBlazeV9 stack protection (#523)

* Implement stack protection for MicroBlaze (without MPU wrappers)

* Update codecov action to v3.1.0

* Add vPortRemoveInterruptHandler API (#533)

* Add xPortRemoveInterruptHandler API

This API is added to the MicroBlazeV9 port. It enables the application
writer to remove an interrupt handler.

This was originally contributed in this PR - https://github.com/FreeRTOS/FreeRTOS-Kernel/pull/523

* Change API signature to return void

This makes the API similar to vPortDisableInterrupt.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Co-authored-by: Gavin Lambert <uecasm@users.noreply.github.com>

* Fix NULL pointer dereference in vPortGetHeapStats

When the heap is exhausted (no free block), start and end markers are
the only blocks present in the free block list:

     +---------------+     +-----------> NULL
     |               |     |
     |               V     |
+ ----- +            + ----- +
|   |   |            |   |   |
|   |   |            |   |   |
+ ----- +            + ----- +
  xStart               pxEnd

The code block which traverses the list of free blocks to calculate heap
stats used a do..while loop that moved past the end marker when the heap
had no free block resulting in a NULL pointer dereference. This commit
changes the do..while loop to while loop thereby ensuring that we never
move past the end marker.

This was reported here - https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/534

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Change type of message buffer handle (#537)

* Block SIG_RESUME in the main thread of the Posix port so that sigwait works as expected (#532)

Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>

* Update History.txt (#535)

* Update History.txt

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Add .syntax unified to GCC assembly functions (#538)

This fixes the compilation issue with XC32 compiler.

It was reported here - https://forums.freertos.org/t/xc32-v4-00-error-with-building-freertos-portasm-c/14357/4

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Co-authored-by: Paul Bartell <pbartell@amazon.com>

* Generalize Thread Local Storage (TLS) support (#540)

* Generalize Thread Local Storage (TLS) support

FreeRTOS's Thread Local Storage (TLS) support used variables and
functions from newlib, thereby making the TLS support specific to
newlib. This commit generalizes the TLS support so that it can be used
with other c-runtime libraries also. The default behavior for newlib
support is still kept same for backward compatibility.

The application writer would need to set configUSE_C_RUNTIME_TLS_SUPPORT
to 1 in their FreeRTOSConfig.h and define the following macros to
support TLS for a c-runtime library:

1. configTLS_BLOCK_TYPE - Type used to define the TLS block in TCB.
2. configINIT_TLS_BLOCK( xTLSBlock ) - Allocate and initialize memory
   block for the task's TLS Block.
3. configSET_TLS_BLOCK( xTLSBlock ) - Switch C-Runtime's TLS Block to
   point to xTLSBlock.
4. configDEINIT_TLS_BLOCK( xTLSBlock ) - Free up the memory allocated
   for the task's TLS Block.

The following is an example to support TLS for picolibc:

 #define configUSE_C_RUNTIME_TLS_SUPPORT        1
 #define configTLS_BLOCK_TYPE                   void*
 #define configINIT_TLS_BLOCK( xTLSBlock )      _init_tls( xTLSBlock )
 #define configSET_TLS_BLOCK( xTLSBlock )       _set_tls( xTLSBlock )
 #define configDEINIT_TLS_BLOCK( xTLSBlock )

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Change default value of INCLUDE_xTaskGetCurrentTaskHandle (#542)

* Include string.h at the top of portable/GCC/ARM_CA9/port.c to prevent memset() generating a warning. (#430)

Co-authored-by: none <unknown>

* Move some of the complex pre-processor guards on prvWriteNameToBuffer() to compile time checks in FreeRTOS.h.

Co-authored-by: Paul Bartell <pbartell@amazon.com>

* Fix formatting of FreeRTOS.h

* correct grammar in include/FreeRTOS.h

Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com>

* Fix warnings in posix port (#544)

Fixes warnings about unused parameters and variables when built with
`-Wall -Wextra`.

* Add support for MISRA rule 20.7 (#546)

Misra rule 20.7 requires parenthesis to all parameter names
in macro definitions.

The issue was reported here : https://forums.freertos.org/t/misra-20-7-compatibility/15385

* Add FreeRTOS config directory to include dirs (#548)

This allows the application write to set FREERTOS_CONFIG_FILE_DIRECTORY
to whichever directory the FreeRTOSConfig.h file exists in.

This was reported here - https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/545

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* [Fix] Type for pointers operations (#550)

* fix type for pointers operations in some places: size_t -> portPOINTER_SIZE_TYPE

* fix pointer arithmetics

* fix xAddress type

* RISC-V: Add support for RV32E extension in GCC port (#543)

Co-authored-by: Joseph Julicher <jjulicher@mac.com>

* Added checks for index in ThreadLocalStorage APIs (#552)

Added checks for ( xIndex >= 0 ) in ThreadLocalStorage APIs

* Update of three badly terminated macro definitions (#555)

* Update of three badly terminated macro definitions
- vTaskDelayUntil() to conform to usual pattern do { ... } while(0)
- vTaskNotifyGiveFromISR() and
- vTaskGenericNotifyGiveFromISR() to remove extra terminating semicolons
- This PR addresses issues #553 and #554

* Adjust formatting of task.h

Co-authored-by: Paul Bartell <pbartell@amazon.com>

* M85 support (#556)

* Extend support to Arm Cortex-M85

Signed-off-by: Gabor Toth <gabor.toth@arm.com>
Change-Id: I679ba8e193638126b683b651513f08df445f9fe6

* Add generated Cortex-M85 support files

Signed-off-by: Gabor Toth <gabor.toth@arm.com>
Change-Id: Ib329d88623c2936ffe3e9a24f5d6e07655e4e5c8

* Extend Trusted Firmware M port

Extend Trusted Firmware M port to Cortex-M23,
Cortex-M55 and Cortex-M85.

Signed-off-by: Gabor Toth <gabor.toth@arm.com>
Change-Id: If8f1081acfd04e547b3227579e70e355a6adffe3

* Re-run copy_files.py script

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Signed-off-by: Gabor Toth <gabor.toth@arm.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>

* portable-RP2040: Fix typo in README.md (#559)

Replace "import" with "include" in cmake code sample.

* Update CMakeLists.txt for Cortex-M55 and Cortex-M85 ports (#560)

* Annotate ports CMakeLists.txt with port details

* CMake: Add Cortex-M55 and Cortex-M85 ports

* Use highest numbered MPU regions for kernel

ARMv7-M allows overlapping MPU regions. When 2 MPU regions overlap, the
MPU configuration of the higher numbered MPU region is applied. For
example, if a memory area is covered by 2 MPU regions 0 and 1, the
memory permissions for MPU region 1 are applied.

We use 5 MPU regions for kernel code and kernel data protections and
leave the remaining for the application writer. We were using lowest
numbered MPU regions (0-4) for kernel protections and leaving the
remaining for the application writer. The application writer could
configure those higher numbered MPU regions to override kernel
protections.

This commit changes the code to use highest numbered MPU regions for
kernel protections and leave the remaining for the application writer.
This ensures that the application writer cannot override kernel
protections.

We thank the SecLab team at Northeastern University for reporting this
issue.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Make RAM regions non-executable

This commit makes the privileged RAM and stack regions non-executable.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Remove local stack variable form MPU wrappers

It was possible for a third party that had already independently gained
the ability to execute injected code to achieve further privilege
escalation by branching directly inside a FreeRTOS MPU API wrapper
function with a manually crafted stack frame. This commit removes the
local stack variable `xRunningPrivileged` so that a manually crafted
stack frame cannot be used for privilege escalation by branching
directly inside a FreeRTOS MPU API wrapper.

We thank Certibit Consulting, LLC, Huazhong University of Science and
Technology and the SecLab team at Northeastern University for reporting
this issue.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Restrict unpriv task to invoke code with privilege

It was possible for an unprivileged task to invoke any function with
privilege by passing it as a parameter to MPU_xTaskCreate,
MPU_xTaskCreateStatic, MPU_xTimerCreate, MPU_xTimerCreateStatic, or
MPU_xTimerPendFunctionCall.

This commit ensures that MPU_xTaskCreate and MPU_xTaskCreateStatic can
only create unprivileged tasks. It also removes the following APIs:
1. MPU_xTimerCreate
2. MPU_xTimerCreateStatic
3. MPU_xTimerPendFunctionCall

We thank Huazhong University of Science and Technology for reporting
this issue.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Update History.txt

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Update History.txt as per the PR feedback

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Update RISC-V IAR port to support vector mode. (#458)

* Update RISC-V IAR port to support vector mode.

* uncrustify

Co-authored-by: David Chalco <david@chalco.io>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>

* Added better pointer declaration readability (#567)

* Add better pointer declaration readability

I revised the declaration of single-line pointers by splitting it into
multiple lines. Now, every pointer is declared (and initialized
accordingly) on its own line. This refactoring should enhance
readability and decrease the probability of error when a new pointer is
added/removed or a current one has its initialization value modified.

Signed-off-by: Cristian Cristea <cristiancristea00@gmail.com>

* Remove unnecessary whitespace characters and lines

It removes whitespace characters at the end of lines (empty or
othwerwise) and clear lines at the end of the file (only one remains).
It is an automatic operation done by git.

Signed-off-by: Cristian Cristea <cristiancristea00@gmail.com>

Signed-off-by: Cristian Cristea <cristiancristea00@gmail.com>

* Update doc comments in task.h (#570)

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Tickless idle fixes/improvement (#59)

* Fix tickless idle when stopping systick on zero...

...and don't stop SysTick at all in the eAbortSleep case.

Prior to this commit, if vPortSuppressTicksAndSleep() happens to stop
the SysTick on zero, then after tickless idle ends, xTickCount advances
one full tick more than the time that actually elapsed as measured by
the SysTick.  See "bug 1" in this forum post:
https://forums.freertos.org/t/ultasknotifytake-timeout-accuracy/9629/40

SysTick
-------
The SysTick is the hardware timer that provides the OS tick interrupt
in the official ports for Cortex M.  SysTick starts counting down from
the value stored in its reload register.  When SysTick reaches zero, it
requests an interrupt.  On the next SysTick clock cycle, it loads the
counter again from the reload register.  To get periodic interrupts
every N SysTick clock cycles, the reload register must be N - 1.

Bug Example
-----------
- Idle task calls vPortSuppressTicksAndSleep(xExpectedIdleTime = 2).
  [Doesn't have to be "2" -- could be any number.]
- vPortSuppressTicksAndSleep() stops SysTick, and the current-count
  register happens to stop on zero.
- SysTick ISR executes, setting xPendedTicks = 1
- vPortSuppressTicksAndSleep() masks interrupts and calls
  eTaskConfirmSleepModeStatus() which confirms the sleep operation. ***
- vPortSuppressTicksAndSleep() configures SysTick for 1 full tick
  (xExpectedIdleTime - 1) plus the current-count register (which is 0)
- One tick period elapses in sleep.
- SysTick wakes CPU, ISR executes and increments xPendedTicks to 2.
- vPortSuppressTicksAndSleep() calls vTaskStepTick(1), then returns.
- Idle task resumes scheduler, which increments xTickCount twice (for
  xPendedTicks = 2)

In the end, two ticks elapsed as measured by SysTick, but the code
increments xTickCount three times.  The root cause is that the code
assumes the SysTick current-count register always contains the number of
SysTick counts remaining in the current tick period.  However, when the
current-count register is zero, there are ulTimerCountsForOneTick
counts remaining, not zero.  This error is not the kind of time slippage
normally associated with tickless idle.

*** Note that a recent commit https://github.com/FreeRTOS/FreeRTOS-Kernel/commit/e1b98f0
results in eAbortSleep in this case, due to xPendedTicks != 0.  That
commit does mostly resolve this bug without specifically mentioning
it, and without this commit.  But that resolution allows the code in
port.c not to directly address the special case of stopping SysTick on
zero in any code or comments.  That commit also generates additional
instances of eAbortSleep, and a second purpose of this commit is to
optimize how vPortSuppressTicksAndSleep() behaves for eAbortSleep, as
noted below.

This commit also includes an optimization to avoid stopping the SysTick
when eTaskConfirmSleepModeStatus() returns eAbortSleep.  This
optimization belongs with this fix because the method of handling the
SysTick being stopped on zero changes with this optimization.

* Fix imminent tick rescheduled after tickless idle

Prior to this commit, if something other than systick wakes the CPU from
tickless idle, vPortSuppressTicksAndSleep() might cause xTickCount to
increment once too many times.  See "bug 2" in this forum post:
https://forums.freertos.org/t/ultasknotifytake-timeout-accuracy/9629/40

SysTick
-------
The SysTick is the hardware timer that provides the OS tick interrupt
in the official ports for Cortex M.  SysTick starts counting down from
the value stored in its reload register.  When SysTick reaches zero, it
requests an interrupt.  On the next SysTick clock cycle, it loads the
counter again from the reload register.  To get periodic interrupts
every N SysTick clock cycles, the reload register must be N - 1.

Bug Example
-----------
- CPU is sleeping in vPortSuppressTicksAndSleep()
- Something other than the SysTick wakes the CPU.
- vPortSuppressTicksAndSleep() calculates the number of SysTick counts
  until the next tick.  The bug occurs only if this number is small.
- vPortSuppressTicksAndSleep() puts this small number into the SysTick
  reload register, and starts SysTick.
- vPortSuppressTicksAndSleep() calls vTaskStepTick()
- While vTaskStepTick() executes, the SysTick expires.  The ISR pends
  because interrupts are masked, and SysTick starts a 2nd period still
  based on the small number of counts in its reload register.  This 2nd
  period is undesirable and is likely to cause the error noted below.
- vPortSuppressTicksAndSleep() puts the normal tick duration into the
  SysTick's reload register.
- vPortSuppressTicksAndSleep() unmasks interrupts before the SysTick
  starts a new period based on the new value in the reload register.
  [This is a race condition that can go either way, but for the bug
  to occur, the race must play out this way.]
- The pending SysTick ISR executes and increments xPendedTicks.
- The SysTick expires again, finishing the second very small period, and
  starts a new period this time based on the full tick duration.
- The SysTick ISR increments xPendedTicks (or xTickCount) even though
  only a tiny fraction of a tick period has elapsed since the previous
  tick.

The bug occurs when *two* consecutive small periods of the SysTick are
both counted as ticks.  The root cause is a race caused by the small
SysTick period.  If vPortSuppressTicksAndSleep() unmasks interrupts
*after* the small period expires but *before* the SysTick starts a
period based on the full tick period, then two small periods are
counted as ticks when only one should be counted.

The end result is xTickCount advancing nearly one full tick more than
time actually elapsed as measured by the SysTick.  This is not the kind
of time slippage normally associated with tickless idle.

After this commit the code starts the SysTick and then immediately
modifies the reload register to ensure the very short cycle (if any) is
conducted only once.  This strategy requires special consideration for
the build option that configures SysTick to use a divided clock.  To
avoid waiting around for the SysTick to load value from the reload
register, the new code temporarily configures the SysTick to use the
undivided clock.  The resulting timing error is typical for tickless
idle.  The error (commonly known as drift or slippage in kernel time)
caused by this strategy is equivalent to one or two counts in
ulStoppedTimerCompensation.

This commit also updates comments and #define symbols related to the
SysTick clock option.  The SysTick can optionally be clocked by a
divided version of the CPU clock (commonly divide-by-8).  The new code
in this commit adjusts these comments and symbols to make them clearer
and more useful in configurations that use the divided clock.  The fix
made in this commit requires the use of these symbols, as noted in the
code comments.

* Fix tickless idle with alternate systick clocking

Prior to this commit, in configurations using the alternate SysTick
clocking, vPortSuppressTicksAndSleep() might cause xTickCount to jump
ahead as much as the entire expected idle time or fall behind as much
as one full tick compared to time as measured by the SysTick.

SysTick
-------
The SysTick is the hardware timer that provides the OS tick interrupt
in the official ports for Cortex M. SysTick starts counting down from
the value stored in its reload register. When SysTick reaches zero, it
requests an interrupt. On the next SysTick clock cycle, it loads the
counter again from the reload register. The SysTick has a configuration
option to be clocked by an alternate clock besides the core clock.
This alternate clock is MCU dependent.

Scenarios Fixed
---------------
The new code in this commit handles the following scenarios that were
not handled correctly prior to this commit.

1. Before the sleep, vPortSuppressTicksAndSleep() stops the SysTick on
zero, long after SysTick reached zero.  Prior to this commit, this
scenario caused xTickCount to jump ahead one full tick for the same
reason documented here: 0c7b04bd3a

2. After the sleep, vPortSuppressTicksAndSleep() stops the SysTick
before it loads the counter from the reload register.  Prior to this
commit, this scenario caused xTickCount to jump ahead by the entire
expected idle time (xExpectedIdleTime) because the current-count
register is zero before it loads from the reload register.

3. Prior to return, vPortSuppressTicksAndSleep() attempts to start a
short SysTick period when the current SysTick clock cycle has a lot of
time remaining.  Prior to this commit, this scenario could cause
xTickCount to fall behind by as much as nearly one full tick because the
short SysTick cycle never started.

Note that #3 is partially fixed by 967acc9b20
even though that commit addresses a different issue.  So this commit
completes the partial fix.

* Improve comments and name of preprocessor symbol

Add a note in the code comments that SysTick requests an interrupt when
decrementing from 1 to 0, so that's why stopping SysTick on zero is a
special case.  Readers might unknowingly assume that SysTick requests
an interrupt when wrapping from 0 back to the load-register value.

Reconsider new "_SETTING" suffix since "_CONFIG" suffix seems more
descriptive.  The code relies on *both* of these preprocessor symbols:

portNVIC_SYSTICK_CLK_BIT
portNVIC_SYSTICK_CLK_BIT_CONFIG  **new**

A meaningful suffix is really helpful to distinguish the two symbols.

* Revert introduction of 2nd name for NVIC register

When I added portNVIC_ICSR_REG I didn't realize there was already a
portNVIC_INT_CTRL_REG, which identifies the same register.  Not good
to have both.  Note that portNVIC_INT_CTRL_REG is defined in portmacro.h
and is already used in this file (port.c).

* Replicate to other Cortex M ports

Also set a new fiddle factor based on tests with a CM4F.  I used gcc,
optimizing at -O1.  Users can fine-tune as needed.

Also add configSYSTICK_CLOCK_HZ to the CM0 ports to be just like the
other Cortex M ports.  This change allowed uniformity in the default
tickless implementations across all Cortex M ports.  And CM0 is likely
to benefit from configSYSTICK_CLOCK_HZ, especially considering new CM0
devices with very fast CPU clock speeds.

* Revert changes to IAR-CM0-portmacro.h

portNVIC_INT_CTRL_REG was already defined in port.c.  No need to define
it in portmacro.h.

* Handle edge cases with slow SysTick clock

Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
Co-authored-by: abhidixi11 <44424462+abhidixi11@users.noreply.github.com>
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>

* Merge SMP commit 45dd83a8e

* 45dd83a8e | 2022-06-09 | Fix RP2040 assertion due to yield spin lock info being wrongly shared between multiple cores (#501)

* Merge SMP b87dfa3e9

* b87dfa3e9 | 2022-06-04 | RP2040: Allow FreeRTOS to be added to the parent CMake project post initialization of the Pico SDK

* Merge SMP 13f034eb7

* 13f034eb7 | 2022-06-24 | RP2040: Fix compiler warning and comment (#509)

* Fix compiler warning and spelling

* Fix Add new task for single core when scheduler not running

* Fix priority set when task is not in ready list for single core

* Fix vTaskResume when task is not running

* Fix uncrustify formating warning

* Add portCHECK_IF_IN_ISR for SMP

* Format vTaskSwitchContext

* Fix vTaskSwitchContextForCore bug due to uncrustify

* First review - did not build yet

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Corresponding changes in FreeRTOS.h and task.h

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Fix the single core compilation

* vTaskSwtichContextForCore rename vTaskSwitchContext
* vTaskYieldWithinAPI for single core
* pxCurrentTCBs for single core in xTaskIncrementTick

* Fix compilation warning

* Update xTaskGetCurrentTaskHandleCPU API

* Use BaseType_t instead of UBaseType_t

* Make the list traverse loop more readable

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Remove unnecessary loop in xTaskIncrementTick for single core

* Update uxSchedulerSuspended with ISR lock in prvCheckForRunStateChange

* Updated ESP32 port-layer to ESP-IDF `v4.4.2` (#572)

* Xtensa_ESP32: Added esp-idf v4.4.2 specific changes

* Xtensa_ESP32: Updated SPDX license identifiers

* Add warning message to ensure min stack size (#575)

Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>

* Removed the 'configASSERT( xInheritanceOccurred == pdFALSE )' assertion from xQueueSemaphoreTake as the reasoning behind it is wrong; it can trigger on wrongly on highly-contested semaphores on multicore systems. See https://forums.freertos.org/t/15967 (#576)

Co-authored-by: Niklas Gürtler <niklas.guertler@tacterion.com>

* Update the NIOSII port to enable longer jumps (#578)

Update the NIOSII port so it works on systems with more RAM as
per https://forums.freertos.org/t/nios-ii-r-nios2-call26-noat-linker-error/16028

* Update Cortex-M55 and Cortex-M85 ports (#579)

These were missed when PR #59 was merged.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Fix context switch when time slicing is off (#568)

* Fix context switch when time slicing is off

When time slicing is off, context switch should only happen when a
task with priority higher than the currently executing one is unblocked.
Earlier the code was invoking a context switch even when a task with
priority equal the currently executing task was unblocked. This commit
fixes the code to only do a context switch when a higher priority
task is unblocked.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Merge commit "Add support for retrieving a task's uxCoreAffinityMask
with the vTaskGetInfo() API"

* Merge commit 8128208bde

* Use taskENTER/EXIT_CRITICAL_FROM_ISR (#38)

* Enter critical section from is implemented differently for single core
  and smp. Use taskENTER/EXIT_CRITICAL_FROM_ISR in source.

* Improve single core unit test coverage (#42)

* prvCreateIldeTask use configNUM_CORES
* First time yield in idle task in SMP only
* prvCheckTasksWaitingTermination check pxTCB NULL pointer for SMP only.
  Single core won't have to check the pxTCB

* Yield for task when core affinity changed (#41)

* Yield for task when the task is linked to new allowed cores

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>

* Remove builtin clz in prvSelectHighestPriorityTask (#37)

* Remove builtin clz in prvSelectHighestPriorityTask

* Move critical nesting count to port (#47)

* Move the critical nesting management to port layer

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Move critical nesting in TCB macro to tasks.c

* Add RP2040 support maintain critical nesting count in TCB

* Fix formatting

* RP2040 maintain critical nesting count in port

* Fix constant type

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>

* Rename config num cores (#48)

* Rename configNUM_CORES to configNUMBER_OF_CORES

* Fix the task selection when task yields (#54)

* Move xTaskIncrementTick critical section to port (#55)

* Port should use taskENTER/EXIT_CRITICAL_FROM_ISR

* Not preempt equal priority task in the following functions (#56)

Not to preempt equal priority task in the following functions
* vTaskResume
* vTaskResumeFromISR
* vTaskPrioritySet
* vTaskCoreAffinitySet

* Remove implicit test (#49)

* Remove taskTASK_IS_RUNNING implicit test
* Remove portCHECK_IF_IN_ISR implicit test
* Fix taskVALID_CORE_ID implicit test
* Remove configASSERT implicit test

* Fix preempt equal priority task in xTaskIncrementTick (#58)

* Not preempt equal priority when a task is removed from delay list.
  Process time sharing is handle in the logic below.
* Remove the xPreemptEqualPriority parameter of prvYieldForTask

* Remove prvSelectHighestPriorityTask call in vTaskSuspend (#59)

* Every core starts with an idle task in SMP implementation and
  taskTASK_IS_RUNNING only return ture when the task is idle task before
  scheduler started. So prvSelectHighestPriorityTask won't be called in
  vTaskSuspend before scheduler started.
* Update prvSelectHighestPriorityTask to ensure that this function is
  called only when scheduler started.

* Adding portIDLE_TASK_TEST_MOCK in idle task function (#66)

* Adding configIDLE_TASK_HOOK in idle task function

* Add INFINITE_LOOP macro to test idle task function (#67)

* Remove configIDLE_TASK_HOOK
* Add INFINIT_LOOP. Unit test can redefine this macro to mock the
function.

* portYield is not called when exit critical section from ISR (#60)

* Reference SMP branch

* Fix list index is moved in prvSearchForNameWithinSingleList (#61)

* index pointer should not be moved in SMP

* Yield for priority inherit and disinherit (#64)

* Yield the core runs the task with prority changed when priority
  inheritance and disinheritance.

* fix performance counting for SMP (#65)

* performance counting: ulTaskSwitchedInTime and ulTotalRunTime must be (#618)

arrays, index is core number

---------

Co-authored-by: Hardy Griech <ntbox@gmx.net>

* Remomve unreachable assert in prvCheckForRunStateChange (#68)

* Previous assert already ensure this assert won't be triggered

* Remove unreachable code in preYieldForTask (#69)

* xLowestPriorityCore index can't be greater than configNUMBER_OF_CORES

* Add first version of XCOREAI port (#63)

* xTaskIncrementTick need to be called in critical section
* Rename configNUM_CORES to configNUMBER_OF_CORES
* Define portENTER/EXIT_CRITICAL_FROM_ISR for SMP
* portSET/CLEAR_INTERRUPT_MASK_FROM_ISR is not used in SMP

* Fix configDEINIT_TLS_BLOCK (#73)

configDEINIT_TLS_BLOCK() should deinit the TLS block of the task to being
deleted instead of the currently running task.

* Sync with main branch (#71)

* Fix array-bounds compiler warning on gcc11+ in list.h (#580)

listGET_OWNER_OF_NEXT_ENTRY computes `( pxConstList )->pxIndex->pxNext` after
verifying that `( pxConstList )->pxIndex` points to `xListEnd`, which due to
being a MiniListItem_t, can be shorter than a ListItem_t. Thus,
`( pxConstList )->pxIndex` is a `ListItem_t *` that extends past the end of the
`List_t` whose `xListEnd` it points to. This is fixed by accessing `pxNext`
through a `MiniListItem_t` instead.

* move the prototype for vApplicationIdleHook to task.h. (#600)

Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Update equal priority task preemption (#603)

* vTaskResume and vTaskPrioritySet don't preempt equal priority task

* Update vTaskResumeAll not to preempt task with equal priority

* Fix in xTaskResumeFromISR

* Update FreeRTOS/FreeRTOS build checks (#613)

This is needed to be compatible with the refactoring done in this
PR - https://github.com/FreeRTOS/FreeRTOS/pull/889

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Add ulTaskGetRunTimeCounter and ulTaskGetRunTimePercent (#611)

Allow ulTaskGetIdleRunTimeCounter and ulTaskGetIdleRunTimePercent to be
used whenever configGENERATE_RUN_TIME_STATS is enabled, as this is the
only requirement for these functions to work.

* Fix some CMake documentation typos (#616)

The quick start instructions for CMake mention the "master"
git branch which has been replaced by "main" in the current
repo.

The main CMakeLists.txt documents how to integrate a
custom port. Fix a typo in the suggested CMake code.

* Added support of 64bit events. (#597)

* Added support of 64bit even

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Added missing brackets

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Made proper name for tick macro.

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Improved macro evaluation

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Fixed missed port files  + documentation

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Changes made on PR

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Fix macro definition.

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Formatted code with uncrustify

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

---------

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Introduce portMEMORY_BARRIER for Microblaze port. (#621)

The introduction of `portMEMORY_BARRIER` will ensure
the places in the kernel use a barrier will work.
For example, `xTaskResumeAll` has a memory barrier
to ensure its correctness when compiled with optimization
enabled. Without the barrier `xTaskResumeAll` can fail
(e.g. start reading and writing to address 0 and/or
infinite looping) when `xPendingReadyList` contains more
than one task to restore.

In `xTaskResumeAll` the compiler chooses to cache the
`pxTCB` the first time through the loop for use
in every subsequent loop. This is incorrect as the
removal of `pxTCB->xEventListItem` will actually
change the value of `pxTCB` if it was read again
at the top of the loop. The barrier forces the compiler
to read `pxTCB` again at the top of the loop.

The compiler is operating correctly. The removal
`pxTCB->xEventListItem` executes on a `List_t *`
and `ListItem_t *`.  This means that the compiler
can assume that any `MiniListItem_t` values are
unchanged by the loop (i.e. "strict-aliasing").
This allows the compiler to cache `pxTCB` as it
is obtained via a `MiniListItem_t`. This is incorrect
in this case because it is possible for a `ListItem_t *`
to actually alias a `MiniListItem_t`. This is technically
a "violation of aliasing rules" so we use the the barrier
to disable the strict-aliasing optimization in this loop.

* Do not call exit() on MSVC Port when calling vPortEndScheduler (#624)

* make port exitable

* correctly set xPortRunning to False

* add suggestions from Review

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* add suggestions from Review

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Update PR template to include checkbox for Unit Test related changes (#627)

* Fix build failure introduced in PR #597 (#629)

The PR #597 introduced a new config option configTICK_TYPE_WIDTH_IN_BITS
which can be defined to one of the following:
* TICK_TYPE_WIDTH_16_BITS - Tick type is 16 bit wide.
* TICK_TYPE_WIDTH_32_BITS - Tick type is 32 bit wide.
* TICK_TYPE_WIDTH_64_BITS - Tick type is 64 bit wide.

Earlier we supported 16 and 32 bit width for tick type which was
controlled using the config option configUSE_16_BIT_TICKS. The PR
tried to maintain backward compatibility by honoring
configUSE_16_BIT_TICKS. The backward compatibility did not work as
expected though, as the macro configTICK_TYPE_WIDTH_IN_BITS was used
before it was defined. This PR addresses it by ensuring that the macro
configTICK_TYPE_WIDTH_IN_BITS is defined before it is used.

Testing
1. configUSE_16_BIT_TICKS is defined to 0.

Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```

Assembly:
```
109e:       4b50            ldr     r3, [pc, #320]  ; (11e0 <xTaskIncrementTick+0x150>)
10a0:       f8d3 4134       ldr.w   r4, [r3, #308]  ; 0x134
10a4:       3401            adds    r4, #1
10a6:       f8c3 4134       str.w   r4, [r3, #308]  ; 0x134
```

It is clear from assembly that the tick type is 32 bit.

2. configUSE_16_BIT_TICKS is defined to 1.

Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```

Assembly:
```
10e2:       4b53            ldr     r3, [pc, #332]  ; (1230 <xTaskIncrementTick+0x15c>)
10e4:       f8b3 4134       ldrh.w  r4, [r3, #308]  ; 0x134
10e8:       b2a4            uxth    r4, r4
10ea:       3401            adds    r4, #1
10ec:       b2a4            uxth    r4, r4
10ee:       f8a3 4134       strh.w  r4, [r3, #308]  ; 0x134
```

It is clear from assembly that the tick type is 16 bit.

3. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_16_BITS.

Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```

Assembly:
```
10e2:       4b53            ldr     r3, [pc, #332]  ; (1230 <xTaskIncrementTick+0x15c>)
10e4:       f8b3 4134       ldrh.w  r4, [r3, #308]  ; 0x134
10e8:       b2a4            uxth    r4, r4
10ea:       3401            adds    r4, #1
10ec:       b2a4            uxth    r4, r4
10ee:       f8a3 4134       strh.w  r4, [r3, #308]  ; 0x134
```

It is clear from assembly that the tick type is 16 bit.

4. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_32_BITS.

Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```

Assembly:
```
109e:       4b50            ldr     r3, [pc, #320]  ; (11e0 <xTaskIncrementTick+0x150>)
10a0:       f8d3 4134       ldr.w   r4, [r3, #308]  ; 0x134
10a4:       3401            adds    r4, #1
10a6:       f8c3 4134       str.w   r4, [r3, #308]  ; 0x134
```

It is clear from assembly that the tick type is 32 bit.

5. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_64_BITS.

```
 #error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
```

The testing was done for GCC/ARM_CM3 port which does not support 64 bit
tick type.

6. Neither configUSE_16_BIT_TICKS nor configTICK_TYPE_WIDTH_IN_BITS
defined.

```
 #error Missing definition:  One of configUSE_16_BIT_TICKS and
 configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h.
 See the Configuration section of the FreeRTOS API documentation for
 details.
```

7. Both configUSE_16_BIT_TICKS and configTICK_TYPE_WIDTH_IN_BITS defined.

```
 #error Only one of configUSE_16_BIT_TICKS and
 configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h.
 See the Configuration section of the FreeRTOS API documentation for
 details.
```

Related issue - https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/628

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Feature/fixing clang gnu compiler warnings (#620)

* Adding in ability to support a library for freertos_config and a custom freertos_kernel_port (#558)

* Using single name definition for libraries everywhere. (#558)

* Supporting backwards compatibility with FREERTOS_CONFIG_FILE_DIRECTORY (#571)

* Removing compiler warnings for GNU and Clang. (#571)

* Added in documentation on how to consume from a main project. Added default PORT selection for native POSIX and MINGW platforms.

* Only adding freertos_config if it exists. Removing auto generation of it from a FREERTOS_CONFIG_FILE_DIRECTORY.

* Fixing clang and gnu compiler warnings.

* Adding in project information and how to compile for GNU/clang

* Fixing compiler issue with unused variable - no need to declare variable.

* Adding in compile warnings for linux builds that kernel is okay with using.

* Fixing more extra-semi-stmt clang warnings.

* Moving definition of hooks into header files if features are enabled.

* Fixing formatting with uncrustify.

* Fixing merge conflicts with main merge.

* Fixing compiler errors due to merge issues and formatting.

* Fixing Line feeds.

* Adding 'portNORETURN' into portmacros.h. Other Updates based on PR request

* Further clean-up of clang and clang-tidy issues.

* Removing compiler specific pragmas from common c files.

* Fixing missing lexicon entry and uncrustify formatting changes.

* Resolving merge issue multiple defnitions of proto for prvIdleTask

* Fixing formatting issues that are not covered by uncrustify. Use clang-tidy instead if you want this level of control.

* More uncrustify formatting issues.

* Fixing extra bracket in #if statement.

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* POSIX port fixes (#626)

* Fix types in POSIX port

Use TaskFunction_t and StackType_t as other ports do.

* Fix portTICK_RATE_MICROSECONDS in POSIX port

---------

Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Cortex-M35P: Add Cortex-M35P port (#631)

* Cortex-M35P: Add Cortex-M35P port

The Cortex-M35P support added to kernel. The port hasn't been
validated yet with TF-M. Hence TF-M support is not included in this
port.

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>

* Add portNORETURN to the newly added portmacro.h

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>

* Introduced Github Status Badge for Unit Tests (#634)

* Introduced Github Status Badge for Unit Tests

* Github status badge to point to latest run

* Github status badge UT points to latest results

* Fixed URL for Github Status badge

---------

Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>

* Remove C99 requirement from CMake file (#633)

* Remove C99 requirement from CMake file

The kernel source is C89 compliant and does not need C99.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Explicitly set C89 requirement for kernel

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Add Thread Local Storage (TLS) support using Picolibc functions (#343)

* Pass top of stack to configINIT_TLS_BLOCK

Picolibc wants to allocate the per-task TLS block within the stack
segment, so it will need to modify the top of stack value. Pass the
pxTopOfStack variable to make this explicit.

Signed-off-by: Keith Packard <keithpac@amazon.com>

* Move newlib-specific definitions to separate file

This reduces the clutter in FreeRTOS.h caused by having newlib-specific
macros present there.

Signed-off-by: Keith Packard <keithpac@amazon.com>

* Make TLS code depend only on configUSE_C_RUNTIME_TLS_SUPPORT

Remove reference to configUSE_NEWLIB_REENTRANT as that only works
when using newlib. configUSE_C_RUNTIME_TLS_SUPPORT is always
set when configUSE_NEWLIB_REENTRANT is set, so using both was
redundant in that case.

Signed-off-by: Keith Packard <keithpac@amazon.com>

* portable-ARC: Adapt ARC support to use generalized TLS support

With generalized thread local storage (TLS) support present in the
core, the two ARC ports need to have the changes to the TCB mirrored
to them.

Signed-off-by: Keith Packard <keithpac@amazon.com>

* Add Thread Local Storage (TLS) support using Picolibc functions

This patch provides definitions of the general TLS support macros in
terms of the Picolibc TLS support functions.

Picolibc is normally configured to use TLS internally for all
variables that are intended to be task-local, so these changes are
necessary for picolibc to work correctly with FreeRTOS.

The picolibc helper functions rely on elements within the linker
script to arrange the TLS data in memory and define some symbols.
Applications wanting to use this mechanism will need changes in their
linker script when migrating to picolibc.

Signed-off-by: Keith Packard <keithpac@amazon.com>

---------

Signed-off-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Interrupt priority assert improvements for CM3/4/7 (#602)

* Interrupt priority assert improvements for CM3/4/7

In the ARM_CM3, ARM_CM4, and ARM_CM7 ports, change the assertion that
`configMAX_SYSCALL_INTERRUPT_PRIORITY` is nonzero to account for the
number of priority bits implemented by the hardware.

Change these ports to also use the lowest priority for PendSV and
SysTick, ignoring `configKERNEL_INTERRUPT_PRIORITY`.

* Remove not needed configKERNEL_INTERRUPT_PRIORITY define

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>

* Introduced code coverage status badge (#635)

* Introduced code coverage status badge

* Trying to fix the URL checker issue

* Fix URL check

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* added portPOINTER_SIZE_TYPE and SIZE_MAX definition to PIC24/dsPIC port (#636)

* added portPOINTER_SIZE_TYPE definition to PIC24/dsPIC port

* Added SIZE_MAX definition to PIC24/dsPIC33

* Fix TLS and stack alignment when using picolibc (#637)

Both the TLS block and stack must be correctly aligned when using
picolibc. The architecture stack alignment is represented by the
portBYTE_ALIGNMENT_MASK and the TLS block alignment is provided by the
Picolibc _tls_align() inline function for Picolibc version 1.8 and
above. For older versions of Picolibc, we'll assume that the TLS block
requires the same alignment as the stack.

For downward growing stacks, this requires aligning the start of the
TLS block to the maximum of the stack alignment and the TLS
alignment. With this, both the TLS block and stack will now be
correctly aligned.

For upward growing stacks, the two areas must be aligned
independently; the TLS block is aligned from the start of the stack,
then the tls space is allocated, and then the stack is aligned above
that.

It's probably useful to know here that the linker ensures that
variables within the TLS block are assigned offsets that match their
alignment requirements. If the TLS block itself is correctly aligned,
then everything within will also be.

I have only tested the downward growing stack branch of this patch.

Signed-off-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Enable building the GCC Cortex-R5 port without an FPU (#586)

* Ensure configUSE_TASK_FPU_SUPPORT option is set correctly

If one does enable the FPU of the Cortex-R5 processor, then the GCC
compiler will define the macro __ARM_FP. This can be used to ensure,
that the configUSE_TASK_FPU_SUPPORT is set accordingly.

* Enable the implementation of vPortTaskUsesFPU only if configUSE_TASK_FPU_SUPPORT is set to 1

* Remove error case in pxPortInitialiseStack

The case of configUSE_TASK_FPU_SUPPORT is 0 is now handled

* Enable access to FPU registers only if FPU is enabled

* Make minor formating changes

* Format ARM Cortex-R5 port

* Address review comments from @ChristosZosi

* Minor code review suggestions

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>

* Fix freertos_kernel cmake property, Posix Port (#640)

* Fix freertos_kernel cmake property, Posix Port

* Moves the `set_property()` call below the target definition in top level CMakeLists file
* Corrects billion value from `ULL` suffix (not C90 compliant) to `UL` suffix with cast to uint64_t

* Add blank line to CMakeLists.txt

* Add missing FreeRTOS+ defines

* Run kernel demos and unit tests for PR changes (#645)

* Run kernel demos and unit tests for PR changes

Kernel demos check builds multiple demos from FreeRTOS/FreeRTOS and
unit tests check runs unit tests in FreeRTOS/FreeRTOS. Both of these
checks currently use main branch of FreeRTOS-Kernel. This commits
updates these checks to use the changes in the PR.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Do not specify PR SHA explicitly as that is default

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Remove explicit PR SHA from kernel checks

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Add functions to get the buffers of statically created objects (#641)

Added various ...GetStaticBuffer() functions to get the buffers of statically
created objects.
---------
Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>

* Cortex-M Assert when NVIC implements 8 PRIO bits (#639)

* Cortex-M Assert when NVIC implements 8 PRIO bits

* Fix CM3 ports

* Fix ARM_CM3_MPU

* Fix ARM CM3

* Fix ARM_CM4_MPU

* Fix ARM_CM4

* Fix GCC ARM_CM7

* Fix IAR ARM ports

* Uncrustify changes

* Fix MikroC_ARM_CM4F port

* Fix MikroC_ARM_CM4F port-(2)

* Fix RVDS ARM ports

* Revert changes for Tasking/ARM_CM4F port

* Revert changes for Tasking/ARM_CM4F port-(2)

* Update port.c

Fix GCC/ARM_CM4F port

* Update port.c

* update GCC\ARM_CM4F port

* update port.c

* Assert to check configMAX_SYSCALL_INTERRUPT_PRIORITY is set to higher priority

* Fix merge error: remove duplicate code

* Fix typos

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal>

* Remove C90 requirement from CMakeLists (#649)

This is needed as it is breaking projects - https://forums.freertos.org/t/freertos-gcc-cmake/16984

We will re-evaluate and accordingly add this later.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Only add alignment padding when needed (#650)

Heap 4 and Heap 5 add some padding to ensure that the allocated blocks
are always aligned to portBYTE_ALIGNMENT bytes. The code until now was
adding padding always even if the resulting block was already aligned.
This commits updates the code to only add padding if the resulting block
is not aligned.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* add a missing comma (#651)

* fix conversion warning (#658)

FreeRTOS-Kernel/portable/GCC/ARM_CM4F/port.c:399:41: error: conversion from 'uint32_t' {aka 'long unsigned int'} to 'uint8_t' {aka 'unsigned char'} may change value [-Werror=conversion]

Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Keith Packard <keithpac@amazon.com>
Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com>
Co-authored-by: Archit Gupta <71798289+archigup@users.noreply.github.com>
Co-authored-by: tcpluess <tpluess@ieee.org>
Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Chris Copeland <chris@chrisnc.net>
Co-authored-by: David J. Fiddes <35607151+davefiddes@users.noreply.github.com>
Co-authored-by: Dusan Cervenka <cervenka@acrios.com>
Co-authored-by: bbain <16752579+bbain@users.noreply.github.com>
Co-authored-by: Ju1He1 <93189163+Ju1He1@users.noreply.github.com>
Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com>
Co-authored-by: phelter <paulheltera@gmail.com>
Co-authored-by: jacky309 <jacques.guillou@gmail.com>
Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com>
Co-authored-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com>
Co-authored-by: Keith Packard <keithp@keithp.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com>
Co-authored-by: Kody Stribrny <89810515+kstribrnAmzn@users.noreply.github.com>
Co-authored-by: Holden <holden-zenithaerotech.com>
Co-authored-by: Darian <32921628+Dazza0@users.noreply.github.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal>
Co-authored-by: Nicolas <nicolas.brunner@heig-vd.ch>
Co-authored-by: Vo Trung Chi <chi.votrung@vn.bosch.com>

* Smp dev merge main 20230410 (#74)

* Fix array-bounds compiler warning on gcc11+ in list.h (#580)

listGET_OWNER_OF_NEXT_ENTRY computes `( pxConstList )->pxIndex->pxNext` after
verifying that `( pxConstList )->pxIndex` points to `xListEnd`, which due to
being a MiniListItem_t, can be shorter than a ListItem_t. Thus,
`( pxConstList )->pxIndex` is a `ListItem_t *` that extends past the end of the
`List_t` whose `xListEnd` it points to. This is fixed by accessing `pxNext`
through a `MiniListItem_t` instead.

* move the prototype for vApplicationIdleHook to task.h. (#600)

Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Update equal priority task preemption (#603)

* vTaskResume and vTaskPrioritySet don't preempt equal priority task

* Update vTaskResumeAll not to preempt task with equal priority

* Fix in xTaskResumeFromISR

* Update FreeRTOS/FreeRTOS build checks (#613)

This is needed to be compatible with the refactoring done in this
PR - https://github.com/FreeRTOS/FreeRTOS/pull/889

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Add ulTaskGetRunTimeCounter and ulTaskGetRunTimePercent (#611)

Allow ulTaskGetIdleRunTimeCounter and ulTaskGetIdleRunTimePercent to be
used whenever configGENERATE_RUN_TIME_STATS is enabled, as this is the
only requirement for these functions to work.

* Fix some CMake documentation typos (#616)

The quick start instructions for CMake mention the "master"
git branch which has been replaced by "main" in the current
repo.

The main CMakeLists.txt documents how to integrate a
custom port. Fix a typo in the suggested CMake code.

* Added support of 64bit events. (#597)

* Added support of 64bit even

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Added missing brackets

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Made proper name for tick macro.

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Improved macro evaluation

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Fixed missed port files  + documentation

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Changes made on PR

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Fix macro definition.

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Formatted code with uncrustify

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

---------

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Introduce portMEMORY_BARRIER for Microblaze port. (#621)

The introduction of `portMEMORY_BARRIER` will ensure
the places in the kernel use a barrier will work.
For example, `xTaskResumeAll` has a memory barrier
to ensure its correctness when compiled with optimization
enabled. Without the barrier `xTaskResumeAll` can fail
(e.g. start reading and writing to address 0 and/or
infinite looping) when `xPendingReadyList` contains more
than one task to restore.

In `xTaskResumeAll` the compiler chooses to cache the
`pxTCB` the first time through the loop for use
in every subsequent loop. This is incorrect as the
removal of `pxTCB->xEventListItem` will actually
change the value of `pxTCB` if it was read again
at the top of the loop. The barrier forces the compiler
to read `pxTCB` again at the top of the loop.

The compiler is operating correctly. The removal
`pxTCB->xEventListItem` executes on a `List_t *`
and `ListItem_t *`.  This means that the compiler
can assume that any `MiniListItem_t` values are
unchanged by the loop (i.e. "strict-aliasing").
This allows the compiler to cache `pxTCB` as it
is obtained via a `MiniListItem_t`. This is incorrect
in this case because it is possible for a `ListItem_t *`
to actually alias a `MiniListItem_t`. This is technically
a "violation of aliasing rules" so we use the the barrier
to disable the strict-aliasing optimization in this loop.

* Do not call exit() on MSVC Port when calling vPortEndScheduler (#624)

* make port exitable

* correctly set xPortRunning to False

* add suggestions from Review

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* add suggestions from Review

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Update PR template to include checkbox for Unit Test related changes (#627)

* Fix build failure introduced in PR #597 (#629)

The PR #597 introduced a new config option configTICK_TYPE_WIDTH_IN_BITS
which can be defined to one of the following:
* TICK_TYPE_WIDTH_16_BITS - Tick type is 16 bit wide.
* TICK_TYPE_WIDTH_32_BITS - Tick type is 32 bit wide.
* TICK_TYPE_WIDTH_64_BITS - Tick type is 64 bit wide.

Earlier we supported 16 and 32 bit width for tick type which was
controlled using the config option configUSE_16_BIT_TICKS. The PR
tried to maintain backward compatibility by honoring
configUSE_16_BIT_TICKS. The backward compatibility did not work as
expected though, as the macro configTICK_TYPE_WIDTH_IN_BITS was used
before it was defined. This PR addresses it by ensuring that the macro
configTICK_TYPE_WIDTH_IN_BITS is defined before it is used.

Testing
1. configUSE_16_BIT_TICKS is defined to 0.

Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```

Assembly:
```
109e:       4b50            ldr     r3, [pc, #320]  ; (11e0 <xTaskIncrementTick+0x150>)
10a0:       f8d3 4134       ldr.w   r4, [r3, #308]  ; 0x134
10a4:       3401            adds    r4, #1
10a6:       f8c3 4134       str.w   r4, [r3, #308]  ; 0x134
```

It is clear from assembly that the tick type is 32 bit.

2. configUSE_16_BIT_TICKS is defined to 1.

Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```

Assembly:
```
10e2:       4b53            ldr     r3, [pc, #332]  ; (1230 <xTaskIncrementTick+0x15c>)
10e4:       f8b3 4134       ldrh.w  r4, [r3, #308]  ; 0x134
10e8:       b2a4            uxth    r4, r4
10ea:       3401            adds    r4, #1
10ec:       b2a4            uxth    r4, r4
10ee:       f8a3 4134       strh.w  r4, [r3, #308]  ; 0x134
```

It is clear from assembly that the tick type is 16 bit.

3. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_16_BITS.

Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```

Assembly:
```
10e2:       4b53            ldr     r3, [pc, #332]  ; (1230 <xTaskIncrementTick+0x15c>)
10e4:       f8b3 4134       ldrh.w  r4, [r3, #308]  ; 0x134
10e8:       b2a4            uxth    r4, r4
10ea:       3401            adds    r4, #1
10ec:       b2a4            uxth    r4, r4
10ee:       f8a3 4134       strh.w  r4, [r3, #308]  ; 0x134
```

It is clear from assembly that the tick type is 16 bit.

4. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_32_BITS.

Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```

Assembly:
```
109e:       4b50            ldr     r3, [pc, #320]  ; (11e0 <xTaskIncrementTick+0x150>)
10a0:       f8d3 4134       ldr.w   r4, [r3, #308]  ; 0x134
10a4:       3401            adds    r4, #1
10a6:       f8c3 4134       str.w   r4, [r3, #308]  ; 0x134
```

It is clear from assembly that the tick type is 32 bit.

5. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_64_BITS.

```
 #error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
```

The testing was done for GCC/ARM_CM3 port which does not support 64 bit
tick type.

6. Neither configUSE_16_BIT_TICKS nor configTICK_TYPE_WIDTH_IN_BITS
defined.

```
 #error Missing definition:  One of configUSE_16_BIT_TICKS and
 configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h.
 See the Configuration section of the FreeRTOS API documentation for
 details.
```

7. Both configUSE_16_BIT_TICKS and configTICK_TYPE_WIDTH_IN_BITS defined.

```
 #error Only one of configUSE_16_BIT_TICKS and
 configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h.
 See the Configuration section of the FreeRTOS API documentation for
 details.
```

Related issue - https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/628

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Feature/fixing clang gnu compiler warnings (#620)

* Adding in ability to support a library for freertos_config and a custom freertos_kernel_port (#558)

* Using single name definition for libraries everywhere. (#558)

* Supporting backwards compatibility with FREERTOS_CONFIG_FILE_DIRECTORY (#571)

* Removing compiler warnings for GNU and Clang. (#571)

* Added in documentation on how to consume from a main project. Added default PORT selection for native POSIX and MINGW platforms.

* Only adding freertos_config if it exists. Removing auto generation of it from a FREERTOS_CONFIG_FILE_DIRECTORY.

* Fixing clang and gnu compiler warnings.

* Adding in project information and how to compile for GNU/clang

* Fixing compiler issue with unused variable - no need to declare variable.

* Adding in compile warnings for linux builds that kernel is okay with using.

* Fixing more extra-semi-stmt clang warnings.

* Moving definition of hooks into header files if features are enabled.

* Fixing formatting with uncrustify.

* Fixing merge conflicts with main merge.

* Fixing compiler errors due to merge issues and formatting.

* Fixing Line feeds.

* Adding 'portNORETURN' into portmacros.h. Other Updates based on PR request

* Further clean-up of clang and clang-tidy issues.

* Removing compiler specific pragmas from common c files.

* Fixing missing lexicon entry and uncrustify formatting changes.

* Resolving merge issue multiple defnitions of proto for prvIdleTask

* Fixing formatting issues that are not covered by uncrustify. Use clang-tidy instead if you want this level of control.

* More uncrustify formatting issues.

* Fixing extra bracket in #if statement.

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* POSIX port fixes (#626)

* Fix types in POSIX port

Use TaskFunction_t and StackType_t as other ports do.

* Fix portTICK_RATE_MICROSECONDS in POSIX port

---------

Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Cortex-M35P: Add Cortex-M35P port (#631)

* Cortex-M35P: Add Cortex-M35P port

The Cortex-M35P support added to kernel. The port hasn't been
validated yet with TF-M. Hence TF-M support is not included in this
port.

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>

* Add portNORETURN to the newly added portmacro.h

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>

* Introduced Github Status Badge for Unit Tests (#634)

* Introduced Github Status Badge for Unit Tests

* Github status badge to point to latest run

* Github status badge UT points to latest results

* Fixed URL for Github Status badge

---------

Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>

* Remove C99 requirement from CMake file (#633)

* Remove C99 requirement from CMake file

The kernel source is C89 compliant and does not need C99.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Explicitly set C89 requirement for kernel

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Add Thread Local Storage (TLS) support using Picolibc functions (#343)

* Pass top of stack to configINIT_TLS_BLOCK

Picolibc wants to allocate the per-task TLS block within the stack
segment, so it will need to modify the top of stack value. Pass the
pxTopOfStack variable to make this explicit.

Signed-off-by: Keith Packard <keithpac@amazon.com>

* Move newlib-specific definitions to separate file

This reduces the clutter in FreeRTOS.h caused by having newlib-specific
macros present there.

Signed-off-by: Keith Packard <keithpac@amazon.com>

* Make TLS code depend only on configUSE_C_RUNTIME_TLS_SUPPORT

Remove reference to configUSE_NEWLIB_REENTRANT as that only works
when using newlib. configUSE_C_RUNTIME_TLS_SUPPORT is always
set when configUSE_NEWLIB_REENTRANT is set, so using both was
redundant in that case.

Signed-off-by: Keith Packard <keithpac@amazon.com>

* portable-ARC: Adapt ARC support to use generalized TLS support

With generalized thread local storage (TLS) support present in the
core, the two ARC ports need to have the changes to the TCB mirrored
to them.

Signed-off-by: Keith Packard <keithpac@amazon.com>

* Add Thread Local Storage (TLS) support using Picolibc functions

This patch provides definitions of the general TLS support macros in
terms of the Picolibc TLS support functions.

Picolibc is normally configured to use TLS internally for all
variables that are intended to be task-local, so these changes are
necessary for picolibc to work correctly with FreeRTOS.

The picolibc helper functions rely on elements within the linker
script to arrange the TLS data in memory and define some symbols.
Applications wanting to use this mechanism will need changes in their
linker script when migrating to picolibc.

Signed-off-by: Keith Packard <keithpac@amazon.com>

---------

Signed-off-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Interrupt priority assert improvements for CM3/4/7 (#602)

* Interrupt priority assert improvements for CM3/4/7

In the ARM_CM3, ARM_CM4, and ARM_CM7 ports, change the assertion that
`configMAX_SYSCALL_INTERRUPT_PRIORITY` is nonzero to account for the
number of priority bits implemented by the hardware.

Change these ports to also use the lowest priority for PendSV and
SysTick, ignoring `configKERNEL_INTERRUPT_PRIORITY`.

* Remove not needed configKERNEL_INTERRUPT_PRIORITY define

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>

* Introduced code coverage status badge (#635)

* Introduced code coverage status badge

* Trying to fix the URL checker issue

* Fix URL check

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* added portPOINTER_SIZE_TYPE and SIZE_MAX definition to PIC24/dsPIC port (#636)

* added portPOINTER_SIZE_TYPE definition to PIC24/dsPIC port

* Added SIZE_MAX definition to PIC24/dsPIC33

* Fix TLS and stack alignment when using picolibc (#637)

Both the TLS block and stack must be correctly aligned when using
picolibc. The architecture stack alignment is represented by the
portBYTE_ALIGNMENT_MASK and the TLS block alignment is provided by the
Picolibc _tls_align() inline function for Picolibc version 1.8 and
above. For older versions of Picolibc, we'll assume that the TLS block
requires the same alignment as the stack.

For downward growing stacks, this requires aligning the start of the
TLS block to the maximum of the stack alignment and the TLS
alignment. With this, both the TLS block and stack will now be
correctly aligned.

For upward growing stacks, the two areas must be aligned
independently; the TLS block is aligned from the start of the stack,
then the tls space is allocated, and then the stack is aligned above
that.

It's probably useful to know here that the linker ensures that
variables within the TLS block are assigned offsets that match their
alignment requirements. If the TLS block itself is correctly aligned,
then everything within will also be.

I have only tested the downward growing stack branch of this patch.

Signed-off-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Enable building the GCC Cortex-R5 port without an FPU (#586)

* Ensure configUSE_TASK_FPU_SUPPORT option is set correctly

If one does enable the FPU of the Cortex-R5 processor, then the GCC
compiler will define the macro __ARM_FP. This can be used to ensure,
that the configUSE_TASK_FPU_SUPPORT is set accordingly.

* Enable the implementation of vPortTaskUsesFPU only if configUSE_TASK_FPU_SUPPORT is set to 1

* Remove error case in pxPortInitialiseStack

The case of configUSE_TASK_FPU_SUPPORT is 0 is now handled

* Enable access to FPU registers only if FPU is enabled

* Make minor formating changes

* Format ARM Cortex-R5 port

* Address review comments from @ChristosZosi

* Minor code review suggestions

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>

* Fix freertos_kernel cmake property, Posix Port (#640)

* Fix freertos_kernel cmake property, Posix Port

* Moves the `set_property()` call below the target definition in top level CMakeLists file
* Corrects billion value from `ULL` suffix (not C90 compliant) to `UL` suffix with cast to uint64_t

* Add blank line to CMakeLists.txt

* Add missing FreeRTOS+ defines

* Run kernel demos and unit tests for PR changes (#645)

* Run kernel demos and unit tests for PR changes

Kernel demos check builds multiple demos from FreeRTOS/FreeRTOS and
unit tests check runs unit tests in FreeRTOS/FreeRTOS. Both of these
checks currently use main branch of FreeRTOS-Kernel. This commits
updates these checks to use the changes in the PR.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Do not specify PR SHA explicitly as that is default

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Remove explicit PR SHA from kernel checks

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Add functions to get the buffers of statically created objects (#641)

Added various ...GetStaticBuffer() functions to get the buffers of statically
created objects.
---------
Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>

* Cortex-M Assert when NVIC implements 8 PRIO bits (#639)

* Cortex-M Assert when NVIC implements 8 PRIO bits

* Fix CM3 ports

* Fix ARM_CM3_MPU

* Fix ARM CM3

* Fix ARM_CM4_MPU

* Fix ARM_CM4

* Fix GCC ARM_CM7

* Fix IAR ARM ports

* Uncrustify changes

* Fix MikroC_ARM_CM4F port

* Fix MikroC_ARM_CM4F port-(2)

* Fix RVDS ARM ports

* Revert changes for Tasking/ARM_CM4F port

* Revert changes for Tasking/ARM_CM4F port-(2)

* Update port.c

Fix GCC/ARM_CM4F port

* Update port.c

* update GCC\ARM_CM4F port

* update port.c

* Assert to check configMAX_SYSCALL_INTERRUPT_PRIORITY is set to higher priority

* Fix merge error: remove duplicate code

* Fix typos

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal>

* Remove C90 requirement from CMakeLists (#649)

This is needed as it is breaking projects - https://forums.freertos.org/t/freertos-gcc-cmake/16984

We will re-evaluate and accordingly add this later.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Only add alignment padding when needed (#650)

Heap 4 and Heap 5 add some padding to ensure that the allocated blocks
are always aligned to portBYTE_ALIGNMENT bytes. The code until now was
adding padding always even if the resulting block was already aligned.
This commits updates the code to only add padding if the resulting block
is not aligned.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* add a missing comma (#651)

* fix conversion warning (#658)

FreeRTOS-Kernel/portable/GCC/ARM_CM4F/port.c:399:41: error: conversion from 'uint32_t' {aka 'long unsigned int'} to 'uint8_t' {aka 'unsigned char'} may change value [-Werror=conversion]

Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Keith Packard <keithpac@amazon.com>
Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com>
Co-authored-by: Archit Gupta <71798289+archigup@users.noreply.github.com>
Co-authored-by: tcpluess <tpluess@ieee.org>
Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Chris Copeland <chris@chrisnc.net>
Co-authored-by: David J. Fiddes <35607151+davefiddes@users.noreply.github.com>
Co-authored-by: Dusan Cervenka <cervenka@acrios.com>
Co-authored-by: bbain <16752579+bbain@users.noreply.github.com>
Co-authored-by: Ju1He1 <93189163+Ju1He1@users.noreply.github.com>
Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com>
Co-authored-by: phelter <paulheltera@gmail.com>
Co-authored-by: jacky309 <jacques.guillou@gmail.com>
Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com>
Co-authored-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com>
Co-authored-by: Keith Packard <keithp@keithp.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com>
Co-authored-by: Kody Stribrny <89810515+kstribrnAmzn@users.noreply.github.com>
Co-authored-by: Holden <holden-zenithaerotech.com>
Co-authored-by: Darian <32921628+Dazza0@users.noreply.github.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal>
Co-authored-by: Nicolas <nicolas.brunner@heig-vd.ch>
Co-authored-by: Vo Trung Chi <chi.votrung@vn.bosch.com>

* Not yield for running task in prvYieldForTask (#72)

* Raise priority of a running task should not alter other cores

* Remove unreachable code in prvSelectHighestPriorityTask (#70)

* Remove unreachable code in prvSelectHighestPriorityTask

* Remove unreachable assert condition

* Update comment

* Move static idle task memory to global scope (#75)

* Update XMOS AICORE conflict (#77)

* Define portBASE_TYPE in XMOS AICORE porting

* Update enter critical from ISR API

* Fix run time stats for SMP (#76)

* Update get idle tasks stats

* Fix get task stats

* Fix missing configNUM_CORES

* Update the uxSchedulerSuspended after prvCheckForRunStateChange (#62)

* Update the uxSchedulerSuspended after the prvCheckForRunStateChange to
  prevent race condition in fromISR APIs

* Fix SMP dev branch CI errors (#79)

* Fix uncrustify

* Update lexicon

* Remove tailing space

* Ignore XMOS AICORE header check

* Fix ulTotalRunTime and ulTaskSwitchedInTime (#80)

* SMP has multiple ulTotalRunTime and ulTaskSwitchedInTime

* Smp dev compelete merge main 20230424 (#78)

* Fix array-bounds compiler warning on gcc11+ in list.h (#580)

listGET_OWNER_OF_NEXT_ENTRY computes `( pxConstList )->pxIndex->pxNext` after
verifying that `( pxConstList )->pxIndex` points to `xListEnd`, which due to
being a MiniListItem_t, can be shorter than a ListItem_t. Thus,
`( pxConstList )->pxIndex` is a `ListItem_t *` that extends past the end of the
`List_t` whose `xListEnd` it points to. This is fixed by accessing `pxNext`
through a `MiniListItem_t` instead.

* move the prototype for vApplicationIdleHook to task.h. (#600)

Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Update equal priority task preemption (#603)

* vTaskResume and vTaskPrioritySet don't preempt equal priority task

* Update vTaskResumeAll not to preempt task with equal priority

* Fix in xTaskResumeFromISR

* Update FreeRTOS/FreeRTOS build checks (#613)

This is needed to be compatible with the refactoring done in this
PR - https://github.com/FreeRTOS/FreeRTOS/pull/889

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Add ulTaskGetRunTimeCounter and ulTaskGetRunTimePercent (#611)

Allow ulTaskGetIdleRunTimeCounter and ulTaskGetIdleRunTimePercent to be
used whenever configGENERATE_RUN_TIME_STATS is enabled, as this is the
only requirement for these functions to work.

* Fix some CMake documentation typos (#616)

The quick start instructions for CMake mention the "master"
git branch which has been replaced by "main" in the current
repo.

The main CMakeLists.txt documents how to integrate a
custom port. Fix a typo in the suggested CMake code.

* Added support of 64bit events. (#597)

* Added support of 64bit even

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Added missing brackets

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Made proper name for tick macro.

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Improved macro evaluation

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Fixed missed port files  + documentation

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Changes made on PR

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Fix macro definition.

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Formatted code with uncrustify

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

---------

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Introduce portMEMORY_BARRIER for Microblaze port. (#621)

The introduction of `portMEMORY_BARRIER` will ensure
the places in the kernel use a barrier will work.
For example, `xTaskResumeAll` has a memory barrier
to ensure its correctness when compiled with optimization
enabled. Without the barrier `xTaskResumeAll` can fail
(e.g. start reading and writing to address 0 and/or
infinite looping) when `xPendingReadyList` contains more
than one task to restore.

In `xTaskResumeAll` the compiler chooses to cache the
`pxTCB` the first time through the loop for use
in every subsequent loop. This is incorrect as the
removal of `pxTCB->xEventListItem` will actually
change the value of `pxTCB` if it was read again
at the top of the loop. The barrier forces the compiler
to read `pxTCB` again at the top of the loop.

The compiler is operating correctly. The removal
`pxTCB->xEventListItem` executes on a `List_t *`
and `ListItem_t *`.  This means that the compiler
can assume that any `MiniListItem_t` values are
unchanged by the loop (i.e. "strict-aliasing").
This allows the compiler to cache `pxTCB` as it
is obtained via a `MiniListItem_t`. This is incorrect
in this case because it is possible for a `ListItem_t *`
to actually alias a `MiniListItem_t`. This is technically
a "violation of aliasing rules" so we use the the barrier
to disable the strict-aliasing optimization in this loop.

* Do not call exit() on MSVC Port when calling vPortEndScheduler (#624)

* make port exitable

* correctly set xPortRunning to False

* add suggestions from Review

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* add suggestions from Review

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Update PR template to include checkbox for Unit Test related changes (#627)

* Fix build failure introduced in PR #597 (#629)

The PR #597 introduced a new config option configTICK_TYPE_WIDTH_IN_BITS
which can be defined to one of the following:
* TICK_TYPE_WIDTH_16_BITS - Tick type is 16 bit wide.
* TICK_TYPE_WIDTH_32_BITS - Tick type is 32 bit wide.
* TICK_TYPE_WIDTH_64_BITS - Tick type is 64 bit wide.

Earlier we supported 16 and 32 bit width for tick type which was
controlled using the config option configUSE_16_BIT_TICKS. The PR
tried to maintain backward compatibility by honoring
configUSE_16_BIT_TICKS. The backward compatibility did not work as
expected though, as the macro configTICK_TYPE_WIDTH_IN_BITS was used
before it was defined. This PR addresses it by ensuring that the macro
configTICK_TYPE_WIDTH_IN_BITS is defined before it is used.

Testing
1. configUSE_16_BIT_TICKS is defined to 0.

Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```

Assembly:
```
109e:       4b50            ldr     r3, [pc, #320]  ; (11e0 <xTaskIncrementTick+0x150>)
10a0:       f8d3 4134       ldr.w   r4, [r3, #308]  ; 0x134
10a4:       3401            adds    r4, #1
10a6:       f8c3 4134       str.w   r4, [r3, #308]  ; 0x134
```

It is clear from assembly that the tick type is 32 bit.

2. configUSE_16_BIT_TICKS is defined to 1.

Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```

Assembly:
```
10e2:       4b53            ldr     r3, [pc, #332]  ; (1230 <xTaskIncrementTick+0x15c>)
10e4:       f8b3 4134       ldrh.w  r4, [r3, #308]  ; 0x134
10e8:       b2a4            uxth    r4, r4
10ea:       3401            adds    r4, #1
10ec:       b2a4            uxth    r4, r4
10ee:       f8a3 4134       strh.w  r4, [r3, #308]  ; 0x134
```

It is clear from assembly that the tick type is 16 bit.

3. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_16_BITS.

Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```

Assembly:
```
10e2:       4b53            ldr     r3, [pc, #332]  ; (1230 <xTaskIncrementTick+0x15c>)
10e4:       f8b3 4134       ldrh.w  r4, [r3, #308]  ; 0x134
10e8:       b2a4            uxth    r4, r4
10ea:       3401            adds    r4, #1
10ec:       b2a4            uxth    r4, r4
10ee:       f8a3 4134       strh.w  r4, [r3, #308]  ; 0x134
```

It is clear from assembly that the tick type is 16 bit.

4. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_32_BITS.

Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```

Assembly:
```
109e:       4b50            ldr     r3, [pc, #320]  ; (11e0 <xTaskIncrementTick+0x150>)
10a0:       f8d3 4134       ldr.w   r4, [r3, #308]  ; 0x134
10a4:       3401            adds    r4, #1
10a6:       f8c3 4134       str.w   r4, [r3, #308]  ; 0x134
```

It is clear from assembly that the tick type is 32 bit.

5. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_64_BITS.

```
 #error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
```

The testing was done for GCC/ARM_CM3 port which does not support 64 bit
tick type.

6. Neither configUSE_16_BIT_TICKS nor configTICK_TYPE_WIDTH_IN_BITS
defined.

```
 #error Missing definition:  One of configUSE_16_BIT_TICKS and
 configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h.
 See the Configuration section of the FreeRTOS API documentation for
 details.
```

7. Both configUSE_16_BIT_TICKS and configTICK_TYPE_WIDTH_IN_BITS defined.

```
 #error Only one of configUSE_16_BIT_TICKS and
 configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h.
 See the Configuration section of the FreeRTOS API documentation for
 details.
```

Related issue - https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/628

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Feature/fixing clang gnu compiler warnings (#620)

* Adding in ability to support a library for freertos_config and a custom freertos_kernel_port (#558)

* Using single name definition for libraries everywhere. (#558)

* Supporting backwards compatibility with FREERTOS_CONFIG_FILE_DIRECTORY (#571)

* Removing compiler warnings for GNU and Clang. (#571)

* Added in documentation on how to consume from a main project. Added default PORT selection for native POSIX and MINGW platforms.

* Only adding freertos_config if it exists. Removing auto generation of it from a FREERTOS_CONFIG_FILE_DIRECTORY.

* Fixing clang and gnu compiler warnings.

* Adding in project information and how to compile for GNU/clang

* Fixing compiler issue with unused variable - no need to declare variable.

* Adding in compile warnings for linux builds that kernel is okay with using.

* Fixing more extra-semi-stmt clang warnings.

* Moving definition of hooks into header files if features are enabled.

* Fixing formatting with uncrustify.

* Fixing merge conflicts with main merge.

* Fixing compiler errors due to merge issues and formatting.

* Fixing Line feeds.

* Adding 'portNORETURN' into portmacros.h. Other Updates based on PR request

* Further clean-up of clang and clang-tidy issues.

* Removing compiler specific pragmas from common c files.

* Fixing missing lexicon entry and uncrustify formatting changes.

* Resolving merge issue multiple defnitions of proto for prvIdleTask

* Fixing formatting issues that are not covered by uncrustify. Use clang-tidy instead if you want this level of control.

* More uncrustify formatting issues.

* Fixing extra bracket in #if statement.

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* POSIX port fixes (#626)

* Fix types in POSIX port

Use TaskFunction_t and StackType_t as other ports do.

* Fix portTICK_RATE_MICROSECONDS in POSIX port

---------

Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Cortex-M35P: Add Cortex-M35P port (#631)

* Cortex-M35P: Add Cortex-M35P port

The Cortex-M35P support added to kernel. The port hasn't been
validated yet with TF-M. Hence TF-M support is not included in this
port.

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>

* Add portNORETURN to the newly added portmacro.h

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>

* Introduced Github Status Badge for Unit Tests (#634)

* Introduced Github Status Badge for Unit Tests

* Github status badge to point to latest run

* Github status badge UT points to latest results

* Fixed URL for Github Status badge

---------

Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>

* Remove C99 requirement from CMake file (#633)

* Remove C99 requirement from CMake file

The kernel source is C89 compliant and does not need C99.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Explicitly set C89 requirement for kernel

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Add Thread Local Storage (TLS) support using Picolibc functions (#343)

* Pass top of stack to configINIT_TLS_BLOCK

Picolibc wants to allocate the per-task TLS block within the stack
segment, so it will need to modify the top of stack value. Pass the
pxTopOfStack variable to make this explicit.

Signed-off-by: Keith Packard <keithpac@amazon.com>

* Move newlib-specific definitions to separate file

This reduces the clutter in FreeRTOS.h caused by having newlib-specific
macros present there.

Signed-off-by: Keith Packard <keithpac@amazon.com>

* Make TLS code depend only on configUSE_C_RUNTIME_TLS_SUPPORT

Remove reference to configUSE_NEWLIB_REENTRANT as that only works
when using newlib. configUSE_C_RUNTIME_TLS_SUPPORT is always
set when configUSE_NEWLIB_REENTRANT is set, so using both was
redundant in that case.

Signed-off-by: Keith Packard <keithpac@amazon.com>

* portable-ARC: Adapt ARC support to use generalized TLS support

With generalized thread local storage (TLS) support present in the
core, the two ARC ports need to have the changes to the TCB mirrored
to them.

Signed-off-by: Keith Packard <keithpac@amazon.com>

* Add Thread Local Storage (TLS) support using Picolibc functions

This patch provides definitions of the general TLS support macros in
terms of the Picolibc TLS support functions.

Picolibc is normally configured to use TLS internally for all
variables that are intended to be task-local, so these changes are
necessary for picolibc to work correctly with FreeRTOS.

The picolibc helper functions rely on elements within the linker
script to arrange the TLS data in memory and define some symbols.
Applications wanting to use this mechanism will need changes in their
linker script when migrating to picolibc.

Signed-off-by: Keith Packard <keithpac@amazon.com>

---------

Signed-off-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Interrupt priority assert improvements for CM3/4/7 (#602)

* Interrupt priority assert improvements for CM3/4/7

In the ARM_CM3, ARM_CM4, and ARM_CM7 ports, change the assertion that
`configMAX_SYSCALL_INTERRUPT_PRIORITY` is nonzero to account for the
number of priority bits implemented by the hardware.

Change these ports to also use the lowest priority for PendSV and
SysTick, ignoring `configKERNEL_INTERRUPT_PRIORITY`.

* Remove not needed configKERNEL_INTERRUPT_PRIORITY define

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>

* Introduced code coverage status badge (#635)

* Introduced code coverage status badge

* Trying to fix the URL checker issue

* Fix URL check

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* added portPOINTER_SIZE_TYPE and SIZE_MAX definition to PIC24/dsPIC port (#636)

* added portPOINTER_SIZE_TYPE definition to PIC24/dsPIC port

* Added SIZE_MAX definition to PIC24/dsPIC33

* Fix TLS and stack alignment when using picolibc (#637)

Both the TLS block and stack must be correctly aligned when using
picolibc. The architecture stack alignment is represented by the
portBYTE_ALIGNMENT_MASK and the TLS block alignment is provided by the
Picolibc _tls_align() inline function for Picolibc version 1.8 and
above. For older versions of Picolibc, we'll assume that the TLS block
requires the same alignment as the stack.

For downward growing stacks, this requires aligning the start of the
TLS block to the maximum of the stack alignment and the TLS
alignment. With this, both the TLS block and stack will now be
correctly aligned.

For upward growing stacks, the two areas must be aligned
independently; the TLS block is aligned from the start of the stack,
then the tls space is allocated, and then the stack is aligned above
that.

It's probably useful to know here that the linker ensures that
variables within the TLS block are assigned offsets that match their
alignment requirements. If the TLS block itself is correctly aligned,
then everything within will also be.

I have only tested the downward growing stack branch of this patch.

Signed-off-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Enable building the GCC Cortex-R5 port without an FPU (#586)

* Ensure configUSE_TASK_FPU_SUPPORT option is set correctly

If one does enable the FPU of the Cortex-R5 processor, then the GCC
compiler will define the macro __ARM_FP. This can be used to ensure,
that the configUSE_TASK_FPU_SUPPORT is set accordingly.

* Enable the implementation of vPortTaskUsesFPU only if configUSE_TASK_FPU_SUPPORT is set to 1

* Remove error case in pxPortInitialiseStack

The case of configUSE_TASK_FPU_SUPPORT is 0 is now handled

* Enable access to FPU registers only if FPU is enabled

* Make minor formating changes

* Format ARM Cortex-R5 port

* Address review comments from @ChristosZosi

* Minor code review suggestions

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>

* Fix freertos_kernel cmake property, Posix Port (#640)

* Fix freertos_kernel cmake property, Posix Port

* Moves the `set_property()` call below the target definition in top level CMakeLists file
* Corrects billion value from `ULL` suffix (not C90 compliant) to `UL` suffix with cast to uint64_t

* Add blank line to CMakeLists.txt

* Add missing FreeRTOS+ defines

* Run kernel demos and unit tests for PR changes (#645)

* Run kernel demos and unit tests for PR changes

Kernel demos check builds multiple demos from FreeRTOS/FreeRTOS and
unit tests check runs unit tests in FreeRTOS/FreeRTOS. Both of these
checks currently use main branch of FreeRTOS-Kernel. This commits
updates these checks to use the changes in the PR.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Do not specify PR SHA explicitly as that is default

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Remove explicit PR SHA from kernel checks

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Add functions to get the buffers of statically created objects (#641)

Added various ...GetStaticBuffer() functions to get the buffers of statically
created objects.
---------
Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>

* Cortex-M Assert when NVIC implements 8 PRIO bits (#639)

* Cortex-M Assert when NVIC implements 8 PRIO bits

* Fix CM3 ports

* Fix ARM_CM3_MPU

* Fix ARM CM3

* Fix ARM_CM4_MPU

* Fix ARM_CM4

* Fix GCC ARM_CM7

* Fix IAR ARM ports

* Uncrustify changes

* Fix MikroC_ARM_CM4F port

* Fix MikroC_ARM_CM4F port-(2)

* Fix RVDS ARM ports

* Revert changes for Tasking/ARM_CM4F port

* Revert changes for Tasking/ARM_CM4F port-(2)

* Update port.c

Fix GCC/ARM_CM4F port

* Update port.c

* update GCC\ARM_CM4F port

* update port.c

* Assert to check configMAX_SYSCALL_INTERRUPT_PRIORITY is set to higher priority

* Fix merge error: remove duplicate code

* Fix typos

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal>

* Remove C90 requirement from CMakeLists (#649)

This is needed as it is breaking projects - https://forums.freertos.org/t/freertos-gcc-cmake/16984

We will re-evaluate and accordingly add this later.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Only add alignment padding when needed (#650)

Heap 4 and Heap 5 add some padding to ensure that the allocated blocks
are always aligned to portBYTE_ALIGNMENT bytes. The code until now was
adding padding always even if the resulting block was already aligned.
This commits updates the code to only add padding if the resulting block
is not aligned.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* add a missing comma (#651)

* fix conversion warning (#658)

FreeRTOS-Kernel/portable/GCC/ARM_CM4F/port.c:399:41: error: conversion from 'uint32_t' {aka 'long unsigned int'} to 'uint8_t' {aka 'unsigned char'} may change value [-Werror=conversion]

Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com>

* ARMv7M: Adjust implemented priority bit assertions (#665)

Adjust assertions related to the CMSIS __NVIC_PRIO_BITS and FreeRTOS
configPRIO_BITS configuration macros such that these macros specify the
minimum number of implemented priority bits supported by a config
build rather than the exact number of implemented priority bits.

Related to Qemu issue #1122

* Format portmacro.h in arm CM0 ports

* portable/ARM_CM0: Add xPortIsInsideInterrupt

Add missing xPortIsInsideInterrupt function to Cortex-M0 port.

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Keith Packard <keithpac@amazon.com>
Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com>
Co-authored-by: Archit Gupta <71798289+archigup@users.noreply.github.com>
Co-authored-by: tcpluess <tpluess@ieee.org>
Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Chris Copeland <chris@chrisnc.net>
Co-authored-by: David J. Fiddes <35607151+davefiddes@users.noreply.github.com>
Co-authored-by: Dusan Cervenka <cervenka@acrios.com>
Co-authored-by: bbain <16752579+bbain@users.noreply.github.com>
Co-authored-by: Ju1He1 <93189163+Ju1He1@users.noreply.github.com>
Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com>
Co-authored-by: phelter <paulheltera@gmail.com>
Co-authored-by: jacky309 <jacques.guillou@gmail.com>
Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com>
Co-authored-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com>
Co-authored-by: Keith Packard <keithp@keithp.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com>
Co-authored-by: Kody Stribrny <89810515+kstribrnAmzn@users.noreply.github.com>
Co-authored-by: Holden <holden-zenithaerotech.com>
Co-authored-by: Darian <32921628+Dazza0@users.noreply.github.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal>
Co-authored-by: Nicolas <nicolas.brunner@heig-vd.ch>
Co-authored-by: Vo Trung Chi <chi.votrung@vn.bosch.com>

* Update coverity violation for SMP (#81)

* Update coverity violation for SMP ( code surrounded by configNUMBER_OF_CORES > 1 ).
* Single core and common code are still scanned by lint tool.

* Smp dev merge main 0527 (#82)

* Fix array-bounds compiler warning on gcc11+ in list.h (#580)

listGET_OWNER_OF_NEXT_ENTRY computes `( pxConstList )->pxIndex->pxNext` after
verifying that `( pxConstList )->pxIndex` points to `xListEnd`, which due to
being a MiniListItem_t, can be shorter than a ListItem_t. Thus,
`( pxConstList )->pxIndex` is a `ListItem_t *` that extends past the end of the
`List_t` whose `xListEnd` it points to. This is fixed by accessing `pxNext`
through a `MiniListItem_t` instead.

* move the prototype for vApplicationIdleHook to task.h. (#600)

Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Update equal priority task preemption (#603)

* vTaskResume and vTaskPrioritySet don't preempt equal priority task

* Update vTaskResumeAll not to preempt task with equal priority

* Fix in xTaskResumeFromISR

* Update FreeRTOS/FreeRTOS build checks (#613)

This is needed to be compatible with the refactoring done in this
PR - https://github.com/FreeRTOS/FreeRTOS/pull/889

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Add ulTaskGetRunTimeCounter and ulTaskGetRunTimePercent (#611)

Allow ulTaskGetIdleRunTimeCounter and ulTaskGetIdleRunTimePercent to be
used whenever configGENERATE_RUN_TIME_STATS is enabled, as this is the
only requirement for these functions to work.

* Fix some CMake documentation typos (#616)

The quick start instructions for CMake mention the "master"
git branch which has been replaced by "main" in the current
repo.

The main CMakeLists.txt documents how to integrate a
custom port. Fix a typo in the suggested CMake code.

* Added support of 64bit events. (#597)

* Added support of 64bit even

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Added missing brackets

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Made proper name for tick macro.

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Improved macro evaluation

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Fixed missed port files  + documentation

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Changes made on PR

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Fix macro definition.

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Formatted code with uncrustify

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

---------

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Introduce portMEMORY_BARRIER for Microblaze port. (#621)

The introduction of `portMEMORY_BARRIER` will ensure
the places in the kernel use a barrier will work.
For example, `xTaskResumeAll` has a memory barrier
to ensure its correctness when compiled with optimization
enabled. Without the barrier `xTaskResumeAll` can fail
(e.g. start reading and writing to address 0 and/or
infinite looping) when `xPendingReadyList` contains more
than one task to restore.

In `xTaskResumeAll` the compiler chooses to cache the
`pxTCB` the first time through the loop for use
in every subsequent loop. This is incorrect as the
removal of `pxTCB->xEventListItem` will actually
change the value of `pxTCB` if it was read again
at the top of the loop. The barrier forces the compiler
to read `pxTCB` again at the top of the loop.

The compiler is operating correctly. The removal
`pxTCB->xEventListItem` executes on a `List_t *`
and `ListItem_t *`.  This means that the compiler
can assume that any `MiniListItem_t` values are
unchanged by the loop (i.e. "strict-aliasing").
This allows the compiler to cache `pxTCB` as it
is obtained via a `MiniListItem_t`. This is incorrect
in this case because it is possible for a `ListItem_t *`
to actually alias a `MiniListItem_t`. This is technically
a "violation of aliasing rules" so we use the the barrier
to disable the strict-aliasing optimization in this loop.

* Do not call exit() on MSVC Port when calling vPortEndScheduler (#624)

* make port exitable

* correctly set xPortRunning to False

* add suggestions from Review

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* add suggestions from Review

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Update PR template to include checkbox for Unit Test related changes (#627)

* Fix build failure introduced in PR #597 (#629)

The PR #597 introduced a new config option configTICK_TYPE_WIDTH_IN_BITS
which can be defined to one of the following:
* TICK_TYPE_WIDTH_16_BITS - Tick type is 16 bit wide.
* TICK_TYPE_WIDTH_32_BITS - Tick type is 32 bit wide.
* TICK_TYPE_WIDTH_64_BITS - Tick type is 64 bit wide.

Earlier we supported 16 and 32 bit width for tick type which was
controlled using the config option configUSE_16_BIT_TICKS. The PR
tried to maintain backward compatibility by honoring
configUSE_16_BIT_TICKS. The backward compatibility did not work as
expected though, as the macro configTICK_TYPE_WIDTH_IN_BITS was used
before it was defined. This PR addresses it by ensuring that the macro
configTICK_TYPE_WIDTH_IN_BITS is defined before it is used.

Testing
1. configUSE_16_BIT_TICKS is defined to 0.

Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```

Assembly:
```
109e:       4b50            ldr     r3, [pc, #320]  ; (11e0 <xTaskIncrementTick+0x150>)
10a0:       f8d3 4134       ldr.w   r4, [r3, #308]  ; 0x134
10a4:       3401            adds    r4, #1
10a6:       f8c3 4134       str.w   r4, [r3, #308]  ; 0x134
```

It is clear from assembly that the tick type is 32 bit.

2. configUSE_16_BIT_TICKS is defined to 1.

Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```

Assembly:
```
10e2:       4b53            ldr     r3, [pc, #332]  ; (1230 <xTaskIncrementTick+0x15c>)
10e4:       f8b3 4134       ldrh.w  r4, [r3, #308]  ; 0x134
10e8:       b2a4            uxth    r4, r4
10ea:       3401            adds    r4, #1
10ec:       b2a4            uxth    r4, r4
10ee:       f8a3 4134       strh.w  r4, [r3, #308]  ; 0x134
```

It is clear from assembly that the tick type is 16 bit.

3. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_16_BITS.

Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```

Assembly:
```
10e2:       4b53            ldr     r3, [pc, #332]  ; (1230 <xTaskIncrementTick+0x15c>)
10e4:       f8b3 4134       ldrh.w  r4, [r3, #308]  ; 0x134
10e8:       b2a4            uxth    r4, r4
10ea:       3401            adds    r4, #1
10ec:       b2a4            uxth    r4, r4
10ee:       f8a3 4134       strh.w  r4, [r3, #308]  ; 0x134
```

It is clear from assembly that the tick type is 16 bit.

4. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_32_BITS.

Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```

Assembly:
```
109e:       4b50            ldr     r3, [pc, #320]  ; (11e0 <xTaskIncrementTick+0x150>)
10a0:       f8d3 4134       ldr.w   r4, [r3, #308]  ; 0x134
10a4:       3401            adds    r4, #1
10a6:       f8c3 4134       str.w   r4, [r3, #308]  ; 0x134
```

It is clear from assembly that the tick type is 32 bit.

5. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_64_BITS.

```
 #error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
```

The testing was done for GCC/ARM_CM3 port which does not support 64 bit
tick type.

6. Neither configUSE_16_BIT_TICKS nor configTICK_TYPE_WIDTH_IN_BITS
defined.

```
 #error Missing definition:  One of configUSE_16_BIT_TICKS and
 configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h.
 See the Configuration section of the FreeRTOS API documentation for
 details.
```

7. Both configUSE_16_BIT_TICKS and configTICK_TYPE_WIDTH_IN_BITS defined.

```
 #error Only one of configUSE_16_BIT_TICKS and
 configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h.
 See the Configuration section of the FreeRTOS API documentation for
 details.
```

Related issue - https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/628

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Feature/fixing clang gnu compiler warnings (#620)

* Adding in ability to support a library for freertos_config and a custom freertos_kernel_port (#558)

* Using single name definition for libraries everywhere. (#558)

* Supporting backwards compatibility with FREERTOS_CONFIG_FILE_DIRECTORY (#571)

* Removing compiler warnings for GNU and Clang. (#571)

* Added in documentation on how to consume from a main project. Added default PORT selection for native POSIX and MINGW platforms.

* Only adding freertos_config if it exists. Removing auto generation of it from a FREERTOS_CONFIG_FILE_DIRECTORY.

* Fixing clang and gnu compiler warnings.

* Adding in project information and how to compile for GNU/clang

* Fixing compiler issue with unused variable - no need to declare variable.

* Adding in compile warnings for linux builds that kernel is okay with using.

* Fixing more extra-semi-stmt clang warnings.

* Moving definition of hooks into header files if features are enabled.

* Fixing formatting with uncrustify.

* Fixing merge conflicts with main merge.

* Fixing compiler errors due to merge issues and formatting.

* Fixing Line feeds.

* Adding 'portNORETURN' into portmacros.h. Other Updates based on PR request

* Further clean-up of clang and clang-tidy issues.

* Removing compiler specific pragmas from common c files.

* Fixing missing lexicon entry and uncrustify formatting changes.

* Resolving merge issue multiple defnitions of proto for prvIdleTask

* Fixing formatting issues that are not covered by uncrustify. Use clang-tidy instead if you want this level of control.

* More uncrustify formatting issues.

* Fixing extra bracket in #if statement.

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* POSIX port fixes (#626)

* Fix types in POSIX port

Use TaskFunction_t and StackType_t as other ports do.

* Fix portTICK_RATE_MICROSECONDS in POSIX port

---------

Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Cortex-M35P: Add Cortex-M35P port (#631)

* Cortex-M35P: Add Cortex-M35P port

The Cortex-M35P support added to kernel. The port hasn't been
validated yet with TF-M. Hence TF-M support is not included in this
port.

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>

* Add portNORETURN to the newly added portmacro.h

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>

* Introduced Github Status Badge for Unit Tests (#634)

* Introduced Github Status Badge for Unit Tests

* Github status badge to point to latest run

* Github status badge UT points to latest results

* Fixed URL for Github Status badge

---------

Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>

* Remove C99 requirement from CMake file (#633)

* Remove C99 requirement from CMake file

The kernel source is C89 compliant and does not need C99.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Explicitly set C89 requirement for kernel

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Add Thread Local Storage (TLS) support using Picolibc functions (#343)

* Pass top of stack to configINIT_TLS_BLOCK

Picolibc wants to allocate the per-task TLS block within the stack
segment, so it will need to modify the top of stack value. Pass the
pxTopOfStack variable to make this explicit.

Signed-off-by: Keith Packard <keithpac@amazon.com>

* Move newlib-specific definitions to separate file

This reduces the clutter in FreeRTOS.h caused by having newlib-specific
macros present there.

Signed-off-by: Keith Packard <keithpac@amazon.com>

* Make TLS code depend only on configUSE_C_RUNTIME_TLS_SUPPORT

Remove reference to configUSE_NEWLIB_REENTRANT as that only works
when using newlib. configUSE_C_RUNTIME_TLS_SUPPORT is always
set when configUSE_NEWLIB_REENTRANT is set, so using both was
redundant in that case.

Signed-off-by: Keith Packard <keithpac@amazon.com>

* portable-ARC: Adapt ARC support to use generalized TLS support

With generalized thread local storage (TLS) support present in the
core, the two ARC ports need to have the changes to the TCB mirrored
to them.

Signed-off-by: Keith Packard <keithpac@amazon.com>

* Add Thread Local Storage (TLS) support using Picolibc functions

This patch provides definitions of the general TLS support macros in
terms of the Picolibc TLS support functions.

Picolibc is normally configured to use TLS internally for all
variables that are intended to be task-local, so these changes are
necessary for picolibc to work correctly with FreeRTOS.

The picolibc helper functions rely on elements within the linker
script to arrange the TLS data in memory and define some symbols.
Applications wanting to use this mechanism will need changes in their
linker script when migrating to picolibc.

Signed-off-by: Keith Packard <keithpac@amazon.com>

---------

Signed-off-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Interrupt priority assert improvements for CM3/4/7 (#602)

* Interrupt priority assert improvements for CM3/4/7

In the ARM_CM3, ARM_CM4, and ARM_CM7 ports, change the assertion that
`configMAX_SYSCALL_INTERRUPT_PRIORITY` is nonzero to account for the
number of priority bits implemented by the hardware.

Change these ports to also use the lowest priority for PendSV and
SysTick, ignoring `configKERNEL_INTERRUPT_PRIORITY`.

* Remove not needed configKERNEL_INTERRUPT_PRIORITY define

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>

* Introduced code coverage status badge (#635)

* Introduced code coverage status badge

* Trying to fix the URL checker issue

* Fix URL check

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* added portPOINTER_SIZE_TYPE and SIZE_MAX definition to PIC24/dsPIC port (#636)

* added portPOINTER_SIZE_TYPE definition to PIC24/dsPIC port

* Added SIZE_MAX definition to PIC24/dsPIC33

* Fix TLS and stack alignment when using picolibc (#637)

Both the TLS block and stack must be correctly aligned when using
picolibc. The architecture stack alignment is represented by the
portBYTE_ALIGNMENT_MASK and the TLS block alignment is provided by the
Picolibc _tls_align() inline function for Picolibc version 1.8 and
above. For older versions of Picolibc, we'll assume that the TLS block
requires the same alignment as the stack.

For downward growing stacks, this requires aligning the start of the
TLS block to the maximum of the stack alignment and the TLS
alignment. With this, both the TLS block and stack will now be
correctly aligned.

For upward growing stacks, the two areas must be aligned
independently; the TLS block is aligned from the start of the stack,
then the tls space is allocated, and then the stack is aligned above
that.

It's probably useful to know here that the linker ensures that
variables within the TLS block are assigned offsets that match their
alignment requirements. If the TLS block itself is correctly aligned,
then everything within will also be.

I have only tested the downward growing stack branch of this patch.

Signed-off-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Enable building the GCC Cortex-R5 port without an FPU (#586)

* Ensure configUSE_TASK_FPU_SUPPORT option is set correctly

If one does enable the FPU of the Cortex-R5 processor, then the GCC
compiler will define the macro __ARM_FP. This can be used to ensure,
that the configUSE_TASK_FPU_SUPPORT is set accordingly.

* Enable the implementation of vPortTaskUsesFPU only if configUSE_TASK_FPU_SUPPORT is set to 1

* Remove error case in pxPortInitialiseStack

The case of configUSE_TASK_FPU_SUPPORT is 0 is now handled

* Enable access to FPU registers only if FPU is enabled

* Make minor formating changes

* Format ARM Cortex-R5 port

* Address review comments from @ChristosZosi

* Minor code review suggestions

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>

* Fix freertos_kernel cmake property, Posix Port (#640)

* Fix freertos_kernel cmake property, Posix Port

* Moves the `set_property()` call below the target definition in top level CMakeLists file
* Corrects billion value from `ULL` suffix (not C90 compliant) to `UL` suffix with cast to uint64_t

* Add blank line to CMakeLists.txt

* Add missing FreeRTOS+ defines

* Run kernel demos and unit tests for PR changes (#645)

* Run kernel demos and unit tests for PR changes

Kernel demos check builds multiple demos from FreeRTOS/FreeRTOS and
unit tests check runs unit tests in FreeRTOS/FreeRTOS. Both of these
checks currently use main branch of FreeRTOS-Kernel. This commits
updates these checks to use the changes in the PR.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Do not specify PR SHA explicitly as that is default

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Remove explicit PR SHA from kernel checks

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Add functions to get the buffers of statically created objects (#641)

Added various ...GetStaticBuffer() functions to get the buffers of statically
created objects.
---------
Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>

* Cortex-M Assert when NVIC implements 8 PRIO bits (#639)

* Cortex-M Assert when NVIC implements 8 PRIO bits

* Fix CM3 ports

* Fix ARM_CM3_MPU

* Fix ARM CM3

* Fix ARM_CM4_MPU

* Fix ARM_CM4

* Fix GCC ARM_CM7

* Fix IAR ARM ports

* Uncrustify changes

* Fix MikroC_ARM_CM4F port

* Fix MikroC_ARM_CM4F port-(2)

* Fix RVDS ARM ports

* Revert changes for Tasking/ARM_CM4F port

* Revert changes for Tasking/ARM_CM4F port-(2)

* Update port.c

Fix GCC/ARM_CM4F port

* Update port.c

* update GCC\ARM_CM4F port

* update port.c

* Assert to check configMAX_SYSCALL_INTERRUPT_PRIORITY is set to higher priority

* Fix merge error: remove duplicate code

* Fix typos

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal>

* Remove C90 requirement from CMakeLists (#649)

This is needed as it is breaking projects - https://forums.freertos.org/t/freertos-gcc-cmake/16984

We will re-evaluate and accordingly add this later.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Only add alignment padding when needed (#650)

Heap 4 and Heap 5 add some padding to ensure that the allocated blocks
are always aligned to portBYTE_ALIGNMENT bytes. The code until now was
adding padding always even if the resulting block was already aligned.
This commits updates the code to only add padding if the resulting block
is not aligned.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* add a missing comma (#651)

* fix conversion warning (#658)

FreeRTOS-Kernel/portable/GCC/ARM_CM4F/port.c:399:41: error: conversion from 'uint32_t' {aka 'long unsigned int'} to 'uint8_t' {aka 'unsigned char'} may change value [-Werror=conversion]

Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com>

* ARMv7M: Adjust implemented priority bit assertions (#665)

Adjust assertions related to the CMSIS __NVIC_PRIO_BITS and FreeRTOS
configPRIO_BITS configuration macros such that these macros specify the
minimum number of implemented priority bits supported by a config
build rather than the exact number of implemented priority bits.

Related to Qemu issue #1122

* Format portmacro.h in arm CM0 ports

* portable/ARM_CM0: Add xPortIsInsideInterrupt

Add missing xPortIsInsideInterrupt function to Cortex-M0 port.

* tree-wide: Unify formatting of __cplusplus ifdefs

* Paranthesize expression-like macro (#668)

* Updated tasks.c checks for scheduler suspension (#670)

This commit updates the checks for the variable uxSchedulerSuspended in
tasks.c module to use a uniform format.

Signed-off-by: Sudeep Mohanty <sudp.mohanty@gmail.com>

* Fix cast alignment warning (#669)

* Fix cast alignment warning

Without this change, the code produces the following warning when
compiled with `-Wcast-align` flag:

```
cast increases required alignment of target type
```

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Align StackSize and StackAddress for macOS (#674)

* Armv8-M (except Cortex-M23) interrupt priority checking (#673)

* Armv8-M: Formatting changes

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>

* Armv8-M: Add support for interrupt priority check

FreeRTOS provides `FromISR` system calls which can be called directly
from interrupt service routines. It is crucial that the priority of
these ISRs is set to same or lower value (numerically higher) than that
of `configMAX_SYSCALL_INTERRUPT_PRIORITY`. For more information refer
to https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html.

Add a check to trigger an assert when an ISR with priority higher
(numerically lower) than `configMAX_SYSCALL_INTERRUPT_PRIORITY` calls
`FromISR` system calls if `configASSERT` macro is defined.

In addition, add a config option
`configQEMU_DISABLE_INTERRUPT_PRIO_BITS_CHECK` to disable interrupt
priority check while running on QEMU. Based on the discussion
https://gitlab.com/qemu-project/qemu/-/issues/1122, The interrupt
priority bits in QEMU do not match the real hardware. Therefore the
assert that checks the number of implemented bits and __NVIC_PRIO_BITS
will always fail. The config option
 `configQEMU_DISABLE_INTERRUPT_PRIO_BITS_CHECK` should be defined in the
`FreeRTOSConfig.h` for QEMU targets.

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>

* Use SHPR2 for calculating interrupt priority bits

This removes the dependency on the secure software to mark the interrupt
as non-secure.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Use the extended movx instruction instead of mov (#676)

The following is from the MSP430X instruction set -

```
MOVX.W Move source word to destination word.

The source operand is copied to the destination. The source operand is
not affected. Both operands may be located in the full address space.
```

The movx instruction allows both the operands to be located in the full
address space and therefore, works with large data model as well.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Keith Packard <keithpac@amazon.com>
Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com>
Signed-off-by: Sudeep Mohanty <sudp.mohanty@gmail.com>
Co-authored-by: Archit Gupta <71798289+archigup@users.noreply.github.com>
Co-authored-by: tcpluess <tpluess@ieee.org>
Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Chris Copeland <chris@chrisnc.net>
Co-authored-by: David J. Fiddes <35607151+davefiddes@users.noreply.github.com>
Co-authored-by: Dusan Cervenka <cervenka@acrios.com>
Co-authored-by: bbain <16752579+bbain@users.noreply.github.com>
Co-authored-by: Ju1He1 <93189163+Ju1He1@users.noreply.github.com>
Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com>
Co-authored-by: phelter <paulheltera@gmail.com>
Co-authored-by: jacky309 <jacques.guillou@gmail.com>
Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com>
Co-authored-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com>
Co-authored-by: Keith Packard <keithp@keithp.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com>
Co-authored-by: Kody Stribrny <89810515+kstribrnAmzn@users.noreply.github.com>
Co-authored-by: Holden <holden-zenithaerotech.com>
Co-authored-by: Darian <32921628+Dazza0@users.noreply.github.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal>
Co-authored-by: Nicolas <nicolas.brunner@heig-vd.ch>
Co-authored-by: Vo Trung Chi <chi.votrung@vn.bosch.com>
Co-authored-by: Sudeep Mohanty <91244425+sudeep-mohanty@users.noreply.github.com>
Co-authored-by: Monika Singh <108652024+moninom1@users.noreply.github.com>

* Merge main to SMP branch (#86)

* Fix array-bounds compiler warning on gcc11+ in list.h (#580)

listGET_OWNER_OF_NEXT_ENTRY computes `( pxConstList )->pxIndex->pxNext` after
verifying that `( pxConstList )->pxIndex` points to `xListEnd`, which due to
being a MiniListItem_t, can be shorter than a ListItem_t. Thus,
`( pxConstList )->pxIndex` is a `ListItem_t *` that extends past the end of the
`List_t` whose `xListEnd` it points to. This is fixed by accessing `pxNext`
through a `MiniListItem_t` instead.

* move the prototype for vApplicationIdleHook to task.h. (#600)

Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Update equal priority task preemption (#603)

* vTaskResume and vTaskPrioritySet don't preempt equal priority task

* Update vTaskResumeAll not to preempt task with equal priority

* Fix in xTaskResumeFromISR

* Update FreeRTOS/FreeRTOS build checks (#613)

This is needed to be compatible with the refactoring done in this
PR - https://github.com/FreeRTOS/FreeRTOS/pull/889

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Add ulTaskGetRunTimeCounter and ulTaskGetRunTimePercent (#611)

Allow ulTaskGetIdleRunTimeCounter and ulTaskGetIdleRunTimePercent to be
used whenever configGENERATE_RUN_TIME_STATS is enabled, as this is the
only requirement for these functions to work.

* Fix some CMake documentation typos (#616)

The quick start instructions for CMake mention the "master"
git branch which has been replaced by "main" in the current
repo.

The main CMakeLists.txt documents how to integrate a
custom port. Fix a typo in the suggested CMake code.

* Added support of 64bit events. (#597)

* Added support of 64bit even

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Added missing brackets

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Made proper name for tick macro.

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Improved macro evaluation

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Fixed missed port files  + documentation

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Changes made on PR

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Fix macro definition.

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Formatted code with uncrustify

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

---------

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Introduce portMEMORY_BARRIER for Microblaze port. (#621)

The introduction of `portMEMORY_BARRIER` will ensure
the places in the kernel use a barrier will work.
For example, `xTaskResumeAll` has a memory barrier
to ensure its correctness when compiled with optimization
enabled. Without the barrier `xTaskResumeAll` can fail
(e.g. start reading and writing to address 0 and/or
infinite looping) when `xPendingReadyList` contains more
than one task to restore.

In `xTaskResumeAll` the compiler chooses to cache the
`pxTCB` the first time through the loop for use
in every subsequent loop. This is incorrect as the
removal of `pxTCB->xEventListItem` will actually
change the value of `pxTCB` if it was read again
at the top of the loop. The barrier forces the compiler
to read `pxTCB` again at the top of the loop.

The compiler is operating correctly. The removal
`pxTCB->xEventListItem` executes on a `List_t *`
and `ListItem_t *`.  This means that the compiler
can assume that any `MiniListItem_t` values are
unchanged by the loop (i.e. "strict-aliasing").
This allows the compiler to cache `pxTCB` as it
is obtained via a `MiniListItem_t`. This is incorrect
in this case because it is possible for a `ListItem_t *`
to actually alias a `MiniListItem_t`. This is technically
a "violation of aliasing rules" so we use the the barrier
to disable the strict-aliasing optimization in this loop.

* Do not call exit() on MSVC Port when calling vPortEndScheduler (#624)

* make port exitable

* correctly set xPortRunning to False

* add suggestions from Review

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* add suggestions from Review

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Update PR template to include checkbox for Unit Test related changes (#627)

* Fix build failure introduced in PR #597 (#629)

The PR #597 introduced a new config option configTICK_TYPE_WIDTH_IN_BITS
which can be defined to one of the following:
* TICK_TYPE_WIDTH_16_BITS - Tick type is 16 bit wide.
* TICK_TYPE_WIDTH_32_BITS - Tick type is 32 bit wide.
* TICK_TYPE_WIDTH_64_BITS - Tick type is 64 bit wide.

Earlier we supported 16 and 32 bit width for tick type which was
controlled using the config option configUSE_16_BIT_TICKS. The PR
tried to maintain backward compatibility by honoring
configUSE_16_BIT_TICKS. The backward compatibility did not work as
expected though, as the macro configTICK_TYPE_WIDTH_IN_BITS was used
before it was defined. This PR addresses it by ensuring that the macro
configTICK_TYPE_WIDTH_IN_BITS is defined before it is used.

Testing
1. configUSE_16_BIT_TICKS is defined to 0.

Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```

Assembly:
```
109e:       4b50            ldr     r3, [pc, #320]  ; (11e0 <xTaskIncrementTick+0x150>)
10a0:       f8d3 4134       ldr.w   r4, [r3, #308]  ; 0x134
10a4:       3401            adds    r4, #1
10a6:       f8c3 4134       str.w   r4, [r3, #308]  ; 0x134
```

It is clear from assembly that the tick type is 32 bit.

2. configUSE_16_BIT_TICKS is defined to 1.

Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```

Assembly:
```
10e2:       4b53            ldr     r3, [pc, #332]  ; (1230 <xTaskIncrementTick+0x15c>)
10e4:       f8b3 4134       ldrh.w  r4, [r3, #308]  ; 0x134
10e8:       b2a4            uxth    r4, r4
10ea:       3401            adds    r4, #1
10ec:       b2a4            uxth    r4, r4
10ee:       f8a3 4134       strh.w  r4, [r3, #308]  ; 0x134
```

It is clear from assembly that the tick type is 16 bit.

3. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_16_BITS.

Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```

Assembly:
```
10e2:       4b53            ldr     r3, [pc, #332]  ; (1230 <xTaskIncrementTick+0x15c>)
10e4:       f8b3 4134       ldrh.w  r4, [r3, #308]  ; 0x134
10e8:       b2a4            uxth    r4, r4
10ea:       3401            adds    r4, #1
10ec:       b2a4            uxth    r4, r4
10ee:       f8a3 4134       strh.w  r4, [r3, #308]  ; 0x134
```

It is clear from assembly that the tick type is 16 bit.

4. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_32_BITS.

Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```

Assembly:
```
109e:       4b50            ldr     r3, [pc, #320]  ; (11e0 <xTaskIncrementTick+0x150>)
10a0:       f8d3 4134       ldr.w   r4, [r3, #308]  ; 0x134
10a4:       3401            adds    r4, #1
10a6:       f8c3 4134       str.w   r4, [r3, #308]  ; 0x134
```

It is clear from assembly that the tick type is 32 bit.

5. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_64_BITS.

```
 #error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
```

The testing was done for GCC/ARM_CM3 port which does not support 64 bit
tick type.

6. Neither configUSE_16_BIT_TICKS nor configTICK_TYPE_WIDTH_IN_BITS
defined.

```
 #error Missing definition:  One of configUSE_16_BIT_TICKS and
 configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h.
 See the Configuration section of the FreeRTOS API documentation for
 details.
```

7. Both configUSE_16_BIT_TICKS and configTICK_TYPE_WIDTH_IN_BITS defined.

```
 #error Only one of configUSE_16_BIT_TICKS and
 configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h.
 See the Configuration section of the FreeRTOS API documentation for
 details.
```

Related issue - https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/628

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Feature/fixing clang gnu compiler warnings (#620)

* Adding in ability to support a library for freertos_config and a custom freertos_kernel_port (#558)

* Using single name definition for libraries everywhere. (#558)

* Supporting backwards compatibility with FREERTOS_CONFIG_FILE_DIRECTORY (#571)

* Removing compiler warnings for GNU and Clang. (#571)

* Added in documentation on how to consume from a main project. Added default PORT selection for native POSIX and MINGW platforms.

* Only adding freertos_config if it exists. Removing auto generation of it from a FREERTOS_CONFIG_FILE_DIRECTORY.

* Fixing clang and gnu compiler warnings.

* Adding in project information and how to compile for GNU/clang

* Fixing compiler issue with unused variable - no need to declare variable.

* Adding in compile warnings for linux builds that kernel is okay with using.

* Fixing more extra-semi-stmt clang warnings.

* Moving definition of hooks into header files if features are enabled.

* Fixing formatting with uncrustify.

* Fixing merge conflicts with main merge.

* Fixing compiler errors due to merge issues and formatting.

* Fixing Line feeds.

* Adding 'portNORETURN' into portmacros.h. Other Updates based on PR request

* Further clean-up of clang and clang-tidy issues.

* Removing compiler specific pragmas from common c files.

* Fixing missing lexicon entry and uncrustify formatting changes.

* Resolving merge issue multiple defnitions of proto for prvIdleTask

* Fixing formatting issues that are not covered by uncrustify. Use clang-tidy instead if you want this level of control.

* More uncrustify formatting issues.

* Fixing extra bracket in #if statement.

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* POSIX port fixes (#626)

* Fix types in POSIX port

Use TaskFunction_t and StackType_t as other ports do.

* Fix portTICK_RATE_MICROSECONDS in POSIX port

---------

Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Cortex-M35P: Add Cortex-M35P port (#631)

* Cortex-M35P: Add Cortex-M35P port

The Cortex-M35P support added to kernel. The port hasn't been
validated yet with TF-M. Hence TF-M support is not included in this
port.

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>

* Add portNORETURN to the newly added portmacro.h

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>

* Introduced Github Status Badge for Unit Tests (#634)

* Introduced Github Status Badge for Unit Tests

* Github status badge to point to latest run

* Github status badge UT points to latest results

* Fixed URL for Github Status badge

---------

Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>

* Remove C99 requirement from CMake file (#633)

* Remove C99 requirement from CMake file

The kernel source is C89 compliant and does not need C99.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Explicitly set C89 requirement for kernel

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Add Thread Local Storage (TLS) support using Picolibc functions (#343)

* Pass top of stack to configINIT_TLS_BLOCK

Picolibc wants to allocate the per-task TLS block within the stack
segment, so it will need to modify the top of stack value. Pass the
pxTopOfStack variable to make this explicit.

Signed-off-by: Keith Packard <keithpac@amazon.com>

* Move newlib-specific definitions to separate file

This reduces the clutter in FreeRTOS.h caused by having newlib-specific
macros present there.

Signed-off-by: Keith Packard <keithpac@amazon.com>

* Make TLS code depend only on configUSE_C_RUNTIME_TLS_SUPPORT

Remove reference to configUSE_NEWLIB_REENTRANT as that only works
when using newlib. configUSE_C_RUNTIME_TLS_SUPPORT is always
set when configUSE_NEWLIB_REENTRANT is set, so using both was
redundant in that case.

Signed-off-by: Keith Packard <keithpac@amazon.com>

* portable-ARC: Adapt ARC support to use generalized TLS support

With generalized thread local storage (TLS) support present in the
core, the two ARC ports need to have the changes to the TCB mirrored
to them.

Signed-off-by: Keith Packard <keithpac@amazon.com>

* Add Thread Local Storage (TLS) support using Picolibc functions

This patch provides definitions of the general TLS support macros in
terms of the Picolibc TLS support functions.

Picolibc is normally configured to use TLS internally for all
variables that are intended to be task-local, so these changes are
necessary for picolibc to work correctly with FreeRTOS.

The picolibc helper functions rely on elements within the linker
script to arrange the TLS data in memory and define some symbols.
Applications wanting to use this mechanism will need changes in their
linker script when migrating to picolibc.

Signed-off-by: Keith Packard <keithpac@amazon.com>

---------

Signed-off-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Interrupt priority assert improvements for CM3/4/7 (#602)

* Interrupt priority assert improvements for CM3/4/7

In the ARM_CM3, ARM_CM4, and ARM_CM7 ports, change the assertion that
`configMAX_SYSCALL_INTERRUPT_PRIORITY` is nonzero to account for the
number of priority bits implemented by the hardware.

Change these ports to also use the lowest priority for PendSV and
SysTick, ignoring `configKERNEL_INTERRUPT_PRIORITY`.

* Remove not needed configKERNEL_INTERRUPT_PRIORITY define

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>

* Introduced code coverage status badge (#635)

* Introduced code coverage status badge

* Trying to fix the URL checker issue

* Fix URL check

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* added portPOINTER_SIZE_TYPE and SIZE_MAX definition to PIC24/dsPIC port (#636)

* added portPOINTER_SIZE_TYPE definition to PIC24/dsPIC port

* Added SIZE_MAX definition to PIC24/dsPIC33

* Fix TLS and stack alignment when using picolibc (#637)

Both the TLS block and stack must be correctly aligned when using
picolibc. The architecture stack alignment is represented by the
portBYTE_ALIGNMENT_MASK and the TLS block alignment is provided by the
Picolibc _tls_align() inline function for Picolibc version 1.8 and
above. For older versions of Picolibc, we'll assume that the TLS block
requires the same alignment as the stack.

For downward growing stacks, this requires aligning the start of the
TLS block to the maximum of the stack alignment and the TLS
alignment. With this, both the TLS block and stack will now be
correctly aligned.

For upward growing stacks, the two areas must be aligned
independently; the TLS block is aligned from the start of the stack,
then the tls space is allocated, and then the stack is aligned above
that.

It's probably useful to know here that the linker ensures that
variables within the TLS block are assigned offsets that match their
alignment requirements. If the TLS block itself is correctly aligned,
then everything within will also be.

I have only tested the downward growing stack branch of this patch.

Signed-off-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Enable building the GCC Cortex-R5 port without an FPU (#586)

* Ensure configUSE_TASK_FPU_SUPPORT option is set correctly

If one does enable the FPU of the Cortex-R5 processor, then the GCC
compiler will define the macro __ARM_FP. This can be used to ensure,
that the configUSE_TASK_FPU_SUPPORT is set accordingly.

* Enable the implementation of vPortTaskUsesFPU only if configUSE_TASK_FPU_SUPPORT is set to 1

* Remove error case in pxPortInitialiseStack

The case of configUSE_TASK_FPU_SUPPORT is 0 is now handled

* Enable access to FPU registers only if FPU is enabled

* Make minor formating changes

* Format ARM Cortex-R5 port

* Address review comments from @ChristosZosi

* Minor code review suggestions

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>

* Fix freertos_kernel cmake property, Posix Port (#640)

* Fix freertos_kernel cmake property, Posix Port

* Moves the `set_property()` call below the target definition in top level CMakeLists file
* Corrects billion value from `ULL` suffix (not C90 compliant) to `UL` suffix with cast to uint64_t

* Add blank line to CMakeLists.txt

* Add missing FreeRTOS+ defines

* Run kernel demos and unit tests for PR changes (#645)

* Run kernel demos and unit tests for PR changes

Kernel demos check builds multiple demos from FreeRTOS/FreeRTOS and
unit tests check runs unit tests in FreeRTOS/FreeRTOS. Both of these
checks currently use main branch of FreeRTOS-Kernel. This commits
updates these checks to use the changes in the PR.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Do not specify PR SHA explicitly as that is default

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Remove explicit PR SHA from kernel checks

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Add functions to get the buffers of statically created objects (#641)

Added various ...GetStaticBuffer() functions to get the buffers of statically
created objects.
---------
Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>

* Cortex-M Assert when NVIC implements 8 PRIO bits (#639)

* Cortex-M Assert when NVIC implements 8 PRIO bits

* Fix CM3 ports

* Fix ARM_CM3_MPU

* Fix ARM CM3

* Fix ARM_CM4_MPU

* Fix ARM_CM4

* Fix GCC ARM_CM7

* Fix IAR ARM ports

* Uncrustify changes

* Fix MikroC_ARM_CM4F port

* Fix MikroC_ARM_CM4F port-(2)

* Fix RVDS ARM ports

* Revert changes for Tasking/ARM_CM4F port

* Revert changes for Tasking/ARM_CM4F port-(2)

* Update port.c

Fix GCC/ARM_CM4F port

* Update port.c

* update GCC\ARM_CM4F port

* update port.c

* Assert to check configMAX_SYSCALL_INTERRUPT_PRIORITY is set to higher priority

* Fix merge error: remove duplicate code

* Fix typos

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal>

* Remove C90 requirement from CMakeLists (#649)

This is needed as it is breaking projects - https://forums.freertos.org/t/freertos-gcc-cmake/16984

We will re-evaluate and accordingly add this later.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Only add alignment padding when needed (#650)

Heap 4 and Heap 5 add some padding to ensure that the allocated blocks
are always aligned to portBYTE_ALIGNMENT bytes. The code until now was
adding padding always even if the resulting block was already aligned.
This commits updates the code to only add padding if the resulting block
is not aligned.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* add a missing comma (#651)

* fix conversion warning (#658)

FreeRTOS-Kernel/portable/GCC/ARM_CM4F/port.c:399:41: error: conversion from 'uint32_t' {aka 'long unsigned int'} to 'uint8_t' {aka 'unsigned char'} may change value [-Werror=conversion]

Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com>

* ARMv7M: Adjust implemented priority bit assertions (#665)

Adjust assertions related to the CMSIS __NVIC_PRIO_BITS and FreeRTOS
configPRIO_BITS configuration macros such that these macros specify the
minimum number of implemented priority bits supported by a config
build rather than the exact number of implemented priority bits.

Related to Qemu issue #1122

* Format portmacro.h in arm CM0 ports

* portable/ARM_CM0: Add xPortIsInsideInterrupt

Add missing xPortIsInsideInterrupt function to Cortex-M0 port.

* tree-wide: Unify formatting of __cplusplus ifdefs

* Paranthesize expression-like macro (#668)

* Updated tasks.c checks for scheduler suspension (#670)

This commit updates the checks for the variable uxSchedulerSuspended in
tasks.c module to use a uniform format.

Signed-off-by: Sudeep Mohanty <sudp.mohanty@gmail.com>

* Fix cast alignment warning (#669)

* Fix cast alignment warning

Without this change, the code produces the following warning when
compiled with `-Wcast-align` flag:

```
cast increases required alignment of target type
```

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Align StackSize and StackAddress for macOS (#674)

* Armv8-M (except Cortex-M23) interrupt priority checking (#673)

* Armv8-M: Formatting changes

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>

* Armv8-M: Add support for interrupt priority check

FreeRTOS provides `FromISR` system calls which can be called directly
from interrupt service routines. It is crucial that the priority of
these ISRs is set to same or lower value (numerically higher) than that
of `configMAX_SYSCALL_INTERRUPT_PRIORITY`. For more information refer
to https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html.

Add a check to trigger an assert when an ISR with priority higher
(numerically lower) than `configMAX_SYSCALL_INTERRUPT_PRIORITY` calls
`FromISR` system calls if `configASSERT` macro is defined.

In addition, add a config option
`configQEMU_DISABLE_INTERRUPT_PRIO_BITS_CHECK` to disable interrupt
priority check while running on QEMU. Based on the discussion
https://gitlab.com/qemu-project/qemu/-/issues/1122, The interrupt
priority bits in QEMU do not match the real hardware. Therefore the
assert that checks the number of implemented bits and __NVIC_PRIO_BITS
will always fail. The config option
 `configQEMU_DISABLE_INTERRUPT_PRIO_BITS_CHECK` should be defined in the
`FreeRTOSConfig.h` for QEMU targets.

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>

* Use SHPR2 for calculating interrupt priority bits

This removes the dependency on the secure software to mark the interrupt
as non-secure.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Use the extended movx instruction instead of mov (#676)

The following is from the MSP430X instruction set -

```
MOVX.W Move source word to destination word.

The source operand is copied to the destination. The source operand is
not affected. Both operands may be located in the full address space.
```

The movx instruction allows both the operands to be located in the full
address space and therefore, works with large data model as well.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Fix eTaskGetState for pending ready tasks (#679)

This commit fixes eTaskGetState so that eReady is returned for pending ready
tasks.

Co-authored-by: Darian Leung <darian@espressif.com>

* Generates SBOM after source files are updated with release tag (#680)

* update source file with release version info before SBOM generation

* delete tag branch during cleanup

* Add back croutines by reverting PR#590 (#685)

* Add croutines to the code base

* Add croutine changes to cmake, lexicon and readme

* Add croutine file to portable cmake file

* Add back more references from PR 591

* Remove __NVIC_PRIO_BITS and configPRIO_BITS check in port (#683)

* Remove __NVIC_PRIO_BITS and configPRIO_BITS check in CM3, CM4 and ARMv8.
* Add hardware not implemented bits check. These bits should be zero.

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Use UBaseType_t as interrupt mask (#689)

* Use UBaseType_t as interrupt mask
* Update GCC posix port to use UBaseType_t as interrupt mask

* Fix clang warning in croutine and stream buffer (#686)

* Fix document warning in croutine
* Fix cast-qual warning in stream buffer

* Use portTASK_FUNCTION_PROTO to replace portNORETURN (#688)

* Use portTASK_FUNCTION_PROTO to replace portNORETURN

* Fix typo in check comment of configMAX_SYSCALL_INTERRUPT_PRIORITY (#690)

* Add constant type for portMAX_DELAY in port (#691)

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Update static stream buffer size check (#693)

* Use volatile size instead of sizeof directly to prevent always
  true/false warning

* Fix typos in comments for the AT91SAM7S port (#695)

Co-authored-by: RichardBarry <3073890+RichardBarry@users.noreply.github.com>

* Fix #697: Missing portPOINTER_SIZE_TYPE definition for ATmega port (#698)

* Remove empty expression statement compiler warning (#692)

* Add do while( 0 ) loop for empty expression statement compiler warning

* Update uxTaskGetSystemState for tasks in pending ready list (#702)

* Update uxTaskGetSystemState to sync with eTaskGetState
* Update in vTaskGetInfo for tasks in pending ready list should be in
  ready state.

* Fix circular dependency in CMake project (#700)

* Fix circular dependency in cmake project

Fix for https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/687
In order for custom ports to also break the cycle, they must link
against freertos_kernel_include instead of freertos_kernel.

* Simplify include path

* Memory Protection Unit (MPU) Enhancements (#705)

Memory Protection Unit (MPU) Enhancements

This commit introduces a new MPU wrapper that places additional
restrictions on unprivileged tasks. The following is the list of changes
introduced with the new MPU wrapper:

1. Opaque and indirectly verifiable integers for kernel object handles:
   All the kernel object handles (for example, queue handles) are now
   opaque integers. Previously object handles were raw pointers.

2. Saving the task context in Task Control Block (TCB): When a task is
   swapped out by the scheduler, the task's context is now saved in its
   TCB. Previously the task's context was saved on its stack.

3. Execute system calls on a separate privileged only stack: FreeRTOS
   system calls, which execute with elevated privilege, now use a
   separate privileged only stack. Previously system calls used the
   calling task's stack. The application writer can control the size of
   the system call stack using new configSYSTEM_CALL_STACK_SIZE config
   macro.

4. Memory bounds checks: FreeRTOS system calls which accept a pointer
   and de-reference it, now verify that the calling task has required
   permissions to access the memory location referenced by the pointer.

5. System call restrictions: The following system calls are no longer
   available to unprivileged tasks:
    - vQueueDelete
    - xQueueCreateMutex
    - xQueueCreateMutexStatic
    - xQueueCreateCountingSemaphore
    - xQueueCreateCountingSemaphoreStatic
    - xQueueGenericCreate
    - xQueueGenericCreateStatic
    - xQueueCreateSet
    - xQueueRemoveFromSet
    - xQueueGenericReset
    - xTaskCreate
    - xTaskCreateStatic
    - vTaskDelete
    - vTaskPrioritySet
    - vTaskSuspendAll
    - xTaskResumeAll
    - xTaskGetHandle
    - xTaskCallApplicationTaskHook
    - vTaskList
    - vTaskGetRunTimeStats
    - xTaskCatchUpTicks
    - xEventGroupCreate
    - xEventGroupCreateStatic
    - vEventGroupDelete
    - xStreamBufferGenericCreate
    - xStreamBufferGenericCreateStatic
    - vStreamBufferDelete
    - xStreamBufferReset
   Also, an unprivileged task can no longer use vTaskSuspend to suspend
   any task other than itself.

We thank the following people for their inputs in these enhancements:
- David Reiss of Meta Platforms, Inc.
- Lan Luo, Xinhui Shao, Yumeng Wei, Zixia Liu, Huaiyu Yan and Zhen Ling
  of School of Computer Science and Engineering, Southeast University,
  China.
- Xinwen Fu of Department of Computer Science, University of
  Massachusetts Lowell, USA.
- Yuequi Chen, Zicheng Wang, Minghao Lin of University of Colorado
  Boulder, USA.

* Update History for Version 10.6.0 (#706)

Signed-off-by: kar-rahul-aws <karahulx@amazon.com>

* Fixed compile options polluting project (#694)

* Fixed compile options polluting project

Moved add_library higher

* Apply suggestions from code review

Co-authored-by: Paul Bartell <paul.bartell@gmail.com>

* fixed cmakelists keeping in mind the suggestions

---------

Co-authored-by: Paul Bartell <paul.bartell@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com>

* Fix the comments in the CM3 and CM4 MPU Ports about the MPU Region numbers being loaded (#707)

Co-authored-by: Soren Ptak <skptak@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Update xSemaphoreGetStaticBuffer prototype in comment (#704)

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Correct the misspelled name (#708)

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Keith Packard <keithpac@amazon.com>
Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com>
Signed-off-by: Sudeep Mohanty <sudp.mohanty@gmail.com>
Signed-off-by: kar-rahul-aws <karahulx@amazon.com>
Co-authored-by: Archit Gupta <71798289+archigup@users.noreply.github.com>
Co-authored-by: tcpluess <tpluess@ieee.org>
Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Chris Copeland <chris@chrisnc.net>
Co-authored-by: David J. Fiddes <35607151+davefiddes@users.noreply.github.com>
Co-authored-by: Dusan Cervenka <cervenka@acrios.com>
Co-authored-by: bbain <16752579+bbain@users.noreply.github.com>
Co-authored-by: Ju1He1 <93189163+Ju1He1@users.noreply.github.com>
Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com>
Co-authored-by: phelter <paulheltera@gmail.com>
Co-authored-by: jacky309 <jacques.guillou@gmail.com>
Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com>
Co-authored-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com>
Co-authored-by: Keith Packard <keithp@keithp.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com>
Co-authored-by: Kody Stribrny <89810515+kstribrnAmzn@users.noreply.github.com>
Co-authored-by: Holden <holden-zenithaerotech.com>
Co-authored-by: Darian <32921628+Dazza0@users.noreply.github.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal>
Co-authored-by: Nicolas <nicolas.brunner@heig-vd.ch>
Co-authored-by: Vo Trung Chi <chi.votrung@vn.bosch.com>
Co-authored-by: Sudeep Mohanty <91244425+sudeep-mohanty@users.noreply.github.com>
Co-authored-by: Monika Singh <108652024+moninom1@users.noreply.github.com>
Co-authored-by: Darian Leung <darian@espressif.com>
Co-authored-by: Tony Josi <tonyjosi@amazon.com>
Co-authored-by: Evgeny Ermakov <22344340+unspecd@users.noreply.github.com>
Co-authored-by: RichardBarry <3073890+RichardBarry@users.noreply.github.com>
Co-authored-by: Joris Putcuyps <joris.putcuyps@gmail.com>
Co-authored-by: Patrick Cook <114708437+cookpate@users.noreply.github.com>
Co-authored-by: Mr. Jake <norbertzpilicy@gmail.com>
Co-authored-by: Paul Bartell <paul.bartell@gmail.com>
Co-authored-by: Soren Ptak <Skptak@outlook.com>
Co-authored-by: Soren Ptak <skptak@amazon.com>

* Merge main to SMP branch 0721 (#90)

* Fix array-bounds compiler warning on gcc11+ in list.h (#580)

listGET_OWNER_OF_NEXT_ENTRY computes `( pxConstList )->pxIndex->pxNext` after
verifying that `( pxConstList )->pxIndex` points to `xListEnd`, which due to
being a MiniListItem_t, can be shorter than a ListItem_t. Thus,
`( pxConstList )->pxIndex` is a `ListItem_t *` that extends past the end of the
`List_t` whose `xListEnd` it points to. This is fixed by accessing `pxNext`
through a `MiniListItem_t` instead.

* move the prototype for vApplicationIdleHook to task.h. (#600)

Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Update equal priority task preemption (#603)

* vTaskResume and vTaskPrioritySet don't preempt equal priority task

* Update vTaskResumeAll not to preempt task with equal priority

* Fix in xTaskResumeFromISR

* Update FreeRTOS/FreeRTOS build checks (#613)

This is needed to be compatible with the refactoring done in this
PR - https://github.com/FreeRTOS/FreeRTOS/pull/889

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Add ulTaskGetRunTimeCounter and ulTaskGetRunTimePercent (#611)

Allow ulTaskGetIdleRunTimeCounter and ulTaskGetIdleRunTimePercent to be
used whenever configGENERATE_RUN_TIME_STATS is enabled, as this is the
only requirement for these functions to work.

* Fix some CMake documentation typos (#616)

The quick start instructions for CMake mention the "master"
git branch which has been replaced by "main" in the current
repo.

The main CMakeLists.txt documents how to integrate a
custom port. Fix a typo in the suggested CMake code.

* Added support of 64bit events. (#597)

* Added support of 64bit even

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Added missing brackets

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Made proper name for tick macro.

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Improved macro evaluation

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Fixed missed port files  + documentation

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Changes made on PR

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Fix macro definition.

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Formatted code with uncrustify

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

---------

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Introduce portMEMORY_BARRIER for Microblaze port. (#621)

The introduction of `portMEMORY_BARRIER` will ensure
the places in the kernel use a barrier will work.
For example, `xTaskResumeAll` has a memory barrier
to ensure its correctness when compiled with optimization
enabled. Without the barrier `xTaskResumeAll` can fail
(e.g. start reading and writing to address 0 and/or
infinite looping) when `xPendingReadyList` contains more
than one task to restore.

In `xTaskResumeAll` the compiler chooses to cache the
`pxTCB` the first time through the loop for use
in every subsequent loop. This is incorrect as the
removal of `pxTCB->xEventListItem` will actually
change the value of `pxTCB` if it was read again
at the top of the loop. The barrier forces the compiler
to read `pxTCB` again at the top of the loop.

The compiler is operating correctly. The removal
`pxTCB->xEventListItem` executes on a `List_t *`
and `ListItem_t *`.  This means that the compiler
can assume that any `MiniListItem_t` values are
unchanged by the loop (i.e. "strict-aliasing").
This allows the compiler to cache `pxTCB` as it
is obtained via a `MiniListItem_t`. This is incorrect
in this case because it is possible for a `ListItem_t *`
to actually alias a `MiniListItem_t`. This is technically
a "violation of aliasing rules" so we use the the barrier
to disable the strict-aliasing optimization in this loop.

* Do not call exit() on MSVC Port when calling vPortEndScheduler (#624)

* make port exitable

* correctly set xPortRunning to False

* add suggestions from Review

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* add suggestions from Review

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Update PR template to include checkbox for Unit Test related changes (#627)

* Fix build failure introduced in PR #597 (#629)

The PR #597 introduced a new config option configTICK_TYPE_WIDTH_IN_BITS
which can be defined to one of the following:
* TICK_TYPE_WIDTH_16_BITS - Tick type is 16 bit wide.
* TICK_TYPE_WIDTH_32_BITS - Tick type is 32 bit wide.
* TICK_TYPE_WIDTH_64_BITS - Tick type is 64 bit wide.

Earlier we supported 16 and 32 bit width for tick type which was
controlled using the config option configUSE_16_BIT_TICKS. The PR
tried to maintain backward compatibility by honoring
configUSE_16_BIT_TICKS. The backward compatibility did not work as
expected though, as the macro configTICK_TYPE_WIDTH_IN_BITS was used
before it was defined. This PR addresses it by ensuring that the macro
configTICK_TYPE_WIDTH_IN_BITS is defined before it is used.

Testing
1. configUSE_16_BIT_TICKS is defined to 0.

Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```

Assembly:
```
109e:       4b50            ldr     r3, [pc, #320]  ; (11e0 <xTaskIncrementTick+0x150>)
10a0:       f8d3 4134       ldr.w   r4, [r3, #308]  ; 0x134
10a4:       3401            adds    r4, #1
10a6:       f8c3 4134       str.w   r4, [r3, #308]  ; 0x134
```

It is clear from assembly that the tick type is 32 bit.

2. configUSE_16_BIT_TICKS is defined to 1.

Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```

Assembly:
```
10e2:       4b53            ldr     r3, [pc, #332]  ; (1230 <xTaskIncrementTick+0x15c>)
10e4:       f8b3 4134       ldrh.w  r4, [r3, #308]  ; 0x134
10e8:       b2a4            uxth    r4, r4
10ea:       3401            adds    r4, #1
10ec:       b2a4            uxth    r4, r4
10ee:       f8a3 4134       strh.w  r4, [r3, #308]  ; 0x134
```

It is clear from assembly that the tick type is 16 bit.

3. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_16_BITS.

Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```

Assembly:
```
10e2:       4b53            ldr     r3, [pc, #332]  ; (1230 <xTaskIncrementTick+0x15c>)
10e4:       f8b3 4134       ldrh.w  r4, [r3, #308]  ; 0x134
10e8:       b2a4            uxth    r4, r4
10ea:       3401            adds    r4, #1
10ec:       b2a4            uxth    r4, r4
10ee:       f8a3 4134       strh.w  r4, [r3, #308]  ; 0x134
```

It is clear from assembly that the tick type is 16 bit.

4. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_32_BITS.

Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```

Assembly:
```
109e:       4b50            ldr     r3, [pc, #320]  ; (11e0 <xTaskIncrementTick+0x150>)
10a0:       f8d3 4134       ldr.w   r4, [r3, #308]  ; 0x134
10a4:       3401            adds    r4, #1
10a6:       f8c3 4134       str.w   r4, [r3, #308]  ; 0x134
```

It is clear from assembly that the tick type is 32 bit.

5. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_64_BITS.

```
 #error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
```

The testing was done for GCC/ARM_CM3 port which does not support 64 bit
tick type.

6. Neither configUSE_16_BIT_TICKS nor configTICK_TYPE_WIDTH_IN_BITS
defined.

```
 #error Missing definition:  One of configUSE_16_BIT_TICKS and
 configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h.
 See the Configuration section of the FreeRTOS API documentation for
 details.
```

7. Both configUSE_16_BIT_TICKS and configTICK_TYPE_WIDTH_IN_BITS defined.

```
 #error Only one of configUSE_16_BIT_TICKS and
 configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h.
 See the Configuration section of the FreeRTOS API documentation for
 details.
```

Related issue - https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/628

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Feature/fixing clang gnu compiler warnings (#620)

* Adding in ability to support a library for freertos_config and a custom freertos_kernel_port (#558)

* Using single name definition for libraries everywhere. (#558)

* Supporting backwards compatibility with FREERTOS_CONFIG_FILE_DIRECTORY (#571)

* Removing compiler warnings for GNU and Clang. (#571)

* Added in documentation on how to consume from a main project. Added default PORT selection for native POSIX and MINGW platforms.

* Only adding freertos_config if it exists. Removing auto generation of it from a FREERTOS_CONFIG_FILE_DIRECTORY.

* Fixing clang and gnu compiler warnings.

* Adding in project information and how to compile for GNU/clang

* Fixing compiler issue with unused variable - no need to declare variable.

* Adding in compile warnings for linux builds that kernel is okay with using.

* Fixing more extra-semi-stmt clang warnings.

* Moving definition of hooks into header files if features are enabled.

* Fixing formatting with uncrustify.

* Fixing merge conflicts with main merge.

* Fixing compiler errors due to merge issues and formatting.

* Fixing Line feeds.

* Adding 'portNORETURN' into portmacros.h. Other Updates based on PR request

* Further clean-up of clang and clang-tidy issues.

* Removing compiler specific pragmas from common c files.

* Fixing missing lexicon entry and uncrustify formatting changes.

* Resolving merge issue multiple defnitions of proto for prvIdleTask

* Fixing formatting issues that are not covered by uncrustify. Use clang-tidy instead if you want this level of control.

* More uncrustify formatting issues.

* Fixing extra bracket in #if statement.

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* POSIX port fixes (#626)

* Fix types in POSIX port

Use TaskFunction_t and StackType_t as other ports do.

* Fix portTICK_RATE_MICROSECONDS in POSIX port

---------

Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Cortex-M35P: Add Cortex-M35P port (#631)

* Cortex-M35P: Add Cortex-M35P port

The Cortex-M35P support added to kernel. The port hasn't been
validated yet with TF-M. Hence TF-M support is not included in this
port.

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>

* Add portNORETURN to the newly added portmacro.h

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>

* Introduced Github Status Badge for Unit Tests (#634)

* Introduced Github Status Badge for Unit Tests

* Github status badge to point to latest run

* Github status badge UT points to latest results

* Fixed URL for Github Status badge

---------

Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>

* Remove C99 requirement from CMake file (#633)

* Remove C99 requirement from CMake file

The kernel source is C89 compliant and does not need C99.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Explicitly set C89 requirement for kernel

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Add Thread Local Storage (TLS) support using Picolibc functions (#343)

* Pass top of stack to configINIT_TLS_BLOCK

Picolibc wants to allocate the per-task TLS block within the stack
segment, so it will need to modify the top of stack value. Pass the
pxTopOfStack variable to make this explicit.

Signed-off-by: Keith Packard <keithpac@amazon.com>

* Move newlib-specific definitions to separate file

This reduces the clutter in FreeRTOS.h caused by having newlib-specific
macros present there.

Signed-off-by: Keith Packard <keithpac@amazon.com>

* Make TLS code depend only on configUSE_C_RUNTIME_TLS_SUPPORT

Remove reference to configUSE_NEWLIB_REENTRANT as that only works
when using newlib. configUSE_C_RUNTIME_TLS_SUPPORT is always
set when configUSE_NEWLIB_REENTRANT is set, so using both was
redundant in that case.

Signed-off-by: Keith Packard <keithpac@amazon.com>

* portable-ARC: Adapt ARC support to use generalized TLS support

With generalized thread local storage (TLS) support present in the
core, the two ARC ports need to have the changes to the TCB mirrored
to them.

Signed-off-by: Keith Packard <keithpac@amazon.com>

* Add Thread Local Storage (TLS) support using Picolibc functions

This patch provides definitions of the general TLS support macros in
terms of the Picolibc TLS support functions.

Picolibc is normally configured to use TLS internally for all
variables that are intended to be task-local, so these changes are
necessary for picolibc to work correctly with FreeRTOS.

The picolibc helper functions rely on elements within the linker
script to arrange the TLS data in memory and define some symbols.
Applications wanting to use this mechanism will need changes in their
linker script when migrating to picolibc.

Signed-off-by: Keith Packard <keithpac@amazon.com>

---------

Signed-off-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Interrupt priority assert improvements for CM3/4/7 (#602)

* Interrupt priority assert improvements for CM3/4/7

In the ARM_CM3, ARM_CM4, and ARM_CM7 ports, change the assertion that
`configMAX_SYSCALL_INTERRUPT_PRIORITY` is nonzero to account for the
number of priority bits implemented by the hardware.

Change these ports to also use the lowest priority for PendSV and
SysTick, ignoring `configKERNEL_INTERRUPT_PRIORITY`.

* Remove not needed configKERNEL_INTERRUPT_PRIORITY define

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>

* Introduced code coverage status badge (#635)

* Introduced code coverage status badge

* Trying to fix the URL checker issue

* Fix URL check

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* added portPOINTER_SIZE_TYPE and SIZE_MAX definition to PIC24/dsPIC port (#636)

* added portPOINTER_SIZE_TYPE definition to PIC24/dsPIC port

* Added SIZE_MAX definition to PIC24/dsPIC33

* Fix TLS and stack alignment when using picolibc (#637)

Both the TLS block and stack must be correctly aligned when using
picolibc. The architecture stack alignment is represented by the
portBYTE_ALIGNMENT_MASK and the TLS block alignment is provided by the
Picolibc _tls_align() inline function for Picolibc version 1.8 and
above. For older versions of Picolibc, we'll assume that the TLS block
requires the same alignment as the stack.

For downward growing stacks, this requires aligning the start of the
TLS block to the maximum of the stack alignment and the TLS
alignment. With this, both the TLS block and stack will now be
correctly aligned.

For upward growing stacks, the two areas must be aligned
independently; the TLS block is aligned from the start of the stack,
then the tls space is allocated, and then the stack is aligned above
that.

It's probably useful to know here that the linker ensures that
variables within the TLS block are assigned offsets that match their
alignment requirements. If the TLS block itself is correctly aligned,
then everything within will also be.

I have only tested the downward growing stack branch of this patch.

Signed-off-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Enable building the GCC Cortex-R5 port without an FPU (#586)

* Ensure configUSE_TASK_FPU_SUPPORT option is set correctly

If one does enable the FPU of the Cortex-R5 processor, then the GCC
compiler will define the macro __ARM_FP. This can be used to ensure,
that the configUSE_TASK_FPU_SUPPORT is set accordingly.

* Enable the implementation of vPortTaskUsesFPU only if configUSE_TASK_FPU_SUPPORT is set to 1

* Remove error case in pxPortInitialiseStack

The case of configUSE_TASK_FPU_SUPPORT is 0 is now handled

* Enable access to FPU registers only if FPU is enabled

* Make minor formating changes

* Format ARM Cortex-R5 port

* Address review comments from @ChristosZosi

* Minor code review suggestions

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>

* Fix freertos_kernel cmake property, Posix Port (#640)

* Fix freertos_kernel cmake property, Posix Port

* Moves the `set_property()` call below the target definition in top level CMakeLists file
* Corrects billion value from `ULL` suffix (not C90 compliant) to `UL` suffix with cast to uint64_t

* Add blank line to CMakeLists.txt

* Add missing FreeRTOS+ defines

* Run kernel demos and unit tests for PR changes (#645)

* Run kernel demos and unit tests for PR changes

Kernel demos check builds multiple demos from FreeRTOS/FreeRTOS and
unit tests check runs unit tests in FreeRTOS/FreeRTOS. Both of these
checks currently use main branch of FreeRTOS-Kernel. This commits
updates these checks to use the changes in the PR.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Do not specify PR SHA explicitly as that is default

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Remove explicit PR SHA from kernel checks

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Add functions to get the buffers of statically created objects (#641)

Added various ...GetStaticBuffer() functions to get the buffers of statically
created objects.
---------
Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>

* Cortex-M Assert when NVIC implements 8 PRIO bits (#639)

* Cortex-M Assert when NVIC implements 8 PRIO bits

* Fix CM3 ports

* Fix ARM_CM3_MPU

* Fix ARM CM3

* Fix ARM_CM4_MPU

* Fix ARM_CM4

* Fix GCC ARM_CM7

* Fix IAR ARM ports

* Uncrustify changes

* Fix MikroC_ARM_CM4F port

* Fix MikroC_ARM_CM4F port-(2)

* Fix RVDS ARM ports

* Revert changes for Tasking/ARM_CM4F port

* Revert changes for Tasking/ARM_CM4F port-(2)

* Update port.c

Fix GCC/ARM_CM4F port

* Update port.c

* update GCC\ARM_CM4F port

* update port.c

* Assert to check configMAX_SYSCALL_INTERRUPT_PRIORITY is set to higher priority

* Fix merge error: remove duplicate code

* Fix typos

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal>

* Remove C90 requirement from CMakeLists (#649)

This is needed as it is breaking projects - https://forums.freertos.org/t/freertos-gcc-cmake/16984

We will re-evaluate and accordingly add this later.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Only add alignment padding when needed (#650)

Heap 4 and Heap 5 add some padding to ensure that the allocated blocks
are always aligned to portBYTE_ALIGNMENT bytes. The code until now was
adding padding always even if the resulting block was already aligned.
This commits updates the code to only add padding if the resulting block
is not aligned.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* add a missing comma (#651)

* fix conversion warning (#658)

FreeRTOS-Kernel/portable/GCC/ARM_CM4F/port.c:399:41: error: conversion from 'uint32_t' {aka 'long unsigned int'} to 'uint8_t' {aka 'unsigned char'} may change value [-Werror=conversion]

Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com>

* ARMv7M: Adjust implemented priority bit assertions (#665)

Adjust assertions related to the CMSIS __NVIC_PRIO_BITS and FreeRTOS
configPRIO_BITS configuration macros such that these macros specify the
minimum number of implemented priority bits supported by a config
build rather than the exact number of implemented priority bits.

Related to Qemu issue #1122

* Format portmacro.h in arm CM0 ports

* portable/ARM_CM0: Add xPortIsInsideInterrupt

Add missing xPortIsInsideInterrupt function to Cortex-M0 port.

* tree-wide: Unify formatting of __cplusplus ifdefs

* Paranthesize expression-like macro (#668)

* Updated tasks.c checks for scheduler suspension (#670)

This commit updates the checks for the variable uxSchedulerSuspended in
tasks.c module to use a uniform format.

Signed-off-by: Sudeep Mohanty <sudp.mohanty@gmail.com>

* Fix cast alignment warning (#669)

* Fix cast alignment warning

Without this change, the code produces the following warning when
compiled with `-Wcast-align` flag:

```
cast increases required alignment of target type
```

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Align StackSize and StackAddress for macOS (#674)

* Armv8-M (except Cortex-M23) interrupt priority checking (#673)

* Armv8-M: Formatting changes

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>

* Armv8-M: Add support for interrupt priority check

FreeRTOS provides `FromISR` system calls which can be called directly
from interrupt service routines. It is crucial that the priority of
these ISRs is set to same or lower value (numerically higher) than that
of `configMAX_SYSCALL_INTERRUPT_PRIORITY`. For more information refer
to https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html.

Add a check to trigger an assert when an ISR with priority higher
(numerically lower) than `configMAX_SYSCALL_INTERRUPT_PRIORITY` calls
`FromISR` system calls if `configASSERT` macro is defined.

In addition, add a config option
`configQEMU_DISABLE_INTERRUPT_PRIO_BITS_CHECK` to disable interrupt
priority check while running on QEMU. Based on the discussion
https://gitlab.com/qemu-project/qemu/-/issues/1122, The interrupt
priority bits in QEMU do not match the real hardware. Therefore the
assert that checks the number of implemented bits and __NVIC_PRIO_BITS
will always fail. The config option
 `configQEMU_DISABLE_INTERRUPT_PRIO_BITS_CHECK` should be defined in the
`FreeRTOSConfig.h` for QEMU targets.

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>

* Use SHPR2 for calculating interrupt priority bits

This removes the dependency on the secure software to mark the interrupt
as non-secure.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Use the extended movx instruction instead of mov (#676)

The following is from the MSP430X instruction set -

```
MOVX.W Move source word to destination word.

The source operand is copied to the destination. The source operand is
not affected. Both operands may be located in the full address space.
```

The movx instruction allows both the operands to be located in the full
address space and therefore, works with large data model as well.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Fix eTaskGetState for pending ready tasks (#679)

This commit fixes eTaskGetState so that eReady is returned for pending ready
tasks.

Co-authored-by: Darian Leung <darian@espressif.com>

* Generates SBOM after source files are updated with release tag (#680)

* update source file with release version info before SBOM generation

* delete tag branch during cleanup

* Add back croutines by reverting PR#590 (#685)

* Add croutines to the code base

* Add croutine changes to cmake, lexicon and readme

* Add croutine file to portable cmake file

* Add back more references from PR 591

* Remove __NVIC_PRIO_BITS and configPRIO_BITS check in port (#683)

* Remove __NVIC_PRIO_BITS and configPRIO_BITS check in CM3, CM4 and ARMv8.
* Add hardware not implemented bits check. These bits should be zero.

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Use UBaseType_t as interrupt mask (#689)

* Use UBaseType_t as interrupt mask
* Update GCC posix port to use UBaseType_t as interrupt mask

* Fix clang warning in croutine and stream buffer (#686)

* Fix document warning in croutine
* Fix cast-qual warning in stream buffer

* Use portTASK_FUNCTION_PROTO to replace portNORETURN (#688)

* Use portTASK_FUNCTION_PROTO to replace portNORETURN

* Fix typo in check comment of configMAX_SYSCALL_INTERRUPT_PRIORITY (#690)

* Add constant type for portMAX_DELAY in port (#691)

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Update static stream buffer size check (#693)

* Use volatile size instead of sizeof directly to prevent always
  true/false warning

* Fix typos in comments for the AT91SAM7S port (#695)

Co-authored-by: RichardBarry <3073890+RichardBarry@users.noreply.github.com>

* Fix #697: Missing portPOINTER_SIZE_TYPE definition for ATmega port (#698)

* Remove empty expression statement compiler warning (#692)

* Add do while( 0 ) loop for empty expression statement compiler warning

* Update uxTaskGetSystemState for tasks in pending ready list (#702)

* Update uxTaskGetSystemState to sync with eTaskGetState
* Update in vTaskGetInfo for tasks in pending ready list should be in
  ready state.

* Fix circular dependency in CMake project (#700)

* Fix circular dependency in cmake project

Fix for https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/687
In order for custom ports to also break the cycle, they must link
against freertos_kernel_include instead of freertos_kernel.

* Simplify include path

* Memory Protection Unit (MPU) Enhancements (#705)

Memory Protection Unit (MPU) Enhancements

This commit introduces a new MPU wrapper that places additional
restrictions on unprivileged tasks. The following is the list of changes
introduced with the new MPU wrapper:

1. Opaque and indirectly verifiable integers for kernel object handles:
   All the kernel object handles (for example, queue handles) are now
   opaque integers. Previously object handles were raw pointers.

2. Saving the task context in Task Control Block (TCB): When a task is
   swapped out by the scheduler, the task's context is now saved in its
   TCB. Previously the task's context was saved on its stack.

3. Execute system calls on a separate privileged only stack: FreeRTOS
   system calls, which execute with elevated privilege, now use a
   separate privileged only stack. Previously system calls used the
   calling task's stack. The application writer can control the size of
   the system call stack using new configSYSTEM_CALL_STACK_SIZE config
   macro.

4. Memory bounds checks: FreeRTOS system calls which accept a pointer
   and de-reference it, now verify that the calling task has required
   permissions to access the memory location referenced by the pointer.

5. System call restrictions: The following system calls are no longer
   available to unprivileged tasks:
    - vQueueDelete
    - xQueueCreateMutex
    - xQueueCreateMutexStatic
    - xQueueCreateCountingSemaphore
    - xQueueCreateCountingSemaphoreStatic
    - xQueueGenericCreate
    - xQueueGenericCreateStatic
    - xQueueCreateSet
    - xQueueRemoveFromSet
    - xQueueGenericReset
    - xTaskCreate
    - xTaskCreateStatic
    - vTaskDelete
    - vTaskPrioritySet
    - vTaskSuspendAll
    - xTaskResumeAll
    - xTaskGetHandle
    - xTaskCallApplicationTaskHook
    - vTaskList
    - vTaskGetRunTimeStats
    - xTaskCatchUpTicks
    - xEventGroupCreate
    - xEventGroupCreateStatic
    - vEventGroupDelete
    - xStreamBufferGenericCreate
    - xStreamBufferGenericCreateStatic
    - vStreamBufferDelete
    - xStreamBufferReset
   Also, an unprivileged task can no longer use vTaskSuspend to suspend
   any task other than itself.

We thank the following people for their inputs in these enhancements:
- David Reiss of Meta Platforms, Inc.
- Lan Luo, Xinhui Shao, Yumeng Wei, Zixia Liu, Huaiyu Yan and Zhen Ling
  of School of Computer Science and Engineering, Southeast University,
  China.
- Xinwen Fu of Department of Computer Science, University of
  Massachusetts Lowell, USA.
- Yuequi Chen, Zicheng Wang, Minghao Lin of University of Colorado
  Boulder, USA.

* Update History for Version 10.6.0 (#706)

Signed-off-by: kar-rahul-aws <karahulx@amazon.com>

* Fixed compile options polluting project (#694)

* Fixed compile options polluting project

Moved add_library higher

* Apply suggestions from code review

Co-authored-by: Paul Bartell <paul.bartell@gmail.com>

* fixed cmakelists keeping in mind the suggestions

---------

Co-authored-by: Paul Bartell <paul.bartell@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com>

* Fix the comments in the CM3 and CM4 MPU Ports about the MPU Region numbers being loaded (#707)

Co-authored-by: Soren Ptak <skptak@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Update xSemaphoreGetStaticBuffer prototype in comment (#704)

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Correct the misspelled name (#708)

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Keith Packard <keithpac@amazon.com>
Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com>
Signed-off-by: Sudeep Mohanty <sudp.mohanty@gmail.com>
Signed-off-by: kar-rahul-aws <karahulx@amazon.com>
Co-authored-by: Archit Gupta <71798289+archigup@users.noreply.github.com>
Co-authored-by: tcpluess <tpluess@ieee.org>
Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Chris Copeland <chris@chrisnc.net>
Co-authored-by: David J. Fiddes <35607151+davefiddes@users.noreply.github.com>
Co-authored-by: Dusan Cervenka <cervenka@acrios.com>
Co-authored-by: bbain <16752579+bbain@users.noreply.github.com>
Co-authored-by: Ju1He1 <93189163+Ju1He1@users.noreply.github.com>
Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com>
Co-authored-by: phelter <paulheltera@gmail.com>
Co-authored-by: jacky309 <jacques.guillou@gmail.com>
Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com>
Co-authored-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com>
Co-authored-by: Keith Packard <keithp@keithp.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com>
Co-authored-by: Kody Stribrny <89810515+kstribrnAmzn@users.noreply.github.com>
Co-authored-by: Holden <holden-zenithaerotech.com>
Co-authored-by: Darian <32921628+Dazza0@users.noreply.github.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal>
Co-authored-by: Nicolas <nicolas.brunner@heig-vd.ch>
Co-authored-by: Vo Trung Chi <chi.votrung@vn.bosch.com>
Co-authored-by: Sudeep Mohanty <91244425+sudeep-mohanty@users.noreply.github.com>
Co-authored-by: Monika Singh <108652024+moninom1@users.noreply.github.com>
Co-authored-by: Darian Leung <darian@espressif.com>
Co-authored-by: Tony Josi <tonyjosi@amazon.com>
Co-authored-by: Evgeny Ermakov <22344340+unspecd@users.noreply.github.com>
Co-authored-by: RichardBarry <3073890+RichardBarry@users.noreply.github.com>
Co-authored-by: Joris Putcuyps <joris.putcuyps@gmail.com>
Co-authored-by: Patrick Cook <114708437+cookpate@users.noreply.github.com>
Co-authored-by: Mr. Jake <norbertzpilicy@gmail.com>
Co-authored-by: Paul Bartell <paul.bartell@gmail.com>
Co-authored-by: Soren Ptak <Skptak@outlook.com>
Co-authored-by: Soren Ptak <skptak@amazon.com>

* Move default configNUMBER_OF_CORES definition forward in FreeRTOSConfig.h (#88)

* Move default configNUMBER_OF_CORES definition forward in FreeRTOSConfig.h.

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Signed-off-by: Xinyu Zhang <xinyu.zhang@arm.com>
Signed-off-by: Gabor Toth <gabor.toth@arm.com>
Signed-off-by: Cristian Cristea <cristiancristea00@gmail.com>
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Keith Packard <keithpac@amazon.com>
Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com>
Signed-off-by: Sudeep Mohanty <sudp.mohanty@gmail.com>
Signed-off-by: kar-rahul-aws <karahulx@amazon.com>
Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: AndreiCherniaev <dungeonlords789@yandex.ru>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Tanmoy Sen <33438891+tanmoysen@users.noreply.github.com>
Co-authored-by: Ravishankar Bhagavandas <bhagavar@amazon.com>
Co-authored-by: eddie9712 <qw1562435@gmail.com>
Co-authored-by: Graham Sanderson <graham.sanderson@raspberrypi.com>
Co-authored-by: graham sanderson <graham.sanderson@raspeberryi.com>
Co-authored-by: Xinyu Zhang <68640626+xinyu-tfm@users.noreply.github.com>
Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
Co-authored-by: NomiChirps <70026509+NomiChirps@users.noreply.github.com>
Co-authored-by: 0xjakob <18257824+0xjakob@users.noreply.github.com>
Co-authored-by: Jakob Hasse <0xjakob@users.noreply.github.com>
Co-authored-by: Xin Lin <47510956+xlin7799@users.noreply.github.com>
Co-authored-by: Patrick Oppenlander <patrick.oppenlander@gmail.com>
Co-authored-by: Gavin Lambert <uecasm@users.noreply.github.com>
Co-authored-by: Chris Copeland <chris@chrisnc.net>
Co-authored-by: RichardBarry <3073890+RichardBarry@users.noreply.github.com>
Co-authored-by: Paul Bartell <paul.bartell@gmail.com>
Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com>
Co-authored-by: Archit Gupta <71798289+archigup@users.noreply.github.com>
Co-authored-by: Monika Singh <108652024+moninom1@users.noreply.github.com>
Co-authored-by: Octaviarius <gomanchuk.as@gmail.com>
Co-authored-by: Jakub Lužný <jakub@luzny.cz>
Co-authored-by: newbrain <17814222+newbrain@users.noreply.github.com>
Co-authored-by: Gabor Toth <gabor.toth@arm.com>
Co-authored-by: Ming Yue <mingyue86010@gmail.com>
Co-authored-by: David Chalco <david@chalco.io>
Co-authored-by: Cristian Cristea <cristiancristea00@gmail.com>
Co-authored-by: Jeff Tenney <jeff.tenney@gmail.com>
Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
Co-authored-by: abhidixi11 <44424462+abhidixi11@users.noreply.github.com>
Co-authored-by: Laukik Hase <laukik.hase@espressif.com>
Co-authored-by: arshi016 <arshilife16@gmail.com>
Co-authored-by: Niklas Gürtler <Erlkoenig90@users.noreply.github.com>
Co-authored-by: Niklas Gürtler <niklas.guertler@tacterion.com>
Co-authored-by: Hardy Griech <ntbox@gmx.net>
Co-authored-by: Darian <32921628+Dazza0@users.noreply.github.com>
Co-authored-by: tcpluess <tpluess@ieee.org>
Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch>
Co-authored-by: David J. Fiddes <35607151+davefiddes@users.noreply.github.com>
Co-authored-by: Dusan Cervenka <cervenka@acrios.com>
Co-authored-by: bbain <16752579+bbain@users.noreply.github.com>
Co-authored-by: Ju1He1 <93189163+Ju1He1@users.noreply.github.com>
Co-authored-by: phelter <paulheltera@gmail.com>
Co-authored-by: jacky309 <jacques.guillou@gmail.com>
Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com>
Co-authored-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com>
Co-authored-by: Keith Packard <keithp@keithp.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com>
Co-authored-by: Kody Stribrny <89810515+kstribrnAmzn@users.noreply.github.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal>
Co-authored-by: Nicolas <nicolas.brunner@heig-vd.ch>
Co-authored-by: Vo Trung Chi <chi.votrung@vn.bosch.com>
Co-authored-by: Sudeep Mohanty <91244425+sudeep-mohanty@users.noreply.github.com>
Co-authored-by: Darian Leung <darian@espressif.com>
Co-authored-by: Tony Josi <tonyjosi@amazon.com>
Co-authored-by: Evgeny Ermakov <22344340+unspecd@users.noreply.github.com>
Co-authored-by: Joris Putcuyps <joris.putcuyps@gmail.com>
Co-authored-by: Patrick Cook <114708437+cookpate@users.noreply.github.com>
Co-authored-by: Mr. Jake <norbertzpilicy@gmail.com>
Co-authored-by: Soren Ptak <Skptak@outlook.com>
Co-authored-by: Soren Ptak <skptak@amazon.com>
2023-07-24 19:24:15 +08:00
kar-rahul-aws 83da5fc958
Update portSTACK_REGION macro for continuity with user Regions (#713) 2023-07-20 18:02:03 +05:30
Gaurav-Aggarwal-AWS 2cdd0e5e55
Add -Wconversion in CMakeLists.txt (#712)
Also fix warnings generated by this flag.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-07-20 16:21:17 +05:30
kar-rahul-aws 50b2d8fb66
Update mpu_wrappers_v2.c (#709)
* Update mpu_wrappers_v2.c

* Initialize Internal QueueSet Handle to NULL

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-07-20 09:49:05 +05:30
Jeff Tenney b375458aab
Add port-optimised task selection for ARMv8-M (#703)
Add port-optimised task selection for ARMv8-M
2023-07-19 18:08:05 +05:30
Gaurav-Aggarwal-AWS 0d03a938cc
Fic clang compiler warnings (#711)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-07-19 14:59:08 +05:30
Gaurav-Aggarwal-AWS 71662b5b5a
Correct the misspelled name (#708)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-07-18 11:09:52 +05:30
chinglee-iot c3dc20fdb4
Update xSemaphoreGetStaticBuffer prototype in comment (#704)
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-07-17 16:12:05 +05:30
Soren Ptak 54b13568e4
Fix the comments in the CM3 and CM4 MPU Ports about the MPU Region numbers being loaded (#707)
Co-authored-by: Soren Ptak <skptak@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-07-17 14:48:31 +05:30
Mr. Jake 6f6f656aa7
Fixed compile options polluting project (#694)
* Fixed compile options polluting project

Moved add_library higher

* Apply suggestions from code review

Co-authored-by: Paul Bartell <paul.bartell@gmail.com>

* fixed cmakelists keeping in mind the suggestions

---------

Co-authored-by: Paul Bartell <paul.bartell@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com>
2023-07-15 15:16:31 -07:00
kar-rahul-aws b60ab2fa14
Update History for Version 10.6.0 (#706)
Signed-off-by: kar-rahul-aws <karahulx@amazon.com>
2023-07-13 17:13:16 +05:30
kar-rahul-aws 97050a17aa
Memory Protection Unit (MPU) Enhancements (#705)
Memory Protection Unit (MPU) Enhancements

This commit introduces a new MPU wrapper that places additional
restrictions on unprivileged tasks. The following is the list of changes
introduced with the new MPU wrapper:

1. Opaque and indirectly verifiable integers for kernel object handles:
   All the kernel object handles (for example, queue handles) are now
   opaque integers. Previously object handles were raw pointers.

2. Saving the task context in Task Control Block (TCB): When a task is
   swapped out by the scheduler, the task's context is now saved in its
   TCB. Previously the task's context was saved on its stack.

3. Execute system calls on a separate privileged only stack: FreeRTOS
   system calls, which execute with elevated privilege, now use a
   separate privileged only stack. Previously system calls used the
   calling task's stack. The application writer can control the size of
   the system call stack using new configSYSTEM_CALL_STACK_SIZE config
   macro.

4. Memory bounds checks: FreeRTOS system calls which accept a pointer
   and de-reference it, now verify that the calling task has required
   permissions to access the memory location referenced by the pointer.

5. System call restrictions: The following system calls are no longer
   available to unprivileged tasks:
    - vQueueDelete
    - xQueueCreateMutex
    - xQueueCreateMutexStatic
    - xQueueCreateCountingSemaphore
    - xQueueCreateCountingSemaphoreStatic
    - xQueueGenericCreate
    - xQueueGenericCreateStatic
    - xQueueCreateSet
    - xQueueRemoveFromSet
    - xQueueGenericReset
    - xTaskCreate
    - xTaskCreateStatic
    - vTaskDelete
    - vTaskPrioritySet
    - vTaskSuspendAll
    - xTaskResumeAll
    - xTaskGetHandle
    - xTaskCallApplicationTaskHook
    - vTaskList
    - vTaskGetRunTimeStats
    - xTaskCatchUpTicks
    - xEventGroupCreate
    - xEventGroupCreateStatic
    - vEventGroupDelete
    - xStreamBufferGenericCreate
    - xStreamBufferGenericCreateStatic
    - vStreamBufferDelete
    - xStreamBufferReset
   Also, an unprivileged task can no longer use vTaskSuspend to suspend
   any task other than itself.

We thank the following people for their inputs in these enhancements:
- David Reiss of Meta Platforms, Inc.
- Lan Luo, Xinhui Shao, Yumeng Wei, Zixia Liu, Huaiyu Yan and Zhen Ling
  of School of Computer Science and Engineering, Southeast University,
  China.
- Xinwen Fu of Department of Computer Science, University of
  Massachusetts Lowell, USA.
- Yuequi Chen, Zicheng Wang, Minghao Lin of University of Colorado
  Boulder, USA.
2023-07-13 16:51:04 +05:30
Patrick Cook 18e2937239
Fix circular dependency in CMake project (#700)
* Fix circular dependency in cmake project

Fix for https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/687
In order for custom ports to also break the cycle, they must link
against freertos_kernel_include instead of freertos_kernel.

* Simplify include path
2023-07-10 15:08:59 -07:00
chinglee-iot 77ec05e641
Update uxTaskGetSystemState for tasks in pending ready list (#702)
* Update uxTaskGetSystemState to sync with eTaskGetState
* Update in vTaskGetInfo for tasks in pending ready list should be in
  ready state.
2023-07-10 14:29:38 +08:00
chinglee-iot d0a490e491
Remove empty expression statement compiler warning (#692)
* Add do while( 0 ) loop for empty expression statement compiler warning
2023-07-06 10:44:24 +08:00
Joris Putcuyps 1c5eca348f
Fix #697: Missing portPOINTER_SIZE_TYPE definition for ATmega port (#698) 2023-06-29 11:18:51 -07:00
Evgeny Ermakov 891dcdf80a
Fix typos in comments for the AT91SAM7S port (#695)
Co-authored-by: RichardBarry <3073890+RichardBarry@users.noreply.github.com>
2023-06-26 11:13:10 -07:00
chinglee-iot 788f8cfd76
Update static stream buffer size check (#693)
* Use volatile size instead of sizeof directly to prevent always
  true/false warning
2023-06-26 15:44:33 +08:00
chinglee-iot aa012e8d82
Add constant type for portMAX_DELAY in port (#691)
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-06-26 10:49:59 +08:00
chinglee-iot 9a6284262e
Fix typo in check comment of configMAX_SYSCALL_INTERRUPT_PRIORITY (#690) 2023-06-21 15:05:18 +05:30
chinglee-iot 17a46c252f
Use portTASK_FUNCTION_PROTO to replace portNORETURN (#688)
* Use portTASK_FUNCTION_PROTO to replace portNORETURN
2023-06-12 16:17:17 +05:30
chinglee-iot 77d8086f1c
Fix clang warning in croutine and stream buffer (#686)
* Fix document warning in croutine
* Fix cast-qual warning in stream buffer
2023-06-12 17:44:23 +08:00
chinglee-iot 80f67449ba
Use UBaseType_t as interrupt mask (#689)
* Use UBaseType_t as interrupt mask
* Update GCC posix port to use UBaseType_t as interrupt mask
2023-06-12 17:33:52 +08:00
chinglee-iot 4a35c97fec
Remove __NVIC_PRIO_BITS and configPRIO_BITS check in port (#683)
* Remove __NVIC_PRIO_BITS and configPRIO_BITS check in CM3, CM4 and ARMv8.
* Add hardware not implemented bits check. These bits should be zero.

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-06-08 10:52:08 +08:00
Aniruddha Kanhere d3c289fe5b
Add back croutines by reverting PR#590 (#685)
* Add croutines to the code base

* Add croutine changes to cmake, lexicon and readme

* Add croutine file to portable cmake file

* Add back more references from PR 591
2023-06-02 11:03:40 -07:00
Tony Josi d43680169b
Generates SBOM after source files are updated with release tag (#680)
* update source file with release version info before SBOM generation

* delete tag branch during cleanup
2023-05-31 15:34:18 +05:30
Gaurav-Aggarwal-AWS 953c1ee6cb
Fix eTaskGetState for pending ready tasks (#679)
This commit fixes eTaskGetState so that eReady is returned for pending ready
tasks.

Co-authored-by: Darian Leung <darian@espressif.com>
2023-05-25 16:33:10 +05:30
Gaurav-Aggarwal-AWS 97434a4e0c
Use the extended movx instruction instead of mov (#676)
The following is from the MSP430X instruction set -

```
MOVX.W Move source word to destination word.

The source operand is copied to the destination. The source operand is
not affected. Both operands may be located in the full address space.
```

The movx instruction allows both the operands to be located in the full
address space and therefore, works with large data model as well.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-05-15 23:29:04 +05:30
Devaraj Ranganna a07f649bd5
Armv8-M (except Cortex-M23) interrupt priority checking (#673)
* Armv8-M: Formatting changes

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>

* Armv8-M: Add support for interrupt priority check

FreeRTOS provides `FromISR` system calls which can be called directly
from interrupt service routines. It is crucial that the priority of
these ISRs is set to same or lower value (numerically higher) than that
of `configMAX_SYSCALL_INTERRUPT_PRIORITY`. For more information refer
to https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html.

Add a check to trigger an assert when an ISR with priority higher
(numerically lower) than `configMAX_SYSCALL_INTERRUPT_PRIORITY` calls
`FromISR` system calls if `configASSERT` macro is defined.

In addition, add a config option
`configQEMU_DISABLE_INTERRUPT_PRIO_BITS_CHECK` to disable interrupt
priority check while running on QEMU. Based on the discussion
https://gitlab.com/qemu-project/qemu/-/issues/1122, The interrupt
priority bits in QEMU do not match the real hardware. Therefore the
assert that checks the number of implemented bits and __NVIC_PRIO_BITS
will always fail. The config option
 `configQEMU_DISABLE_INTERRUPT_PRIO_BITS_CHECK` should be defined in the
`FreeRTOSConfig.h` for QEMU targets.

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>

* Use SHPR2 for calculating interrupt priority bits

This removes the dependency on the secure software to mark the interrupt
as non-secure.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-05-11 09:41:00 -07:00
Monika Singh 9149af9a6f
Align StackSize and StackAddress for macOS (#674) 2023-05-10 12:11:52 +05:30
Gaurav-Aggarwal-AWS 153e52b729
Fix cast alignment warning (#669)
* Fix cast alignment warning

Without this change, the code produces the following warning when
compiled with `-Wcast-align` flag:

```
cast increases required alignment of target type
```

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-05-08 23:01:26 +05:30
Sudeep Mohanty 4550780f0c
Updated tasks.c checks for scheduler suspension (#670)
This commit updates the checks for the variable uxSchedulerSuspended in
tasks.c module to use a uniform format.

Signed-off-by: Sudeep Mohanty <sudp.mohanty@gmail.com>
2023-05-08 12:27:28 +05:30
tcpluess eb00a535a1
Paranthesize expression-like macro (#668) 2023-04-28 14:05:56 -07:00
Paul Bartell c1980cedb1 tree-wide: Unify formatting of __cplusplus ifdefs 2023-04-25 11:32:08 -07:00
Paul Bartell 5f19e34f87 portable/ARM_CM0: Add xPortIsInsideInterrupt
Add missing xPortIsInsideInterrupt function to Cortex-M0 port.
2023-04-20 15:13:11 -07:00
Paul Bartell 714e543247 Format portmacro.h in arm CM0 ports 2023-04-20 15:13:11 -07:00
Paul Bartell 686b6e62eb
ARMv7M: Adjust implemented priority bit assertions (#665)
Adjust assertions related to the CMSIS __NVIC_PRIO_BITS and FreeRTOS
configPRIO_BITS configuration macros such that these macros specify the
minimum number of implemented priority bits supported by a config
build rather than the exact number of implemented priority bits.

Related to Qemu issue #1122
2023-04-20 10:54:54 +05:30
Vo Trung Chi aa987a3443
fix conversion warning (#658)
FreeRTOS-Kernel/portable/GCC/ARM_CM4F/port.c:399:41: error: conversion from 'uint32_t' {aka 'long unsigned int'} to 'uint8_t' {aka 'unsigned char'} may change value [-Werror=conversion]

Signed-off-by: Vo Trung Chi <chi.votrung@vn.bosch.com>
2023-04-04 08:10:54 -07:00
Nicolas 1b8a4244bd
add a missing comma (#651) 2023-03-29 18:53:45 +05:30
Gaurav-Aggarwal-AWS 68f105375f
Only add alignment padding when needed (#650)
Heap 4 and Heap 5 add some padding to ensure that the allocated blocks
are always aligned to portBYTE_ALIGNMENT bytes. The code until now was
adding padding always even if the resulting block was already aligned.
This commits updates the code to only add padding if the resulting block
is not aligned.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-03-28 17:01:37 +05:30
Gaurav-Aggarwal-AWS 97e58da313
Remove C90 requirement from CMakeLists (#649)
This is needed as it is breaking projects - https://forums.freertos.org/t/freertos-gcc-cmake/16984

We will re-evaluate and accordingly add this later.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-03-28 14:28:47 +05:30
kar-rahul-aws 99797e14e3
Cortex-M Assert when NVIC implements 8 PRIO bits (#639)
* Cortex-M Assert when NVIC implements 8 PRIO bits

* Fix CM3 ports

* Fix ARM_CM3_MPU

* Fix ARM CM3

* Fix ARM_CM4_MPU

* Fix ARM_CM4

* Fix GCC ARM_CM7

* Fix IAR ARM ports

* Uncrustify changes

* Fix MikroC_ARM_CM4F port

* Fix MikroC_ARM_CM4F port-(2)

* Fix RVDS ARM ports

* Revert changes for Tasking/ARM_CM4F port

* Revert changes for Tasking/ARM_CM4F port-(2)

* Update port.c

Fix GCC/ARM_CM4F port

* Update port.c

* update GCC\ARM_CM4F port

* update port.c

* Assert to check configMAX_SYSCALL_INTERRUPT_PRIORITY is set to higher priority

* Fix merge error: remove duplicate code

* Fix typos

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-17-174.ec2.internal>
2023-03-23 15:06:33 +05:30
Darian 9488ba22d8
Add functions to get the buffers of statically created objects (#641)
Added various ...GetStaticBuffer() functions to get the buffers of statically
created objects.
---------
Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: Nikhil Kamath <110539926+amazonKamath@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-03-22 15:27:57 -07:00
Gaurav-Aggarwal-AWS d4d5e43292
Run kernel demos and unit tests for PR changes (#645)
* Run kernel demos and unit tests for PR changes

Kernel demos check builds multiple demos from FreeRTOS/FreeRTOS and
unit tests check runs unit tests in FreeRTOS/FreeRTOS. Both of these
checks currently use main branch of FreeRTOS-Kernel. This commits
updates these checks to use the changes in the PR.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Do not specify PR SHA explicitly as that is default

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Remove explicit PR SHA from kernel checks

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-03-17 08:22:34 +05:30
Holden 55658e1525 Add missing FreeRTOS+ defines 2023-03-14 09:23:57 -07:00
Kody Stribrny 309a18a03a
Fix freertos_kernel cmake property, Posix Port (#640)
* Fix freertos_kernel cmake property, Posix Port

* Moves the `set_property()` call below the target definition in top level CMakeLists file
* Corrects billion value from `ULL` suffix (not C90 compliant) to `UL` suffix with cast to uint64_t

* Add blank line to CMakeLists.txt
2023-03-07 09:34:15 +05:30
Paul Bartell 7b26ea6263
Enable building the GCC Cortex-R5 port without an FPU (#586)
* Ensure configUSE_TASK_FPU_SUPPORT option is set correctly

If one does enable the FPU of the Cortex-R5 processor, then the GCC
compiler will define the macro __ARM_FP. This can be used to ensure,
that the configUSE_TASK_FPU_SUPPORT is set accordingly.

* Enable the implementation of vPortTaskUsesFPU only if configUSE_TASK_FPU_SUPPORT is set to 1

* Remove error case in pxPortInitialiseStack

The case of configUSE_TASK_FPU_SUPPORT is 0 is now handled

* Enable access to FPU registers only if FPU is enabled

* Make minor formating changes

* Format ARM Cortex-R5 port

* Address review comments from @ChristosZosi

* Minor code review suggestions

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-03-06 21:49:28 +05:30
Keith Packard 563c57e7da
Fix TLS and stack alignment when using picolibc (#637)
Both the TLS block and stack must be correctly aligned when using
picolibc. The architecture stack alignment is represented by the
portBYTE_ALIGNMENT_MASK and the TLS block alignment is provided by the
Picolibc _tls_align() inline function for Picolibc version 1.8 and
above. For older versions of Picolibc, we'll assume that the TLS block
requires the same alignment as the stack.

For downward growing stacks, this requires aligning the start of the
TLS block to the maximum of the stack alignment and the TLS
alignment. With this, both the TLS block and stack will now be
correctly aligned.

For upward growing stacks, the two areas must be aligned
independently; the TLS block is aligned from the start of the stack,
then the tls space is allocated, and then the stack is aligned above
that.

It's probably useful to know here that the linker ensures that
variables within the TLS block are assigned offsets that match their
alignment requirements. If the TLS block itself is correctly aligned,
then everything within will also be.

I have only tested the downward growing stack branch of this patch.

Signed-off-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-03-06 11:59:39 +05:30
Joseph Julicher ddd50d9a80
added portPOINTER_SIZE_TYPE and SIZE_MAX definition to PIC24/dsPIC port (#636)
* added portPOINTER_SIZE_TYPE definition to PIC24/dsPIC port

* Added SIZE_MAX definition to PIC24/dsPIC33
2023-03-03 19:01:16 -07:00
Nikhil Kamath 97acc2e54a
Introduced code coverage status badge (#635)
* Introduced code coverage status badge

* Trying to fix the URL checker issue

* Fix URL check

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-03-02 23:36:57 +05:30
Chris Copeland a9e1f66849
Interrupt priority assert improvements for CM3/4/7 (#602)
* Interrupt priority assert improvements for CM3/4/7

In the ARM_CM3, ARM_CM4, and ARM_CM7 ports, change the assertion that
`configMAX_SYSCALL_INTERRUPT_PRIORITY` is nonzero to account for the
number of priority bits implemented by the hardware.

Change these ports to also use the lowest priority for PendSV and
SysTick, ignoring `configKERNEL_INTERRUPT_PRIORITY`.

* Remove not needed configKERNEL_INTERRUPT_PRIORITY define

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-03-02 23:19:56 +05:30
Keith Packard c3e1df031e
Add Thread Local Storage (TLS) support using Picolibc functions (#343)
* Pass top of stack to configINIT_TLS_BLOCK

Picolibc wants to allocate the per-task TLS block within the stack
segment, so it will need to modify the top of stack value. Pass the
pxTopOfStack variable to make this explicit.

Signed-off-by: Keith Packard <keithpac@amazon.com>

* Move newlib-specific definitions to separate file

This reduces the clutter in FreeRTOS.h caused by having newlib-specific
macros present there.

Signed-off-by: Keith Packard <keithpac@amazon.com>

* Make TLS code depend only on configUSE_C_RUNTIME_TLS_SUPPORT

Remove reference to configUSE_NEWLIB_REENTRANT as that only works
when using newlib. configUSE_C_RUNTIME_TLS_SUPPORT is always
set when configUSE_NEWLIB_REENTRANT is set, so using both was
redundant in that case.

Signed-off-by: Keith Packard <keithpac@amazon.com>

* portable-ARC: Adapt ARC support to use generalized TLS support

With generalized thread local storage (TLS) support present in the
core, the two ARC ports need to have the changes to the TCB mirrored
to them.

Signed-off-by: Keith Packard <keithpac@amazon.com>

* Add Thread Local Storage (TLS) support using Picolibc functions

This patch provides definitions of the general TLS support macros in
terms of the Picolibc TLS support functions.

Picolibc is normally configured to use TLS internally for all
variables that are intended to be task-local, so these changes are
necessary for picolibc to work correctly with FreeRTOS.

The picolibc helper functions rely on elements within the linker
script to arrange the TLS data in memory and define some symbols.
Applications wanting to use this mechanism will need changes in their
linker script when migrating to picolibc.

Signed-off-by: Keith Packard <keithpac@amazon.com>

---------

Signed-off-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Keith Packard <keithpac@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-03-02 21:56:04 +05:30
Gaurav-Aggarwal-AWS e6514fb1ed
Remove C99 requirement from CMake file (#633)
* Remove C99 requirement from CMake file

The kernel source is C89 compliant and does not need C99.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Explicitly set C89 requirement for kernel

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-03-02 14:47:29 +05:30
Nikhil Kamath 0a70ecbb51
Introduced Github Status Badge for Unit Tests (#634)
* Introduced Github Status Badge for Unit Tests

* Github status badge to point to latest run

* Github status badge UT points to latest results

* Fixed URL for Github Status badge

---------

Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
2023-02-28 13:22:25 +05:30
Devaraj Ranganna 5fdbb7fd2b
Cortex-M35P: Add Cortex-M35P port (#631)
* Cortex-M35P: Add Cortex-M35P port

The Cortex-M35P support added to kernel. The port hasn't been
validated yet with TF-M. Hence TF-M support is not included in this
port.

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>

* Add portNORETURN to the newly added portmacro.h

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
2023-02-28 12:58:59 +05:30
jacky309 cd87681789
POSIX port fixes (#626)
* Fix types in POSIX port

Use TaskFunction_t and StackType_t as other ports do.

* Fix portTICK_RATE_MICROSECONDS in POSIX port

---------

Co-authored-by: Jacques GUILLOU <jacques.guillou.job@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-02-27 23:51:11 +05:30
phelter 8cd5451ad5
Feature/fixing clang gnu compiler warnings (#620)
* Adding in ability to support a library for freertos_config and a custom freertos_kernel_port (#558)

* Using single name definition for libraries everywhere. (#558)

* Supporting backwards compatibility with FREERTOS_CONFIG_FILE_DIRECTORY (#571)

* Removing compiler warnings for GNU and Clang. (#571)

* Added in documentation on how to consume from a main project. Added default PORT selection for native POSIX and MINGW platforms.

* Only adding freertos_config if it exists. Removing auto generation of it from a FREERTOS_CONFIG_FILE_DIRECTORY.

* Fixing clang and gnu compiler warnings.

* Adding in project information and how to compile for GNU/clang

* Fixing compiler issue with unused variable - no need to declare variable.

* Adding in compile warnings for linux builds that kernel is okay with using.

* Fixing more extra-semi-stmt clang warnings.

* Moving definition of hooks into header files if features are enabled.

* Fixing formatting with uncrustify.

* Fixing merge conflicts with main merge.

* Fixing compiler errors due to merge issues and formatting.

* Fixing Line feeds.

* Adding 'portNORETURN' into portmacros.h. Other Updates based on PR request

* Further clean-up of clang and clang-tidy issues.

* Removing compiler specific pragmas from common c files.

* Fixing missing lexicon entry and uncrustify formatting changes.

* Resolving merge issue multiple defnitions of proto for prvIdleTask

* Fixing formatting issues that are not covered by uncrustify. Use clang-tidy instead if you want this level of control.

* More uncrustify formatting issues.

* Fixing extra bracket in #if statement.

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-02-23 23:35:04 +05:30
Gaurav-Aggarwal-AWS 5d05601045
Fix build failure introduced in PR #597 (#629)
The PR #597 introduced a new config option configTICK_TYPE_WIDTH_IN_BITS
which can be defined to one of the following:
* TICK_TYPE_WIDTH_16_BITS - Tick type is 16 bit wide.
* TICK_TYPE_WIDTH_32_BITS - Tick type is 32 bit wide.
* TICK_TYPE_WIDTH_64_BITS - Tick type is 64 bit wide.

Earlier we supported 16 and 32 bit width for tick type which was
controlled using the config option configUSE_16_BIT_TICKS. The PR
tried to maintain backward compatibility by honoring
configUSE_16_BIT_TICKS. The backward compatibility did not work as
expected though, as the macro configTICK_TYPE_WIDTH_IN_BITS was used
before it was defined. This PR addresses it by ensuring that the macro
configTICK_TYPE_WIDTH_IN_BITS is defined before it is used.

Testing
1. configUSE_16_BIT_TICKS is defined to 0.

Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```

Assembly:
```
109e:       4b50            ldr     r3, [pc, #320]  ; (11e0 <xTaskIncrementTick+0x150>)
10a0:       f8d3 4134       ldr.w   r4, [r3, #308]  ; 0x134
10a4:       3401            adds    r4, #1
10a6:       f8c3 4134       str.w   r4, [r3, #308]  ; 0x134
```

It is clear from assembly that the tick type is 32 bit.

2. configUSE_16_BIT_TICKS is defined to 1.

Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```

Assembly:
```
10e2:       4b53            ldr     r3, [pc, #332]  ; (1230 <xTaskIncrementTick+0x15c>)
10e4:       f8b3 4134       ldrh.w  r4, [r3, #308]  ; 0x134
10e8:       b2a4            uxth    r4, r4
10ea:       3401            adds    r4, #1
10ec:       b2a4            uxth    r4, r4
10ee:       f8a3 4134       strh.w  r4, [r3, #308]  ; 0x134
```

It is clear from assembly that the tick type is 16 bit.

3. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_16_BITS.

Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```

Assembly:
```
10e2:       4b53            ldr     r3, [pc, #332]  ; (1230 <xTaskIncrementTick+0x15c>)
10e4:       f8b3 4134       ldrh.w  r4, [r3, #308]  ; 0x134
10e8:       b2a4            uxth    r4, r4
10ea:       3401            adds    r4, #1
10ec:       b2a4            uxth    r4, r4
10ee:       f8a3 4134       strh.w  r4, [r3, #308]  ; 0x134
```

It is clear from assembly that the tick type is 16 bit.

4. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_32_BITS.

Source (function xTaskIncrementTick in tasks.c):
```
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
```

Assembly:
```
109e:       4b50            ldr     r3, [pc, #320]  ; (11e0 <xTaskIncrementTick+0x150>)
10a0:       f8d3 4134       ldr.w   r4, [r3, #308]  ; 0x134
10a4:       3401            adds    r4, #1
10a6:       f8c3 4134       str.w   r4, [r3, #308]  ; 0x134
```

It is clear from assembly that the tick type is 32 bit.

5. configTICK_TYPE_WIDTH_IN_BITS is defined to TICK_TYPE_WIDTH_64_BITS.

```
 #error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
```

The testing was done for GCC/ARM_CM3 port which does not support 64 bit
tick type.

6. Neither configUSE_16_BIT_TICKS nor configTICK_TYPE_WIDTH_IN_BITS
defined.

```
 #error Missing definition:  One of configUSE_16_BIT_TICKS and
 configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h.
 See the Configuration section of the FreeRTOS API documentation for
 details.
```

7. Both configUSE_16_BIT_TICKS and configTICK_TYPE_WIDTH_IN_BITS defined.

```
 #error Only one of configUSE_16_BIT_TICKS and
 configTICK_TYPE_WIDTH_IN_BITS must be defined in FreeRTOSConfig.h.
 See the Configuration section of the FreeRTOS API documentation for
 details.
```

Related issue - https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/628

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-02-23 09:37:42 +05:30
Aniruddha Kanhere ba1deb54e8
Update PR template to include checkbox for Unit Test related changes (#627) 2023-02-20 13:16:57 -08:00
Ju1He1 8252edec45
Do not call exit() on MSVC Port when calling vPortEndScheduler (#624)
* make port exitable

* correctly set xPortRunning to False

* add suggestions from Review

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* add suggestions from Review

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-02-15 11:40:32 +05:30
bbain 050cf0d80f
Introduce portMEMORY_BARRIER for Microblaze port. (#621)
The introduction of `portMEMORY_BARRIER` will ensure
the places in the kernel use a barrier will work.
For example, `xTaskResumeAll` has a memory barrier
to ensure its correctness when compiled with optimization
enabled. Without the barrier `xTaskResumeAll` can fail
(e.g. start reading and writing to address 0 and/or
infinite looping) when `xPendingReadyList` contains more
than one task to restore.

In `xTaskResumeAll` the compiler chooses to cache the
`pxTCB` the first time through the loop for use
in every subsequent loop. This is incorrect as the
removal of `pxTCB->xEventListItem` will actually
change the value of `pxTCB` if it was read again
at the top of the loop. The barrier forces the compiler
to read `pxTCB` again at the top of the loop.

The compiler is operating correctly. The removal
`pxTCB->xEventListItem` executes on a `List_t *`
and `ListItem_t *`.  This means that the compiler
can assume that any `MiniListItem_t` values are
unchanged by the loop (i.e. "strict-aliasing").
This allows the compiler to cache `pxTCB` as it
is obtained via a `MiniListItem_t`. This is incorrect
in this case because it is possible for a `ListItem_t *`
to actually alias a `MiniListItem_t`. This is technically
a "violation of aliasing rules" so we use the the barrier
to disable the strict-aliasing optimization in this loop.
2023-02-13 10:28:20 +05:30
Dusan Cervenka 91c20f5f42
Added support of 64bit events. (#597)
* Added support of 64bit even

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Added missing brackets

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Made proper name for tick macro.

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Improved macro evaluation

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Fixed missed port files  + documentation

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Changes made on PR

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Fix macro definition.

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

* Formatted code with uncrustify

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>

---------

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
2023-02-03 07:34:02 -07:00
David J. Fiddes 260a37c082
Fix some CMake documentation typos (#616)
The quick start instructions for CMake mention the "master"
git branch which has been replaced by "main" in the current
repo.

The main CMakeLists.txt documents how to integrate a
custom port. Fix a typo in the suggested CMake code.
2023-01-23 22:46:24 +05:30
Chris Copeland 78319fd17e
Add ulTaskGetRunTimeCounter and ulTaskGetRunTimePercent (#611)
Allow ulTaskGetIdleRunTimeCounter and ulTaskGetIdleRunTimePercent to be
used whenever configGENERATE_RUN_TIME_STATS is enabled, as this is the
only requirement for these functions to work.
2023-01-19 14:46:42 -08:00
Gaurav-Aggarwal-AWS 8592fd23f4
Update FreeRTOS/FreeRTOS build checks (#613)
This is needed to be compatible with the refactoring done in this
PR - https://github.com/FreeRTOS/FreeRTOS/pull/889

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2023-01-16 15:06:18 +05:30
chinglee-iot bb6071e1df
Update equal priority task preemption (#603)
* vTaskResume and vTaskPrioritySet don't preempt equal priority task

* Update vTaskResumeAll not to preempt task with equal priority

* Fix in xTaskResumeFromISR
2023-01-06 10:42:13 +08:00
tcpluess 6d65558ba0
move the prototype for vApplicationIdleHook to task.h. (#600)
Co-authored-by: pluess <pluess@faulhorn.mw.iap.unibe.ch>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2022-12-19 15:18:07 +05:30
Archit Gupta 99d3d54ac4
Fix array-bounds compiler warning on gcc11+ in list.h (#580)
listGET_OWNER_OF_NEXT_ENTRY computes `( pxConstList )->pxIndex->pxNext` after
verifying that `( pxConstList )->pxIndex` points to `xListEnd`, which due to
being a MiniListItem_t, can be shorter than a ListItem_t. Thus,
`( pxConstList )->pxIndex` is a `ListItem_t *` that extends past the end of the
`List_t` whose `xListEnd` it points to. This is fixed by accessing `pxNext`
through a `MiniListItem_t` instead.
2022-12-15 13:46:32 -08:00
Paul Bartell 91927abc0b Introduce .git-blame-ignore-revs
The .git-blame-ignore-revs allows easy filtering out large commits
from calls to git blame.

This can be configured frome the git command line via the following:
git config blame.ignoreRevsFile .git-blame-ignore-revs
2022-11-29 15:38:47 -08:00
Paul Bartell 01820d3ed9 Normalize line endings and whitespace in source files 2022-11-29 15:38:47 -08:00
Paul Bartell 151fb04ad1 ci: Enforce unix-style LF line endings 2022-11-29 15:38:47 -08:00
Paul Bartell 779402c39f Enable automatic EOL conversion by git
Fix EOL of .gitattributes
2022-11-29 15:38:47 -08:00
Kody Stribrny 1d59f65007
Add IAR RISC-V 32 Embedded Extension Support (#588)
Adds RV32E support to the IAR port. This is done by
reducing our register usage to the first 16 registers
only.

Influenced by changes in https://github.com/FreeRTOS/FreeRTOS-Kernel/pull/543

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-11-29 14:55:18 -08:00
Paul Bartell b213ad8b6e Remove croutine.c from RP2040 cmake include file 2022-11-28 11:46:15 -08:00
Paul Bartell 3d28cdaae4 Remove xCoRoutineHandle definition from FreeRTOS.h 2022-11-28 11:46:15 -08:00
Paul Bartell 893b6b26ab Remove coroutine references from MISRA exception comments 2022-11-28 11:46:15 -08:00
tcpluess 04dfb70db4
parenthesize expression-like macro (#592)
* parenthesize expression-like macro

* fixed wrong indentation
2022-11-28 12:18:29 +05:30
Paul Bartell b3b097b4c7 README.md: Remove coroutine references. 2022-11-23 09:52:28 -08:00
Paul Bartell df99587e03 CMakeLists.txt: Remove croutine.c from CMakeLists.txt
CMakeLists.txt: Remove croutine.c
2022-11-23 09:52:28 -08:00
Paul Bartell fbfbc1a2fb Remove coroutine terms from lexicon 2022-11-23 09:52:28 -08:00
Paul Bartell d98625239b Remove coroutines from FreeRTOS-Kernel. 2022-11-23 09:52:28 -08:00
Aniruddha Kanhere 5f7ca3a55f Make unit-test run on 20.04 ubuntu 2022-11-18 10:29:30 -08:00
Aniruddha Kanhere 0a2ad87dea Update kernel-checks.yml 2022-11-18 10:29:30 -08:00
Aniruddha Kanhere d7435b9333 Update ci.yml 2022-11-18 10:29:30 -08:00
Aniruddha Kanhere cdf37ae142 Update actions to use 20.04 ubuntu 2022-11-18 10:29:30 -08:00
Paul Helter 1b8bb88109 Only adding freertos_config if it exists. Removing auto generation of it from a FREERTOS_CONFIG_FILE_DIRECTORY. 2022-11-18 10:29:30 -08:00
Paul Helter 01987eb1c5 Added in documentation on how to consume from a main project. Added default PORT selection for native POSIX and MINGW platforms. 2022-11-18 10:29:30 -08:00
Paul Helter 927ad2d8e5 Removing compiler warnings for GNU and Clang. (#571) 2022-11-18 10:29:30 -08:00
Paul Helter 5287c01b3d Supporting backwards compatibility with FREERTOS_CONFIG_FILE_DIRECTORY (#571) 2022-11-18 10:29:30 -08:00
Paul Helter f6b7bd6553 Using single name definition for libraries everywhere. (#558) 2022-11-18 10:29:30 -08:00
Paul Helter 8ede7101af Adding in ability to support a library for freertos_config and a custom freertos_kernel_port (#558) 2022-11-18 10:29:30 -08:00
Soren Ptak f5f6fd5201
Version Change (#587)
* Updating to version v10.5.1

Co-authored-by: Soren Ptak <skptak@amazon.com>
2022-11-17 17:29:55 -08:00
ChristosZosi cd1f51cb5e
Add support for the configUSE_TASK_FPU_SUPPORT constant in the GCC/ARM_CR5 port (#584)
* Add support for the configUSE_TASK_FPU_SUPPORT in the GCC/ARM_CR5 port

This is done almost identically as in the GCC/ARM_CA9 port

* Adjust task stack initialitation of the GCC/ARM_CR5 port

Ensure that the task stack initialization is done correctly for the
different options of configUSE_TASK_FPU_SUPPORT.

This is very similar to the GCC/ARM_CA9 port. The only meaningful
difference is, that the FPU of the Cortex-R5 has just sixteen 64-bit
floating point registers as it implements the VFPv3-D16 architecture.
You may also refer to the ARM documentation

* Add support for FPU safe interrupts to the GCC/ARM_CR5 port

Similar to GCC/ARM_CA9 port

* Clarify comment about the size of the FPU registers of Cortex R5
2022-11-14 10:48:47 +05:30
Gaurav-Aggarwal-AWS 1072988de7
Fix context switch when time slicing is off (#568)
* Fix context switch when time slicing is off

When time slicing is off, context switch should only happen when a
task with priority higher than the currently executing one is unblocked.
Earlier the code was invoking a context switch even when a task with
priority equal the currently executing task was unblocked. This commit
fixes the code to only do a context switch when a higher priority
task is unblocked.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-11-08 14:05:35 +05:30
Gaurav-Aggarwal-AWS 44e02bff31
Update Cortex-M55 and Cortex-M85 ports (#579)
These were missed when PR #59 was merged.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-10-28 10:41:56 +05:30
RichardBarry d7b712668d
Update the NIOSII port to enable longer jumps (#578)
Update the NIOSII port so it works on systems with more RAM as
per https://forums.freertos.org/t/nios-ii-r-nios2-call26-noat-linker-error/16028
2022-10-20 10:34:53 +05:30
Niklas Gürtler 4e2bf2c639
Removed the 'configASSERT( xInheritanceOccurred == pdFALSE )' assertion from xQueueSemaphoreTake as the reasoning behind it is wrong; it can trigger on wrongly on highly-contested semaphores on multicore systems. See https://forums.freertos.org/t/15967 (#576)
Co-authored-by: Niklas Gürtler <niklas.guertler@tacterion.com>
2022-10-13 22:52:24 +05:30
arshi016 1d20f0eba2
Add warning message to ensure min stack size (#575)
Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>
2022-10-12 09:47:02 +05:30
Laukik Hase 963abe6c48
Updated ESP32 port-layer to ESP-IDF v4.4.2 (#572)
* Xtensa_ESP32: Added esp-idf v4.4.2 specific changes

* Xtensa_ESP32: Updated SPDX license identifiers
2022-10-11 14:27:32 -07:00
Jeff Tenney 195a351ec7
Tickless idle fixes/improvement (#59)
* Fix tickless idle when stopping systick on zero...

...and don't stop SysTick at all in the eAbortSleep case.

Prior to this commit, if vPortSuppressTicksAndSleep() happens to stop
the SysTick on zero, then after tickless idle ends, xTickCount advances
one full tick more than the time that actually elapsed as measured by
the SysTick.  See "bug 1" in this forum post:
https://forums.freertos.org/t/ultasknotifytake-timeout-accuracy/9629/40

SysTick
-------
The SysTick is the hardware timer that provides the OS tick interrupt
in the official ports for Cortex M.  SysTick starts counting down from
the value stored in its reload register.  When SysTick reaches zero, it
requests an interrupt.  On the next SysTick clock cycle, it loads the
counter again from the reload register.  To get periodic interrupts
every N SysTick clock cycles, the reload register must be N - 1.

Bug Example
-----------
- Idle task calls vPortSuppressTicksAndSleep(xExpectedIdleTime = 2).
  [Doesn't have to be "2" -- could be any number.]
- vPortSuppressTicksAndSleep() stops SysTick, and the current-count
  register happens to stop on zero.
- SysTick ISR executes, setting xPendedTicks = 1
- vPortSuppressTicksAndSleep() masks interrupts and calls
  eTaskConfirmSleepModeStatus() which confirms the sleep operation. ***
- vPortSuppressTicksAndSleep() configures SysTick for 1 full tick
  (xExpectedIdleTime - 1) plus the current-count register (which is 0)
- One tick period elapses in sleep.
- SysTick wakes CPU, ISR executes and increments xPendedTicks to 2.
- vPortSuppressTicksAndSleep() calls vTaskStepTick(1), then returns.
- Idle task resumes scheduler, which increments xTickCount twice (for
  xPendedTicks = 2)

In the end, two ticks elapsed as measured by SysTick, but the code
increments xTickCount three times.  The root cause is that the code
assumes the SysTick current-count register always contains the number of
SysTick counts remaining in the current tick period.  However, when the
current-count register is zero, there are ulTimerCountsForOneTick
counts remaining, not zero.  This error is not the kind of time slippage
normally associated with tickless idle.

*** Note that a recent commit https://github.com/FreeRTOS/FreeRTOS-Kernel/commit/e1b98f0
results in eAbortSleep in this case, due to xPendedTicks != 0.  That
commit does mostly resolve this bug without specifically mentioning
it, and without this commit.  But that resolution allows the code in
port.c not to directly address the special case of stopping SysTick on
zero in any code or comments.  That commit also generates additional
instances of eAbortSleep, and a second purpose of this commit is to
optimize how vPortSuppressTicksAndSleep() behaves for eAbortSleep, as
noted below.

This commit also includes an optimization to avoid stopping the SysTick
when eTaskConfirmSleepModeStatus() returns eAbortSleep.  This
optimization belongs with this fix because the method of handling the
SysTick being stopped on zero changes with this optimization.

* Fix imminent tick rescheduled after tickless idle

Prior to this commit, if something other than systick wakes the CPU from
tickless idle, vPortSuppressTicksAndSleep() might cause xTickCount to
increment once too many times.  See "bug 2" in this forum post:
https://forums.freertos.org/t/ultasknotifytake-timeout-accuracy/9629/40

SysTick
-------
The SysTick is the hardware timer that provides the OS tick interrupt
in the official ports for Cortex M.  SysTick starts counting down from
the value stored in its reload register.  When SysTick reaches zero, it
requests an interrupt.  On the next SysTick clock cycle, it loads the
counter again from the reload register.  To get periodic interrupts
every N SysTick clock cycles, the reload register must be N - 1.

Bug Example
-----------
- CPU is sleeping in vPortSuppressTicksAndSleep()
- Something other than the SysTick wakes the CPU.
- vPortSuppressTicksAndSleep() calculates the number of SysTick counts
  until the next tick.  The bug occurs only if this number is small.
- vPortSuppressTicksAndSleep() puts this small number into the SysTick
  reload register, and starts SysTick.
- vPortSuppressTicksAndSleep() calls vTaskStepTick()
- While vTaskStepTick() executes, the SysTick expires.  The ISR pends
  because interrupts are masked, and SysTick starts a 2nd period still
  based on the small number of counts in its reload register.  This 2nd
  period is undesirable and is likely to cause the error noted below.
- vPortSuppressTicksAndSleep() puts the normal tick duration into the
  SysTick's reload register.
- vPortSuppressTicksAndSleep() unmasks interrupts before the SysTick
  starts a new period based on the new value in the reload register.
  [This is a race condition that can go either way, but for the bug
  to occur, the race must play out this way.]
- The pending SysTick ISR executes and increments xPendedTicks.
- The SysTick expires again, finishing the second very small period, and
  starts a new period this time based on the full tick duration.
- The SysTick ISR increments xPendedTicks (or xTickCount) even though
  only a tiny fraction of a tick period has elapsed since the previous
  tick.

The bug occurs when *two* consecutive small periods of the SysTick are
both counted as ticks.  The root cause is a race caused by the small
SysTick period.  If vPortSuppressTicksAndSleep() unmasks interrupts
*after* the small period expires but *before* the SysTick starts a
period based on the full tick period, then two small periods are
counted as ticks when only one should be counted.

The end result is xTickCount advancing nearly one full tick more than
time actually elapsed as measured by the SysTick.  This is not the kind
of time slippage normally associated with tickless idle.

After this commit the code starts the SysTick and then immediately
modifies the reload register to ensure the very short cycle (if any) is
conducted only once.  This strategy requires special consideration for
the build option that configures SysTick to use a divided clock.  To
avoid waiting around for the SysTick to load value from the reload
register, the new code temporarily configures the SysTick to use the
undivided clock.  The resulting timing error is typical for tickless
idle.  The error (commonly known as drift or slippage in kernel time)
caused by this strategy is equivalent to one or two counts in
ulStoppedTimerCompensation.

This commit also updates comments and #define symbols related to the
SysTick clock option.  The SysTick can optionally be clocked by a
divided version of the CPU clock (commonly divide-by-8).  The new code
in this commit adjusts these comments and symbols to make them clearer
and more useful in configurations that use the divided clock.  The fix
made in this commit requires the use of these symbols, as noted in the
code comments.

* Fix tickless idle with alternate systick clocking

Prior to this commit, in configurations using the alternate SysTick
clocking, vPortSuppressTicksAndSleep() might cause xTickCount to jump
ahead as much as the entire expected idle time or fall behind as much
as one full tick compared to time as measured by the SysTick.

SysTick
-------
The SysTick is the hardware timer that provides the OS tick interrupt
in the official ports for Cortex M. SysTick starts counting down from
the value stored in its reload register. When SysTick reaches zero, it
requests an interrupt. On the next SysTick clock cycle, it loads the
counter again from the reload register. The SysTick has a configuration
option to be clocked by an alternate clock besides the core clock.
This alternate clock is MCU dependent.

Scenarios Fixed
---------------
The new code in this commit handles the following scenarios that were
not handled correctly prior to this commit.

1. Before the sleep, vPortSuppressTicksAndSleep() stops the SysTick on
zero, long after SysTick reached zero.  Prior to this commit, this
scenario caused xTickCount to jump ahead one full tick for the same
reason documented here: 0c7b04bd3a

2. After the sleep, vPortSuppressTicksAndSleep() stops the SysTick
before it loads the counter from the reload register.  Prior to this
commit, this scenario caused xTickCount to jump ahead by the entire
expected idle time (xExpectedIdleTime) because the current-count
register is zero before it loads from the reload register.

3. Prior to return, vPortSuppressTicksAndSleep() attempts to start a
short SysTick period when the current SysTick clock cycle has a lot of
time remaining.  Prior to this commit, this scenario could cause
xTickCount to fall behind by as much as nearly one full tick because the
short SysTick cycle never started.

Note that #3 is partially fixed by 967acc9b20
even though that commit addresses a different issue.  So this commit
completes the partial fix.

* Improve comments and name of preprocessor symbol

Add a note in the code comments that SysTick requests an interrupt when
decrementing from 1 to 0, so that's why stopping SysTick on zero is a
special case.  Readers might unknowingly assume that SysTick requests
an interrupt when wrapping from 0 back to the load-register value.

Reconsider new "_SETTING" suffix since "_CONFIG" suffix seems more
descriptive.  The code relies on *both* of these preprocessor symbols:

portNVIC_SYSTICK_CLK_BIT
portNVIC_SYSTICK_CLK_BIT_CONFIG  **new**

A meaningful suffix is really helpful to distinguish the two symbols.

* Revert introduction of 2nd name for NVIC register

When I added portNVIC_ICSR_REG I didn't realize there was already a
portNVIC_INT_CTRL_REG, which identifies the same register.  Not good
to have both.  Note that portNVIC_INT_CTRL_REG is defined in portmacro.h
and is already used in this file (port.c).

* Replicate to other Cortex M ports

Also set a new fiddle factor based on tests with a CM4F.  I used gcc,
optimizing at -O1.  Users can fine-tune as needed.

Also add configSYSTICK_CLOCK_HZ to the CM0 ports to be just like the
other Cortex M ports.  This change allowed uniformity in the default
tickless implementations across all Cortex M ports.  And CM0 is likely
to benefit from configSYSTICK_CLOCK_HZ, especially considering new CM0
devices with very fast CPU clock speeds.

* Revert changes to IAR-CM0-portmacro.h

portNVIC_INT_CTRL_REG was already defined in port.c.  No need to define
it in portmacro.h.

* Handle edge cases with slow SysTick clock

Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
Co-authored-by: abhidixi11 <44424462+abhidixi11@users.noreply.github.com>
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>
2022-10-03 12:39:17 -07:00
Gaurav-Aggarwal-AWS 6311ad13b9
Update doc comments in task.h (#570)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-09-28 21:42:05 +05:30
Cristian Cristea 24ade42a37
Added better pointer declaration readability (#567)
* Add better pointer declaration readability

I revised the declaration of single-line pointers by splitting it into
multiple lines. Now, every pointer is declared (and initialized
accordingly) on its own line. This refactoring should enhance
readability and decrease the probability of error when a new pointer is
added/removed or a current one has its initialization value modified.

Signed-off-by: Cristian Cristea <cristiancristea00@gmail.com>

* Remove unnecessary whitespace characters and lines

It removes whitespace characters at the end of lines (empty or
othwerwise) and clear lines at the end of the file (only one remains).
It is an automatic operation done by git.

Signed-off-by: Cristian Cristea <cristiancristea00@gmail.com>

Signed-off-by: Cristian Cristea <cristiancristea00@gmail.com>
2022-09-26 14:43:30 -07:00
Ming Yue f789a0e790
Update RISC-V IAR port to support vector mode. (#458)
* Update RISC-V IAR port to support vector mode.

* uncrustify

Co-authored-by: David Chalco <david@chalco.io>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>
2022-09-20 15:32:41 -07:00
Gaurav Aggarwal 49777e3387 Update History.txt as per the PR feedback
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-09-17 00:03:08 +05:30
Gaurav Aggarwal 8e4be9ff1b Update History.txt
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-09-17 00:03:08 +05:30
Gaurav Aggarwal 331362d45a Restrict unpriv task to invoke code with privilege
It was possible for an unprivileged task to invoke any function with
privilege by passing it as a parameter to MPU_xTaskCreate,
MPU_xTaskCreateStatic, MPU_xTimerCreate, MPU_xTimerCreateStatic, or
MPU_xTimerPendFunctionCall.

This commit ensures that MPU_xTaskCreate and MPU_xTaskCreateStatic can
only create unprivileged tasks. It also removes the following APIs:
1. MPU_xTimerCreate
2. MPU_xTimerCreateStatic
3. MPU_xTimerPendFunctionCall

We thank Huazhong University of Science and Technology for reporting
this issue.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-09-17 00:03:08 +05:30
Gaurav Aggarwal 79704b8213 Remove local stack variable form MPU wrappers
It was possible for a third party that had already independently gained
the ability to execute injected code to achieve further privilege
escalation by branching directly inside a FreeRTOS MPU API wrapper
function with a manually crafted stack frame. This commit removes the
local stack variable `xRunningPrivileged` so that a manually crafted
stack frame cannot be used for privilege escalation by branching
directly inside a FreeRTOS MPU API wrapper.

We thank Certibit Consulting, LLC, Huazhong University of Science and
Technology and the SecLab team at Northeastern University for reporting
this issue.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-09-17 00:03:08 +05:30
Gaurav Aggarwal c2d616eaee Make RAM regions non-executable
This commit makes the privileged RAM and stack regions non-executable.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-09-17 00:03:08 +05:30
Gaurav Aggarwal ea9c26f524 Use highest numbered MPU regions for kernel
ARMv7-M allows overlapping MPU regions. When 2 MPU regions overlap, the
MPU configuration of the higher numbered MPU region is applied. For
example, if a memory area is covered by 2 MPU regions 0 and 1, the
memory permissions for MPU region 1 are applied.

We use 5 MPU regions for kernel code and kernel data protections and
leave the remaining for the application writer. We were using lowest
numbered MPU regions (0-4) for kernel protections and leaving the
remaining for the application writer. The application writer could
configure those higher numbered MPU regions to override kernel
protections.

This commit changes the code to use highest numbered MPU regions for
kernel protections and leave the remaining for the application writer.
This ensures that the application writer cannot override kernel
protections.

We thank the SecLab team at Northeastern University for reporting this
issue.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-09-17 00:03:08 +05:30
Paul Bartell ca099b9e9b
Update CMakeLists.txt for Cortex-M55 and Cortex-M85 ports (#560)
* Annotate ports CMakeLists.txt with port details

* CMake: Add Cortex-M55 and Cortex-M85 ports
2022-09-16 12:30:11 +05:30
Paul Bartell ff88fc8b6c
portable-RP2040: Fix typo in README.md (#559)
Replace "import" with "include" in cmake code sample.
2022-09-14 12:13:10 +05:30
Gabor Toth 030e76681b
M85 support (#556)
* Extend support to Arm Cortex-M85

Signed-off-by: Gabor Toth <gabor.toth@arm.com>
Change-Id: I679ba8e193638126b683b651513f08df445f9fe6

* Add generated Cortex-M85 support files

Signed-off-by: Gabor Toth <gabor.toth@arm.com>
Change-Id: Ib329d88623c2936ffe3e9a24f5d6e07655e4e5c8

* Extend Trusted Firmware M port

Extend Trusted Firmware M port to Cortex-M23,
Cortex-M55 and Cortex-M85.

Signed-off-by: Gabor Toth <gabor.toth@arm.com>
Change-Id: If8f1081acfd04e547b3227579e70e355a6adffe3

* Re-run copy_files.py script

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Signed-off-by: Gabor Toth <gabor.toth@arm.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-09-13 22:08:25 +05:30
newbrain c09187e73b
Update of three badly terminated macro definitions (#555)
* Update of three badly terminated macro definitions
- vTaskDelayUntil() to conform to usual pattern do { ... } while(0)
- vTaskNotifyGiveFromISR() and
- vTaskGenericNotifyGiveFromISR() to remove extra terminating semicolons
- This PR addresses issues #553 and #554

* Adjust formatting of task.h

Co-authored-by: Paul Bartell <pbartell@amazon.com>
2022-09-08 10:33:41 -07:00
Aniruddha Kanhere 6324f6fc3e
Added checks for index in ThreadLocalStorage APIs (#552)
Added checks for ( xIndex >= 0 ) in ThreadLocalStorage APIs
2022-09-01 13:23:02 -07:00
Jakub Lužný d91cd6fd05
RISC-V: Add support for RV32E extension in GCC port (#543)
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
2022-08-30 16:49:37 -07:00
Octaviarius dc8f8be53e
[Fix] Type for pointers operations (#550)
* fix type for pointers operations in some places: size_t -> portPOINTER_SIZE_TYPE

* fix pointer arithmetics

* fix xAddress type
2022-08-30 13:27:39 -07:00
Gaurav-Aggarwal-AWS ac69aa858a
Add FreeRTOS config directory to include dirs (#548)
This allows the application write to set FREERTOS_CONFIG_FILE_DIRECTORY
to whichever directory the FreeRTOSConfig.h file exists in.

This was reported here - https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/545

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-08-22 20:58:07 +05:30
Monika Singh 11c72bc075
Add support for MISRA rule 20.7 (#546)
Misra rule 20.7 requires parenthesis to all parameter names
in macro definitions.

The issue was reported here : https://forums.freertos.org/t/misra-20-7-compatibility/15385
2022-08-19 15:51:57 +05:30
Archit Gupta 992ff1bb50
Fix warnings in posix port (#544)
Fixes warnings about unused parameters and variables when built with
`-Wall -Wextra`.
2022-08-16 16:41:17 +05:30
Paul Bartell 48ad473891 correct grammar in include/FreeRTOS.h
Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com>
2022-08-10 10:14:56 -07:00
Paul Bartell ab25da6087 Fix formatting of FreeRTOS.h 2022-08-10 10:14:56 -07:00
RichardBarry c2bbe92cab Move some of the complex pre-processor guards on prvWriteNameToBuffer() to compile time checks in FreeRTOS.h.
Co-authored-by: Paul Bartell <pbartell@amazon.com>
2022-08-10 10:14:56 -07:00
RichardBarry 8741c4f919
Include string.h at the top of portable/GCC/ARM_CA9/port.c to prevent memset() generating a warning. (#430)
Co-authored-by: none <unknown>
2022-08-09 10:37:24 -07:00
Ravishankar Bhagavandas b0a8bd8f28
Change default value of INCLUDE_xTaskGetCurrentTaskHandle (#542) 2022-08-09 09:48:44 -07:00
Gaurav-Aggarwal-AWS 95669cc1a1
Generalize Thread Local Storage (TLS) support (#540)
* Generalize Thread Local Storage (TLS) support

FreeRTOS's Thread Local Storage (TLS) support used variables and
functions from newlib, thereby making the TLS support specific to
newlib. This commit generalizes the TLS support so that it can be used
with other c-runtime libraries also. The default behavior for newlib
support is still kept same for backward compatibility.

The application writer would need to set configUSE_C_RUNTIME_TLS_SUPPORT
to 1 in their FreeRTOSConfig.h and define the following macros to
support TLS for a c-runtime library:

1. configTLS_BLOCK_TYPE - Type used to define the TLS block in TCB.
2. configINIT_TLS_BLOCK( xTLSBlock ) - Allocate and initialize memory
   block for the task's TLS Block.
3. configSET_TLS_BLOCK( xTLSBlock ) - Switch C-Runtime's TLS Block to
   point to xTLSBlock.
4. configDEINIT_TLS_BLOCK( xTLSBlock ) - Free up the memory allocated
   for the task's TLS Block.

The following is an example to support TLS for picolibc:

 #define configUSE_C_RUNTIME_TLS_SUPPORT        1
 #define configTLS_BLOCK_TYPE                   void*
 #define configINIT_TLS_BLOCK( xTLSBlock )      _init_tls( xTLSBlock )
 #define configSET_TLS_BLOCK( xTLSBlock )       _set_tls( xTLSBlock )
 #define configDEINIT_TLS_BLOCK( xTLSBlock )

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-08-08 21:23:29 +05:30
Gaurav-Aggarwal-AWS 3b18a07568
Add .syntax unified to GCC assembly functions (#538)
This fixes the compilation issue with XC32 compiler.

It was reported here - https://forums.freertos.org/t/xc32-v4-00-error-with-building-freertos-portasm-c/14357/4

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Co-authored-by: Paul Bartell <pbartell@amazon.com>
2022-08-07 22:46:11 +05:30
Gaurav-Aggarwal-AWS 4649d58899
Update History.txt (#535)
* Update History.txt

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-08-07 22:31:47 +05:30
Chris Copeland fc615627f6
Block SIG_RESUME in the main thread of the Posix port so that sigwait works as expected (#532)
Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>
2022-08-04 11:11:31 -07:00
Ravishankar Bhagavandas 4a8c06689e
Change type of message buffer handle (#537) 2022-08-04 10:07:49 -07:00
Gaurav Aggarwal 618e165fa7 Fix NULL pointer dereference in vPortGetHeapStats
When the heap is exhausted (no free block), start and end markers are
the only blocks present in the free block list:

     +---------------+     +-----------> NULL
     |               |     |
     |               V     |
+ ----- +            + ----- +
|   |   |            |   |   |
|   |   |            |   |   |
+ ----- +            + ----- +
  xStart               pxEnd

The code block which traverses the list of free blocks to calculate heap
stats used a do..while loop that moved past the end marker when the heap
had no free block resulting in a NULL pointer dereference. This commit
changes the do..while loop to while loop thereby ensuring that we never
move past the end marker.

This was reported here - https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/534

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-08-04 09:57:59 -07:00
Gaurav-Aggarwal-AWS dc9c034c85
Add vPortRemoveInterruptHandler API (#533)
* Add xPortRemoveInterruptHandler API

This API is added to the MicroBlazeV9 port. It enables the application
writer to remove an interrupt handler.

This was originally contributed in this PR - https://github.com/FreeRTOS/FreeRTOS-Kernel/pull/523

* Change API signature to return void

This makes the API similar to vPortDisableInterrupt.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Co-authored-by: Gavin Lambert <uecasm@users.noreply.github.com>
2022-08-03 13:45:27 -07:00
Paul Bartell 2070d9d3e5 Update codecov action to v3.1.0 2022-08-03 11:42:42 -07:00
Gavin Lambert 63f86fc7a2
Implement MicroBlazeV9 stack protection (#523)
* Implement stack protection for MicroBlaze (without MPU wrappers)
2022-08-03 12:01:18 +05:30
Patrick Oppenlander bfe057367d
add portDONT_DISCARD to pxCurrentTCB (#479)
This fixes link failures with LTO:

/tmp/ccJbaKaD.ltrans0.ltrans.o: in function `pxCurrentTCBConst2':
/root/project/FreeRTOS/portable/GCC/ARM_CM4F/port.c:249: undefined reference to `pxCurrentTCB'
/usr/lib/gcc/arm-none-eabi/11.2.0/../../../../arm-none-eabi/bin/ld: /tmp/ccJbaKaD.ltrans0.ltrans.o: in function `pxCurrentTCBConst':
/root/project/FreeRTOS/portable/GCC/ARM_CM4F/port.c:443: undefined reference to `pxCurrentTCB'
2022-08-02 16:09:58 +05:30
Xin Lin c22f40d9a5
Add SBOM Generation in auto_release.yml (#524) 2022-07-28 10:35:29 -07:00
0xjakob 349e803314
Posix: Removed unused signal set from port (#528)
Co-authored-by: Jakob Hasse <0xjakob@users.noreply.github.com>
2022-07-25 10:05:30 -07:00
NomiChirps 859dbaf504
RP2040: Use indirect reference for pxCurrentTCB (#525) 2022-07-18 16:05:30 -07:00
Paul Bartell 2dfdfc4ba4
Add Cortex M7 r0p1 Errata 837070 workaround to CM4_MPU ports (#513)
* Clarify Cortex M7 r0p1 errata number in r0p1 specific port.

* Add ARM Cortex M7 r0p0 / r0p1 Errata 837070 workaround to CM4 MPU ports.

Optionally, enable the errata workaround by defining configTARGET_ARM_CM7_r0p0 or configTARGET_ARM_CM7_r0p1 in FreeRTOSConfig.h.

* Add r0p1 errata support to IAR port as well

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Change macro name to configENABLE_ERRATA_837070_WORKAROUND

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-06-30 10:35:26 +05:30
Gaurav-Aggarwal-AWS 8e89acfc98
Update submodule pointer of Community Supported Ports (#486)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
2022-06-29 08:01:00 -07:00
Xinyu Zhang 57530af294
Update to TF-M version TF-Mv1.6.0 (#517)
Signed-off-by: Xinyu Zhang <xinyu.zhang@arm.com>
Change-Id: I0c15564b342873f9bd7a8240822e770950a0563e
2022-06-29 12:22:30 +05:30
Graham Sanderson d2a81539e0
RP2040: Allow FreeRTOS to be added to the parent CMake project post initialization of the Pico SDK (#497)
Co-authored-by: graham sanderson <graham.sanderson@raspeberryi.com>
2022-06-24 17:22:49 +05:30
Gaurav-Aggarwal-AWS 7af41c29cb
Ensure that xTaskGetCurrentTaskHandle is included (#507)
This commits adds a check that INCLUDE_xTaskGetCurrentTaskHandle is
set to 1. A compile time error message is produced if it is not set to
1. This is needed because stream_buffer.c uses xTaskGetCurrentTaskHandle.

This was reported here - https://forums.freertos.org/t/xstreambufferreceive-include-xtaskgetcur/15283

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-06-23 10:17:17 -07:00
Graham Sanderson 90d920466e
RP2040: Remove incorrect assertion (#508)
After the xEventGroupWaitBits in vProtLockInternalSpinUnlockWithWait there was an assertion about
pxYiledSpinLock being NULL, however when xEventGroupWaitBits returns, IRQs have been re-enabled
and so it is no longer safe to assert on the state which is protected by IRQs being disabled.

Co-authored-by: graham sanderson <graham.sanderson@raspeberryi.com>
2022-06-22 10:27:26 -07:00
Gaurav-Aggarwal-AWS d5771a7a60
Add configUSE_MUTEXES to function declarations in header (#504)
This commit adds the configUSE_MUTEXES guard to the function
declarations in semphr.h which are only available when configUSE_MUTEXES
is set to 1.

It was reported here - https://forums.freertos.org/t/mutex-missing-reference-to-configuse-mutexes-on-the-online-documentation/15231

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-06-21 16:04:52 +05:30
Ravishankar Bhagavandas 0b46492740
Add callback overrides for stream buffer and message buffers (#437)
* Let each stream/message can use its own sbSEND_COMPLETED

In FreeRTOS.h, set the default value of configUSE_SB_COMPLETED_CALLBACK
to zero, and add additional space for the function pointer when
the buffer created statically.

In stream_buffer.c, modify the macro of sbSEND_COMPLETED which let
the stream buffer to use its own implementation, and then add an
pointer to the stream buffer's structure, and modify the
implementation of the buffer creating and initializing

Co-authored-by: eddie9712 <qw1562435@gmail.com>
2022-06-20 17:48:34 -07:00
Tanmoy Sen 49cb8e8b28
Update feature_request.md (#500)
* Update feature_request.md

* Remove trailing spaces

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-06-08 22:39:39 +05:30
AndreiCherniaev daf544fbc4
add extra check for compiler time (#499)
minor change to add extra check for compiler time to prevent bad config

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2022-06-02 22:33:37 +05:30
alfred gedeon 719ceee352
Add suppport for ARM CM55 (#494)
* Add supposrt for ARM CM55

* Fix file header

* Remove duplicate code

* Refactor portmacro.h

1. portmacro.h is re-factored into 2 parts - portmacrocommon.h which is
   common to all ARMv8-M ports and portmacro.h which is different for
   different compiler and architecture. This enables us to provide
   Cortex-M55 ports without code duplication.
2. Update copy_files.py so that it copies Cortex-M55 ports correctly -
   all files except portmacro.h are used from Cortex-M33 ports.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-06-01 15:00:10 -07:00
Dusan Cervenka 1ec8e49de4
Aligned nullptr check for heap3. (#493)
Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
2022-05-17 22:26:01 +05:30
Robert Berger cf6850583c
queue.h: cTaskWokenByPost -> xTaskWokenByReceive (#491)
Co-authored-by: Robert Berger <robert.berger@ReliableEmbeddedSystems.com>
Co-authored-by: Paul Bartell <pbartell@amazon.com>
2022-04-25 14:11:51 -07:00
alfred gedeon ec7c40335d
Format code, and rmove implicit tests (#489) 2022-04-21 10:18:58 -07:00
Kody Stribrny 15bc8664b5
Add atomic flag for 16-bit ticks PIC24 (#488)
This change allows the PIC24 family of
16 bit processors to read the tick count
without a critical section when the tick
count is 16 bits.

Inspired from discussion - https://forums.freertos.org/t/xtaskgettickcount-with-critical-section-on-16-bit-mcu/14860/5
2022-04-15 08:13:14 -07:00
Anton Lagerholm d5b95c9eda Corrected spelling mistake in mpu_prototypes.h
tasks.h doesn't exist.
2022-04-14 10:16:10 -07:00
Anton Lagerholm 9204f9f28d Correct spelling mistake in mpu_wrappers.h
tasks.h doesn't exist.
2022-04-14 10:16:10 -07:00
pierrenoel-bouteville-act e73fabce9a
Declare vApplicationMallocFailedHook function in task.h instead in each C heap file (#483)
vApplicationMallocFailedHook was declared in each Heap file. which forces users to declare it and can cause problems if the prototype of the function changes.

Co-authored-by: Pierre-Noel Bouteville <pnb990@gmail.com>
2022-04-13 10:44:14 -07:00
Archit Gupta b00250372e
Enable use of --text-section-literals in Xtensa port (#485)
Patch submitted by customer on forums here: https://forums.freertos.org/t/cannot-compile-xtensa-port-assembly-with-text-section-literals/14838
2022-04-11 15:07:08 -07:00
Gaurav-Aggarwal-AWS 40c37bd3ab
Add configSYSTICK_CLOCK_HZ to Cortex-M0 ports (#484)
This is needed to support the case when SysTick timer is not clocked
from the same source as CPU. This support already exists in other
Cortex-M ports.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-04-08 11:13:11 -07:00
pierrenoel-bouteville-act cf4ff121a9
tasks.c:2067:11: warning: this condition has identical branches [-Wduplicated-branches] (#482)
* replace duplicated if branch because empty by a comment to avoid warning/error with option GCC -Wduplicated-branches

* Missing ';'

* cosmetic comment

* update comment as suggested by Gaurav-Aggarwal-AWS

* cosmetic

Co-authored-by: Pierre-Noel Bouteville <pnb990@gmail.com>
2022-04-06 23:38:44 +05:30
Gaurav-Aggarwal-AWS b5b1ff02dd
Add a guard around mpu_wrappers.c (#480)
* Add a guard around mpu_wrappers.c

This avoid linker errors when this file is accidently compiled in
projects using non-MPU ports.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Fix formatting check

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-04-05 22:59:30 +05:30
Gaurav-Aggarwal-AWS 356fff8028
Update portable/ThirdParty/README.md (#474)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-03-10 19:41:45 -08:00
niniemann bdec3b6e54
fix: add additional .ltorg directives to GCC CM3/CM4 mpu ports (#473)
Co-authored-by: Nils Niemann <Niemann.N@eppendorf.de>
2022-03-10 09:19:58 -08:00
xinyu-tfm f18e432d49
Update the README to align with TF-M v1.5.0 in TF-M integration (#469)
Signed-off-by: Xinyu Zhang <xinyu.zhang@arm.com>
Change-Id: Ic04b82259ac17d5e0f8662118385c803e68af3e5
2022-03-05 16:31:08 -08:00
Gaurav-Aggarwal-AWS 58770b0f51
Check for add overflow only once (#467)
Update the size calculations such that we only need to check for add
overflow only once. Also, change the way we detect add overflow so that
we do not need to cause an overflow to detect an overflow.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-03-03 15:16:39 -08:00
Gaurav-Aggarwal-AWS 8eb3585252
Move MSB check after final size calculation (#463)
We use the MSB of the size member of a BlockLink_t to track whether not
a block is allocated. Consequently, the size must not be so large that
the MSB is set. The check to see if the MSB in the size is set needs to
be done after the final size (metadata + alignment) is calculated.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-02-28 11:59:00 -08:00
Gaurav-Aggarwal-AWS 82be77995e
Heap improvements (#462)
* Heap improvements

This commit makes the following improvements:

1. Add a check to heap_2 to track if a memory block is allocated to the
   application or not. The MSB of the size field is used for this
   purpose. The same check already exists in heap_4 and heap_5. This
   check prevents against double free.

2. Add a new flag configHEAP_CLEAR_MEMORY_ON_FREE to heap_2, heap_4 and
   heap_5. The application writer can set it to 1 in their
   FreeRTOSConfig.h to ensure that a block of memory allocated using
   pvPortMalloc is cleared (i.e. set to zero) when it is freed using
   vPortFree. If left undefined, configHEAP_CLEAR_MEMORY_ON_FREE
   defaults to 0 for backward compatibility. We recommend setting
   configHEAP_CLEAR_MEMORY_ON_FREE to 1 for better security.

3. Add a new API pvPortCalloc to heap_2, heap_4 and heap_5. This API
   has the following signature:
   void * pvPortCalloc( size_t xNum, size_t xSize );
   It allocates memory for an array of xNum objects each of which is of
   xSize and initializes all bytes in the allocated storage to zero. If
   allocation succeeds, it returns a pointer to the lowest byte in the
   allocated memory block. On failure, it returns a null pointer.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-02-24 10:52:10 -08:00
Felipe Torrezan 4539e1c574
Migrated RL78/IAR port to EWRL78v3+ (#461)
Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
2022-02-24 10:04:46 -07:00
Gaurav-Aggarwal-AWS 840214dc29
Update documentation of uxTaskGetTaskNumber function (#460)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-02-22 10:44:05 -08:00
imi415 38efd2689e
CMake: Move mpu_wrapper to ports library. (#459) 2022-02-22 08:30:09 -07:00
Ming Yue 09a2c0b324
Remove exception loop tags. (#457) 2022-02-17 15:28:04 -08:00
Ming Yue 25d180a09b
Use a dedicated symbol for in-function loop to avoid the weak symbol JAL range error when a strong symbol is defined outside. (#455) 2022-02-15 14:56:13 -08:00
mikisama d5b2413f48
Fix typo (#454) 2022-02-13 15:47:52 -08:00
Muneeb Ahmed 4014abb943
Fix some warnings in doxygen comments (#453)
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2022-02-10 11:36:42 -08:00
Shubham Kulkarni 4a490d64a5
portable/Xtensa_ESP32: Add SPDX license identifiers (#452)
Co-authored-by: Paul Bartell <pbartell@amazon.com>
2022-02-08 16:28:07 -08:00
Gaurav-Aggarwal-AWS d5a10e4595
Add alignment for the direct mode handler (#449)
It is still possible to further relax the alignment using linker script
if needed.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-02-08 11:51:25 -08:00
Gaurav-Aggarwal-AWS cf248aec2d
Add support for 16 MPU regions to GCC Cortex-M33 ports (#448)
* Add support for 16 MPU regions to GCC Cortex-M33 TZ port

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Add support for 16 MPU regions to Cortex-M33 NTZ GCC port

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-02-07 16:51:19 -08:00
Gaurav-Aggarwal-AWS 76a8335b23
Update History.txt to include 10.4.6 changes (#451)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-02-07 16:33:53 -08:00
Tobias Nießen 364f0e585f
Fix description of configQUEUE_REGISTRY_SIZE (#446) 2022-01-31 11:12:47 -08:00
swaldhoer 89e4823a49
Update uncrustify configuration to 0.69 (#445)
The configuration was updated using

    uncrustify -c .github/uncrustify.cfg -o .github/uncrustify.cfg --update-config-with-doc

to align with the actually used uncrustify version used, i.e., all
configuration is now explicitly set (and no longer implicit).

The files that are common to all ports ("portable/MemMang*" and
"portable/Common/mpu_wrappers.c" are now also autoformatted.

Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>
2022-01-28 10:48:03 -08:00
Gaurav-Aggarwal-AWS 9efca75d1e
Riscv re-factoring (#444)
* Refactor RISCV port

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Changes to make re-factoring work on ESP32-C3

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Remove alignment and place handlers in separate sections

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Correct section names

This is needed so that the assemblers correctly recognizes functions.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Move mtvec programming to the application

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Refactor mtimer udpate code

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Move critical nesting to port layer

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Respect configTASK_RETURN_ADDRESS

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Formatting changes

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-01-26 17:55:01 -08:00
isus-ipanienko a3843bd5b1
Fix warning message error. (#443)
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2022-01-21 10:10:22 -08:00
yhsb2k cdd406a62f
Add CMake build (#421)
* Add CMake build

Allows to build and link FreeRTOS using CMake build system.
From top-level project it looks like this:

set(FREERTOS_PORT_GCC_ARM_CM4F ON)
set(FREERTOS_CONFIG_FILE_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR} CACHE STRING "")
add_subdirectory(third_party/FreeRTOS-Kernel)

Where FREERTOS_PORT_GCC_ARM_CM4F is FreeRTOS port name.
freertos is target name, which can be used in target_link_libraries()

* Add feature to set custom heap source file

Example how to set it from top-level project:
set(FREERTOS_HEAP ${CMAKE_CURRENT_LIST_DIR}/path_to/my_heap.c CACHE STRING "")

* Set cmake_minimum_required to 3.15

* Fail build when FREERTOS_CONFIG_FILE_DIRECTORY not set

* Rename library to freertos_kernel

* Rework FREERTOS_PORT option to act as combobox

* Use freertos_kernel_port cmake target

* Split port sources multiline

Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com>
Co-authored-by: Paul Bartell <pbartell@amazon.com>
2022-01-20 12:35:04 -08:00
Paul Bartell dca4f80a6b
Add configUSE_MINI_LIST_ITEM configuration option to enable the MiniListItem_t type. (#433)
* Add configUSE_MINI_LIST_ITEM configuration option to enable the MiniListItem_t type.

When configUSE_MINI_LIST_ITEM == 0:
	MiniListItem_t and ListItem_t are both typedefs of struct xLIST_ITEM.

When configUSE_MINI_LIST_ITEM == 1 (the default in projdefs.h):
	MiniListItem_t is a typedef of struct xMINI_LIST_ITEM, which contains 3 fewer fields than a struct xLIST_ITEM.
	This configuration saves approximately sizeof(TickType_t) + 2 * sizeof( void * ) bytes of ram, however it also violates strict aliasing rules which some compilers depend on for optimization.

configUSE_MINI_LIST_ITEM defaults to 1 when not defined.

* Add pp_indent_brace option to uncrustify config

Improves compliance with the FreeRTOS code style guide:
https://www.freertos.org/FreeRTOS-Coding-Standard-and-Style-Guide.html
2022-01-19 13:12:57 -08:00
Ming Yue 043c2c7ef6
Fix GCC/RX100 function naming error. (#440) 2022-01-13 10:30:26 -08:00
Jeff Tenney 990643ebe8
Fix support for stepping tick by xExpectedIdleTime (#73)
* Fix support for stepping maximum number of ticks

This commit fixes support for tickless implementations that call
vTaskStepTick() with the maximum number of allowed ticks to step.

vTaskStepTick()
---------------
Function vTaskStepTick() provides a way for the tickless idle
implementation to account for ticks that elapse during tickless idle.
The maximum number of stepped ticks allowed is the number passed to
portSUPPRESS_TICKS_AND_SLEEP().  It is the number of ticks between
xTickCount and xNextTaskUnblockTime.

vTaskStepTick() is specifically intended for use with tickless idle,
so it always executes with the scheduler disabled.  For reference,
compare it with the more general function xTaskCatchUpTicks().

Without this Change
-------------------
Prior to this commit, if a task is supposed to wake at xTickCount ==
0xFFFFFFFF, then when tickless idle ends, function vTaskStepTick()
sets the tick to 0xFFFFFFFF but the task remains on the delayed list
because xTaskIncrementTick() does not execute.  One tick later,
xTaskIncrementTick() executes because it's time to increment xTickCount
to 0x00000000.  An assertion failure occurs in
taskSWITCH_DELAYED_LISTS() because the delayed task list is not
empty.  Other examples of valling vTaskStepTick() with the maximum
allowed number of ticks merely result in a task waking one tick late.

Default Tickless Implementations
--------------------------------
Note that the default tickless implementations never pass the maximum
allowed value to vTaskStepTick().  The default implementations use the
tick interrupt to finish the sleep and allow that one tick to be
counted normally via the tick ISR and xTaskIncrementTick().

* Protect xPendedTicks with critical section

Function xTaskIncrementTick() increments xPendedTicks when the
scheduler is disabled.  That function typically executes inside the tick
ISR.  So code in xTaskCatchUpTicks() must mask interrupts when modifying
xPendedTicks.

* uncrustify tasks.c

* Update tasks.c

Style changes only - added comment and indentation to the two modified files.

* uncrustify

* Add test coverage for new conditional

* Add typecast

Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
Co-authored-by: RichardBarry <3073890+RichardBarry@users.noreply.github.com>
2022-01-10 12:44:12 -07:00
Jon Enz abd887c687
Clean some spell check words. (#439) 2022-01-07 10:45:58 -08:00
Joseph Julicher c4f9e27c28
Feature: Add task top/end of stack to task info report (#436)
uncrustify

Co-authored-by: Shreyas Balakrishna <shreyasbharath@users.noreply.github.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2022-01-06 12:03:56 -07:00
Gaurav-Aggarwal-AWS becbb89181
Add a cap to the queue locks (#435)
Add a cap to the queue locks

cRxLock and cTxLock members of the queue data structure count the
number items received and sent to the queue while the queue was locked.
These are later used to unblock tasks waiting on the queue when the
queue is unlocked. The data type of these members is int8_t and this can
trigger overflow check assert if an ISR continuously reads/writes to the
queue in a loop as reported in this issue: https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/419. 

Note due to the length of the operation is it not recommended to write to
the queue that many times from an ISR - stream buffers are a better option,
or alternatively, defer the operation to a task by just having the ISR send a
direct to task notification to unblock the task.

This PR caps the values of the cRxLock and cTxLock to the number of tasks in
the system because we cannot unblocks more tasks than there are in the system. 
Note that the same assert could still be triggered is the application creates more
than 127 tasks.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-01-05 21:14:01 -08:00
Gaurav-Aggarwal-AWS 8e2dd5b861
Add a Known Issues file in the Third Party folder (#434)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-01-03 14:26:43 -07:00
Amit Tomar c13719d2d0
fix alignment exception for ullPortInterruptNesting. (#317)
* fix alignment exception for ullPortInterruptNesting.

While loading (LDR X5, ullPortInterruptNestingConst) the ullPortInterruptNesting
variable, the program control seems to be stuck and there is no abort or stack
trace observed (as there is no exception handler is installed to catch unaligned
access exception).

Program control moves forward, if one just declares this varible to be 2 bytes
aligned but then varible is not updated properly.

One of my colleague, pointed out that issue is due to the fact that
ullPortInterruptNesting must be at 8 bytes aligned address but since
"vApplicationIRQHandler" (that has 4 bytes of address) is sitting between
two 8 bytes aligned addresses that forces ullPortInterruptNesting to be at
4 byte aligned address, causing all sort of mess.

It works on QEMU (on ARM64) as it is, since there is no such check for
unaligned access but on real hardware it is prohibited.

Workaround to this problem is, either we skip 4 byets (using .align 4) after
vApplicationIRQHandler declaration or declare it the end of all declarations.
This commit does the latter one.

Signed-off-by: Amit Singh Tomar <atomar25opensource@gmail.com>

* Update portASM.S

Remove 1 tab = 4 spaces

Co-authored-by: Amit Singh Tomar <atomar25opensource@gmail.com>
Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
2021-12-29 13:53:10 -07:00
clemenskresser 7b95420ad9
fixed deadlock in event groups when a mutex is used for memory allocation (#284)
Co-authored-by: Clemens Kresser <clemens.kresser@gmail.com>
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
2021-12-29 09:58:24 -07:00
Joseph Julicher f5df2c140c
Documentation update for xEventGroupClearBitsFromISR (#432)
* Documented the correct use of xEventGroupClearBitsFromISR

* removed typo
2021-12-28 14:20:33 -07:00
Fabian 481c722ef3
RISC-V: No #error on RV64 regarding byte alignment (#367)
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2021-12-28 11:52:33 -08:00
leona 81d15dc550
Fix: Interrut Handler Register Function and Exception Process (#41)
Signed-off-by: shiode <shiode@aptpod.co.jp>

Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
Co-authored-by: David Chalco <59750547+dachalco@users.noreply.github.com>
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
2021-12-28 10:54:23 -07:00
Joseph Julicher 455df7a07a
uxAutoReload replaced with xAutoReload to improve MISRA compliance (#429)
* Created xTimerGetReloadMode and uxTimerGetReloadMode.

* Changed the use of uxAutoReload to xAutoReload

* updated history.txt

* Update History.txt

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Update timers.c

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Added xTimerGetReloadMode to lexicon.txt

* uncrustified timers.c

* Fix formatting check

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-12-27 11:36:59 -07:00
Gaurav-Aggarwal-AWS 53b9a80b8e
Update third party ports readme (#428)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-12-21 14:10:06 -08:00
Graham Sanderson debbd254b6
RP2040 fixes (#424)
* RP2040: malloc needs to be thread safe for FreeRTOS whether both cores are used or not

* RP2040: CMake file had broken left over test code

* RP2040: portIS_FREE_RTOS_CORE() returned an incorrect value prior to scheduler init when the application was compiled without multicore support

* RP2040: Bad initialization code was causing IRQs to get disabled before main() was called when using non static allocation
2021-12-21 11:08:41 -08:00
Pramith K V 4c4089b154
Remove tickless idle mode dependency with include v task suspend (#422)
* Fix Remove tickless idle feature dependency with INCLUDE_vTaskSuspend
* fix unused variable warning
* Fix CI fomatting check

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Authored-by: pramithkv <pramit@lifesignals.com>
2021-12-08 15:47:07 -08:00
R. Dunbar Poor 052e364686
Fix #415: Compiling tasks.c with configSUPPORT_DYNAMIC_ALLOCATION = 0 (#416)
* Fix #415: Compiling tasks.c with configSUPPORT_DYNAMIC_ALLOCATION = 0
2021-11-18 14:38:41 -08:00
RichardBarry 271bdfb880
Simplify prvInitialiseNewTask() (#417)
Memset newly allocated TCB structures to zero, and remove code
that set individual structure members to zero.
2021-11-18 14:22:02 -08:00
RichardBarry e13f990385
Fix keil compilation error (#418)
* Fix compilation error when using the Keil tools with the Keil compiler.
2021-11-18 11:04:57 -08:00
Gaurav Aggarwal 6ac9aaec95 Fix formatting error
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-11-15 15:09:12 -08:00
Gaurav Aggarwal 44fc137428 Add option to disable unprivileged critical sections
This commit introduces a new config
configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS which enables developers to
prevent critical sections from unprivileged tasks. It defaults to 1 for
backward compatibility. Application should set it to 0 to disable
critical sections from unprivileged tasks.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-11-15 15:09:12 -08:00
Gaurav Aggarwal 7a3848753b Change xPortRaisePrivilege and vPortResetPrivilege to macros
This prevents non-kernel code from calling these functions.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-11-15 15:09:12 -08:00
Gaurav-Aggarwal-AWS 78da9cb261
Fix code example in timers.h (#412)
The example was trying to create a timer with period 0 which is not a
valid period.

This was reported here - https://forums.freertos.org/t/multiple-timers/13884

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-11-12 10:36:49 -08:00
Laukik Hase 683811bd8c
bugfix: Initialize uxTaskNumber at task initialization (#374)
* bugfix: Initialize uxTaskNumber at task initialization
2021-11-11 14:17:21 -08:00
Tobias Nießen 4896d6b1a1 Mention portMAX_DELAY in xEventGroupWaitBits docs (#411)
The public function xEventGroupWaitBits passes xTicksToWait to the
function vTaskPlaceOnUnorderedEventList, which passes the number of
ticks to prvAddCurrentTaskToDelayedList and sets xCanBlockIndefinitely
to pdTRUE, causing the latter to block indefinitely if
xTicksToWait == portMAX_DELAY and INCLUDE_vTaskSuspend == 1.
2021-11-10 17:39:01 -08:00
Kevin Thibedeau cd0b7fc271
Build with -Wmissing-prototypes flags vPortYieldFromISR() in the Posix port. (#409)
There's already a portYIELD_FROM_ISR() macro that calls vPortYield() which wraps the FromISR code.
It doesn't appear that vPortYieldFromISR() is intended to be publicly accessible in this port so
I've marked it as private to silence the warning.

event_create() also got flagged due to missing void in prototype.

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2021-11-08 13:51:25 -08:00
Gaurav-Aggarwal-AWS 1ec7e50722
Change hyphen to ASCII character (#410)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-11-08 11:11:11 -08:00
Gaurav-Aggarwal-AWS 5a2a1d0702
Change taskYIELD_FROM_ISR to portYIELD_FROM_ISR in docs (#408) 2021-11-05 14:33:15 -07:00
prplz a40d52dc05
Fix documentation mistake (#407)
ulTaskNotification -> ulTaskNotify
2021-11-05 10:55:17 -07:00
andrewtjs a432a688ca
bugfix: Initialise stack correctly on dsPIC port (#405)
* Use compiler predefined constants.

Use of MPLAB_DSPIC_PORT is deprecated.
2021-11-01 12:38:37 -07:00
Archit Gupta d649a77128
Fix prvWriteMessageToBuffer on big endian (#391)
prvWriteMessageToBuffer wrote the first sbBYTES_TO_STORE_MESSAGE_LENGTH
bytes of the size_t-typed length to the buffer as the data length. While
this functions on little endian, it copies the wrong bytes on big
endian. This fix converts the length to configMESSAGE_BUFFER_LENGTH_TYPE
first, and then copies the exact amount, thus fixing the issue.
Additionally it adds an assert to verify the size is not greater than
the max value of configMESSAGE_BUFFER_LENGTH_TYPE; previously this would
truncate silently.

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2021-10-16 16:36:44 -07:00
Gaurav-Aggarwal-AWS 06fb777e43
Update comments for the ARM_CA53_64_BIT_SRE port (#403)
Mention that FreeRTOS_IRQ_Handler should not be used for FIQs and the
reason for assuming Group 1 for Interrupt Acknowledge and End Of
Interrupt registers.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-10-16 13:45:03 -07:00
Stephane Viau 68ddb32b55
Handle interrupt acknowledge register in Cortex-A53 SRE port (#392)
Let the FreeRTOS IRQ handler properly store and restore the ICCIAR
register value around the vApplicationIRQHandler() call.

Signed-off-by: Stephane Viau <stephane.viau@oss.nxp.com>

Co-authored-by: Stephane Viau <stephane.viau@oss.nxp.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2021-10-15 09:21:56 -07:00
swaldhoer a030d0a02b
fix typo (#399) 2021-10-06 15:32:07 -07:00
Qikai 1fb4e847ed
Fix the defect that Heap_1.c may waste first portBYTE_ALIGNMENT bytes of ucHeap[] (#238)
* Fix the defect that Heap_1.c may waste first 8 bytes of ucHeap[]

* Fix the same byte waste issue in heap_2
2021-10-04 11:15:00 -07:00
Andres O. Vela 5f290e4559
Fix typo in comment (#398) 2021-09-30 10:18:47 -07:00
Shubham Kulkarni 741185f1d0
Xtensa_ESP32: Add definition for portMEMORY_BARRIER (#395)
This fixes crash observed in Amazon FreeRTOS when optimisations are enabled
2021-09-16 14:16:22 -07:00
Gaurav-Aggarwal-AWS 1b86b39940
Remove AVR ports from main repo (#394)
These ports now exist in the
https://github.com/FreeRTOS/FreeRTOS-Kernel-Partner-Supported-Ports repo.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-09-14 19:25:46 -07:00
Gaurav Aggarwal 384ffc5b91 Fix spell-check failure
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-09-10 16:44:36 -07:00
Gaurav Aggarwal 68889fdd79 Update History.txt
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-09-10 16:44:36 -07:00
Gaurav Aggarwal 99a5a5fe82 Fix free secure context for Cortex-M23 ports
Update the branching condition to correctly free secure context when
there is one.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-09-10 16:44:36 -07:00
Gaurav Aggarwal 06ea7275b3 Implement secure stack sealing as per ARM's recommendation
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-09-10 16:44:36 -07:00
Gaurav Aggarwal 61f7560243 Associate secure context with task handle
The secure side context management code now checks that the secure
context being saved or restored belongs to the task being switched-out
or switched-in respectively.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-09-10 16:44:36 -07:00
Gaurav Aggarwal ccaa0f4d6e Pre-allocate secure-side context structures
This commit improves ARMv8-M security by pre-allocating secure-side task
context structures and changing how tasks reference a secure-side
context structure when calling a secure function. The new configuration
constant secureconfigMAX_SECURE_CONTEXTS sets the number of secure
context structures to pre-allocate. secureconfigMAX_SECURE_CONTEXTS
defaults to 8 if left undefined.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-09-10 16:44:36 -07:00
Zim Kalinowski f8ada39d85
Replace <pre> with @code - remaining files (#388)
Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: Ming Yue <mingyue86010@gmail.com>
2021-09-07 12:03:12 -07:00
Gaurav-Aggarwal-AWS fa0f5c436c
Add freertos_risc_v_chip_specific_extensions.h for 64-bit ports (#385)
* Add freertos_risc_v_chip_specific_extensions.h for 64-bit ports

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-09-01 15:38:07 -07:00
Zim Kalinowski bb02cf647d
minor fix in stream buffer doc (#387)
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2021-08-31 11:24:56 -07:00
Zim Kalinowski ae73f0de41
Replace <pre> with @code{c} (#386)
* replace <pre> with @code{c}

* endcode must pass spellcheck
2021-08-31 09:04:36 -07:00
sherryzhang c290780e34
Update the README to align with TF-Mv1.4.0 in TF-M integration (#384)
Change-Id: I41fc8e18657086e86eacd38ed70f474555739a3c
Signed-off-by: Sherry Zhang <sherry.zhang2@arm.com>
2021-08-26 23:07:58 -07:00
Zim Kalinowski 0b1e9d79c8
fixes in queue documentation (#382)
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2021-08-12 18:15:57 -07:00
Shubham Kulkarni 6ba8aa63c1
Xtensa_ESP32: Fix build issues when external SPIRAM is enabled (#381)
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2021-08-12 17:46:25 -07:00
Paul Adelsbach d858d1ff36
fix example usage of xMessageBufferCreateStatic and xStreamBufferCrea… (#380)
Example usage is actually correct, so remove the -1. but update
the incorrect parameter description for pucStreamBufferStorageArea
and pucMessageBufferStorageArea.
2021-08-12 17:06:41 -07:00
Jack Lam d01801807d
Tidy up the 8051 sdcc port (#376)
* Tidy up the 8051 sdcc port

* Replace tabs with spaces in SDCC Cygnal port.c file.

Co-authored-by: John Lin <shaojun.lin@delonghigroup.com>
Co-authored-by: Paul Bartell <pbartell@amazon.com>
2021-08-12 11:50:52 -07:00
Zim Kalinowski 1b38078939
fixed parameter names documentation (#378) 2021-08-12 11:18:53 -07:00
RichardBarry b97bb48e06
Indent contents of a taskENTER_CRITICAL/taskEXIT_CRITICAL block. (#348)
* Indent contents of a taskENTER_CRITICAL/taskEXIT_CRITICAL block.
Move a few configASSERT() statements out of a path where they would always be triggered to prevent "condition is always true" compiler warnings.

* Replace configASSERT() positions due to unintended semantic change from the version where asserts were at the top of the file.

Co-authored-by: RichardBarry <richardbarry.c@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2021-08-04 10:05:23 -07:00
alfred gedeon ce81bcb33f
Run uncrustify with github workflows (#369)
* uncrustify with github workflows

* Fix find expression

* Add uncrustify configuration file

* Uncrustify some files

* uncrustify some more files

* uncrustify more files

* Fix whitespace at end of lines

Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
2021-07-28 17:53:10 -07:00
Gaurav-Aggarwal-AWS 85a23127cc
Add ReadMe for third party port contributions (#371)
* Add ReadMe for third party port contributions

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-07-28 10:37:51 -07:00
Craig Kewley d9d5d53a75
doc: fix function name typo (#368) 2021-07-20 17:21:18 -07:00
Kristine Jassmann b5a9229563
Warning fixes. (#356)
* Use cast to fix warnings.

* Remove all empty definitions of portCLEAN_UP_TCB( pxTCB ) and
  portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) from ports.
  When these are undefined, the default empty definition is defined
  in FreeRTOS.h.
2021-07-20 12:55:49 -07:00
Tobias Nießen 1d86b973aa
Fix description of vTaskDelay (#363) 2021-07-06 14:10:53 -07:00
swaldhoer 46338705bd
Replace two dashes and one whitespace with their corresponding ASCII characters. (#362) 2021-06-30 15:07:55 -07:00
Graham Sanderson 9af72db3ec
Add RP2040 support (#341)
* Add RP2040 support

* remove spurious tab/spaces comments

* add .cmake to ignored kernel checks

* Apply suggestions from code review

Co-authored-by: Paul Bartell <paul.bartell@gmail.com>

* license and end of file newline fixes

* Rename LICENSE.TXT to LICENSE.md

Co-authored-by: Paul Bartell <paul.bartell@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2021-06-30 13:20:54 -07:00
Archit Gupta 4200226708
Move the community/partner supported ports to correct location (#361) 2021-06-29 18:36:49 -07:00
Gaurav-Aggarwal-AWS 8b2a1b802a
Fix C90 Compilation Failure (#359)
This issue was reported here: https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/358

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-06-23 10:51:13 -07:00
Gaurav-Aggarwal-AWS 4e3bf0f5c0
Add Cortex-A53 port with system register interface for CPU interface access (#357)
The difference between this port and portable/GCC/ARM_CA53_64_BIT is
that this port uses System Register interface to access CPU interface
while the other one uses Memory-mapped interface.

Signed-off-by: Gaurav Aggarwal 
Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
2021-06-22 18:51:58 -07:00
Archit Gupta 56428a9831
Add new submodules for port contribution (#355)
* Add new submodules

* Update submodule location
2021-06-21 12:33:33 -07:00
Ming Yue 9e85006fc9
Update spell checker exclusion. (#354) 2021-06-15 11:55:29 -07:00
RichardBarry ddc840fd28
Make the type used to hold run-time counter values configurable (#350)
* Introduce configRUN_TIME_COUNTER_TYPE which enables developers to define the type used to hold run time statistic counters.  Defaults to uint32_t for backward compatibility.  #define configRUN_TIME_COUNTER_TYPE to a type (for example, uint64_t) in FreeRTOSConfig.h to override the default.

Introduce ulTaskGetIdleRunTimePercent() to complement the pre-existing ulTaskGetIdleRunTimeCounter().  Whereas the pre-existing function returns the raw run time counter value, the new function returns the percentage of the entire run time consumed by the idle task.  Note the amount of idle time is only a good measure of the slack time in a system if there are no other tasks executing at the idle priority, tickless
idle is not used, and configIDLE_SHOULD_YIELD is set to 0.

* Add ultaskgetidleruntimepercent to lexicon.txt.

* Update History file.
Add the MPU version of ulTaskGetIdleRunTimePercent().

* Update include/FreeRTOS.h to correct comment as per aggarg@ suggestion.
* Fix alignment in mpu_wrappers.h.
Commit changes to mpu_prototypes.h which were missed from the original commit.
2021-06-14 12:17:41 -07:00
Thomas Pedersen 6a84f2c1da
Posix: fix event_wait_timed() (#346)
event_wait_timed() was ignoring a timeout of 1000 ms.
Presumably this is because pthread_cond_timedwait() only
considers tv_nsec less than one second.

Convert the timeout in miliseconds to second and nanosecond
components to fix this.

Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>
2021-06-10 17:15:47 -07:00
Raul Rojas bad8f01afd
Adds SemphrGetCountFromISR with QMsgWaitingFromISR (#345)
* Adds SemphrGetCountFromISR with QMsgWaitingFromISR
2021-06-08 17:48:52 -07:00
Paul Bartell eec42331b4 Normalize files with mixed line endings (introduced in commit 3a413d1) 2021-06-01 17:55:18 -07:00
paulbartell 2f6c91be62 [AUTO][RELEASE]: Bump task.h version macros to "10.4.4+" 2021-05-28 23:03:08 +00:00
Joseph Julicher b4a7a04657
Add history.txt for the 10.4.4 release (#336)
* updated history.txt for 10.4.4

* Update the release date in History.txt

* added link to SMP branch to History.txt

* Added comment explaining the + in the version string

* corrected typos in the + comment

Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>
Co-authored-by: Paul Bartell <pbartell@amazon.com>
2021-05-28 15:48:53 -07:00
Paul Bartell 6425e584bd
Update github Auto-Release workflow to add an option to set the main branch version in task.h (#337)
Adding text into this new field updates the following macros in task.h in the main branch:
tskKERNEL_VERSION_NUMBER (alphanumeric string)
tskKERNEL_VERSION_MAJOR (numeric only)
tskKERNEL_VERSION_MINOR (numeric only)
tskKERNEL_VERSION_BUILD (numeric only)
2021-05-28 07:23:29 -07:00
Paul Bartell 3f7e75dcd5 Add license header to wait_for_event.c and wait_for_event.h 2021-05-27 19:57:55 -07:00
Paul Bartell b5e9896ad7 Cleanup license text in Xtensa XCC and Xtensa ESP32 GCC ports.
Add SPXD license identifiers.
2021-05-27 19:57:55 -07:00
Paul Bartell 1041b63586 Add SPDX and MIT to lexicon 2021-05-27 19:57:55 -07:00
Paul Bartell 3a413d1022 Add SPDX-License-Identifier: MIT to MIT licensed files. 2021-05-27 19:57:55 -07:00
Paul Bartell b286f173e8 Update license text for ports that were previously missed. 2021-05-27 19:57:55 -07:00
Paul Bartell e31dccae80 Remove "1 tab == 4 spaces!" line from files that still contain it. 2021-05-27 19:57:55 -07:00
Paul Bartell a1b9132a6d Update tskKERNEL_VERSION_NUMBER and tskKERNEL_VERSION_BUILD to V10.4.999 to denote the development branch 2021-05-27 19:57:55 -07:00
Paul Bartell 9a3a5a89f2 Update kernel_checker.py with new version and copyright date.
Update kernel_checker.py to handle assembly and python files
2021-05-27 19:57:55 -07:00
Paul Bartell adfc53368f Update copyright year from 2020 to 2021 2021-05-27 19:57:55 -07:00
Paul Bartell 08dc6f64ee Change kernel revision in each file header from V10.4.3 to <DEVELOPMENT BRANCH> 2021-05-27 19:57:55 -07:00
Dan Good 8e2f723996
queue.c: Change some asserts into conditionals and improve overflow checks (#328) 2021-05-27 19:17:59 -04:00
alfred gedeon a1b918c1aa
Code: Fix stream buffer warning (#335) 2021-05-27 09:11:35 -07:00
Joseph Julicher 736f2302ae
deprecating the mcf5235 port (#334) 2021-05-26 16:26:19 -07:00
j4cbo f37bcd5c14
Wrap macros in do { ... } while( 0 ) (#240) 2021-05-24 14:41:58 -07:00
Evgeny Ermakov ac2c383bc1
Posix: fix copyright (#250) 2021-04-21 19:08:46 -04:00
RichardBarry 6bf3a75c6a
Create macro versions of uxListRemove() and vListInsertEnd() for use in xTaskIncrementTick(). This provides a minor optimisation to remove the need for a few function calls. (#241)
Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>
Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com>
2021-04-19 14:16:10 -07:00
Paul Bartell 71f5af4e0f
Fix regression in vQueueAddToRegistry. (#315) 2021-04-19 11:20:23 -07:00
Meco Jianting Man d8770748ff
[kernel & MemMang] use space to replace tab and remove meaningless space in the end of each line (#314)
Signed-off-by: Meco Man <920369182@qq.com>

Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>
2021-04-19 09:58:55 -07:00
Paul Bartell 46f7feba81
Replace configASSERT( pcQueueName ) in vQueueAddToRegistry with a NULL pointer check. (#313)
* Replace configASSERT( pcQueueName ) in vQueueAddToRegistry with a NULL pointer check.

Fixes FreeRTOS/FreeRTOS-Kernel#311

* Make NULL checks consistent.
2021-04-17 09:57:16 -07:00
Meco Jianting Man 99295c9ae8
simplify and beautify portBYTE_ALIGNMENT (#309) 2021-04-14 07:46:46 -07:00
Jeff Tenney 05ded5bd8d
Remove support for tmrCOMMAND_START_DONT_TRACE (#305)
* Remove support for tmrCOMMAND_START_DONT_TRACE

Prior to this commit, the timer task used tmrCOMMAND_START_DONT_TRACE
to reload a "backlogged" auto-reload timer -- one for which a reload
operation would have started a period that had already elapsed.  If the
command queue contained a stop or delete command when
tmrCOMMAND_START_DONT_TRACE was put into the queue for a reload, the
timer unexpectedly restarted when the timer task processed
tmrCOMMAND_START_DONT_TRACE.  This commit implements a new method of
reloading auto-reload timers and eliminates support for
tmrCOMMAND_START_DONT_TRACE.  No other code sends this private command.

However, the symbol tmrCOMMAND_START_DONT_TRACE remains defined, with
its original command value, so as not to impact trace applications.

Also fix one-shot timers that were not reliably being marked as not
active:
- when they expired before the start command could be processed
- when the expiration was processed during the timer list switch

Also improve consistency:
- Always reload auto-reload timers *before* calling the callback.
- Always call traceTIMER_EXPIRED() just prior to the callback.

* fix indent

* Revert unnecessary change to prvTimerTask()

Change was intended to faithfully work through a backlog that spanned a
list switch, and before processing a stop or delete command.  But, (1)
it isn't important to do that, and (2) the code didn't accomplish the
intention when *two* auto-reload timers were backlogged across a list
switch.  Best to simply leave this part of the code as it was before.

* fix style

Co-authored-by: Joseph Julicher <jjulicher@mac.com>
2021-04-13 11:05:46 -07:00
Paul Bartell a22b438e60
Overwrite existing QueueRegistry entries when a handle is added multiple times. (#306)
Overwrite an existing entry for a given xQueue handle when vQueueAddToRegistry is called with an xQueue handle of a queue that is already in the QueueRegistry.
2021-04-09 17:06:58 -07:00
Paul Bartell a31018d025
Update parent repository primary branch name from "master" to "main". (#304) 2021-04-09 09:42:35 -07:00
carlo-dev-git 75e0c36eb4
Code cleanup (#288)
* Update port.c

* Code cleanup

Misc coding style cleanup and typo fixes

* Fix ASM style

Fix ASM style

* Fix header check

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Co-authored-by: Carl Lundin <53273776+lundinc2@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2021-04-07 14:19:31 -07:00
Gaurav-Aggarwal-AWS b08c19f745
Define default values of macros before first use (#298)
configSTACK_ALLOCATION_FROM_SEPARATE_HEAP was added recently in
https://github.com/FreeRTOS/FreeRTOS-Kernel/pull/267. This macro was
used in portable.h before its default value was defined, resulting in a
warning when built with -Wundef. This changes moves the default value
definition for configSTACK_ALLOCATION_FROM_SEPARATE_HEAP to portable.h
to ensure that it is defined before first use.

portUSING_MPU_WRAPPERS check in mpu_wrappers.h was updated in
https://github.com/FreeRTOS/FreeRTOS-Kernel/pull/285. The new check
results in a warning when built with -Wundef because
portUSING_MPU_WRAPPERS is not defined yet. This changes adds the default
value definition for portUSING_MPU_WRAPPERS to portable.h to ensure that
it is defined before first use.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-04-02 07:35:52 -07:00
Ming Yue 534eba66ce
Check NULL pointer input for vEventGroupDelete. (#293)
* Check NULL pointer input for vEventGroupDelete.

* Change the input parameter check with assertion.

Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
2021-03-25 15:57:42 -07:00
Paul Bartell 9b679c347c
Fix comments in list.h and clarify list usage in xTaskRemoveFromEventList (#289)
* Change instances of "descending" to "ascending" to match implementation.

* Uncrustify

* Clarify list usage in xTaskRemoveFromEventList
2021-03-25 12:39:08 -07:00
Gaurav-Aggarwal-AWS 9efe10b805
Add assert to catch invalid task priority (#292)
* Add assert to catch invalid task priority

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-03-24 17:04:20 -07:00
Paul Bartell 4ad84923a0
Build the posix port on pushes and PRs to the Kernel repository (#290)
* Run posix build action when new commits are pushed to the FreeRTOS/Kernel repository

* Run kernel unit tests on push and pull_request actions
2021-03-23 10:33:47 -07:00
alfred gedeon 9cd19603e8
Code: Remove redundant check (#287) 2021-03-21 09:03:38 -07:00
RichardBarry 6b72419c78
Fix error introduced when merging #264. (#286) 2021-03-20 12:59:51 -07:00
milesfrain 6685c042cb
Fix race condition bugs when reading and writing to message buffers (#264)
* Fix inaccuracies in prvWriteBytesToBuffer description

* Perform atomic message write in prvWriteMessageToBuffer

* Remove unnecessary length arg from prvReadMessageFromBuffer

* Perform atomic message read in prvReadBytesFromBuffer

* Apply SpacesAvailable() fix

Original author: RichardBarry

* Apply review feedback

* Edit some prv functions for simplicity and consistency

- prvWriteMessageToBuffer
- prvReadMessageFromBuffer
- prvWriteBytesToBuffer
- prvReadBytesFromBuffer

* Significant simplification of prvWriteMessageToBuffer

* fixup off-by-one comment indentation

Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>
Co-authored-by: RichardBarry <3073890+RichardBarry@users.noreply.github.com>
2021-03-20 12:03:27 -07:00
RichardBarry 086d52f9d3
A recent change in the FreeRTOS/FreeRTOS hub repo (which submodules this repo) introduced use of a new compile time constant configRUN_ADDITIONAL_TESTS. This check in adds a default for the constant that will be used in builds to which it does not apply. (#266) 2021-03-20 11:58:07 -07:00
alfred gedeon 9706a69850
Fix: testing for mpu wrapers to be equal to 1 (#285) 2021-03-19 17:44:12 -07:00
Tobias Schulte cb7bef09f2
Adjust portPOINTER_SIZE_TYPE to correct size (#275)
* Adjust portPOINTER_SIZE_TYPE to correct size

portPOINTER_SIZE_TYPE wasn't yet set correctly to be 16 bit

* Fixed FreeRTOS file header to comply with automatic checks

Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
2021-03-19 15:35:21 -07:00
carlo-dev-git 49c38f08de
Update port.c (#283) 2021-03-19 15:22:22 -07:00
alfred gedeon 1059b35838
Comment: xTaskResumeAll: comment: doesn't match the code (#281) 2021-03-19 10:36:17 -07:00
Paul Bartell 95433d0284
Run CMock unit tests on each pull request with a github action. (#279)
Run CMock unit tests on each pull request with a github action.
Include coverage information reported by codecov.io
2021-03-16 18:31:37 -07:00
Ravishankar Bhagavandas 755daad276
Improve comments and assertions in stream buffer (#277)
* Improve comments and assertions in stream buffer

* Add back null check instead of assert

* Adding config assert back
2021-03-15 18:01:42 -07:00
Gaurav-Aggarwal-AWS 66b3f908df
Update comment in list.c (#276)
The tick interrupt priority must be configured to ensure that it cannot
interrupt a critical section. This change updates the comment to help
the application writer while debugging.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-03-12 12:11:19 -08:00
Paul Bartell 18d4ba9c07
Add some assertions and coverage exceptions to queue.c (#273)
* Add an LCOV_BRANCH exception for the check that sizeof( StaticQueue_t ) == sizeof( Queue_t )
* Add LCOV_BRANCH coverage exception for a configASSERT on pxQueueSetContainer with a condition that is unreachable.
* Add configASSERTs to alert when invalid parameters are passed into Queue Registry related functions.
* Assert that the semaphore handle passed into xQueueGetMutexHolder is not NULL.
* Correct some typos in queue.c
* Update lexicon.txt
2021-03-05 18:46:49 -08:00
xuelix de19eeb7d3
Moved git-secrets check to a different workflow (#271)
git-secrets check is now performed on all PR branches
2021-03-05 14:00:57 -08:00
alfred gedeon 4b5d1e4395
Comment: fix code comment for xTaskAbortDelay (#272) 2021-03-05 09:13:03 -08:00
xuelix 98eba938e2
Added git-secrets check to Github Actions (#270)
Co-authored-by: Gary Wicker <14828980+gkwicker@users.noreply.github.com>
2021-03-04 13:00:22 -08:00
Joseph Julicher 5e45472d6e
fixed documentation for ulTaskNotifyTake() and ulTaskNotifyTakeIndexed() (#269) 2021-03-03 09:38:12 -08:00
gomonovych 4fde4a8d0a
Add description for vTaskList (#206)
Describe each column which vTaskList print:
task name, task status, task priority, task stack unused watermark lewel, task number

Co-authored-by: David Chalco <59750547+dachalco@users.noreply.github.com>
2021-03-01 18:10:00 -07:00
Gaurav-Aggarwal-AWS 2a604f4a28
Support allocating stack from separate heap (#267)
The change adds support for allocating task stacks from separate heap.
When configSTACK_ALLOCATION_FROM_SEPARATE_HEAP is defined as 1 in
FreeRTOSConfig.h, task stacks are allocated and freed using
pvPortMallocStack and vPortFreeStack functions. This allows the
application writer to provide a separate allocator for task stacks.

When configSTACK_ALLOCATION_FROM_SEPARATE_HEAP is defined as 0, task
stacks are allocated and freed using FreeRTOS heap functions
pvPortMalloc and vPortFree.

For backward compatibility, configSTACK_ALLOCATION_FROM_SEPARATE_HEAP
defaults to 0.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-02-23 18:36:27 -08:00
Carl Lundin 81f5892105
Update python version to 3.7.10 (#265) 2021-02-18 18:48:11 -08:00
Jeff Tenney 1d4d16fd54
Update URL in history.txt (#259)
* Update URL in history.txt

* Configure CI header checker to ignore .txt files

Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>
2021-02-15 14:00:20 -08:00
milesfrain 5b9549ab82
Remove unmatched braces in MessageBuffer pre tags (#256)
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2021-02-10 21:41:05 -08:00
alfred gedeon a4b2e0c3f3
Check: improve verbosity of url verifier (#260)
* Check: improve verbosity of url verifier

* Fix Renesas url

* Fix Renesas url

* URL add Renesas full url

* Fix more Renesas URLs

* Fix Renesas url in IAR directory

* Testing new curl command for url checks

* Fix url_checker

* Fix url_verifier

* Revert Renesas url changes

* add txt to the ignored header checker extentions
2021-02-10 16:04:08 -08:00
Cobus van Eeden 21b1058bf7 Update issue templates 2021-02-10 15:27:16 -08:00
David Chalco 0345a20202
incorporate updates from common (#255)
* incorporate updates from common

* empty commit to rerun check
2021-01-29 18:58:55 -08:00
nazar01 6b4a3d0a6e
Typos (#248)
* Fix typos in FreeRTOS.h

* Fix typos in task.h

* Fix typos in tasks.c
2021-01-29 12:05:04 -08:00
David Chalco d0afede565
Delete gitattributes (#253) 2021-01-27 10:38:20 -07:00
Evgeny Ermakov 6b524a2fee
Fix typo in comment in task.h (#244) 2021-01-19 18:55:34 -08:00
alfred gedeon d060479353
Fix Github checks after move from master to main (#246) 2021-01-19 15:32:01 -08:00
David Chalco 578d040659
Add git attributes (#245)
* Add .gitattributes configured to normailze line endings to LF

* replace crlf with lf, per .gitattributes
2021-01-15 12:04:31 -07:00
Thomas Pedersen 23f641850d
Posix: fix build failure (#235)
Fixes: a48f137896 ("Posix Port: Comment and remove unused variables (#230)")

Authored-by: Thomas Pedersen <thomas@adapt-ip.com>
2021-01-08 14:19:15 -08:00
Shubham Kulkarni ef4c305244
Update ESP32 port to ESP-IDF release v4.2 and add ESP-IDF version check (#231)
* Revert "Reintroduce Espressif's IDF v4.2 changes to ESP32 port (#193)"

This reverts commit 3d4d17178f.

* Update ESP32 port files to work with ESP-IDF v4.2 as well as ESP-IDF v3.3

Add changes required to support ESP32-S2

* portmacro.h: Change return type of vApplicationSleep to void

This fixes build failure when automatic light sleep is enabled

* prevent header checks for files with different licensing

Co-authored-by: David Chalco <david@chalco.io>
2020-12-22 13:00:45 -08:00
David Chalco 341e9f06d0
update version in version checker (#239) 2020-12-22 12:57:39 -08:00
David Chalco 6349871ce6
AutoRelease + Header Checker Upgrades (#236)
* decouple kernel check configs from fr/fr + checker sources from PR ref

* Combo of various small edits

* enable compatibility with git action + create autorelease action
2020-12-22 10:06:59 -08:00
sherryzhang 8e99e2d38b
Align the TF-M version of the integration with kernel to version TF-Mv1.2.0 (#228)
Change-Id: I6d5f0732f4cb123df54b9df0b9820ef4dcf70fa4
Signed-off-by: Sherry Zhang <sherry.zhang2@arm.com>
2020-12-15 09:17:20 -08:00
Cobus van Eeden 9c048e0c71
Update History.txt 2020-12-15 07:18:49 -08:00
Joseph Julicher a8a9c3ea3e
Updated History.txt for V10.4.3 (#233) 2020-12-15 06:51:11 -08:00
Cobus van Eeden aa471cfd3f [AUTO][RELEASE]: Bump task.h version macros to "10.4.3" 2020-12-14 10:13:41 -08:00
Cobus van Eeden ec62f69dab [AUTO][RELEASE]: Bump file header version to "10.4.3" 2020-12-14 10:13:39 -08:00
Joseph Julicher 7825a40ba8
Updated History.txt for V10.4.3 (#232) 2020-12-14 10:10:55 -08:00
alfred gedeon a48f137896
Posix Port: Comment and remove unused variables (#230)
* Posix Port: Comment and remove unused variables
* Fix header, replace tabs with spaces
2020-12-13 17:33:45 -08:00
Cobus van Eeden 47338393f1
add assert for addition overflow on queue creation (#225) 2020-12-07 11:48:51 -08:00
Cobus van Eeden d05b9c123f
Add addition overflow check for stream buffer (#226) 2020-12-07 11:07:31 -08:00
Cobus van Eeden c7a9a01c94
Improve heap2 bounds checking (#224)
* Improve heap bounds checking in pvPortMalloc
2020-12-07 10:36:27 -08:00
Gaurav-Aggarwal-AWS b5020cb3d8
Prevent unprivileged task from altering MPU configuration (#227)
This change removes the FreeRTOS System Calls (aka MPU wrappers) for the
following kernel APIs:
- xTaskCreateRestricted
- xTaskCreateRestrictedStatic
- vTaskAllocateMPURegions

A system call allows an unprivileged task to execute a kernel API which
is otherwise accessible to privileged software only. The above 3 APIs
can create a new task with a different MPU configuration or alter the
MPU configuration of an existing task. This an be (mis)used by an
unprivileged task to grant itself access to a region which it does not
have access to.

Removing the system calls for these APIs ensures that an unprivileged
task cannot execute this APIs. If an unprivileged task attempts to
execute any of these API, it will result in a Memory Fault.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-12-07 09:53:22 -08:00
Gaurav-Aggarwal-AWS 68ca3a9b2a
Update branch of c-sdk repo to main (#223)
Also add missing apostrophe to stdint.readme

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-12-02 14:12:16 -08:00
David Chalco d0933fd6cb
Add kernel header check workflow (#219) 2020-11-17 15:40:10 -08:00
David Chalco 50a2321838 [AUTO][RELEASE]: Bump task.h version macros to "10.4.2" 2020-11-10 14:42:58 -08:00
David Chalco 337bca615e [AUTO][RELEASE]: Bump file header version to "10.4.2" 2020-11-10 14:42:58 -08:00
David Chalco 18f714f786
Update release date (#217) 2020-11-09 15:46:02 -08:00
David Chalco cf5c8b3a5d
Update History.txt for 10.4.2 (#216)
* Update History.txt for 10.4.2

* Update History.txt

Co-authored-by: RichardBarry <3073890+RichardBarry@users.noreply.github.com>
2020-11-09 08:37:54 -08:00
Gaurav-Aggarwal-AWS ebbe2cf854
Ensure interrupts are enabled at first task start (#214)
Critical sections in FreeRTOS are implemented using the following two
functions:

void vPortEnterCritical( void )
{
    portDISABLE_INTERRUPTS();
    uxCriticalNesting++;
}

void vPortExitCritical( void )
{
    uxCriticalNesting--;

    if( uxCriticalNesting == 0 )
    {
        portENABLE_INTERRUPTS();
    }
}

uxCriticalNesting is initialized to a large value at the start and set
to zero when the scheduler is started (xPortStartScheduler). As a
result, before the scheduler is started, a pair of enter/exit critical
section will leave the interrupts disabled because uxCriticalNesting
will not reach zero in the vPortExitCritical function. This is done to
ensure that the interrupts remain disabled from the time first FreeRTOS
API is called to the time when the scheduler is started. The scheduler
starting code is expected to enure that interrupts are enabled before
the first task starts executing.

Cortex-M33 ports were not enabling interrupts before starting the first
task and as a result, the first task was started with interrupts
disabled. This PR fixes the issue by ensuring that interrupts are
enabled before the first task is started.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-11-05 09:26:56 -08:00
filipgeorge 1431b65110
porthardware.h file update for AVR Mega0 and Dx (#212)
* Added guard for ioavr.h include in AVR Dx porthardware.h file.
* Added guard for ioavr.h include in AVR Mega0 porthardware.h file.
2020-10-27 12:26:52 -07:00
Carl Lundin 6a5784598a
Upstream stack masking fix to GCC ports. (#210)
Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
2020-10-27 11:32:09 -07:00
Jon Snow bdb38d85dc
update interrupt vector names for ATMega32 (#196) 2020-10-26 13:31:15 -07:00
Cobus van Eeden 94ffcac27c
Added CODEOWNERS file (#209) 2020-10-26 13:24:55 -07:00
magicse7en 82df39764a
Xtensa: fix the coproc_area incorrect issue (#117)
* Xtensa: fix the coproc_area incorrect issue

foss-xtensa/amazon-freertos#2 mentioned a issue:
1.
In function pxPortInitialiseStack(StackType_t *pxTopOfStack....)
p = (uint32_t *)(((uint32_t) pxTopOfStack - XT_CP_SIZE) & ~0xf);

In function prvInitialiseNewTask (file: task.c)
pxTopOfStack = (pxStack + (ulStackDepth - 1)) & (~portBYTE_ALIGNMENT_MASK)

So the co-processor area is at
p = (uint32_t *)(((uint32_t)((pxStack + (ulStackDepth - 1)) & (~portBYTE_ALIGNMENT_MASK)) - XT_CP_SIZE) & ~0xf);

2.
In function vPortStoreTaskMPUSettings( .... , StackType_t pxBottomOfStack ...)
xMPUSettings->coproc_area = (StackType_t)((((uint32_t)(pxBottomOfStack + usStackDepth - 1)) - XT_CP_SIZE) & ~0xf);

pxBottomOfStack = pxStack

=> xMPUSettings->coproc_area = (StackType_t*)((((uint32_t)(pxStack+ ulStackDepth - 1)) - XT_CP_SIZE ) & ~0xf);

The p is coproc_area that should be equal to xMPUSettings->coproc_area.

For example, assume pxStack is 0xa0000000, ulStackDepth is 0x2000,
portBYTE_ALIGNMENT_MASK is 0x7f, XT_CP_SIZE is 0x100.

The p = (uint32_t)(((uint32_t)((pxStack + (ulStackDepth - 1)) & (~portBYTE_ALIGNMENT_MASK)) - XT_CP_SIZE) & ~0xf)
      = 0xa0001e80
The xMPUSettings->coproc_area = (StackType_t)((((uint32_t)(pxStack+ usStackDepth - 1)) - XT_CP_SIZE ) & ~0xf)
                              = 0xa0001ef0
Obviously, the p is not equal to the xMPUSettings->coproc_area, which will cause context switching error.

Signed-off-by: magicse7en <magicse7en@outlook.com>

* Update port.c

Co-authored-by: Carl Lundin <53273776+lundinc2@users.noreply.github.com>
2020-10-26 11:47:21 -07:00
magicse7en b9748e50ea
Xtensa: fix stack overlap coproc_area issue (#118)
In function pxPortInitialiseStack of port.c:
	sp = ( StackType_t * ) ( ( ( UBaseType_t ) ( pxTopOfStack + 1 )  - XT_CP_SIZE - XT_STK_FRMSZ ) & ~0xf );
We assume XT_CP_SIZE is 0xE4, XT_STK_FRMSZ is 0xA0, pxTopOfStack is 0xA0000000, sp is 0x9FFFFE80.
From port.c, we know the frame->a1 as below:
	frame->a1 = ( UBaseType_t ) sp + XT_STK_FRMSZ;  /* physical top of stack frame    */
So frame->a1 is 0x9FFFFF20. Therefore the interrupt stack frame range is 0x9FFFFE80 ~ 0x9FFFFF20.

The coproc_area is: p = ( uint32_t * ) ( ( ( uint32_t ) pxTopOfStack - XT_CP_SIZE ) & ~0xf );
So its value is 0x9FFFFF10. Obviously, the interrupt stack frame overlaps the coproc_area.

Co-authored-by: Carl Lundin <53273776+lundinc2@users.noreply.github.com>
2020-10-26 11:07:32 -07:00
alfred gedeon f376c3bd71
Fix: Pass lexicon.txt as a parameter (#208)
* Fix: pass lexicon.txt as a parameter

* Fix lexicon location
2020-10-23 11:33:41 -07:00
Gaurav-Aggarwal-AWS db62e30bce
Fix missed yield in xTaskResumeFromISR (#207)
If a higher priority task than the currently running task was resumed
using xTaskResumeFromISR and the user chose to ignore the return value
of xTaskResumeFromISR to initiate a context switch using
portYIELD_FROM_ISR, we were not doing the context switch on the next run
of the scheduler. This change fixes this by marking a yield as pending
to ensure that the context switch is performed on the next run of the
scheduler.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-10-22 17:09:35 -07:00
alfred gedeon c6636f465f
Move markdown files and lexicon into .github directory (#205)
* Move markdown files and lexicon into .github directory
2020-10-21 18:40:43 -07:00
alfred gedeon f62dfa20c8
Fix: C++ compiler warning (#203) 2020-10-20 15:37:14 -07:00
RichardBarry 5fb26de019
Recently vTaskDelayUntil() was updated to xTaskDelayUntil() because the function now returns a value. The PR didn't make the same change in the MPU port, or update the constants required to include the xTaskDelayUntil() function in the build. (#199)
This PR:
Changes the INCLUDE_vTaskDelayUntil compile time constant to INCLUDE_xTaskDelayUntil.
Updates FreeRTOS.h to ensure backward compatibility for projects that already have INCLUDE_vTaskDelayUntil defined.
Updates the MPU prototypes, wrapper and implementation to use the updated xTaskDelayUntil() function.

Tests to be checked into the FreeRTOS/FreeRTOS repository after this PR.
2020-10-11 14:04:49 -07:00
RichardBarry 71be31bb61
xStreamBufferSend() caps the maximum amount of data a stream buffer can send to the maximum capacity of the buffer - however the value to which the length is capped was wrong, and is correct by this check in. Likewise when sending to a message buffer if the send length is too long the block time is set to 0 to ensure the sending task does not wait indefinitely for the impossible send to complete - but the length check was wrong, and is corrected by this check in. (#195) 2020-10-10 21:47:54 -07:00
RichardBarry 167ea16282
Minor updates to formatting and MISRA compliance of the PR used to update the vTaskDelayUntil() function to xTaskDelayUntil(). (#198) 2020-10-10 21:42:38 -07:00
Joseph Julicher 6375d52250
matching the preprocessor conditionals for xTaskGetCurrentTaskHandle() (#197) 2020-10-08 18:44:30 -07:00
Spacefish 3260e228c3
vTaskDelayUntil improvement (#77)
* vTaskDelayUntil improvement

* suggestions implemented

* xTaskDelayUntil #define added

* doc small fix

* small formatting stuff

* more small formatting stuff

* Update lexicon.txt

Co-authored-by: Carl Lundin <53273776+lundinc2@users.noreply.github.com>
Co-authored-by: Carl Lundin <lundinc@amazon.com>
2020-10-08 17:46:47 -07:00
Carl Lundin 3d4d17178f
Reintroduce Espressif's IDF v4.2 changes to ESP32 port (#193)
* Renamed old port to ESP_IDF_V3

* Update ESP32 port files to support IDF v4.2.

* Add changes required to support ESP32-S2

Co-authored-by: Shubham Kulkarni <shubham.kulkarni@espressif.com>
2020-10-08 11:03:27 -07:00
Reda Maher 77ad717400
Posix: Fix no task switching issue if a task ended its main function (#184)
* Posix: Fix no task switching issue if a task ended

When the main function of a task exits, no task switching happened.
This is because all the remaining tasks are waiting on the condition
variable. The fix is to trigger a task switch and mark the exiting
task as "Dying" to be suspened and exited properly from the scheduler.

* Posix: Assert and stop if the Task function returned

* Posix: just assert if a task returned from its main function

Co-authored-by: alfred gedeon <alfred2g@hotmail.com>
2020-10-05 18:06:51 -07:00
RichardBarry fccb97b10b
No functional changes. (#194)
Shorted overly verbose and opinionated comments in xStreamBufferSend().
Remove the unnecessary xIsFeasible variable from xStreamBufferSend().
2020-10-03 21:26:22 -07:00
David Chalco b1307dbea8
OpenOCD Support: Re-introduce uxTopUsedPriority (#188)
* re-introduce uxTopUsedPriority. Prevent removal by optimization

* Make uxTopUsedPriority volatile to avoid optimizer + code comment

Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
2020-10-01 12:40:21 -07:00
Cobus van Eeden a4625fbd4d Update issue templates 2020-09-30 17:58:12 -07:00
Cobus van Eeden 3e9f748b55
Update issue templates (#191) 2020-09-30 17:28:28 -07:00
Cobus van Eeden f2be29dd8e
Create config.yml (#190) 2020-09-30 17:10:49 -07:00
Reda Maher baeb5af9a4
Posix: Free the allocated memory after deleting a task or ending the scheduler (#181)
* Posix: Free Idle task resources after ending the scheduler

In case of using Posix simulator and ending the scheduler, it does
not free the resources allocated by the idle task. This
causes the memory checkers (Valgrind, Address Sanitizers, ..) to
complain.

* Posix: Free the condition variable memory in the correct place

In case of deleting a task from another task, the deletion happens
immediately and the thread is canceled but the memory allocated by
the task condition variable is not freed. This causes the memory
checkers (Valgrind, Address sanitizers, ..) to complain.

* Posix: End Timer thread and free its resources after ending the scheduler
2020-09-29 14:06:10 -07:00
Gaurav-Aggarwal-AWS 2225bb5620
Fix Stack alignment for Microchip PIC32MX port (#182)
* Fix Stack alignment for Microchip PIC32MX port

The stack of a task was not 8 byte aligned. Adding one more unused space
at the beginning of task stack (before simulated context) ensures that
the stack is 8 byte aligned. The stack (with simulated context) of a
newly created task looks like the following:

                    +------------+
                    | UNUSED     |
                    +------------+
                    | UNUSED     |
                    +------------+
                    | 0xDEADBEEF |
                    +------------+
                    | 0x12345678 |
                ^   +------------+
                |   | CAUSE      | <-- SP After Context Restore
                |   +------------+
                |   | STATUS     |
                |   +------------+
                |   | EPC        |
                |   +------------+
                |   | ra         |
                |   +------------+
                |   | s8         |
                |   +------------+
                |   | t9         |
                |   +------------+
                |   | t8         |
                |   +------------+
                |   | t7         |
                |   +------------+
                |   | t6         |
                |   +------------+
                |   | t5         |
                |   +------------+
                |   | t4         |
                |   +------------+
                |   | t3         |
                |   +------------+
                |   | t2         |
                |   +------------+
                |   | t1         |
                |   +------------+
    Context     |   | t0         |
  (132 bytes)   |   +------------+
                |   | a3         |
                |   +------------+
                |   | a2         |
                |   +------------+
                |   | a1         |
                |   +------------+
                |   | a0         |
                |   +------------+
                |   | v1         |
                |   +------------+
                |   | v0         |
                |   +------------+
                |   | s7         |
                |   +------------+
                |   | s6         |
                |   +------------+
                |   | s5         |
                |   +------------+
                |   | s4         |
                |   +------------+
                |   | s3         |
                |   +------------+
                |   | s2         |
                |   +------------+
                |   | s1         |
                |   +------------+
                |   | s0         |
                |   +------------+
                |   | at         |
                |   +------------+
                |   | HI         |
                |   +------------+
                |   | LO         |
                |   +------------+
                V   |            |
                    +------------+
                    |            | <-- SP After Context Save
                    +------------+

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Update comment

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-09-28 00:16:18 -07:00
NoMaY (a user of Japan.RenesasRulz.com) c3117b4237
Maintenance: Add readme.txt in each Renesas RX folder to show recommended port (#152)
* Maintenance: Add readme.txt in each Renesas RX folder to show recomended port
* Update readme.txt in each Renesas RX folder regarding to Notes *1 and *2 (both are RX100 port)
2020-09-28 00:09:49 -07:00
alfred gedeon f2d8f66ae3
Maintenance: Github workflow URL checker (#179)
* Remove non needed spell checks

* FreeRTOS Kernel Spelling Update (#170)

* FreeRTOS Kernel Spelling Update

* Added spell check to kernel repository.
* Fixed small spelling errors in various kernel source files.
* Added documentation for spellcheck.

Note: Only kernel files are checked for spelling, and portable files are ignored.

* Fix exit 0

* Remove spell

* add echo

* Call script from ci

* Fix script location

* Print pwd

* Fix script

* Fix script

* Remove some lines from script

* uncomment lines and fix exit

* use bash instead of sh

* Move url checker to the action directory

* Separate spell and url checkers

* Fix bad merge from master

* Fix yml file error

* Add another step to the url checker

Co-authored-by: Carl Lundin <53273776+lundinc2@users.noreply.github.com>
2020-09-24 12:35:22 -07:00
alfred gedeon d428209d01
Fix some broken/redirected URL (#172)
* Style: fix some broken/redirect links

* Fix: atmel url

* Fix microchip typo

* Fix url links

* Fix shortcut link

* Comment: fix line wrapping

* Style: fix line wrapping to 80 chars

* Add now microchip beside Atmel

* Fix link in History

* Add Now Microchip before Atmel link

* Comment: add *
2020-09-21 15:49:55 -07:00
Cobus van Eeden 375b085295
Updated wording of ulTaskNotifyTakeIndexed fix (#178) 2020-09-18 10:22:09 -07:00
Cobus van Eeden 385e700953
Update History.txt and fix versioning in asm files (#177) 2020-09-18 08:05:13 -07:00
David Chalco 3604527e3b
Update version number to 10.4.1 (#173) 2020-09-17 15:25:15 -07:00
Ravishankar Bhagavandas 31dc8f39bd
Fix: Rename parameter uxIndexToNotify to uxIndexToWaitOn (#174) 2020-09-17 13:16:39 -07:00
Carl Lundin acee77be5b
FreeRTOS Kernel Spelling Update (#170)
* FreeRTOS Kernel Spelling Update

* Added spell check to kernel repository.
* Fixed small spelling errors in various kernel source files.
* Added documentation for spellcheck.

Note: Only kernel files are checked for spelling, and portable files are ignored.
2020-09-16 11:17:39 -07:00
NoMaY (a user of Japan.RenesasRulz.com) 242808132c
Fix broken #warning message in ARM_CMx_MPU/portmacro.h between 10.3.1 and 10.4.0 (#171) 2020-09-15 01:55:55 -07:00
RichardBarry 85768bb3e0
Sets the version number to 10.4.0 in assembly files. The (#166)
assembly files were missed when the other source files had
their version numbers updated.
2020-09-14 09:49:46 -07:00
David Chalco 5dfab0306b
Update version number to 10.4.0 (#153) 2020-09-10 19:49:34 -07:00
yngki c1dff8fe95
Update History.txt (#160)
* Update History.txt

* Update History.txt

Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
2020-09-10 15:01:08 -07:00
alfred gedeon 16bc35c21c
Fix: Comment - xTaskIncrementTick loop - to adhere to demo requirement (#162)
Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
2020-09-10 14:36:34 -07:00
Joseph Julicher 2f14899ce8
Revert "RISC-V: Add RV32E / FPU support for GCC (#140)" (#163)
This reverts commit 0037a6c574.
2020-09-10 12:46:15 -07:00
Cobus van Eeden cfb51b3db8
Add url link for Linux Simulator documentation (#161) 2020-09-09 14:35:52 -07:00
Emmanuel Puerto 0037a6c574
RISC-V: Add RV32E / FPU support for GCC (#140)
* Change vPortSetupTimerInterrupt in order to have 64bits access on rv64

* Support RV32E - RISC-V architecture (GCC)

Signed-off-by: Emmanuel Puerto <emmanuel.puerto@sifive.com>

* Support FPU - RISC-V architecture (GCC)

Signed-off-by: Emmanuel Puerto <emmanuel.puerto@sifive.com>

* Fix interrupt managment and FPU initialization
2020-09-09 11:06:16 -07:00
sherryzhang 524e78d58b
Introduce Trusted Firmware M support in Kernel on ARM Cortex M33 (#108)
This port adds the support that FreeRTOS applications can call the secure
    services in Trusted Firmware M(TF-M) via PSA Platform Security
    Architecture(PSA) API based on Arm Cortex-M33 platform with GCC compiler.

    More information:
    PSA - https://www.arm.com/why-arm/architecture/platform-security-architecture
    TF-M - https://git.trustedfirmware.org/trusted-firmware-m.git/

Change-Id: I2e771b66e8d75927abc2505a187a16250d504db2
Signed-off-by: Sherry Zhang <sherry.zhang2@arm.com>
2020-09-09 08:15:50 -07:00
YuguoWH 651289ef04
Synopsys ARC v1 Port: add support to Synopsys ARC v1 series cores (#110)
* Synopsys Port: Adding support to Synopsys ARC v1 series cores
ARC v1 cores include ARC605, ARC610d, and ARC710d

Signed-off-by: Yuguo Zou <yuguo.zou@synopsys.com>

* Synopsys ARC v1 port: run uncrustify to fix code style

Signed-off-by: Yuguo Zou <yuguo.zou@synopsys.com>

* Synopsys port: modify license headers, change copyright only

Signed-off-by: Yuguo Zou <yuguo.zou@synopsys.com>
2020-09-08 08:40:17 -07:00
alfred gedeon 35f0b2ab84
Change the Linux Port to use condition variables instead of Signals (#156)
* Posix port with pthread cond instead of signals
* Comment: replace signal with pthread_cond
Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
2020-09-07 09:56:28 -07:00
RichardBarry 700c1cf9c6
Fix compiler warning in config assert() on 64 bit architecture (#158)
* Replace the following code that was used to force an assert:
configASSERT( pxTCB->ulNotifiedValue[ uxIndexToNotify ] == ~0UL );

with:
configASSERT( xTickCount == ( TickType_t ) 0 );

Because the former generates a warning on 64-bit architectures.
2020-09-06 22:08:00 -07:00
Ming Yue 82fdc1c3ee
Change the header file name into lower case so it can work on GNU/Linux for MinGW cross-compiling. (#144) 2020-08-28 14:59:30 -07:00
alfred gedeon 148c81a7bc
Revert "Fix: Add Parenthesis around if-statement in macro (#138)" (#148)
This reverts commit 45e97bd246.
2020-08-28 14:19:31 -07:00
Ming Yue 58ffcb1a6d
Revert "Fix race condition when tracing is enabled (#95)" (#149)
This reverts commit 61635d5b8b.
2020-08-28 14:17:29 -07:00
RichardBarry ce39ebe45b
Update history.txt (#150)
* Update History.txt ready for the 10.4.0 release.
2020-08-28 14:14:29 -07:00
Gary Wicker 5308b1a023
Use unsigned constant in pdMS_TO_TICKS(). (#147) 2020-08-28 11:50:31 -07:00
Cobus van Eeden d7fd5a1195
Revert "Fix inaccurate ticks in windows port (#142)" (#143)
This reverts commit d85fd461d9.
2020-08-27 12:06:03 -07:00
Cobus van Eeden d85fd461d9
Fix inaccurate ticks in windows port (#142) 2020-08-27 10:12:51 -07:00
Cobus van Eeden 805b15a022
Removing general-inquiry.md to divert people to the forums. (#141) 2020-08-26 12:08:39 -07:00
alfred gedeon 45e97bd246
Fix: Add Parenthesis around if-statement in macro (#138)
Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
2020-08-26 10:50:35 -07:00
Ravishankar Bhagavandas 1d8df4752e
Update Renesas GCC compiler ports (#135)
* Add RX200 GCC compiler

Signed-off-by: Dinh Van Nam <vannam.dinh.xt@renesas.com>

* Update GCC compiler for:
 * RX600v2
 * RX600
 * RX100

Signed-off-by: Dinh Van Nam <vannam.dinh.xt@renesas.com>

* Use configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H flag

* Use configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H flag RX100, RX200

Co-authored-by: Dinh Van Nam <vannam.dinh.xt@renesas.com>
2020-08-24 15:32:45 -07:00
alfred gedeon 0afc048cf2
Style: Add uncrustify guards, fix asm (#136)
Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
2020-08-24 15:32:02 -07:00
alfred gedeon a038146915
Style: Make freertos.org = FreeRTOS.org and add https (#134)
* Style: make freertos.org = FreeRTOS.org also add https

* Style: Fix freertos into FreeRTOS

* Style: Fix freertos into FreeRTOS

Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
2020-08-21 11:30:39 -07:00
Carl Lundin 7cd4a4f276
Fix compiler issues cause by formatting assembly code on ESP32 port (#133) 2020-08-21 10:55:58 -07:00
alfred gedeon 0b0a2060c0
Style: Change FreeRTOS websites in comments (#131)
* Style: Change FreeRTOS websites in comments

* Style: Change freertos to FreeRTOS in comments

* Style: Remove broken link

Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
2020-08-20 14:59:28 -07:00
Carl Lundin 10a0b1e54b
Revert "Update ESP32 port files (#92)" (#132)
This reverts commit adbfca5420.
2020-08-20 14:41:44 -07:00
David Chalco ebda49376e
finish up PR67. Also add missing <\pre> tags (#130) 2020-08-18 16:28:02 -07:00
Joseph Julicher 6ef079f393
StackMacros now includes stack_macros (#129) 2020-08-18 12:30:12 -07:00
Joseph Julicher 1865857eae
Moving the function prototypes to headers (#128)
* Removing StackMacros.h

* Moving 4 Function Prototypes out of the C files into the headers

* Revert "Removing StackMacros.h"

This reverts commit cdd8307817.
2020-08-18 11:29:00 -07:00
alfred gedeon 9a1ebfec31
Style: Uncrustify kernel file - remove tab == 4 spaces (#123)
* Style: uncrystify kernel files and remove tabs

* Style: uncrystify kernel files and remove tabs

Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
2020-08-17 16:16:11 -07:00
Joseph Julicher 386d854e0b
added a warning concerning the incomplete testing of the RX700v3_DFPU port (#124) 2020-08-17 15:33:10 -07:00
alfred gedeon 8c77117c32
Style: Remove tabs and tab == 4 spaces (#120)
* Style: Remove tabls and tab == 4 spaces

* Style: remove xx accidentally left

* Style: revert uncrustify for untested portable directories

* Style: revert more uncrustify files

* Style: Revert more uncrustified files

* Style: Revert some uncrutified files

* Style: change more files

* Style: remove t tab == 4 spaces

* Style: remove tabs = spaces

* Style: revert changed files

* Style: redo the stuyles

* Style: add uncrustify disable parsing for asm

Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
2020-08-17 14:50:56 -07:00
alfred gedeon 86653e2a1f
Style: Revert uncrustify for portable directories (#122)
* Style: revert uncrustify portable directories

* Style: Uncrustify Some Portable files

Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
2020-08-17 10:51:02 -07:00
NoMaY (a user of Japan.RenesasRulz.com) a6da1cd0ce
Add Renesas RXv3 port layer supporting RXv3's double precision FPU (#104) 2020-08-14 11:16:48 -07:00
Yuhui Zheng 4bde12f223
Use pdTRUE/pdFALSE instead of TRUE/FALSE in xStreamBufferSend(). (#114) 2020-08-11 21:44:57 -07:00
Simon Beaudoin 61fc74f0c5
Update stream_buffer.c (#94)
Add necessary checks when sending data to the stream/message buffer in order to avoid a task deadlock when attempting to write a longer stream/message than the underlying buffer can write.
2020-08-10 09:55:04 -07:00
Simon Beaudoin 61635d5b8b
Fix race condition when tracing is enabled (#95)
* Update port.c

I discovered a very snicky and tricky race condition scenario when integrating tracealyzer code into our project.

A little background  on CortexR5 : When the IRQ line (comming from the interrupt controller, to which every peripheral IRQ lines connect) of the processor rises and the IRQ Enable bit in the status register of the CPU permits it, the CPU traps into interrupt mode. Several things happen. First, the CPU finishes the instruction it was performing. Second, it places the content of the CPSR register into the SPSR_irq register. And third, the mode of the CPU is changed to IRQ_Mode and /!\ THE IRQ ENABLE BIT IN CPSR_irq IS AUTOMATICALLY CLEARED /!\. The reason is to ensure that upon landing into IRQ code, we find ourselves automatically in a critical section because we cannot be interrupted again because the bit is cleared. The programmer can, if he wants, re-enable IRQs inside IRQ code itself to allow interrupt nesting. But it has to be wanted and meditated. 


Now, inside portASM.S, at the end of 'FreeRTOS_IRQ_Handler' assembly function, a call to 'vTaskSwitchContextConst' is made if the variable 'ulPortYieldRequired' was set by someone while executing the interrupt. Before branching to that function, a 'CPSID	i' instruction was placed to ensure that interrupts are disabled in case someone re-enabled it. Inside 'vTaskSwitchContext', there is the macro 'traceTASK_SWITCHED_OUT' that gets populated when tracing is enabled. 

The bug is right there.. If the macro is populated and inside that macro there is a matching call to 'ulPortSetInterruptMask' and 'vPortClearInterruptMask', a race condition can occure is there is a OS Tick timer interrupt waiting at the interrupt controller's door. Upon calling 'vTaskSwitchContext', the interrupts are not masked in the interrupt controller, the only barrier against the CPU servicing that tick interrupt while already performing the function is that the IRQ Enable bit cleared. 'ulPortSetInterruptMask' 
does what's its supposed to do, but doesn't take into account the IRQ Enable bit in CPSR. Wheter or not the bit was cleared, the function sets it at the end. When calling the matching 'vPortClearInterruptMask', the function clears the interrupt mask in the interrupt controller. Because the IRQ Enable bit (that was cleared) has been set no matter what in 'ulPortSetInterruptMask', the CPU services the OS Tick Interrupt right away. 

The bug is there : instead of completing the 'vTaskSwitchContext' function, the CPU re-enters the switch context path right after 'traceTASK_SWITCHED_OUT' thus corrupting the CPU state and eventually triggering either an undefined instruction, data or instruction abort.

* Update port.c

Error on my part, this is the right inline asm code to retreive CPSR register

* Update port.c

Forgot an * while writing comment..
2020-08-10 09:46:39 -07:00
RichardBarry 55da9591c0
Fix: Two one line fixes, xTaskCheckForTimeOut() and ulTaskGenericNotifyValueClear(). (#82)
ulTaskGenericNotifyValueClear() returned the notification value of the
currently running task, not the target task.  Now it returns the
notification value of the target task.

Some users expected xTaskCheckForTimeOut() to clear the 'last wake time'
value each time a timeout occurred, whereas it only did that in one path.
It now clears the last wake time in all paths that return that a timeout
occurred.
2020-08-09 16:18:57 -07:00
Gaurav-Aggarwal-AWS 287361091b
Allow application to override TEX,S,C and B bits for Flash and RAM (#113)
The TEX,  Shareable (S), Cacheable (C) and Bufferable (B) bits define
the memory type, and where necessary the cacheable and shareable
properties of the memory region.

The default values for these bits, as configured in our MPU ports, are
sometimes not suitable for application. One such example is when the MCU
has a cache, the application writer may not want to mark the memory as
shareable to avoid disabling the cache. This change allows the
application writer to override default vales for TEX, S C and B bits for
Flash and RAM in their FreeRTOSConfig.h. The following two new
configurations are introduced:

- configTEX_S_C_B_FLASH
- configTEX_S_C_B_SRAM

If undefined, the default values for the above configurations are
TEX=000, S=1, C=1, B=1. This ensures backward compatibility.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-08-08 18:37:14 -07:00
m17336 a2e00f0c6b
Update to AVR_Mega0 and AVR_Dx GCC ports + addition of their IAR equivalents (#106)
* Removed TICK_stop() macro from portable/GCC/{AVR_AVRDx, AVR_Mega0}/porthardware.h because it is not used anywhere.

* Updated indentation in portable/GCC/{AVR_AVRDx, AVR_Mega0}/* files.

* Added portable/IAR/{AVR_AVRDx, AVR_Mega0 folders.
2020-08-06 16:24:05 -07:00
DavidJurajdaNXP bda9869271
IAR Embedded Workbench modified behaviour of weak declaration "#pragma weak" in release 8.50.5. (#83)
This modification result in build error in case of FreeRTOS CM0 port.
To fix the issue use __weak in function definition instead.
2020-07-30 21:00:10 -07:00
Shubham Kulkarni adbfca5420
Update ESP32 port files (#92)
Add changes required to support ESP32-S2
2020-07-30 20:58:51 -07:00
Gaurav-Aggarwal-AWS 4383c8fae3
Change the xRunningPrivileged check from "!=true" to "==false" (#109)
The expected behaviour of portIS_PRIVILEGED is:
- return 0 if the processor is not running privileged.
- return 1 if the processor is running privileged.

Some TI ports do not return 1 when the processor is running privileged
causing the following check to fail: if( xRunningPrivileged != pdTRUE )

This commit change the check to: if( xRunningPrivileged == pdFALSE ). It
ensures that the check is successful even on the ports which return incorrect
value from portIS_PRIVILEGED when the processor is running privileged.

See https://forums.freertos.org/t/kernel-bug-nested-mpu-wrapper-calls-generate-an-exception/10391

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-07-30 19:32:31 -07:00
Gaurav-Aggarwal-AWS 676d99e302
Use configSYSTICK_CLOCK_HZ to configure SysTick (#103)
configSYSTICK_CLOCK_HZ should be used to configure SysTick to support
the use case when the clock for SysTick timer is scaled from the main
CPU clock.

configSYSTICK_CLOCK_HZ is defined to configCPU_CLOCK_HZ when it is not
defined in FreeRTOSConfig.h.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-07-24 09:45:42 -07:00
Gaurav-Aggarwal-AWS 7dd6b76011
Add support for 16 MPU regions to Cortex-M4 MPU ports (#96)
ARMv7-M supports 8 or 16 MPU regions. FreeRTOS Cortex-M4 MPU ports so
far assumed 8 regions. This change adds support for 16 MPU regions. The
hardware with 16 MPU regions must define configTOTAL_MPU_REGIONS to 16
in their FreeRTOSConfig.h.

If left undefined, it defaults to 8 for backward compatibility.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-07-24 07:47:41 -07:00
Carl Lundin 367faab135
Specify where the uncrustify config is (#102) 2020-07-23 17:00:14 -07:00
YuguoWH 5b6c2ab085
Synopsys ARC update, with updated BSP support (#99)
Update BSP APIs to latest version
Remove unused macro which could have caused warnings
(Code Style) Manually align some macros

Signed-off-by: Yuguo Zou <yuguo.zou@synopsys.com>
2020-07-22 17:14:09 -07:00
m17336 bb56edff2f
Added GCC port files for AVR Mega0 and AVR Dx. (#101) 2020-07-21 15:11:57 -07:00
Gaurav-Aggarwal-AWS c273690296
Rmove MPU_pvPortMalloc and MPU_vPortFree from mpu_wrappers.c (#88)
These definitions were not useful because the corresponding mapping was
removed from mpu_wrappers.h earlier.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-07-15 19:46:35 -07:00
Gaurav-Aggarwal-AWS 149f06c70f
Update incorrect port in comments (#87)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-07-15 19:44:57 -07:00
Gaurav-Aggarwal-AWS a717d9c62b
Update portNVIC_SYSPRI2_REG to portNVIC_SHPR3_REG (#86)
The reason for the change is that the register is called System Handler
Priority Register 3 (SHPR3).

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-07-15 19:44:45 -07:00
Gaurav-Aggarwal-AWS bb1c429378
Place privileged symbols correctly (#84)
Some of the privileged symbols were not being placed in their respective
sections. This commit addresses those and places them in
privileged_functions or privileged_data section.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-07-14 16:22:42 -07:00
Gaurav-Aggarwal-AWS b6a43866da
Add support for privileged heap to ARMV8-M ports (#85)
If xTaskCreate API is used to create a task, the task's stack is
allocated on heap using pvPortMalloc. This places the task's stack
in the privileged data section, if the heap is placed in the
privileged data section.

We use a separate MPU region to grant a task access to its stack.
If the task's stack is in the privileged data section, this results in
overlapping MPU regions as privileged data section is already protected
using a separate MPU region. ARMv8-M does not allow overlapping MPU
regions and this results in a fault. This commit ensures to not use a
separate MPU region for the task's stack if it lies within the
privileged data section.

Note that if the heap memory is placed in the privileged data section,
the xTaskCreate API cannot be used to create an unprivileged task as
the task's stack will be in the privileged data section and the task
won't have access to it. xTaskCreateRestricted and
xTaskCreateRestrictedStatic API should be used to create unprivileged
tasks.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-07-14 16:22:14 -07:00
Alfred Gedeon 587a83d647 Style: uncrustify kernel files 2020-07-08 10:24:06 -07:00
Alfred Gedeon 66a815653b Style: uncrustify 2020-07-08 10:24:06 -07:00
Alfred Gedeon f8ac4107ec Style: uncrustify 2020-07-08 10:24:06 -07:00
Alfred Gedeon 2c530ba5c3 Style: uncrustify 2020-07-08 10:24:06 -07:00
Alfred Gedeon 718178c68a Style: uncrusitfy 2020-07-08 10:24:06 -07:00
Alfred Gedeon a5dbc2b1de Style: uncrustify kernel files 2020-07-08 10:24:06 -07:00
David Chalco 4a61f9ff7e
Improvement to O.F. protections (#75)
* Added protection for xQueueGenericCreate

* prevent eventual invalid state change from int8 overflow

* Append period at end of comment. To be consistent with file.

* check operand, not destination

* parantheses -- to not show assumptive precendence

* Per request, less dependence on stdint by defining and checking against queueINT8_MAX instead
2020-06-30 11:03:30 -07:00
Gaurav-Aggarwal-AWS b47ca712d8
Update mpu_wrappers with task notification changes (#79)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-06-26 09:35:28 -07:00
eriktamlin 359b10a4ea
Added index to all trace points. (#69) 2020-06-17 16:38:06 -07:00
Gaurav-Aggarwal-AWS c4b4156fcf
Fix out of offset errors when LTO is enabled (#71)
When Link Time Optimization (LTO) is enabled, some of the LDR
instructions result in out of range access. The reason is that the
default generated literal pool is too far and not within the permissible
range of 4K.

This commit adds LTORG assembly instructions at required places to
ensure that access to literals remain in the permissible range of 4K.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-06-10 10:03:11 -07:00
cykro82 6199b72fbf
Renamed trace point in prvNotifyQueueSetContainer() so it isn't a d… (#47)
* * Renamed trace point in prvNotifyQueueSetContainer() so it isn't a duplicate of the trace point in xQueueGenericSend()

* * Fixed backwards compatibility.

Co-authored-by: Erik Tamlin <erik.tamlin@percepio.com>
2020-06-02 10:50:02 -07:00
RichardBarry 4b353bfd7a
Updated History.txt for task notification array change (#65)
Updated History.txt to note the single task notification per task has been replaced with an array of task notifications per task.
2020-05-28 09:55:17 -07:00
syntroniks 968a26c469
updates FreeRTOS.h to handle new usages of task notify (#64) 2020-05-28 08:12:24 -07:00
Yuhui Zheng f602be2a90
Removing vPortEndScheduler() implementation, since it's not implemented according to spec. (#61)
Refer to https://www.freertos.org/a00133.html.
The issue with the implementation is that, if only stop kernel tick the program will keep executing current task.
The desired behavior is to at least return/jump to the next instruction after vTaskStartScheduler().

Signed-off-by: Yuhui Zheng <10982575+yuhui-zheng@users.noreply.github.com>
2020-05-27 14:08:44 -07:00
RichardBarry f2081af030
Feature/multiple direct to task notifications (#63)
Description
Before this change each task had a single direct to task notification value and state as described here: https://www.FreeRTOS.org/RTOS-task-notifications.html. After this change each task has an array of task notifications, so more than one task notification value and state per task. The new FreeRTOSConfig.h compile time constant configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the array.

Each notification within the array operates independently - a task can only block on one notification within the array at a time and will not be unblocked by a notification sent to any other array index.

Task notifications were introduced as a light weight method for peripheral drivers to pass data and events to tasks without the need for an intermediary object such as a semaphore - for example, to unblock a task from an ISR when the operation of a peripheral completed. That use case only requires a single notification value. Their popularity and resultant expanded use cases have since made the single value a limitation - especially as FreeRTOS stream and message buffers themselves use the notification mechanism. This change resolves that limitation. Stream and message buffers still use the task notification at array index 0, but now application writers can avoid any conflict that might have with their own use of task notifications by using notifications at array indexes other than 0.

The pre-existing task notification API functions work in a backward compatible way by always using the task notification at array index 0. For each such function there is now an equivalent that is postfixed "Indexed" and takes an additional parameter to specify which index within the array it should operate upon. For example, xTaskNotify() is the original that only operates on array index 0. xTaskNotifyIndexed() is the new function that can operate on any array index.

Test Steps
The update is tested using the Win32 demo (PR to be created in the FreeRTOS/FreeRTOS github repo), which has been updated to build and run a new test file FreeRTOS/Demo/Common/Minimal/TaskNotifyArray.c. The tests in that file are in addition to, not a replacement for those in FreeRTOS/Demo/Common/Minimal/TaskNotify.c.

By submitting this pull request, I confirm that you can use, modify, copy, and redistribute this contribution, under the terms of your choice.
2020-05-27 12:28:48 -07:00
Daniel Glaser e4e4fb01a1
Adding volatile to tasks.c's runtime information to protect against compiler optimization (#62)
As discussed in https://forums.freertos.org/t/make-runtime-stats-working-with-compiler-optimization-enabled/9846 and on lined out on https://blog.the78mole.de/freertos-debugging-on-stm32-cpu-usage/, adding the volatile prevents the run-time stats variable being optimized away when used with compiler optimizations.
2020-05-22 10:26:41 -07:00
RichardBarry bac101c988
Fix/clear MIE bit in initial RISC-V mstatus register. (#57)
* fix: CLEAR MIE BIT IN INITIAL RISC-V MSTATUS VALUE
The MIE bit in the RISC-V MSTATUS register is used to globally enable
or disable interrupts.  It is copied into the MPIE bit and cleared
on entry to an interrupt, and then copied back from the MPIE bit on
exit from an interrupt.

When a task is created it is given an initial MSTATUS value that is
derived from the current MSTATUS value with the MPIE bit force to 1,
but the MIE bit is not forced into any state.  This change forces
the MIE bit to 0 (interrupts disabled).

Why:
If a task is created before the scheduler is started the MIE bit
will happen to be 0 (interrupts disabled), which is fine.  If a
task is created after the scheduler has been started the MIE bit
is set (interrupts enabled), causing interrupts to unintentionally
become enabled inside the interrupt in which the task is first
moved to the running state - effectively breaking a critical
section which in turn could cause a crash if enabling interrupts
causes interrupts to nest.  It is only an issue when starting a
newly created task that was created after the scheduler was started.

Related Issues:
https://forums.freertos.org/t/risc-v-port-pxportinitialisestack-issue-about-mstatus-value-onto-the-stack/9622
Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
2020-05-01 22:35:42 -07:00
alfred gedeon eac2b9a271
Fix Linux port Valgrind errors (#56)
Fix Valgrind uninitialized variables warning.
Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
2020-04-28 14:42:34 -07:00
Yuhui Zheng 6e7523041d
GCC/ATmegaxxxx port path and name change. (#51)
Moving ATmega port to third party directory, and mature it there. Once we are fully done, the port could then be moved back to portable/GCC.
2020-04-21 13:21:19 -07:00
Phillip Stevens 1abca83c89
ATmegaxxxx - generalised support (#48)
ATmegaxxxx - generalised support. Please see README.md included in the same PR for usage and limitations.
2020-04-15 18:51:57 -07:00
Gaurav-Aggarwal-AWS 07e672c448
Add definition of portDONT_DISCARD to ARMv7-M ports (#50)
Enabling Link Time Optimization (LTO) causes some of the functions used
in assembly to be incorrectly stripped off, resulting in linker error.
To avoid this, these functions are marked with portDONT_DISCARD macro,
definition of which is port specific. This commit adds the definition
of portDONT_DISCARD for ARMv7-M ports.

Signed-off-by: Gaurav Aggarwal
2020-04-14 09:03:11 -07:00
Gaurav-Aggarwal-AWS 334de5d8ab
Enable ARMv7-M MPU ports to place FreeRTOS kernel code outside of flash (#46)
Problem Description
-------------------
The current flash organization in ARMv7-M MPU ports looks as follows:

__FLASH_segment_start__ ------->+-----------+<----- __FLASH_segment_start__
                                |  Vector   |
                                |   Table   |
                                |     +     |
                                |   Kernel  |
                                |    Code   |
                                +-----------+<-----  __privileged_functions_end__
                                |           |
                                |           |
                                |           |
                                |   Other   |
                                |   Code    |
                                |           |
                                |           |
                                |           |
   __FLASH_segment_end__ ------>+-----------+

The FreeRTOS kernel sets up the following MPU regions:

* Unprivileged Code - __FLASH_segment_start__ to __FLASH_segment_end__.
* Privileged Code - __FLASH_segment_start__ to __privileged_functions_end__.

The above setup assumes that the FreeRTOS kernel code
(i.e. privileged_functions) is placed at the beginning of the flash and,
therefore, uses __FLASH_segment_start__ as the starting location of the
privileged code. This prevents a user from placing the FreeRTOS kernel
code outside of flash (say to an external RAM) and still have vector
table at the beginning of flash (which is many times a hardware
requirement).

Solution
--------
This commit addresses the above limitation by using a new variable
__privileged_functions_start__ as the starting location of the
privileged code. This enables users to place the FreeRTOS kernel code
wherever they choose.

The FreeRTOS kernel now sets up the following MPU regions:

* Unprivileged Code - __FLASH_segment_start__ to __FLASH_segment_end__.
* Privileged Code - __privileged_functions_start__ to __privileged_functions_end__.

As a result, a user can now place the kernel code to an external RAM. A
possible organization is:

                                 Flash              External RAM
                              +------------+        +-----------+<------ __privileged_functions_start__
                              |   Vector   |        |           |
                              |   Table    |        |           |
                              |            |        |           |
__FLASH_segment_start__ ----->+------------+        |   Kernel  |
                              |            |        |    Code   |
                              |            |        |           |
                              |            |        |           |
                              |            |        |           |
                              |   Other    |        |           |
                              |    Code    |        +-----------+<------ __privileged_functions_end__
                              |            |
                              |            |
                              |            |
  __FLASH_segment_end__ ----->+------------+

Note that the above configuration places the vector table in an unmapped
region. This is okay because we enable the background region, and so the
vector table will still be accessible to the privileged code and not
accessible to the unprivileged code (vector table is only needed by the
privileged code).

Backward Compatibility
----------------------
The FreeRTOS kernel code now uses a new variable, namely
__privileged_functions_start__, which needs to be exported from linker
script to indicate the starting location of the privileged code. All of
our existing demos already export this variable and therefore, they will
continue to work.

If a user has created a project which does not export this variable,
they will get a linker error for unresolved symbol
__privileged_functions_start__. They need to export a variable
__privileged_functions_start__ with the value equal to
__FLASH_segment_start__.

Issue
-----
https://sourceforge.net/p/freertos/feature-requests/56/

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-04-06 15:51:40 -07:00
Yuhui Zheng 464695a4f2
Synopsys ARC port, adding support for ARC EM and HS cores -- continued from PR #8. (#28)
Synopsys ARC port, adding support for ARC EM and HS cores.
2020-03-24 11:54:03 -07:00
Yuhui Zheng a5531aade6 pxTCB is no longer needed in this local function. 2020-03-24 11:51:17 -07:00
WineQ圈9 3b8c72c669
Update tasks.c (#22)
An optimization for prvResetNextTaskUnblockTime().
2020-03-22 19:18:48 -07:00
David Vrabel 90a3584749 portable/GCC/Posix: add new port for Posix (Linux) applications
This is similar to the Windows port, allowing FreeRTOS kernel
applications to run as regular applications on Posix (Linux) systems.

You can use this in a 32-bit or 64-bit application (although there are
dynamic memory allocation trace points that do not support 64-bit
addresses).

Many of the same caveats of running an RTOS on a non-real-time system
apply, but this is still very useful for easy debugging/testing
applications in a simulated environment. In particular, it allows easy
use of tools such as valgrind.

You can call standard library functions from tasks but care must be
taken with any that internally take mutexes or block. This includes
malloc()/free() and many stdio functions (e.g., printf()).

Replacement malloc(), free(), realloc(), and calloc() functions are
provided which are safe. printf() needs to be called with a FreeRTOS
mutex help (or called from only a single task).

Each task is run in its own pthread, which makes debugging with
standard tools (such as GDB) easier backtraces for individual tasks
are available. Threads for non-running tasks are blocked in sigwait().

The stack for each task (thread) is allocated when the thread is
created, and the stack provided during task creation is not used. This
is so the stack has guard pages, to help with detecting stack
overflows.

Task switch is done by resuming the thread for the next task by
sending it the resume signal (SIGUSR1) and then suspending the current
thread.

The timer interrupt uses SIGALRM and care is taken to ensure that the
signal handler runs only on the thread for the current task.

The additional data needed per-thread is stored at the top on the
task's stack.

When a running task is being deleted, its thread is marked it as dying
so when we switch away from it it exits instead of suspending. This
ensures that even if the idle task doesn't run, threads are deleted
which allows for more threads to be created (if many tasks are being
created and deleted in rapid succession).

To further aid debugging, SIGINT (^C) is not blocked inside critical
sections. This allows it to be used break into GDB while in a critical
section. This means that care must be taken with any custom SIGINT
handlers as these are like NMIs.

This is somewhat inspired by an existing port by William Davy
(https://www.freertos.org/FreeRTOS-simulator-for-Linux.html) but it
takes a number of different approaches to make it switch tasks
reliableand there's little similarly with the original implementation.

- Critical sections block scheduling/"interrupts" by blocking signals
  using pthread_sigmask(). This is more expensive than attempting to
  use flags but works reliably and is analogous to the interrupt
  enable/disable on real hardware.

- Care is take to ensure that the SIGALRM handler (for the timer tick)
  is runnable only on the pthread for the running task. This makes
  tasks switches more straight-forward and reliable as we can suspend
  the thread while in the signal handler.

- Task switches save/restore the critical nesting on the stack.

- Only uses a single (SIGUSR1) signal which is ignored and thus GDB's
  default signal handling options won't trap/print on this signal.

- Extra per-thread data is stored on the task's stack, making it
  accessible in O(1) instead of performing a O(n) lookup of the array.

- Uses the task create/delete hooks in a similar way to the Windows
  port, rather than overloading trace points.
2020-03-20 16:14:08 -07:00
WineQ圈9 eff07c040a
Update tasks.c (#26)
Reopen this PR.
2020-03-19 09:00:05 -07:00
Yuhui Zheng 62f615f662
Adding url to direct users to FreeRTOS-Kernel github page. (#32) 2020-03-17 19:30:19 -07:00
Yuhui Zheng 1ebcac3c9f
Create pull_request_template.md
Using the same pull request template as what we have in FreeRTOS/FreeRTOS.
2020-03-17 13:11:11 -07:00
Yuhui Zheng 3f6cd683cb
Create SECURITY.md
Bring in SECURITY.md from aws/.github.
2020-03-17 13:08:50 -07:00
Yuhui Zheng 3f62dfdb81 Update issue templates
Adding bug report, documentation, and general inquiry templates. 

There's no easy way to redirect "general inquiry" directly to forum. If better option is available later, will update.
2020-03-17 13:06:09 -07:00
Gaurav-Aggarwal-AWS 177e79fc79
Add "Tickless Idle" support for ARMv8M ports (#29)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-03-16 10:50:49 -07:00
RichardBarry 459dceb29c Fix Coverity warnings: In most cases the return value of xTaskResumeAll() is cast to void when it is not needed. This PR fixes a couple of instances in the heap_n.c implementations where that was not the case. 2020-03-16 10:20:25 -07:00
RichardBarry 5d28744feb Improve documentation for the ulTaskNotifyValueClear() and xTaskCatchUpTicks() API functions.
Move the prototype and documentation for xTaskCatchUpTicks() into the correct place in the task.h header file (in the public documentation from the private documentation).
Rename the variable that holds the return value in xTaskCatchUpTicks() to more accurately represent its meaning.
2020-03-15 20:24:18 -07:00
RichardBarry b49eec35f6 The Windows port layer is built with both MSVC and GCC. GCC generated a warning relating to the variable lWaitForYield being set but not used. This change removes the variable. 2020-03-15 20:24:18 -07:00
WineQ圈9 180d0b8ee3
Update tasks.c (#24)
An error on trace argument.
In "xTaskPriorityDisinherit", the disinherit priority should be "pxTCB->uxBasePriority".
And, in "vTaskPriorityDisinheritAfterTimeout", the disinherit priority should be "uxPriorityToUse", which might not be "pxTCB->uxBasePriority".
2020-03-14 11:58:19 -07:00
Vladimir Umek 9b02ee0af2 Cortex-A9 port: Adding stack alignment directive to assembly code 2020-03-13 12:19:31 -07:00
Sachin Parekh 8e3cf978c4 Xtensa_ESP32: Change _iram_end to _iram_text_end
xtensa_loadstore_handler.S uses _iram_end to prevent modification of IRAM
code. With the LoadStore exception handler in place, IRAM can also be
used for .bss and .data section. Hence the sanity check should be based
upon _iram_text_end and not _iram_end
2020-02-28 15:15:47 -08:00
RichardBarry e1b98f0b4b This change prevents tickless idle mode potentially sleeping for an extra tick in the corer case that a tick interrupt occurred between the scheduler being suspended and the expected idle time being checked for a second time (within the idle task) - as described by the sequence below. Th change updates eTaskConfirmSleepModeStatus() to specifically check if a tick is pending, and if so, abort entering sleep mode.
+ The idle task decides to enter sleep mode on the following line.
```
if( xExpectedIdleTime >= configEXPECTED_IDLE_TIME_BEFORE_SLEEP )
```

+ The scheduler is suspended, preventing any context switches.

[Potentially a tick interrupt could occur here.  That could happen if other tasks executing consumed a lot of time since the above code line executed.  If a tick interrupt occurs here the interrupt will be entered but the interrupt will not do anything other than increment xPendedTicks.]

+ The expected idle time is checked again.  No context switches can occur now so the code will execute until the scheduler is unsuspended.  Assuming configEXPECTED_IDLE_TIME_BEFORE_SLEEP is set to a sensible value, a tick interrupt won't occur for some time.

+ portSUPPRESS_TICKS_AND_SLEEP() is called.

+ The default implementation of the tickless function calls eTaskConfirmSleep() - which prior to this change does not return eAbortSleep even though xPendedTicks is not 0, and after this change does return eAbortSleep.
2020-02-28 12:40:11 -08:00
Yuhui.Zheng 499e55a03c
Bring license in sync with FreeRTOS/FreeRTOS. (#20) 2020-02-27 14:33:46 -08:00
ribarry 078b400aff Updates vCoRoutineSchedule() so it returns without doing anything if if the co-routine internal data structures have not been initialised. The internal data structures are initialised when the first co-routine is created.
NOTE: Co-routines are a deprecated feature.  This change was made to close off an old ticket as the source control transitions from SourceForge to Github.
2020-02-26 10:45:32 -08:00
lundinc2 326d88f429
Added CONTRIBUTING (#18)
.md
2020-02-25 16:22:57 -08:00
AniruddhaKanhere c246922ea1
Small typo on L1287 (#14)
Added a missing ')'
2020-02-19 14:05:48 -08:00
Yuhui.Zheng 88e32327e9
version bump to v10.3.1 (#16)
* Verion bump from 10.3.0 to 10.3.1.
* version bump in task.h
* change history for 10.3.1.
2020-02-18 22:03:54 -08:00
Yuhui.Zheng 87beba4a4a
Removing License/license.txt and add LICENSE under root. (#12) 2020-02-17 09:52:58 -08:00
Yuhui.Zheng 08c9c9151a
Replacing readme.txt with README.md. (#11) 2020-02-16 13:18:58 -08:00
Yuhui.Zheng 10bbbcf0b9
Correct the xTimerCreate() documentation which said NULL was returned if the timer period was passed into the function as 0, whereas that is not the case. (#10)
Add a note to the documentation for both the xTimerCreate() and xTimerCreateStatic() functions that the timer period must be greater than 0.
2020-02-14 12:16:10 -08:00
Yuhui Zheng 210b1ffcc8 Re-sync with upstream and stripping away none kernel related. 2020-02-10 13:45:57 -08:00
Richard Barry 9c0c37ab9b Added back some TCP/IP stack port layer files. 2020-02-07 21:51:48 +00:00
Richard Barry 7cf721ccf7 2020-02-07 21:49:55 +00:00
Yuhui.Zheng 589dd9f149 Update version number in readiness for V10.3.0 release. Sync SVN with reviewed release candidate. 2020-02-07 20:14:50 +00:00
Yuhui.Zheng f988394e0d Fix spelling issues. 2020-02-07 19:19:47 +00:00
Richard Barry 28efb5449c Add "is inside interrupt" function to MPU ports.
Make clock setup functions weak symbols in ARMv8-M ports.
Update Cortex-M33 ports to use an interrupt mask in place of globally disabling interrupts, as per the other Cortex-M ports.
2020-02-07 01:56:25 +00:00
Richard Barry 8e5addee1e Update TCP to last release versions in preparation for kernel V10.3.0 release. 2020-02-06 22:45:37 +00:00
Richard Barry 7bea399061 Update libraries and sundry check-ins ready for the V10.3.0 kernel release. 2020-02-06 18:52:35 +00:00
Yuhui.Zheng d319bb0c71 ESP GCC port -- Added LoadStore Exception handlers.
https://github.com/FreeRTOS/FreeRTOS-Kernel/pull/9 -- Handles LoadStoreErrorCause and LoadStoreAlignmentCause allowing to use 32-bit memory region (IRAM) as 8-bit or 16-bit memory region
2020-01-31 19:31:50 +00:00
Yuhui.Zheng 9fdfbf33e9 Sync FreeRTOS-Labs -CLI -TCP -Trace with the version in FreeRTOS-Plus.
Projects under FreeRTOS-Labs directory are in beta, developers updating projects please make sure you are using the correct version of -CLI -TCP -Trace. If you must edit -CLI -TCP and -Trace, please ensure the copies are synced.
2020-01-31 19:21:15 +00:00
Yuhui.Zheng ec6f3d77c3 Sync FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP with the version in GitHub at (23665258cabe49d5d68ba23968b6845a7c80eb34).
Notes: 
- header has version 2.2.0. 
- This sync did not bring in ./test directory, though we should. 
- New NetworkInterfaces are introduced by this merge.
- Keil compiler support. 
- FreeRTOS_IP.h new API xApplicationGetRandomNumber().
- FreeRTOS_IP_Private.h new eIPEvent_t eNetworkTxEvent. 
- FreeRTOS_Stream_Buffer.h removing static xStreamBufferIsEmpty() and xStreamBufferIsFull().
- FreeRTOSConfigDefaults.h provides default ipconfigDNS_RECEIVE_BLOCK_TIME_TICKS. 
- other type changes.
2020-01-31 00:07:53 +00:00
Yuhui.Zheng 0c1c85a9dd Removing RISC-V port under ThirdParty.
RISC-V ports for IAR and GCC can now be found under \FreeRTOS\Source\portable\GCC\RISC-V and \FreeRTOS\Source\portable\IAR\RISC-V.
2020-01-30 22:23:03 +00:00
Yuhui.Zheng 99e796eb01 Removing unnecessary ThirdParty ports -- Wiced_CY and nrf52840-dk.
For projects depending on either of these two ports, please update your projects according to below:
Wiced_CY -- Use GCC/ARM_CRx_No_GIC instead. 
nrf52840-dk -- Use GCC/ARM_CM7/r0p1 instead. Please note that, kernel port shall only take dependency on MCU core, not MCU peripherals. (Please take out RTC related from kernel port.) For low power feature (tickless) in FreeRTOS, please follow this page https://www.freertos.org/low-power-ARM-cortex-rtos.html. In case ARM_CM7/rop1 is missing any feature, reach out to us.
2020-01-30 19:45:03 +00:00
Richard Barry 4d4493e61a Remove the FreeRTOS-IoT-Libraries from FreeRTOS-Plus as it was an old copy with a newer copy in FreeRTOS-Labs. 2020-01-30 00:05:23 +00:00
Richard Barry 0d54d1c4dc Correct an err in queue.c introduced when previously updating behaviour when queue sets are used in combination with queue overwrites. 2020-01-29 19:52:38 +00:00
Yuhui.Zheng f5b5b2db04 Cleaning up LPC51U68 projects:
- user playable settings are all in FreeRTOSConfig.h.
- removed reference to IntQueue.h in main_full.c
- readme.txt wording.
2020-01-24 07:53:14 +00:00
Richard Barry 2415dc26b0 Introduce the portSOFTWARE_BARRIER macro which thus far is only used by the Win32 demo to hold execution up in case a simulated interrupt is executing simultaneously. That should never happen as all threads should execute on the same core, but we have had numerous reports that this and other Win32 port changes we have made fixed these issues - although we have not been able to replicate them ourselves. 2020-01-23 23:49:24 +00:00
Gaurav Aggarwal 18f87e8c33 Add MPU demo project for Nulceo-L152RE which is Coretx-M3. 2020-01-23 01:56:36 +00:00
Gaurav Aggarwal e058a65b16 Updates to CM3_MPU GCC port
- System calls are now only allowed from kernel code. This change can be turned on
  or off using configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY.
- MPU is disabled before reprogramming it and enabled afterwards to be compliant
  with ARM recommendations.
2020-01-23 01:50:25 +00:00
Richard Barry 42a0eaafdc Ensure both one-shot and auto-reload are written consistently with a hyphen in comments. 2020-01-16 04:25:29 +00:00
Richard Barry 9456992c1f Added uxTimerGetReloadMode() API function. 2020-01-16 04:10:18 +00:00
Gaurav Aggarwal c472c5b04f Add MPU demo project for LPC54018 board. 2020-01-12 12:33:17 +00:00
Yuhui.Zheng 0d95aca202 Introduce a port for T-HEAD CK802. A simple demo for T-HEAD CB2201 is also included. 2020-01-10 07:53:14 +00:00
Richard Barry d2914041f8 Update the GCC and IAR SiFive HiFive rev-b demos to use the new configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS constants in place of the deprecated configCLINT_BASE_ADDRESS constant.
Update the IAR RISC-V HiFive demo to use the latest IAR Embedded Workbench version.
2020-01-09 02:28:45 +00:00
Richard Barry 066e2bc7d2 Replace portasmHAS_CLINT with configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS definitions in the IAR RISC-V port - portasmHAS_CLIT will still work by deriving the new definitions from the old. 2020-01-09 02:23:51 +00:00
Richard Barry 75b81a1fab Work in progress update of LPC51U68 MCUXpresso project to rearrange the folder structure and names. 2020-01-09 00:19:36 +00:00
Richard Barry fbb23055cd Replace portasmHAS_CLINT with configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS definitions in the GCC RISC-V port - portasmHAS_CLIT will still work by deriving the new definitions from the old. 2020-01-07 01:14:36 +00:00
Richard Barry eaf9318df8 Add Source/portable/ARMClang file that directs users to the GCC port if they which to use the ARMClang compiler. 2020-01-04 00:14:18 +00:00
Richard Barry 881958514b If tickless idle mode is in use then ensure prvResetNextTaskUnblockTime() is called after a task is unblocked due to a bit being set in an event group. This allows the MCU to re-enter sleep mode at the earliest possible time (rather than waiting until the timeout that would occur had the task not being unblocked be the event group) and matches a similar change made for queues and derivative objects (semaphores, etc.) some time ago. 2020-01-03 22:50:31 +00:00
Richard Barry 853856e8cc Correct #error text in multiple fat file system files. 2020-01-03 20:53:27 +00:00
Richard Barry 9e86cb95a7 Add xPortIsInsideInterrupt() to the IAR ARMv7-M ports. 2020-01-03 01:17:29 +00:00
Richard Barry be3561ed53 Added xTaskAbortDelayFromISR() and ulTaskNotifyValueClear() API functions.
Added tests for xTaskAbortDelayFromISR() into Demo/Common/Minimal/AbortDelay.c.
Added tests for ulTaskNotifyValueClear() into Demo/Common/Minimal/TaskNotify.c.
2020-01-02 18:55:20 +00:00
Richard Barry 0a29d350b1 Renamed RISC-V_RV32_SiFive_HiFive1_IAR directory to RISC-V_RV32_SiFive_HiFive1-RevB_IAR as it targets the RevB hardware. 2020-01-01 22:38:23 +00:00
Richard Barry 62b413627a Minor updates to comment block for xTaskCheckForTimeOut(). 2020-01-01 22:24:44 +00:00
Richard Barry dfc1bf8ec3 Rename RISC-V_RV32_SiFive_HiFive1-FreedomStudio directory to RISC-V_RV32_SiFive_HiFive1-RevB-FreedomStudio as it targets Rev B of the hardware. 2020-01-01 22:05:35 +00:00
Richard Barry 4b943b35e0 Update RISCC-V-RV32-SiFive_HiFive1_FreedomStudio project to latest tools and metal library versions. 2020-01-01 22:02:06 +00:00
Gaurav Aggarwal cfa83672ef Rename STM32Cube to GCC for STM32L4 Discovery projects as GCC is
the compiler used.
2020-01-01 00:35:42 +00:00
Gaurav Aggarwal 474182ab39 Make vSetupTimerInterrupt weak in the RVDS M4 MPU port to give the
application writer a chance to override this function. This gives
the application write ability to use a different timer.
2020-01-01 00:04:10 +00:00
Gaurav Aggarwal 22dd9a55ab Update documentation of xTaskCheckForTimeOut function to reflect the
intended use of this API.
2019-12-31 20:49:07 +00:00
Yuhui.Zheng 8f0eaf274c - Updates to projects due to demo folder name change. (IAR source file paths and assembler path were fixed. Keil source file paths were fixed.)
- Added back power static library for GCC and IAR. (Power management related interface definitions are in drivers/fsl_power.h. power.c is empty due to "implementation is in header file and power library")
- Note for GCC link: the command used for linking is `arm-none-eabi-gcc -nostdlib -L<additional lib search path> -Xlinker ... -o "CORTEX_M0+_LPC51U68_LPCXpresso.axf" <all *.o> -lpower`. Per GCC doc, static library name in file system is libpower.a.
2019-12-31 08:06:33 +00:00
Richard Barry 3203c5cc85 Previously the STM32F0518 compiler setting was changed to enable the use of the __weak attribute - however changing the port layer to use #pragma weak in place of __weak means the compiler setting change is not required and removes the risk of introducing incompatibilities - so this check in reverts the compiler settings change. 2019-12-30 22:24:58 +00:00
Richard Barry cc673eb6a5 Ensure the CORTEX_M0_STM32F0518_IAR demo builds after updates to the Cortex-M0 port layer - required an update to the project settings to allow IAR extensions as the port layer now uses the _weak qualifier. 2019-12-30 22:07:33 +00:00
Richard Barry 801e63bd10 Ensure the LPC1114 demo still builds after updates to the Cortex-M0 port layer - includes minor update to remove compiler warning that resulted from a newer compiler version. 2019-12-30 22:00:26 +00:00
Richard Barry 53c98357b0 Ensure the LPC1114 demo still builds after updates to the Cortex-M0 port layer - includes minor update to remove compiler warning that resulted from a newer compiler version. 2019-12-30 21:59:11 +00:00
Richard Barry 49052a6581 Ensure the XMC1000_IAR_KEIL_GCC projects still build after updates to the Cortex-M0 port layer - minor change to remove warning related to using a newer version of the IAR tools. 2019-12-30 21:44:22 +00:00
Richard Barry e292c67933 Replace the static prvSetupTimerInterrupt() function in the Cortex-M port layers that still used it (other than MPU ports so far) with a weakly defined function call vPortSetupTimerInterrupt() - which allows application writers to override the function with one that uses a different clock. 2019-12-30 21:16:09 +00:00
Richard Barry e23d638afd Correct use of xStreamBufferRead() to xStreamBufferReceive() in code comments - no source code changes. 2019-12-30 20:00:49 +00:00
Richard Barry c72df2f98d Tidy up comments only. 2019-12-27 21:22:07 +00:00
Richard Barry 7ddea8fc8b Enable the Win32 comprehensive test/demo build and run when configUSE_QUEUE_SETS is set to 0. 2019-12-27 21:02:23 +00:00
Richard Barry 70dbc12579 Update the LM3Sxxxx_IAR_Keil demo so the IAR project writes to the UART and executes in QEMU. 2019-12-27 20:59:57 +00:00
Gaurav Aggarwal cef6548e8b Updates to CM4_MPU RCDS port
- System calls are now only allowed from kernel code. This change can be turned on
  or off using configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY.
- MPU is disabled before reprogramming it and enabled afterwards to be compliant
  with ARM recommendations.
2019-12-24 22:45:32 +00:00
Gaurav Aggarwal 18c3e5e02a Remove local paths from the URL files 2019-12-24 19:16:19 +00:00
Richard Barry 05adf564f6 Add readme into the third party RISC-V port that points to the directories that contains the official ports. 2019-12-24 17:24:23 +00:00
Gaurav Aggarwal ce7e8b87d8 Add IAR MPU project for STM32L475 Discovery Kit IoT Node 2019-12-21 00:04:04 +00:00
Gaurav Aggarwal 96b6746364 Updates to CM4_MPU IAR port
- System calls are now only allowed from kernel code. This change can be turned on
  or off using configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY.
- MPU is disabled before reprogramming it and enabled afterwards to be compliant
  with ARM recommendations.
2019-12-21 00:02:31 +00:00
Richard Barry b27fb82bc1 Increase test coverage for queue sets.
Rename the CORTEX_M0+_LPC51U68_LPCXpresso demo to CORTEX_M0+_LPC51U68_GCC_IAR_KEIL as it supports all three compilers.
2019-12-20 02:54:30 +00:00
Richard Barry b55bbe55ac Remove build files accidentally checked in.
Remove the CMSIS math library as it is large and not used.
2019-12-20 02:49:15 +00:00
Gaurav Aggarwal 47c666bb1e Add MPU projects for STM32L475 Discovery Kit IoT Node 2019-12-20 02:07:09 +00:00
Gaurav Aggarwal 47d8ac6ac6 Updates to CM4_MPU GCC port
- System calls are now only allowed from kernel code. This change can be turned on
  or off using configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY.
- MPU is disabled before reprogramming it and enabled afterwards to be compliant
  with ARM recommendations.
2019-12-20 02:05:44 +00:00
Yuhui.Zheng c07f60c383 Adding GCC/Keil/IAR projects for NXP LPC51U68 (CM0+).
Please see readme.txt for todo items.
2019-12-18 10:06:30 +00:00
Yuhui.Zheng 9c0e3fe9f1 Cortex M0 GCC/IAR/Keil ports -- tickless support.
The default portMISSED_COUNTS_FACTOR is set to 45 cycles. User could override this value, if a more accurate count is available.
2019-12-18 09:55:08 +00:00
Yuhui.Zheng 3cde02a046 RVDS/Keil weak linkage for vPortSetupTimerInterrupt() -- CM4F, CM3
Test steps are documented in this PR https://github.com/aws/amazon-freertos/pull/1141.
2019-12-18 02:08:06 +00:00
Gaurav Aggarwal d58e6a7b09 Use linker script variables for MPU setup for Nuvoton M2351 Keil Project
Earlier we were using hard-coded addresses for MPU setup which
were ensured to be the same as linker script setup. This change
updates the Keil uVision project for Nuvoton Numaker-PFM-M2351
to use the variables exported from the linker script. This ensures
that the MPU setup never goes out of sync with linker script.
2019-12-17 01:45:53 +00:00
Gaurav Aggarwal d449c8979d Use the linker script variables for MPU setup for Keil Simulator Demo
Earlier we were using hard-coded addresses for MPU setup which
were ensured to be the same as linker script setup. This change
updates the Keil Simulator demo to use the variables exported
from the linker script. This ensures that the MPU setup does not
go out of sync with linker script.
2019-12-17 00:14:26 +00:00
Gaurav Aggarwal 66ce9f7d72 Move warning suppression for IAR compiler to portmacro.h for v8M ports
IAR produces some warnings which can not be fixed in the source code because
then other compilers start generating warnings. We suppressed those warnings
in the project file before. This change moves the warning suppression from
project files to portmacro.h.
2019-12-07 01:23:17 +00:00
Yuhui.Zheng 1deeb6dd84 Check socket binding result before doing anything with socket. (This is to address ARG findings.) Breaking the single return rule here, due to precedent violation at line 1039 and 1144.
prvTransferConnect() now returns:
- pdTRUE: everything's good. pdTRUE = 1.
- -pdFREERTOS_ERRNO_ENOMEM: FreeRTOS_socket() failed. -pdFREERTOS_ERRNO_ENOMEM = -12.
- -pdFREERTOS_ERRNO_EINVAL || -pdFREERTOS_ERRNO_ECANCELED: FreeRTOS_bind() failed. Negative values.

Thus, at line 569 and line 617, needs to check != pdTRUE instead of == pdFALSE.

This commit is done on behalf of Alfred.
2019-12-04 07:52:49 +00:00
Richard Barry 9491af1fd7 Fix bug when xQueueOverwrite() and xQueueOverwrite() from ISR are used to overwrite items in two queues that are part of the same set.
Minor queue optimisations.
2019-12-03 01:50:07 +00:00
Richard Barry e5708b38e9 Add the Labs projects provided in the V10.2.1_191129 zip file. 2019-12-02 23:39:25 +00:00
Richard Barry 46e5937529 Remove guards against __ARMCC_VERSION version numbers that were previously used to avoid compiler warnings in some GCC ARM Cortex ports. 2019-11-21 22:35:21 +00:00
Richard Barry d1fb8907ab Add software timer to the Win32 blinky demo. 2019-11-18 17:35:40 +00:00
Richard Barry 07622ed3ee Remove driver files that generate compiler warnings from the RISC-V_Renode_Emulator_SoftConsole project.
Update RISC-V ports so the interrupt stack is set to a known value before the scheduler is started if the interrupt stack is statically defined rather than re-using the main.c() stack.
2019-11-18 17:23:14 +00:00
Richard Barry 16639d2d63 Update to the latest atomic.h.
Improve commenting in RISC-V GCC port.
Fix IAR RISC-V port so the first task starts with interrupts enabled.
Add references to third party page ref using newlib with FreeRTOS into the tasks.c file in each place newlib is referenced.
Move the position of the traceTASK_DELETE() trace macro in case of use with a memory allocator that writes over freed memory even when inside a critical section.
Efficiency improvement:  Make sure xTaskIncrementTick() does not return pdTRUE when the scheduler is locked.  This just prevents an unnecessary yield interrupt (unnecessary as it is ignored) when xYieldPending happens to be pdTRUE.
2019-11-18 16:28:03 +00:00
Richard Barry 18916d5820 Rename the RISC-V_RV32_SiFive_Hifive1_GCC folder to RISC-V_RV32_SiFive_HiFive1_FreedomStudio as it is built with Freedom Studio. 2019-10-22 22:30:06 +00:00
Richard Barry 5306ba245d Add nano-specs linker option to HiFive1_GCC demo. 2019-10-22 22:27:55 +00:00
Richard Barry c0741e36ed Fix spelling mistakes copied and pasted into a couple of RISC-V demo main.c files. 2019-10-22 16:31:57 +00:00
Richard Barry fccc445865 Change version and license text in RISC-V_RV32_SiFive_HiFive1_GCC FreeRTOSConfig.h file. 2019-10-22 02:17:15 +00:00
Richard Barry 11c391dfb3 Tidy up main_full.c and change alignment of variable accesses in RegTest.S for the RISC-V_Renode_Emulator_SoftConsole demo. 2019-10-22 02:15:28 +00:00
Richard Barry 343fbe795f Rework RISC-V QEMU example to use vanilla Eclipse in place of Freedom Studio. NOTE: RISC-V QEMU mtime interrupts are not generated consistently. 2019-10-22 02:03:15 +00:00
Richard Barry ef31243396 Add some asserts into the common demo tasks to catch scenarios where the tasks are not being used but the part of the demo/test that gets called from the tick hook is called resultant in an access to objects that were not created. 2019-10-21 17:17:34 +00:00
Richard Barry 61a003088d Update RISK-V GCC port to ensure the first task starts with interrupts enabled - previously its interrupts were only enabled after it yielded for the first time. 2019-10-21 04:16:32 +00:00
Richard Barry a83244a37e Add the miv-basic.resc reNode script into the RISC-V_Renode_Emulator_SoftConsole demo as it is no longer shipped with the Microsemi tools. 2019-10-17 20:39:40 +00:00
Richard Barry c7c60cff15 Rename RISC-V-Qemu-sive_e_Freedom_Studio directory to RISC-V-Qemu-sifive_e-Eclipse-GCC as it is now using Vanilla Eclipse and vanilla GCC in place of Freedom Studio. 2019-10-16 04:31:57 +00:00
Richard Barry f78ccd077a Recreate the RISC-V-Qemu demo using Vanilla Eclipse in place of Freedom Studio as there is not a new Freedom Studio project that targets the HiFive1 board, and the updated Freedom Studio version didn't work with this project any more anyway. 2019-10-16 04:28:28 +00:00
Richard Barry d435a7b62d Move the call to traceTASK_DELETE() to before port portPRE_TASK_DELETE_HOOK() as in the Windows port portPRE_TASK_DELETE_HOOK() never returns. 2019-10-15 22:14:40 +00:00
Richard Barry 4922cff4ce Add IAR demo for the SiFive RISC-V HiFive Rev B board. 2019-10-14 03:20:18 +00:00
Richard Barry f6edf4adf9 Update the RegTest.S file used by several GCC RISC-V demos to ensure correct alignment of constant loads from assembly code. 2019-10-14 00:16:25 +00:00
Richard Barry 96e61a10a5 Tidy up the RISC-V_RV32_SiFive_HiFive1_GCC demo ready for its eventual release. 2019-10-14 00:04:53 +00:00
Richard Barry d4216903d9 Added the "full" demo to the RISC-V_RV32_SiFive_HiFive1_GCC demo - backup check in only as still a work in progress. 2019-10-13 22:53:00 +00:00
Richard Barry 71d9450836 RIS-V_RV32_SiFive_HiFive1_GCC project now running the blinky demo - still a work in progress. 2019-10-11 02:59:13 +00:00
Richard Barry dbac79045c Formatting changes only. 2019-10-10 17:56:10 +00:00
Richard Barry dbbebbfcbc RISC-V-RV32_SiFive_HiFive1_GCC project is now also building the FreeRTOS kernel code - but not using it yet - still a work in progress. 2019-10-10 17:54:56 +00:00
Richard Barry 9bb072a2ab Base project to replace existing Freedom Studio project using latest Freedom Studio project format - builds and executes but does not yet include RTOS code. 2019-10-09 04:50:11 +00:00
Richard Barry fd118f1888 Minor formatting change in comment only. 2019-10-07 18:56:33 +00:00
Yuhui.Zheng eb5c60c60b Update FreeRTOS.h with the version in GitHub. This is also to test submodule. 2019-09-24 22:29:35 +00:00
Yuhui.Zheng 0fe36e497d Nordic port. Notes for Richard -- the work items we discussed about for nrf52840-dk and Wiced_CY still remain. The only reason for this commit is we want to test out submodule. 2019-09-24 22:26:36 +00:00
Yuhui.Zheng 35bc9d7938 Revert 2728. Not because the files are still needed, but because we want to test out submodule.
Before further updating project files in GitHub, keeping an additional copy.
2019-09-24 22:19:54 +00:00
Yuhui.Zheng f001126ea8 Wiced_CY port is not needed anymore. Use GCC/ARM_CRx_No_GIC instead. 2019-09-24 20:56:55 +00:00
Yuhui.Zheng 9052882500 Adding tickless hooks to GCC/ARM_CRx_No_GIC port. 2019-09-24 20:07:40 +00:00
Richard Barry 80c1cb5de1 Correct code comments that referred to taskYIELD_FROM_ISR to portYIELD_FROM_ISR.
Update RV32 port to use 16 byte-alignment all the time (only strictly necessary when using FLOP instructions).
2019-09-24 16:06:21 +00:00
Yuhui.Zheng c217b68d38 sync from github to svn: this version of atomic.h does not have compiler specific symbols. compiler specific optimization is to be merged in each port/<compiler>/<arch> directory. 2019-09-23 16:51:03 +00:00
Yuhui.Zheng 6f958bbf80 sync from github to svn: Xtensa GCC as-is. 2019-09-20 22:09:21 +00:00
Yuhui.Zheng 1c5fcc7f05 sync from github to svn: Wiced_CY for AFR Cypress ports. 2019-09-20 20:52:30 +00:00
Yuhui.Zheng 74df636c78 sync from github to svn: documentation for RISC-V. This may be a temporary parking location. 2019-09-20 20:47:29 +00:00
Yuhui.Zheng cc0aee651e sync from github to svn: Renasas/RX100 #pragma _VECT() 2019-09-20 20:41:32 +00:00
Richard Barry da3d370ff7 RISC-V port updates: The machine timer compare register can now be for any HART, and correct the sequence used to update the 64-bit machine timer compare register on 32-bit cores. 2019-09-04 15:46:45 +00:00
Richard Barry 96bad0f6c3 Minor bug fix in NTPDemo.c -> use of FREERTOS_INVALID_SOCKET in place of NULL.
Update trace recorder code to account for uxPendedTicks renaming to xPendedTicks.
2019-09-04 00:13:17 +00:00
Richard Barry ab41d89285 Add IAR RISC-V port to SVN - a work in progress. 2019-09-03 01:39:29 +00:00
Yuhui Zheng 2b546b1984 Atollic project update for CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC, GCC port. 2019-08-30 00:18:41 +00:00
Richard Barry 973a4f9869 Correct alignment of stack top in RISC-V port when configISR_STACK_SIZE_WORDS is defined to a non zero value. 2019-08-27 15:57:45 +00:00
Richard Barry 7d285f3dcb + Moved the History.txt file from the website git repo into the source code SVN repo.
+ Added xTaskCatchUpTicks() which corrects the tick count value after the application code has held interrupts disabled for an extended period.
+ Updated the xTaskResumeAll() implementation so it uses the new xTaskCatchUpTicks() function mentioned above to unwind ticks that were pended while the scheduler was suspended.
+ Various maintenance on the message buffer, stream buffer and abort delay demos.
+ Change type of uxPendedTicks from UBaseType_t to TickType_t to ensure it has same type as variables it is compared to, and therefore also rename the variable xPendingTicks.
+ Correct spelling mistake within a comment that was common to all the ARMv7-M ports.
2019-08-25 19:35:59 +00:00
Richard Barry 72af51cd86 Starting point for IAR RISC-V project created some time ago - checking in now so it can be completed - currently work in progress. 2019-08-04 15:24:15 +00:00
Richard Barry 5352cb4f45 Tidy up Win32 port layer - include addition of new variable that prevents recursive attempts to obtain a mutex when the trace recorder is used inside an interrupt. 2019-08-04 01:14:43 +00:00
Gaurav Aggarwal b1e35551c4 Update the FreeRTOS version number in task.h 2019-07-29 23:48:11 +00:00
Gaurav Aggarwal 6bad7d2055 Add the default definition of configPRECONDITION to FreeRTOS.h.
This is needed for CBMC proofs.
2019-07-27 23:03:23 +00:00
Richard Barry b4c06085e1 Files as per 190725_FreeRTOS_IoT_Libs_Task_Pool_and_MQTT_Preview interim release. 2019-07-25 20:20:24 +00:00
Richard Barry b24ab46d39 Delete obsolete makefiles that were causing confusion from RISC-V-Qemu-sifive_e-FreedomStudio demo. 2019-07-25 20:11:37 +00:00
Richard Barry 10b7b52995 Remove unnecessary include path from the MQTT demo. 2019-07-24 02:01:43 +00:00
Gaurav Aggarwal 38b6553abd Cosmetic changes in the MQTT demo - mostly comment updates. 2019-07-24 01:29:01 +00:00
Richard Barry fe4511b35e Continued to work on the MQTT demo project.
A few review comments added into the MQTT implementation.
2019-07-24 00:27:14 +00:00
Richard Barry 53842d4cac Remove the simple UDP client/server tasks from the MQTT demo as the demo's network connection can be tested more easily just by pinging it.
Tidy up the iot_config.h header files a little.
2019-07-23 19:23:12 +00:00
Gaurav Aggarwal 95f60318d5 Cosmetic changes in the MQTT demo
- Fix warnings in the MQTT code.
- Update comments in the iot_config.h.
2019-07-23 18:20:06 +00:00
Richard Barry 17b18c8b7e Reduce warning level in Visual Studio project as it generates lots of warnings in the library files. 2019-07-23 17:30:18 +00:00
Richard Barry d1dd8da12e Revert a couple of changes in Win32 demo that should not have been checked in. 2019-07-23 17:02:59 +00:00
Gaurav Aggarwal 05e7d9cc08 Remove dependency on secure sockets
Network interface implementation for FreeRTOS now directly calls into
FreeRTOS+TCP instead of going via secure sockets.
2019-07-23 06:55:54 +00:00
Gaurav Aggarwal 68fd276886 Remove IotMqtt_Assert( pTaskPool == IOT_SYSTEM_TASKPOOL ) from MQTT code
The cut down version of the task pool has only one task pool, namely,
system task pool. All the task pool API functions accept NULL as a
valid parameter for IotTaskPool_t and use the system task pool when
NULL is passed for the system task pool.

IOT_SYSTEM_TASKPOOL is defined to NULL to use system task pool and
therefore the above assert is no longer valid.
2019-07-23 04:49:24 +00:00
Gaurav Aggarwal 8ea501ef11 Update projects to use the new directory name
IotTaskPool_GetSystemTaskPool has been removed from the cut down version
of the task pool. define IOT_SYSTEM_TASKPOOL to NULL so that the MQTT library
builds successfully.

Use the new #defines in the iot_config.h.
2019-07-23 04:16:32 +00:00
Gaurav Aggarwal 9dd72d4b44 Rename \FreeRTOS-Plus\Source\FreeRTOS-Plus-IoT-SDK to \FreeRTOS-Plus\Source\FreeRTOS-IoT-Libraries. 2019-07-23 03:41:27 +00:00
Richard Barry 7af8756c97 Update task pool so tasks and timer are allocated statically. 2019-07-23 01:46:59 +00:00
Richard Barry 1840d38abf Another backup check-in during process of optimising task pool for FreeRTOS. This checkin is prior to making the task pool statically allocated. 2019-07-23 00:00:37 +00:00
Richard Barry 63c87504a0 Backup checking on - part way through optimising task pool. 2019-07-22 21:46:13 +00:00
Gaurav Aggarwal 4c775574eb Fix DNS resolution failure for test.mosquitto.org
The DNS cache entry size was not big enough to fit the DNS name and
as a result the DNS reply parsing code returned error. Increased the
size of the entry to ensure that the DNS name can fit in.
2019-07-22 18:27:45 +00:00
Gaurav Aggarwal 06f9278de3 The MQTT example now works with the local MQTT broker.
It still needs to be tested with the public mosquitto broker.
2019-07-21 23:26:54 +00:00
Gaurav Aggarwal a7ef9c3b61 Add first draft of mqtt example
Note that it is still work in progress and not working as of now.
2019-07-21 22:14:13 +00:00
Richard Barry 238a23e4d5 Add the files from the MQTT project that were not check in. 2019-07-19 01:39:42 +00:00
Richard Barry 5dd6cf1295 Add missing files so base MQTT project builds. 2019-07-19 00:37:33 +00:00
Gaurav Aggarwal d708efe997 Update the task pool demo to show re-use of recyclable jobs
The example now creates a recyclable job, schedules it and returns it
back to the task pool when it is done. It then again creates a
recyclable job and ensures that the task pool the same job present
it its cache.
2019-07-19 00:02:45 +00:00
Richard Barry 2b295f9015 Added simple UDP demo into the mqtt project to enable the network connectivity to be tested in a simple way prior to performing any MQTT operations. 2019-07-17 20:50:15 +00:00
Richard Barry d362efca8d Add MQTT project that builds on the task pool project - currently the library is building but not being used. 2019-07-17 19:44:13 +00:00
Richard Barry 3c3b32b8e4 Rename the FreeRTOS_Plus_IoT_SDK directory to FreeRTOS_IoT_Libraries. 2019-07-16 18:21:42 +00:00
Richard Barry 290c8cedfd Function rename in task pool demo. 2019-07-16 18:19:44 +00:00
Richard Barry bb0e1f356d Remove any TCP/IP functionality from the task pool demo - the TCP/IP stack is still built as it will be used in later revisions. 2019-07-14 23:33:05 +00:00
Richard Barry 2e18203bb7 Update TCP/IP tack to latest form Git. 2019-07-14 22:07:41 +00:00
Richard Barry a6a0403fd6 Synch IoT libraries with latest versions. 2019-07-14 19:29:16 +00:00
Richard Barry e4e86a464e New MSVC task pool demo now building both the task pool and TCP libraries. 2019-07-14 19:13:51 +00:00
Richard Barry 3afd918ecd Rename the task pool version of FreeRTOS_Plus_TCP_Minimal.sln to task_pool_demo.sln. 2019-07-14 18:04:40 +00:00
Richard Barry 232a94c3f0 Restart the task pool demo, this time using the minimal FreeRTOS+TCP project as a base. 2019-07-14 18:01:57 +00:00
Richard Barry d8a3ad3c6f Minor modification to the WIn32 simple TCP/IP stack example only. 2019-07-14 16:06:31 +00:00
Richard Barry 8bd1813446 Only partially implemented and may get reverted - updates to the Win32 port that uses a per-task event to prevent the task proceeding past its yield point if the SuspendThread() call used to stop the task does not take effect immediately. This is intended to fix issues reported by users, although we have been unable to replicate them ourselves. 2019-07-12 01:52:22 +00:00
Richard Barry e60f71855a Remove IotTaskPool_CreateRecyclableSystemJob() and IotTaskPool_ScheduleSystemJob() again, which were intended to be alternative APIs that only access the system task pool, and instead update IotTaskPool_CreateRecyclableJob() and IotTaskPool_ScheduleJob() to allow the parameter used to pass in the task pool handle to be NULL if the system task pool is the only one available.
Update the task pool demo app to include a lot more functionality.
2019-07-08 15:48:21 +00:00
Richard Barry 4d6570b009 Exercise the new vPortGetHeapStats() function from the Win32 demo projects. 2019-07-05 20:21:59 +00:00
Richard Barry fa404422b9 Add link to dual core blog post into STM32H745I demo.
Doxygen corrections in list.h.
Use #error to check FreeRTOS.h is included before message_buffer.h and stream_buffer.h.
2019-07-04 21:18:36 +00:00
Richard Barry 246bb6e806 Add vPortGetHeapStats() function to query heap statistics. 2019-07-04 19:34:48 +00:00
Gaurav Aggarwal 7235743749 Only check once before re-setting ready priority
The macro taskRESET_READY_PRIORITY checks if the task being removed from the
ready list is the last one and only then resets the top ready priority
by calling portRESET_READY_PRIORITY. If we already know that it is the
last ready task being removed then there is no need to perform the check
again and the macro portRESET_READY_PRIORITY can be called directly. We were
doing the unnecessary check at two places and this commit fixes them.

This commit also increases the time period of check task to ensure that all
the demo tasks get a chance to run before the check is performed.
2019-07-03 00:08:16 +00:00
Gaurav Aggarwal 004e2b637e Use ARMCM33_DSP_FP_TZ_config.txt which comes with the MDS installation
We had a copy of ARMCM33_DSP_FP_TZ_config.txt file within the project directory
and it used to get outdated with each release of MDK because of non-backward
compatible changes in MDK. This change removes the copy in the project and
instead uses the one shipped with the MDK installation.
2019-07-02 18:47:36 +00:00
Richard Barry e75b609c74 In small FreeRTOS applications it is unlikely there will be any task pools other than the system task pool. IotTaskPool_CreateRecyclableSystemJob() is therefore introduced to complement IotTaskPool_CreateRecyclableJob() that does not require the handle of the target task pool to be specified as a parameter. Likewise IotTaskPool_ScheduleSystemJob() is introduced to complement IotTaskPool_ScheduleJob() for the same reason.
IotTaskPool_CreateSystemTaskPool() calls synchronisation primitives, so cannot be called before the scheduler starts.  Add a configASSERT() to ensure the scheduler is running when it executes.
IotTaskPool_CreateSystemTaskPool() can conceivably be called from multiple different libraries that depend on the thread pool.  In this version _IotSystemTaskPool.running can be used to check the system task pool has not already been created.  If the task pool has been created simply return from IotTaskPool_CreateSystemTaskPool() instead of re-creating it (which would leak memory and leave orphaned tasks).
Call taskENTER_CRITICAL() and taskEXIT_CRITICAL() directly in place of mapping them to TASKPOOL_ENTER_CRITICAL() and TASKPOOL_EXIT_CRITICAL() in the same file.
Rename _timerThread() _timerCallback(), as it is a callback function and not a thread.
Remove the unused flags parameter from _scheduleInternal().
2019-07-01 17:05:20 +00:00
Richard Barry 76cc2a00c6 Add the first and most basic task pool example. 2019-06-28 23:20:52 +00:00
Richard Barry 87eb37342f Create a project that builds a subset of the dependencies of the IoT SDK that have been brought into SVN thus far. The application does nothing other than build at this time. 2019-06-19 18:42:58 +00:00
Richard Barry 0b0a02b76a Bring in a minimum subset of the IoT SDK - at this time just a subset of the library dependencies rather than the libraries themselves. 2019-06-19 18:41:21 +00:00
Richard Barry fb3eaeac40 Added additional xMessageBufferSpacesAvailable() (plural) to existing xMessageBufferSpaceAvailable() (singular) macro as the documentation muddled both.
Added #define portPOINTER_SIZE_TYPE 	uint64_t to the 64-bit RISC-V port layer.
2019-05-13 03:14:05 +00:00
Richard Barry b51529a284 Update version number ready for next release. 2019-05-11 01:47:37 +00:00
Gaurav Aggarwal 9e10b08a3a Delete the Release configuration from the NXP project.
Also, some cosmetic changes.
2019-05-11 00:53:34 +00:00
Richard Barry db5d265c07 Removing obsolete code and files only. 2019-05-10 22:19:18 +00:00
Richard Barry 53cb12e389 Add M7/M4 AMP demo. 2019-05-10 18:25:10 +00:00
Gaurav Aggarwal 0b1a025789 Add NXP libs needed to build the project 2019-05-09 22:27:44 +00:00
Gaurav Aggarwal aa9c8d2697 Delete the not needed file missed in last commit 2019-05-09 22:09:12 +00:00
Gaurav Aggarwal b9e379951a Do not strip required symbols when LTO is on
Link time optimization was stripping off some symbols which were
accessed from assembly code.
2019-05-09 22:04:29 +00:00
Gaurav Aggarwal b6e5f96f0e Ensure that fault handlers are declared naked. 2019-05-05 02:26:42 +00:00
Gaurav Aggarwal 2279a86566 Add ARMv8M demo project for NXP LPC55S69. 2019-05-05 02:15:55 +00:00
Gaurav Aggarwal ae448fc952 Add Cortex M23 GCC and IAR ports. Add demo projects for Nuvoton NuMaker-PFM-2351. 2019-05-02 21:08:28 +00:00
Richard Barry 079d081346 Basic 64-bit RISC-V port now functional. RISC-V port layer automatically switches between 32-bit and 64-bit. 2019-04-29 00:57:14 +00:00
Richard Barry 27ca5c8341 Added portMEMORY_BARRIER() implemented as __asm volatile( "" ::: "memory" ) into ARM Cortex-M33 ports to assist with link time optimisation. 2019-04-25 19:49:50 +00:00
Richard Barry 84377442fc Added portMEMORY_BARRIER() implemented as __asm volatile( "" ::: "memory" ) into ARM GCC ports to assist with link time optimisation. 2019-04-21 20:15:34 +00:00
Richard Barry 606845492b Fix potential memory leak in the Win32 FreeRTOS+TCP network interface initialisation sequence.
Introduce portMEMORY_BARRIER() macro to assist with memory access ordering when suspending the scheduler if link time optimization is used.
2019-04-17 17:16:04 +00:00
Gaurav Aggarwal dd9a9710c6 Export port architecture name for COrtex-M33. This can be used by debuggers to find the port in-use to be able to correctly decode the context stored on the stack. 2019-03-28 00:00:46 +00:00
Gaurav Aggarwal ba39a958b5 Fix spelling of priority in comments. 2019-03-18 23:28:03 +00:00
Gaurav Aggarwal 12fb75be37 Fix warning portHAS_STACK_OVERFLOW_CHECKING not defined
portHAS_STACK_OVERFLOW_CHECKING was getting defined too late before
being used in portable.h for the platforms that do not have stack
overflow checking registers. This commit ensures that it is defined
before it is used.
2019-03-13 21:10:44 +00:00
Richard Barry 2265d70499 Correcting spelling mistakes in comments only. 2019-03-08 17:30:49 +00:00
Richard Barry 06596c3192 Prepare the RISC-V port layer for addition of 64-bit port. 2019-03-08 17:03:43 +00:00
Richard Barry 50e67a89f1 Update version number in +TCP code. 2019-02-21 18:08:36 +00:00
Gaurav Aggarwal 5fe8465a35 Change type of usStackDepth to configSTACK_DEPTH_TYPE. 2019-02-21 03:25:30 +00:00
Gaurav Aggarwal 5623c69748 Fix Build and Links failure in MPU projects. Minor cosmetic changes in some V8M files. 2019-02-20 20:27:07 +00:00
Richard Barry 8b6ab5f197 Add instructions on building the Cortex-M33 secure and non secure projects into the comments of that project and into a readme.txt file.
Enable configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES setting to be used in statically allocated systems.
2019-02-20 17:55:59 +00:00
Gaurav Aggarwal ceeff14524 Set default value of configRUN_FREERTOS_SECURE_ONLY to 0. 2019-02-20 00:40:46 +00:00
Gaurav Aggarwal 5849459c65 Add support for running FreeRTOS on Secure Side only in Cortex M33 port. Also, change spaces to tabs. 2019-02-20 00:25:45 +00:00
Richard Barry c3c9c12ce2 Update the common demo death.c to use the updated macro name to give it a secure context. 2019-02-19 02:57:44 +00:00
Gaurav Aggarwal ce576f3683 First Official Release of ARMV8M Support. This release removes Pre-Release from all the ARMv8M files licensees. 2019-02-19 02:30:32 +00:00
Richard Barry 58ba10eee8 Update version number in readiness for V10.2.0 release. 2019-02-17 22:36:16 +00:00
Gaurav Aggarwal 55ad3861c5 Sync the Renesas port to AFR Git Repo 2019-02-17 01:27:16 +00:00
Gaurav Aggarwal 0de2a2758a Fix definition of tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE
tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE was not correctly defined resulting in
dynamically allocated TCB not being freed when MPU was enabled. This commit fixes
the definition to ensure that dynamically allocated RAM (Stack and TCB) is freed
always.
2019-02-17 01:24:58 +00:00
Gaurav Aggarwal 2c88fb7fa1 Fix build failure when dynamic allocation is not enabled.
When dynamic allocation is not enabled, vPortFree is not available. The current code used
vPortFree and this resulted in linker error. This commit removes the use of vPortFree when
dynamic allocation is not enabled.
2019-02-16 20:21:47 +00:00
Richard Barry 6844bef74f Replace the pdf RISC-V documentation with links to the documentation web pages. 2019-02-16 01:15:33 +00:00
Richard Barry b2b1b09ea5 Fix bug in core_cm3.c atomic macros.
Rename the portable/GCC/RISC-V-RV32 directory to just RISC-V as also adding support for 64-bit cores.
2019-02-16 01:08:38 +00:00
Richard Barry 3153131fa7 Add Dornerworks attribution to makefiles that build the Freedom Studio RISC-V project. 2019-02-12 02:43:28 +00:00
Richard Barry 7e08fd6d07 Add makefiles that build the FreedomStudio project (provided by Dornerworks - thanks). 2019-02-11 19:44:13 +00:00
Richard Barry fb73829148 Ensure eTaskGetState() is brought in automatically if INCLUDE_xTaskAbortDelay is set to 1, as it is a dependency of eTaskGetState().
Added the portTASK_FUNCTION_PROTO macros around the timer task, as the macros are already used by the idle task.
Add a PDF of the RISC-V documentation into the repo as the web page is not yet live.
2019-02-08 01:18:08 +00:00
Richard Barry df5952f655 Add xTaskGetIdleRunTimeCounter() API function to return the run time stats counter for the idle task - useful for POSIX time implementations. 2019-01-21 23:39:48 +00:00
Gaurav Aggarwal 817783d75c Copyright updates from Cadence.
e1df894752
2019-01-16 19:01:25 +00:00
Richard Barry a4941ac5db Update main.c() for the WIN32-MingW project so the trace recorder is initialized even when the simple blinky demo is used - otherwise the trace recorder causes an exception as it is used without first being initialized. 2019-01-07 19:40:13 +00:00
Richard Barry 80df5cd517 Update the pin mux setup on the Vega board demo to enable the LED. 2018-12-31 20:14:34 +00:00
Richard Barry 11d9c440b8 Move the 'generic' version of freertos_risc_v_chip_specific_extensions.h back to a sub-directory as having it in the RISC-V port's base directory was causing SoftConsole to pick up the wrong version (for an unknown reason).
Add a project for the Vega board's RI5CY core.
2018-12-31 18:19:52 +00:00
Richard Barry e2af102c80 Re-org of RISC-V file structure and naming step 2. 2018-12-30 23:53:47 +00:00
Richard Barry 818eeccc0c Re-org of RISC-V file structure and naming step 1. 2018-12-30 23:20:26 +00:00
Richard Barry 3474e750fa Create folder to hold RISC-V chip specific extensions. 2018-12-30 23:15:37 +00:00
Richard Barry db750d0c82 Update RSIC-V port layer after testing saving and receiving of chip specific registers. 2018-12-30 23:11:40 +00:00
Richard Barry 60b133b2c6 Move the RISC-V pxPortInitialiseStack() implementation to the assembly port file from the C port file so it can have access to the number of chip specific registers it needs to save space for on the stack. 2018-12-30 20:00:43 +00:00
Richard Barry 911a1de273 Correct accidental deletion in GenQTest.c. 2018-12-28 03:38:27 +00:00
Richard Barry d369110167 Allow the size of the stack used by many of the standard demo/test tasks to be overridden by FreeRTOSConfig.h settings.
Update the Freedom Studio RISC-V project so the 'full' build configuration is now functional.
2018-12-28 00:44:18 +00:00
Richard Barry 178fe4f143 Update the Freedom Studio RISC-V project so the gdbinit options are now specified on the command line. 2018-12-27 04:57:49 +00:00
Richard Barry e5daf23d75 Update Freedom Studio RISC-V demo for the latest GCC RISC-V port - not yet tested. 2018-12-27 04:34:08 +00:00
Richard Barry 80f6f3e59b Retarget Softconsole RISC-V demo from IGLOO2 to Renode as it can have more RAM and therefore have more test tasks running. 2018-12-24 17:48:10 +00:00
Richard Barry ce36928ea8 Rename directories in the RISC-V port. 2018-12-24 17:37:02 +00:00
Richard Barry 2181c0375e Backup Microsemi Renode project before adding a build configuration for the target hardware. 2018-12-19 02:56:13 +00:00
Richard Barry 8d213b42f2 Add vTimerSetReloadMode() calls to the code coverage tests. 2018-12-17 23:19:23 +00:00
Richard Barry 6edabbe7ea Update the the MPU simulator project to exercise the timer API. 2018-12-17 22:06:58 +00:00
Richard Barry 148f588f56 Remove "FromISR' functions from the list of functions that switch to a privileged mode as IRQs are privileged already.
Add the vTimerSetReloadMode() API function.
2018-12-17 22:04:18 +00:00
Richard Barry 8285ca6b5f Update RISC-V_IGLOO2_Creative_SoftConsole demo to make use of new RISC-V porting layer structure and exercise some external interrupts - all tests currently passing in Renode. 2018-12-17 00:01:36 +00:00
Richard Barry 101806906d Rework RISC-V portASM.S to make it easier to add in chip specific RISC-V extensions and accommodate chips that don't include the CLINT. 2018-12-16 23:59:49 +00:00
Richard Barry 7cc42b2ab6 Save changes to the RISC-V port layer before making changes necessary to support pulpino too:
+ Switch positions of the asm functions used to start the kernel and handle traps to enable one to reference to the other.
+ Handle external interrupts (working with Renode emulator).
+ The _sp linker variable is now called __freertos_irq_stack_top.
2018-12-16 20:21:29 +00:00
Richard Barry 866635d2ad Microsemi RISC-V project:
Reorganize project to separate Microsemi code into its own directory.
    Add many more demo and tests.
2018-12-10 20:55:32 +00:00
Richard Barry 6b37800ade Backup checkin of MiFive demo running in ReNode emulator. 2018-12-10 05:28:05 +00:00
Richard Barry 9a136a52df Backup check in of the Microsemi IGLOO2 Creative Board RISC-V demo - still a work in progress. 2018-12-04 01:27:06 +00:00
Richard Barry 4b9dd38d1c Backup checking of the Freedom Studio RISC-V project - still a work in progress. 2018-12-04 01:25:53 +00:00
Richard Barry 65f7a2dc19 Update RISC-V port to use a separate interrupt stack. 2018-12-04 01:23:41 +00:00
Richard Barry e85ea96f78 Some efficiency improvements in Risc-V port. 2018-11-28 19:35:40 +00:00
Richard Barry dc99300fa9 First task running in RISC-V-Qemu-sifive_e-FreedomStudio demo. 2018-11-24 20:59:07 +00:00
Richard Barry d0ef322b13 Add kernel code to the RISC-V-Qemu-sifive_e-FreedomStudio demo. 2018-11-24 04:42:20 +00:00
Richard Barry f7102f2342 Add a starting point for a Freedom Studio Risc V project. 2018-11-24 03:48:55 +00:00
Richard Barry db64297487 Provide each Risc V task with an initial mstatus register value. 2018-11-20 20:12:35 +00:00
Richard Barry 8cef339aec Update Risc-V port to use environment call in place of software interrupt - still very much a work in progress. 2018-11-19 06:01:29 +00:00
Richard Barry baee711cb6 Continue work on Risc V port. 2018-11-06 02:04:28 +00:00
Richard Barry 74d0d16aab Update xTaskRemoveFromEventList() so when tickless idle is used prvResetNextTaskUnblockTime() only gets called if the scheduler is not locked, as it would get called when the scheduler is unlocked in any case. 2018-11-05 19:35:54 +00:00
Richard Barry 55ff89373a Update the method used to detect if a timer is active. Previously the timer was deemed to be inactive if it was not referenced from a list. However, when a timer is updated it is temporarily removed from, then re-added to a list, so now the timer's active status is stored separately. 2018-10-24 21:37:59 +00:00
Richard Barry 6fab2b9e0d Add xTaskGetApplicationTaskTagFromISR(), which is an interrupt safe version of xTaskGetApplicationTaskTagFrom(). 2018-10-08 15:10:18 +00:00
Gaurav Aggarwal 1af80854e6 Fix Xtensa project file and some documentation improvements. 2018-10-02 23:54:51 +00:00
Richard Barry c6de0001fa Added uxTaskGetStackHighWaterMark2(), which is the same as uxTaskGetStackHighWaterMark() other than the return type.
Allows the task name parameter passed into xTaskCreate() to be NULL.
2018-09-30 21:50:05 +00:00
Richard Barry e3dc5e934b RISC-V tasks now context switching to each other using taskYIELD() - not fully tested yet. 2018-09-27 17:25:17 +00:00
Richard Barry 2bcb1ab02b Add trap handler to RISC-V port so there is no dependency on third party code. 2018-09-23 03:52:23 +00:00
Richard Barry 32f35e9130 RISC-V:
Added code to setup the timer interrupt - not tested yet.
Added the taskYIELD() implementation - so far just checked it generates an interrupt.
2018-09-12 16:33:05 +00:00
Richard Barry b11eb3a59c RISC-V work in progress:
+ Initialise task stack.
    + Successfully jump to start of first task.
2018-09-10 20:50:05 +00:00
Richard Barry 0c0f0d0f8f Minor synching - no functional changes. 2018-09-07 22:24:51 +00:00
Richard Barry ab49c6ae04 Very minor formatting changes, and remove legacy link to V8 upgrade information. 2018-09-07 21:35:05 +00:00
Richard Barry 92ae8e7aff Update version numbers ready for release. 2018-09-07 18:13:20 +00:00
Richard Barry 1a235efd2b Update trace configuration files for the updated trace recorder code. 2018-09-06 18:52:45 +00:00
Richard Barry be9c0730c3 Update trace recorder code to the latest.
Some minor changes to enable the configREMOVE_STATIC_QUALIFIER constant to be used by those debuggers that cannot cope with statics being used.
2018-09-06 03:23:03 +00:00
Richard Barry 21a8ff35dd Two minor updates in the comments to fix html formatting that was preventing doxygen creating documents correctly. 2018-09-01 02:42:34 +00:00
Richard Barry 97a686b2e1 Fix mixed tabs and spaces in the latest TCP patches. 2018-08-30 18:25:53 +00:00
Richard Barry e2750cd388 Case unused return values for memset and memcpy to void in stream_buffer.c to avoid compiler warnings when the warning level is turned up.
Remove duplicate comment in heap_1.c.
2018-08-29 15:43:41 +00:00
Richard Barry 0d6e3df7ec Minor updates to fix issues with the Segger kernel aware plug since V10.1.0. 2018-08-28 18:10:42 +00:00
Richard Barry 9bda04b472 Fix build issues in the FreeRTOS_Plus_TCP_Minimal_Windows_Simulator project:
+ Set configENABLE_BACKWARD_COMPATIBILITY to 1 in FreeRTOSConfig.h to account for the fact that a member of the List_t structure has been renamed.
+ Provide a dummy implementation of ulApplicationGetNextSequenceNumber() to prevent linker warnings.
2018-08-28 16:58:21 +00:00
Richard Barry 893db45834 Changes required for the IAR StateViewer plug-in to work with FreeRTOS V10.1.0. 2018-08-27 23:11:28 +00:00
Richard Barry b0ce1f61c9 Move some variables from function scope back to being file scope for the benefit of some kernel aware debuggers that were left working in a non-functioning mode after the V10.1.0 release - not last change for this purpose. 2018-08-27 21:59:26 +00:00
Richard Barry a11b1a494d FreeRTOS+UDP was removed in FreeRTOS V10.1.0 as it was replaced by FreeRTOS+TCP,
which was brought into the main download in FreeRTOS V10.0.0.  FreeRTOS+TCP can
be configured as a UDP only stack, and FreeRTOS+UDP does not contain the patches
applied to FreeRTOS+TCP.
2018-08-23 00:00:20 +00:00
Richard Barry 3a1631fda3 Update copyright date ready for tagging V10.1.0. 2018-08-22 23:23:03 +00:00
Richard Barry bdb088e66f Fix some build issues in older kernel demo projects.
Update to V2.0.7 of the TCP/IP stack:
   + Multiple security improvements and fixes in packet parsing routines, DNS
     caching, and TCP sequence number and ID generation.
   + Disable NBNS and LLMNR by default.
   + Add TCP hang protection by default.

We thank Ori Karliner of Zimperium zLabs Team for reporting these issues.
2018-08-22 21:29:21 +00:00
Richard Barry fb9de58f56 Update version numbers in preparation for a new release. 2018-08-21 19:50:48 +00:00
Richard Barry 722ca8fb2b Update demo project for Tensilita - work in progres..
Add support for POSIX style errno - work in progress.
2018-08-21 19:37:04 +00:00
Richard Barry 78d20e2854 Only include the static definition of freertos_tasks_c_additions_init if FREERTOS_TASKS_C_ADDITIONS_INIT is defined, matching the guide used to include the function's prototype. 2018-08-20 15:08:35 +00:00
Gaurav Aggarwal 56dc0dd9b4 Merge bug fixes from Cadence 2018-08-07 07:21:07 +00:00
Richard Barry f6cbf20019 Update RISC-V project to used official port stubs in place of third party port. 2018-07-07 21:54:41 +00:00
Richard Barry 3bfc32d444 Add stubs for official RISC-V RV32 port. 2018-07-07 21:47:31 +00:00
Richard Barry d525d5092d Update trace recorder code.
Add TCP Echo server to the FreeR_Plus_TCP_Minimal_Window_Simulator project.
2018-07-02 22:29:02 +00:00
Richard Barry f7fc215247 Update stream buffer tests to try resetting a statically allocated stream buffer before deleting it (tests fix in code).
Update trace recorder library.
2018-07-02 21:58:28 +00:00
Richard Barry 0887713969 Fix issues whereby vStreamBufferReset() clobbered the flag that indicated the stream buffer was statically allocated. 2018-06-20 21:21:55 +00:00
Richard Barry 9119e1e0e3 Add starting point for IGLOO2 RISV-V demo project. 2018-06-20 21:18:14 +00:00
Richard Barry 483f4a8c4b Small change to the directory name in which the RISC-V port is stored. 2018-06-20 21:15:04 +00:00
Richard Barry 3d8d2f3cc8 Add RISCV port layer. 2018-06-20 19:21:18 +00:00
Richard Barry 10eea4aded Remove period from the URL that links to the web page that describes the FreeRTOSConfig.h parameters. 2018-06-15 00:03:20 +00:00
Gaurav Aggarwal c4b1afc4ef Add Xtensa port
The project file is for Xtensa Xplorer simulator.
Also add tests for one size stream buffer.
2018-06-14 19:43:17 +00:00
Richard Barry 7d92e4dd8f Sync with TCP version from AWS, including:
+ Add FreeRTOS_UpdateMACAddress().
+ Fix bug in lTCPWindowRxCheck() that manifested itself when flooded with lots of very small packets.
2018-06-13 21:16:22 +00:00
Richard Barry d6fcd5dbba Add the option to specify a stack size in the standard demo MessageBuffer tests.
Add stream and message buffer tests into the Zynq demo project.
2018-06-13 16:50:16 +00:00
Richard Barry 4fbcdbf13b Fix misra violations in queue.c by introducing a union that allows the correct data types to be used in place of void *, then tidy up where the union is used. 2018-06-11 18:51:53 +00:00
Richard Barry 4a8c4c9eaf TimerHandle_t is now type safe instead of void *.
Remove casts that are no longer required not type safe handles are used.
2018-06-11 04:43:12 +00:00
Richard Barry 3d8681de9e Continue updating to MISRA 2012 from 2004 - currently working on queue.c and committing as working copy prior to making larger change.
Change QueueHandle_t to be typesafe from void *.
Change StreamBuffer_t to be typesafe from void *.
2018-06-11 01:56:32 +00:00
Richard Barry 7a9f453f96 Remove casts from EventGroupHandle_t to EventGroup_t, and corresponding lint comments, which are not required now EventGroupHandle_t is type safe.
Fix the prototype of prvTimerCallback() in the MPU simulator demo (caught due to the new type safety in tasks.c).
2018-06-04 04:02:57 +00:00
Richard Barry 390fb06b49 First pass at updating from MISRA 2004 to MISRA 2012:
Updated pvContainer member of list items to List_t * rather than void * as they are always contained in a list if anywhere.
Made EventGroupHandle_t typesafe pointer to forward referenced struct rather than void pointer.
Made TaskHandle_t typesafe pointer to forward referenced struct, rather than a void pointer.
2018-06-03 22:57:46 +00:00
Richard Barry 5bebf10fa4 Minor updates to comments only. 2018-05-17 17:50:14 +00:00
Richard Barry 585b16a39f Update definition of StaticTimer_t so its size is correct on MSP403X large memory model builds. 2018-05-07 16:31:50 +00:00
Richard Barry d30249789b Previously the MPSoC Cortex-A53 demo was updated to the latest Xilinx SDK tools to the point where it was building, but not tested. This check in modifies the project files slightly following testing. 2018-05-04 15:06:50 +00:00
Richard Barry 26d8c76996 Update Zynq, MPSoc Cortex-A53 and MPSoc Cortex-R5 demo projects to build with the 18.1 version of the Xilinx SDK - building BUT NOT YET TESTED. 2018-05-02 04:04:54 +00:00
Richard Barry a3148ba638 xTaskGenericNotify() now sets xYieldPending to pdTRUE even when the 'higher priority task woken' parameter is provided - making its behaviour consistent with event objects.
Ensure tasks that are blocked indefinitely on a direct to task notification return their state as eBlocked, previously was returned as eSuspended - making its behaviour consistent with event objects.
Fix typo in stream_buffer.c where "size_t xBytesAvailable ); PRIVILEGED_FUNCTION" had the semicolon in the wrong place.
Add testing of Stream Buffers to the AbortDelay.c tests.
Guard inclusion of C code when FreeRTOSConfig.h is included from an assembly file in the ARM7_LPC2129_IAR demo.
Fix minor typos in the Windows demo comment blocks.
2018-04-29 18:15:38 +00:00
Richard Barry 025088c280 Fix regressions introduced by introduction of configMESSAGE_BUFFER_LENGTH_TYPE constant - specifically enabling big endian support and updates to xStreamBufferNextMessageLengthBytes. 2018-03-15 18:31:02 +00:00
Richard Barry 3ec86b7a98 Introduce sbBYTES_TO_STORE_MESSAGE_LENGTH to allow the number of bytes used to hold a message length in a message buffer to be reduced if 4 bytes is always too many (save a little RAM). 2018-03-15 15:51:22 +00:00
Richard Barry aec45f2479 Import the code coverage test additions from the (unpublished) Visual Studio project to the (published) MingW/Eclipse project.
Update the MingW/Eclipse project to add a code coverage build configuration in addition to the existing Debug build configuration.
Update StreamBufferDemo.c so functions are called directly, rather than via configASSERT(), so their code coverage can be measured when configASSERT() is not defined.
In the Win32 port, replace the call to TerminateProcess() in vPortEndScheduler() with exit( 0 ) - which triggers the writing of the code coverage data to the disk.
Fix bug in ucStreamBufferGetStreamBufferType() - which is only used by the Percepio trace tool.
Update the line within vTaskStartScheduler() that was setting xTickCount to 0 to instead set it to configINITIAL_TICK_COUNT.
2018-03-14 15:58:47 +00:00
Richard Barry bf8d9f4726 Start moving code coverage tests from VisualStudio (not checked in) to the MingW project (checked in) by creating a second build configuration in the Windows Eclipse project that includes the code coverage command line options. Additionally make minor code updates to ensure configASSERT() is not defined, and the application runs for a finite time, when the code coverage build configuration is used. 2018-03-06 17:23:55 +00:00
Richard Barry c156522695 Complete testing of changes that allow xQueueOverwrite() to be used on a queue that is part of a queue set.
Fix some compiler warnings in stream_buffer.c.
Update the MingW/Eclipse project so it also includes static allocation tests.
2018-03-05 21:35:50 +00:00
Richard Barry f9bef06ec0 Introduce xMessageBufferNextLengthBytes() and tests for the same.
Add call to traceTASK_SWITCHED_IN() in vTaskStartScheduler() so trace tools can see the first task to run.
2018-03-04 19:25:14 +00:00
Richard Barry 9ed3a9fe18 Fix buffer clean up in \FreeRTOS_Plus_TCP_Minimal_Windows_Simulator\demo_logging.c.
Update queue code to allow an overwrite operation on a queue that is in a queue set, and add prvTestQueueOverwriteWithQueueSet() to test function.
Update Eclipse Win32 project to bring it closer the the Visual Studio equivalent.
2018-02-26 21:22:44 +00:00
Richard Barry ff74e7aa63 Allow IP address to be passed into gethostbyname().
Ensure xNetworkBuffersInitialise() doesn't use a semaphore before it has been tested against NULL.
2018-02-18 19:58:26 +00:00
Richard Barry 7ddb8b342d Microblaze port: Place critical section around XIntc_Enable() to protect read/modify/write operation performed inside the library. 2018-01-30 17:42:12 +00:00
Richard Barry 208cc18a90 Ensure data cannot be sent to a TCP socket if the socket is in the process of closing.
Correct definition of StaticTask_t in the case that portUSE_MPU_WRAPPERS is set to 1.
prvTaskCheckFreeStackSpace() now returns configSTACK_DEPTH_TYPE to allow return values greater than max uint16_t value if required.
xStreamBufferSend() and xStreamBufferReceive() no longer clear task notification bits - clearing was unnecessary as only the task notification state is used.
2018-01-30 17:39:14 +00:00
Richard Barry 0fe82b4d91 Correct out of date comment in tasks.c.
Fix typo in comment in queue.h.
2017-12-28 20:20:26 +00:00
Richard Barry 13651934be Roll up the minor changes checked into svn since V10.0.0 into new V10.0.1 ready for release. 2017-12-18 22:54:18 +00:00
Richard Barry f998c8119a Update license information text files for the CLI, TCP and UDP products to be correct for V10. 2017-12-13 17:00:13 +00:00
Richard Barry 0d903cf2d6 FreeRTOS+TCP: Added ipconfigSOCKET_HAS_USER_WAKE_CALLBACK configuration option so the user can specify a callback to execute when data arrives.
FreeRTOS+TCP: Improve print output when using WinPCap to assist in selecting the correct network interface.
FreeRTOS kernel: Fix extern "C" { in stream_buffer.h.
FreeRTOS kernel: Correct tskKERNEL_VERSION_NUMBER and tskKERNEL_VERSION_MAJOR constants for V10.
Ensure the currently executing task is printed correctly in vTaskList().
2017-12-12 17:47:56 +00:00
Richard Barry cfc268814a Update to MIT licensed FreeRTOS V10.0.0 - see https://www.freertos.org/History.txt 2017-11-29 16:53:26 +00:00
Richard Barry e42a701e99 Add missing +TCP code. 2017-08-17 12:26:43 +00:00
Richard Barry 77e95538dc Added +TCP code to main repo. 2017-08-17 12:18:14 +00:00
Richard Barry 037abdddf2 Update TriCore port to work with latest GCC compiler. 2017-08-09 16:57:35 +00:00
Richard Barry b6f2402f3f Update trace recorder source to fix some compile time warnings. 2017-06-01 14:16:16 +00:00
Richard Barry 2307bc9dfa Add MSVC .vs directory to keep the IDE's windows layout. 2017-06-01 14:15:24 +00:00
Richard Barry 6eea3d8d4b Correct long time mis-spelled portINITIAL_EXEC_RETURN to portINITIAL_EXC_RETURN 2017-05-30 00:36:09 +00:00
Richard Barry 3f74cd483b Update linker script so main stack starts on 8-byte alignment. 2017-05-30 00:17:14 +00:00
Richard Barry 6b8eb1e936 Update IAR project for MSP432 to IAR version 8.11. 2017-05-30 00:03:31 +00:00
Richard Barry 2887612f27 FreeRTOS.h changes to go with the last tasks.c checkin. 2017-05-29 23:08:34 +00:00
Richard Barry b5d8be2209 Remove obsolete code from prvCheckTasksWaitingTermination(). 2017-05-29 22:55:09 +00:00
Richard Barry 533b533820 Fix typo in comment that got copied into multiple main.c file.s 2017-05-29 22:06:54 +00:00
Richard Barry 504d9c8bab Update the FreeRTOS_Plus_CLI_with_Trace_Windows_Simulator demo to use the latest FreeRTOS+Trace recorder code. 2017-05-29 22:05:25 +00:00
Richard Barry 35f5990e7a Update the MSVC and MingW demos to use the latest FreeRTOS+Trace recorder library. 2017-05-29 21:45:31 +00:00
Richard Barry f289bfb388 Update to the latest trace recorder library. 2017-05-29 21:43:07 +00:00
Richard Barry 9f84f353d0 Remove configurations other than 'debug' from the Win32 demo. 2017-05-07 18:22:31 +00:00
Richard Barry 2e89c13c1c Cosmetic changes only. 2017-04-26 00:23:57 +00:00
Richard Barry a99cd32208 Updated name of CORTEX_MPU_CEC_MEC_17xx_Keil_GCC to CORTEX_MPU_CEC_MEC_17xx_51xx_Keil_GCC. 2017-04-20 05:33:05 +00:00
Richard Barry 59925359ed Added traceQUEUE_CREATE_FAILED() trace macros into the queue create functions. 2017-04-10 01:58:58 +00:00
Richard Barry b080f13543 Add more "memory" clobbers into the MPU ports to make them robust to more aggressive optimisation in newer GCC version. 2017-04-10 01:58:01 +00:00
Richard Barry 0f85ead175 Add more "memory" clobbers into asm code of GCC/ARM_CRx_No_GIC port to make it robust with higher optimisation in newer versions of GCC. 2017-04-10 01:01:11 +00:00
Richard Barry 0a7a0a79d6 Updates to prevent warnings when compiled with LLVM. 2017-04-10 00:26:22 +00:00
Richard Barry 8ca40d80a9 Ensure the PIC32 interrupt stack is 8 byte aligned for all values of configISR_STACK_SIZE. 2017-04-09 20:13:48 +00:00
Richard Barry 96db5a3600 PIC32MZ project using later MPLAB X tools. 2017-04-09 19:35:32 +00:00
Richard Barry ffb228e448 Change name of the CEC and MEC directory to CORTEX_CEC_MEC_17xx_51xx_Keil_GCC as it is also applicable to the MEC5105 part. 2017-04-04 20:21:40 +00:00
Richard Barry 7fc04bfebe Change name of the CEC and MEC directory to CORTEX_MPU_CEC_MEC_17xx_51xx_Keil_GCC as it is also applicable to the MEC5105 part. 2017-04-04 20:16:37 +00:00
Richard Barry 464c2660ad Updates to the Cortex-M tickless idle code to reduce clock slippage.
Updates to prevent the vTaskSwitchContext() function being removed from GCC builds when link time optimisation is used.
2017-03-28 03:13:48 +00:00
Richard Barry 7ee26c1b5e Enable button interrupts in the MSP432 demos in order to test code paths when an MCU exits low power mode for a reason other than a tick interrupt. 2017-03-28 03:12:20 +00:00
Richard Barry aa810cb926 Ensure vTaskGetInfo() sets the sate of the currently running task to eRunning - previously it was set to eReady. 2017-03-27 20:31:03 +00:00
Richard Barry 3b2bbcb56a Maintenance on MSP432 demo. 2017-03-09 02:13:40 +00:00
Richard Barry ad5659e93d Housekeeping check-in, no code changes. 2017-03-08 22:19:14 +00:00
Richard Barry 34b194150e Add CEC and MEC 17xx demo that is completely statically allocated. NOT FULLY TESTED YET. 2017-03-08 18:38:02 +00:00
Richard Barry b9fe24962e Add additional memory barriers into ARM GCC asm code to ensure no re-ordering across asm code as optimisers get more aggressive. 2017-03-07 04:06:10 +00:00
Richard Barry c3acc441ac Introduce vTaskInternalSetTimeOutState() which does not have a critical section, and add a critical section to the public version of the same. 2017-02-24 02:16:54 +00:00
Richard Barry 9b213e8c34 Add SimpleLink CC3220SF demo. 2017-02-24 02:12:27 +00:00
Richard Barry 67def3c14b Update Reliance Edge fail safe file system to the latest version. 2017-01-24 00:20:35 +00:00
Richard Barry 8d041c8e21 Update version number in preparation for maintenance release. 2017-01-22 05:28:13 +00:00
Richard Barry 979e41c9da Update UltraScale R5 hardware definition and BSP for 2016.4 SDK tools. 2017-01-21 21:59:25 +00:00
Richard Barry ff55eb920c Update Zynq MPSoC hardware definition and BSP files to be those shipped with the 2016.4 SDK. 2017-01-19 16:33:13 +00:00
Richard Barry 992a3c8c71 Update BSP source files for UltraScale Cortex-A53 and Cortex-R5 and Microblaze to the 2016.4 versions.
Correct alignment issue in GCC Cortex-R port that was preventing full floating point usage in interrupts (other ports will be updated likewise).
Update the UltraScale R5 demo to test the GCC Cortex-A9 port layer modification mentioned on the line above.
2017-01-19 04:11:21 +00:00
Richard Barry 6ffaa6f018 Correct alignment issue in GCC and RVDS Cortex-A9 port that was preventing full floating point usage in interrupts (other ports will be updated likewise).
Update the Zynq demo to test the GCC Cortex-A9 port layer modification mentioned on the line above.
2017-01-18 18:33:48 +00:00
Richard Barry d67dcf9c74 Enhanced priority dis-inheritance functionality in the case where a task that caused another task to inherit its priority times out before obtain a mutex.
Added test code to GenQTest to test the new priority dis-inheritance functionality.
Allow the default names given to the Idle and Timer tasks to be overwridden by definitions in FreeRTOSConfig.h.
2017-01-16 03:58:51 +00:00
Richard Barry 883541bc8e Rename the CORTEX_MPU_MEC17xx_KEIL_GCC directory to CORTEX_MPU_CEC_MEC_Keil_GCC as it is also applicable to the CEC17xx parts. 2017-01-09 21:29:42 +00:00
Richard Barry c882141175 Change how volatile is used in some of the standard demos to remove compiler warnings in the latest GCC versions. 2017-01-04 05:07:12 +00:00
Richard Barry ca9edf3531 Increase the priority of the Windows threads used by the FreeRTOS Windows port, and, because the threads have high priority and run on the same core, prevent the port running on single core hosts so as to avoid locking up the host. 2017-01-04 04:48:22 +00:00
Richard Barry f98b675671 Add MPU project for multiple MEC17xx devices. 2016-12-11 22:56:30 +00:00
Richard Barry 225f13bac2 Update TaskNotify.c to test the condition where a direct to task notification is sent to a suspended task.
Introduce configSTACK_DEPTH_TYPE so the application writer change the type used to specify a stack size from uint16_t to whatever they like.  Defaults to uint16_t if not defined.
Introduce configINITIAL_TICK_COUNT to allow users to start the tick count at something other than 0.  Used for testing, but overflows can be better tested by setting configUSE_16_BIT_TICKS to 1.
Split xQueueGenericReceive() into xQueueReceive(), xQueuePeek() and xQueueSemaphoreTake() as the first step in refactoring xQueueGenericReceive().
Add Cortex-M3 port layer for Code Composer Studio - previously there was only a Cortex-M4F port.
Introduce configPRE_SUPPRESS_TICKS_AND_SLEEP_PROCESSING() to allow applications to prevent portSUPPRESS_TICKS_AND_SLEEP() being called.  Previously the portPRE_SLEEP_PROCESSING() macro could only be used to abort entry into sleep time after clocks had been re-programmed for the distant wake time.
2016-11-25 21:07:56 +00:00
Richard Barry 7fcc976248 Update version of Reliance Edge. 2016-11-21 04:30:49 +00:00
Richard Barry 7cce089e40 Add support for statically allocated memory protected tasks - previously only dynamically allocated tasks could be memory protected. 2016-09-20 13:54:28 +00:00
Richard Barry 5c75e5a38a Correct the definition of StaticTask_t and add additional configASSERT() statements to catch future errors. 2016-09-14 08:21:24 +00:00
Richard Barry 40201bc253 Introduce configRECORD_STACK_HIGH_ADDRESS, which when set will result in both limits of the stack being saved in the TCB to allow enhanced debug capabilities.
Introduce configINCLUDE_FREERTOS_TASK_C_ADDITIONS_H, which allows a user provided header file to be included at the bottom of the tasks.c source file, which can add user functions and access file scope data.
Replace global on/off switches used for lint errors with save/restore switches.
2016-09-04 15:46:34 +00:00
Richard Barry f11912c5de Clean up lint errors. 2016-08-16 13:44:30 +00:00
Richard Barry 75ffac21d7 Changes to core code and port layer:
+ Add configASSERT() into ARM Cortex-M ports to check the number of priority
      bit settings.
    + Clear the 'control' register before starting ARM Cortex-M4F ports in case
      the FPU is used before the scheduler is started.  This just saves a few
      bytes on the main stack as it prevents space being left for a later save
      of FPU registers.
    + Added xSemaphoreGetMutexHolderFromISR().
    + Corrected use of portNVIC_PENDSVSET to portNVIC_PENDSVSET_BIT in MPU ports.
2016-08-16 11:38:58 +00:00
Richard Barry bdbf347c22 Remove clrex instruction from Cortex-M ports again as it is implicit in interrupt entry. 2016-06-28 10:39:25 +00:00
Richard Barry c296e2cff8 Improvements to the Cortex-M ports:
- Clear the SysTick current value register before starting the SysTick (only required if something uses SysTick before starting the scheduler).
- Ensure atomic operations are thread safe by executing clrex in the context switch.
2016-06-27 13:13:05 +00:00
Richard Barry 6c975cd46a Final check in before tagging V9.0.0. 2016-05-25 11:47:42 +00:00
Richard Barry 2bd7884ace Prepare for V9.0.0 release:
+ Change version number from V9.0.0rc2 to V9.0.0.
2016-05-20 18:05:46 +00:00
Richard Barry e23eca901d Preparing for V9.0.0 formal release:
+ Update various projects to use the latest versions of their build tools.
2016-05-20 12:18:59 +00:00
Richard Barry 0063b29cdf Prepare for V9.0.0 release.
+ Set flash wait states on MSP432 demos.
+ Remove use of obsolete IO library in PIC32 demos.
+ Remove obsolete item left on stack of first task to run in the Cortex-M0 ports.
+ Correct IA32 GCC vPortExitCritical() implementation when configMAX_API_CALL_INTERRUPT_PRIORITY == portMAX_PRIORITY.
2016-05-19 13:28:12 +00:00
Richard Barry e10647f9c0 Increase the test coverage of the GCC MPU demo that runs in the Keil simulator.
Add an MPU demo that uses the Keil simulator that also uses the Keil compiler.
Correct a few version numbers for files recently added to the repository.
2016-05-18 19:51:14 +00:00
Richard Barry ee9cd40b6d Add GCC ARM Cortex-M4F MPU port.
Add RVDS ARM Cortex-M4F MPU port.
Increase the size of each buffer allocated to pbufs in the Microblaze lwIP demo to prevent pbufs chaining.
Use _start as the top of the stack for each Microblaze task, rather than NULL, as NULL was causing the Xilinx SDK to try and unwind the stack too far.
2016-05-18 10:41:28 +00:00
Richard Barry fedb98c5f6 Recreated MicroBlaze example using Vivado 2016.1 - the Microblaze project is still a work in progress - not yet fully functional. 2016-05-10 14:05:22 +00:00
Richard Barry 501be60574 Update the Microblaze hardware design and BSP to the latest IP and tool versions. 2016-05-09 15:55:51 +00:00
Richard Barry 324127837c Update some more standard demos for use on 64-bit architectures.
Update the Xilinx Ultrascale+ Cortex-A53 (64-bit) and Cortex-R5 (32-bit) demos to use version 2016.1 of the SDK.
2016-05-06 12:40:27 +00:00
Richard Barry 0cb71ee9ce Update the Xilinx UltraScale+ demo project to use the BSP and hardware platform generated by the 2016.1 version of the SDK. 2016-04-28 12:49:19 +00:00
Richard Barry 11fe9de0f0 Update the Xilinx UltraScale+ 64-bit demo to use the hardware definition and BSP from version 2016.1 of the SDK. 2016-04-28 12:23:52 +00:00
Richard Barry 0721cf102a Completely re-generate the Zynq 7000 demo using the 2016.1 SDK tools.
Introduce configUSE_TASK_FPU_SUPPORT into the GCC Cortex-A9 port to allow tasks to have an FPU context by default.
Add MikroC Cortex-M4F port.
2016-04-25 17:24:54 +00:00
Richard Barry 2ec97696db Remove Zynq 7000 project so it can be re-created using the 2016.1 edition of the SDK. 2016-04-25 13:37:57 +00:00
Richard Barry 0b5906d404 Remove obsolete MPU demos.
Separate the MPU wrappers into their own file so they can be used from future MPU ports.
2016-04-25 12:03:47 +00:00
Richard Barry afd4b432f6 Improve coverage of the MPU API in the new MPU demo, fixing typos in the MPU port layer as they are found. 2016-04-24 18:33:16 +00:00
Richard Barry 12a0be1e69 Add software timer use to the new MPU demo.
Update CEC1302 demos to demonstrate both aggregated and disaggregated interrupts.
2016-04-24 10:06:20 +00:00
Richard Barry 345819d550 Update the GCC Cortex-A9 port to introduce a version of the IRQ handler that saves the FPU registers. 2016-04-23 10:53:57 +00:00
Richard Barry ac67c39be9 Update the MPU port so it supports all the public functions found in V9.0.0rc2. 2016-04-20 15:42:34 +00:00
Richard Barry da6c95edae Update CEC1302 peripheral library version. 2016-04-18 15:52:19 +00:00
Richard Barry 057b38ad23 Updates to support FreeRTOS MPU in FreeRTOS V9.0.0 - including a GCC project that runs in the Keil simulator to allow development and testing. 2016-04-18 10:49:24 +00:00
Richard Barry 255145bde1 xTaskGetTaskHandle() changed to xTaskGetHandle().
Tidy up CEC1302 demo.
Ensure bit 0 of the task address is clear when setting up stack of initial Cortex-M3/4/7 stacks (for strict compliance, although not practically necessary).
vTaskGetTaskInfo() changed to vTaskGetInfo() - with a macro added for backward compatibility.
2016-04-15 11:48:07 +00:00
Richard Barry ee5386756d Correct selected device in IAR SAMA5D2 project. 2016-04-14 11:18:13 +00:00
Richard Barry f0f2378961 Add SAMA5D2 Xplained IAR demo. 2016-04-14 11:14:58 +00:00
Richard Barry 5252301cb8 Rename CORTEX_M4F_CEC1302_Keil to CORTEX_M4F_CEC1302_Keil_GCC as it now contains both GCC and Keil projects. 2016-04-07 10:57:36 +00:00
Richard Barry 912445c341 Added GCC project to the CEC1302 demo. 2016-04-07 10:56:04 +00:00
Richard Barry 4b9c4aa757 Correct comment error that was replicated on many different main_full.c files. 2016-04-04 14:53:04 +00:00
Richard Barry f1725afbe5 Remove compiler warning by ensure prvInitialiseMutex() is not included if configUSE_MUTEXES is 0.
Reduce the number of xTaskCreateStatic() parameters by having the function return the task handle, rather than pass the task handle out using a parameter.  This is also consistent with other objectCreate() functions.
2016-03-31 15:22:10 +00:00
Richard Barry 07ac1399ee Update version number to 9.0.0rc2. 2016-03-30 12:20:36 +00:00
Richard Barry f9c02d09c3 Update MSP432 projects to use updated driver library files.
Remove references to INCLUDE_pcTaskGetTaskName and INCLUDE_xTimerGetTimerDaemonTaskHandle, which are no longer required.
2016-03-30 11:12:06 +00:00
Richard Barry b9b64c0889 Make the pcObjectGetName() API function naming consistent - so rename pcTaskGetTaskName() to pcTaskGetName(), rename pcTimerGetTimerName() to pcTimerGetName() and add a #defines in FreeRTOS.h to make the changes backward compatible. 2016-03-29 17:16:34 +00:00
Richard Barry aeb03e5fa0 Create minor optimisations (just an asm instruction or two) by using consts in a few places where previously a volatile variable that didn't change was used.
Add the simple xTimerGetPeriod() and xTimerGetExpiryTime() functions.
2016-03-29 13:07:27 +00:00
Richard Barry 26d3770fad - Rework the StaticAllocation.c common demo file to reflect the changes to the static allocation object create functions from the previous check-in.
- Correct various typos in comments.
- Add xTimerGetPeriod() function (feature request).
2016-03-29 11:08:42 +00:00
Richard Barry 9dda62372c Update the documentation contained in the header files to be correct for V9.0.0 release candidate 2. 2016-03-26 11:05:42 +00:00
Richard Barry 6568ba6eb0 Notes:
+ The MPU port is not supported in this revision number.
+ The documentation for the static allocation functions in the header files has not yet been updated for this revision.

Kernel updates:
+ Simplify the static allocation of objects implementation.
+ Introduce configSUPPORT_DYNAMIC_ALLOCATION in addition to the existing configSUPPORT_STATIC_ALLOCATION so FreeRTOS can be built without providing a heap at all.

Demo application updates:
+ Update the demos to take into account the new configSUPPORT_DYNAMIC_ALLOCATION constant.
+ Add an MSVC demo that only uses static allocation, and does not include a FreeRTOS heap.
+ Update the MSVC project to use both configSUPPORT_STATIC_ALLOCATION and configSUPPORT_DYNAMIC_ALLOCATION.
+ Update the MingW project to use only configSUPPORT_DYNAMIC_ALLOCATION.
2016-03-22 16:23:37 +00:00
Richard Barry 283bc18d23 Very minor changes to the EFM32 Giant and Pearl Geckos demos in preparation for pre-release of the projects. 2016-03-18 19:40:03 +00:00
Richard Barry 60537ce7cb Add low power timer library source file for the Pearl Gecko demo.
Fix types in comments.
2016-03-16 17:18:21 +00:00
Richard Barry 9f5095f6bd Rework the low power demo that uses the RTCC clock on the Pearl Gecko, and add attentional test code. 2016-03-16 17:17:07 +00:00
Richard Barry 8ffe75f665 Replace Gecko Simplicity Studio project that had multiple build configurations with one that has a single build configuration and targets the Giant Gecko starter kit. Now there are separate projects for the Giant and Pearl Geckos.
Update the Pearl Gecko project to use the register test tasks that include the FPU registers.
2016-03-02 17:45:55 +00:00
Richard Barry c0abb762ff Add Pearl Gecko demo.
Fix build error when configSUPPORT_STATIC_ALLOCATION and configNUM_THREAD_LOCAL_STORAGE_POINTERS were greater than zero at the same time.
Allow the pdMS_TO_TICKS macro to be overridden by a definition in FreeRTOSConfig.h.
2016-03-02 16:03:25 +00:00
Richard Barry 780aa7e325 Add files necessary to create a Pearl Gecko build configuration in the new EFM32 SimplicityStudio project. 2016-02-20 15:27:40 +00:00
Richard Barry f4033581b5 Update FreeRTOS+ version number ready for version 9 release candidate 1. 2016-02-18 19:02:43 +00:00
Richard Barry d3ba0aa98d Update version number ready for version 9 release candidate 1. 2016-02-18 17:11:14 +00:00
Richard Barry d7253324cd Prepare for a FreeRTOS V9 release candidate:
- Remove the standard demo files that used the [long since deprecated] alternative API.
- Add standard demo task that tests the new xTaskAbortDelay() function.
- Update the Win32 Visual Studio project to use Visual Studio 2015 Community Edition.
- Rename the xGenericListItem TCB member to xStateListItem as it better describes the member's purpose.
2016-02-18 10:07:42 +00:00
Richard Barry c7b7b90cc9 Core kernel code changes:
+ Added xTaskAbortDelay() function, which causes a task to exit the Blocked state even before the timeout has expired or the event the task is waiting for has occurred.
+ For efficiency and code size reasons on some architectures, replace many instances of "== pdTRUE" with "!= pdFALSE".
2016-02-14 11:58:11 +00:00
Richard Barry 2acc8f2c99 FreeRTOS source:
- Major refactor to consolidate the multiple places where a task is removed from a ready list and placed in a delay list into a single function, reducing code size, and enabling the easy addition of up-coming functionality.
 - Replace the enum used for task notification states with a uint8_t to reduce the TCB struct size with some compilers, and allow additional members to be added without increasing its size.
 - Rearrange FreeRTOS.h so all INCLUDE_ defaults are grouped together.
2016-02-10 12:58:15 +00:00
Richard Barry 42e73b9b8f Kernel source code:
+ Added xPortIsInsideInterrupt() to RVDS ARM CM4F port - the same will get added to other ports in time.

Demo application code:
+ Added first pass Microchip CEC1302 demo for Keil.
+ Harden the new StaticAllocation.c standard demo tasks against integer promotion rules causing problems on 16-bit architectures.
2016-02-09 16:02:54 +00:00
Richard Barry 732778a971 Test the RTC and BURTC tickless implementations on the Gecko parts, and make correct as appropriate.
Replace some references to the older portTICK_RATE_MS macro with the newer pdMS_TO_TICKS() macro in the standard demo files.
2016-02-03 11:58:30 +00:00
Richard Barry 556de14a1d Update EFM32 demos to include an option to use the RTC as the clock source when using low power tickless mode. 2016-02-01 18:04:50 +00:00
Richard Barry c4dd17eeb5 Added a build configuration for the Wonder Gecko starter kit to the existing Giant Gecko Simplicity Studio project.
Fix some lint warnings that were generated by some of the new core functionality.
2016-01-31 20:22:00 +00:00
Richard Barry 802af0150c Add vTaskGetTaskInfo() function that allows a TaskStatus_t structure to be returned for an individual task (previously information could only be obtained for all the tasks at once).
Add a member to the TaskStatus_t structure that is used to return the base address of the stack used by the task being queried.
Add xTaskGetTaskHandle() that allows the handle of a task to be looked up from the task's text name.
Continue to document the macros that allow RTOS objects to be created using statically allocated memory.
Introduced vApplicationDaemonTaskStartupHook(), which allows initialisation that that needs to be executed after the scheduler has been started to be executed from the RTOS daemon task.
Call prvResetNextTaskUnblockTime() in xTaskResumeAll() if a task is moved from the pending ready list - this can prevent an unnecessary wake from sleep mode if a task is unblocked by an interrupt while in a low power tickless state.
2016-01-28 16:59:57 +00:00
Richard Barry b514f4fa4e Baseline the Giant Gecko demo, which now has the first pass at a low power tickless implementation. 2016-01-25 21:17:47 +00:00
Richard Barry 8ef7849199 Ensure the code builds when configSUPPORT_STATIC_ALLOCATION is 0.
Continue to document the new static allocation functions.
2016-01-22 22:09:11 +00:00
Richard Barry f82953554d Provide the ability to create event groups and software timers using pre statically allocated memory - now all RTOS objects can be created using statically allocated memory.
Rename StaticTCB_t to StaticTask_t.
2016-01-21 14:10:04 +00:00
Richard Barry 68fced741d Continue to add the ability to create RTOS objects using static rather than dynamic memory allocation - now including all the semaphore types.
Update the StaticAllocation.c standard demo file to exercise the new static allocation functions.
2016-01-20 14:04:40 +00:00
Richard Barry cf0ed4e2ac Implement functionality that allows the memory required to create a queue or semaphore to be allocated statically.
Update the standard demo task that tests statically allocated tasks to also test statically allocated queues.
2016-01-19 13:41:28 +00:00
Richard Barry eae4815bf3 Rename DummyTCB_t to StaticTCB_t.
Move structures used for static allocation of tasks and queues into FreeRTOS.h from their individual API header files.
Add SAME70 Xplained Atmel Studio project.
Update SAMV71 Atmel Studio project to use Studio 7.
Revert some changes to GenQTest.c standard demo task which only function correctly when a queue registry was used.
2016-01-18 15:57:02 +00:00
Richard Barry 41b5e486dd Remove unused header files from new EFM32 demo.
Prep the code ready to create a tickless implementation.
2016-01-17 16:04:56 +00:00
Richard Barry 53b996077f Add EFM32 Giant Gecko Starter Kit demo - still a work in progress as the low power tick management has not been implemented yet. 2016-01-17 14:34:27 +00:00
Richard Barry b832d5801f Kernel changes:
Minor change to xQueueGenericReceive() to catch the extreme case of data being placed into a queue between a task timing out and leaving the xQueueGenericReceive() function.
Added xSemaphoreGetCount() macro.


Demo app changes:
Updated countsem.c to test the new xSemaphoreGetCount() macro.
2016-01-12 15:52:44 +00:00
Richard Barry f81575dcee Correct a comment that had been cut and paste into multiple main.c files. 2016-01-12 10:38:16 +00:00
Richard Barry 5690221c5c Add in the CORTEX_A53_64-bit_UltraScale_MPSoC demo application (a demo has been included in the Xilinx SDK download for some time already).
Update a few demo application files to work with 64-bit data types.
2015-12-22 13:56:20 +00:00
Richard Barry 51560d9a96 FreeRTOS source updates:
+ Add the pre-existing 64-bit Cortex-A53 port layer into the head revision of the main repository.

Demo application updates:
+ Update Zynq demo to use SDK version 2015.4
+ Add task static allocation standard demo to Zynq demo.
+ Make the XScuGic object accessible outside of the vConfigureTickInterrupt(), again in the Zynq demo.
2015-12-21 08:25:41 +00:00
Richard Barry ea95020ffd Changes to the FreeRTOS code:
+ Introduced xTaskCreateStatic() to allow tasks to be created without any dynamic memory allocation.
+ When a task notification is used to unblock a task from an ISR, but the xHigherPriorityTaskWoken parameter is not used, then pend a context switch to occur during the next tick interrupt.

Demo application changes:
+ Updated TaskNotify.c to test the case where a task is unblocked by an ISR, but does not use its xHigherPriorityTaskWoken parameter.
+ Updated the Win32 MSVC project to test statically allocated tasks being created and deleted.
+ Introduced StaticAllocation.c standard demo task.
2015-12-20 13:44:21 +00:00
Richard Barry 7d6609f8db FreeRTOS source:
+ Previously, if a task was deleted, the memory allocated to the task by the RTOS was freed in the Idle task.  Now if a task deletes another task the memory is freed immediately.  The idle task is however still responsible for freeing the memory when a task deletes itself.
+ Added pcQueueGetQueueName() function to return the name of a queue from its handle, assuming the queue is registers.

Demo application:
+ Update GenQTest to exercise the new pcQueueGetQueueName() function.
+ Delete workspaces from old Eclipse examples, leaving just the projects.
+ Rework comments in the MSVC simply blinky demo.
2015-12-08 20:22:58 +00:00
Richard Barry 94dd3f871b FreeRTOS Source files:
+ Updated all ARM Cortex-M0 ports to include an additional ISB instruction as the scheduler is started.

Demo app files:
+ Fixex build issues in XMC1000 demos.
2015-11-22 22:03:00 +00:00
Richard Barry fa86d4eece FreeRTOS source changes:
+ heap_1.c and heap_2.c now support configAPPLICATION_ALLOCATED_HEAP (heap_4.c already did) which allows the heap to be placed by the user rather than the linker.

Demo app changes:
+ SAMD20 project has been updated to use Atmel Studio 7.
2015-11-22 21:14:39 +00:00
Richard Barry e9561c946c Kernel changes:
+ Support tickless idle when configUSE_PREEMPTION is 0 (previously tickless idle was only supported when the pre-emptive scheduler was being used).
+ If a stack was statically allocated, then don't try freeing it if the TCB cannot be allocated.
+ Remove use of INCLUDE_xEventGroupsSetBitsFromISR() pre-processor macro, as it was not tested anyway.

Demo app changes:

+ Updated SAM4L Atmel Studio project to use Atmel Studio 7.
2015-11-20 14:11:11 +00:00
Richard Barry 5e9787978c Final tidy up before tagging V8.2.3. 2015-10-17 17:25:50 +00:00
Richard Barry 825b43a188 Update version number ready for the V8.2.3 release. 2015-10-16 14:57:00 +00:00
Richard Barry d289525e1b Preparing for maintenance release:
Kernel source changes:
- Added xTaskNotifyStateClear() API function.
- Added the GCC Cortex-R port (existed for a while) into the main download.
- Improved the IAR RL78 port's handling of different memory model combinations.
- Removed some compiler warnings in heap_5.c.

Demo app changes:
- Added example use of xTaskNotifyStateClear() to the TaskNotify standard demo tasks.
2015-10-16 11:29:36 +00:00
Richard Barry 57cc3389a5 Preparing for maintenance release -
Bug fix - issue introduced in V8.2.2 when the current timer list is empty and the overflow timer list is not empty.
Add PIC32MZ EF (floating point) support and update the MZ demo project to test the flop context switching.
Improve efficiency of the stack overflow checking.
Add CLI to RX71M demo.
General tidy up of new RZ and RX projects - including ensuring the UART driver copes with 0 length strings.
Add stack overflow checking to the [old] PIC24 demo.
2015-10-15 20:19:26 +00:00
Richard Barry 38cb08133d Check in RX231 IAR demo. 2015-10-10 20:38:12 +00:00
Richard Barry c6a4e3191e Add FreeRTOS+CLI examples to the Renesas RZ/T demos.
Fix some compiler warnings.
Correct spellings in comments.
2015-10-10 10:29:29 +00:00
Richard Barry 96ff3925d2 Update FreeRTOS+Trace recorder library to v3.0.2
Add streaming version of the FreeRTOS+Trace recorder, also V3.0.2
2015-10-09 13:30:09 +00:00
Richard Barry f218cf5680 Demo tasks:
- Complete the demo projects for the RX113 using IAR, GCC and Renesas compilers by including a basic UART CLI.

Standard demo tasks:
- Add some volatile qualifiers to variables in IntQueue.c.
2015-10-05 15:23:09 +00:00
Richard Barry cd42d2c215 Changes in common files:
Add additional asserts into timers.c.

Trivial changes and changes in demo applications:
RX113 IAR project is not building and running.
Make FreeRTOS_SetupInterrupt() and FreeRTOS_ClearInterrupt() weak symbols in the Zynq SDK repository.
Correct typo in the port layer comments that was cut and paste into multiple files.
2015-10-03 18:48:41 +00:00
Richard Barry b3f343fdae Update RX231 projects to blink the LED. 2015-09-25 09:33:37 +00:00
Richard Barry e5c8119b96 Baseline new RX projects before refining and tidying them up. 2015-09-25 08:26:55 +00:00
Richard Barry 87243e4a16 FreeRTOS source:
+ Added Renesas RXv2 port for IAR.

Demo apps:
+ Demo/Rename the CORTEX_R4F_T_GCC_IAR_ARM directory to just Rename the CORTEX_R4F_T_GCC_IAR.
+ Add IAR project for the RX113.
+ Add RX231 e2studio projects for the RX231.
2015-09-23 12:16:10 +00:00
Richard Barry 27ff871a37 Baseline new GCC and Renesas compiler projects for RX71M and RX113 before adding IAR projects. 2015-09-22 08:45:15 +00:00
Richard Barry b71bb46a5b Modify RZ/T e2studio directory structure to accommodate an IAR project.
Start RZ/T port and demo project.
2015-09-13 21:39:17 +00:00
Richard Barry aa80622d72 Remove compiler warnings from auto-generated code.
Baseline prior to starting IAR RZ/T project.
2015-09-13 07:30:43 +00:00
Richard Barry a29dc8d6c6 Add PIC32MEC14xx port and demo application. 2015-09-12 20:47:59 +00:00
Richard Barry f19497c3d6 Simplify and improve GIC-less Cortex-R4 port.
Add final tests into RZ/T demo.
2015-09-12 12:14:58 +00:00
Richard Barry b9f235846f Common source code:
- Remove configASSERT() if a queue cannot be created, malloc failed hook will be called anyway.

Demo apps:
- RZ/T blinky demo working, but still lots to do to improve the port.
2015-09-11 13:29:40 +00:00
Richard Barry 28d8a27f8f Initial RZ/T port and demo - work in progress, currently only the tick interrupt can be installed. 2015-09-07 17:29:14 +00:00
Richard Barry 717654471e Update the FreeRTOS+WolfSSL Win32 demo to use the latest WolfSSL libraries. 2015-08-28 13:58:05 +00:00
Richard Barry 02d0847567 Rename the FreeRTOS_Plus_CyaSSL_Windows_Simulator directory to FreeRTOS_Plus_WolfSSL_Windows_Simulator. 2015-08-28 13:49:47 +00:00
Richard Barry 5a6242fbd0 Update WolfSSL library to the latest version. 2015-08-28 13:46:22 +00:00
Richard Barry 8af1ad9bac Rename the CyaSSL directory to WolfSSL 2015-08-28 13:27:31 +00:00
Richard Barry 1b010fbaa7 Final commit before tagging - cosmetic changes only. 2015-08-12 16:45:24 +00:00
Richard Barry 3291f5a08d Final preparation for new release:
FreeRTOS+Trace:
 - Add trace macros for task notifications.
 - Update to the latest trace recorder library.

Demo projects:
 - Only include the CLI command to show run time states if configGENERATE_RUN_TIME_STATS is set to 1.
2015-08-12 10:34:30 +00:00
Richard Barry 99d4f2c454 Update version numbers in preparation for new release. 2015-08-05 12:59:42 +00:00
Richard Barry b4c3d91aff Add FreeRTOS BSP for Xilinx SDK. 2015-08-05 10:21:59 +00:00
Richard Barry 4c847711bd Common scheduler code:
- Back out changes that allow mutexes to be given from a semaphore after tests showed issues that would not be fast to fix.

Demo projects:

- Update the Microblaze Kintex 7 project and BSP to use version 2015.2 of the Xilinx SDK.
2015-08-04 17:36:55 +00:00
Richard Barry 95eed0c8f3 Preparing for next release...
Zynq ZC702 demo application:
Update the memcpy, memset and memcmp implementations so they don't err with -O3 optimisation.
Update to use the 2015.2 version of the SDK.
2015-08-01 15:00:22 +00:00
Richard Barry 4c3722bd76 Preparing for new release...
Kernel changes:
- Remove an assert that was preventing xQueueSendFromISR() being used to give a mutex from an ISR (mutexes cannot be given using xSemaphoreGiveFromISR()).
- Introduce xTaskNotifyAndQueryFromISR() as the interrupt safe version of xTaskNotifyAndQuery().

Common demo task changes:
- Update IntSemTest.c to prove the theory that it is safe to give a mutex type semaphore from an interrupt using xQueueSendFromISR() instead of xSemaphoreGiveFromISR().
- Update TaskNotify.c to test the new xTaskNotifyAndQuery() from ISR fuction.
2015-08-01 07:03:32 +00:00
Richard Barry 25b911e0bd Add resource filters to the Eclipse project used to build the Galileo demo. 2015-07-30 21:13:03 +00:00
Richard Barry cff5cfdd4f Preparing for the next release...
New port and demo project:  Intel Galileo.
2015-07-30 11:46:30 +00:00
Richard Barry 8b5c27b679 Preparing for the next release...
PIC32MZ demo application:
- Update to use the latest XC32 compiler.
2015-07-30 11:37:33 +00:00
Richard Barry 672ae6cbb6 Starting to prepare for the next release...
Core FreeRTOS code:
+ Added PRIVILEGED_FUNCTION qualifier to those functions from which it was previously missing.
2015-07-30 11:30:05 +00:00
Richard Barry d3e053568d MSP430:
Add additional NOPs as required by hardware manual.

Microblaze:
Previously a task inherited the exception enable state from the context from which xTaskCreate() was called.  Now tasks all have exceptions enabled if they are enabled in the hardware.

Windows/GCC:
Improve the implementation of portGET_HIGHEST_PRIORITY.

Common code:
Simplify the pointer use in xQueueGenericCreate()

Demo apps: 
Remove jpg images that were used to create web pages.
Fix capitalisation issues in some demos where some header files are incldued with the wrong case, preventing building on Linux.
Remove the Microblaze demos that are using obsolete tools.
Update main_blinky for the Windows port demo to include a software timer example.
2015-07-26 16:41:12 +00:00
Richard Barry 95b73d40d9 Correct calculation of xHeapStructSize in heap_4 and heap_5.
Convert uint32_t types to size_t types in heap_5.c, as was previously done for heap_4.c.
2015-06-25 12:14:54 +00:00
Richard Barry 4ee2a96861 Add back some files essential for the PIC32MZ build. 2015-06-24 16:49:21 +00:00
Richard Barry 8a1450effc Microblaze: Add a port optimised task selection implementation to the Microblaze port.
Windows port:  Add code to ensure Windows threads are truely suspended before resuming another thread.
Typo correction to the task notification standard demo task.
Correct case of some include file names to fix build issues on Linux.
2015-06-24 15:10:03 +00:00
Richard Barry cfb8223232 Add SAMV7 (Cortex-M7) demo for Atmel Studio. 2015-06-16 12:38:35 +00:00
Richard Barry 7456c232ce Update library files used in STM32F7 demo to the latest version released by ST. 2015-06-04 15:35:12 +00:00
Richard Barry 267dc24bb3 Kernel changes to improve power saving:
+ The timer task now blocks indefinitely if there are no timers active, allowing eTaskConfirmSleepModeStatus to return eNoTasksWaitingTimeout when configUSE_TIMERS is set to 1.
+ The next unblock time is calculated automatically after a task unblocks when waiting for a notification, allowing deep sleep to be entered earlier.
2015-05-20 15:46:40 +00:00
Richard Barry 067c1573c3 Finalise MSP43FR5969 IAR and CCS demos (hopefully). 2015-04-28 13:53:30 +00:00
Richard Barry 9bb5b40c81 Add CCS project for MSP430FR5969 demo. 2015-04-27 15:23:29 +00:00
Richard Barry a9d1ff4f5e Change some data types in heap_4.c to allow it to be used on hardware that has 16-bit pointers without generating compiler warnings.
Add a small data model configuration to the MSP43FR5969 IAR demo.
Correct some code comments in the SAMA5D4 demo.
2015-04-27 11:14:11 +00:00
Richard Barry 976a9b44af Rename /Demo/MSP430FR5969_LaunchPad to /Demo/MSP430X_MSP430FR5969_LaunchPad for consistency with other MSP430 demo directory names.
Fixed typos in comments repeated in multiple source files.
2015-04-24 11:42:25 +00:00
Richard Barry 34a7b0431b Complete large memory model MSP430FR5969 demo - including CLI and run-time stats. 2015-04-24 11:34:19 +00:00
Richard Barry 91b249d24b Start of an MSP430FR5969 IAR project - currently running Blinky only. 2015-04-22 15:36:44 +00:00
Richard Barry d39c0d5926 Update TimerDemo.c to test the new vTimerSetTimerID() function.
Update WinPCap NetworkInterface.c for FreeRTOS+UDP to correctly store a pointer to the network buffer structure at the beginning of the network buffer.
2015-04-13 19:58:51 +00:00
Richard Barry 03213b9e4a Add the errno definitions used by FreeRTOS+TCP and FreeRTOS+FAT into FreeRTOS's projdefs.h.
Remove redundant global definition vPortInstallFreeRTOSVectorTable from the GCC ARM_CA9 portASM.S file.
Ensure correct sequence of start up sequence when the Windows port is used on multi-core Windows machines by starting one thread in the suspended state.
Move initialisation of xNextTaskUnblockTime to the function that starts the scheduler, rather than from where the variable is declared - this fixes a compiler warning in newer IAR compilers.
Fix "elif (SELECTED_PORT == PORT_MICROCHIP_PIC32MX || PORT_MICROCHIP_PIC32MZ)" in the FreeRTOS+Trace trcHardwarePort.h header file.
2015-04-13 18:45:02 +00:00
Richard Barry 8dadb6b87c Final V8.2.1 release ready for tagging:
+ Added MSP432 (ARM Cortex-M4F MSP430!) demos for IAR, Keil and CCS.
+ Renamed directory containing demo for STM32F7 ARM Cortex-M7.
+ Renamed directory containing demo for SAMV71 ARM Cortex-M7.
+ Introduced xTaskNotifyAndQuery().
2015-03-24 15:24:49 +00:00
Richard Barry 693d0520bc Update version number ready for V8.2.1 release. 2015-03-21 21:03:42 +00:00
Richard Barry 63b3c773d5 Kernel changes:
Exclude the entire croutine.c file when configUSE_CO_ROUTINES is 0.

New ports:
Added Cortex-M7 IAR and Keil port layers that include a minor errata workaround r0p1 Cortex-M7 devices.
Added Cortex-M4F port layer for CCS.

New demo applications:
Added demo application for STM32F7.
Added demo application for SAMv71.
2015-03-21 14:01:43 +00:00
Richard Barry 2bf93bf925 Minor updates relating to formatting and comments only. 2015-03-20 15:43:20 +00:00
Richard Barry a61db8f155 Minor updates to the Microblaze KC702 demo to allow easier connection from a Telnet server. 2015-03-16 11:22:43 +00:00
Richard Barry 18ff880e75 Add networking option to the Microblaze Kintex demo. 2015-03-13 15:05:09 +00:00
Richard Barry 3012d9b94d Work-in-progress check in of MicroBlaze Kintex7 demo. 2015-03-10 15:58:19 +00:00
Richard Barry 96e72413f7 Kernel code:
+ Added mtCOVERAGE_TEST_DELAY() macro to facilitate getting better code coverage during testing.
+ Update prvNotifyQueueSetContainer() so it does not call xTaskRemoveFromEventList() if it is called from an interrupt, and the queue is locked.

Demo apps:
Added QueueSetPolling.c/h demo/test functions.
2015-03-04 17:45:18 +00:00
Richard Barry 7d169cef52 Correct typeo that broke the Win32 port. 2015-02-17 14:28:10 +00:00
Richard Barry 86b09bfeb9 Kernel updates:
+ Added vTimerSetTimerID() to compliment vTimerGetTimerID().  Now the timer ID can be used as timer local storage.
+ Updated comments and added some additional assert() calls.

Win32 port:
+ Some changes to allow easier 64-bit builds

PIC24/dsPIC port:
+ Added NOP after disable interrupt instruction.
2015-02-11 15:41:30 +00:00
Richard Barry dfdc319518 Kernel updates:
- Add user configurable thread local storage array, with get/set access function.
2015-01-26 17:40:35 +00:00
Richard Barry 51aa373c4c Add run-time stats to the Kintex7 Microblaze demo. 2015-01-19 13:34:26 +00:00
Richard Barry acfbb7dd14 Add the beginnings of a Microblaze project for the KC705. 2015-01-16 19:16:12 +00:00
Richard Barry 501a531d46 Update version number in preparation for official V8.2.0 release. 2015-01-16 13:20:28 +00:00
Richard Barry c37b2ca39b Demo app changes:
Add a "query heap" command to the standard sample CLI commands.
Remove casting from configMAX_PRIORITIES setting in Win32 simulator demos as it was preventing a clean build. 

Source code changes.
General tidy up and addition of assert points.
2015-01-15 21:37:32 +00:00
Richard Barry e4e6328300 Remove casting from configMAX_PRIORITIES setting in FAT SL / CLI demo as it was preventing a clean build. 2015-01-07 07:02:17 +00:00
Richard Barry 271393b7d9 Release candidate - this will be tagged as FreeRTOS V8.2.0rc1 and a zip file provided.
Minor lint changes.
2014-12-24 09:40:58 +00:00
Richard Barry 5dd77c7aeb Rename SAM4E demo directory to include the 'F' in 'M4F' - minor point for the sake of consistency. 2014-12-24 08:55:14 +00:00
Richard Barry 6741592026 Update version numbers in preparation for V8.2.0 release candidate 1. 2014-12-21 19:09:18 +00:00
Richard Barry fd02010886 Kernel changes:
+ Made xTaskNotifyGiveFromISR() its own function, rather than a macro that calls xTaskNotifyFromISR() (minor performance improvement).
+ GCC and Keil Cortex-M4F ports now use vPortRaiseBASEPRI() in place of ulPortRaiseBASEPRI() where the return value is not required (minor performance improvement).

Demo changes:
Change the [very basic] FreeRTOS+UDP SAM4E driver to use task notifications rather than a semaphore (execution time now 55% what it was in FreeRTOS V8.1.2!).
Robustness improvements to IntQueue.c standard demo task.h.
Added the latest standard demo tasks, reg test tasks and int q  tasks to the SAM4E demo.
2014-12-21 10:26:36 +00:00
Richard Barry 2de32c0141 Kernel changes:
+ Do not attempt to free the stack of a deleted task if the stack was statically allocated.
+ Introduce configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES - which optionally writes known values into the list and list item data structures in order to assist with the detection of memory corruptions.

Microblase port:  
+Change occurrences of #if XPAR_MICROBLAZE_0_USE_FPU == 1 to 	#if XPAR_MICROBLAZE_0_USE_FPU != 0 as the value can also be 2 or 3.

Demo app modifications:
+ Update Zynq project to use the 2014.4 tools and add in tests for the new task notification feature.
+ Update SAM4S project to include tests for the new task notification feature.
2014-12-19 16:27:56 +00:00
Richard Barry f407b70dcc + Update demos that use FreeRTOS+Trace to work with the latest trace recorder library.
+ Fix a few compiler warnings.
+ Add TickType_t specific critical sections so critical sections are not used when accessing the tick count in cases where the access is atomic (32-bit tick count, 32-bit architecture).
2014-12-18 11:02:15 +00:00
Richard Barry 85fb1cc024 + New feature added: Task notifications.
+ Optimise Cortex-M4F ports by inlining some critical section macros.
+ Original ports used a #define to set the path to portmacro.h - that method has been obsolete for years and now all the old definitions have been moved into a separate header files called deprecated_definitions.h.
+ Cortex-M port now check the active vector bits against 0xff when determining if a function is called from an interrupt - previously only a subset of the bits (0x1f) were checked.
+ Add in new standard demo/test files TaskNotify.c/h and include the files in the simulator demos.
+ Update trace recorder code, and some demos to use the new version (more to do).
+ Introduce uxTaskPriorityGetFromISR().
+ Minor typo corrections.
+ Update MingW simulator demo to match the MSVC simulator demo.
2014-12-15 14:13:03 +00:00
Richard Barry ca22607d14 Core kernel code:
Allow the stats formatting functions to be built in without stdio.h being included inside tasks.c.

Kernel port code:
- Slight change to the Cortex-A GIC-less port to move all non portable code to the application level.

SAMA5D4 demo project:
- Update the Atmel provided library to V1.1.
- Create a DDR build configuration.
- Ensure interrupts are all edge sensitive.
- Update the regtest code to use all 32 flop registers.
2014-10-15 21:01:31 +00:00
Richard Barry e3263bb9b3 Demo projects only:
+ Remove some #warnings messages from the Cycle 5 - which were left in the code as reminders of tests that were not yet completed but are now.
2014-10-09 15:42:43 +00:00
Richard Barry 9e66637bec Core kernel files:
+ Change how queues are allocated and deleted so only one pvPortMalloc() or vPortFree() is required in place of the previous 2.
+ Where the TCB is allocated in relation to the stack is now dependent on the stack growth direction.  The stack will not grow into the TCB.
+ Introduce the configAPPLICATION_ALLOCATED_HEAP constant to allow the application to provide the array used by heap_4.c as its heap.  This allows the application writer to use qualifiers on the array to, for example, force the memory into faster RAM.

Demo application:
+ Add demo for SAMA5D4 using IAR.
2014-10-08 20:31:14 +00:00
Richard Barry ee541a347d MSP430 Demo projects only:
Update project format to new IAR version.
2014-10-05 20:43:12 +00:00
Richard Barry e0d9a274e2 Demo project only:
Added comprehensive demo including FreeRTOS+CLI to the Cyclone V SoC project.
2014-10-01 17:28:42 +00:00
Richard Barry d269f2027a Demo project only: Cyclone V SoC now running from external RAM. 2014-10-01 09:30:35 +00:00
Richard Barry e2f2cfa816 Added project for Altera Cyclone V SoC, currently running from internal RAM. 2014-09-30 15:32:19 +00:00
Richard Barry 3b0854bf96 Core kernel code:
+ Introduce xSemaphoreGenericGiveFromISR() as an optimisation when giving semaphores and mutexes from an interrupt.

Demo applications:
+ Update IntSemTest.c to provide more code coverage in xSemaphoreGenericGiveFromISR().
+ Ensure the MMU is turned on in the RZ IAR demo.  It was already on in the RZ ARM demo.
2014-09-16 14:54:32 +00:00
Richard Barry b3c040fc27 SAM4L tickless implementation: Bug fix and update the demo project to exercise the fix. 2014-09-16 12:24:14 +00:00
Richard Barry 4f03f7d1bb Demo project only:
Add the new IntSem test/demo code into the MSVC demo project.
2014-09-12 11:32:47 +00:00
Richard Barry b6e4854f26 Demo tasks only, with the aim of improving test coverage:
+ Split out the code that uses a mutex from an interrupt from GenQTest.c and add to new common demo task IntSemTest.c.
2014-09-11 12:06:27 +00:00
Richard Barry d55e7e77a2 Update version number to 8.1.2 after moving the defaulting of configUSE_PORT_OPTIMISED_TASK_SELECTION into individual port layers so it does not affect ports that do not support the definition. 2014-09-02 22:39:54 +00:00
Richard Barry 33cc3a292b Demo code only:
Add the IntQ standard test to the SAM4S project.
2014-09-02 16:06:57 +00:00
Richard Barry 99229b597b Correct potential compiler warning when configUSE_MUTEXES is set to 0.
Add comments.
2014-08-30 20:18:18 +00:00
Richard Barry a60ce58731 Update version number to 8.1.1 for patch release that re-enables mutexes to be given from an interrupt. 2014-08-29 19:14:23 +00:00
Richard Barry ff5d3512b3 Core kernel code:
- Re-introduce the ability to give a mutex from an ISR.

Common demo code:
- Add additional tests into the GenQTest files for priority inheritance and using a mutex from an ISR.
2014-08-29 13:53:58 +00:00
Richard Barry 6507701fdf Lower the minimum stack size used by the ATSAMA5 demo. 2014-08-26 16:53:40 +00:00
Richard Barry 7d49c2190c Minor edits prior to tagging V8.1.0. 2014-08-26 16:23:09 +00:00
Richard Barry d33a14b5fb ***IMMINENT RELEASE NOTICE***
Update version numbers ready for FreeRTOS V8.1.0 release in about 10 days.
2014-08-16 20:19:40 +00:00
Richard Barry e491610725 Remove some irrelevant CyaSSL files. 2014-08-16 15:43:43 +00:00
Richard Barry 52e687086c Demo application related:
+ Update the RZ IAR project so it targets the RZ RSK rather than custom hardware.
+ Update the RZ ARM/DS-5 project so it targets the RZ RSK rather than custom hardware.
+ Updated RX64M demos to use the new iodefine.h naming.

Cortex-A9 port related:
+ Update IAR, ARM and GCC Cortex-A9 port layers to include a 'task exit error' function which is called if a task attempts to incorrectly exit its implementing function.
+ Moved the instruction which switches into system mode out of the restore context macro, as it is only needed when starting the first task.

Core kernel files related:
+ Ensure there are no references to the mutexes held count when mutexes are excluded from the build.
2014-08-16 14:29:39 +00:00
Richard Barry 162448f06b General maintenance - changing comments and correcting spellings only. 2014-08-04 07:57:18 +00:00
Richard Barry 60538c7480 Common demo tasks:
- Add additional tests to GenQTest.c to test the updated priority inheritance mechanism.
- Slightly increase some delays in recmutex.c to prevent it reporting false errors in high load test cases.

SAMA5D3 Xplained IAR demo:
- Remove space being allocated for stacks that are not used.
- Remove explicit enabling of interrupts in ISR handers as this is now done from the central ISR callback before the individual handers are invoked.
- Reduce both the allocated heap size and the stack allocated to each task.
- Enable I cache.
2014-08-04 07:53:20 +00:00
Richard Barry 47f895cb34 Cortex-A5 IAR port:
- Removed SAMA5 specifics from the port layer, and instead call a generic ISR callback as per Cortex-A9 ports.
2014-08-03 19:15:30 +00:00
Richard Barry b2e739495a Cortex-A5 IAR port baseline prior to removing all SAMA5 specifics to make it generic.:
- Slight improvement to the save context macro.
- Remove some #warning remarks.
- Enable interrupts before calling the ISR handler rather than in the ISR handler.
2014-08-03 18:37:58 +00:00
Richard Barry 3a3d061cc5 Continue working on the GIC-less Cortex-A5 port for IAR:
- Add in the assert when a task attempts to exit its implementing function without deleting itself.
- Remove obsolete code from the context switch asm code (obsoleted by the fact that there is no mask register).
- Attempt to make code more generic by using definitions for additional register addresses.
2014-07-29 21:31:04 +00:00
Richard Barry e9b5deb34a Carry on working on SAMA5D3 demo:
- Add full interrupt nesting tests.
- Add additional critical section/context switching tests.
- Set interrupt priorities so everything can run at once without any software watchdog errors.
- Re-enable interrupts in each IRQ handler.
- Add in run-time stats.
2014-07-29 21:28:22 +00:00
Richard Barry 146b46df87 SAMA5D3 demo: Add CDC driver code and use CDC to create a simple command console. 2014-07-23 21:07:03 +00:00
Richard Barry 3d007d0b4b Update CyaSSL to latest version. 2014-07-18 18:54:25 +00:00
Richard Barry 5fcd270398 Re-test Zynq demo now it is using the latest tools. 2014-07-14 14:01:07 +00:00
Richard Barry bd9d37924d Add back Zynq demo - this time using SDK V14.2. 2014-07-14 13:00:18 +00:00
Richard Barry 96ceb9f537 Remove Zynq demo project ready to recreate the project using the 14.2 version of Xilinx's SDK. 2014-07-14 11:46:34 +00:00
Richard Barry 5b96cf6eea Add 'full' demo to the SAMA5 Xplained demo - but so far without interrupt nesting tests or CLI. 2014-07-12 20:40:33 +00:00
Richard Barry 8ad9b75810 Rename ARM_CAx_No_GIC ARM_CA5_No_GIC and add FreeRTOSConfig setting to specify the number of registers in the FPU unit. 2014-07-12 20:39:22 +00:00
Richard Barry 29336e35b5 SAMA5D3 Xplained demo blinky running. 2014-07-12 19:25:18 +00:00
Richard Barry f4a1a7d577 Add new port layer for Cortex-A devices without the means to mask interrupt priorities. 2014-07-12 19:21:04 +00:00
Richard Barry 5b96c12e92 Start of SAMA5D3 XPlained demo. 2014-07-09 21:19:01 +00:00
Richard Barry 8aa5fa3459 Make the parameters to vPortDefineHeapRegions() const.
Add additional asserts to the Keil CM3 and CM4F ports (other CM3/4 ports already updated).
Add the additional yield necessitated by the mutex held count to the case when configUSE_QUEUE_SETS is 0.
2014-07-04 13:17:21 +00:00
Richard Barry 4fe2abc792 Update the MSVC simulator demo to demonstrate heap_5 allocator and pdTICKS_TO_MS macro being used. 2014-07-03 16:49:29 +00:00
Richard Barry d96dc2adb0 Simply some of the alignment calculations in heap_4.c to match those used in heap_5.c.
Remove some apparently obsolete code from xTaskPriorityDisinherit() (a task cannot be both blocked and giving bac a mutex at the same time].
Update the new "mutex held count" increment and decrement functions to allow mutexes to be created before the scheduler is started.
2014-07-03 14:44:37 +00:00
Richard Barry b0ba273489 Check in the portable.h version required to use heap_5.c. 2014-07-02 10:20:35 +00:00
Richard Barry 4b26dc0614 Check in the new memory allocator that allows the heap to span multiple blocks. 2014-07-02 10:19:49 +00:00
Richard Barry 5e47df8c01 Update FreeRTOS+ components and demos to use typedef names introduced in FreeRTOS V8. 2014-06-20 20:15:20 +00:00
Richard Barry 4ce4de750a Update timer demo in PIC32MZ demo to remove multiple extern definition created by adding in the macro that checks non ISR safe functions are not called from ISRs. 2014-06-16 13:07:01 +00:00
Richard Barry 42b1688a30 Implementation of mutex held counting in tasks.c - needs optimisation before release. 2014-06-16 12:55:50 +00:00
Richard Barry 583b144bc3 Default the definition of portASSERT_IF_IN_ISR() to nothing if it is not defined.
Helper updates to allow a count of the number of mutexes held to be added.
Updates to the CCS Cortex-R4 implementation necessitated by a change in compiler semantics.
Update PIC32MX and MZ ports to assert if a non ISR safe function is called from an ISR.
2014-06-16 12:51:35 +00:00
Richard Barry b4659d8872 Add code to assert() if non ISR safe API function is called from ISR in Tasking CM4F ports - plus fix bug where the max syscall interrupt priority was used incorrectly in the Tasking CM4F port. 2014-06-15 09:24:08 +00:00
Richard Barry 113220628f Add code to assert() if non ISR safe API function is called from ISR in IAR and GCC CM3 and CM4F ports - Keil and tasking to follow. 2014-06-14 13:56:25 +00:00
Richard Barry 4723209074 Simplify the assert that checks if a non-ISR safe function is called from an ISR in the GCC Cortex-A9 port. 2014-06-13 14:08:28 +00:00
Richard Barry d45f18cc8d Add additional comments to the Zynq lwIP demo. 2014-06-13 14:06:43 +00:00
Richard Barry 8426eba8e7 Added portASSERT_IF_IN_INTERRUPT() macro to the GCC Cortex A9 port layer. 2014-06-12 16:28:56 +00:00
Richard Barry de7df3cfda Zynq demo: Fix Xilinx network driver by deferring the function that allocated memory from the interrupt into a task. Add DHCP option. 2014-06-12 16:27:35 +00:00
Richard Barry f1a0534a56 Remove some of the lwip asserts to allow use with 64-bit alignment. 2014-06-10 16:29:32 +00:00
Richard Barry 7fa64efeeb Switch to using the private watchdog as the run time stats timer in the Zynq demo. 2014-06-10 16:25:46 +00:00
Richard Barry 2f6cb8a86c Reorganise Zynq project after spitting lwIP example into a separate configuration. 2014-06-09 20:20:23 +00:00
Richard Barry e92795bcc8 Move the Zynq's lwIP example from the Full demo into its own configuration as having the lwIP tasks at a high priority made the self checking test tasks report failures, while having the lwIP tasks at a low priority slugged the throughput. 2014-06-09 19:35:08 +00:00
Richard Barry be8b0ed21d Update lwIP byte alignment to make Zynq pings more reliable. 2014-06-09 12:43:18 +00:00
Richard Barry 16ff69e873 Update RL78 GCC demo application after testing with fixed compiler. 2014-06-05 12:44:38 +00:00
Richard Barry 9efb5c8b2f Check in RL78 GCC port layer now it has been verified with the fixed compiler. 2014-06-05 12:42:49 +00:00
Richard Barry 5cbab67186 Complete RX64M GCC demo. 2014-06-04 09:19:16 +00:00
Richard Barry 1130a53ec8 Reverse order of projdefs.h and FreeRTOSConfig.h includes in FreeRTOS.h to allow addition of pdMS_TO_TICKS() macro.
Update RXv2 GCC port to match RXv2 Renesas port.
2014-06-04 09:17:14 +00:00
Richard Barry 5cd0b1e5ef Add -nomessage command line option to RX64M demo to suppress warning about the yield function being defined when it is not called directly. 2014-05-29 13:56:16 +00:00
Richard Barry f46070dc79 Ensure demo app files are using FreeRTOS V8 names - a few were missed previously. 2014-05-29 13:54:15 +00:00
Richard Barry ef254df85f A few additional casts to keep the Renesas RX compiler happy. 2014-05-29 13:39:48 +00:00
Richard Barry 74ffdb0b89 Add lwIP driver into Zynq demo - not yet fully functional. 2014-05-23 16:38:18 +00:00
Richard Barry 09a89763ee Add brackets in lwIP assert statement to prevent compiler warnings. 2014-05-23 16:36:49 +00:00
Richard Barry b215310e63 Add some missing volatiles to __asm statements in the CA9 GCC port. 2014-05-19 13:14:02 +00:00
Richard Barry 0bb794301a Update version number ready for release. 2014-04-24 14:26:36 +00:00
Richard Barry 911e82a909 Add xQueueGetMutexHolder() to MPU functions. 2014-04-24 12:29:40 +00:00
Richard Barry f25503977e Event Groups: Convert the 'clear bits from ISR' function into a pended function to fix reentrancy issue.
Event Groups: Ensure the 'wait bits' and 'sync' functions don't return values that still contain some internal control bits.
2014-04-23 15:23:54 +00:00
Richard Barry fa7222ab4a Update demos that use FreeRTOS+FAT SL to have correct version numbers after the update of FreeRTOS+FAT SL itself. 2014-04-23 14:34:49 +00:00
Richard Barry 03c95b5950 Update IAR XMC4200 project to fix link error that resulted from updating the IAR version to 7.x. 2014-04-23 13:59:56 +00:00
Richard Barry a46f251d11 Update FreeRTOS+FAT SL to version 1.0.1. 2014-04-23 13:28:21 +00:00
Richard Barry 6af9b013eb Ensure xNewLib_reent is reclaimed when a task is deleted. 2014-04-09 09:07:19 +00:00
Richard Barry 82207ebffa Add test and correct code for the unusual case of a task using an event group to synchronise only with itself.
Add critical sections around call to prvResetNextTaskUnblockTime() that can occur from within a task.
2014-03-31 02:12:17 +00:00
Richard Barry ef7f3c5320 Add the pcTimerGetTimerName() API function. 2014-03-28 14:41:15 +00:00
Richard Barry 887fcd04f4 Add interrupt nesting test code into RX64M demo. 2014-03-28 13:05:29 +00:00
Richard Barry 42cbd6a778 Add RSK definition and LED flash tasks into RX64M demo. 2014-03-28 11:47:40 +00:00
Richard Barry 29a08b5e24 Update Cortex-A port layers to ensure the ICCRPR and ICCPMR registers are always accessed as 32-bit values. 2014-03-25 17:12:31 +00:00
Richard Barry d59bf60ff9 Started to create RX64M GCC project - building but not yet converted to new core. 2014-03-20 12:04:49 +00:00
Richard Barry 6fe7e7ef67 Delete old RL78 launch configurations. 2014-03-19 16:45:53 +00:00
Richard Barry 7f7ad3d081 Add RL78/L1C configuration into e2studio demo. 2014-03-19 16:44:58 +00:00
Richard Barry 2283bfb0ae RL78/L1C configuration added to the IAR RL78 demo projects. 2014-03-19 13:29:11 +00:00
Richard Barry a5f00caf16 Working but incomplete RXv2 demo. 2014-03-07 17:13:05 +00:00
Richard Barry 05a0e4379e First pass at RXv2 port layer. 2014-03-07 17:12:06 +00:00
Richard Barry 3788026636 RXv1 tests running before updating to RXv2. 2014-03-06 12:46:16 +00:00
Richard Barry b17ab311af Start to create an RX64M demo. 2014-03-03 16:39:41 +00:00
Richard Barry 9bd5e5cf03 Cast away a few unused return types to ensure lint/compilers don't generate warnings when the warning level is high. 2014-02-23 20:01:07 +00:00
Richard Barry c8953a68cd Add extra #error message as a configuration sanity check. 2014-02-19 13:08:34 +00:00
Richard Barry ba6d285ea8 Minor updates to ensure all kernel aware debuggers are happy with V8. 2014-02-19 11:58:52 +00:00
Richard Barry e101e7e437 Update version number to V8.0.0 (without the release candidate number). 2014-02-18 14:01:57 +00:00
Richard Barry 38ae9b76bc Add logic to determine the tick timer source and vector installation into the PIC32MZ port assembly file to allow more efficient interrupt entry. 2014-02-18 10:10:32 +00:00
Richard Barry c3dd6f6593 Add event group code to the PIC32MZ demo. 2014-02-18 10:08:33 +00:00
Richard Barry 0f6b699eef Linting. 2014-02-17 19:41:29 +00:00
Richard Barry a2089bbcf6 Add #define INCLUDE_eTaskGetState 1 to the demos that use the int queue test. 2014-02-17 19:32:20 +00:00
Richard Barry 2346014918 Update final demos that use the trace recorder code to use the new version. 2014-02-17 15:11:16 +00:00
Richard Barry 33e11c72c3 Update LPC1830 example to use the latest trace recorder code. 2014-02-17 14:18:00 +00:00
Richard Barry d6da7b1231 Remove test of trace functions from the Win32/GCC build as it messes up the trace recorder. 2014-02-17 12:56:05 +00:00
Richard Barry 0ccfdd1021 Remove test of trace functions from the Win32 build as it messes up the trace recorder. 2014-02-17 12:48:18 +00:00
Richard Barry 04ae37ef12 Update trace recorder to include heap tracing and new v8 features. 2014-02-17 12:45:56 +00:00
Richard Barry 853696a991 Add event groups demo to SAM4E demo. 2014-02-16 22:03:39 +00:00
Richard Barry b7eb76904a Add event group tests to IAR LM3S demo. 2014-02-16 21:47:07 +00:00
Richard Barry e4dbc6b770 Make xEventGroupSetBitsFromISR() a function when configUSE_TRACE_FACILITY is enabled to allow the inclusion of a trace macro. 2014-02-14 11:07:25 +00:00
Richard Barry b96016e234 Follow instructions on http://blogs.msdn.com/b/vsproject/archive/2009/07/21/enable-c-project-system-logging.aspx to manually prevent MSVC from incorrectly reporting the MSVC demo project as being out of date. 2014-02-11 15:15:36 +00:00
Richard Barry 5a2a8fc319 Update the demo directory to use the version 8 type naming conventions. 2014-02-11 12:04:59 +00:00
Richard Barry c6d8892b0d Replace xTaskIsTaskSuspended() call with eTaskGetState() call in IntQueue.c as the former is now a private function. 2014-02-11 11:38:33 +00:00
Richard Barry 4f01401c00 Add a small amount of randomisation into the Zynq demo. 2014-02-11 11:37:42 +00:00
Richard Barry 0cc51d99a7 Add event groups demo to Zynq demo.
Add C implementations of some standard library functions to the Zynq demo to prevent the GCC libraries (which use floating point registers as scratch registers) being linked in.
2014-02-11 09:24:33 +00:00
Richard Barry 3eb212f454 Update IAR RL78 demo regtest tasks to make use of SKZ instructions as the latest IAR linker didn't seem to like the previous version. 2014-02-10 19:13:49 +00:00
Richard Barry 84f4ae9aa0 Make xTaskIsTaskSuspended() a private function as it should only be called from within critical sections.
Fix issue in and simplify the xTaskRemoveFromUnorderedEventList() function.  The function is new to the V8 release candidates so does not effect official released code.
2014-02-10 17:02:37 +00:00
Richard Barry eea669240b Remove inclusion of now removed header file from the RZ/IAR LowLevelInitialise.c file. 2014-02-10 14:22:19 +00:00
Richard Barry d4ca65f22f Third attempt: Improve how TimerDemo.c manages differences between the tick count and its own internal tick count, which can temporarily differ when the tick hook is called while the scheduler is suspended. 2014-02-10 14:21:17 +00:00
Richard Barry 660162a5b8 Update the Win32/MingW demo to match the latest Win32/MSVC demo. 2014-02-10 14:16:39 +00:00
Richard Barry d12ec14160 Add configCLEAR_TICK_INTERRUPT() to the IAR and RVDS Cortex-A9 ports.
Replace LDMFD with POP instructions in IAR and RVDS Cortex-A9 ports.
Replace branch to address with indirect branch and exchange to address in register in the IAR and RVDS Cortex-A9 ports.
2014-02-04 17:02:52 +00:00
Richard Barry 9a8da3ff38 Second attempt: Improve how TimerDemo.c manages differences between the tick count and its own internal tick count, which can temporarily differ when the tick hook is called while the scheduler is suspended. 2014-02-04 15:51:48 +00:00
Richard Barry 03f9bbda52 Improve how TimerDemo.c manages differences between the tick count and its own internal tick count, which can temporarily differ when the tick hook is called while the scheduler is suspended. 2014-02-04 14:55:53 +00:00
Richard Barry 481db56078 Related to Zynq demo: Remove compiler warnings when configASSERT() is not defined and set the type of the assembly functions to allow them to be called when the C code is compiled to THUMB instructions. 2014-02-04 14:53:17 +00:00
Richard Barry f843888e60 Complete GCC/Cortex-A9 port. 2014-02-04 14:49:48 +00:00
Richard Barry c83414ccc4 Finish the Zynq demo. 2014-02-03 17:39:45 +00:00
Richard Barry 2fc4e89b98 Add in interrupt nesting test. 2014-01-30 14:45:48 +00:00
Richard Barry d898d16c44 Check in working IntQueueTimer.c for Zynq before overhauling to ensure it conforms to the FreeRTOS style and coding standard. 2014-01-30 12:09:32 +00:00
Richard Barry 6c72f470ac Update Zynq serial.c to be interrupt driven. 2014-01-29 15:20:34 +00:00
Richard Barry d310ac4552 Add very basic serial CLI to the Zynq demo - needs a lot of tidy up yet! 2014-01-28 17:41:28 +00:00
Richard Barry 51ea2639a9 vQueueAddToRegistry() now takes a const char * instead of a char *.
tmrCOMMAND_CHANGE_PERIOD_FROM_ISR constant added for the "FromISR" version of the software timer change period API function.
2014-01-28 12:32:03 +00:00
Richard Barry 0bf2e615b2 Uncheck the "Do not search standard system directories for header files" compiler option in two RX600 project to ensure stdint.h can be found correctly. 2014-01-27 10:33:57 +00:00
Richard Barry 6130fec60e Introduce xTimerPendFunctionCall().
Change INCLUDE_xTimerPendFunctionCallFromISR to INCLUDE_xTimerPendFunctionCall
Update event group trace macros to match the new trace recorder code.
Ensure parameter name consistency by renaming any occurrences of xBlockTime and xBlockTimeTicks to xTicksToWait.
Continue work on GCC/RL78 port - still a work in progress.
Adjust how the critical section was used in xQueueAddToSet.
2014-01-25 17:01:41 +00:00
Richard Barry e4f495012f Fixes to FreeRTOS+UDP trace macro parameters and placements. 2014-01-25 09:50:28 +00:00
Richard Barry 888733ef79 Add main_full.c to Zynq demo. Still a work in progress. 2014-01-24 17:11:22 +00:00
Richard Barry b352be2e23 Tidy up GCC Cortex-A port layer - still a work in progress. 2014-01-24 17:09:31 +00:00
Richard Barry 14f895478d Continue work on GCC/Cortex-A port layer. 2014-01-24 13:27:56 +00:00
Richard Barry 4c9b5d88ae Continue Zynq demo - ParTest.c now working (with single LED), but still very much a work in progress. 2014-01-24 13:27:01 +00:00
Richard Barry 1e26b1875f Remove #error that attempted to catch stdint.h not being included.
Split the previously overloaded trmCOMMAND_nnn definitions into individual definitions to enable better logging.
2014-01-23 14:51:53 +00:00
Richard Barry d0323e67ae Continue working on GCC/CA_9 port layer - tick interrupt now working but needs tidy up. 2014-01-23 11:51:57 +00:00
Richard Barry 8cb6a4f032 Continue working on Zynq demo - tick interrupt now working but needs tidy up. 2014-01-23 11:50:48 +00:00
Richard Barry 371f6f359a Carry on working on the Zynq demo - still a work in progress. 2014-01-22 15:43:27 +00:00
Richard Barry 3e430b3801 Carry on working on the Cortex-A/GCC port layer - still a work in progress. 2014-01-22 15:39:58 +00:00
Richard Barry 33351b02c9 Beginnings of a project to build the GCC Cortex-A port targeting a Zynq. 2014-01-20 17:55:16 +00:00
Richard Barry 86023aa5a6 Beginnings of GCC Cortex-A port - not yet completely converted from IAR version. 2014-01-20 17:53:30 +00:00
Richard Barry d8c135e2dc Add extern 'C' to FreeRTOS.h.
Remove obsolete extern declaration of vTaskSwitchContext() from the MPX430X IAR portmacro.h (other older portmacro.h header files contain the same declaration).
2014-01-17 09:45:02 +00:00
Richard Barry a1b8079df1 Introduce configENABLE_BACKWARD_COMPATIBILITY to allow the #defines that provide backward compatibility with FreeRTOS version prior to V8 to be optionally omitted. 2014-01-13 20:26:47 +00:00
Richard Barry f01bf9fdc3 Add additional NOP after EINT instruction in MSP430 ports. 2014-01-10 10:38:02 +00:00
Richard Barry a20e75082e Remove obsolete OpenOCD driver. 2014-01-05 20:41:34 +00:00
Richard Barry 1aaa80fba6 Map portTICK_RATE_MS to portTICK_PERIOD_MS. 2014-01-05 20:40:55 +00:00
Richard Barry a56d4b998c Minor tidy ups that don't effect code generation, plus:
When a task is unblocked the need for a context switch is only signalled if the unblocked task has a priority higher than the currently running task, instead of higher than or equal to the priority of the currently running task.
2014-01-05 20:12:20 +00:00
Richard Barry 723682f1dd Minor comment corrections prior to tagging. 2013-12-31 21:30:30 +00:00
Richard Barry a8836b5c43 Change version numbers ready for V8.0.0 release candidate 1 tag. 2013-12-31 20:10:09 +00:00
Richard Barry a44a6fbaeb Add link to upgrading information. 2013-12-31 19:15:00 +00:00
Richard Barry 3705435417 Add the event group interrupt tests to the Win32 demo projects. 2013-12-31 19:10:11 +00:00
Richard Barry 8ae3d489fe Comment the event groups standard demo files. 2013-12-31 19:07:31 +00:00
Richard Barry 2aa19f1a14 Add xEventGroupClearBitsFromISR() and xEventGroupGetBitsFromISR() functions.
Move some types defines out of generic kernel headers into feature specific headers.
Convert the function prototype dypedefs to the new _t naming.
2013-12-31 16:45:49 +00:00
Richard Barry 38e7554138 Update FreeRTOS+ more demos that use FreeRTOS+CLI to remove casting to int8_t * from strings. 2013-12-30 19:32:29 +00:00
Richard Barry 31609c7c3e Update FreeRTOS+ demos that use FreeRTOS+CLI to remove casting to int8_t * from strings. 2013-12-30 16:07:34 +00:00
Richard Barry 42a2338f1c Update demos that use FreeRTOS+CLI to remove casting to int8_t * from strings. 2013-12-30 14:06:57 +00:00
Richard Barry e95b482f56 Minor updates to demo projects to ensure correct building with V8 rc1. 2013-12-30 11:24:34 +00:00
Richard Barry f9072e7bac Remove casting from definition of configMAX_PRIORITIES to allow its use in pre-processor defined conditional compilation. 2013-12-30 08:02:11 +00:00
Richard Barry e4965ca03c Minor updates to demo projects to ensure correct building with V8 rc1. 2013-12-30 07:54:46 +00:00
Richard Barry 2b6eb1c5ab Revert some library files back to using standard types as they are not FreeRTOS files. 2013-12-29 14:55:55 +00:00
Richard Barry b54158d1dc Replace use of legacy portTYPE macros from old demos and standard demo files. 2013-12-29 14:49:03 +00:00
Richard Barry 3e20aa7d60 Replace standard types with stdint.h types.
Replace #define types with typedefs.
Rename all typedefs to have a _t extension.
Add #defines to automatically convert old FreeRTOS specific types to their new names (with the _t).
2013-12-29 14:06:04 +00:00
Richard Barry f292243dcf Change 'signed char *pcTaskName) to 'char *pcTaskName' in vApplicationStackOverflowHook(). 2013-12-27 16:30:19 +00:00
Richard Barry 3517bbdcce Remove unnecessary 'signed char *' casts from strings that are now just plain char * types in the FreeRTOS-Plus directory. 2013-12-27 16:23:07 +00:00
Richard Barry 653fdb81d5 Continue to remove unnecessary 'signed char *' casts from strings that are now just plain char * types. 2013-12-27 15:49:59 +00:00
Richard Barry da93f1fc4b Start to remove unnecessary 'signed char *' casts from strings that are now just plain char * types. 2013-12-27 14:43:48 +00:00
Richard Barry b4116a7c7d Change the type used for strings and single characters from signed char to just char. 2013-12-27 12:10:23 +00:00
Richard Barry b3aa1e90ad Add additional const qualifiers. 2013-12-24 11:55:38 +00:00
Richard Barry 6179690dc9 Don't free xQueue->ucHead if it is NULL. 2013-12-24 10:47:52 +00:00
Richard Barry a3c2f45116 Move the event groups single tasks test out of the common demo file (they are now part of the module tests). 2013-12-23 18:13:29 +00:00
Richard Barry c861e3883d Add coverage test markers. 2013-12-23 18:11:15 +00:00
Richard Barry 64ad1c00b5 In process of module testing event_groups.c.
Introduce xPortRunning variable into Win32 simulator port layer.
Add port optimised task selection macro for the GCC Win32 port layer (the MSVC version has had one for a while).
Ensure the event list item value does not get modified by code in tasks.c (priority inheritance, or priority change) when it is in use by the event group implementation.
2013-12-23 16:02:03 +00:00
Richard Barry 0147415c40 Change some task priorities in the MingW simulator demo. 2013-12-20 11:35:16 +00:00
Richard Barry 39b2d049a6 Update GCC/Eclipse Win32 simulator port to make better use of Eclipse resource filters and match the functionality of the MSVC equivalent. 2013-12-19 13:40:37 +00:00
Richard Barry 4b2f9dad42 Force the SysTick clock bit to be set in Cortex-M3 and Cortex-M4F bits if configSYSTICK_CLOCK_HZ is not defined, otherwise leave the bit as it is found as the SysTick may use a divided clock. 2013-12-15 10:27:37 +00:00
Richard Barry 040a7c02df Change the configCPU_CLOCK_HZ setting in the SAM4E demo to use the SystemCoreClock variable. 2013-12-15 10:17:02 +00:00
Richard Barry a320d6dffd Update the ucQueueNumber member of the queue structure (used with FreeRTOS+Trace to be an unsigned portBASE_TYPE instead of an unsigned char. 2013-12-14 13:16:05 +00:00
Richard Barry c17c65fc09 Introduce prvResetNextTaskUnblockTime() to encapsulate functionality from various places in the code into a single function. 2013-12-13 10:35:11 +00:00
Richard Barry acad916453 Change the way one thread deletes another in the Windows simulator port (the way one thread deleted itself was already changed in a previous check-in).
Reset the expected block time variable when a task is suspended or deleted in case the value held in the variables was associated with the task just suspended or deleted.
2013-12-12 16:07:24 +00:00
Richard Barry 0d1e12522b Update Cortex-M3 and Cortex-M4F ports to allow the SysTick to be clocked at a different speed than the system clock (as is done in the recent STM32L demo. ).
Add additional asserts and isb instructions into the Cortex-M3 and Cortex-M4F ports.
2013-12-12 14:07:20 +00:00
Richard Barry 6b3393b4b6 Add trace macros into the event groups implementation.
Add a task pre-delete hook to allow the insertion of any port specific clean up when a task is deleted.
Increase use of 'const' qualifiers.
Add vPortCloseRunningThread() into the Win32 port layer to attempt to allow Windows threads to be closed more gracefully when a task deletes itself.
2013-12-12 10:19:07 +00:00
Richard Barry 0416289066 Comment typo correction only. 2013-12-11 17:56:07 +00:00
Richard Barry ed54bc497d Complete STM32L low power demo. 2013-12-11 11:35:03 +00:00
Richard Barry 4b655ac3bb Remove [unused] touch library files from the STM32L discovery demo. 2013-12-11 10:46:17 +00:00
Richard Barry 0028cc48c1 Remove unused files from STM32L discovery board demo directory structure and build. 2013-12-10 17:16:45 +00:00
Richard Barry 751103d848 Tidy up STM32L low power demo and add 'comprehensive demo' option. 2013-12-10 16:20:43 +00:00
Richard Barry 5638fe28a2 Remove duplication of comments at the top of the file. 2013-12-10 11:24:41 +00:00
Richard Barry 3d00d47239 STM32L discovery demo is now demonstrating three low power modes - still needs clean up. 2013-12-10 10:07:53 +00:00
Richard Barry 9001b7b77a Minor change to SAM4L_low_power_tick_management.c to ensure the alarm value cannot be set to zero. 2013-12-08 06:32:38 +00:00
Richard Barry e682aec507 Spelling corrections in comments only. 2013-11-28 13:24:05 +00:00
Richard Barry 00ad1a0200 Multiple tidy up, documentation corrections and typo corrections highlighted by Tamas Kleiber's diligent review. 2013-11-28 10:48:33 +00:00
Richard Barry 2e42d7690a Continue work on new event groups functionality - fixups required by test results. 2013-11-27 20:29:33 +00:00
Richard Barry d2c2e3ca68 Add additional asserts() to ensure certain operations are not performed when the scheduler is suspended.
Change the xBlockTime variables in event_groups.c/h to xTicksToWait to match the naming in other core FreeRTOS files.
2013-11-24 10:11:16 +00:00
Richard Barry 5037ecdc5c Checked in header file missed form previous checkin. 2013-11-22 11:05:24 +00:00
Richard Barry 9dc39ee2a7 Add additional event group tests - and update implementation as required by test results. 2013-11-22 10:58:25 +00:00
Richard Barry a22d5ff5a5 Add event groups test/demo tasks. 2013-11-21 22:08:06 +00:00
Richard Barry f54f21b8f6 Add event_groups.c and associated functions in other core files.
Added xTimerPendCallbackFromISR() to provide a centralised deferred interrupt handling mechanism.
Add xPortGetLowestEverFreeHeapSize() to heap_4.c.
2013-11-21 21:46:08 +00:00
Richard Barry faed443e82 Continue work on STM32L demo. 2013-11-21 16:08:11 +00:00
Richard Barry b89fd7c1e3 Add STM32L Discovery board project as a starting point to adapt to an RTOS demo. 2013-11-20 13:33:30 +00:00
Richard Barry 417c3d1054 Change backslashes to forward slashes for all PIC projects. 2013-11-18 16:00:27 +00:00
Richard Barry ad67be1577 Tidy up SAM4E NetworkInterface.c. 2013-11-17 22:19:54 +00:00
Richard Barry c6020ae8b4 Change conf_eth.h to provide additional Rx buffers in SAM4E demo. 2013-11-17 22:15:45 +00:00
Richard Barry fa002f7fdd Final tidy up before V7.6.0 zip file creation. 2013-11-17 15:46:08 +00:00
Richard Barry 8cd71348be Make SAM4E network driver a little more robust. 2013-11-17 15:42:08 +00:00
Richard Barry c2bfac68b3 Add link to documentation page inside main_full() of the SAM4E demo. 2013-11-17 15:40:56 +00:00
Richard Barry 0cbd5182a3 Add additional comments to SAM4E demo. 2013-11-17 14:14:22 +00:00
Richard Barry 6be1ffccfb Update version numbers in FreeRTOS-Plus demo files. 2013-11-17 14:12:41 +00:00
Richard Barry cbb14d30c5 Add basic SAM4E driver.
Add ipconfigETHERNET_DRIVER_ADDS_UDP_CHECKSUM, ipconfigETHERNET_DRIVER_ADDS_IP_CHECKSUM, ipconfigETHERNET_DRIVER_CHECKS_IP_CHECKSUM and ipconfigETHERNET_DRIVER_CHECKS_UDP_CHECKSUM definitions.
2013-11-17 14:09:17 +00:00
Richard Barry 0865907f3f Add graphics to the SAM4E demo. 2013-11-16 22:33:51 +00:00
Richard Barry 9e9f9f30b1 Add UDP related commands to SAM4E demo. 2013-11-16 19:19:18 +00:00
Richard Barry b690b26861 Add standard demo tasks to SAM4E demo. 2013-11-16 18:06:57 +00:00
Richard Barry dc2e20bb0a Add SAM4E-EK demo with UDP and CLI. Not yet complete. 2013-11-16 13:27:44 +00:00
Richard Barry a37b947615 Reorder the license text wording so the exception text is at the top rather than the bottom. 2013-11-12 17:26:08 +00:00
Richard Barry a2cfaa7cd9 Correct build of helper function for ports where the stack grows up. 2013-11-12 13:06:18 +00:00
Richard Barry 8320dfb885 Update the SAM4L low power demo to use the ASF enable/disable interrupts functions rather than manipulating the PIRMASK directly - and in so doing allow other ASF functions to be called with the interrupt enable bit nesting. 2013-11-11 14:49:36 +00:00
Richard Barry 0cd79ad81d Change version numbers in preparation for V7.6.0 release. 2013-11-08 11:47:35 +00:00
Richard Barry c44d12dadb Ensure the Win32 demo runs in co-operative mode. 2013-11-08 10:11:46 +00:00
Richard Barry b1b4b15353 Add configASSERT()s to ensure counting semaphores are not created with a max count of zero or an initial count greater than the max count. 2013-11-07 16:45:30 +00:00
Richard Barry b181a3af99 Ensure the definition of prvTaskExitError()does not result in a compiler warning in ports where its use can be overridden (GCC Cortex-M ports).
Remove duplicate save/restore of r14 in Cortex-M4F ports.
2013-11-07 16:43:54 +00:00
Richard Barry 20eb03ed7d Change behaviour when configUSE_PREEMPTION is 0 (preemption is turned off). See the change history in the next release for details.
Remove an erroneous const in the prototype of queue receive/peek functions.
2013-11-07 14:58:14 +00:00
Richard Barry 30bc6c01a9 Add ehb instructions back into PIC32 port layer (upon advice).
Add configCLEAR_TICK_TIMER_INTERRUPT into PIC32 port layer to allow the timer configuration to be changed without any edits to the port layer being required.
Add prvTaskExitError() into the PIC32 port layer to trap tasks that attempt to exit from their implementing function.
Provide the ability to trap interrupt stack overflows in the PIC32 port.
Radically improve the timing in the Win32 simulator port layer.
2013-11-07 14:16:32 +00:00
Richard Barry 40d2e74417 Update some standard demo task implementations so they can be used with the cooperative scheduler. 2013-11-07 14:04:05 +00:00
Richard Barry 5aabe4f8fb Update semtest.c to use xSemaphoreCreateBinary() in place of vSemaphoreCreateBinary. 2013-11-07 11:11:18 +00:00
Richard Barry dcf261a3e6 Add xSemaphoreCreateBinary() so vSemaphoreCreate() can be deprecated. 2013-11-07 10:53:23 +00:00
Richard Barry ca2191c6ee Ensure PIC32MX MPLAB 8 project builds with XC. 2013-11-07 10:16:15 +00:00
Richard Barry 9a0f2bda55 Update PIC32 MPLAB8 project so it builds with the new partest file names. 2013-11-07 10:11:06 +00:00
Richard Barry 1b7a2e40a3 Update PIC32MX demo:
Change configCHECK_FOR_STACK_OVERFLOW to 3 to also check the interrupt stack.
Add a build configuration to allow use on the PIC32 USBII starter kit.
Increase some delays when talking to the LCD to ensure it always displays correctly.
Rewrite the register test tasks.
2013-11-07 09:54:13 +00:00
Richard Barry 2ee43fbc64 Set the MSVC Win32 demo back to create the simply blinky demo by default.
Set the MingW Wind32 demo back to include the #error to remind people to run the CreateProjectDirectoryStructure batch file.
2013-10-29 12:40:12 +00:00
Richard Barry 73df0ffdff Update the Eclipse/MingW project to account for the new Win32 simulator port layer (which has better timing). 2013-10-29 12:32:04 +00:00
Richard Barry 6642926d43 Update the FreeRTOS+ Win32 MSVC demos to account for the changes to the Win32 port layer (more accurate timing). 2013-10-29 11:43:41 +00:00
Richard Barry 15d10ce094 Update the main Win32 MSVC demo to account for the changes to the Win32 port layer (more accurate timing). 2013-10-29 11:14:54 +00:00
Richard Barry aa9ec31ba9 Add missing header file to the UDP BufferAllocation_1.c scheme. 2013-10-26 13:34:50 +00:00
Richard Barry e46fe7c049 Second attempt - Ensure the private port number wrap check is inside the critical section in prvGetPrivatePortNumber() (UDP). 2013-10-23 13:59:51 +00:00
Richard Barry 818abc468d Ensure the private port number wrap check is inside the critical section in prvGetPrivatePortNumber() (UDP).
Add missing default values for some of the trace macros.
2013-10-23 10:28:17 +00:00
Richard Barry 63bd3ebbef Remove the SVC handler from the XMC1000 demo as it is no longer used by the Cortex-M0 port layer. 2013-10-22 11:27:43 +00:00
Richard Barry dcd261bb8b Update the Keil and IAR CM0 port layers to match the changes made to the GCC version. 2013-10-22 11:26:16 +00:00
Richard Barry 7bcbef721b Remove the SVC handler from the SAMD20 FreeRTOSConfig.h as the GCC Cortex-M0 port no longer uses it. 2013-10-22 10:58:23 +00:00
Richard Barry 41fe693968 Improve how the scheduler is started in the GCC Cortex-M0 port. 2013-10-22 09:50:20 +00:00
Richard Barry f64acd6a48 Added an additional configASSERT() to test the new eTaskGetState() behaviour (see previous checking comment). 2013-10-22 09:33:49 +00:00
Richard Barry 25bab250b6 Added a little intelligence to eTaskGetState() so it can distinguish between a suspended task and a task that is indefinitely blocked on an event. 2013-10-22 09:30:58 +00:00
Richard Barry bafda11518 Remove maths library dependency form SAMD20 project. 2013-10-14 20:12:48 +00:00
Richard Barry a12ea2d212 Update FreeRTOS version number to V7.5.3
Update FreeRTOS+CLI version number to V1.0.2
Update FreeRTOS+UDP version number to V1.0.1
2013-10-14 19:56:47 +00:00
Richard Barry 6280324778 Add a configASSERT() that checks the gateway address is on the same subnet as the device in FreeRTOS+UDP. 2013-10-14 14:35:53 +00:00
Richard Barry 94607d83f9 Add workaround to XMC4000 silicon bug to Tasking Cortex-M4F port layer. 2013-10-14 14:03:05 +00:00
Richard Barry c1353bb12d Complete XMC4000 Tasking project. 2013-10-14 13:46:47 +00:00
Richard Barry b887737c34 Fix broken link in Atmel Studio SAMD20 project. 2013-10-12 10:09:10 +00:00
Richard Barry c09f6e6a9b Increase minimal stack size for the SAMD20 demo. 2013-10-09 18:46:08 +00:00
Richard Barry dcea05a81c Complete tidy up of SAMD20 demo. 2013-10-09 13:26:34 +00:00
Richard Barry 41a1dc62b7 Complete SAMD20 demo - still needs tidy up.
Add comments to the XMC1000 reg test files.
2013-10-08 15:56:06 +00:00
Richard Barry 0c56f5018d Add some defensive programming in the default tickless mode in case the application supplied post tick hook takes a long time to complete. 2013-10-08 12:33:46 +00:00
Richard Barry aedf7824cb Introduce the prvTaskExitError() function for all ARM_CMn ports.
Introduce the configTASK_RETURN_ADDRESS macro for the GCC ARM_CMn ports.
Improve time slippage penalty when entering tickless mode is abandoned.
2013-10-08 11:30:40 +00:00
Richard Barry 81e141ad86 Ensure the statically configured gateway address is on the same subnet. 2013-10-08 09:08:29 +00:00
Richard Barry e2afb24747 Take out nonsensical #if configMAC_INTERRUPT_PRIORITY > configMAC_INTERRUPT_PRIORITY check from the LPC18xx Ethernet driver. 2013-10-07 20:17:28 +00:00
Richard Barry 0c849fa597 Update FreeRTOS_FD_SET() to check there is enough space in the queue before adding the socket to the socket set. 2013-10-07 20:13:02 +00:00
Richard Barry 10fa546e60 Make corrections to the interrupt priority configuration in the LPC1800 UDP demo that resulted from an incorrect NVIC_PRIOR_BITS setting in the LPC18xx.h header file. 2013-10-07 16:49:31 +00:00
Richard Barry eaacbb099a Clear up a few compiler warnings.
Correct header comments in the UARTCommandConsole.c file used in the SmartFusion2 demo.
Exercise the new xQueueSpacesAvailable() function in the MSVC demo.
Add defaults for the new traceMALLOC and traceFREE trace macros.
Catch tasks trying to exit their functions in the Cortex-M0 ports.
Add additional comments to timers.c in response to a support forum question.
Initialise _impure_ptr prior to the first task being started.
Prior to V7.5.0 a yield pended in the tick hook would have occurred during the same tick interrupt.  Return pdTRUE from xTaskIncrementTick() if a yield is pending to revert to that behaviour.
2013-10-07 12:06:17 +00:00
Richard Barry be44f8aaa7 Improve DCHP handling by removing the yiaddr field from outgoing DHCP packets and adding the broadcast bit in the flags field.
Correct the check to ensure the application network event hook is not called when the first network down event is sent.
Add in defaults for the Nabto task stack and priority.
2013-10-07 11:49:17 +00:00
Richard Barry 7ec4773131 Add traceMALLOC() and traceFREE() macros. 2013-10-04 20:56:45 +00:00
Richard Barry 23fa077241 Complete CLI demo on SAMD20. 2013-10-03 15:41:33 +00:00
Richard Barry 8ffa1b1736 Get CLI functioning in SAMD20 demo. 2013-10-02 14:24:38 +00:00
Richard Barry 013a3ef944 Starting point for the SAMD20 demo. 2013-10-02 10:41:40 +00:00
Richard Barry 111283a9b2 Finalise XMC4000 GCC demos. 2013-10-01 12:47:27 +00:00
Richard Barry 0185643b39 Finalise XMC4000 IAR demos. 2013-10-01 10:10:15 +00:00
Richard Barry 1e248417bc Finalise XMC4000 Keil demos. 2013-10-01 09:53:12 +00:00
Richard Barry db1a5f1553 Add the configUSE_STATS_FORMATTING_FUNCTIONS parameter to a couple of FreeRTOSConfig.h header files that got missed out when the parameter was introduced. 2013-09-17 09:48:51 +00:00
Richard Barry 988b0c1678 Remove the math library as a build dependency in the SAM4L demo. 2013-09-17 09:05:31 +00:00
Richard Barry e3b5f36c3a Move the #error message about running the CreateProjectDirectoryStructure batch file from FreeRTOSConfig.h to main.c so it shows when the batch file has not been executed (XMC4000 Dave and Tasking projects). 2013-09-10 13:58:09 +00:00
Richard Barry 1902d2b64a Add the uxQueueSpacesAvailable() API function.
Move a configASSERT() call in timers.c to prevent a "condition is always true" compiler warning.
2013-09-10 13:19:12 +00:00
Richard Barry dd3fdfa9ff Make self monitoring in QueueSet.c more robust to prevent false positives. 2013-09-10 13:09:14 +00:00
Richard Barry c63a81af99 Enable RX62N_RDK project to build with the blink configuration. 2013-09-10 13:05:00 +00:00
Richard Barry 49c602f3df Add #error into Tasking project to remind users that they need to run the CreateProjectDirectoryStructure batch file. 2013-09-10 13:03:35 +00:00
Richard Barry ae402434f8 Update Keil XMC1000 to later version. 2013-09-10 13:01:48 +00:00
Richard Barry 0e28ee90b6 Finalise XMC1000 GCC demos. 2013-09-10 12:54:15 +00:00
Richard Barry 42c0ae6bc8 Finalise XMC1000 IAR demos. 2013-09-10 12:24:55 +00:00
Richard Barry a3095b89af Finalise XMC1000 Keil demos. 2013-09-10 11:35:31 +00:00
Richard Barry 8282cc0491 Finalise XMC4000 Dave/GCC demos. 2013-09-09 16:51:19 +00:00
Richard Barry 577ff0741d Finalise XMC4000 Keil demos. 2013-09-09 16:21:46 +00:00
Richard Barry a0a96e52f2 Finalise XMC4000 IAR demos. 2013-09-09 15:55:14 +00:00
Richard Barry 41f92ced65 Add build configurations for the XMC4400 and XMC4200 to the Tasking demo project. 2013-09-05 12:00:04 +00:00
Richard Barry 77d817ffaa Update XMC4000 tasking project to use latest system files. 2013-09-05 11:37:44 +00:00
Richard Barry 7d92a29d2d Rename directories with XMC4500 in their name that now contain XMC4200 and XMC4000 build configurations to instead say XMC4000. 2013-09-04 16:06:23 +00:00
Richard Barry 117235c08a Rename directories with XMC4500 in their name that now contain XMC4200 and XMC4000 build configurations to instead say XMC4000. 2013-09-04 16:03:31 +00:00
Richard Barry d8963209c2 Reworked XMC4500 IAR project to use latest system files and include build configurations for the XMC4200 and XMC4400 parts. 2013-09-04 15:44:48 +00:00
Richard Barry aaf2d32011 Add XMC4200 and XMC4400 build configurations to the XMC4000 Dave project. 2013-09-04 14:22:45 +00:00
Richard Barry 6acac72ff1 Add Dave project for the XMC4500. 2013-09-04 10:43:31 +00:00
Richard Barry d1d925ab36 Update the Keil XMC4500 demo project to include build configurations for the XMC4200 and XMC4400 application boards. 2013-09-03 15:26:05 +00:00
Richard Barry 18c4f8e622 Make the QueueSet.c standard demo task a little friendlier to lower priority tasks.
Allow the priority of the controlling task in the recmutex.c standard demo tasks to be overridden by a setting in FreeRTOSConfig.h.
2013-09-02 16:37:56 +00:00
Richard Barry a8c2c6b3b6 Add a build configuration for the XMC1100 boot kit. 2013-09-02 16:35:54 +00:00
Richard Barry 05e0c59da8 Update RX600/Renesas compiler build configurations to use the latest compiler version. 2013-09-02 16:06:07 +00:00
Richard Barry 316b731fe9 Update RX600 blinky build configuration to include missing linker section. 2013-09-02 15:50:44 +00:00
Richard Barry b79d3de952 Continue work on XMC1000 demos. 2013-09-01 20:06:31 +00:00
Richard Barry 73606369c4 Make Cortex-M0 set/clear interrupt flag from ISR functions nestable.
Don't reset the stack location when starting the scheduler in Cortex-M0 ports as the vector offset register is not implemented and XMC1000 devices have their application vector address somewhere other than 0x00.
2013-09-01 19:53:24 +00:00
Richard Barry ed399e801e Add additional configASSERTS() to some standard demo tasks.
Use own rand() function in QueueSet.c to prevent library versions being referenced.
2013-09-01 19:45:06 +00:00
Richard Barry 33bd63e287 Rename CORTEX_M)_Infineion_Boot_Kits_IAR_Keil to CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC as it now contains projects for all three compilers. 2013-08-31 16:03:11 +00:00
Richard Barry 245ff12be8 Add a GCC project to the the XMC1000 demo directory. 2013-08-31 15:57:31 +00:00
Richard Barry f9e024d7ea Move files common to IAR and Keil projects from compiler specific directories under the XMC demo directory into the XMC demo directory itself. 2013-08-31 14:36:32 +00:00
Richard Barry 9ad0c17281 Continue work on Get clock settings in Keil and IAR XMC1000 demo working. 2013-08-31 12:43:52 +00:00
Richard Barry 710a652daf Continue work on XCM1200 Keil demo. 2013-08-30 18:05:16 +00:00
Richard Barry f0a2688200 Create full Keil project for XMC boot kit (not yet tested). 2013-08-25 17:07:56 +00:00
Richard Barry 3fe6974bf9 Starting point for XMC1000 Keil demo. 2013-08-25 01:03:56 +00:00
Richard Barry 574f5044a6 Starting point for Keil Cortex-M0 port. 2013-08-25 01:01:18 +00:00
Richard Barry 747a0e15fa Convert double quotes in a command help string to single quotes to allow the string to be processed by Javascript. 2013-08-16 13:34:28 +00:00
Richard Barry c40370e96a Fix a few typos and remove the "register" keyword. 2013-08-16 13:31:54 +00:00
Richard Barry 63e8044d33 Allow compilation when portALT_GET_RUN_TIME_COUNTER_VALUE() is defined. 2013-08-14 08:35:40 +00:00
Richard Barry dac40d1677 Update version numbers. 2013-07-24 10:02:19 +00:00
Richard Barry 2f754d9b0c Add additional critical section to the default tickless implementations.
Update version number for maintenance release.
2013-07-24 09:45:17 +00:00
Richard Barry 3cbe0a724d Update version number. 2013-07-23 10:51:45 +00:00
Richard Barry 8ceb665994 Void a few unused return values and make casting more C++ friendly. 2013-07-23 09:53:24 +00:00
Richard Barry bb2093cf5d Update the header file included in the PIC32 port_asm.S file to use the header for the latest compiler version. 2013-07-23 09:50:06 +00:00
Richard Barry 679a3c670c Update the Cortex-M vPortValidateInterruptPriority() implementation to ensure compatibility with the STM32 standard peripheral library. 2013-07-23 09:44:00 +00:00
Richard Barry f522d6a2da Remove duplicate definition from FreeRTOSConfig.h. 2013-07-23 09:36:30 +00:00
Richard Barry 9054485f1a Tidy up pre-processor as final act before tagging as V7.5.0 2013-07-19 10:22:47 +00:00
Richard Barry 08057fa77f Changes to comments only. 2013-07-19 09:16:36 +00:00
Richard Barry 203ae64600 Rename xTaskGetSystemState() uxTaskGetSystemState(). 2013-07-18 14:41:15 +00:00
Richard Barry 92fae7d262 For consistency change the name of configINCLUDE_STATS_FORMATTING_FUNCTIONS to configUSE_STATS_FORMATTING_FUNCTIONS. 2013-07-18 11:40:32 +00:00
Richard Barry 7d6758ee1a Minor updates and change version number for V7.5.0 release. 2013-07-17 18:32:57 +00:00
Richard Barry d04c2fa753 Correct compiler warnings in trace recorder code. 2013-07-16 12:23:25 +00:00
Richard Barry 4578154959 Remove large and unnecessary .docx files. 2013-07-16 12:01:11 +00:00
Richard Barry 0fd81d6d8e Update FreeRTOS+Trace recorder code. 2013-07-16 11:55:14 +00:00
Richard Barry 7d1292ced2 Linting and MISRA checking 2013-07-15 14:27:15 +00:00
Richard Barry e83b93f5fc Tidy up comments only. 2013-07-14 13:09:18 +00:00
Richard Barry ce9c3b7413 Variable name change in the PIC32 port layer only. 2013-07-14 13:06:17 +00:00
Richard Barry 14a190e79e Update PIC32 serial.c slightly to add volatile qualifier and update to coding standard. 2013-07-14 08:46:15 +00:00
Richard Barry 1e17924fa8 Update doxygen comments. 2013-07-13 19:58:42 +00:00
Richard Barry a6db135add Fix compiler warning. 2013-07-13 19:39:07 +00:00
Richard Barry da0fff63c9 Update Cortex-M MPU version to include new API functions. 2013-07-13 19:37:35 +00:00
Richard Barry e5d9640863 Update RX ports to only include additional check on the existing IPL (so it is not lowered) if configASSERT() is defined. 2013-07-13 11:31:35 +00:00
Richard Barry 4b964814de Implement portASSERT_IF_INTERRUPT_PRIORITY_INVALID() for PIC32. 2013-07-12 19:25:21 +00:00
Richard Barry 25310a6796 Update compiler version and add configASSERT() to PIC32 MPLAB X project. 2013-07-12 19:21:10 +00:00
Richard Barry ad8fa53043 Kernel optimisations. 2013-07-12 11:11:19 +00:00
Richard Barry c9d9bddc3c Add comments to the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() calls in the core queue.c and tasks.c files. 2013-07-11 10:52:43 +00:00
Richard Barry 5d902f2b9c Complete additions of portASSERT_IF_INTERRUPT_PRIORITY_INVALID() for all RX compiler ports. 2013-07-11 10:05:06 +00:00
Richard Barry 18caebf1d1 Remove commented out code. 2013-07-10 13:26:00 +00:00
Richard Barry 65704174c9 Add portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to the RX ports that use the Renesas compiler.
Add portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to the Cortex-A9 ports.
2013-07-09 17:57:59 +00:00
Richard Barry 0f6b0d3a59 Enhance heap_4.c to prevent blocks accidentally being freed twice, or blocks that don't have a valid block link descriptor being freed.
Update the Cortex-A9 port to include asserts if an ISR safe FreeRTOS function is called from an interrupt that has a higher logical priority than configMAX_SYSCALL_INTERRUPT_PRIORITY (or whatever the CA9 equivalent is called), and also assert if the binary point is not set correctly.
2013-07-09 12:49:49 +00:00
Richard Barry 4894955a08 Correct comment only. 2013-07-04 16:05:27 +00:00
Richard Barry c4eef61d39 Added portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to Cortex-M3 and Cortex-M4F ports. 2013-07-04 11:20:28 +00:00
Richard Barry b521d70e7e Remove compiler warnings. 2013-07-02 12:39:16 +00:00
Richard Barry 019c6417d7 Remove compiler warnings. 2013-07-02 12:36:24 +00:00
Richard Barry 5ad3b59783 Add the new configINCLUDE_STATS_FORMATTING_FUNCTIONS configuration parameter to FreeRTOS+ demo applications that make use of vTaskStats() or vTaskGetRunTimeStats(). 2013-07-02 12:17:26 +00:00
Richard Barry 2c242cdf78 Add the new configINCLUDE_STATS_FORMATTING_FUNCTIONS configuration parameter to FreeRTOS demo application that make use of vTaskStats() or vTaskGetRunTimeStats(). 2013-07-02 12:14:49 +00:00
Richard Barry c1b4fc58d2 Add new xTaskGetSystemState() API function to return raw data on each task in the system.
Relegate the vTaskList() and vTaskGetRunTimeStats() functions to "sample" functions demonstrating how to use xTaskGetSystemState() to generate human readable status information.
Introduce and default configINCLUDE_STATS_FORMATTING_FUNCTIONS which must now be defined to use vTaskList() and vTaskGetRunTimeStats().
2013-07-02 12:10:16 +00:00
Richard Barry 877ce218a4 Add additional comment only. 2013-07-01 09:05:15 +00:00
Richard Barry 625b1a7159 Add the queue overwrite demo to the RZ demo. 2013-07-01 08:49:20 +00:00
Richard Barry 0c0b54c175 Refine the default tickless idle implementation in the Cortex-M3 port layers. 2013-06-30 10:38:31 +00:00
Richard Barry 08ca5dead5 Update Win32 MSVC demo to include a simple blinky build option. The demo as it was is now the "full/comprehensive" build option. 2013-06-28 10:46:29 +00:00
Richard Barry b8a219b30c Update QueueOverwrite.c to include a call to xQueuePeekFromISR().
Default new QueuePeekFromISR() trace macros.
2013-06-28 09:21:39 +00:00
Richard Barry 3b02b4c8f8 Add xQueueOverwriteFromISR() and update the QueueOverwrite.c to demonstrate its use. 2013-06-27 14:25:17 +00:00
Richard Barry 671949ad78 Add xQueueOverwrite() and a common demo task to demonstrate its use.
Update MSVC Win32 demo to include the xQueueOverwrite() common demo tasks.
2013-06-27 09:21:43 +00:00
Richard Barry 59f75a12f6 Add Newlib reent support. 2013-06-26 11:37:08 +00:00
Richard Barry 4444b4ee68 Improve efficiency and behaviour of vListInsertEnd(). 2013-06-26 08:58:01 +00:00
Richard Barry f11635ed91 Remove reliance on strncpy() function. 2013-06-25 14:03:02 +00:00
Richard Barry a7c47131fa Remove portALIGNMENT_ASSERT_pxCurrentTCB() macro, which serves no purpose. 2013-06-25 13:39:50 +00:00
Richard Barry 6cbbfd2eb5 Slight correction to coding standard in heap_2.c and heap_4.c. 2013-06-25 13:25:08 +00:00
Richard Barry fb47260e80 Improve efficiency of memory allocation when the memory block is already aligned correctly. 2013-06-25 12:20:29 +00:00
Richard Barry 87049ac37c Re-implement the LPC18xx and SmartFusion2 run time stats implementation to use the free running Cortex-M cycle counter in place of the systick.
Correct the run-time stats counter implementation in the RZ demo.
Guard against run time counters going backwards in tasks.c.
2013-06-25 10:44:44 +00:00
Richard Barry cdae14a8cb Replace the #define that maps the uxRecursiveCallCount to the pcReadFrom pointer with a union - although this is against the coding standard it seemed the best way of ensuring complete adherence to the C standard and allow correct builds with LLVM when the optimiser is on. 2013-06-24 12:20:00 +00:00
Richard Barry 00136d4b51 Update trace recorder code in the LPC18xx project. 2013-06-23 21:11:37 +00:00
Richard Barry d8248c49fc Remove old trace recorder source from LPC18xx project. 2013-06-23 20:38:17 +00:00
Richard Barry 0ca2110982 Split the LPC18xx FreeRTOS+UDP drivers between those that use the LPCOpen library and those that use the older CMSIS library. 2013-06-23 20:33:43 +00:00
Richard Barry a1145a1b78 Remove DemoIPTrace.h from LPC18xx demo as it should be copied from is standard location. 2013-06-23 19:00:14 +00:00
Richard Barry 34e7cfc2a2 Back out changes to LPC18xx UDP demo. 2013-06-23 08:00:39 +00:00
Richard Barry e6903dac61 Add extra debug comment into list.c. 2013-06-23 07:27:46 +00:00
Richard Barry 1cfb7b77e5 Add retarget.c to RVDS project to ensure semihosting is not used. 2013-06-20 14:59:11 +00:00
Richard Barry 3a507bdc0c Add missing function prototype. 2013-06-20 14:57:44 +00:00
Richard Barry c3f9e3c5ff Update RVDS port layer to match IAR port layer. 2013-06-20 14:56:40 +00:00
Richard Barry 018f0f602a RZ RVDS and IAR projects. 2013-06-20 12:49:53 +00:00
Richard Barry 5013baa2cd RVDS ARM Cortex-A port layer. 2013-06-20 12:47:21 +00:00
Richard Barry 04dafed839 IAR ARM Cortex-A port layer. 2013-06-20 12:20:40 +00:00
Richard Barry 2fd431e971 Modify the GCC/AVR port to make use of the xTaskIncrementTick return value.
Add pre-processor directives in the dsPIC and PIC24 port layers that allows both port files to be included in the same project.
2013-06-11 20:15:15 +00:00
Richard Barry 3aad6381e1 Update RX100 project to e2studio V2 format. 2013-06-11 20:11:29 +00:00
Richard Barry f038fd6a86 Improve the error detection in some of the standard demo tasks. 2013-06-11 18:46:00 +00:00
Richard Barry 3b004f9900 Add the APPLICATION_DEFINED port type to the trcHardwarePort.h template. 2013-06-11 16:11:21 +00:00
Richard Barry 62c0ae0926 Update port layers to make better use of the xTaskIncrementTick() return value. 2013-06-08 18:36:25 +00:00
Richard Barry c75c01ffdf Check in implementation of xTaskIncrementTick (replaced vTaskIncrementTick()). 2013-06-08 18:30:52 +00:00
Richard Barry c9b30b9fe7 Add MPLAB X project for PIC24.
Remove PIC24 demo warnings when XC16 is used as the compiler.
2013-06-08 18:19:50 +00:00
Richard Barry 2089f31f18 Update include paths in Rowley MSP430 project file. 2013-06-07 19:24:10 +00:00
Richard Barry a1ef5d6fa9 Add UV4 project to old RVDS LPC2129 UV2 directory. 2013-06-07 15:23:34 +00:00
Richard Barry 59a834eb86 Update ports that have their tick configuration in an application callback to use xTaskIncrementTick() in place of vTaskIncrementTick(). 2013-06-07 12:39:56 +00:00
Richard Barry c04b074707 Convert the remaining ports to use xTaskIncrementTick() in place of vTaskIncremenTick(). 2013-06-07 12:16:58 +00:00
Richard Barry 2fc9d033c6 Update the PIC32 port to use xTaskIncrementTick() and change the macro used to detect if XC is being used. 2013-06-07 11:15:43 +00:00
Richard Barry 51d9ee0c1c Add configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS mechanism to the relevant port.c file to allow the user to define functions that will execute in privileged mode. 2013-06-07 09:45:34 +00:00
Richard Barry 29ca4f1b36 Ensure queue functions go into the privileged code section when the MPU version is in use.
Provide a default value for configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS.
Revert prvQueueUnregisterQueue() back to a public function.
2013-06-07 09:41:15 +00:00
Richard Barry 0f3ae55e5d Add configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS mechanism to allow the user to define functions that will execute in privileged mode.
Update the Rowley MPU demo to use a version of debug_printf that runs in privileged mode to get around the problem of the RAM it uses not being under the control of the kernel.
2013-06-07 09:37:18 +00:00
Richard Barry f904d26957 Convert more ports to use xTaskIncrementTick() in place of vTaskIncrementTick(). 2013-06-06 16:31:15 +00:00
Richard Barry 15ec6c87f7 Convert mpre ports to use xTaskIncrementTick() in place of vTaskIncrementTick(). 2013-06-06 16:06:48 +00:00
Richard Barry 686d190798 Convert some ports to use xTaskIncrementTick() in place of vTaskIncrementTick().
Move DSB instructions to before WFI instructions in line with ARM recommendations.
2013-06-06 15:46:40 +00:00
Richard Barry 4e9374ad90 Add default value for configUSE_TIME_SLICING 2013-06-06 14:56:47 +00:00
Richard Barry 06953169ba Update RM48/TMS570 port to use xTaskIncrementTick in place of vTaskIncrementTick. 2013-06-06 13:06:24 +00:00
Richard Barry 0673f63e8d Ensure RM48 demo compiles in co-operative mode. 2013-06-06 12:54:00 +00:00
Richard Barry 66734268f5 Update SAM4L_low_power_tick_management.c to use xTaskIncrementTick() in place of vTaskIncrementTick(). 2013-06-06 11:26:15 +00:00
Richard Barry 2e5d812022 Tidy up the comments and use of static function prototypes in the SAM4L_low_power_tick_management.c implementation. 2013-06-06 11:19:32 +00:00
Richard Barry 3fbee4f0a8 Place DSB instruction before WFI instruction in EFMG890F128 demo. 2013-06-06 11:15:08 +00:00
Richard Barry 64bd0689c7 Update the standard Win32 demo to use the latest version of the trace recorder code. 2013-06-05 16:26:04 +00:00
Richard Barry 6330e06975 Remove compiler warnings from the trace recorder code. 2013-06-05 15:25:26 +00:00
Richard Barry 6438027bb9 Update the FreeRTOS_Plus_CLI_with_Trace_Windows_Simulator demo to use the latest version of the trace recorder code. 2013-06-05 15:24:12 +00:00
Richard Barry f928b0e296 Update to latest FreeRTOS+Trace recorder code. 2013-06-05 13:38:56 +00:00
Richard Barry f9d0a153b4 Update the FreeRTOS+UDP LPC18xx MAC driver to use the LPCOpen drivers. 2013-06-03 20:27:46 +00:00
Richard Barry 54c62d429f Update LPC18xx FreeRTOS+UDP demo to use LPCOpen USB and Ethernet drivers.
Update LPC18xx FreeRTOS+UDP eclipse project to use linked resources rather than a CreateProjectDirectoryStructure.bat batch file.
2013-06-03 20:21:38 +00:00
Richard Barry 0158039f99 Slight modification to license blub text in header comments. 2013-05-21 14:14:03 +00:00
Richard Barry fda145278e Remove the Chan FATfs code as FreeRTOS now ships with a proprietary file system. 2013-05-19 10:36:04 +00:00
Richard Barry 2c562bd3d7 Ensure a queue or semaphore that is not empty cannot be added to a queue set. 2013-05-19 10:11:10 +00:00
Richard Barry bb7b711ca9 Update the code that generates the run time stats strings so the pcStatsString[] array is not required. 2013-05-19 09:56:47 +00:00
Richard Barry a03b171992 Fix compiler warning in psp_test.c when compiled with ARM compiler.
Add portYIELD_FROM_ISR() macros to Cortex-M ports.  The new macro just calls the exiting portEND_SWITCHING_ISR() macro.
Remove code from the MSVC port layer that was left over from a previous implementation and become obsolete.
2013-05-19 09:43:00 +00:00
Richard Barry 9b153b3e06 Ensure the SmartFusion2 interrupt driven UART drivers are not passed a zero length buffer. 2013-05-14 13:22:37 +00:00
Richard Barry 94f178c8d1 Move SmartFusion configuration options into FreeRTOSConfig.h. 2013-05-13 10:51:31 +00:00
Richard Barry 5c5c1c406d Rename the SmartFusion2 demo directory. 2013-05-13 09:26:39 +00:00
Richard Barry 961928b0f9 Combine the SmartFusion2 starter kit and development kits demos into a single directory. 2013-05-13 09:06:50 +00:00
Richard Barry 82995fd4fd Update SmartFustion2 starter kit partest.c. 2013-05-12 20:24:42 +00:00
Richard Barry 4d966adc8b Add SmartFusion2 demo for the SmartFustion2 development kit. 2013-05-12 20:07:49 +00:00
Richard Barry 063c05ccad Convert SmartFusion2 CLI to use the interrupt UART driver functions instead of the polled UART driver functions. 2013-05-12 13:02:16 +00:00
Richard Barry 5ff880fee8 SmartFusion2 CLI working with polled UART, about to convert to interrupt driven UART. 2013-05-10 18:47:43 +00:00
Richard Barry 8732e8efc5 Minor cosmetics to comments. 2013-05-09 10:15:52 +00:00
Richard Barry fb9662009a Update comments in Atmel Studio CreateProjectDirectoryStructure.bat files to remove references to replace references to Eclipse with references to Atmel Studio.
Update the tickless idle implementations that use up counters for tick interrupt generate to ensure they remain in low power mode for the desired time instead of one tick less than the desired time.
2013-05-09 09:56:04 +00:00
Richard Barry e08966c7e8 Update flop.c and FreeRTOS.h to include a macro (and a default null implementation of the macro) that enables the flop tasks to register their need for a floating point context with the kernel. 2013-05-09 09:52:34 +00:00
Richard Barry b4efc0439f Update Win32 simulator so it references the FreeRTOS+Trace code from the updated FreeRTOS+ directory structure. 2013-05-09 09:50:40 +00:00
Richard Barry 410f5d45eb SmartFusion2: Change linker file to run from NVM. Add in FreeRTOS+CLI and FreeRTOS+FAT SL demo. 2013-05-07 08:46:24 +00:00
Richard Barry e3a868ca58 Blinky and full demos working on SmartFusion2. 2013-05-06 09:18:00 +00:00
Richard Barry b8d265f57f Starting point for SmartFustion2 starter kit demo. 2013-05-05 13:33:55 +00:00
Richard Barry 39147e83a0 Update version numbers in a couple of files that got left behind. 2013-05-01 09:19:09 +00:00
Richard Barry 96ceae8edd Update version number ready to release the FAT file system demo. 2013-04-30 21:42:41 +00:00
Richard Barry a4a830c44d Add FAT SL code and demo project. 2013-04-30 20:37:52 +00:00
Richard Barry bbe48d31a4 Clarify license blurb at the top of the FreeRTOS+UDP and FreeRTOS+CLI source files. 2013-04-30 20:23:06 +00:00
Richard Barry fbadf8bee7 Add quick start guide. 2013-04-30 19:37:00 +00:00
Richard Barry f9918345e1 Update version numbers to V7.4.1. 2013-04-18 12:58:17 +00:00
Richard Barry c60973c34a Change version number in common files within the FreeRTOS-plus directory and check all demos still execute. 2013-04-18 10:08:04 +00:00
Richard Barry 64a3ab321a Add FreeRTOS-Plus directory with new directory structure so it matches the FreeRTOS directory. 2013-04-18 09:17:05 +00:00
Richard Barry 80f7e8cdd4 Remove subdirectories of FreeRTOS-Plus in preparation for changing the directory structure to match the FreeRTOS directory. 2013-04-18 08:39:10 +00:00
Richard Barry 2bd7d0c1f5 Commit 3 RX100 low power demos. 2013-04-17 10:04:38 +00:00
Richard Barry 2b41be4cb9 Update yield code in RX200/Renesas compiler port. 2013-04-17 08:55:16 +00:00
Richard Barry 352949af42 Update RX600 IAR RX62N demo to use latest IAR tools. 2013-04-17 08:47:27 +00:00
Richard Barry 0013028c7a Update yield code in RX600/IAR compiler port. 2013-04-17 08:46:10 +00:00
Richard Barry 4f5f527c73 Update yield code in RX600/Renesas compiler port. 2013-04-17 08:35:20 +00:00
Richard Barry b7487b8dc2 Update yield code in RX600/GCC port. 2013-04-17 08:23:02 +00:00
Richard Barry a69933782d Add RX100 Renesas compiler port layer. 2013-04-16 15:59:21 +00:00
Richard Barry 74290b4425 Add RX100 IAR port layer. 2013-04-16 15:58:46 +00:00
Richard Barry a0056e8fd3 Add RX100 GCC port layer. 2013-04-16 15:58:14 +00:00
Richard Barry 9a15f50b00 Add memory barrier instructions to Tasking CM4F port. 2013-04-16 15:50:17 +00:00
Richard Barry 7132e88685 Add memory barrier instructions to the RVDS CM3 ports. 2013-04-16 15:30:43 +00:00
Richard Barry 895ee2bb3e Add barrier instructions to IAR CM3 ports. 2013-04-16 14:56:49 +00:00
Richard Barry be7cae575d Ensure XMC demo builds with the latest IAR version. 2013-04-16 14:51:33 +00:00
Richard Barry d135e45676 Replace the read back of the software interrupt register with barrier instructions (CCS/RM48/TMS570). 2013-04-16 14:17:35 +00:00
Richard Barry 0527099b51 Add barrier instructions to the GCC CM3 ports. 2013-04-16 14:16:30 +00:00
Richard Barry 67cc013ac3 Remove duplicate #error informing people to run the CreateProjectDirectoryStructure.bat. 2013-04-16 12:49:23 +00:00
Richard Barry af023e8bf1 Remove infinite loop from task delete function. 2013-04-16 10:25:33 +00:00
Richard Barry 01202246da Add volatile keyword to GenQTest loop counter for consistency.
Remove obsolete definition from SAM4L demo.
2013-04-14 19:07:32 +00:00
Richard Barry 6d20e2b5cd Add barrier instructions to GCC CM3/4 code. 2013-04-07 19:43:52 +00:00
Richard Barry a7fb62cb9c Prepare to package up SAM4L demo. 2013-04-07 19:41:45 +00:00
Richard Barry af623460a6 Updated the sleep function to ensure it left interrupts disabled when returning. 2013-04-07 19:30:25 +00:00
Richard Barry 2cf9f1ac8c Add SAM4L demo. 2013-04-07 18:49:53 +00:00
Richard Barry 3762630f27 RL78/IAR port - Allow the end user to define their own tick interrupt configuration by defining configSETUP_TIMER_INTERRUPT(). 2013-03-25 17:00:13 +00:00
Richard Barry a9b8f0ca69 Minor mods common files to fix warnings generated by Renesas compiler.
Correct the header comments in het.c and het.h (RM48/TMS570 demo) which were corrupt.
Correct version numbers in RX63N Renesas compiler demo.
Ensure stacks set up for tasks in the RX200 port layer end on 8 byte boundaries (was 4, which didn't matter but didn't match the definition).
Replaced unqualified (unsigned) in calls to standard functions with (size_t).
2013-03-25 16:30:42 +00:00
Richard Barry 236683d74d Update the GCC RL78 demo to include four separate build configurations, each of which targets different hardware. 2013-03-19 12:24:05 +00:00
Richard Barry 3a1a500950 Rename the Demo/RL78_RL78G13_Promot_Board_IAR directory to RL78_Multiple_IAR as it now targets several different devices. 2013-03-18 16:51:43 +00:00
Richard Barry c08a0558c8 Add two additional targets to the RL78 IAR project. 2013-03-18 16:43:21 +00:00
Richard Barry caf1fbc899 Ensure IAR RL port layer works on devices using two different naming conventions for the interval timer registers. 2013-03-18 16:40:47 +00:00
Richard Barry 8c66fdbb8c Updated IAR RL78 port layer. 2013-03-17 16:54:17 +00:00
Richard Barry b78fa80fbe Update the IAR RL78 demo to include main_blinky.c and main_full.c. 2013-03-17 16:52:39 +00:00
Richard Barry 7fb22e27da Add an example ISR implementation into the RL78 GCC demo. 2013-03-17 15:38:23 +00:00
Richard Barry c79a5fe50c Complete RL78/G14 demo. 2013-03-17 12:12:20 +00:00
Richard Barry 3b1ff85222 RL78 GCC: Save and restore all register banks. 2013-03-17 09:27:18 +00:00
Richard Barry 3b9d0819c9 RL78/GCC related:
+ Add RL78G14 specific linker script.
+ Move the call to the function that sets up the clocks to before the code that sets up the .data and .bss sections.
2013-03-06 10:56:03 +00:00
Richard Barry 08b959f143 For RL78GCC port/demo:
- Added YRDKRL78G14 build configuration.
- Runs provided the dynamic priority tasks are not started.
- Does not run with the debugger connected.
2013-03-04 20:04:02 +00:00
Richard Barry fba04057ec All related to RL78 GCC demos (which are still a work in progress):
- Abstract out the IO port handling for the LED output so the same code can be used on multiple eval boards.
- Add in the RESTORE_CONTEXT macros.
- Swap to use heap_1.c instead of heap_4.c.
- Add data model macros to FreeRTOSConfig.h (may be removed if only one data model is supported by the compiler).
- Install interrupt handlers.
2013-03-04 13:23:48 +00:00
Richard Barry 37d302b8ee Abstract the IO port handling to toggle the LED into LED.h so the same code can work with multiple eval boards. 2013-03-04 13:18:19 +00:00
Richard Barry 83fa827935 Add RL78 E2Studio project. Code is building, but has not yet been executed. 2013-03-02 15:50:02 +00:00
Richard Barry 17bba16fa6 Added YRDKRL78G14 build configuration to the IAR RL78 demo. 2013-02-24 19:48:26 +00:00
Richard Barry a5d0e3f0c1 Prepare for V7.4.0 release. 2013-02-19 18:36:58 +00:00
Richard Barry 902f9e1a58 Update PIC32 demo application to remove reliance on PLIB functions.
Update the default low power implementation in all the Cortex-M port layers to add a small critical section.
2013-02-18 16:41:11 +00:00
Richard Barry c519ba094d Correct spelling of xSuspendedTaskList in eTaskConfirmSleepModeStatus(). 2013-02-18 11:28:56 +00:00
Richard Barry dcc90bb6d9 Add default definition for configUSE_QUEUE_SETS.
Add eTaskConfirmSleepModeStatus() (not yet tested).
Only call prvQueueUnregisterQueue() when a queue or semaphore is deleted if configQUEUE_REGISTRY_SIZE > 0.
Back out change that checks the configUSE_PORT_OPTMISED_TASK_SELECTION value before uxPriorityUsedOnEntry is set in vTaskPrioritySet as it generated more warnings (with other compilers) than it fixed.
2013-02-18 11:20:29 +00:00
Richard Barry 2b835ccb48 Commit demos that have been updated for testing purposes before they are updated once more to test new low power features. 2013-02-18 11:15:35 +00:00
Richard Barry b85c071a79 Update the LPC1768 project to only copy across one heap_x.c file as the addition of heap_4.c without it being excluded from the project was breaking the build. 2013-02-13 12:03:13 +00:00
Richard Barry a7eae6bed3 Added more files to the Rowley and IAR LM3S demos to test building the newer files and queue sets.
Made queue function prototypes consistent so xQueueHandle parameters are always xQueue, and xQUEUE * parameters pxQueue.
Likewise make the task API using px for pointers to TCBs, and just x for task handles.
Heap_x functions now automatically align the start of the heap without using the portDOUBLE union member.
Queue.c now includes queue.h.
2013-02-12 17:35:43 +00:00
Richard Barry 9b26071eb8 Adjusted the wrap checks in the QueueSet test task.
Added the QueueSet test to the Rowlay Stellaris and SAM4S-EK Studio demos.
Updated the MSVC demo to use heap_4.c.
2013-02-12 14:30:12 +00:00
Richard Barry 0262f4a6cd Reduce RAM used by trace by updating trcConfig.h. 2013-02-12 10:59:58 +00:00
Richard Barry b671bf368a Improve QueueSet.c test coverage by reading the queue set from an ISR to force paths through the queue locking and unlocking.
Add the FreeRTOS+Trace recorder into the Win32 MSVC demo.
Added more functions, including the queue set functions, to the MPU port.
2013-02-12 10:09:36 +00:00
Richard Barry 26152204a4 Update the FreeRTOS+Trace recorder and Win32 demo app. 2013-02-10 19:33:28 +00:00
Richard Barry 96218c34a1 Fix a few compiler warnings when compiling the QueueSet.c test code with GCC. 2013-02-08 17:05:42 +00:00
Richard Barry d328ae3bfc Add the queue set test to the SAM4S-EK Atmel Studio code. 2013-02-08 16:10:13 +00:00
Richard Barry 232a5b3433 Continue working on queue set implementation and testing. 2013-02-08 15:50:14 +00:00
Richard Barry 4e5090e061 Next revision of queue set implementation.
Make conditional compilation syntax and commenting consistent.
Add common demo tasks to demonstrate queue sets.
2013-02-07 15:10:25 +00:00
Richard Barry b5b518571e remove the additional line added to the MPU port.c as the original code was correct. Instead remove the alignment assert by adding #define portALIGNMENT_ASSERT_pxCurrentTCB ( void )
to the portmacor.h file.
2013-01-31 15:27:00 +00:00
Richard Barry ac78adae4b Added INCLUDE_xSemaphoreGetMutexHolder() default.
Changed eTaskStateGet() to eTaskGetState() and added #define to ensure backward compatibility.
Added configEXPECTED_IDLE_TIME_BEFORE_SLEEP definition - was previously hard coded to 2.
Slight change to the default CM3 tickless sleep function to allow the idle time to be set to zero in the pre-sleep processing macro.
Changed stack alignment for the FreeRTOS-MPU port to ensure it didn't trigger the assert() in the generic create function.
2013-01-31 14:18:03 +00:00
Richard Barry 4e7b460eaf Replace the CLZ function with a CLZ intrinsic in the Cortex-R4 port layer.
Add EDS support in the PIC24 port layer.
Remove unnecessary EHB instructions from PIC32 port.
In the PIC32 port assembly code, replace the &= code with a single ins instruction.
2013-01-23 16:06:45 +00:00
Richard Barry b5cf299df1 Make changes necessary to allow the latest StateViewer Eclipse plug-in obtain the run time stats information. 2012-12-31 11:09:14 +00:00
Richard Barry 2e24f1b789 Move the call that sets xTimeNow inside the loop that drains the timer queue to ensure higher priority tasks that pre-empt the timer daemon cannot post messages that appear to be in the future to the daemon task. 2012-11-18 09:13:39 +00:00
Richard Barry 0d421482d8 Default configUSE_TICKLESS_IDLE to 0 when it is not defined.
Move location of traceTASK_CREATE() macro call.
Remove obsolete handling of trmCOMMAND_PROCESS_TIMER_OVERFLOW as the command was never used in release versions.
2012-11-17 19:23:30 +00:00
Richard Barry c4d078c29a Ensure #error messages in FreeRTOSConfig.h files are not commented out. 2012-10-31 13:46:17 +00:00
Richard Barry 96f93690ce Add warning suppression to IAR header. 2012-10-31 13:30:44 +00:00
Richard Barry 5512102f92 Slow configured clock in the RM48 and TMS570 demos to 50MHz. 2012-10-31 10:31:33 +00:00
Richard Barry 0023cb1f8e Make loop counters in flop_hercules.c 32-bit instead of 16-bit. 2012-10-30 14:56:21 +00:00
Richard Barry 01bca41038 Rename CORTEX_R4_RM48_CCS5 directory as it also includes the TMS570 code. 2012-10-29 16:18:20 +00:00
Richard Barry 2a47ddd1f5 Correct cut and paste error in partest.c file. 2012-10-29 16:17:05 +00:00
Richard Barry ba686260ca Make CM3/4 tick configuration a weak function to allow application writers to use an alternative tick source. 2012-10-29 15:56:26 +00:00
Richard Barry 5e7c99d2aa Allow IAR language extensions so __weak attribute can be used. 2012-10-29 13:57:07 +00:00
Richard Barry 9fe5156b53 Work around compiler bug in CCS5 by replacing the _call_swi() function with a #pragma SWI_ALIAS. 2012-10-29 11:38:19 +00:00
Richard Barry 7fa0d887e8 Complete RM4x and TMS570 demo. 2012-10-29 11:34:41 +00:00
Richard Barry f5c52bdb1d Re-jig some of the new functions to correctly assign them public or private linkage, and remove some functions that were added in but never used. 2012-10-22 16:40:45 +00:00
Richard Barry f06a945444 Prepare for V7.3.0 release. 2012-10-16 12:17:47 +00:00
Richard Barry f446f77fd4 Make the timer used for the PIC32 port layer user configurable. 2012-10-16 09:48:45 +00:00
Richard Barry dbe0ae2bff Add tickless idle support in Cortex-M ports.
Change CCS R4 directory name.
2012-10-16 07:56:55 +00:00
Richard Barry e03ab659f3 Add tickless idle support in Cortex-M ports.
Change CCS R4 directory name.
2012-10-16 07:55:40 +00:00
Richard Barry 6ec4c7cecb Set the RM48 directory structure to match the FreeRTOS convention. 2012-10-14 21:33:53 +00:00
Richard Barry 4410dd363e Update FreeRTOS version used in RM48 demo. 2012-10-14 21:11:01 +00:00
Richard Barry 9ff79da901 First pass at adding R4F floating point support. 2012-10-13 16:21:40 +00:00
Richard Barry fe2163ede4 RM48 port layer without FPU saving completed. 2012-10-11 13:41:07 +00:00
Richard Barry 1112439c58 Get main_full.c working in the RM48 demo. 2012-10-10 13:40:36 +00:00
Richard Barry 05c17e7e6d Remove whitespace only. 2012-10-10 09:53:44 +00:00
Richard Barry ecdca1311b RM48 simply blinky demo working. 2012-10-09 13:04:17 +00:00
Richard Barry 57fab18305 Added initial RM48 project files. These are not in the correct directory structure yet. 2012-10-04 19:47:41 +00:00
Richard Barry c403e974ee Update PIC32 port to make use of configUSE_PORT_OPTIMISED_TASK_SELECTION.
Make small modification in GCC CM3 port when configUSE_PORT_OPTIMISED_TASK_SELECTION is set to 1 to remove compiler warning.
2012-09-25 18:18:37 +00:00
Richard Barry 87f663a461 Correct #if( configMAX_PRIORITIES >= 32 ) check performed when configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 to instead be #if( configMAX_PRIORITIES > 32 ). 2012-09-24 12:10:08 +00:00
Richard Barry 42a11edef8 Replace the need for taskCHECK_READY_LIST() by instead making vListRemove() return the number of items that remain in the list once the list item has been removed. 2012-09-24 12:05:35 +00:00
Richard Barry 18a4b00a18 Rename listLIST_ITEM_CONTAINED to listLIST_ITEM_CONTAINER. 2012-09-24 11:23:14 +00:00
Richard Barry 92f1699055 Added Cortex-M optimised code to the IAR, GCC and Keil Cortex-M port layers.
Tested and updated a few Cortex-M projects to use configUSE_PORT_OPTIMISED_TASK_SELECTION set to 1.
2012-09-24 11:01:17 +00:00
Richard Barry 670d172cfc Introduced configUSE_PORT_OPTIMISED_TASK_SELECTION, and updated the MSVC simulator port as the first implementation. 2012-09-23 14:35:12 +00:00
Richard Barry 8ef7f03536 Add eTaskStateGet() to FreeRTOS-MPU. 2012-09-23 09:35:53 +00:00
Richard Barry eb1f7bc166 Added eTaskStateGet().
Added default value for INCLUDE_eTaskStateGet.
2012-09-22 20:59:27 +00:00
Richard Barry 48a307ff5f Allow mutex type semaphores to be given from an interrupt (not a normal thing to do - use a binary semaphore!).
Allow FreeRTOS+CLI commands to have spaces at the end without it being taken as a parameter.
2012-09-05 14:02:16 +00:00
Richard Barry c0de8c984c Improve command input string handling in FreeRTOS+CLI to allow allow commands to be sub-strings of each other, and not to count trailing white space as a parameter. 2012-08-31 13:10:20 +00:00
Richard Barry bf12aba59d Add demo for SAM3S-EK2. 2012-08-29 15:02:56 +00:00
Richard Barry 340b2d7872 Save the SAM4S FreeRTOSConfig.h with the #error about running the CreateProjectDirectoryStructure.bat batch file in the correct state (uncommented). 2012-08-29 09:57:25 +00:00
Richard Barry 6396f6fe9f Add SAM3X-EK demo. 2012-08-15 20:38:50 +00:00
Richard Barry 0c7af1c2d3 Put comments in the code that give a reference to people who think that setting BASE_PRI to zero is the wrong thing to to in an ISR. 2012-08-14 13:04:22 +00:00
Richard Barry e0bab5981a Prepare for V7.2.0 release. 2012-08-14 12:14:48 +00:00
Richard Barry 73ad4387e2 Remove the remnants of the legacy trace functionality (since replaced with FreeRTOS+Trace).
Replaced the #error that traps configMAX_SYSCALL_INTERRUPT_PRIORITY being set to 0 with a configASSERT() for GCC Cortex-M3/4 ports as the #error does not work if configMAX_SYSCALL_INTERRUPT_PRIORITY includes any casting.  Not a problem for other compilers as they cannot have casting anyway as that would break the assembly code.
2012-08-12 17:05:23 +00:00
Richard Barry 02acfd2723 Add warning in Cortex-M3 and Cortex-M4 FreeRTOSConfig.h header files that configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. 2012-08-12 16:49:43 +00:00
Richard Barry 7d937f04d7 Add CreateProjectDirectoryStructure.bat to the SAM4 demo. 2012-08-12 04:25:38 +00:00
Richard Barry 99a4783b55 Remove the files from the SAM4S demo that are copied using the CreateProjectDirectoryStructure.bat batch file. 2012-08-12 04:14:58 +00:00
Richard Barry 4dbef6afe9 Add readme files to the various FreeRTOS+ directories. 2012-08-11 22:57:53 +00:00
Richard Barry f508a5f653 Add FreeRTOS-Plus directory. 2012-08-11 21:34:11 +00:00
Richard Barry 7bd5f21ad5 Start to re-arrange files to include FreeRTOS+ in main download. 2012-08-11 21:06:27 +00:00
Richard Barry 95db6bdce7 Remove test code from heap_4.c. 2012-08-11 20:59:14 +00:00
Richard Barry 054b018d0e Update MPS430X ports so the sleep mode bits are cleared on exit from the tick interrupt.
Update heap_4.c.
2012-08-11 20:57:11 +00:00
Richard Barry 59c9044de1 Add heap_4.c. 2012-08-10 18:45:45 +00:00
Richard Barry 2967657a85 Add vQueueDelete() to the MPU port.
Added volatile key word to the queue xRxLock and xTxLock members.
Ensure the portPRIVILEGED_BIT bit is set when the timer task is being created by the kernel - as it was for the idle task.  Necessary for MPU port.
2012-08-03 15:21:21 +00:00
Richard Barry e1a83402d6 Renamed the CORTEX_M4_ATSAM4S_AVR_Studio directory to the correct CORTEX_M4_ATSAM4S_Atmel_Studio. 2012-07-08 15:58:54 +00:00
Richard Barry 271b22eccc Remove the unused linker reference to the maths library. 2012-07-08 15:52:01 +00:00
Richard Barry 02c347d45d Complete first release candidate for the SAM4S-EK demo. 2012-07-08 14:11:37 +00:00
Richard Barry c8c7c80116 In the SAM4S demo, moved FreeRTOS into the ASF/thirdparty directory.
Changed some of the compiler warning configuration.
2012-07-05 09:41:37 +00:00
Richard Barry d67b0311cb Change the name of the SAM4 FreeRTOS-Source directory to just FreeRTOS in preparation of moving it to the ASF/Thirdparty directory. 2012-07-05 08:35:36 +00:00
Richard Barry 932d8b318e Create project for SAM4S. This is building but has not yet been tested on hardware. 2012-07-03 13:49:34 +00:00
Richard Barry db44ca0c56 Add in a couple of extra list macros for use with FreeRTOS+UDP.
Allow the ISR safe queue send and receive functions to set the higher priority task woken pointer to NULL.
2012-07-03 11:16:52 +00:00
Richard Barry c8c4ab298c Add the macro xSemaphoreTakeFromISR().
Add #error strings if configMAX_SYSCALL_INTERRUPT_PRIORITY is set to 0.
Corrected the prototype of vApplicationStackOverflowHook().
Changed the dimensioning of the buffer declared in prvListTaskWithinSingleList() to make use of the configMAX_TASK_NAME_LEN setting.
2012-07-03 09:38:09 +00:00
Richard Barry 26dbc85c7c Added INCLUDE_xQueueGetMutexHolder macro.
Removed the "-rc1" that was accidentally left on the version number of some Win32 port files.
Changed the behaviour of xQueueGenericReset() so queues can be reset when tasks are blocked on them.
2012-05-17 08:22:27 +00:00
Richard Barry 38d09c99eb Prepare for FreeRTOS V7.1.1 tag. 2012-05-08 17:35:44 +00:00
Richard Barry ac66c45eb4 Prepare for FreeRTOS V7.1.1 tag. 2012-05-08 16:50:26 +00:00
Richard Barry 9f0069690c Prepare for FreeRTOS V7.1.1 tag. 2012-05-08 16:36:52 +00:00
Richard Barry c5c064b74e Update the RX63N RDK project to use the correct PHY ID. 2012-05-01 12:28:06 +00:00
Richard Barry bbbdd9c393 Change the Win32 port layer so it doesn't use the traceTASK_DELETE macro, but instead the new portCLEAN_UP_TCB macro. 2012-04-24 13:09:22 +00:00
Richard Barry 8baa0ac171 Update the RX63N RDK demo to use the latest (at the time of writing) Renesas RDK BSP.
Ethernet is still not included.
The configuration is still set for the ES chip.
2012-04-24 12:45:01 +00:00
Richard Barry 84ddb2abd6 Update the RX63N RSK demo to use the latest (at the time of writing) Renesas RSK BSP.
Ethernet is still not included.
The configuration is still set for the ES chip.
2012-04-24 10:00:06 +00:00
Richard Barry 1bd702777d Remove older Renesas BSP files from the RX63N RSK demo in preparation to add in the latest BSP files. 2012-04-23 13:39:14 +00:00
Richard Barry 88bff5d198 RX63N RDK Debug build configuration now building, but not yet tested. 2012-04-18 10:34:05 +00:00
Richard Barry 2f199771d5 Backup point only. YRDK RX63N building but not linking. 2012-04-18 09:40:10 +00:00
Richard Barry aa85a68636 Update the Renesas provided BSP files in the RDK RX63N project. 2012-04-18 09:08:56 +00:00
Richard Barry 3bc093f562 Starting point for YRDK RX63N demo. 2012-04-18 08:40:34 +00:00
Richard Barry 0cf8643863 Update the TCP/IP update period from 500ms to the expected 50ms. 2012-04-18 08:16:15 +00:00
Richard Barry d8d68e917c Set the last return address at the bottom of the stack to 0 in the RX600 ports to prevent E2Studio from attempting to dereference the 0xdeadbeef pointer. 2012-04-16 18:33:32 +00:00
Richard Barry 63369b2a97 Change the stack alignment when a task first starts in the CM4F GCC, Tasking and Keil ports. 2012-04-16 18:23:32 +00:00
Richard Barry 68289d136f Remove unused .txt file from the XMC4500 uVision project. 2012-04-16 18:21:11 +00:00
Richard Barry 7a0996f246 Removed unused function from IAR CM4F port.c.
Modified the stack alignment when a task first starts in the IAR CM4F port.
2012-04-16 17:04:42 +00:00
Richard Barry 6360632cca Added the FreeRTOS/WorkingCopy/Demo/CORTEX_M4F_Infineon_XMC4500_IAR/settings directory to ensure the files open up in the IDE in the correct place when the project is first opened. 2012-04-16 17:02:21 +00:00
Richard Barry eff1636a94 Starting point for XMC4500 IAR demo application. 2012-04-15 21:04:53 +00:00
Richard Barry 4793063ee0 Add #error statements in FreeRTOSConfig.h header files where the CreateProjectDirectoryStructure.bat should be executed prior to the first build.
Added the CreateProjectDirectoryStructure.bat file for the XMC4500 Tasking demo.
2012-04-06 20:20:35 +00:00
Richard Barry dfa0c20530 Copy Tasking CM4F files from the project directory into their correct location in the FreeRTOS/Source directory. 2012-04-06 20:05:43 +00:00
Richard Barry 248abca109 Update include paths to be workspace relative.
Minimise the amount of heap space allocated.
Reduce the main() stack from 4K to 2K.
2012-04-06 20:02:44 +00:00
Richard Barry a3b4008eae Created and tested optimised build configuration for the XMC4500 demo. 2012-04-06 19:47:30 +00:00
Richard Barry 6aa07ed919 Tasking XMC4500 demo now running. 2012-04-06 18:33:50 +00:00
Richard Barry f9a9535ee9 Turn on long branch veneer generation in Tasking XMC4500 project - not sure why it is needed. 2012-04-06 17:45:24 +00:00
Richard Barry 1ccb58d56d Starting point for Tasking XMC4500 demo. Compiling only, not executed yet. 2012-04-06 16:36:52 +00:00
Richard Barry 1312fada7c Added traceMOVED_TASK_TO_READY_STATE and portSETUP_TCB macros.
Changed uxTCBNumber back to uxTaskNumber in tasks.c to fix IAR plug-in.
2012-04-02 20:06:52 +00:00
Richard Barry c0339c2c86 Checking current RX62N Renesas project which now links with the latest Renesas compiler. 2012-04-02 18:40:56 +00:00
Richard Barry 83d5097ed2 Update the CM3 MPU port so it builds with the changes made to enable the FreeRTOS+Trace tool. 2012-04-02 18:33:46 +00:00
Richard Barry 892d28f2c4 Check in current RX63N session file. 2012-04-02 18:31:13 +00:00
Richard Barry 06d47d4012 Checking current RX600 Renesas project which now links with the latest Renesas compiler. 2012-04-02 18:30:26 +00:00
Richard Barry 82fb90c416 Update Rowley LPC2368 project to remove the multiple defined symbol warnings. 2012-04-02 17:38:58 +00:00
Richard Barry 020ddcbd90 Update Rowley STM32F107 project to remove multiple defined symbol warning. 2012-04-02 17:36:42 +00:00
Richard Barry 73287e108b Update MPU projects to build with V7.1.0 - NOTE - these now build but do not necessarily execute correct from the Rowley IDE. 2012-04-02 17:35:03 +00:00
Richard Barry 7b340a1f9c Update Rowley LPC1768 project to remove the multiple defined symbol warning. 2012-04-02 17:33:04 +00:00
Richard Barry ea5027da67 Rename Demo/MPS430X_MSP430F5438_CCS4 Demo/MPS430X_MSP430F5438_CCS. 2012-04-02 09:40:00 +00:00
Richard Barry 4d1e3042dd Rename the Source/Portable/CCS4 directory to Source/Portable/CCS. 2012-04-02 09:37:17 +00:00
Richard Barry 2a9b42cbc3 Remove the Demo/Common/Utils directory as the CLI code is currently provided separately. 2012-04-02 09:24:11 +00:00
Richard Barry bb708957a9 Test the CCS4 demo project to CCS5 and make a minor change to ensure the power supplied is adequate for the CPU speed. 2012-04-02 09:20:45 +00:00
Richard Barry ab1aa67b08 Remove compiler warning in CCS MSP430X port. 2012-04-01 18:24:08 +00:00
Richard Barry 3b4771e1a9 Update MSP430X IAR port to ensure the power settings are correct for the clock speed. 2012-04-01 17:54:07 +00:00
Richard Barry f16af5d27e Correct #endif statement in new flash_tiemr.h header file. 2012-03-17 17:22:52 +00:00
Richard Barry c80818c7d8 Update version number in a couple of files in the RX63N/Renesas demo. 2012-03-17 17:21:49 +00:00
Richard Barry 3fa8beb176 Baseline the RX63N/Renesas demo - the Ethernet part of the demo is currently commented out as the Ethernet port is not configured using the RX63N register set. 2012-03-17 17:18:27 +00:00
Richard Barry e69bce06de Add the sp_flop standard demo tasks to the RX63N RSK demo. 2012-03-17 15:11:13 +00:00
Richard Barry eb38217496 Update demos to use timers for the check functionality, and the flash timers. Floating point and Ethernet is not yet included. 2012-03-17 15:02:32 +00:00
Richard Barry 785621ff22 Add the flash_timer standard demo timers (rather than tasks). These behave as the flash tasks, but use timers in place of tasks. 2012-03-17 14:59:46 +00:00
Richard Barry 05bc21e115 Update RX63N start-up to configure the high speed clock prior to initialising the C run time library. 2012-03-15 16:58:31 +00:00
Richard Barry a3c45eb1da Starting point for RX63N demo added. 2012-03-15 15:56:05 +00:00
Richard Barry 9e926a4459 Update the Rx/Renesas projects to include an extra linker section "L" required by the latest compilers. 2012-03-12 15:29:56 +00:00
Richard Barry 5267ac07a4 Modified header comments only. 2012-03-12 14:37:27 +00:00
Richard Barry 14f2b70797 Convert mov instructions to movs instructions in the GCC Cortex-M0 demo.
Update GCC Cortex-M0 CMSISv2p00_LPC11xx/inc/LPC11xx.h.
2012-03-11 21:31:23 +00:00
Richard Barry b86d821bc1 Convert mov instructions to movs instructions in the GCC Cortex-M0 port. 2012-03-11 21:28:06 +00:00
Richard Barry 7fa9bf25dc Fix issue in linker script generated by TrueStudio for STM32F0. 2012-03-11 20:22:18 +00:00
Richard Barry b8be5d1db2 Arrange windows in the XMC4000/Keil demo so they appear neatly when the project is first opened. 2012-03-11 20:21:22 +00:00
Richard Barry 2c7ec3957d Correct linker script for ARM7_AT91SAM7X256_Eclipse demo. 2012-03-11 20:18:07 +00:00
Richard Barry 4c8e9edc8d Add static qualifier to the function that starts the first task in GCC/ARM_CM3/port.c.
Added a _nop() after the _disable_interrupt() in CCS4/MSP430X/portmacro.h.
Added a NOP() after the disabling of interrupts in IAR/MSP430X/portmacro.h.
2012-03-11 20:14:50 +00:00
Richard Barry 1478402899 Update IAR MSP430X project to latest IAR version. 2012-03-11 15:50:19 +00:00
Richard Barry 2658a3b6ef Added xSemaphoreGetMutexHolder() macro and equivalent function. 2012-03-11 15:23:51 +00:00
Richard Barry 6dc8b56cb6 Add batch file that creates the directory structure required by the XMC4500 GCC port. 2012-03-11 14:26:01 +00:00
Richard Barry 9718fbdcd4 Add GCC Cortex-M4F port layer. 2012-03-11 14:09:22 +00:00
Richard Barry b22ee3c997 Add GCC project for Infineon XMC4500 Hexagon kit CPU board. 2012-03-11 14:07:48 +00:00
Richard Barry c86abdb67c Arrange the windows in the Keil XMC4500 demo to be positioned correctly when first opened. 2012-03-05 15:23:43 +00:00
Richard Barry 2e07d3d665 Update comments in STM32F0 demo.
Update the Keil XMC4500 demo so there are simple blinky and comprehensive demo options.
2012-03-05 15:22:00 +00:00
Richard Barry c77dab2c35 Update a comment only. 2012-03-04 20:59:23 +00:00
Richard Barry 45feba47c9 Add STM32F0 demo. 2012-03-04 15:11:54 +00:00
Richard Barry a5b65b0066 Added IAR port layer for the Cortex-M0. 2012-02-24 12:05:01 +00:00
Richard Barry 0f7f97f3a3 Change FreeRTOSConfig.h for the LPCXpresso CM0 demo as there seem to be two forms of the CMSIS names. 2012-01-25 09:23:55 +00:00
Richard Barry b3a894ca72 Revert the CM0 port layer exception handler names to the traditional FreeRTOS names as there seem to be two forms of the CMSIS names. 2012-01-25 09:19:58 +00:00
Richard Barry ec18d06ab1 Remove the ( void ) prvSetupNestedFPUInterruptsTest; line from the LPC4300 M4 main.c file. It should not have been there. 2012-01-23 17:08:37 +00:00
Richard Barry c820c390c4 Add XMC4500 project. 2012-01-23 12:02:57 +00:00
Richard Barry f10b6ffdc5 Update comments in main-full.c of CM0 demo. 2012-01-22 21:26:47 +00:00
Richard Barry ebc8ddd7da Remove duplicate definition of "#define vPortSVCHandler SVC_Handler" from FreeRTOSConfig.h included in CORTEX_STM32F100_Atollic demo. 2012-01-22 10:01:52 +00:00
Richard Barry b4b4f306c2 In files added a few moments ago:
+ Correct version number in comments at top of file.
+ Correct path in batch file.
2012-01-21 19:01:04 +00:00
Richard Barry 7427c0eff2 Move the CM0 files to their correct location and remove from their temporary demo project home. 2012-01-21 18:46:08 +00:00
Richard Barry de570548f0 Added batch file to create LPC11xx demo. Tidied up the M0 port layer files.
This is a baseline taken before moving the M0 port files to their proper location.
2012-01-21 18:38:21 +00:00
Richard Barry 7298ffd3f2 Correct one of the descriptions in the MicroBlaze FreeRTOS BSP mld file. 2012-01-21 16:42:03 +00:00
Richard Barry 71f36b8545 Tighten up IntQueue.c testing to have a count of the number of interrupts that post to the queue included in the error checks. 2012-01-21 16:39:14 +00:00
Richard Barry f8d15bfaf5 Complete LPC11xx demo functionality. The batch file to copy the code over is not written yet. 2012-01-21 15:23:40 +00:00
Richard Barry b0a6d939f4 Replace "Infinite loop" comment in main() with something sensible. 2012-01-19 22:17:10 +00:00
Richard Barry 8be818e771 Replace "Infinite loop" comment in main() with something sensible. 2012-01-19 22:16:13 +00:00
Richard Barry e8c5f36b00 IntQ test in and working. Nesting depth not yet checked. Other tasks commented out of main(). 2012-01-17 10:34:00 +00:00
Richard Barry 29c9a63c41 Add a few lines to the RX ports that allow the vector to be installed when the FreeRTOS code is built as a library. 2012-01-13 16:41:42 +00:00
Richard Barry 3d48d67c14 LPC1114 demo added. Kernel source will be moved. 2012-01-12 15:02:01 +00:00
Richard Barry 637045468b Add xQueueReset() function. 2012-01-12 09:32:35 +00:00
Richard Barry e3276fc282 Change version numbers to V7.1.0. 2011-12-13 16:24:24 +00:00
Richard Barry 8f3b797d29 Remove the incomplete MicroBlaze with full ethernet and tracecon facility ready for V7.1.0 update. 2011-12-13 15:41:55 +00:00
Richard Barry 1ec172e0e0 Add vQueueSetQueueNumber() and ucQueueGetQueueNumber() API functions. 2011-12-13 11:39:58 +00:00
Richard Barry 07c326fad3 Add a few extra standard demo tasks to the Win32 demo.
Make use of the new trace specific function calls from the Win32 demo - just to check the function as expected.
2011-12-13 11:38:58 +00:00
Richard Barry cc06119b86 The LPC43xx fast start files are now included. 2011-12-13 11:36:38 +00:00
Richard Barry a0eb27a69e Added fast book files to project - although fast boot is not integrated yet. 2011-12-13 09:22:57 +00:00
Richard Barry e0a4cbab6f Changes necessary in the Win32/lwiP project to use the updated command console files. 2011-12-11 10:23:01 +00:00
Richard Barry 000b4ba783 Remove all printf() statements from Kinetis demo as they prevent the code running when the debugger is not attached. 2011-12-08 13:16:34 +00:00
Richard Barry 7db04b1820 Add two Cortex-M4F port layers. 2011-12-08 10:49:21 +00:00
Richard Barry 08ddd1d00d Add two Cortex-M4F demo applications. 2011-12-08 10:48:36 +00:00
Richard Barry e7a1222c5f Command interpreter code updated to pass the command string into command hander functions. 2011-12-08 10:46:16 +00:00
Richard Barry 255dd683d2 Correct comment about mainCREATE_SIMPLE_LED_FLASHER_DEMO_ONLY setting in TriCore main.c. 2011-12-05 17:00:14 +00:00
Richard Barry 93e72e5036 Correct the prototype of the function call vApplicationStackOverflowHook(). 2011-12-02 19:13:33 +00:00
Richard Barry c92a2fe47e Add proper copyright notice in headers to files where is was mistakenly missing. 2011-12-02 08:05:14 +00:00
Richard Barry 94818b58e4 Add in a separate uxTaskNumber to the TCB structure for use by trace tools, leaving the uxTCBNumber for use by the state viewers. 2011-11-30 09:53:11 +00:00
Richard Barry 4d8e364c62 Add #define constant required to access the queue name get function. 2011-11-29 19:06:39 +00:00
Richard Barry 9b11b0c601 Remove the direct call to xQueueCreateMutex() and replace it with the xSemaphoreCreateMutex() macro. The result is the same, but the xQueue equivalent should not be used directly outside of the core files. 2011-11-29 19:05:21 +00:00
Richard Barry 7daebd9275 Update core files to remove legacy trace and make necessary modifications to facilitate use with other trace tools. 2011-11-29 19:02:58 +00:00
Richard Barry 022bc78961 Remove variable from the UDE perspective expressions window (TriCore demo project). 2011-11-24 11:54:42 +00:00
Richard Barry 7b23ebf63c Update TriCore model files so the .data section is initialised during startup. 2011-11-24 11:27:14 +00:00
Richard Barry abb476db24 Formatting changes only in TriCore porttrap.c. 2011-11-22 13:35:26 +00:00
Richard Barry 63cab86cc7 Remove debug code from the TriCore port.c file. 2011-11-22 13:27:17 +00:00
Richard Barry 3780e672a8 Commit changes to the TriCore demo UDE project. 2011-11-22 13:25:18 +00:00
Richard Barry eb8f02358e Fix compiler warning in timers.c/h that are only seen when the file is compiled on 8 bit devices.
Update example source code in timers.h so the parameter names match those in timers.c.
Fix "known issue" bug in xTaskResumeFromISR() (which was missing a critical section).
2011-11-22 13:24:32 +00:00
Richard Barry 562eedc434 All for the TriCore demo:
+ Comment serial.c
+ Improve the interaction between InterruptNetTest.c and main.c so both too short and too long periods are trapped.
+ Remove debug code from FreeRTOSConfig.h.
2011-11-22 13:21:37 +00:00
Richard Barry 5832e409d1 Fix compiler warning in TimerDemo.c that is only seen when the file is compiled on 8 bit devices. 2011-11-22 13:18:54 +00:00
Richard Barry de4a548c07 Configure release configuration for the Win32 lwIP project. 2011-11-19 22:27:28 +00:00
Richard Barry 9d4616eb55 Wind up the baud rate on the TriCore UART to obtain an extra level of interrupt nesting.
Set the UART into loopback mode so a jumper is not required.
2011-11-18 11:25:19 +00:00
Richard Barry b89f1a729a Latest TriCore port files - these still contain some debug code, and are not yet fully documented. 2011-11-17 11:16:21 +00:00
Richard Barry 93c4c48f78 Latest TriCore demo files - these still contain some debug code, and are not yet fully documented. 2011-11-17 11:11:15 +00:00
Richard Barry b8c1195c40 Added: /* This is called from the context switch, so will be called from a
critical section.  xTaskGetTickCountFromISR() contains its own critical
	section, and the ISR safe critical sections are not designed to nest,
	so reset the critical section. */
	portSET_INTERRUPT_MASK_FROM_ISR();

in main.c.
2011-11-13 21:13:26 +00:00
Richard Barry 188128f788 Added the portALIGNMENT_ASSERT_pxCurrentTCB macro.
Updated the TriCore port layer so its compare match setup does not effect any other compare match bits.
2011-10-28 11:50:00 +00:00
Richard Barry f354d6599e Add in interrupt nesting test - not yet complete. 2011-10-28 11:46:15 +00:00
Richard Barry 8d748af95c Updated TriCore demo application. 2011-10-27 10:45:27 +00:00
Richard Barry 41ef155824 Update TriCore GCC port layer. 2011-10-27 10:44:31 +00:00
Richard Barry 7f8a5ae148 Add timer demo to TriCore port. Add mainCREATE_SIMPLE_LED_FLASHER_DEMO_ONLY into main.c. Finish commenting main.c. 2011-10-25 11:16:59 +00:00
Richard Barry 0997b286bc Add the death.c standard demo files to the TriCode demo. 2011-10-24 12:32:00 +00:00
Richard Barry 70cfbda2e8 Minor changes to the TriCore port made during test/validation. 2011-10-24 12:30:35 +00:00
Richard Barry dd10b91fc4 TriCore demo: Add comments and modify the reg test tasks to give a better change of error detection. 2011-10-20 10:08:19 +00:00
Richard Barry 45fe448d73 First commit with TriCore port and demo - still a work in progress. 2011-10-17 13:17:58 +00:00
Richard Barry 75dc89826f First commit with TriCore port and demo - still a work in progress. 2011-10-17 13:17:14 +00:00
Richard Barry 0025e1ed9d Remove needs-lock SVN parameter from files in the CORTEX-LM3Sxxxx_IAR_KEIL directory. 2011-10-10 12:10:33 +00:00
Richard Barry 3f3e6ba246 Update RX630 to add in some timer demo code, and remove all mention of Ethernet.
Minor comment corrections in the RX200 demo.
2011-10-07 09:58:16 +00:00
Richard Barry 56eb9ebec3 Create RX630/Renesas project. 2011-10-07 08:30:23 +00:00
Richard Barry 317dc7ffd4 Change version numbers of files that are in SVN, but not included in the release yet. 2011-09-30 10:52:03 +00:00
Richard Barry 3eb4966af3 Add missing header file to the Windows lwIP demo project. 2011-09-30 10:32:50 +00:00
Richard Barry 9c25614cf4 Add an assert in the Win32 lwIP port layer to catch invalid adapter numbers being used. 2011-09-26 14:47:08 +00:00
Richard Barry 0e7c46fbd3 Update the version numbers in the demos that were not released in V7.0.2 to be V7.0.2. 2011-09-26 14:46:18 +00:00
Richard Barry 42fa20daec Add an optional global buffer to the command interpreter that can be used for command interpreter output. This removes the need for multiple output buffers to be allocated when more than one command interpreter is implemented. 2011-09-26 14:27:03 +00:00
Richard Barry cc61126025 Update headers for the FreeRTOS V7.0.2 release. 2011-09-20 18:22:39 +00:00
Richard Barry 6031a62f72 Second phase of renaming RegisterTestTasks.s to RegisterTestTasks.S. 2011-09-20 16:52:17 +00:00
Richard Barry d4476b0746 First phase of renaming RegisterTestTasks.s to RegisterTestTasks.S. 2011-09-20 16:51:28 +00:00
Richard Barry 35f7dba909 Update Win32 lwipopts.h for better efficiency. 2011-09-20 13:38:45 +00:00
Richard Barry 2cd1a46001 Minor changes to prepare the RX210 demo for release. 2011-09-20 13:37:35 +00:00
Richard Barry 9f72fe22d5 Remove disabling of nagle algorithm as the updated lwipopts.h in the MicroBlaze port makes it unnecessary. 2011-09-20 13:35:56 +00:00
Richard Barry d150ed9baf Update Microblaze Ethernet Lite lwipopts.h for better efficiency. 2011-09-20 13:34:49 +00:00
Richard Barry d28bd0ff46 Complete RX200 demo. 2011-09-18 15:45:52 +00:00
Richard Barry 83f0af8764 Lots of work on the RX200 demo. Blinky and Full/Debug build configurations are now tested, after adding the BussonAndLCD.c/h files. Full/Optimised is yet to be built or tested. 2011-09-17 16:41:46 +00:00
Richard Barry 025abf6f6a Moved some files into the include folder that were previously in the root. 2011-09-16 14:49:18 +00:00
Richard Barry 47455d6d1b Moved some files into the Renesas-Files folder that were previously in the root. 2011-09-16 14:47:36 +00:00
Richard Barry 93940b4717 Continue work on RX200 demo. Still a work in progress. 2011-09-16 14:38:36 +00:00
Richard Barry 5441cb959b Update demo projects for RX210, not yet complete, and not yet actually built. 2011-09-16 08:48:59 +00:00
Richard Barry 4883a72844 Update RL78 EWRL78 project settings so they can be used with the KickStart version of the IAR tools. 2011-09-13 15:12:56 +00:00
Richard Barry 2ae99f32f6 Delete the BasicSocketCommandServer task if the task exits, which can happen if the listening socket cannot be created. 2011-09-12 21:15:09 +00:00
Richard Barry 0d3d91fc51 Update sys_arch.c for Xilinx Ethernet Lite IP. 2011-09-12 21:13:25 +00:00
Richard Barry 03e2338deb Add warnings about mixing untested memory models in the RL78 port. 2011-09-09 20:37:50 +00:00
Richard Barry d500594b8a Tidy up the RL78 port layer. 2011-09-09 18:52:30 +00:00
Richard Barry 1fe7f40fad Read the RL78 demo for release. 2011-09-09 18:51:09 +00:00
Richard Barry 573497fbe0 Tidy up the RL78 port layer. 2011-09-09 16:18:57 +00:00
Richard Barry 476a87dfdc Ready the RL78 port for release. 2011-09-09 12:37:07 +00:00
Richard Barry e38ff18256 Read the RL78 demo for release. 2011-09-09 12:36:32 +00:00
Richard Barry 80341af3f5 Complete the RL78 demo. main.c still requires documentation in the comments at the top of the file. 2011-09-09 10:10:01 +00:00
Richard Barry 6ac7b7a9da Complete the RL78 demo. main.c still requires documentation in the comments at the top of the file. 2011-09-09 10:09:10 +00:00
Richard Barry 5e583219d6 Some updates to the fledgling RL78 demo application. Not yet complete. 2011-09-06 16:11:48 +00:00
Richard Barry 9290e3e71f Add use of portPOINTER_SIZE_TYPE to tasks.c to facilitate the removal of warnings when the pointer size is less than 32 bits. 2011-09-06 16:10:30 +00:00
Richard Barry 272cd59c26 Add use of portPOINTER_SIZE_TYPE to tasks.c to facilitate the removal of warnings when the pointer size is less than 32 bits. 2011-09-06 16:09:48 +00:00
Richard Barry de3807389a Add RL78 port layer. Note yet complete. 2011-09-06 16:08:38 +00:00
Richard Barry 4ec258f31c Add an RX210 demo project. 2011-09-02 19:58:18 +00:00
Richard Barry 5182e65d0d Remove .dep file that should have have been included in the repository. 2011-09-02 18:48:12 +00:00
Richard Barry 11cd605be7 Added RX200 port layer. 2011-09-02 18:31:56 +00:00
Richard Barry 1abff5d5cd Start an RL78 demo project. 2011-09-02 10:49:16 +00:00
Richard Barry e256bca3f9 MB9A314 Keil projects are now all fully functional. 2011-08-31 13:54:06 +00:00
Richard Barry 99c1322650 Keil MB9A310 project is now building, but not yet tested. 2011-08-31 10:38:44 +00:00
Richard Barry 9bfeb26579 Change Keil startup code to correct FM3 device. 2011-08-31 09:59:25 +00:00
Richard Barry bcbd6c8a7d Added demo for the MB9A314 - the IAR project is working, the Keil one is not set up for the correct chip yet. 2011-08-30 20:32:41 +00:00
Richard Barry 9c92745440 Hardware and software for the MicroBlaze project that uses the full Ethernet IP is now building - but the MAC driver has not yet been written. 2011-08-28 18:38:32 +00:00
Richard Barry d14eb96aeb Remove platform studio project as it is about to be replaced. 2011-08-28 16:41:01 +00:00
Richard Barry 1baa62e424 Remove redundant bit being set in the status register of the PIC32. 2011-08-28 13:07:54 +00:00
Richard Barry 3a4d907c64 Modify the stack set up when ARM7/9 tasks are created to ensure the assert() calls in xTaskCreate() don't fail. In this case, the assert that would fail is actually redundant anyway, but should not be removed as it might not be redundant in all ports. 2011-08-28 13:06:11 +00:00
Richard Barry 98860dee6a Remove obsolete comment. 2011-08-27 19:12:45 +00:00
Richard Barry a7f8a586f4 First version of the MicroBlaze demo with the full Ethernet IP. The Ethernet driver is not yet written. 2011-08-27 14:34:12 +00:00
Richard Barry 3104a7cf38 Remove directory that is not required. 2011-08-27 14:30:48 +00:00
Richard Barry d6aba020b0 Remove some large files from the repository that don't need to be there. 2011-08-27 14:23:59 +00:00
Richard Barry 731a01f8f4 Remove some large files from the repository that don't need to be there. 2011-08-27 14:22:36 +00:00
Richard Barry 678396f61b 2011-08-27 14:20:58 +00:00
Richard Barry df4feccb98 Rename the projects used in the Ethernet Lite MicroBlaze demo. 2011-08-27 13:44:31 +00:00
Richard Barry c87a82bb7b Rename the directories used in the Ethernet Lite MicroBlaze demo. 2011-08-27 13:30:01 +00:00
Richard Barry a16be7fb4e Update platform studio project for MicroBlaze with full Ethernet. 2011-08-27 11:55:55 +00:00
Richard Barry dbb0c1d13a First MicroBlaze hardware build with full Ethernet. 2011-08-27 06:45:09 +00:00
Richard Barry f4ae3c75bb Rename MicroBlaze project that uses the full Ethernet IP. 2011-08-26 17:49:13 +00:00
Richard Barry ea4f399a88 Remove MicroBlaze with full Ethernet project, so it can be generated again. 2011-08-26 17:42:54 +00:00
Richard Barry 856b801d33 Remove MicroBlaze with full Ethernet project, so it can be generated again. 2011-08-26 17:40:50 +00:00
Richard Barry 940b9ce27e Remove MicroBlaze with full Ethernet project, so it can be generated again. 2011-08-26 17:40:25 +00:00
Richard Barry 471ddd3c39 Mark original MicroBlaze project as deprecated. 2011-08-26 16:46:54 +00:00
Richard Barry ae4a38f5d8 Remove unused variable warning. 2011-08-26 16:44:02 +00:00
Richard Barry e1c944ec65 Correct task names in BlockQ.c. 2011-08-26 16:43:16 +00:00
Richard Barry d681d02acf Update the number of PCB buffers. 2011-08-26 15:40:45 +00:00
Richard Barry 6a561bb2e7 Add queue registry usage to the MicroBlaze demo so it can be used with the state viewer plug in. 2011-08-26 12:37:54 +00:00
Richard Barry 542a01f8bc Minor corrections in the comments punctuation. 2011-08-26 12:36:05 +00:00
Richard Barry 39f8526265 Changed the MicroBlaze demo back to using heap_3.c having updated the linker script generation. 2011-08-24 12:38:38 +00:00
Richard Barry 08d7c89175 Changed the MicroBlaze demo back to using heap_3.c having updated the linker script generation. 2011-08-24 11:59:06 +00:00
Richard Barry c056029422 Added BSP generation files to MicroBlaze directory. 2011-08-24 11:08:01 +00:00
Richard Barry 0dc4153997 Update the MicroBlaze CreateProjectDirectoryStructure.bat file to also copy files into the BSP directory, and to use path variables for the relative paths. 2011-08-24 10:42:27 +00:00
Richard Barry 667b722bde Update the names of some of the newly introduced API functions so they are more consistent with the names of pre-existing API functions. 2011-08-07 10:37:24 +00:00
Richard Barry 40ce7c8b52 Update the real copy of the Ethernet driver for the MicroBlaze EmacLite IP. 2011-08-07 10:28:13 +00:00
Richard Barry a6ce07a130 Commit existing xps project for the new MicroBlaze demo. 2011-08-07 10:25:24 +00:00
Richard Barry 3a25b5f33b Update the names of some of the newly introduced API functions so they are more consistent with the names of pre-existing API functions. 2011-08-07 10:22:57 +00:00
Richard Barry 28629a7ea6 Update the names of some of the newly introduced API functions so they are more consistent with the names of pre-existing API functions. 2011-08-07 10:22:20 +00:00
Richard Barry 405a2ca22c Add run time stats gathering to the MicroBlaze demo. 2011-08-07 10:08:04 +00:00
Richard Barry 1b762ec32d Update the pages served by the MicroBlaze web server. 2011-08-07 10:06:34 +00:00
Richard Barry 0d691b2095 Minor tidy up of the lwIP_Apps file and configuration in the new MicroBlaze demo. 2011-08-06 11:11:22 +00:00
Richard Barry 153a9f8ddb Add printf-stdarg.c to the new MicroBlaze demo. 2011-08-06 11:10:17 +00:00
Richard Barry 8c6dba2726 Add in necessary functionality to autonegotiate using the EthernetLite interface to the PHY. 2011-08-06 08:28:25 +00:00
Richard Barry ff8a7626d0 Change command interpreter semantics. 2011-08-03 09:36:12 +00:00
Richard Barry 49f726cf25 Change command interpreter semantics. 2011-08-03 09:35:21 +00:00
Richard Barry 59fbe1da22 Fix a few compiler warnings in utils when compiled with GCC. 2011-08-02 09:45:12 +00:00
Richard Barry 815bde09b9 Comment the command line interpreter and lwIP sockets based server code. 2011-08-01 16:06:06 +00:00
Richard Barry 5ca1d4194d Comment the command line interpreter and lwIP sockets based server code. 2011-08-01 16:03:49 +00:00
Richard Barry 723bed71bf Move the MSVC/lwIP code into the main line - not yet tested since moved. 2011-08-01 10:58:22 +00:00
Richard Barry d53ed61cab Move the MSVC/lwIP code into the main line. 2011-08-01 08:57:11 +00:00
Richard Barry 1aa52c2a7a Update a few util functions in the common demo area. 2011-08-01 08:34:05 +00:00
Richard Barry a548ef34f8 Remove vTaskCleanUpResources() calls. 2011-08-01 08:07:44 +00:00
Richard Barry 31dc786620 A few updates for coding standard reasons. 2011-08-01 08:05:37 +00:00
Richard Barry 254b61871e A few updates for coding standard reasons. 2011-08-01 08:00:17 +00:00
Richard Barry 5063200c86 Remove vTaskCleanUpResources() from core header files. 2011-08-01 07:48:56 +00:00
Richard Barry 6cc59de148 Remove files that are not required from the MicroBlaze demo project directories. 2011-07-27 19:18:45 +00:00
Richard Barry be7f88c78f Remove files that are not required from the MicroBlaze demo project directories. 2011-07-27 19:17:37 +00:00
Richard Barry 0d56e9a4a5 Delete directories that were added to the repository by mistake (those containing binaries) - woops. 2011-07-27 19:11:29 +00:00
Richard Barry e9e8365c8f Create project directory structure for the MicroBlaze demo project that uses the full Ethernet IP (rather than the Ethernet Lite IP). 2011-07-27 19:09:17 +00:00
Richard Barry 74eedea5db Check in the MicroBlaze projects before copying them to create the version that uses the full Ethernet. 2011-07-27 16:54:57 +00:00
Richard Barry f69b2efa66 Delete unused header file in the MicroBlaze Ethernet Lite port directory. 2011-07-27 16:53:32 +00:00
Richard Barry 2981d9f5c1 2011-07-27 16:52:32 +00:00
Richard Barry eb69ddce43 Fix compiler warning in sockets.c of lwip-1.4.0. 2011-07-27 16:51:11 +00:00
Richard Barry 6e81135a0d Add comtest_strings.c and comtest_strings.h to the proper Demo/Common/Minimal directory. 2011-07-27 16:39:59 +00:00
Richard Barry 6e2aeed966 Remove all workspace local copies of files that should be copied across using the CreateProejctDirectoryStructure.bat batch file. 2011-07-27 16:19:52 +00:00
Richard Barry 42aed81857 Add test/demonstration calls to xTaskGetIdleTaskHandle(), xTimerGetTimerTaskHandle, pcTaskGetTaskName() and vQueueDelete() functions to the Win32 demo project. 2011-07-27 14:16:24 +00:00
Richard Barry 6fa8cd4302 Add in the vSemaphoreDelete() macro. 2011-07-27 14:12:35 +00:00
Richard Barry fc99c14905 Add in the pcTaskGetTaskName(), xTaskGetIdleTaskHandle() and xTimerGetTimerTaskHandle() API functions. 2011-07-27 14:02:37 +00:00
Richard Barry a2a309c263 Update the batch file that copies the MicroBlaze code to use the MicroBlaze8 directory in place of the standard MicroBlaze directory in the FreeRTOS Source directory tree. 2011-07-27 13:05:23 +00:00
Richard Barry 4154b31454 Move new MicroBlaze V8 port from the project directory into its correct location in the directory structure. 2011-07-27 13:03:14 +00:00
Richard Barry fab6050ab8 Regenerate the EthernetLite hardware (MicroBlaze) in an attempt to get Rx working. 2011-07-27 12:08:38 +00:00
Richard Barry 1019db5850 Regenerate the EthernetLite hardware (MicroBlaze) in an attempt to get Rx working. 2011-07-27 12:06:38 +00:00
Richard Barry a12c133956 Clear off a few compiler warnings generated when pedantic warnings are switched on. 2011-07-27 12:05:56 +00:00
Richard Barry ff77d82ceb Update lwIP port layer for the Microblaze Ethernet Lite IP. 2011-07-27 12:04:15 +00:00
Richard Barry 5d3a35a1f3 Clear off a few compiler warnings generated when pedantic warnings are switched on. 2011-07-27 12:02:08 +00:00
Richard Barry 87b97f5510 Update PIC32 asm code ready for MPLAB compiler V2. 2011-07-25 15:38:19 +00:00
Richard Barry fe6284e807 Update PIC32 asm code ready for MPLAB compiler V2. 2011-07-25 15:35:54 +00:00
Richard Barry 6c0fe51bf2 Update the demo directory (temporary) local copy of the MicroBlaze EthernetLite port layer. 2011-07-24 16:21:23 +00:00
Richard Barry 9d1c23f6da Add in starting point for the MicroBlaze EthernetLite lwIP port layer. 2011-07-24 16:19:52 +00:00
Richard Barry a176b54de5 MicroBlaze demo now building with lwIP included - but will not link until the Ethernetif file is implemented. 2011-07-24 11:14:40 +00:00
Richard Barry 12a722bf36 Remove unnecessary files from the MicroBlaze http server file system creation directory. 2011-07-24 10:31:22 +00:00
Richard Barry 1052e6585f Update CreateProjectDirectoryStructure.bat to add in the lwIP source files, and add the source files themselves. The source files will be removed before release. 2011-07-24 09:53:54 +00:00
Richard Barry c39170ef64 Add raw httpd web server to the MicroBlaze demo - not build yet - only a file copy exercise so far. 2011-07-23 21:32:32 +00:00
Richard Barry 98309c3f4d Add lwIP_Apps directory structure to the MicroBlaze demo. 2011-07-23 21:20:57 +00:00
Richard Barry c023af9c39 Add a separate portMINUS_CONTEXT_SIZE definition, in place of the previously used -portCONTEXT_SIZE usage. 2011-07-23 21:14:43 +00:00
Richard Barry 9beca8b1b1 2011-07-23 21:12:53 +00:00
Richard Barry ad57e919b5 Minor typo in comment corrected in the Kinetis main-full.c. 2011-07-23 21:11:24 +00:00
Richard Barry adabfbe8b7 Add lwIP V1.4.0 source files. 2011-07-23 20:22:27 +00:00
Richard Barry a089537b02 Comment K60 demo code, ready for release. 2011-07-11 12:06:57 +00:00
Richard Barry dcb8df1fce Get web server and run time stats working in the Kinetis K60 demo. 2011-07-10 21:10:11 +00:00
Richard Barry 326b6a2c95 Ethernet working in the Kinetis K60 demo. 2011-07-10 12:16:13 +00:00
Richard Barry 9d181af847 Add Full build configuration to the Kinetis demo. Still a work in progress. 2011-07-08 21:02:03 +00:00
Richard Barry 862f99832d Start creating the K60 demo directory structure. 2011-07-08 09:55:18 +00:00
Richard Barry d0e8c36aa2 Start creating the K60 demo directory structure. 2011-07-08 08:57:54 +00:00
Richard Barry 248123342b Prepare files for export (MicroBlaze project). 2011-07-05 13:52:52 +00:00
Richard Barry 6e30a6cb75 Comment the exception handling functions in the MicroBlaze portmacro.h file. 2011-07-04 20:18:29 +00:00
Richard Barry b59d10c893 Change vTickISR() to vPortTickISR() in the new MicroBlaze demo. 2011-07-04 18:15:22 +00:00
Richard Barry 1f5e2a944c Add vSemaphoreDelete(), xTaskGetIdleTaskHandle(), xTimerGetTimerTaskHandle() API functions. Change vTickISR() to vPortTickISR(). Partially comment portmacro.h. All for the new MicroBlaze port. 2011-07-04 18:13:09 +00:00
Richard Barry 3d5656e37e Clean up some of the exception handling code in the new MicroBlaze port. 2011-07-02 18:51:18 +00:00
Richard Barry f90794f05a Comment the new MicroBlaze port layer files. 2011-06-30 18:26:32 +00:00
Richard Barry 0e12cd0768 Comment the new standard demo files that were introduced for the new MicroBlaze demo project. 2011-06-30 15:14:46 +00:00
Richard Barry 9d6eabdcfb Comment the new standard demo files that were introduced for the new MicroBlaze demo project. 2011-06-30 15:12:42 +00:00
Richard Barry 77df4daee7 Comment the peripheral helper files for the new MicroBlaze demo application. 2011-06-30 14:42:07 +00:00
Richard Barry 07e3174ad7 Complete first pass commenting of the new MicroBlaze demo main-blinky.c and main-full.c files. 2011-06-30 09:30:14 +00:00
Richard Barry e46b2a304f Continue commenting the new MicroBlaze demo. 2011-06-29 19:03:59 +00:00
Richard Barry 0e02cc56b1 Add the standard demo/test timers task to the MicroBlaze demo. 2011-06-29 19:02:33 +00:00
Richard Barry 5fdee187d4 Comment the new MicroBlaze blinky demo ready for release. The full demo still requires work. 2011-06-29 15:02:10 +00:00
Richard Barry 832bbd38e1 Extend the exception handling functionality in the new MicroBlaze port. 2011-06-29 08:50:13 +00:00
Richard Barry 71b359154b Implementing exception handling in the new MicroBlaze port - still a work in progress. 2011-06-26 20:56:49 +00:00
Richard Barry 8b0ccf1444 New MicroBlaze port: Added a FreeRTOS exception handler, and installed it in each position in the exception table. The handler itself does not do much yet. 2011-06-24 18:50:45 +00:00
Richard Barry 4108061316 Complete the new comtest_strings.c file.
Somewhat optimise the calling of vTaskSwitchContext() from interrupts in the new MicroBlaze port to ensure it does not get called multiple times when more than one peripheral is called from the same interrupt.
2011-06-20 19:40:50 +00:00
Richard Barry a4de9fa8f6 Add in the comtest test tasks to the MicroBlaze demo. 2011-06-19 21:19:33 +00:00
Richard Barry 7b24b4c30c Add the comtest_strings.c and serial.c files - Tx is workings, but both files are still a work in progress. 2011-06-19 13:15:47 +00:00
Richard Barry 2874006c7b Rebuild MicroBlaze hardware to experiment with UART - then put hardware back to how it was originally. 2011-06-19 13:00:59 +00:00
Richard Barry 56875b34d6 Rebuild MicroBlaze hardware to experiment with UART - then put hardware back to how it was originally. 2011-06-17 21:31:39 +00:00
Richard Barry 0512d10a02 Re-arrange the temporary MicroBlaze directory structure slightly. 2011-06-16 20:05:19 +00:00
Richard Barry be9b7e82c8 Add the common demo files to the MicroBlaze project - this directory will be removed prior to release. 2011-06-16 19:47:49 +00:00
Richard Barry 53d52c0cd3 Remove the needs-lock SVN attribute. 2011-06-16 14:59:47 +00:00
Richard Barry 5ddcf3d36a Update the Cortex-M3 IAR projects to compile with EWARM 6.20 where necessary. 2011-06-16 14:35:57 +00:00
Richard Barry d873c2705d Introduce sp_flop.c. This is the same as the flop.c common demo file, but uses single precision numbers and variables in place of the double precision numbers and variables. 2011-06-15 16:44:08 +00:00
Richard Barry c9b5f43d11 Add optional FPU support to the MicroBlaze code.
Rearrange the order in which registers are saved to the stack in an interrupt to make it more logical, and introduce #defines for the offset from the stack pointer for each variable.
2011-06-15 16:42:04 +00:00
Richard Barry 4d287dd1bf Small tidy up of the new MicroBlaze port layer. 2011-06-15 08:39:45 +00:00
Richard Barry 00bfe2f025 Small tidy up of the main-full.c file for the new MicroBlaze demo. 2011-06-15 08:38:01 +00:00
Richard Barry 587e7f0682 Update register test tasks to include a manual yield. Include the death tasks in main-full.c. Decrease the RAM allocated to the heap in FreeRTOSConfig.h. 2011-06-13 14:41:18 +00:00
Richard Barry 1cb4a1494f Remove the heap used with the new MicroBlaze demo. As heap_2.c is being used, the heap area set up in the linker script is not required. 2011-06-13 14:39:22 +00:00
Richard Barry 8d23799758 First pass changes to new MicroBlaze port layer done. No new functionality has yet been added. 2011-06-13 14:37:32 +00:00
Richard Barry cdac2c4f82 MicroBlaze demo nearly working - death tasks not yet integrated - still a work in progress. 2011-06-12 15:55:45 +00:00
Richard Barry 57653ee0ea Work on the Full build configuration for the MicroBlaze. Still a work in progress - not all tasks are running yet. 2011-06-11 21:04:17 +00:00
Richard Barry 78953066af Delete again. 2011-06-11 19:26:03 +00:00
Richard Barry 7a6dacf296 2011-06-11 19:12:26 +00:00
Richard Barry d487077d6e First phase of renaming portasm.s in the MicroBlaze port. 2011-06-11 18:31:04 +00:00
Richard Barry 4c80a9948e Tidy up the MicoBlaze port layer - still a work in progress. 2011-06-11 12:00:52 +00:00
Richard Barry 3e07dd4a03 Add a register test to the new MicroBlaze demo - still a work in progress. 2011-06-10 09:43:12 +00:00
Richard Barry 4cda2df265 MicroBlaze projects: Split build configurations into blinky and full. Implement partest.c. Everything still a work in progress. 2011-06-06 21:01:42 +00:00
Richard Barry 9f0bf057e6 Add LED output to the new MicroBlaze blinky demo - still a work in progress. 2011-06-05 16:39:49 +00:00
Richard Barry ea5ec656f4 Continue work on MicroBlaze port - still very much a work in progress. 2011-06-03 19:22:17 +00:00
Richard Barry 1e5830a157 Continue work on MicroBlaze port - still very much a work in progress. 2011-06-03 09:01:21 +00:00
Richard Barry 67039f6065 Updating MicroBlaze port - work in progress. 2011-06-01 15:01:08 +00:00
Richard Barry 328a8b586f Updating MicroBlaze port - work in progress. 2011-06-01 11:01:58 +00:00
Richard Barry f5b2c790a0 Add framework for new MicrobBlaze blinky project. 2011-05-31 20:38:48 +00:00
Richard Barry ee4659b678 Add autogenerated test source code to the new MicroBlaze project. 2011-05-31 18:14:58 +00:00
Richard Barry d4670870fb Restart the Microblaze project (again). 2011-05-31 09:08:05 +00:00
Richard Barry 3c5b78631b Remove MicroBlaze directory. 2011-05-31 08:37:52 +00:00
Richard Barry dbe65c9aaf Remove MicroBlaze directory. 2011-05-31 08:35:12 +00:00
Richard Barry 1438e844d9 Remove MicroBlaze directory. 2011-05-31 08:34:25 +00:00
Richard Barry 659be53a3e Remove MicroBlaze directory. 2011-05-31 08:33:47 +00:00
Richard Barry 52a9e4ecd8 Renamed MicroBlaze directory to MicroBlaze_Spartan-6_EthernetLite. 2011-05-31 08:27:43 +00:00
Richard Barry 04f17c5cee Renamed MicroBlaze directory to MicroBlaze_Spartan-6_EthernetLite. 2011-05-31 08:25:12 +00:00
Richard Barry f4009da657 Create MicroBlaze hardware - work in progress. 2011-05-31 07:55:45 +00:00
Richard Barry 61f15c5c17 Create MicroBlaze hardware - work in progress. 2011-05-30 20:57:52 +00:00
Richard Barry 3d5b5ce834 Restart the new MicroBlaze hardware project. 2011-05-30 20:37:24 +00:00
Richard Barry 29f7b76be0 Create MicroBlaze hardware - work in progress. 2011-05-30 20:07:13 +00:00
Richard Barry 2aa3a13d32 Start MicroBlaze project for the Spartan-6. 2011-05-30 15:56:32 +00:00
Richard Barry dedc9d8c46 Change some (xTIMER *) references in the documentation for the timer module to be instead xTimerHandle references (the two are in effect equivalent, but xTIMER is private to the timers source file). 2011-05-15 17:31:53 +00:00
Richard Barry f5a6b610e1 Update version number to V7.0.1. 2011-05-13 18:31:12 +00:00
Richard Barry 4e39c05bb6 Update all the Rx demos to use timers in their uIP task implementation. 2011-05-13 17:32:30 +00:00
Richard Barry 9ad9969536 The Keil compiler insists on having the IP address structure packed, but doing so causes problems with warnings being generated on other compilers. uip.h was therefore updated to just use the pack attribute when the Keil compiler is used. 2011-05-13 17:28:46 +00:00
Richard Barry 4f08018fa8 Update the RSK and RDK RX600 demos that use the Renesas compiler to include the extra port layer file needed when using V1.0.2.0 of the Renesas tools. 2011-05-13 13:57:04 +00:00
Richard Barry ef41907cab Update comment in the A2F main-full.c file for the SoftConsole demo. 2011-05-13 13:23:54 +00:00
Richard Barry dbd0c5ff80 Update comment in the A2F main-full.c file for the IAR and Keil demos. 2011-05-13 13:21:48 +00:00
Richard Barry 1f452ffdc3 Move the ehb instruction in the PIC32/MPLAB port layer. 2011-05-13 10:42:16 +00:00
Richard Barry f95c8efb63 Complete the Keil full FM3 demo. 2011-05-07 18:29:53 +00:00
Richard Barry 6cb1ea3ae4 Added Keil Blinky build configuration for the MB9B500 FM3. 2011-05-07 12:13:12 +00:00
Richard Barry a67536618a Complete the IAR FM3 demo. 2011-05-06 19:25:12 +00:00
Richard Barry b1727357b5 Added the digit counter timer to the FM3/IAR demo. 2011-05-06 11:13:11 +00:00
Richard Barry f6bf081cdb Added first version of the "full" build configuration to the FM3/IAR demo. 2011-05-06 10:14:29 +00:00
Richard Barry fdceeeb190 Complete FM3/IAR blinky build configuration. 2011-05-05 18:40:28 +00:00
Richard Barry 8c4c025c30 Add extra files to the MB9BF506N demo project. 2011-05-05 18:14:42 +00:00
Richard Barry 5d31ac594b Rename the Debug build configuration in the FM3 IAR demo to Blinky. 2011-05-04 20:27:39 +00:00
Richard Barry 6be0a39eea Correct the name of a variable in the A2F Blinky demos from xFreeStackSpace to xFreeHeapSpace. 2011-05-04 20:25:18 +00:00
Richard Barry e8fe7aa08e Change the main_blinky for the FM3 demo to use falling edge interrupts on the button input. 2011-05-04 20:12:40 +00:00
Richard Barry 80db62e711 Add in an FM3/IAR 2011-05-04 19:05:31 +00:00
Richard Barry 4de76dbc82 Fix in tasks.c related to https://sourceforge.net/tracker/?func=detail&aid=3295065&group_id=111543&atid=659633 2011-04-29 19:33:07 +00:00
Richard Barry 6d9cd6ff47 RC 2 of the Microsemi demos. 2011-04-29 13:22:11 +00:00
Richard Barry a204921cc5 Commit the new files required for the ACE driver in the SmartFusion demo. 2011-04-29 13:02:19 +00:00
Richard Barry fca97d4834 Put back the #error statement in FreeRTOS config for the Eclipse SmartFusion demo - it should not have been checked in with it out. 2011-04-29 12:00:33 +00:00
Richard Barry 3463753afc RC 1 of the Microsemi demos. 2011-04-29 11:57:38 +00:00
Richard Barry eadd0048c4 Update the SmartFusion SoftConsole source code to be the same as the IAR and Keil versions. 2011-04-29 10:31:01 +00:00
Richard Barry 2aef3e3cfe Complete Keil SmartFusion demo projects. 2011-04-29 09:28:13 +00:00
Richard Barry 96b1dc773f Update the FreeTCPIP files such that Keil is happy compiling them with the pack struct header file definitions. 2011-04-28 19:38:32 +00:00
Richard Barry 44fc593dfe Add the Keil project to the SmartFusion demo directory, and update the source code so it compiles with both IAR and Keil. 2011-04-28 19:37:30 +00:00
Richard Barry f155921461 Tidy up the IAR SmartFusion demo reading for release. 2011-04-28 15:13:30 +00:00
Richard Barry f6879be327 Put some belt and braces checks into the updated SmartFusion MAC driver. 2011-04-28 15:01:40 +00:00
Richard Barry d23df3d0af Remove ACE files that are not necessary for the SmartFusion demo. 2011-04-28 14:59:31 +00:00
Richard Barry 65ceb00a1f Add in functions required to configure the ACE in the SmartFusion demo. 2011-04-28 14:56:15 +00:00
Richard Barry 5831485bdf Update the A2F SoftConsole project to match the current A2F IAR project. 2011-04-27 16:05:36 +00:00
Richard Barry 9b6bd9e419 Update the IO page served by the A2F web server to use the correct LED for the A2F-EVAL-KIT hardware. 2011-04-27 15:11:42 +00:00
Richard Barry 72400ce72a 2011-04-25 15:00:34 +00:00
Richard Barry 2e2ab0b4dd Continue work on the IAR Microsemi Smartfusion demo. Still a work in progress. 2011-04-25 14:48:15 +00:00
Richard Barry 11254c9da4 Add in the Microsemi timer driver to provide a time base for the run time stats. 2011-04-25 14:44:55 +00:00
Richard Barry b84c870b54 Update the Microsemi I2C code to be event driver, rather than polling for Tx complete. 2011-04-25 14:43:34 +00:00
Richard Barry 1f2a287b7f Change Demo/Common/Minimal/death.c so it takes into account the timer daemon task in its calculation of the number of tasks that should be running. 2011-04-25 14:41:15 +00:00
Richard Barry 51f445fc67 SmartFusion A2F demo work in progress. 2011-04-24 19:37:10 +00:00
Richard Barry f11836f206 Update the A2F uIP_Task definition for use with the updated (zero copy) A2F Ethernet driver. 2011-04-24 19:09:12 +00:00
Richard Barry c1d000b654 Update MAC drivers so they use a uIP specific zero copy mechanism. 2011-04-24 18:45:58 +00:00
Richard Barry 5fbf3ab27e Change the RX62N port layer to allow it to be used with the V1.0.2 of the Renesas compiler. 2011-04-23 15:36:10 +00:00
Richard Barry 4a1716ac67 Add definitions for the different types of event that need processing by the TCP/IP stack. 2011-04-23 15:34:37 +00:00
Richard Barry 4950af89fb Update the RX62N/RDK/Renesas project files for use with V1.0.2 of the Reneasas compiler. 2011-04-23 15:31:17 +00:00
Richard Barry d390ea696a Update the RX62N/RDK/Renesas project files for use with V1.0.2 of the Reneasas compiler. 2011-04-23 15:30:39 +00:00
Richard Barry f109e90e15 Update FreeRTOSConfig.h for the RX62N/RDK/Renesas demo to include software timer and configASSERT() functionality. 2011-04-23 15:28:45 +00:00
Richard Barry 753ba20386 Update the uIP_Task.c implementation for the RX62N/RDK/Renesas demo to use FreeRTOS software timers in place of the uIP timers. 2011-04-23 15:27:34 +00:00
Richard Barry 968aa1b199 Change interface between the MAC and uIP task in the RX62N/RDK/Renesas demo to use a queue in place of the binary semaphore. This is so the queue can be used to indicate the type of event that has occurred. 2011-04-23 15:21:59 +00:00
Richard Barry 290e7bd222 Add pack_struct_start and pack_struct_end definitions for ICCARM. 2011-04-22 14:13:51 +00:00
Richard Barry 218c59e058 2011-04-20 20:04:32 +00:00
Richard Barry d6290b8e48 Change the CMSIS_IAR directory back to just say CMSIS. 2011-04-20 18:37:58 +00:00
Richard Barry 983e91b440 2011-04-20 18:30:43 +00:00
Richard Barry 2d7a71d379 2011-04-20 18:29:28 +00:00
Richard Barry f53955df4a 2011-04-20 18:24:00 +00:00
Richard Barry 139708e063 Create directory structure to hold the (not yet created) Keil and IAR demo projects for the SmartFusion. 2011-04-20 15:09:58 +00:00
Richard Barry 779e2bf80f 2011-04-20 15:03:42 +00:00
Richard Barry fb0d9d3c93 Complete the commenting for main-full.c in the A2F demo project, and update the main-full.c and main-blinky.c header comments to be correct for FreeRTOS V7.0.0. 2011-04-20 11:17:06 +00:00
Richard Barry 75e2399319 Complete the commenting for main-blinky.c in the A2F demo project. 2011-04-20 09:09:25 +00:00
Richard Barry 9a76675d1d Update the A2F SoftConsole project files to remove the strange unused/invalid include paths. 2011-04-20 08:23:55 +00:00
Richard Barry fd20ed4d17 Continue work on the SmartFusion web server demo. 2011-04-18 18:11:03 +00:00
Richard Barry 9ebdc099d1 Removed unused variable from SmartFusion PHY driver. 2011-04-18 08:44:08 +00:00
Richard Barry 9c6a0e4e69 Continue work on the SmartFusion demo web interface. The uIP task has been updated to use software timers, and the mac interface updated to use vTaskDelay() in place of busy waits. 2011-04-17 14:38:50 +00:00
Richard Barry e659759671 Delete EMAC.c from the A2F demo. 2011-04-17 11:08:07 +00:00
Richard Barry c0bf3cd7f9 Add in basic uIP files into the A2F demo. Ping is working, but nothing else has been tested yet. This check in includes some modifications to the MAC driver to make the Rx zero copy. 2011-04-17 10:32:09 +00:00
Richard Barry 521d995b9d Corrected a comment in the STM32 FreeRTOSConfig.h file. 2011-04-14 12:49:36 +00:00
Richard Barry 0feaad7183 Corrected a comment in the STM32 FreeRTOSConfig.h file. 2011-04-14 12:46:27 +00:00
Richard Barry 8e3e51e3a2 Add I2S driver to the StmartFusion demo. 2011-04-14 09:37:07 +00:00
Richard Barry 7915c348c3 Add OLED driver to the StmartFusion demo. 2011-04-14 09:31:18 +00:00
Richard Barry b42d4da7db Continue work on the SmartFusion demo. 2011-04-13 21:07:25 +00:00
Richard Barry 505bee983c Ensure byte alignment is maintained in PIC32 port layer when 8 byte alignment is required (basically, when printing out 8 byte data types). 2011-04-13 15:59:17 +00:00
Richard Barry 3144ef3cc6 Continue work on SmartFusion demo. 2011-04-12 13:49:13 +00:00
Richard Barry 5725c4b305 Alter the default priorities in blocktim.c to prevent asserts being triggered when configMAX_PRIORITIES is set to a low number. 2011-04-12 13:47:09 +00:00
Richard Barry 9481ea480b Continue work on SmartFusion demo. 2011-04-11 19:59:12 +00:00
Richard Barry ed24f0fdc1 Continue work on the SmartFusion demo. 2011-04-11 16:32:37 +00:00
Richard Barry a70c881207 Remove shadowed variable name. 2011-04-08 19:40:44 +00:00
Richard Barry 89bf1cf24f Update headers for Version 7.0.0 release. 2011-04-08 18:30:58 +00:00
Richard Barry 7ca26d943a Prepare for V7.0.0 release. 2011-04-08 12:06:33 +00:00
Richard Barry e5696339e7 Remove unused header files from the STM32 discovery board library configuration file. 2011-04-08 12:00:48 +00:00
Richard Barry 37de268af4 Cosmetic work towards MISRA compliance statement pre release of V7. 2011-04-05 20:19:54 +00:00
Richard Barry a1842621eb Remove unused library files from the STM32F100 TrueStudio project. 2011-04-05 13:41:35 +00:00
Richard Barry 87b622e0e8 Just change some of the comments in the STM32F100RB TrueStudio main.c file. 2011-04-05 09:46:43 +00:00
Richard Barry 8fc0c27ea5 Ensure that the configMAX_SYSCALL_INTERRUPT_PRIORITY setting works with all possible values. 2011-04-05 09:45:42 +00:00
Richard Barry 9133ceb44d Added STM32 discovery board simple demo project. 2011-04-04 18:54:14 +00:00
Richard Barry 3baaba8800 Rename the SmartFusion Debug build configuration to be the Blinky debug configuration as so far it only includes the basic simple demo. 2011-04-03 20:50:19 +00:00
Richard Barry 19bc9c8a48 Update the SmartFusion SoftConsole directory structure to include the webserver files. 2011-04-03 20:45:09 +00:00
Richard Barry f74e406997 Add SmartFusion/SoftConsole demo. At the moment only the blinky configuration is included. The full configuration will be added soon. 2011-04-03 19:02:58 +00:00
Richard Barry 0e62058edb Added some trace macros into the timers.c file. 2011-04-01 18:45:44 +00:00
Richard Barry afe9c0face Minor updates to the PIC32 MPLAB project to prevent it dumping .o files everywhere. 2011-04-01 18:19:34 +00:00
Richard Barry 8bd2d2f682 Add a #if ( configUSE_TIMERS ) conditional compilation constant in to allow the software timers source file to be included in a build that is not configured to use timers without resulting in linker errors. 2011-03-31 14:09:21 +00:00
Richard Barry 876caa2967 Replace portLONG with long, portCHAR with char, and portSHORT with short. 2011-03-27 18:51:55 +00:00
Richard Barry 85096f6159 Replace portLONG with long, portCHAR with char, and portSHORT with short. 2011-03-27 18:50:11 +00:00
Richard Barry eeeb001d86 Removed the needs-lock SVN attribute from the PIC32 demo project file and workspace file. 2011-03-27 08:13:59 +00:00
Richard Barry d8bab825bc Add a portNOP() implementation and relax the stack alignment requirements in the IAR MSP430X port layer. 2011-03-26 19:07:38 +00:00
Richard Barry ce3d65938d Change the priorities used by the RX/RSK/Renesas demo application to ensure they can be used when configASSERT() is defined. Previously the priorities meant assert would have been called because one of the priorities used was above ( configMAX_PRIORITIES - 1 ). 2011-03-26 18:44:42 +00:00
Richard Barry 5421388be5 Change the priorities used by the RX/RSK/GCC demo application to ensure they can be used when configASSERT() is defined. Previously the priorities meant assert would have been called because one of the priorities used was above ( configMAX_PRIORITIES - 1 ). 2011-03-26 15:48:35 +00:00
Richard Barry fdac74427d Change the priorities used by the RX/RSK/IAR demo application to ensure they can be used when configASSERT() is defined. Previously the priorities meant assert would have been called because one of the priorities used was above ( configMAX_PRIORITIES - 1 ). 2011-03-26 13:41:10 +00:00
Richard Barry 04c5d88e9d Change the priorities used by the RX/RDK/IAR demo application to ensure they can be used when configASSERT() is defined. Previously the priorities meant assert would have been called because one of the priorities used was above ( configMAX_PRIORITIES - 1 ). 2011-03-26 12:19:18 +00:00
Richard Barry 53b611d97a Change the priorities used by the RX/RDK/Renesas demo application to ensure they can be used when configASSERT() is defined. Previously the priorities meant assert would have been called because one of the priorities used was above ( configMAX_PRIORITIES - 1 ). 2011-03-26 11:33:54 +00:00
Richard Barry 89f0b2c0be Change the priorities used by the RX/RDK/GCC demo application to ensure they can be used when configASSERT() is defined. Previously the priorities meant assert would have been called because one of the priorities used was above ( configMAX_PRIORITIES - 1 ). 2011-03-26 10:35:16 +00:00
Richard Barry ead29065e0 Allow the intqHIGHER_PRIORITY definition to be modified outside of the IntQueue.c file. 2011-03-26 10:00:29 +00:00
Richard Barry eb16629f11 Update comments only in the MSP430X IAR main.c and serial.c files. 2011-03-24 19:37:18 +00:00
Richard Barry c85523f870 Finalise MSP430X CCS4 port and demo. 2011-03-14 07:26:50 +00:00
Richard Barry 329c36c6bc Update the MSP430X CCS4 port layer. 2011-03-12 14:59:44 +00:00
Richard Barry 15c46025ab Update TimerDemo.c so it can be used with the CCS4 compiler without generating errors or warnings. 2011-03-12 14:58:09 +00:00
Richard Barry 0ced5cc699 Update the CCS4 MSP430X demo files. 2011-03-12 14:56:14 +00:00
Richard Barry d53e65ed82 Tidy up timers API documentation comments. 2011-03-10 11:02:31 +00:00
Richard Barry 8a3fa98a2f Continue work on timers module documentation. 2011-03-09 13:49:35 +00:00
Richard Barry 0e133bc0fc Minor comment addition to queue.h. 2011-03-05 17:47:53 +00:00
Richard Barry 553a8389cc Start the documentation of the timer API functions and macros. About 50% done so far. 2011-03-05 17:46:55 +00:00
Richard Barry a9558864b7 Update PIC24 project for use with the latest Microchip tools. 2011-03-01 15:18:46 +00:00
Richard Barry 605155cbcd Set configUSE_16_BIT_TICKS back to is proper (not test) configuration. 2011-02-28 17:58:09 +00:00
Richard Barry 06899603f3 Add the timer module demo code to the MSVC Win32 simulator demo. 2011-02-28 17:52:14 +00:00
Richard Barry 7b0841b1e9 Check in the timer module test/demo task. 2011-02-28 16:14:49 +00:00
Richard Barry 3f10f92340 Correct the configUSE_16_BIT_TICKS usage in the Win32 simulator port layer. 2011-02-28 16:12:55 +00:00
Richard Barry 95b2901ba6 Correct the configUSE_16_BIT_TICKS usage in the GCC Coldfire port layer. 2011-02-28 16:11:26 +00:00
Richard Barry cb238fc1fa Finish off timers implementation. 2011-02-28 16:10:08 +00:00
Richard Barry 3c6ae51faf Finish off timers implementation. 2011-02-28 16:09:19 +00:00
Richard Barry 0c95f33e9f Finilise timers testing. 2011-02-27 13:08:44 +00:00
Richard Barry 2c1a85c90c Add some assertion points to timers.c. 2011-02-22 20:43:17 +00:00
Richard Barry 8b5a004be1 Continue testing timers module. Still a work in progress. 2011-02-21 10:52:36 +00:00
Richard Barry 8a9fb9554d Continue testing timers module. Still a work in progress. 2011-02-21 09:38:33 +00:00
Richard Barry 5c98d0eb7c Updates to timers.c related to module testing. 2011-02-20 11:05:54 +00:00
Richard Barry efc3ba9d73 Updates to timers.c related to module testing. 2011-02-20 10:59:58 +00:00
Richard Barry 50dcd0c682 Move one of the configASSERT() statements in tasks.c to be inside the if() that checks whether the stack should grow up or down. 2011-02-18 17:40:30 +00:00
Richard Barry 7759f7c973 Spell check comments in TimerDemo.c. 2011-02-18 15:59:02 +00:00
Richard Barry 58a700b8f7 WIN32 simulator port: Allow the configTICK_RATE_HZ to be increased without making the sleep time in the simulated timer peripheral too small. 2011-02-14 13:49:50 +00:00
Richard Barry 412c2cc9a7 Add some configASSERT() calls. 2011-02-14 13:47:50 +00:00
Richard Barry 38821bf732 Continue work on the new timer implementation test application. Nearly complete. 2011-02-14 10:54:00 +00:00
Richard Barry 7d76fd568f Continue work on the new timer implementation test application. Nearly complete. 2011-02-14 10:52:52 +00:00
Richard Barry b4ff4820cb Continue work on the new timer implementation. Nearly complete. 2011-02-14 10:51:18 +00:00
Richard Barry 07a2021676 Add ISR safe timer API. 2011-02-12 13:53:25 +00:00
Richard Barry 3ba433ed39 Continue adding some tick interrupt overflow protection to the timers module. This is not tested yet and still a work in progress. 2011-02-11 16:17:37 +00:00
Richard Barry 7ee534e4c2 Add some tick interrupt overflow protection to the timers module. This is not tested yet and still a work in progress. 2011-02-10 19:09:35 +00:00
Richard Barry 671ca2724e A bit of modularisation performed on the TimerDemo.c file - still a work in progress. 2011-02-10 19:08:14 +00:00
Richard Barry 0552fc86bf Commit before update to include overflow list functionality. 2011-02-10 17:20:36 +00:00
Richard Barry f9148de3cc Add the timer demo/test task creating to the WIN32-MSVC/main.c file. 2011-02-09 19:30:44 +00:00
Richard Barry 8c9d8bcf0d Add constants to required to use the new timers implementation and the timer demo task/test task to the Win32 MSVC demo FreeRTOSConfig.h file. 2011-02-09 19:29:46 +00:00
Richard Barry aceb8db846 Start creating a demo task/test task for the new timer implementation. Still a work in progress. 2011-02-09 19:28:21 +00:00
Richard Barry 91f0fc9cdd Minor updates to the core header files required by the new timer implementation. 2011-02-09 19:26:33 +00:00
Richard Barry 559532329d Minor updates to the queue.c and tasks.c core files required to support the new timers implementation. 2011-02-09 19:21:58 +00:00
Richard Barry 9d9b00b669 Correction to the draft timers module. Still a work in progress. 2011-02-09 19:20:12 +00:00
Richard Barry 7b97fe26c7 Remove the needs lock property. 2011-02-09 15:30:23 +00:00
Richard Barry 1cfa8cd9d8 Remove the needs lock property. 2011-02-09 15:27:26 +00:00
Richard Barry 8db5ded4b3 Continue work on the timers module. 2011-02-09 10:47:23 +00:00
Richard Barry 896d8c5d94 Continue work on the timers module. 2011-02-09 10:46:45 +00:00
Richard Barry 4a5f1529d0 Continue work on timers module - work in progress. 2011-02-08 16:21:15 +00:00
Richard Barry 812632fd1c Start an optional timers module implementation. 2011-02-08 15:21:31 +00:00
Richard Barry 4d2adb720b Start an optional timers module implementation. 2011-02-08 15:20:29 +00:00
Richard Barry f5e7f9957c Change clock_time_t from a fixed unsigned long to portTickType so it works ok when configUSE_16_BIT_TICKS is set to 1. 2011-02-07 11:58:19 +00:00
Richard Barry a5820e2b2a Make changes required for MISRA 2004 compliance. 2011-02-06 18:47:57 +00:00
Richard Barry c26b230d28 Some time and code size optimisations. 2011-02-06 15:44:56 +00:00
Richard Barry 1374a17f73 Change occurrences of "Cortex M3" to "Cortex-M3". 2011-02-05 16:49:17 +00:00
Richard Barry a22c519f5d Change occurrences of "Cortex M3" to "Cortex-M3". 2011-02-05 16:47:27 +00:00
Richard Barry 80a942e964 Change the case of an include file and a file name in the makefile for the SAM7X Eclipse demo to ensure it can be built on Linux. 2011-01-30 17:55:50 +00:00
Richard Barry 46c4d33d28 Add some comments to the PIC32 demos that the IPL setting in an ISR prototype has no effect if the FreeRTOS assembly wrapper is being used. 2011-01-29 15:49:42 +00:00
Richard Barry 14472a9499 Set the software interrupt priority to use configKERNEL_INTERRUPT_PRIORITY rather than being hard coded to 1. 2011-01-29 15:42:51 +00:00
Richard Barry fc56459b46 Update the dsPIC MPLAB demo for use with the latest 3.25 version of the compiler. 2011-01-25 16:30:24 +00:00
Richard Barry 381785b968 Update the PIC24 MPLAB demo for use with the latest 3.25 version of the compiler. 2011-01-25 16:24:22 +00:00
Richard Barry 27effd446c Update the dsPIC MPLAB demo for use with the latest 3.25 version of the compiler. 2011-01-25 15:56:09 +00:00
Richard Barry d89c43c7aa Update the PIC32 project to better structure the files in the MPLAB project window, and test that it works with the latest V1.12 C32 compiler. 2011-01-25 15:26:53 +00:00
Richard Barry 0079d00fec Remove unreferenced variables from main.c for the PSoC 5 demos. 2011-01-25 10:16:20 +00:00
Richard Barry 063a1538c7 Remove the memory hole in the linker MSP430X/IAR linker script that was a left over from the TI User Experience demo (which required the hole). 2011-01-19 16:40:55 +00:00
Richard Barry 6bf111e94a Update the MSP430X/IAR demo project to support the medium data model. 2011-01-18 20:34:38 +00:00
Richard Barry c679af3ba8 Update the MSP430X/IAR port layer to support the medium data model. 2011-01-18 20:33:35 +00:00
Richard Barry bc87cc4cb7 Tidy up the IAR MSP430X demo serial.c file. 2011-01-18 19:55:13 +00:00
Richard Barry 334e0e2e70 Update to V6.1.1 2011-01-14 20:40:41 +00:00
Richard Barry 139b80f57e Update to V6.1.1 2011-01-14 20:31:45 +00:00
Richard Barry 6fac5cfd4c Update to V6.1.1 2011-01-14 20:25:54 +00:00
Richard Barry 96ab89d253 Update to V6.1.1 2011-01-14 20:22:24 +00:00
Richard Barry 399d8c47c7 Second phase of changing the directory that starts Cortex, with one that starts CORTEX. 2011-01-14 18:45:00 +00:00
Richard Barry 7004e0308a Second phase of changing the directory that starts Cortex, with one that starts CORTEX. 2011-01-14 18:44:23 +00:00
Richard Barry a7b2373bcc First phase of changing the directory that starts Cortex, with one that starts CORTEX. 2011-01-14 18:42:44 +00:00
Richard Barry 5cc153cfb1 First phase of changing the directory that starts Cortex, with one that starts CORTEX. 2011-01-14 18:40:20 +00:00
Richard Barry 9e00460ce1 Update the RX600 HEW projects to use the new J-Link DLL. 2011-01-14 18:34:29 +00:00
Richard Barry 7a337142ff Increase the stack sizes in the IAR / MSP430X demo. 2011-01-13 19:08:36 +00:00
Richard Barry fb18eeb96c Make the generation of run time stats percentages more efficient. 2011-01-13 19:04:57 +00:00
Richard Barry 411364dab6 Add the .align, .asmfunc and .endasmfunc directives to the CCS MSP430X port layer. 2011-01-13 10:36:42 +00:00
Richard Barry 749edf57e7 Make the tick ISR entry function use the __raw attribute in the IAR MSP430X port layer. 2011-01-13 10:28:40 +00:00
Richard Barry 6b661d03a5 Remove unnecessary calls to fflush() in MSP430X/IAR demo. 2011-01-13 10:27:06 +00:00
Richard Barry 01f4b87dba Increase the MCLK frequency to 25MHz in the IAR MSP430X demo. 2011-01-12 12:33:38 +00:00
Richard Barry 89669ae861 Increase the MCLK frequency to 25MHz in the CCS MSP430X demo. 2011-01-12 12:32:33 +00:00
Richard Barry 7676ec0b66 Make use of the .align assembler directive in the reg test asm file of the MSP430X/CCS demo. 2011-01-12 12:15:03 +00:00
Richard Barry 4b895698ca Rename the UART ISR in the MSP430X/CCS demo to match the UART actually being used. 2011-01-12 12:13:26 +00:00
Richard Barry 1b04552233 Make use of the EVEN assembler directive in the IAR MSP430X port layer. 2011-01-12 10:00:13 +00:00
Richard Barry 10bc087ef9 Make use of the EVEN assembler directive in the reg test asm file of the MSP430X/IAR demo. 2011-01-12 09:58:51 +00:00
Richard Barry 5a0782e3a8 Set the low power mode entered in the idle hook to 3 in the MSP430X/IAR demo. 2011-01-12 09:58:08 +00:00
Richard Barry 8d33f44809 Rename the UART ISR in the MSP430X/IAR demo to match the UART actually being used. 2011-01-12 09:56:56 +00:00
Richard Barry dccbf6a271 Ensure the MSp430X IAR project only has main.c open when the workspace is opened. 2011-01-06 11:18:06 +00:00
Richard Barry 6f4805423f Set the STM32L152 compiler options to use the tiny printf formatter. 2011-01-06 11:11:43 +00:00
Richard Barry e4f2ba1913 Introduce option that permits a smaller printf() library to be used when sizeof( int ) == sizeof( long ) in cases where formatted strings are used to present run time stats information. 2011-01-06 11:10:51 +00:00
Richard Barry 7a71523712 Replace the function that returns the current run time counter value with a macro for easier inlining. 2011-01-06 10:50:31 +00:00
Richard Barry d493958052 Change the #error text in croutine.h only. 2011-01-06 10:49:20 +00:00
Richard Barry 95080a22f2 Introduce the portALT_GET_RUN_TIME_COUNTER_VALUE macro as an alternative to portGET_RUN_TIME_COUNTER_VALUE to make inlining of the run time stats functions easier. 2011-01-06 10:08:07 +00:00
Richard Barry f57fa8bf72 Replace the function that returns the current run time counter value with a macro for easier inlining. 2011-01-06 10:06:09 +00:00
Richard Barry 12949b4507 Replace the function that returns the current run time counter value with a macro for easier inlining. 2011-01-06 09:55:05 +00:00
Richard Barry 25bc4acc6a Update the run time stats generation algorithm for the MSP430X IAR port. 2011-01-05 20:20:17 +00:00
Richard Barry 6331341d97 Minor formatting changes to the Keil and RVDS PSoC5 demos. 2011-01-05 14:16:28 +00:00
Richard Barry ad3207a226 Minor formatting changes to the GCC PSoC demo. 2011-01-05 14:10:14 +00:00
Richard Barry 17e1e7dfd3 A little extra commenting added to the Cortex M3 port layers. 2011-01-05 13:36:35 +00:00
Richard Barry 3ff33205eb Added PSoC5 demo applications. 2011-01-04 17:40:27 +00:00
Richard Barry b77d801de0 Remove the queue registry from the MSP430X CCS port as the state viewer plug in does not work in CCS. 2011-01-04 14:37:53 +00:00
Richard Barry 50cc4026db Allow the register test asm code in the CCS4 MSP430X demo to use any data model. 2011-01-04 14:36:35 +00:00
Richard Barry 20ddcce965 Allow the MSP430X IAR port layer to skip pre-loading all register values for created tasks. 2011-01-04 14:32:52 +00:00
Richard Barry 9a24d4a37f Convert the CCS4 MSP430X port layer to permit large and small data models, and large and small code models. 2011-01-03 16:48:59 +00:00
Richard Barry 2c894e0f55 Add build configurations for small data model and small code model tests to the MSP430X CCS4 demo project. 2011-01-03 16:41:42 +00:00
Richard Barry 16daa60de7 Tidy up the run time stats generation in the MSP430X IAR port. 2011-01-03 12:06:49 +00:00
Richard Barry b41417d89b Add a small data model build configuration to the IAR MSP430X demo project. 2011-01-03 11:43:34 +00:00
Richard Barry d195639bc1 Start to adjust to support both small and large memory models in the MSP430X IAR port layer. 2011-01-03 11:31:41 +00:00
Richard Barry 19fcd2d505 Start to adjust to support both small and large memory models in the MSP430X IAR demo. 2011-01-03 11:30:11 +00:00
Richard Barry 4059be7918 Minor updates to the MSP430X CCS4 and IAR port layers.
Change the sprintf() in prvGenerateRunTimeStatsForTasksInList() to accept unsigned long instead of unsigned int parameters so it works on 16bit devices too.
2011-01-02 18:35:52 +00:00
Richard Barry 1b96233cf1 Minor updates to the MSP430X CCS4 demo application. 2011-01-02 18:31:30 +00:00
Richard Barry 2b92b7a5d9 Minor updates to the MSP430X CCS4 demo application. 2011-01-02 18:19:12 +00:00
Richard Barry 947524522b Minor updates to the MSP430X IAR demo application. 2011-01-02 18:17:22 +00:00
Richard Barry 8d532ab4a7 Ensure that main() is always placed in low memory in the CCS4 MSP430X port. 2011-01-01 20:57:17 +00:00
Richard Barry 811413d95a Ensure that main() is always placed in low memory in the IAR MSP430X port. 2011-01-01 20:56:23 +00:00
Richard Barry a9b61c4e00 Add warning line into the CCS4/MSP430X project to prompt the use of the CreateProjectDirectoryStructure.bat batch file. 2011-01-01 17:35:20 +00:00
Richard Barry ab56e7ccbb Formatting only. 2011-01-01 17:24:46 +00:00
Richard Barry 304495350c Remove unnecessary ';' characters from a couple of macro definitions in the IAR MSP430X port layer. 2011-01-01 17:24:03 +00:00
Richard Barry a6132cbbad Add MSP430X CCS4 port layer. 2011-01-01 17:23:00 +00:00
Richard Barry 2cf5546e11 Add MSP430X CCS4 demo project. 2011-01-01 17:22:05 +00:00
Richard Barry 34f15ddecd Prepare the MSP430X IAR demo for release. 2011-01-01 11:27:48 +00:00
Richard Barry eb94f856a8 Add the debugger settings to the MSP430X IAR demo directory. 2011-01-01 09:32:55 +00:00
Richard Barry 0249ad47f4 Continue work on the MSP430X demo - still a work in progress. 2011-01-01 09:23:37 +00:00
Richard Barry 7bc73115a5 Add TI library files necessary to build MSP430X demo. Still a work in progress. 2010-12-31 18:56:23 +00:00
Richard Barry b236356621 Continue development of the MSP430X port layer for IAR. Still a work in progress. 2010-12-31 17:55:52 +00:00
Richard Barry b54a5232c6 Continue work on the MSP430X demo - still a work in progress. 2010-12-31 17:54:29 +00:00
Richard Barry ae6380f70b Continue to develop the MSP430X IAR demo project - still a work in progress. 2010-12-31 14:51:15 +00:00
Richard Barry df4e7ceba0 Continue to develop the MSP430X IAR demo project - still a work in progress. 2010-12-30 14:01:21 +00:00
Richard Barry 38055abf18 Change vTickISR() to vPortTickISR() in the MSP430X IAR port layer. 2010-12-30 14:00:30 +00:00
Richard Barry 98720fb72e Start to write the MSP430X demo. 2010-12-29 22:07:52 +00:00
Richard Barry 96e499775a Create directory to hold the MSP430X demo. 2010-12-29 22:06:46 +00:00
Richard Barry a109f862a7 Rename a function in the STM32L demo to conform to the coding standard for private functions. 2010-12-29 22:05:28 +00:00
Richard Barry c7a110a853 Tidy up the port layer for the MSP430X IAR port - still a work in progress. 2010-12-29 18:46:02 +00:00
Richard Barry 0a31276719 Continue development of MSP430X port. 2010-12-29 14:35:40 +00:00
Richard Barry e7e623f853 Continue development of MSP430X port. 2010-12-28 18:40:12 +00:00
Richard Barry b20be831b7 Start work on official MSP430X port layer for IAR. 2010-12-28 15:22:17 +00:00
Richard Barry c83d421388 Finish the STM32L152 demo application. 2010-12-23 19:41:05 +00:00
Richard Barry f6a1714b46 Added two missing STM32 peripheral drivers from the STM32L152 demo project. 2010-12-23 17:10:24 +00:00
Richard Barry ecc01bdbe8 Comment and spell check the STM32L152 demo project. 2010-12-23 17:04:34 +00:00
Richard Barry 556fc15e99 Enter sleep mode in the idle task. 2010-12-23 11:24:14 +00:00
Richard Barry 52b4c95301 Complete the STM32L152 demo application functionality - it is still to be 'productionised'. 2010-12-23 11:03:07 +00:00
Richard Barry 7fd1d847fb Modify vTaskGetRunTimeStats() to ensure the current run time total is obtained from within a critical section. This allows greater flexibility in how the run time counter value is maintained. 2010-12-23 10:40:13 +00:00
Richard Barry a67c624894 Add an cpsie i before the SVC call that starts the scheduler. This is just in case the C start up code leaves interrupts globally disabled. 2010-12-23 10:39:02 +00:00
Richard Barry 6046eea342 Allow RX YRDK demos to work with Rev1 and Rev3 boards, and with any web browser. 2010-12-22 15:18:30 +00:00
Richard Barry 7b9a3e0707 Added a few system files to the repository for the STM32L152 demo. 2010-12-21 16:34:38 +00:00
Richard Barry 9c507b93d7 Continued development on STM32L152 demo. 2010-12-21 16:09:34 +00:00
Richard Barry 7243d65797 Still updating the STM32L demo project - still a work in progress. 2010-12-20 12:14:45 +00:00
Richard Barry d26c31e518 Still updating the STM32L demo project - still a work in progress. 2010-12-19 23:19:02 +00:00
Richard Barry c015ea5cfe Developing STM32L152 demo - still a work in progress. 2010-12-19 20:31:41 +00:00
Richard Barry 69d1fc1a13 Starting point for the STM32L152 demo application added. Very much a work in progress. 2010-12-19 19:20:56 +00:00
Richard Barry ed2a5c4ed0 Updated comments only on Demo/Common/Minimal/recmutex.c 2010-12-10 16:33:14 +00:00
Richard Barry 71fd1adbad Removed the nonsensical parameter from the traceTASK_CREATE_FAILED() macro in tasks.c. 2010-12-08 20:25:24 +00:00
Richard Barry dc8f964534 Edited the #error message to remove the " marks from the middle of the string.
Used a conditional compilation around the task tag related functions to loosen the strict header file inclusion ordering.
2010-12-08 18:59:30 +00:00
Richard Barry 14dbfbb861 Removed the nonsensical parameter from the traceTASK_CREATE_FAILED() macro in tasks.c. 2010-12-08 18:58:01 +00:00
Richard Barry 5347d4fa8f Change the terminology from 'pseudo' to 'simulated' in the Win32 port layer. 2010-12-08 17:10:25 +00:00
Richard Barry 1677ec5c60 Update the Red Suite LPC1768 project and source to use the latest version of the tools. 2010-11-25 13:21:39 +00:00
Richard Barry 19cdcbd681 Delete the now obsolete syscalls.c file from the Red Suite LPC17xx demo. 2010-11-24 20:53:55 +00:00
Richard Barry 9fa197fa9c Update the CMSIS files included in the Red Suite LPC17xx demo. 2010-11-24 20:53:02 +00:00
Richard Barry 93b74b6f8d Remove the 'death' tasks from the demo as on Win2K and WinXP the behaviour of the TerminateThread() function is such that resources leak and eventually the 'death' tests will fail. 2010-11-22 16:11:16 +00:00
Richard Barry 97ce25072a Remove the 'death' tasks from the demo as on Win2K and WinXP the behaviour of the TerminateThread() function is such that resources leak and eventually the 'death' tests will fail. 2010-11-22 16:10:42 +00:00
Richard Barry f3dbcaf725 Added in the 'death' tasks to the MingW Win32 demo. 2010-11-22 10:46:54 +00:00
Richard Barry 853250260c Added in the 'death' tasks to the Win32 MSVN demo. 2010-11-22 10:40:43 +00:00
Richard Barry ab9bf58818 Win32 port:
Separate out the interrupt handlers into separate functions so they can be installed into the array of interrupt handlers.
Reverse the priorities of the pseudo interrupt handler and tick generate threads so the extra hand shaking event can be removed.
2010-11-22 10:38:43 +00:00
Richard Barry 0ecde20ab3 Lowered the thread priorities used by the Win32 port, and added in a method to delete tasks in the Win32 port. 2010-11-22 09:52:36 +00:00
Richard Barry a3c26cad3d Update to MSVC Win32 demo project file. 2010-11-21 21:00:46 +00:00
Richard Barry b09733cdfc Added the MingW/Eclipse project for the new Win32 port. 2010-11-21 20:59:57 +00:00
Richard Barry ba18beae47 Greatly simplified the Win32 port by only allowing threads to run on a single CPU core. 2010-11-21 20:55:04 +00:00
Richard Barry 6b9379ee87 Greatly simplified the Win32 port by only allowing threads to run on a single CPU core. 2010-11-21 20:53:13 +00:00
Richard Barry d50618f375 Remove unused definitions from the Win32 demo main.c file. 2010-11-21 14:50:43 +00:00
Richard Barry bbcdcb0ba1 Just changed the comments only for the Win32 port.c file. 2010-11-21 14:36:36 +00:00
Richard Barry abadea4557 Updated the Win32 MSVC demo files. 2010-11-21 14:35:36 +00:00
Richard Barry 37b6fb5773 Changed vPortCheckCorrectThreadIsRunning() in the Win32 port layer to use the Win32 thread ID rather than its handle. 2010-11-21 14:06:23 +00:00
Richard Barry 60bea08b22 Added the traceTAKE_MUTEX_RECURSIVE_FAILED() macro. 2010-11-21 11:35:48 +00:00
Richard Barry 2fc309624b Added vPortCheckCorrectThreadIsRunning() function to the Win32 port layer to trap when Windows is not running the correct thread and try and catch it. 2010-11-21 11:34:12 +00:00
Richard Barry 1ae93fbb63 Add in a missing initialisation to zero for a variable in recmutex.c. Should not really make any difference as the variable should be cleared to zero by the C start up code anyway. 2010-11-20 14:37:25 +00:00
Richard Barry e867904a89 Remove the trace lines from the Win32 port.c. 2010-11-20 14:20:09 +00:00
Richard Barry ab2eb016c1 Work on Win32 port layer - removing the need to store the critical section nesting count as part of the Win32 thread context. 2010-11-19 22:37:02 +00:00
Richard Barry 8133188eee Win32 port.c - working ok in co-operative mode, but pre-emptive thread scheduling still problematic. 2010-11-18 16:41:44 +00:00
Richard Barry a49f0aa88a Spell check Win32 port.c only. 2010-11-16 10:33:50 +00:00
Richard Barry 0de50e377c Added in more demo apps to the Win32 demo. 2010-11-15 22:30:47 +00:00
Richard Barry c30b4242bb Replace waitable timer with sleep function in Win32 port layer. 2010-11-15 22:29:28 +00:00
Richard Barry 93b07f3db7 Updated Win32 port layer so that end of interrupt events are only sent to threads that are actually waiting for them. 2010-11-15 20:23:08 +00:00
Richard Barry 9a0b608591 Start of new Win32 emulator project. Currently working but not well tested, and does not include a method for shutting down the generated processes. 2010-11-14 21:01:50 +00:00
Richard Barry 7a623479dd Start of new Win32 emulator project. Currently working but not well tested, and does not include a method for shutting down the generated processes. 2010-11-14 21:00:36 +00:00
Richard Barry 3b6ed5341f Update the IP address copy macro so it never relies on any byte alignment. 2010-11-08 21:59:23 +00:00
Richard Barry 86e6ede04c Update to FreeRTOS V6.1.0 release candidate. 2010-09-23 18:07:41 +00:00
Richard Barry 4778bd45e7 Update to FreeRTOS V6.1.0 release candidate. 2010-09-23 16:36:25 +00:00
Richard Barry 7ce7d21ca8 Allow tasks to be suspended immediately after creation - provided the scheduler is not running.
Add API function that allows the tick count to be queried from an interrupt.
2010-09-23 13:54:37 +00:00
Richard Barry ad451e8b70 Remove the .dep file from the IAR RX project. The file should not have been included in the first place. 2010-09-23 13:41:47 +00:00
Richard Barry fd5aeffadd Replace the hard coded interrupt priorities with the configKERNEL_INTERRUPT_PRIORITY and configMAX_SYSCALL_INTERRUPT_PRIORITY definitions in the IAR RX port layer. 2010-09-23 13:39:45 +00:00
Richard Barry bdef78d6a2 Prepare the RX GNU demo application for release. 2010-09-23 13:14:34 +00:00
Richard Barry f352dc846b Replace the hard coded interrupt priorities with the configKERNEL_INTERRUPT_PRIORITY and configMAX_SYSCALL_INTERRUPT_PRIORITY definitions in the IAR RX port layer. 2010-09-23 13:13:26 +00:00
Richard Barry 66c1a9b76d Replace asm wrappers to interrupt handlers with functions that use the interrupt attribute. 2010-09-22 22:03:40 +00:00
Richard Barry c92128869d Replace asm wrappers to interrupt handlers with functions that use the interrupt attribute. 2010-09-22 22:02:54 +00:00
Richard Barry eea2ab0385 Back only. 2010-09-22 21:31:33 +00:00
Richard Barry 8c8efdcc4e Back only. 2010-09-22 21:29:57 +00:00
Richard Barry b4d26652b9 Start process of changing project name to include RDK in its title to place of RSK. 2010-09-22 13:00:51 +00:00
Richard Barry f4aa3f61e1 Start process of changing project name to include RDK in its title to place of RSK. 2010-09-22 12:59:42 +00:00
Richard Barry 45fad778a4 Start to iron out the mods required in switching from the RX RSK hardware to the RDK hardware. 2010-09-22 12:57:57 +00:00
Richard Barry 17add98d2f Starting point for the RX RDK version of the demo app. 2010-09-22 12:48:21 +00:00
Richard Barry 07006b001e Prepare the RSK RX demo for conversion to run on the RDK. 2010-09-22 09:25:13 +00:00
Richard Barry 828d8df74e Start to change the GNURX project name to use RSK in place of MDK. 2010-09-22 09:16:08 +00:00
Richard Barry 270a06fb9a Start to change the GNURX project name to use RSK in place of MDK. 2010-09-22 09:14:55 +00:00
Richard Barry edfeb212ae Change the RX/GCC memory map to move the stacks further away from the .data section. 2010-09-22 08:32:22 +00:00
Richard Barry 296c1eabfc Formatting only. 2010-09-21 21:11:42 +00:00
Richard Barry f052e7c00f When creating a task - move where the task handle is assigned to the function parameter from after the critical section. This allows the handle to be assigned to a global variable, and the global variable to be access by the task being created should the task being created execute immediately that the critical section is exited. 2010-09-21 21:10:41 +00:00
Richard Barry 1ec24e1d46 Remove possibility of having multiple definitions of DEBUG in uip_arp.c. 2010-09-21 21:06:16 +00:00
Richard Barry b2238eb8c0 Update the RX GCC port - optimised build is working, unoptimised not. 2010-09-21 21:04:39 +00:00
Richard Barry 1c56717a0f RX GCC port - Introduce macros that perform the interrupt entry and exit manually, then move the asm code back as naked functions within the port.c file. 2010-09-20 20:02:48 +00:00
Richard Barry 0ef04cd7bd RX GCC port - Introduce macros that perform the interrupt entry and exit manually, then move the asm code back as naked functions within the port.c file. 2010-09-20 20:01:00 +00:00
Richard Barry c788ecec17 Rename MDK to RSK for the RX ports. 2010-09-20 11:20:51 +00:00
Richard Barry 0615862c9e Temporarily revert the AVR32 port back to the V6.0.5 files. Work will continue on the reverted files following the next release. 2010-09-20 11:16:19 +00:00
Richard Barry ef35a4aab1 Temporarily revert the AVR32 port back to the V6.0.5 files. Work will continue on the reverted files following the next release. 2010-09-20 11:11:34 +00:00
Richard Barry 18f5af7195 Temporarily revert the AVR32 port back to the V6.0.5 files. Work will continue on the reverted files following the next release. 2010-09-20 11:08:39 +00:00
Richard Barry 8f6f5820aa 2010-09-20 10:44:40 +00:00
Richard Barry d7d63dbe77 2010-09-20 10:43:23 +00:00
Richard Barry 47354eddcb Update SAM3U project to use new flash loader settings. 2010-09-18 14:05:49 +00:00
Richard Barry 55c6e20370 Update to build with C99. 2010-09-18 13:41:28 +00:00
Richard Barry feecfc5319 Update the definition of __inline to build with C99. 2010-09-18 13:33:52 +00:00
Richard Barry 25f980aabe Update the definition of __inline to build with C99. 2010-09-18 13:24:26 +00:00
Richard Barry d27e63a8ca Update the definition of __inline to build with C99. 2010-09-18 13:20:52 +00:00
Richard Barry 59204f7720 Commit the RX IAR projects ready for release. 2010-09-14 15:35:38 +00:00
Richard Barry e77c5ca723 Commit the RX Renesas/HEW projects ready for release. 2010-09-14 15:35:00 +00:00
Richard Barry 84394bf0a9 Commit the RX IAR projects ready for release. 2010-09-14 13:57:49 +00:00
Richard Barry 2a44b5641d Commit the RX IAR projects ready for release. 2010-09-14 13:48:11 +00:00
Richard Barry 0723a674f2 First version of IAR project for RX RDK added. 2010-09-13 10:39:40 +00:00
Richard Barry 5f95494dff FreeTCPIP - remove compiler warnings. 2010-09-12 21:06:00 +00:00
Richard Barry f43bd20a6d Tidy up the RDK/Renesas/RX port to get rid of compiler warnings, and correct some of the variable naming. 2010-09-12 21:02:55 +00:00
Richard Barry 2cf67be590 Tidy up the MDK/Renesas/RX port to get rid of compiler warnings, and correct some of the variable naming. 2010-09-12 21:01:29 +00:00
Richard Barry 9c3e8b0228 Add in web server to RX/IAR demo application. 2010-09-12 20:56:04 +00:00
Richard Barry c7fbe1d601 Some re-formatting of uip.c. 2010-09-10 18:45:22 +00:00
Richard Barry 2641267c85 Some re-formatting of uip.c. 2010-09-10 18:40:31 +00:00
Richard Barry 904e22b667 Include pack struct macros for RX architecture. 2010-09-09 19:47:24 +00:00
Richard Barry e4c8a7957f Prepare RX RDK project for release. 2010-09-09 19:43:56 +00:00
Richard Barry 3780491aeb Prepare RX MDK project for release. 2010-09-09 18:31:16 +00:00
Richard Barry 23ca0009e3 Update the RX MDK demo to include the web server. Minor tidy up to the RDK version too. 2010-09-09 16:26:42 +00:00
Richard Barry 2fca46e3e4 Changed buffer configuration in Ethernet driver for RX RDK port. 2010-09-09 09:54:18 +00:00
Richard Barry ccf36aeed4 Removed the critical section that was left in by mistake. Also changed the delay period while waiting for the Ethernet semaphore. Both in the RX RDK demo. 2010-09-09 09:41:52 +00:00
Richard Barry a91ec6efe7 Updated compiler version for RX RDK demo and completed initial web server demo. Still some tidying up to do. 2010-09-09 08:39:10 +00:00
Richard Barry a4893aed60 Start to configure the uIP demo for the RX RDK hardware. ping is working, but thus far the web server is not. 2010-09-05 20:06:30 +00:00
Richard Barry 2e0af9b6e6 Add low level Ethernet driver files to the RX RDK project. 2010-09-04 18:29:56 +00:00
Richard Barry f14011feb3 All relating to the RX600 RDK demo - which is still a work in progress:
Change LED numbers to match silk screen.
Include Ethernet port pin configuration in HardwareSetup().
Convert EMAC.c to be correct for the RX (was based on SH2A file).
Add uIP task creation into main.c.
2010-09-04 18:20:45 +00:00
Richard Barry 817859005a Removed files/directories that were accidentally added to the wrong base directory. 2010-09-02 09:14:39 +00:00
Richard Barry ee077a6b9a Starting point for the RDK webserver files added. 2010-09-02 09:13:14 +00:00
Richard Barry 659a27800f Starting point for the RDK webserver files added. 2010-09-02 09:06:39 +00:00
Richard Barry 0363b47c66 Correct some of the LED usage in the RX demos - where apparently two wrongs did make a right. 2010-08-31 18:14:37 +00:00
Richard Barry a47ead46e8 Start of project for the RDK board. Not yet complete. 2010-08-31 18:11:19 +00:00
Richard Barry bb26ea557f Some changes to the RX/Renesas main-full.c file to tidy up a bit. 2010-08-29 18:05:06 +00:00
Richard Barry c1dca1a069 Added a critical section around the call to vTaskIncrementTick() in all the RX ports. 2010-08-29 17:57:32 +00:00
Richard Barry 9f83e74cb1 Work on the RX62N IAR demo, which is now functional. 2010-08-29 17:15:14 +00:00
Richard Barry 50b4b6619d Minor tidying up of IntQueue.c to prevent compiler warnings. No functional difference. 2010-08-29 17:13:46 +00:00
Richard Barry 5c75dd907e Update the IAR RX62N port files, which are now functional. 2010-08-29 17:12:12 +00:00
Richard Barry a418d78163 Start point for RX62N port layer for IAR - not necessarily complete yet. 2010-08-29 14:12:05 +00:00
Richard Barry 7768a4e02c Starting point for an IAR RX62N project - not yet a working project. 2010-08-29 14:10:58 +00:00
Richard Barry 9af437a3a9 Simply tidy up the bracketing of a couple of expressions in tasks.c. 2010-08-29 07:25:09 +00:00
Richard Barry c4217432f2 Update RX GCC port - including extracting all inline asm into separate asm file. 2010-08-29 07:24:30 +00:00
Richard Barry 23b1023a7a Remove the Renesas RX project that had the old directory name. This has been updated so the board the project uses in the name of the demo directory. 2010-08-29 07:23:06 +00:00
Richard Barry ddf4f4eb1e Check in the RX/GCC demo for backup purposes - this is not yet a working project. 2010-08-29 07:19:34 +00:00
Richard Barry 0fcac53cf8 Continued work on the RX62N GCC demo - just a work in progress currently. 2010-08-26 16:01:58 +00:00
Richard Barry 314b692440 Create starting point for RX62N GCC port. Just a work in progress at the moment. 2010-08-26 15:59:25 +00:00
Richard Barry 1ee62d835d Create starting point for GNURX RX62N HEW project. 2010-08-25 16:06:53 +00:00
Richard Barry 8c5b77635e Add a -1 to the calculation of the compare match value. 2010-08-23 15:59:07 +00:00
Richard Barry ac19e40336 Just tidy up the RX port files. 2010-08-22 18:28:48 +00:00
Richard Barry a33e3b3979 Corrected comment in SH2A demo project main.c. 2010-08-22 11:46:36 +00:00
Richard Barry 4b8e4c7520 Continue development, plus add Blinky build configuration. 2010-08-22 11:45:24 +00:00
Richard Barry cfc3911721 Changed RX project directory structure and name. 2010-08-22 08:44:51 +00:00
Richard Barry 9391d8a186 Continue development on RX port - work in progress. 2010-08-22 08:32:09 +00:00
Richard Barry 68201d2f99 Added a lot more standard demo tasks to the RX demo. 2010-08-20 19:42:40 +00:00
Richard Barry cc7c4acf02 Added IntQueue demo/test to the RX demo. 2010-08-20 19:11:56 +00:00
Richard Barry 27683e7360 Implemented portYIELD_FROM_ISR() for RX port. 2010-08-20 19:10:42 +00:00
Richard Barry 4b3cf6221b Continue work on RX600 port - work in progress. 2010-08-18 20:36:44 +00:00
Richard Barry 810f45a61c Continue work on RX600 port - work in progress - add the actual context switch function. 2010-08-18 20:36:00 +00:00
Richard Barry 64fc1907ec Continue work on RX600 port - work in progress. 2010-08-18 13:31:12 +00:00
Richard Barry df410c7e27 Continue work on RX600 port - work in progress. 2010-08-18 13:29:12 +00:00
Richard Barry 49c5f327fc Add new file to RX demo. 2010-08-16 10:40:33 +00:00
Richard Barry 383f0b0f2f Continue work on RX600 port - work in progress. Added the SET/CLEAR from ISR macros. 2010-08-13 17:49:15 +00:00
Richard Barry 21898cc9d9 Continue work on RX600 port - work in progress. 2010-08-13 17:38:50 +00:00
Richard Barry 6052827afe Continue work on RX600 port - work in progress. 2010-08-13 17:37:36 +00:00
Richard Barry 3e4eb6e7ae Continue work on RX600 port - work in progress. 2010-08-13 10:21:54 +00:00
Richard Barry fc050c4ab9 Continue work on RX600 port - work in progress. 2010-08-13 07:17:30 +00:00
Richard Barry c8e98a097e Starting point for new port - a project that will build, but as yet no implementation. 2010-08-12 13:22:25 +00:00
Richard Barry b2929dc036 Starting point for new port - a project that will build, but as yet no implementation. 2010-08-12 13:19:52 +00:00
Richard Barry e854ebf1f5 Just tidy up indentation in SuperH port.c. 2010-08-11 17:56:33 +00:00
Richard Barry 8f6e5062d4 Changed how the calculation of xFreeBytesRemaining is performed in the case where a block of RAM is split before being returned to the callee. 2010-07-20 18:46:12 +00:00
Richard Barry 65d501d718 Continue development of STM32 Rowley demo. 2010-07-07 11:48:04 +00:00
Richard Barry 28b5ea32a4 Add in a basic USART driver and echo test task. 2010-07-06 21:12:01 +00:00
Richard Barry 4ab0313273 Continue work on new AVR32 port and demo. 2010-06-21 14:57:05 +00:00
Richard Barry 47cfc16aa0 Add batch file that generates the local directory structure to allow the new AVR32 UC3 demo to be build using an Eclipse managed make project. 2010-06-13 17:34:45 +00:00
Richard Barry 8405dbe3d5 Create an updated AVR32 UC3A project. 2010-06-13 14:10:42 +00:00
Richard Barry d31b403659 Create an updated AVR32 UC3A project. 2010-06-13 14:05:36 +00:00
Richard Barry 52ceb8de51 Create an updated AVR32 UC3A project. 2010-06-13 14:02:53 +00:00
Richard Barry 025b08cddf Create an updated AVR32 UC3A project. 2010-06-13 14:01:59 +00:00
Richard Barry 7bee13dfdc Removed outdated AVR32 demo. 2010-06-13 13:57:47 +00:00
Richard Barry 357f7fe56a Removed outdated AVR32 demo. 2010-06-13 13:55:37 +00:00
Richard Barry 1b2d31eac4 Removed outdated AVR32 demo. 2010-06-13 13:54:06 +00:00
Richard Barry d09fcd3abe Removed outdated AVR32 demo. 2010-06-13 13:53:05 +00:00
Richard Barry 61dc1e332a Removed outdated AVR32 demo. 2010-06-13 13:52:31 +00:00
Richard Barry c63be7c451 Just updated the version string #define. 2010-06-13 13:41:18 +00:00
Richard Barry e03f239692 Work in progress - checked in for backup only. 2010-06-07 15:24:50 +00:00
Richard Barry 02db572328 Renamed ParTest.c to ParTest_MSBSTM32.c so an alternative ParTest can also be included. 2010-06-07 14:31:13 +00:00
Richard Barry 5472e527b5 Added STM32 Rowley demo. 2010-06-04 14:45:49 +00:00
Richard Barry fa73924b8d Add Cortus port to produce V6.0.5. 2010-05-17 18:16:17 +00:00
Richard Barry f89b22f9d1 Add Cortus port to produce V6.0.5. 2010-05-17 18:12:16 +00:00
Richard Barry 6818a478c6 Add Cortus port to produce V6.0.5. 2010-05-17 18:06:11 +00:00
Richard Barry 9a54446449 Add Cortus port to produce V6.0.5. 2010-05-17 18:00:27 +00:00
Richard Barry c73b3dc304 Add Cortus port to produce V6.0.5. 2010-05-17 15:41:58 +00:00
Richard Barry 4a5ea9e237 Add exit() function just to prevent loads of the standard library from being included in the build. 2010-05-17 14:52:27 +00:00
Richard Barry 18d6c565e6 Corrected mistake in sample code for xCoRoutineCreate(). 2010-05-01 01:35:52 +00:00
Richard Barry 1aca141247 Update comments at head of Cortus demo files to show correct version number. 2010-03-30 13:01:00 +00:00
Richard Barry a2b1a64ba1 Finish off the Cortus demo application:
+ Add a traceTASK_SWITCHED_OUT macro as part of the RegTest.c.
+ Add task to test the saving and restoring of the interrupt mask.
+ Change the serial port interrupt handlers to use naked functions.
2010-03-29 14:04:11 +00:00
Richard Barry f4d8802850 Modify Cortus save and restore macros to save and restore the entire context, so as not to rely on anything the compiler is doing. 2010-03-29 14:01:36 +00:00
Richard Barry 1ae4ae2348 Deleted the commented out naked attribute. 2010-03-28 17:48:00 +00:00
Richard Barry 0821d5201e Rename the portRESTORE_CONTEXT_REDUCED macro to portRESTORE_CONTEXT. 2010-03-28 17:46:57 +00:00
Richard Barry afe2d4fc38 Simplify the Cortus port - removing the interrupt stack and interrupt nesting capability. 2010-03-28 17:44:06 +00:00
Richard Barry f8b7288033 Continue work on Cortus demo. 2010-03-26 20:28:19 +00:00
Richard Barry c848059d5f Work in progress on the Cortus port. 2010-03-26 20:27:10 +00:00
Richard Barry a671be77bf Add the regtest tasks to the Cortus demo. 2010-03-26 12:43:00 +00:00
Richard Barry b492b7eb89 Minor formatting and name changes only. 2010-03-26 10:03:32 +00:00
Richard Barry a93c8d6659 Add Cortus demo. 2010-03-24 11:24:21 +00:00
Richard Barry e65ab7222c Add directory for Cortus demo. 2010-03-24 11:22:36 +00:00
Richard Barry 1aed974822 Change name of constant to match coding standard. 2010-03-24 11:06:33 +00:00
Richard Barry 0d8229a087 The start of an APS3 port. 2010-03-19 14:22:34 +00:00
Richard Barry 2596728679 Initialised xFreeBytesRemaining where it is declared so xPortGetFreeHeapSize() returns a valid value even before the heap has been initialised. 2010-03-19 09:45:12 +00:00
Richard Barry 808bb8e159 Update the V6.0.4. The primary difference being that the unsupported demos have now been removed from the download, and instead placed in their own forums. 2010-03-14 11:55:16 +00:00
Richard Barry 71b23456fd Remove log file which should not have been part of the repository. 2010-03-14 11:33:11 +00:00
Richard Barry c4a14fc1ef Added back the Unsupported_Demos directory, but this time containing just a .txt file with a link to the page that describes how the demos can be obtained. 2010-03-14 11:27:28 +00:00
Richard Barry 3382b13855 Remove the unsupported demos directory. The files it contains are now available at http://interactive.freertos.org. 2010-03-13 20:39:49 +00:00
Richard Barry 73ee7479e4 Correct spelling in comment. 2010-03-13 20:37:16 +00:00
Richard Barry c981185506 Very first demo for the Energy Micro EFM32 added. 2010-03-13 19:20:19 +00:00
Richard Barry 8fc041a994 Update to use V2 of the CPU support pack from Rowley. 2010-03-11 13:29:05 +00:00
Richard Barry 85e6e01995 Removed unused files. 2010-02-25 16:36:32 +00:00
Richard Barry e262d95404 Ready for V6.0.3 release. 2010-02-25 13:41:09 +00:00
Richard Barry ec0f5ed043 Tidy up SuperH port a bit ready for release. 2010-02-18 13:34:46 +00:00
Richard Barry 450e344455 Tidy up SuperH port a bit ready for release. 2010-02-18 13:23:00 +00:00
Richard Barry e35180acd9 Tidy up SuperH port a bit ready for release. 2010-02-18 13:21:33 +00:00
Richard Barry 9b27b75715 Continue work on the SH2A port. 2010-02-15 17:16:38 +00:00
Richard Barry 04c48138a8 Change path to included header files so they are now included from the apps directory. 2010-02-15 17:15:10 +00:00
Richard Barry b25f24cb75 Continue work on SH2A demo. 2010-02-15 17:13:58 +00:00
Richard Barry 0978152144 Add back in the uip_arch.h header file. 2010-02-15 14:47:29 +00:00
Richard Barry 804d39fb69 Another two header files added back having been previously removed. 2010-02-13 22:08:45 +00:00
Richard Barry d60032cec3 Not much more than a reformatted uIP so far - this will eventually replace the FreeRTOS-uIP files. 2010-02-13 21:15:28 +00:00
Richard Barry 7c54dfea37 Add back in header file that was mistakenly removed prior to previous check in. 2010-02-13 21:01:26 +00:00
Richard Barry 90ec8c2b57 Added file required to build demo. 2010-02-13 21:00:16 +00:00
Richard Barry 92ae2d0724 Update SuperH port to include WEB server. 2010-02-13 18:57:15 +00:00
Richard Barry bbe10cf550 Add new files to the SuperH project. 2010-02-12 15:27:07 +00:00
Richard Barry 2ce61bafdc Not to be added for the next release, so removed to avoid confusion. 2010-02-01 13:38:03 +00:00
Richard Barry 416fcd3a3d Change case of name for consistency with other lwIP directories. 2010-01-25 19:04:45 +00:00
Richard Barry 073e831bcf Added latest lwIP source. 2010-01-25 12:54:55 +00:00
Richard Barry 06c89adf1e Remove the .bak files that were accidentally added to the repository. 2010-01-24 21:05:15 +00:00
Richard Barry 61dacf99ab 2010-01-24 21:04:32 +00:00
Richard Barry ef57fa8947 Start of new demo added. Still a long way to go. 2010-01-24 21:00:36 +00:00
Richard Barry 9849c9ccab General tidy up of SH files. 2010-01-17 16:32:43 +00:00
Richard Barry 99cc14b365 General tidy up of SH files. 2010-01-17 16:32:06 +00:00
Richard Barry 73b49130c6 Just updated comments. 2010-01-17 15:45:37 +00:00
Richard Barry 8dd9c7dfd9 Moved the definitions of pvPortMallocAligned() and pvPortFreeAligned() to freertos.h. 2010-01-17 14:22:55 +00:00
Richard Barry ebffeb7ae4 Added flop support. 2010-01-17 13:14:23 +00:00
Richard Barry 094945625d Add flop support. 2010-01-17 13:12:54 +00:00
Richard Barry 65b947b50f Still a work in progress. Checking in for backup only. 2010-01-16 17:09:39 +00:00
Richard Barry b75ec97ea9 Still a work in progress. Checking in for backup only. 2010-01-16 17:07:44 +00:00
Richard Barry b60eba005a Change interrupt mask in yield function. 2010-01-16 11:40:41 +00:00
Richard Barry 559e2a850f Still a work in progress. Need to add flop support. 2010-01-15 17:20:09 +00:00
Richard Barry 188a2c0cc1 Still a work in progress. Need to add flop support. 2010-01-15 17:18:47 +00:00
Richard Barry 1aa471d0ec Work in progress. 2010-01-14 12:24:29 +00:00
Richard Barry 68074c03d6 Work in progress. 2010-01-14 12:23:07 +00:00
Richard Barry c99f3c55cd Update to V6.0.2. 2010-01-09 14:48:45 +00:00
Richard Barry 4f59d550c6 Update to V6.0.2. 2010-01-09 14:31:39 +00:00
Richard Barry f902211804 Update resource files for latest IAR releases. 2010-01-09 14:03:33 +00:00
Richard Barry b016c8bfb5 Update IAR version used. 2010-01-08 19:08:53 +00:00
Richard Barry bf9b20e6b8 Change "SWI" to "SWI 0". 2010-01-08 14:25:12 +00:00
Richard Barry ac94fdddf1 Again, just corrected some comments. 2010-01-08 14:21:33 +00:00
Richard Barry a3cb76d07a Corrected a comment. 2010-01-08 14:20:30 +00:00
Richard Barry 2dc8e16e68 Corrected a couple of comments. 2010-01-08 14:19:35 +00:00
Richard Barry e170cdef52 Skeleton for new port added. 2009-12-28 15:06:11 +00:00
Richard Barry bc0e754d87 Work in progress for backup only. 2009-12-27 22:20:42 +00:00
Richard Barry dbb3361ed9 Start a new demo for a new SH2A port. 2009-12-27 09:55:16 +00:00
Richard Barry 0840882d46 Change PIC32 stack byte alignment from 4 to 8. 2009-12-10 18:17:37 +00:00
Richard Barry 50ab249849 Added yet another type cast to the else if clause in xTaskCheckForTimeOut. This is to ensure it works correctly on ALL 16 bit compilers (hopefully). 2009-11-23 11:18:07 +00:00
Richard Barry 0bcacda16b vTaskList() now works for architectures where the stack grows up from low memory. 2009-11-23 10:43:04 +00:00
Richard Barry e439365343 Added configQUEUE_REGISTRY_SIZE definition. 2009-11-23 10:24:50 +00:00
Richard Barry c0fae3b4dd Changes in the comments only. 2009-11-23 10:23:31 +00:00
Richard Barry d41bc9028e Updated to work with the latest compiler - changed the .mac file and updated the linker script. 2009-11-22 21:38:51 +00:00
Richard Barry 9ec30de7f4 Update Cortex M3 ports to ensure 8 byte alignment. 2009-11-15 21:47:15 +00:00
Richard Barry db87c0ac06 Correct byte alignment on CM3 port layers. 2009-11-15 15:01:59 +00:00
Richard Barry a9625ce462 Change the function that sets up the initial stack on CM3 ports to account for the post decrement used by the MCU when it alters the stack on the way into/out of interrupts. 2009-11-14 19:02:12 +00:00
Richard Barry a06c91fcc1 Fixed typo. 2009-11-13 20:57:51 +00:00
Richard Barry 7c09eb2da7 Correct cut and paste comment error. 2009-10-25 10:33:01 +00:00
Richard Barry eb89065789 Update the Posix simulator to contain more features. 2009-10-15 11:59:20 +00:00
Richard Barry a75aec78ed Correct the auto reload value. 2009-10-15 11:57:49 +00:00
Richard Barry 0db3b5c258 Correct the auto reload value. 2009-10-15 11:56:48 +00:00
Richard Barry 26bf0da04e Change to the file headers only. 2009-10-13 11:05:41 +00:00
Richard Barry aedbbb8a5c Change to the file headers only. 2009-10-13 10:57:25 +00:00
Richard Barry 11ed4d6fba Change to the file headers only. 2009-10-13 10:54:32 +00:00
Richard Barry 7dbf3304b3 Tidy up only. 2009-10-13 09:17:39 +00:00
Richard Barry e00afda1b1 Correct compiler warnings when a certain configuration is set in FreeRTOSConfig.h. 2009-10-13 09:12:30 +00:00
Richard Barry 8560e094f2 Formatting only. 2009-10-13 09:11:17 +00:00
Richard Barry 8bbd6c243e Place #error string in quotes. 2009-10-11 22:33:58 +00:00
Richard Barry dc5c2a5371 Add same additional tests and demos as already in the Rowley version. 2009-10-11 22:31:20 +00:00
Richard Barry d80bf5e055 Remove unused definitions. 2009-10-11 22:25:59 +00:00
Richard Barry 2c761c6626 Add a few more tests and demos. 2009-10-11 11:53:07 +00:00
Richard Barry 448f83eb43 Add a few more tests and demos. 2009-10-11 09:30:12 +00:00
Richard Barry 9557f14233 Add missing cast where one of the static MPU blocks are configured. 2009-10-10 18:45:46 +00:00
Richard Barry 16612fb796 Removed the needs-lock property. 2009-10-10 18:44:47 +00:00
Richard Barry cacf4036b9 Correct type on comment. 2009-10-10 18:43:18 +00:00
Richard Barry 7c927d69d5 Add the tests performed by prvOldStyleUserModeTask(). 2009-10-10 18:41:14 +00:00
Richard Barry 9c349886af Add clobber lists to inline asm code. 2009-10-06 08:48:34 +00:00
Richard Barry d3f5c5348c Change where the free heap space variable is initialised. 2009-10-06 08:46:22 +00:00
Richard Barry 205b0dd863 Add clobber list to asm sections to allow use with higher optimisation. 2009-10-05 20:26:11 +00:00
Richard Barry 176aafbe00 Add portBYTE_ALIGNMENT definition to PC demos. 2009-10-05 12:17:50 +00:00
Richard Barry e90ba3e57f Add xPortGetFreeHeapSize() function. 2009-10-05 11:16:38 +00:00
Richard Barry 9468e36040 Remove unnecessary use of portLONG, portCHAR and portSHORT.
Change version number in headers.
2009-10-05 11:10:48 +00:00
Richard Barry f625cf929a Remove unnecessary use of portLONG, portCHAR and portSHORT.
Change version number in headers.
2009-10-05 11:01:09 +00:00
Richard Barry 23a5a73219 Remove unnecessary use of portLONG, portCHAR and portSHORT.
Change version number in headers.
2009-10-05 10:57:40 +00:00
Richard Barry 4322b8d649 Remove unnecessary use of portLONG, portCHAR and portSHORT.
Change version number in headers.
2009-10-05 10:28:54 +00:00
Richard Barry 64c701aff7 Remove unnecessary use of portLONG, portCHAR and portSHORT.
Change version number in headers.
2009-10-05 10:23:06 +00:00
Richard Barry 7f0c4ef656 Remove unnecessary use of portLONG, portCHAR and portSHORT.
Change version number in headers.
2009-10-05 10:08:35 +00:00
Richard Barry 506dd1b7c8 Remove unnecessary use of portLONG, portCHAR and portSHORT.
Change version number in headers.
2009-10-05 09:46:11 +00:00
Richard Barry 26f0258688 Remove unnecessary use of portLONG, portCHAR and portSHORT. 2009-10-04 18:34:36 +00:00
Richard Barry 804d114420 Add PRIVILEGED_FUNCTION qualifiers to port files. 2009-10-04 18:18:32 +00:00
Richard Barry 334bd8b66c Remove files accidentally added to repository. 2009-10-04 18:01:57 +00:00
Richard Barry ee5608ddc2 Tidy up, starting to get ready for next release. 2009-10-04 17:59:49 +00:00
Richard Barry a7462db433 Update to fit using later Keil version. 2009-10-04 14:56:54 +00:00
Richard Barry 1b3ceba83f Just remove compiler warning. 2009-10-04 10:59:01 +00:00
Richard Barry 2b2324a7e7 Add R32C contributed port. 2009-10-04 10:08:25 +00:00
Richard Barry 8c5f57a134 Correct spelling mistake only. 2009-10-03 19:57:25 +00:00
Richard Barry d138104369 Reinstate privileged only RAM region when a task is running that does not otherwise make use of the MPU. 2009-10-03 19:56:09 +00:00
Richard Barry 5eeea3373f First Red Suite project for FreeRTOS MPU. 2009-10-03 18:53:16 +00:00
Richard Barry c9b5c1332a Formatting only. 2009-09-30 20:18:36 +00:00
Richard Barry b5f93ce546 Update to latest Rowley version. 2009-09-30 20:17:17 +00:00
Richard Barry cf717acaae First version that includes the FreeRTOS-MPU implementation. 2009-09-30 20:16:26 +00:00
Richard Barry 291ea26bfe First version that includes the FreeRTOS-MPU implementation. 2009-09-30 20:12:31 +00:00
Richard Barry 6b7397ee92 Prepare for V6. 2009-09-29 20:11:12 +00:00
Richard Barry b7da8d7a1b Remove the portBYTE_ALIGNMENT_MASK definitions as they are now in the common portable.h file. 2009-09-29 20:07:44 +00:00
Richard Barry ad441634f0 Allow auto switching between creating tasks in ARM mode and THUMB mode. 2009-09-29 20:03:55 +00:00
Richard Barry afaa3321ba Allow auto switching between creating tasks in ARM mode and THUMB mode. 2009-09-29 20:03:09 +00:00
Richard Barry b500ab8be2 Allow auto switching between creating tasks in ARM mode and THUMB mode. 2009-09-29 20:02:16 +00:00
Richard Barry 2cb1578b30 Set ARM byte alignment to 8. 2009-09-29 20:01:17 +00:00
Richard Barry 2d958d3d2c Set ARM byte alignment to 8. 2009-09-29 19:58:05 +00:00
Richard Barry 98ed4f2a20 Update for V6. 2009-09-29 19:49:54 +00:00
Richard Barry 7dacae2ae9 New file added for V6. 2009-09-29 19:40:13 +00:00
Richard Barry c3473a1e49 Update to latest Rowley version. 2009-09-29 19:37:19 +00:00
Richard Barry 3c09399524 Ensure the user is forced to select an option through the use of a #error directive. 2009-09-29 19:34:04 +00:00
Richard Barry 1f12f80eb7 Ensure compiles using latest Yagarto. 2009-09-29 19:32:27 +00:00
Richard Barry a961f6daa3 Just checking in a file that was automatically updated by the IDE. 2009-09-29 19:30:14 +00:00
Richard Barry 13f92818a7 Update to latest IAR version. 2009-09-29 18:19:22 +00:00
Richard Barry bb17e05f63 Update to latest IAR version. 2009-09-29 18:18:47 +00:00
Richard Barry a9f422ed7c Update to latest IAR version. 2009-09-29 18:14:14 +00:00
Richard Barry b0f9c55325 Update to latest IAR version. 2009-09-29 18:13:38 +00:00
Richard Barry 87c8d2f87a Update to latest IAR version. 2009-09-29 17:46:10 +00:00
Richard Barry b7e0d0753a Update to latest IAR version. 2009-09-29 17:29:33 +00:00
Richard Barry 46b1b9f99d Update to latest IAR version. 2009-09-29 04:55:49 +00:00
Richard Barry c5c32913c9 Inline the asm function in the ISR wrapper. 2009-09-28 18:50:32 +00:00
Richard Barry e30b39e09f Auto updated file by the IDE. 2009-09-28 18:25:48 +00:00
Richard Barry 00462893c9 Use noinline attribute on C portion of asm functions, increase warning level and fix warnings output by new level. 2009-09-28 18:23:17 +00:00
Richard Barry 75c6804bb1 Test with latest IAR and Keil versions. 2009-09-28 18:15:32 +00:00
Richard Barry 07990a8c0c Added a couple of extra compiler options better for use with the latest Yagarto release. 2009-09-28 18:05:54 +00:00
Richard Barry d7ca9be54d Added a couple of extra compiler options better for use with the latest Yagarto release. 2009-09-28 18:01:57 +00:00
Richard Barry 8a6518c3b3 Test with latest IAR version. 2009-09-28 17:52:42 +00:00
Richard Barry b04f886ebd Updated for use with latest Yagarto release. 2009-09-28 17:15:51 +00:00
Richard Barry 5f896f1640 Added CM3 MPU demo. 2009-09-28 14:26:40 +00:00
Richard Barry 4640196beb Add CM3 MPU port. 2009-09-28 14:23:45 +00:00
Richard Barry 531faedf63 Update to use the latest Yagarto and change the C handler part of the interrupt routines to use the noinline attribute. 2009-09-18 20:27:00 +00:00
Richard Barry 7ff79ca26b Update to use the latest Yagarto and change the C handler part of the interrupt routines to use the noinline attribute. 2009-09-18 14:08:36 +00:00
Richard Barry 6bdf14c33f Update to use the latest Yagarto and change the C handler part of the interrupt routines to use the noinline attribute. 2009-09-18 14:04:40 +00:00
Richard Barry 9a76bc39cb Update to use Yagarto compiler and use the noinline attribute on the serial port handler function. 2009-09-18 13:55:43 +00:00
Richard Barry 4b7c5b07c1 Correct unintended duplication and slight wording change. 2009-08-20 13:49:12 +00:00
Richard Barry b401621a85 Correct the name of the new Cortex M3 demo directory. 2009-08-12 16:17:33 +00:00
Richard Barry 2d4ed1801b Update libdriver for Rowley demos. 2009-08-12 16:12:31 +00:00
Richard Barry 19216099d0 Add LM3Sxxx Rowley demo. 2009-08-12 16:10:55 +00:00
Richard Barry ed06a0400a Update to V5.4.2. See http://www.freertos.org/History.txt . 2009-08-09 19:10:57 +00:00
Richard Barry 1831418ec8 Prepare for release. 2009-08-09 14:03:25 +00:00
Richard Barry 5a5be9567c Start to prepare for release. 2009-08-09 14:02:07 +00:00
Richard Barry a4708c9fc8 Increase frequency to 99MHz. 2009-08-09 13:03:17 +00:00
Richard Barry fb01731f41 Initial IAR LPC1768 demo. Work in progress at this point. 2009-08-09 12:19:17 +00:00
Richard Barry 87bb2c58b2 Formatting only. 2009-08-09 12:11:16 +00:00
Richard Barry 790bacc8f2 Remove compiler warnings. 2009-08-09 12:10:34 +00:00
Richard Barry e9830a7ee3 Remove unused structure definition. 2009-08-09 12:09:18 +00:00
Richard Barry 27135c4a1c Just remove compiler warning. 2009-08-09 12:07:49 +00:00
Richard Barry 44b4467b26 Add simple USB CDC task. 2009-08-07 15:30:57 +00:00
Richard Barry df338c84c3 Add simple USB CDC task. 2009-08-07 15:30:18 +00:00
Richard Barry a83d9d93e8 Add a basic USB CDC example using LPCUSB. 2009-08-07 14:35:24 +00:00
Richard Barry d2a29ece23 Update new project file. 2009-08-06 20:31:17 +00:00
Richard Barry 3f3a091728 Correct the IF EXIST part of the batch file. 2009-08-06 20:20:22 +00:00
Richard Barry d2a9f9624b Rename Nios2 to NiosII. 2009-08-06 20:15:39 +00:00
Richard Barry ddb7c49f3c Add batch file to create the NiosII project directory structure. 2009-08-06 20:08:34 +00:00
Richard Barry 523ffada03 Add new NiosII demo project. 2009-08-06 19:36:48 +00:00
Richard Barry 5d6acacd7a Correct spelling error in comment only. 2009-08-06 19:33:06 +00:00
Richard Barry 6358344ea1 Added new Nios2 port layer. 2009-08-06 18:23:40 +00:00
Richard Barry 3a883a776c Update to V5.4.1 2009-07-25 20:14:06 +00:00
Richard Barry 87eb48c97c Explicit casting added to the 'check for time out' function to ensure integer promotion does not occur. 2009-07-25 18:10:16 +00:00
Richard Barry af6c245366 Decrease the configMINIMAL_STACK_SIZE setting to 190 to allow the demo to execute without running out of heap space. 2009-07-25 17:52:06 +00:00
Richard Barry 0528691833 Correct interrupt priority assignment. 2009-07-21 19:35:59 +00:00
Richard Barry 276356d9b5 Supply default setting for configUSE_MALLOC_FAILED_HOOK. 2009-07-21 17:33:02 +00:00
Richard Barry 4a1fbbca99 Added a call to vApplicationMallocFailedHook() when pvPortMalloc() returns NULL. 2009-07-21 17:25:55 +00:00
Richard Barry 7a3ac3c503 Suppress warning w6 2009-07-15 09:01:05 +00:00
Richard Barry f312118bf9 Ensure LPC1768 demos are correct prior to V5.4.0 release. 2009-07-12 19:00:28 +00:00
Richard Barry 42f3130b20 Add #error directive to instruct people to run the batch file so that the project directory structure is configured. 2009-07-12 16:50:08 +00:00
Richard Barry d4b8c84409 2009-07-12 16:49:14 +00:00
Richard Barry af4a71e6b5 Move .bat file up one directory. 2009-07-12 16:19:30 +00:00
Richard Barry f59ba6d86a Add extra files to the new LPC1768 Red Suite demo. 2009-07-12 14:46:25 +00:00
Richard Barry e6f3fa02dc Old LPC1766 Red Suite demo is being removed as it used pre-production silicon that was a little different to the production silicon. There is now a new LPC1768 Red Suite demo in its place. 2009-07-12 14:26:33 +00:00
Richard Barry b686daaa40 Add new LPC1768 RedSuite demo. 2009-07-12 14:23:25 +00:00
Richard Barry 09f28cb98c Add new LPC1768 RedSuite demo. 2009-07-12 14:19:52 +00:00
Richard Barry 28482990e0 Commit file deletions. 2009-07-12 14:04:30 +00:00
Richard Barry 9dace4de75 Prepare for release. 2009-07-12 14:02:12 +00:00
Richard Barry 079f9f4ee2 Add header file so it compiles with CrossWorks V2. 2009-07-09 17:55:27 +00:00
Richard Barry b4eea4fa68 Reluctantly convert to use the CMSIS header files. 2009-07-09 14:47:02 +00:00
Richard Barry 312b19b236 Continue work on Rowley LPC1768 demo. 2009-07-09 14:46:03 +00:00
Richard Barry ee0ff3a207 Update version number. 2009-07-07 09:58:26 +00:00
Richard Barry fdcc3676cd Update version number. 2009-07-07 09:41:29 +00:00
Richard Barry 836860067f Update version number. 2009-07-07 09:29:47 +00:00
Richard Barry 32105816be Set to use 32bit tick variables. 2009-07-06 08:16:40 +00:00
Richard Barry 0cc071f88a Tidy up Ethernet driver. 2009-07-05 20:47:10 +00:00
Richard Barry b92dd21bc5 Update EMAC driver. 2009-07-05 19:50:52 +00:00
Richard Barry 83c2470ead Continue work on emac driver. 2009-07-05 15:00:41 +00:00
Richard Barry ec5827a601 Update header files to include CMSIS files. 2009-07-05 13:48:46 +00:00
Richard Barry fe9d735641 Add Rowley LPC1768 demo. 2009-07-05 08:54:12 +00:00
Richard Barry 428dbc9342 Update some header files for use with the production standard silicon. 2009-07-05 08:48:08 +00:00
Richard Barry f154711652 2009-07-05 08:46:49 +00:00
Richard Barry f42b1510fa Ready the PPC440 projects for release. 2009-07-05 08:41:27 +00:00
Richard Barry 3634ebb497 Added PPC440 demo that does not use any floating point hardware. 2009-06-30 19:42:21 +00:00
Richard Barry b49cf69600 Add Virtex5 demo that uses the single precision floating point. 2009-06-30 19:39:09 +00:00
Richard Barry 9815654538 Add Virtex5 demo that uses the double precision floating point. 2009-06-30 19:35:54 +00:00
Richard Barry e36ece8d42 Add support for double precision floating point. 2009-06-30 19:24:32 +00:00
Richard Barry 09f991277e Add PPC440 port layer code. 2009-06-30 17:38:58 +00:00
Richard Barry 0a9fddb5d4 Add proper 8 byte alignment support. 2009-06-30 16:32:36 +00:00
Richard Barry 0b86cb1e2c New version of the Posix GCC simulator. 2009-06-22 09:15:58 +00:00
Richard Barry f1d6aa1a06 Prepare for V5.3.1 release. 2009-06-21 19:20:26 +00:00
Richard Barry fe1295fd25 Prepare for V5.3.1 release. 2009-06-21 19:10:37 +00:00
Richard Barry 7818ed5a97 Prepare for V5.3.1 release. 2009-06-21 19:07:47 +00:00
Richard Barry c2e02c0488 Update to work with latest RIDE version. 2009-06-21 13:10:28 +00:00
Richard Barry 4fda9b25f3 Add local copy of the library files as the common copy has changed and breaks this build. 2009-06-21 09:39:07 +00:00
Richard Barry 303da1a725 Add new STM32 driver files. 2009-06-21 08:22:46 +00:00
Richard Barry fb32554dc1 Add new STM32 driver files. 2009-06-21 08:22:07 +00:00
Richard Barry f525e50307 Add STM32 Ethernet driver files. 2009-06-21 08:21:11 +00:00
Richard Barry a5060cd1e2 New port layer files. 2009-06-20 19:53:16 +00:00
Richard Barry e52a6e390e New STM32 demo added. 2009-06-20 18:42:08 +00:00
Richard Barry 90874f8c2e Formatting only. 2009-06-20 16:49:16 +00:00
Richard Barry 1513fb6807 Update SPI driver header to latest version. 2009-06-20 16:46:05 +00:00
Richard Barry 16434894ee New driver files for Connectivity Line. 2009-06-20 16:45:08 +00:00
Richard Barry 1f501bb518 Update SPI driver header to latest version. 2009-06-20 16:43:26 +00:00
Richard Barry 01ffe66a83 Small mod for Connectivity Line demo. 2009-06-20 16:42:28 +00:00
Richard Barry 8f26ec2474 Replaced asm statements with __asm for building with CrossWorks V2. 2009-06-20 16:39:47 +00:00
Richard Barry c134405914 Added missing header file. 2009-06-20 16:25:14 +00:00
Richard Barry ae23ad7395 2009-06-03 18:22:58 +00:00
Richard Barry c0223a28fe Deleted the build files. 2009-06-01 11:48:10 +00:00
Richard Barry 151c72ab7c Add new demo files. 2009-06-01 11:45:26 +00:00
Richard Barry b5ab3cd823 Final mods prior to release. 2009-06-01 11:41:16 +00:00
Richard Barry c36f76a062 Add Red Suite project back in minus the workspace. 2009-05-30 19:24:07 +00:00
Richard Barry 756a1bb4ec Remove workspace from repository. 2009-05-30 19:22:23 +00:00
Richard Barry e739c978b8 Remove the oops. 2009-05-30 16:16:12 +00:00
Richard Barry 5bb9537bef Prepare for V5.3.0 release. 2009-05-30 16:15:29 +00:00
Richard Barry d79f029d9f Prepare for V5.3.0 release. 2009-05-30 16:14:31 +00:00
Richard Barry 5dcbec38e3 Prepare for V5.3.0 release. 2009-05-30 16:10:29 +00:00
Richard Barry aad5dce4a1 Prepare for V5.3.0 release. 2009-05-30 15:59:59 +00:00
Richard Barry c012651a66 Prepare for V5.3.0 release. 2009-05-30 15:56:05 +00:00
Richard Barry 4bf5521db6 Prepare for V5.3.0 release. 2009-05-30 15:51:41 +00:00
Richard Barry f24533b765 Added xTaskGetApplicationTaskTag() function. 2009-05-30 13:30:40 +00:00
Richard Barry 1ead7d162a Add xTaskGetApplicationTaskTag() prototype. 2009-05-30 13:27:54 +00:00
Richard Barry cae143cbbf Add portENTER_CRITICAL() macro. Previously it was an inline asm function but it needs to be a macro for portable.h to compile. 2009-05-30 13:26:38 +00:00
Richard Barry b57e4f4c36 Change structs to unions to save a few bytes. Normally unions are against the coding standard but in this case they are permitted as their use is purely to ensure byte alignment. 2009-05-30 13:25:16 +00:00
Richard Barry 3af07deca2 Add call to xTaskGetApplicationTaskTag(), just as a test as its new and not called anywhere else. 2009-05-30 13:23:16 +00:00
Richard Barry 695eed8eb4 Added several new contributed demos. 2009-05-29 19:33:41 +00:00
Richard Barry 2ebb35d75d Add LED.c to the working set. 2009-05-29 14:39:24 +00:00
Richard Barry 9a1a7cb4d2 Add LED.c to the working set. 2009-05-29 14:35:28 +00:00
Richard Barry 5ae2d11145 Remove compiler warning. 2009-05-29 14:32:38 +00:00
Richard Barry 6003973d5e Work in progress on the LPC1766 port. 2009-05-29 14:30:24 +00:00
Richard Barry a9a108a751 Correct typeo. 2009-05-29 08:12:46 +00:00
Richard Barry 53efcbb6c9 Updated description of the files in this directory. 2009-05-29 08:11:12 +00:00
Richard Barry b42009def0 Work in progress. 2009-05-28 20:40:12 +00:00
Richard Barry 25194d5918 Correct page heading. 2009-05-28 20:37:49 +00:00
Richard Barry 3db39eb99d Just remove compiler warnings. 2009-05-28 20:36:59 +00:00
Richard Barry cd7fb3fda1 Just remove compiler warnings. 2009-05-28 20:35:28 +00:00
Richard Barry 28aa468bd0 Formatting only. 2009-05-28 20:34:32 +00:00
Richard Barry 4965cdb367 Update as Eclipse decided to delete and add files. 2009-05-28 12:20:58 +00:00
Richard Barry f626f8ce19 Update .project to latest Code Red version. 2009-05-28 12:16:46 +00:00
Richard Barry 9b2035aa90 Update .project to latest Code Red version. 2009-05-28 12:13:21 +00:00
Richard Barry ef3795d7c0 Remove the .lock file from the repository. 2009-05-28 11:53:17 +00:00
Richard Barry 51404a713e First LPC17xx demo added. 2009-05-28 11:48:32 +00:00
Richard Barry 245bb81bc0 Moved the position of the traceTASK_DELETED() macro. 2009-05-22 15:35:40 +00:00
Richard Barry 25644cbf5d Update workspace for use with Ganymede. 2009-05-21 12:42:59 +00:00
Richard Barry 27934607e5 Updated the served WEB pages to include a page that shows the gathered task run time stats. 2009-05-21 12:29:06 +00:00
Richard Barry 1c1f614404 Added the macros necessary to gather the task run time stats information. 2009-05-21 12:27:21 +00:00
Richard Barry 2293b8ca53 Add variable to keep a count of the high frequency time tick occurrences. This is then used by the run time stats gathering macros. 2009-05-21 12:26:27 +00:00
Richard Barry c66301ac9e Update the run time stats display function. 2009-05-21 12:23:24 +00:00
Richard Barry 8243645ac8 Corrected version number. 2009-05-21 12:20:31 +00:00
Richard Barry 8b4ef53b69 Added run time stats functions. 2009-05-19 10:38:26 +00:00
Richard Barry 886be58c58 Formatting only. 2009-05-19 10:34:57 +00:00
Richard Barry 4c232cdc4e Formatting only. 2009-05-19 10:34:04 +00:00
Richard Barry b76158a10d Added vTaskGetRunTimeStats() prototype. 2009-05-19 10:33:12 +00:00
Richard Barry 6ed4d1d3da Add defaults for the new run time counter stats configuration constants. 2009-05-19 10:31:53 +00:00
Richard Barry a7f134911a Just a formatting change. 2009-05-03 08:28:14 +00:00
Richard Barry f1e278e193 Added comment to assist debugging. 2009-05-03 08:27:22 +00:00
Richard Barry 794edd476e Put in "catch all" portmacro.h include to allow the path to the correct portmacro.h file to be included as a compiler option. 2009-05-03 07:51:00 +00:00
Richard Barry 6f8158082a Remove .plg file as this is now put into the bin directory. 2009-04-27 09:17:48 +00:00
Richard Barry 515cd42702 Change project so output files go into a bin directory rather than being dumped in the project directory. 2009-04-27 09:15:19 +00:00
Richard Barry b4eddb4992 Update to latest IAR version format. 2009-04-27 09:10:43 +00:00
Richard Barry 8395c9a633 Add queue registry so the IAR plug-in can be tested. 2009-04-27 09:06:00 +00:00
Richard Barry da0c104de4 Update the WEB server demo. 2009-03-24 12:08:20 +00:00
Richard Barry 5af3321022 Add missing files. 2009-03-18 16:16:57 +00:00
Richard Barry 2f40ad7393 Ready for V5.2.0 release. 2009-03-14 19:20:12 +00:00
Richard Barry 975f102de9 Updated clean command to remove all object files. 2009-03-14 15:08:41 +00:00
Richard Barry 5f8b420aa5 Changed the use of critical sections to instead use scheduler locking as the BIOS functions exit with interrupts enabled no matter what the state when the BIOS function was called. 2009-03-14 15:07:06 +00:00
Richard Barry 42b60ed69c Increment the uxTaskNumber variable when a task is deleted in addition to when a task is created. This is to assist kernel aware debuggers detecting when the task list needs refreshing. 2009-03-14 15:04:44 +00:00
Richard Barry fa9a58c9c0 Added OMAP port and demo. 2009-03-12 20:45:59 +00:00
Richard Barry 143c58e032 Minor changes to new queue functions plus add comments. 2009-03-12 11:48:24 +00:00
Richard Barry 55c96044b0 Some optimisations added. 2009-03-11 10:55:41 +00:00
Richard Barry aaeb4790de Optimisations - being checked in for backup - not yet complete. 2009-03-11 10:53:45 +00:00
Richard Barry dae13395ed Closed un-terminated comment. 2009-03-10 12:22:30 +00:00
Richard Barry 4f2654fb0b Closed un-terminated comment. 2009-03-10 12:21:30 +00:00
Richard Barry a25d111613 Closed un-terminated comment. 2009-03-10 12:20:47 +00:00
Richard Barry eb6a668a8f Bug fix - loop count value was wrong. 2009-03-06 13:13:56 +00:00
Richard Barry d46a1e9699 Remove the NEC port as there is now a new an supported version. 2009-02-20 15:19:39 +00:00
Richard Barry 52ba0e651e Update to V5.1.2. 2009-02-09 20:21:35 +00:00
Richard Barry 2b388dacd1 Update startup file to workaround bug in IAR provided file. 2009-02-09 20:05:59 +00:00
Richard Barry cd8c28b070 Add comtest tasks to the AT91SAM9XE demo. 2009-02-09 20:03:16 +00:00
Richard Barry 9323cea425 Continued development on NEC ports. 2009-02-07 18:20:32 +00:00
Richard Barry fe73d24184 Add MCF52259 demo. 2009-02-07 17:52:41 +00:00
Richard Barry 8981a8539a Add hardware bug workaround for auto-negotiate errata. 2009-02-07 17:48:12 +00:00
Richard Barry 3741d47db2 Update pages served by WEB server. 2009-02-07 17:46:11 +00:00
Richard Barry 8a52afda6e Update pages served by WEB server. 2009-02-07 17:44:49 +00:00
Richard Barry aac296a7c8 Continued development on NEC ports. 2009-02-07 17:41:36 +00:00
Richard Barry c4a68ac620 Continued development on NEC ports. 2009-02-07 16:52:24 +00:00
Richard Barry e31fe0ef80 Remove unnecessary semicolon. 2009-02-06 13:30:39 +00:00
Richard Barry 812e63f87f Add a trap call to test the manual context switch in addition the the pre-emptive context switch. 2009-02-06 13:28:52 +00:00
Richard Barry 223feee46c Add more comments. 2009-02-06 13:27:41 +00:00
Richard Barry ea209490e1 Continue 78K0R development. 2009-02-06 13:25:05 +00:00
Richard Barry 4a3e471fda Continue 78K0R development. 2009-02-06 13:23:23 +00:00
Richard Barry 8c1495a57d Continue 78K0R development. 2009-02-06 13:21:35 +00:00
Richard Barry 23d63def3b Add code for near memory model. 2009-02-05 21:13:24 +00:00
Richard Barry 2d77a49535 Add code for near memory model. 2009-02-05 21:12:34 +00:00
Richard Barry 035abe8707 Add code for near memory model. 2009-02-05 21:11:24 +00:00
Richard Barry e4319d7f88 Continue 78K0R development. 2009-02-05 13:02:27 +00:00
Richard Barry e311bdb650 Continue 78K0R development. 2009-02-05 13:01:37 +00:00
Richard Barry 617ddbb61f Continue 78K0R development. 2009-02-05 10:40:24 +00:00
Richard Barry c1a2e601a6 Tidy up and comment. 2009-02-04 16:53:52 +00:00
Richard Barry bfd67da1e7 Continue 78K0R development. 2009-02-04 13:08:12 +00:00
Richard Barry 299557fed2 Continue 78K0R development. 2009-02-04 13:07:16 +00:00
Richard Barry 46425b4099 Continue 78K0R development. 2009-02-03 21:09:16 +00:00
Richard Barry 7acae9e570 Continue 78K0R development. 2009-02-03 21:07:17 +00:00
Richard Barry eef9900e23 First pass demo for 78K0R. 2009-02-03 19:46:32 +00:00
Richard Barry d4376e4bcc Add a little more commenting. 2009-02-03 15:21:51 +00:00
Richard Barry c8b25f8bf2 Tidy up new port file. 2009-02-03 15:20:05 +00:00
Richard Barry 18797cb689 Change name of asm file to be consistent with other ports. 2009-02-02 18:38:48 +00:00
Richard Barry e602554120 Renamed to remove the Fx3 from the directory name. 2009-02-01 21:03:38 +00:00
Richard Barry 33597ce971 Renamed to remove the Fx3 from the directory name. 2009-02-01 21:01:43 +00:00
Richard Barry 37402a9960 Renamed to remove the Fx3 from the directory name. 2009-02-01 20:29:36 +00:00
Richard Barry 97de395ad0 Add 78KR definition. 2009-01-31 14:48:50 +00:00
Richard Barry 7a83c44856 Tidy up and prepare for release. 2009-01-31 14:47:50 +00:00
Richard Barry 4e1b587af3 Extend FX16 functionality. 2009-01-31 14:11:22 +00:00
Richard Barry 0e91b60a7d Extend FX16 functionality. 2009-01-31 13:42:20 +00:00
Richard Barry 269de4b1e7 Extend FX16 functionality. 2009-01-31 12:56:33 +00:00
Richard Barry 46c3268670 Continue FX16 demo development. 2009-01-31 11:00:54 +00:00
Richard Barry f88f5afa3b Continue FX16 demo development. 2009-01-31 10:31:21 +00:00
Richard Barry d71ed5975c Continue FX16 demo development. 2009-01-30 16:28:08 +00:00
Richard Barry d61373702a Continue FX16 demo development. 2009-01-30 14:06:37 +00:00
Richard Barry 7551ede806 New 78K0R first pass files added. 2009-01-30 10:47:35 +00:00
Richard Barry d62f5ef24a Continued V850 development. 2009-01-30 09:26:16 +00:00
Richard Barry 667493bed2 Continued V850 development. 2009-01-29 21:27:10 +00:00
Richard Barry 4b4aecf217 Continued V850 development. 2009-01-29 21:26:43 +00:00
Richard Barry c7ff0f4b53 Continued V850 development. 2009-01-29 21:26:10 +00:00
Richard Barry 38511e8174 Add device specific versions of LowLevelInit.c. 2009-01-29 20:33:15 +00:00
Richard Barry 1e29358197 Combine different part variants into a single port.c file. 2009-01-29 20:00:56 +00:00
Richard Barry 08464adb74 Combine different part variants into a single port.c file. 2009-01-29 19:55:14 +00:00
Richard Barry 99d615a7dd Add device specific versions of portasm.s85. 2009-01-29 19:51:11 +00:00
Richard Barry adc5c7142b Rename to make file name more generic. 2009-01-29 17:32:19 +00:00
Richard Barry ccb960ca8b Rename to make file name more generic. 2009-01-29 17:30:54 +00:00
Richard Barry e2e988191c Rename to make file name more generic. 2009-01-29 17:29:10 +00:00
Richard Barry 5acfec1f7c Rename to make file name more generic. 2009-01-29 17:28:39 +00:00
Richard Barry f1890708e1 Continued V850 development. 2009-01-29 16:23:52 +00:00
Richard Barry 4d39dfe5a0 Tidy up only. 2009-01-29 16:22:42 +00:00
Richard Barry 34333e3d27 Continued V850 development. 2009-01-29 16:21:56 +00:00
Richard Barry 77fbf587ee Continued V850 development. 2009-01-29 16:20:25 +00:00
Richard Barry 42d07bc94b Split out the processor dependent stuff from main.c. 2009-01-29 15:06:24 +00:00
Richard Barry f622836e18 Add new port files for V850ES JJ3. 2009-01-29 14:49:47 +00:00
Richard Barry a256024aaa Add LED output routine for the JJ3 target board. 2009-01-29 14:46:41 +00:00
Richard Barry 87253992aa Rename device specific file. 2009-01-28 17:52:25 +00:00
Richard Barry b93186e975 Rename device specific file. 2009-01-28 17:50:49 +00:00
Richard Barry 761540892b Tidy up and comment. 2009-01-28 12:37:04 +00:00
Richard Barry 2fd4047164 Add header include. 2009-01-28 12:36:04 +00:00
Richard Barry f5e095e34f Tidy up and comment. 2009-01-28 12:21:11 +00:00
Richard Barry dd9ed87596 Add calls to portYIELD_FROM_ISR(). 2009-01-28 11:08:35 +00:00
Richard Barry 0adf3d96c4 Add in the portYIELD_FROM_ISR() function. 2009-01-28 11:08:01 +00:00
Richard Barry 4555f696a8 More work in progress on NEC port and demo. 2009-01-26 17:30:18 +00:00
Richard Barry cadd182942 More work in progress on NEC port and demo. 2009-01-26 17:29:01 +00:00
Richard Barry d811a00690 Rename file. 2009-01-23 16:50:43 +00:00
Richard Barry 9025468276 Adjust memory allocation. 2009-01-23 16:48:37 +00:00
Richard Barry 37bee0c18b Minor change so the delay automatically adjusts to the tick frequency. 2009-01-23 16:47:32 +00:00
Richard Barry f8e9f4071b Continues work on new NEC port/demo. 2009-01-23 16:46:19 +00:00
Richard Barry baa287be9a Correct some capitalisation issues for Linux users. 2009-01-23 08:53:40 +00:00
Richard Barry 8fa8b7c7a9 Correct some capitalisation issues for Linux users. 2009-01-23 08:51:51 +00:00
Richard Barry 5ebd915502 Formatting only. 2009-01-22 17:26:04 +00:00
Richard Barry 296514e80a Backup NEC project - still a work in progress. 2009-01-22 17:25:06 +00:00
Richard Barry 7164e04294 Add new partest files for the NEC demo. 2009-01-22 14:44:08 +00:00
Richard Barry 19e2d266b6 Renamed file. 2009-01-22 11:08:21 +00:00
Richard Barry d92156e85a Add in V850 include file. 2009-01-22 11:03:59 +00:00
Richard Barry f2114d04f2 New port - still a work in progress. 2009-01-22 11:02:09 +00:00
Richard Barry 395aec25ff New NEC port - work in progress. 2009-01-22 10:59:24 +00:00
Richard Barry c1cb5dac54 Small modification to where header files are included from to make more portable. 2009-01-18 13:05:26 +00:00
Richard Barry c87cff51c2 Added the 16FX definition. 2009-01-18 13:04:35 +00:00
Richard Barry c10e20be42 Start of a new Fujitsu demo - still a work in progress. 2009-01-17 21:21:43 +00:00
Richard Barry 06265d2313 Small modification to where header files are included from to make more portable. 2009-01-17 21:19:18 +00:00
Richard Barry e41454c461 Update to use the latest version of the Ride libraries. 2009-01-17 18:52:26 +00:00
Richard Barry aee92373cf Still a work in progress. 2009-01-17 17:38:46 +00:00
Richard Barry 8d724f682d Clean up compiler warnings only. 2009-01-17 17:37:50 +00:00
Richard Barry d94151bca7 Updated threads.js for Rowley Crossworks - thanks Glen B. 2009-01-11 13:04:03 +00:00
Richard Barry 6b8a71ba29 Add flash linker file for SAM9256XE. 2009-01-07 12:27:11 +00:00
Richard Barry 12d86511c9 Work in progress only. 2009-01-07 12:17:19 +00:00
Richard Barry adad8eab83 Work in progress on new port - correct the configuration of the timer interrupt. 2009-01-07 11:00:48 +00:00
Richard Barry c82aa9b224 Update to IAR V5.3. 2009-01-07 10:58:10 +00:00
Richard Barry eefea4b753 Bug fix in port.c. 2009-01-05 09:34:57 +00:00
Richard Barry 6ee8deece7 Corrected comment - thanks Ralf A. 2008-12-23 19:25:33 +00:00
Richard Barry 441a1fec6d Minor updates only. 2008-12-06 15:02:32 +00:00
Richard Barry a859c59080 Minor updates only. 2008-12-06 13:35:43 +00:00
Richard Barry ea30213367 Minor updates. 2008-12-06 13:35:12 +00:00
Richard Barry f374044a1c Update to the latest compiler version. 2008-12-03 15:09:01 +00:00
Richard Barry 5bb82e7660 Update to the latest compiler version. 2008-12-03 15:01:52 +00:00
Richard Barry 68a24a415e Add new demo. 2008-12-01 18:37:07 +00:00
Richard Barry 2f795214d7 Continued work in progress on new demo. 2008-11-28 16:08:59 +00:00
Richard Barry c5f0933f49 Add SAM9XE definition. 2008-11-28 16:08:21 +00:00
Richard Barry 46d4beaba8 Update IRQ handler code. 2008-11-28 16:07:27 +00:00
Richard Barry 151e000be0 Continued work in progress on new demo. 2008-11-28 16:06:47 +00:00
Richard Barry e540f0abf4 New demo being added - work in progress. 2008-11-28 15:41:07 +00:00
Richard Barry efc8243397 Atmel provided hardware specifics. 2008-11-28 15:39:53 +00:00
Richard Barry 5e6d50864c New demo being added - work in progress. 2008-11-28 15:37:37 +00:00
Richard Barry 8471147b5a Remove erroneous comments. 2008-11-22 17:34:51 +00:00
Richard Barry eb16fc814d Correct comment regarding the configMAX_SYSCALL_INTERRUPT_PRIORITY setting. 2008-11-21 18:37:01 +00:00
Richard Barry f9e0da0358 Ready for V5.1.1 release. 2008-11-20 16:29:10 +00:00
Richard Barry aa03bff58d Ready for V5.1.1 release. 2008-11-20 16:27:34 +00:00
Richard Barry d6728eb2fc Ready for V5.1.1 release. 2008-11-20 16:21:50 +00:00
Richard Barry e785527326 Ready for V5.1.1 release. 2008-11-20 16:18:57 +00:00
Richard Barry 57e58b25af Ready for V5.1.1 release. 2008-11-20 16:16:31 +00:00
Richard Barry 5e238dd6f4 Ready for V5.1.1 release. 2008-11-20 16:12:56 +00:00
Richard Barry d28eda8634 Ready for V5.1.1 release. 2008-11-20 16:10:46 +00:00
Richard Barry a9404cd88a Add in projects and debug launches. 2008-11-20 10:50:53 +00:00
Richard Barry 43bb138290 Add in projects and debug launches. 2008-11-20 10:49:39 +00:00
Richard Barry 6633583d98 Created new workspace, so far it is working but does not yet include debugger setup. 2008-11-20 10:16:22 +00:00
Richard Barry c5991e5f68 Added back in the Coldfire MCF52233 demo with makefile, not yet including the Eclipse project. 2008-11-20 09:46:04 +00:00
Richard Barry 4e8383be43 Give up attempting to fix workspace - delete and re-create. 2008-11-20 09:23:36 +00:00
Richard Barry 5366162bcd Give up attempting to fix workspace - delete and re-create. 2008-11-20 09:22:53 +00:00
Richard Barry 2f8d10dc34 2008-11-19 22:45:13 +00:00
Richard Barry b3f0fb2804 Remove .lock file. 2008-11-19 22:44:31 +00:00
Richard Barry 0cd598fc66 Another attempted at the f'in workspace. 2008-11-19 22:31:33 +00:00
Richard Barry 9073424aa9 Another attempted at the f'in workspace. 2008-11-19 22:29:24 +00:00
Richard Barry ea547e79ba 2008-11-19 22:18:35 +00:00
Richard Barry bca87dcf54 Still messing around trying to get the workspace to be distributable. 2008-11-19 22:13:03 +00:00
Richard Barry acbdd47bee Delete MCF52233 files to revert back to older version of the workspace. 2008-11-19 22:09:15 +00:00
Richard Barry 2389e3e25a 2008-11-19 21:36:55 +00:00
Richard Barry bee2975d02 2008-11-19 21:35:57 +00:00
Richard Barry a5412bed75 More fiddling with the damned workspace. 2008-11-19 21:35:17 +00:00
Richard Barry d07b337786 Reconfigure workspace. 2008-11-19 21:00:13 +00:00
Richard Barry dbf2ff1400 Add recreated workspace. 2008-11-19 20:47:57 +00:00
Richard Barry a35f4c69d8 Delete workspace so it can be re-created clean. 2008-11-19 20:38:32 +00:00
Richard Barry 3cfee24fe6 Attempting to get minimal .metadata for distribution. 2008-11-19 20:18:04 +00:00
Richard Barry d5e3e282ec 2008-11-19 19:28:56 +00:00
Richard Barry f3001b6156 2008-11-16 21:10:06 +00:00
Richard Barry fbf1f69a10 Prepare demo for release. 2008-11-16 21:08:33 +00:00
Richard Barry b56d2c8d6b Tidy up an comment. 2008-11-16 20:25:26 +00:00
Richard Barry b8104d386f Delete unused files. 2008-11-16 19:30:23 +00:00
Richard Barry 89ccc31af1 Continue to develop demo. 2008-11-16 19:23:29 +00:00
Richard Barry a520f5c7e3 Remove compiler warning. 2008-11-16 19:22:04 +00:00
Richard Barry 4b141c691e Allow the task priorities to be overwritten. 2008-11-16 19:21:25 +00:00
Richard Barry 90ac00641c Removed unwanted white space at the end of a macro continuation. 2008-11-16 17:13:55 +00:00
Richard Barry aa8a0d04b9 Continue work on MCF52233 demo. 2008-11-16 17:12:21 +00:00
Richard Barry 18f84c805f Continue work on MCF52233 demo. 2008-11-16 17:10:27 +00:00
Richard Barry 31606543da Add faster version code. 2008-11-16 15:13:40 +00:00
Richard Barry f7a168e184 Added JPG to be served by Coldfire WEB server. 2008-11-16 12:18:52 +00:00
Richard Barry 86ae395879 New files to be served from the ColdFire WEB server. 2008-11-16 11:18:33 +00:00
Richard Barry 5e1da95319 Added modified uIP code. 2008-11-16 10:35:36 +00:00
Richard Barry b5777916ac Deleted obsolete files. 2008-11-16 10:33:24 +00:00
Richard Barry 59d108028b New Eclipse demo added - working but not yet completed. 2008-11-16 10:32:29 +00:00
Richard Barry 85701eb0b1 Correct version number in header. 2008-10-29 10:53:37 +00:00
Richard Barry 86a84a1477 Correct missing comment start. 2008-10-29 10:15:29 +00:00
Richard Barry 03acab14b2 Fix
https://sourceforge.net/tracker/index.php?func=detail&aid=2194064&group_id=111543&atid=659633
2008-10-29 10:11:22 +00:00
Richard Barry b6e93f2e42 Update comments only. 2008-10-29 09:59:01 +00:00
Richard Barry f03b362ee9 Update project to the latest IAR format. 2008-10-27 11:56:12 +00:00
Richard Barry 44b7c8b6ac Add MSP430 IAR definition. 2008-10-26 15:36:43 +00:00
Richard Barry 05167fb0f6 Update so both methods of defining interrupts can be used. 2008-10-26 15:34:32 +00:00
Richard Barry 4d302265c2 Add MSP430/IAR demo project. 2008-10-26 14:57:40 +00:00
Richard Barry 48a34c5fd1 Add IAR MSP430 port layer. 2008-10-26 14:56:06 +00:00
Richard Barry 151882a872 Replace absolute path to the asm files with the correct relative path. 2008-10-25 16:33:11 +00:00
Richard Barry 758b1c7c59 Update ready for V5.1.0 release. 2008-10-24 18:07:39 +00:00
Richard Barry f147249a11 Remove the stale JC Wren demo as a WEB link to the latest version is now used in its place. 2008-10-24 17:53:16 +00:00
Richard Barry f93deff134 New contributed port uploaded. 2008-10-24 17:15:03 +00:00
Richard Barry b2303011c3 New contributed port uploaded. 2008-10-24 15:52:56 +00:00
Richard Barry 842a7244cf New unsupported port added. 2008-10-24 15:48:13 +00:00
Richard Barry cefe46cdbe Change to use UART1. 2008-10-24 15:21:16 +00:00
Richard Barry 4c8a5cfdad Change to use UART1. 2008-10-24 15:19:35 +00:00
Richard Barry 9157e9cfef Add missing file. 2008-10-24 09:52:56 +00:00
Richard Barry 31d448cbf9 2008-10-24 07:39:06 +00:00
Richard Barry 53b376b6b8 Remove the two separate ports, instead use two demo apps that use a conditional compilation to select the method of interrupt management to use. 2008-10-23 19:16:29 +00:00
Richard Barry a91c6302e7 Remove the two separate ports, instead use two demo apps that use a conditional compilation to select the method of interrupt management to use. 2008-10-23 19:14:45 +00:00
Richard Barry eee1043e33 Set up to work in both ARM and THUMB modes. 2008-10-23 15:59:50 +00:00
Richard Barry cf638edfaf Setup to work with both ARM and THUMB modes. 2008-10-23 15:58:17 +00:00
Richard Barry 8347299546 Remove demo that used the now defunct Keil compiler. 2008-10-23 11:23:13 +00:00
Richard Barry c59af80374 Add demo for the Keil RVDS compiler. 2008-10-23 11:08:14 +00:00
Richard Barry 6ae55f3d6d Remove files that use the now defunct Keil compiler. 2008-10-23 11:06:20 +00:00
Richard Barry ce7301b3e3 Change from using the old Keil compiler definition to the new RVDS compiler definition. 2008-10-23 11:04:23 +00:00
Richard Barry 36815b949f First ARM7 port that uses the RVDS compiler. 2008-10-23 11:03:25 +00:00
Richard Barry cfa31e4205 Fix compiler warning only. 2008-10-21 13:28:53 +00:00
Richard Barry 6bf7776dec Continue Coldfire MCF52221 CodeWarrior demo. 2008-10-21 13:27:58 +00:00
Richard Barry 58f3f932ee First working MCF52221 demo. 2008-10-21 10:18:47 +00:00
Richard Barry 094be62ef0 Continue ColdeFire/CodeWarrior development. 2008-10-20 17:21:22 +00:00
Richard Barry de519dd34e Update to allow low power mode to be used with the RTOS. 2008-10-19 18:52:04 +00:00
Richard Barry 549dcfa148 Add code to the idle hook to test low power mode operation. 2008-10-19 18:51:16 +00:00
Richard Barry 0463a4814b Add code to the idle hook to test low power mode operation. 2008-10-19 18:11:38 +00:00
Richard Barry 86edfb7dd4 Update ISR functions to be compliant with low power mode operation. 2008-10-19 18:10:52 +00:00
Richard Barry 518d5e538a Update to allow low power mode to be used with the RTOS. 2008-10-19 18:08:53 +00:00
Richard Barry 3c4c58dc6d Update to allow low power mode to be used with the RTOS. 2008-10-19 17:45:21 +00:00
Richard Barry 5bccc20356 Update to allow low power mode to be used with the RTOS. 2008-10-19 17:44:56 +00:00
Richard Barry f9e47722ce Correct portSTACK_GROWTH value. 2008-10-19 11:06:38 +00:00
Richard Barry a18e5c0bc5 Add header file back - with corrected case. 2008-10-17 14:18:36 +00:00
Richard Barry 317d2004dd Delete a header file so the case can be changed. 2008-10-17 14:17:52 +00:00
Richard Barry 5c189beb42 Correct the .bss end setting. 2008-10-17 14:16:38 +00:00
Richard Barry 60c87c8364 Removed bin files that were checked in in error. 2008-10-17 14:08:24 +00:00
Richard Barry 709b7ee223 Start of a new ColdFire/CodeWarrior demo. 2008-10-17 14:07:17 +00:00
Richard Barry 8e219f83f0 Remove some compiler warnings generated by CodeWarrior. 2008-10-17 13:23:28 +00:00
Richard Barry 285fa0420a Remove some compiler warnings generated by CodeWarrior. 2008-10-17 13:21:18 +00:00
Richard Barry de5a4b3fb5 Added include path for V2 ColdFire/CodeWarrior. 2008-10-17 13:19:50 +00:00
Richard Barry 5e89d113be New port files for V2 ColdFire/CodeWarrior added. 2008-10-17 13:18:49 +00:00
Richard Barry 40f4287921 New file to separate out the stack checking macros which are a bit ugly to have in the main tasks.c file. 2008-10-09 00:54:10 +00:00
Richard Barry 4f631de793 Update the stack checking functions so they work for stacks that grow up from high memory (PIC24). 2008-10-09 00:53:02 +00:00
Richard Barry c873e088bf Added JC Wren demos. 2008-09-26 09:03:58 +00:00
Richard Barry 0773e6b805 Change to use interrupt priority definitions that use shifted values from 0 to 7, rather than the full numeric value. 2008-09-24 13:09:59 +00:00
Richard Barry e12614df23 Change to use interrupt priority definitions that use shifted values from 0 to 7, rather than the full numeric value. 2008-09-24 13:08:28 +00:00
Richard Barry b6690dfc9a Switch from post increment to pre increment on values sent to queues. This allows the test to execute on systems where interrupt level critical sections cannot nest. 2008-09-24 13:06:39 +00:00
Richard Barry 603ec6a42b Change the force register from low to heigh. 2008-09-22 18:10:28 +00:00
Richard Barry 799cccac42 Use the low force register. 2008-09-22 18:08:29 +00:00
Richard Barry 130e2f2c0a Prepare for V5.0.4 release. 2008-09-22 15:48:40 +00:00
Richard Barry 1d0cf84e80 Change the default vector used for context switching. 2008-09-22 13:48:45 +00:00
Richard Barry 36471ef3e8 Change init value for a variable that was generating compiler warnings on one of the more pedantic compilers. 2008-09-22 13:44:31 +00:00
Richard Barry c3a33e5e7c Improve example code for xTaskCreate(). 2008-09-22 13:43:07 +00:00
Richard Barry 10edc1088a Added extra compiler specific structure packing options. 2008-09-22 13:18:08 +00:00
Richard Barry aa2ffbfde5 Added extra compiler specific structure packing options. 2008-09-22 13:16:59 +00:00
Richard Barry d6ec78a568 Added extra compiler specific options. 2008-09-22 13:14:05 +00:00
Richard Barry ed240e58a1 Add assert required for linking. 2008-09-22 13:13:03 +00:00
Richard Barry 9d1ab2c90b Change default vector number to 16. 2008-09-22 13:11:32 +00:00
Richard Barry aa7485ab0f BUG FIX: Changed
*(portNVIC_INT_CTRL) |= portNVIC_PENDSVSET;
to
*(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
2008-09-17 16:04:31 +00:00
Richard Barry a91d3d8afe Note to users only. 2008-09-17 16:03:42 +00:00
Richard Barry f8abff1e04 BUG FIX: Changed
*(portNVIC_INT_CTRL) |= portNVIC_PENDSVSET;
to
*(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
2008-09-17 16:01:56 +00:00
Richard Barry 3b34009b75 Tidy up. 2008-09-17 15:58:45 +00:00
Richard Barry 223bd9c75f BUG FIX: Changed
*(portNVIC_INT_CTRL) |= portNVIC_PENDSVSET;
to
*(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
2008-09-17 15:52:54 +00:00
Richard Barry 8e264c901e Added dummy header files to allow the Cortex uIP demo to compile. 2008-09-01 13:20:52 +00:00
Richard Barry 172114c49f Added a #error line to check that FreeRTOS.h is included before one of the subordinate header files. 2008-09-01 08:18:50 +00:00
Richard Barry cb12d3a973 Added CodeWarrior definitions. 2008-09-01 08:08:44 +00:00
Richard Barry 0a8889d62b Change comments only. 2008-08-27 07:47:55 +00:00
Richard Barry a36ef26b0c Add bracket where appropriate. 2008-08-15 15:59:42 +00:00
Richard Barry 8f33ce9c30 Use correct counter in reg test 2 task. 2008-08-14 13:59:59 +00:00
Richard Barry 4c0c3038cc Add cleaned up eclipse workspace. 2008-08-14 13:28:18 +00:00
Richard Barry 049459af87 Add URL to configuration pages on FreeRTOS.org site. 2008-08-14 13:19:20 +00:00
Richard Barry 5d83f61228 Documentation only. 2008-08-14 12:57:30 +00:00
Richard Barry 54dbbc3cdf Documentation only. 2008-08-14 12:55:54 +00:00
Richard Barry be92c862be Minor mods only. 2008-08-14 11:13:34 +00:00
Richard Barry 9c2512f54e Permit no more than two simultaneous occurrences of interrupts adding everything to queues instead of tasks. 2008-08-14 11:10:46 +00:00
Richard Barry 5116051604 Remove initialisation of xQueueRegistry. 2008-08-14 11:09:26 +00:00
Richard Barry e5d85bc87e Correct version number. 2008-08-14 11:08:36 +00:00
Richard Barry aeea09e21e Minor changes only. 2008-08-14 11:07:50 +00:00
Richard Barry 6eec108bdd Ensure a yield cannot be pended simultaneously with a critical section being entered. 2008-08-14 11:04:54 +00:00
Richard Barry d427489391 Tidy up. 2008-08-13 08:06:49 +00:00
Richard Barry 513b1a25e0 Use internal RAM only. 2008-08-13 08:03:47 +00:00
Richard Barry a2bdba02ad Tidy up. 2008-08-13 08:01:54 +00:00
Richard Barry 0dffe8d801 Increase stack sizes as we now have interrupts nesting 3 deep. 2008-08-11 14:51:09 +00:00
Richard Barry cebb479b0a Add lwIP V1.3 files. 2008-08-11 14:49:32 +00:00
Richard Barry bfdbfce22f Add in interrupt nesting and chache support. 2008-08-10 21:19:57 +00:00
Richard Barry 60da4247dd Add interrupt nesting support, cache setup and reg test tasks. 2008-08-10 21:17:20 +00:00
Richard Barry a943ccd85a Use internal RAM only for data. 2008-08-10 21:16:35 +00:00
Richard Barry adf9eb9fb0 Remove white space only. 2008-08-10 21:15:14 +00:00
Richard Barry f68aab980d Interrupt nesting and cache support added. 2008-08-10 21:14:08 +00:00
Richard Barry 53a8d172df Com test now working. 2008-08-09 10:09:21 +00:00
Richard Barry 3a8161372d Add serial test code (not yet complete). 2008-08-08 15:55:31 +00:00
Richard Barry 3ea597543a Add ColdFire definitions. 2008-08-08 15:54:05 +00:00
Richard Barry 431d1c009d Update to allow interrupt nesting (not yet complete). 2008-08-08 15:52:41 +00:00
Richard Barry 181889d6b1 Basic demo up and running. 2008-08-08 12:50:22 +00:00
Richard Barry 5ff84b9869 Basic demo up and running. 2008-08-08 12:47:06 +00:00
Richard Barry 4953c7d030 First task starting. 2008-08-08 09:41:33 +00:00
Richard Barry 3f2375c020 First task starting - woohoo! 2008-08-08 09:40:41 +00:00
Richard Barry 78d3b371fd Stubs ready for ColdFire V2 demo. 2008-08-07 19:13:15 +00:00
Richard Barry 35be76b9b7 Added function stubs. 2008-08-07 19:10:25 +00:00
Richard Barry 216fcb10c9 2008-08-07 19:03:24 +00:00
Richard Barry 5d60a388e0 2008-08-07 19:02:43 +00:00
Richard Barry 1c3c04f121 Prepare for V2 port. 2008-08-07 18:51:34 +00:00
Richard Barry a2d86ba1fb Add in the -fno-omit-frame-pointer compiler options as a compiler bug workaround. 2008-07-31 11:01:58 +00:00
Richard Barry 16b6baf10c Update to V5.0.3. 2008-07-30 20:04:29 +00:00
Richard Barry a1edce40d2 Add unsupported files. 2008-07-30 19:10:10 +00:00
Richard Barry 2ff6ab158f Add in the configMAX_SYSCALL_INTERRUPT_PRIORITY test tasks. 2008-07-30 09:39:03 +00:00
Richard Barry 597fbaacde Improve efficiency even further. Introduce the configMAX_SYSCALL_INTERRUPT_PRIORITY feature. 2008-07-30 09:36:40 +00:00
Richard Barry 56d5f4ac9b Just remove a comment. 2008-07-30 09:35:03 +00:00
Richard Barry 6eed669d06 Ensure statics are handled correctly when portREMOVE_STATIC_QUALIFIER is defined. 2008-07-30 09:34:03 +00:00
Richard Barry ae6d081ebe Add in the configMAX_SYSCALL_INTERRUPT_PRIORITY test tasks. 2008-07-25 02:43:50 +00:00
Richard Barry 512c86194f Add in the configMAX_SYSCALL_INTERRUPT_PRIORITY test tasks. 2008-07-25 02:42:33 +00:00
Richard Barry 8b02e015ba Improve efficiency even further. Introduce the configMAX_SYSCALL_INTERRUPT_PRIORITY feature. 2008-07-25 02:40:35 +00:00
Richard Barry 7580c6b817 Change ARM7 byte alignment to 8. 2008-07-25 02:35:50 +00:00
Richard Barry 794b6546b2 Improve efficiency even further. Introduce the configMAX_SYSCALL_INTERRUPT_PRIORITY feature. 2008-07-25 02:34:31 +00:00
Richard Barry 32592e1385 Improve efficiency even further. Introduce the configMAX_SYSCALL_INTERRUPT_PRIORITY feature. 2008-07-25 02:33:56 +00:00
Richard Barry 3ab4d1f87f Change projects to split the dsPIC and PIC24 taskYIELD implementations. 2008-07-16 10:08:24 +00:00
Richard Barry e4c0740eaa Change projects to split the dsPIC and PIC24 taskYIELD implementations. 2008-07-16 10:07:16 +00:00
Richard Barry 5ba1afe8b5 Change projects to split the dsPIC and PIC24 taskYIELD implementations. 2008-07-16 10:06:41 +00:00
Richard Barry b25bb7e4f5 Update project to latest MPLAB version (8?). 2008-07-16 09:58:15 +00:00
Richard Barry 619cd7a43d Update project to use the new asm file for the port yield function, and remove the "user frame pointer" optimisation option. 2008-07-16 09:55:52 +00:00
Richard Barry 3244fd67dc Change capitalization of include header. 2008-07-16 09:50:44 +00:00
Richard Barry 91805dd051 Add the queue registry config parameter. 2008-07-16 09:49:31 +00:00
Richard Barry c3acf82f70 asm version of the yield function. Moved from port.c. 2008-07-16 09:26:22 +00:00
Richard Barry 090da3b518 Removed the manual context switch from the C file, this is now in an asm file instead. This is a workaround for a compiler bug but provides a better implementation anyway as less stack is used. 2008-07-16 09:12:54 +00:00
Richard Barry d091cf740f Allow the static qualifier to be removed and rename a list so it does not then clash with the name used in tasks.c once the static has been removed. 2008-07-16 09:10:01 +00:00
Richard Barry 1d4e319aa7 Ensure the queue registry gets initialised. 2008-07-16 09:08:32 +00:00
Richard Barry ea07e0b934 Correct case of include file to build on Linux. 2008-07-11 07:36:55 +00:00
Richard Barry e72748b18f Correct case of include file to build on Linux. 2008-07-11 07:36:17 +00:00
Richard Barry eea5d82a8f Correct case of include file to build on Linux. 2008-07-11 07:33:08 +00:00
Richard Barry 8a795bd375 Update the bInterfaceProtocol member of the descriptors to allow comms with Linux. 2008-06-25 07:15:35 +00:00
Richard Barry 7d034a24be Correct PLL setting for the defined configCPU_CLOCK_HZ setting. 2008-06-21 17:35:41 +00:00
Richard Barry 1e83961601 Update to V5.0.2 2008-05-30 15:51:35 +00:00
Richard Barry 48eff41955 Update to V5.0.2 2008-05-30 15:49:36 +00:00
Richard Barry 42ebfc5227 Update to V5.0.2 2008-05-30 15:46:57 +00:00
Richard Barry 4fcb98ef1d Update to V5.0.2 2008-05-30 15:44:17 +00:00
Richard Barry cd38538425 Update to V5.0.2 2008-05-30 15:41:10 +00:00
Richard Barry 90064444af Update to V5.0.2 2008-05-30 15:34:42 +00:00
Richard Barry 6128d1a86e Add new PPC405 demo. 2008-05-25 17:42:25 +00:00
Richard Barry 642a74c5b4 Remove old PPC port. 2008-05-25 17:39:16 +00:00
Richard Barry ac0630af91 Add -fno-strict-aliasing 2008-05-24 18:57:30 +00:00
Richard Barry 192cc29ebc Add usage of portREMOVE_STATIC_QUALIFIER. 2008-05-24 18:56:04 +00:00
Richard Barry 8ce7a79937 Add usage of portREMOVE_STATIC_QUALIFIER. 2008-05-24 18:52:12 +00:00
Richard Barry 576a25a098 Remove static qualifier from queue registry. 2008-05-24 18:47:38 +00:00
Richard Barry 6391f4160b Tidy up ready for release. 2008-05-24 17:03:23 +00:00
Richard Barry 4154eec4e1 Add queue registry code. 2008-05-23 19:24:05 +00:00
Richard Barry 03a82c5bc8 Add #define configQUEUE_REGISTRY_SIZE 0 2008-05-23 19:22:33 +00:00
Richard Barry a4d3bf8f5d Add #define configQUEUE_REGISTRY_SIZE 0 2008-05-23 18:52:26 +00:00
Richard Barry 91c26c9868 Fix warnings that the latest GCC version spits out. 2008-05-23 18:51:39 +00:00
Richard Barry ab37826715 Add in #define configQUEUE_REGISTRY_SIZE 0 2008-05-23 18:50:47 +00:00
Richard Barry a5f3797949 Add in example vQueueAddToRegistry() calls. 2008-05-23 18:49:59 +00:00
Richard Barry 15881cdf39 Add IntQ tests. 2008-05-23 15:24:23 +00:00
Richard Barry f689c709ab A little optimisation. 2008-05-23 15:16:25 +00:00
Richard Barry b6aa1d6ca8 Add STM32 Keil demo. 2008-05-21 17:59:30 +00:00
Richard Barry a87f9df3d8 ST CM3 drivers. 2008-05-21 17:56:31 +00:00
Richard Barry bb64640f0a Change compiler optimisation. 2008-05-20 18:31:28 +00:00
Richard Barry 98ebaac850 Change optimisation level. 2008-05-20 18:30:30 +00:00
Richard Barry b8695fa787 Change optimisation level. 2008-05-20 18:29:10 +00:00
Richard Barry eb9d172082 Remove compiler warnings. 2008-05-20 18:27:59 +00:00
Richard Barry 0f7c3939e1 Remove compiler warnings. 2008-05-20 18:27:07 +00:00
Richard Barry 9d1b078a8f Remove compiler warnings. 2008-05-20 18:26:09 +00:00
Richard Barry 61a5a25a7f Remove compiler warnings. 2008-05-20 18:25:06 +00:00
Richard Barry c24a713859 Remove compiler warnings. 2008-05-20 18:24:22 +00:00
Richard Barry 01ce621748 Remove compiler warnings and insert missing return statement. 2008-05-20 18:23:44 +00:00
Richard Barry b19ede773a Add volatile qualifier to loop counters used to detect stalled tasks. 2008-05-20 05:22:35 +00:00
Richard Barry bea704342a Ensure emulated flop is not used. 2008-05-20 05:20:25 +00:00
Richard Barry dd1ef6a777 Remove the critical sections as not all ports can yield from within critical sections. 2008-05-19 19:19:25 +00:00
Richard Barry 2888b15b7e Add signed portBASE_TYPE xTaskIsTaskSuspended( xTaskHandle xTask ); Previously this was a private function. 2008-05-19 19:17:56 +00:00
Richard Barry 5a2790a998 Change the way the critical sections are handled within interrupts so the critical sections can be nested. 2008-05-19 19:16:57 +00:00
Richard Barry 4b9fe1e28a Add signed portBASE_TYPE xTaskIsTaskSuspended( xTaskHandle xTask ); 2008-05-19 19:15:38 +00:00
Richard Barry fb3b17a37c Update the default macros used for critical sections within ISRs. 2008-05-19 19:12:57 +00:00
Richard Barry b9b3e521f7 Bug fix - allocate 2 extra words at the bottom of the task stack to account for the back chain and saved LR. 2008-05-19 19:11:08 +00:00
Richard Barry ecc072e58b Tidy up. 2008-05-18 19:57:01 +00:00
Richard Barry 66fc3b8092 Update to use the kernel critical nesting. 2008-05-18 17:28:30 +00:00
Richard Barry f3eb5028a3 Add new test file. 2008-05-18 16:25:20 +00:00
Richard Barry 31bda54b75 Add new test file. 2008-05-18 16:23:10 +00:00
Richard Barry f146124bca Add new test file. 2008-05-18 16:21:59 +00:00
Richard Barry 0965823a67 Update demo to include a test of nesting interrupt accessing queues. 2008-05-18 16:21:12 +00:00
Richard Barry 684b898abc Comment changes only. 2008-05-11 13:44:43 +00:00
Richard Barry 6c275b9ca5 First commit of PPC405 version with floating point included. 2008-05-11 13:43:46 +00:00
Richard Barry ba90821242 Add in new files for floating point and updates following the installation of the service pack. 2008-05-11 13:28:25 +00:00
Richard Barry d7e9d4d397 Upgrade hardware version numbers following install of service pack. 2008-05-11 13:25:39 +00:00
Richard Barry d184cdc09d Added flop files. 2008-05-11 13:24:06 +00:00
Richard Barry dc897a35dd Added optional inclusion of floating point tasks. 2008-05-11 13:19:05 +00:00
Richard Barry 45fceb4bdd Update to include the option of saving/restoring the floating point context. 2008-05-11 09:15:22 +00:00
Richard Barry 6177c6e4a4 Add in the portSET_INTERRUPT_MASK_FROM_ISR() and portCLEAR_INTERRUPT_MASK_FROM_ISR() default (empty) macros. 2008-05-07 18:02:19 +00:00
Richard Barry 5d27f3ccf7 Add in the portSET_INTERRUPT_MASK_FROM_ISR() and portCLEAR_INTERRUPT_MASK_FROM_ISR() macros. 2008-05-07 18:00:26 +00:00
Richard Barry 676139e920 Raise the priority of the serial interrupt. 2008-05-07 17:59:17 +00:00
Richard Barry 9d0e60493a Move the call to start the high frequency timer to inside a task to ensure it does not trigger before the scheduler has started. 2008-05-07 17:58:20 +00:00
Richard Barry 5a1129c315 Change the timer interrupt to use the kernel interrupt entry/exit macros. 2008-05-07 17:56:45 +00:00
Richard Barry ad52311deb Remove the syscall calls as this is no longer how a context switch is performed. 2008-05-07 17:55:22 +00:00
Richard Barry bd44f90e50 Add in the configMAX_SYSCALL_INTERRUPT_PRIORITY constant. 2008-05-07 17:54:21 +00:00
Richard Barry bafcf8901e Update to allow nesting. 2008-05-06 11:51:13 +00:00
Richard Barry b7f66b9db6 Add the usual missing -1. 2008-05-05 08:41:25 +00:00
Richard Barry 4304c07ebf Performance improvements. 2008-05-04 20:04:52 +00:00
Richard Barry 0eae0f7549 Add nesting support. 2008-05-04 17:36:23 +00:00
Richard Barry a9393b891d Remove inline keywords. 2008-05-01 17:16:26 +00:00
Richard Barry 3f620024fc Added code to allow a vTaskPrioritySet() caller to pass in the current TCB as well as NULL to indicate that the priority of the calling task is being changed. 2008-05-01 17:15:36 +00:00
Richard Barry a918bd9825 Update comments for vTaskSuspendAll() "API functions that have the potential to cause a context switch (for example, vTaskDelayUntil(), xQueueSend(), etc.) must not be called while the scheduler is suspended". 2008-05-01 15:54:04 +00:00
Richard Barry 019ab1b908 Remove inline keyword. 2008-05-01 09:06:26 +00:00
Richard Barry 9c87f922b3 Remove inline keyword. 2008-05-01 08:58:48 +00:00
Richard Barry 0d29807e93 Remove inline keyword. 2008-05-01 08:57:45 +00:00
Richard Barry b08411ec5a Correct timer calculation. 2008-04-16 16:29:28 +00:00
Richard Barry d7ca9ad0c3 Correct comments. 2008-04-16 14:26:03 +00:00
Richard Barry 7e529c281f Update to V5.0.0. 2008-04-16 08:00:30 +00:00
Richard Barry 4c8425da01 Update to V5.0.0. 2008-04-16 07:52:16 +00:00
Richard Barry e939542f32 Update to V5.0.0. 2008-04-16 07:47:02 +00:00
Richard Barry 57a83227d0 Remove incorrect const qualifiers. 2008-04-13 17:03:23 +00:00
Richard Barry 8ffe2b49e8 Minor tidy up. No functional difference. 2008-04-13 16:36:35 +00:00
Richard Barry 98daf5a1b8 Add variable initialisation. Doesn't really make a difference, just neater. 2008-04-13 16:35:15 +00:00
Richard Barry c95cae5a99 Add variable initialisation. Doesn't really make a difference, just neater. 2008-04-13 16:34:12 +00:00
Richard Barry dc307b270b Add variable initialisation. Doesn't really make a difference, just neater. 2008-04-13 16:33:30 +00:00
Richard Barry 360d357e15 Add variable initialisation. Doesn't really make a difference, just neater. 2008-04-13 16:32:41 +00:00
Richard Barry 09bfc2d862 Add variable initialisation. Doesn't really make a difference, just neater. 2008-04-13 16:31:43 +00:00
Richard Barry 9cea94ccce Add variable initialisation. Doesn't really make a difference, just neater. 2008-04-13 16:30:29 +00:00
Richard Barry c1d5690da6 Remove unused assignment. 2008-04-13 16:29:40 +00:00
Richard Barry 7920c29ad1 Update to use new QueueSendFromISR() semantics. 2008-04-13 16:28:17 +00:00
Richard Barry 49c84f0d41 Update to use new xQueueSendFromISR() and xSemaphoreGiveFromISR() function semantics. 2008-04-12 23:45:58 +00:00
Richard Barry ac58b5b285 Update to use new xQueueSendFromISR() and xSemaphoreGiveFromISR() function semantics. 2008-04-12 23:41:42 +00:00
Richard Barry 8cf6a70c9e Update to use new xQueueSendFromISR() and xSemaphoreGiveFromISR() function semantics. 2008-04-12 23:34:49 +00:00
Richard Barry c1e9f859c8 Update to use new xQueueSendFromISR() and xSemaphoreGiveFromISR() function semantics. 2008-04-12 23:34:13 +00:00
Richard Barry f4dd20dffc Update to use new xQueueSendFromISR() and xSemaphoreGiveFromISR() function semantics. 2008-04-12 23:32:18 +00:00
Richard Barry 7eb7201b46 Casting only. 2008-04-12 23:26:44 +00:00
Richard Barry b24032d4b0 Efficiency improvement. 2008-04-12 23:26:01 +00:00
Richard Barry a6053582fc Update the sys tick to be more efficient. 2008-04-12 23:25:17 +00:00
Richard Barry af939eb0a9 Add in the configUSE_APPLICATION_TASK_HOOK macro. 2008-04-12 09:50:30 +00:00
Richard Barry a9ed428422 Update prototypes and macros for the new xQueueSendFromISR() function and the task hook feature. 2008-04-12 09:48:40 +00:00
Richard Barry da6d27b627 Introduce the application task hook feature. 2008-04-12 09:46:19 +00:00
Richard Barry b73dafb1f4 Change the semantics of the xQueueGenericSendFromISR() function. 2008-04-12 09:45:02 +00:00
Richard Barry 2bc9dfa3f8 Ensure the first task starts with interrupts enabled. 2008-04-06 14:42:35 +00:00
Richard Barry ed543197e0 Ensure the first task starts with interrupts enabled. 2008-04-06 14:41:04 +00:00
Richard Barry 24cb048892 Ensure the first task starts with interrupts enabled. 2008-04-06 14:38:27 +00:00
Richard Barry ada4744871 Minor changes to the trace macros. 2008-04-06 09:37:26 +00:00
Richard Barry 06e8e93eb5 Added traceTASK_SWITCHED_OUT macro. 2008-04-06 09:36:48 +00:00
Richard Barry a3677612d2 Corrected SysTick interval calculation. 2008-04-06 09:26:51 +00:00
Richard Barry 2ca3985a8c Corrected SysTick interval calculation. 2008-04-06 09:25:59 +00:00
Richard Barry 7ed94acdff Corrected SysTick interval calculation. 2008-04-06 09:25:00 +00:00
Richard Barry cfcad6e78a Corrected prototypes for newly added functions that had the 'signed' qualifier missing. 2008-04-06 09:23:58 +00:00
Richard Barry 5cefef5074 2008-04-05 18:10:28 +00:00
Richard Barry 637619dcb7 2008-04-05 15:09:10 +00:00
Richard Barry d1b9463e29 Changes required to build with the latest Xilinx tools. 2008-03-30 21:18:54 +00:00
Richard Barry bc7068a690 Add PPC405 port in V10.1 format. 2008-03-30 21:15:19 +00:00
Richard Barry c2a6dc193e Remove PPC files that are in the EDK V7 format. 2008-03-30 18:41:43 +00:00
Richard Barry 3fd422ff2f Return the lock counts to their original intended behaviour. 2008-03-29 20:50:38 +00:00
Richard Barry 9596b04eff Small mods, and update file headers. 2008-03-26 13:04:38 +00:00
Richard Barry 527fb6a907 Update version numbers to V4.8.0 2008-03-25 21:22:13 +00:00
Richard Barry 3b4545cdf6 Add extra const qualifiers and casts for linting purposes. 2008-03-25 18:30:09 +00:00
Richard Barry 8704fd145b 2008-03-24 13:01:33 +00:00
Richard Barry 343a6101c2 Correct function prototype. 2008-03-24 13:00:38 +00:00
Richard Barry a08969154a Update to use new port layer. 2008-03-24 12:59:16 +00:00
Richard Barry 829f5cda65 Update to use new port layer. 2008-03-24 12:51:24 +00:00
Richard Barry 6ec6b4508a Update to use new port layer. 2008-03-24 12:44:23 +00:00
Richard Barry 96b7e685a7 Update to use new port layer. 2008-03-24 12:43:05 +00:00
Richard Barry 7e3a04602d Update to use new port layer. 2008-03-24 12:35:40 +00:00
Richard Barry c366fa96f9 Update to use the new port layer. 2008-03-24 12:32:38 +00:00
Richard Barry 945ffc1a38 2008-03-24 11:51:42 +00:00
Richard Barry 998e9699f4 Update to use new port layer. 2008-03-24 11:51:09 +00:00
Richard Barry 1ef0e22ca1 Update to use new port layer. 2008-03-24 11:45:23 +00:00
Richard Barry 3d099d43f5 Update to use new port layer. 2008-03-24 11:31:41 +00:00
Richard Barry 6e9d6a2bdf Update to use new port layer. 2008-03-24 10:46:56 +00:00
Richard Barry 5024d47769 2008-03-24 10:18:07 +00:00
Richard Barry 8502ee5b1c Introduce configKERNEL_INTERRUPT_PRIORITY and make some performance optimisations. 2008-03-24 10:17:30 +00:00
Richard Barry 534d26e4ef Remove the stellaris-eabi library as the none-eabi library can be used in its place. 2008-03-23 19:04:57 +00:00
Richard Barry 0ec39d206f 2008-03-23 18:50:13 +00:00
Richard Barry 2e3f4ad506 2008-03-23 17:03:16 +00:00
Richard Barry b593401cfe 2008-03-23 17:02:24 +00:00
Richard Barry 3686ab1dcb 2008-03-23 17:00:08 +00:00
Richard Barry 85c789dc2a Add SVC handler to startup and recursive mutexes to the list of test tasks. 2008-03-23 16:58:34 +00:00
Richard Barry 62f9bdef17 Add new config options. 2008-03-23 16:11:08 +00:00
Richard Barry a702fc53a7 Add new config options. 2008-03-23 16:09:16 +00:00
Richard Barry 7596b7f45d Allow test to pass when there are many other tasks in the system. 2008-03-23 16:07:48 +00:00
Richard Barry 87575c5cfe Re-write the queue send and queue receive functions to improve their effect on interrupt responsiveness. 2008-03-23 16:06:45 +00:00
Richard Barry ed28aa2046 Add critical section around xTaskCheckForTimeout() as the new queue code makes a call while the scheduler is not locked. 2008-03-23 16:00:51 +00:00
Richard Barry 5ebd39bfc9 Add utilities that can be used to query a queue from within an ISR. 2008-03-23 15:58:27 +00:00
Richard Barry 58905b6fb4 Performance optimisation. 2008-03-23 15:54:50 +00:00
Richard Barry a8d03f24e3 Performance optimisation. 2008-03-23 15:53:37 +00:00
Richard Barry b53d20dfd2 Remove absolute paths. 2008-03-07 18:46:56 +00:00
Richard Barry ebfede454f Check in before attempting to remove absolute paths in PPC405 project. 2008-03-07 18:23:27 +00:00
Richard Barry 5cb4e9b5a6 Get preeprocessor working correctly. 2008-03-07 16:29:15 +00:00
Richard Barry 1217e8ce06 Get reg test tasks working correctly. 2008-03-07 16:28:32 +00:00
Richard Barry 1aecde4efd Renaming .s to .S. 2008-03-07 13:43:27 +00:00
Richard Barry 640675e76b Add -Wall option. 2008-03-07 11:14:18 +00:00
Richard Barry 6e4a303cdb Add -Wall option. 2008-03-07 11:13:41 +00:00
Richard Barry 09803ca31e Increase baud rate to 115200. 2008-03-07 11:13:02 +00:00
Richard Barry 2e76895839 Add -Wall option. 2008-03-07 11:12:17 +00:00
Richard Barry 89c922a586 Small optimisation by using constants for register addresses. 2008-03-07 11:11:27 +00:00
Richard Barry ebe6e14f25 Add extra tests into the regtest tasks. 2008-03-07 11:10:33 +00:00
Richard Barry ade2da38ed Clear the interrupt prior to servicing the interrupt - previously it was the other way around. 2008-03-07 11:08:10 +00:00
Richard Barry bf5cd55c55 Comment ready for release. 2008-03-06 20:55:49 +00:00
Richard Barry f39424feee Update commenting ready for release. 2008-03-06 16:51:57 +00:00
Richard Barry f73e663411 Rename PPC405 to PPC405_Xilinx. 2008-03-05 12:31:04 +00:00
Richard Barry 643c94a5a8 Rename PPC405 to PPC405_Xilinx. 2008-03-05 12:24:31 +00:00
Richard Barry 7008ebb8c9 PPC405 work in progress. 2008-03-05 12:22:19 +00:00
Richard Barry 39b68e7fc5 PPC405 work in progress. 2008-03-05 12:21:46 +00:00
Richard Barry ebcac1c4b5 PPC405 work in progress. 2008-03-05 10:13:59 +00:00
Richard Barry 8e856177c9 Modified uxTaskGetStackHighWaterMark() to take a parameter for the task to be checked, rather than just checking the stack of the calling task. 2008-03-05 10:13:18 +00:00
Richard Barry 47a7f0165b Modified uxTaskGetStackHighWaterMark() to take a parameter for the task to be checked, rather than just checking the stack of the calling task. 2008-03-05 10:12:35 +00:00
Richard Barry 6e59817356 Remove system.log from the repository. 2008-03-05 10:11:22 +00:00
Richard Barry dab366cd77 PPC405 work in progress. 2008-03-05 10:09:38 +00:00
Richard Barry 88548253ec New PPC405 port files. 2008-03-04 08:56:32 +00:00
Richard Barry 60bead5003 Remove warnings generated by new features. 2008-03-03 21:46:29 +00:00
Richard Barry 39f6b0b5de Add stack check macros. 2008-03-03 20:56:55 +00:00
Richard Barry 71ef3153ea Add trace macros. 2008-03-03 16:32:37 +00:00
Richard Barry b8b70528f4 Add trace macros. 2008-03-03 16:32:05 +00:00
Richard Barry 2b174e556c Add vTaskEnterCritical() and vTaskExitCritical() functions. 2008-02-25 18:54:28 +00:00
Richard Barry ebf69dab5d More work in progress (PPC). 2008-02-25 18:53:23 +00:00
Richard Barry 9a9cd41098 Basic cooperative reg test tasks working. 2008-02-25 11:18:23 +00:00
Richard Barry 3c2306ed72 Work in progress, for backup purposes only. 2008-02-25 09:56:56 +00:00
Richard Barry fedf9c7ba0 Add initial PPC405 files - this is a work in progress not a completed port. 2008-02-24 11:42:27 +00:00
Richard Barry 8c0260568e Add PPC definition. 2008-02-24 11:41:26 +00:00
Richard Barry 3e94695fb4 Update to V4.7.2. 2008-02-21 19:45:27 +00:00
Richard Barry 12e207f913 Remove unused project. 2008-02-19 12:44:08 +00:00
Richard Barry 1398ff5f3b Increase stack size. 2008-02-17 21:11:52 +00:00
Richard Barry 30eb33aa89 Change stack size depending on memory model. 2008-02-17 21:00:56 +00:00
Richard Barry c8de9a1cd8 Turn watchdog on. 2008-02-17 20:27:34 +00:00
Richard Barry 280a78ac5b Still trying to sort out weird symbolic linking between two partest.c files. 2008-02-17 20:07:58 +00:00
Richard Barry 6e9b21812b 2008-02-17 20:06:24 +00:00
Richard Barry 1e95bfc6b6 2008-02-17 20:02:56 +00:00
Richard Barry cf10f33866 2008-02-17 19:15:18 +00:00
Richard Barry ad75bb3b77 Change optimisation level. 2008-02-17 18:33:42 +00:00
Richard Barry 4ed46aaef9 2008-02-17 18:26:52 +00:00
Richard Barry 303fb84de3 Automatically adjust trace buffer size using sizeof(). 2008-02-17 18:24:50 +00:00
Richard Barry 6bc6cc282d Tidy up 16bit Fujitsu port ready for release. 2008-02-17 18:24:03 +00:00
Richard Barry 95189f40d2 2008-02-17 18:19:21 +00:00
Richard Barry babd7f05f7 Remove obsolete code. 2008-02-17 18:08:59 +00:00
Richard Barry 125a9ef81d Correct cut and paste asm code. 2008-02-17 18:08:09 +00:00
Richard Barry 2855dbaa43 2008-02-17 08:56:18 +00:00
Richard Barry 2f75980fca Correct merge. 2008-02-16 21:10:19 +00:00
Richard Barry 7306d9b428 Correct comments. 2008-02-15 20:10:30 +00:00
Richard Barry c8b4248e5d Get the trace utility and co-routines working. 2008-02-15 20:08:30 +00:00
Richard Barry 91a1b614f8 Remove references to ulCriticalNesting from the register test tasks as the variable is no longer saved as part of the task context. 2008-02-15 13:46:30 +00:00
Richard Barry 79dd981500 Remove casts that were generating warnings (even though the casts were added to remove warnings with some compilers). 2008-02-15 13:44:06 +00:00
Richard Barry 61efe2504c Revert critical section handling back to the original method. 2008-02-15 13:33:44 +00:00
Richard Barry 991624461f Revert to original critical section handling method. 2008-02-15 13:24:05 +00:00
Richard Barry f44fc2c665 Change to use the configKERNEL_INTERRUPT_PRIORITY setting. 2008-02-13 19:43:30 +00:00
Richard Barry 89d7f37094 Remove unnecessary NOPs. 2008-02-13 19:42:22 +00:00
Richard Barry 226d78fcab 2008-02-13 13:53:24 +00:00
Richard Barry f315c91f38 Continue to tidy up Fujitsu ports. 2008-02-13 13:34:39 +00:00
Richard Barry c6965bc253 Continue to tidy up the Fujitsu ports. 2008-02-13 13:32:10 +00:00
Richard Barry 040475fca6 2008-02-13 13:22:44 +00:00
Richard Barry 3f0ee56dbb Delete four separate configurations and replace with a single new configuration. 2008-02-13 11:45:12 +00:00
Richard Barry bc590036e0 Delete four separate configurations and replace with a single new configuration. 2008-02-13 11:44:42 +00:00
Richard Barry b2ec747412 Delete four separate configurations and replace with a single new configuration. 2008-02-13 11:44:13 +00:00
Richard Barry 0c6913bfab Delete four separate configurations and replace with a single new configuration. 2008-02-13 11:43:24 +00:00
Richard Barry 0fef4cbaf9 Delete four separate configurations and replace with a single new configuration. 2008-02-13 11:42:28 +00:00
Richard Barry 613c764189 Tidy up - spell check. 2008-02-13 11:15:52 +00:00
Richard Barry 5a418b56fa Tidy up - spell check. 2008-02-13 10:39:07 +00:00
Richard Barry c3e153145b Add Fujitsu FX definition to portable.h. 2008-02-12 21:53:52 +00:00
Richard Barry 961e402e12 Add Fujitsu FX definition to portable.h. 2008-02-12 21:51:50 +00:00
Richard Barry 97bee57daa Work in progress still. 2008-02-12 21:50:24 +00:00
Richard Barry 0faf33fbca Work in progress. 2008-02-12 17:47:34 +00:00
Richard Barry bdea62587e Work in progress. 2008-02-12 17:46:50 +00:00
Richard Barry 161e266c97 Renamed MAIN.c to main.c. 2008-02-12 17:39:23 +00:00
Richard Barry b31c9e18f9 Work in progress. 2008-02-12 17:37:03 +00:00
Richard Barry 1eb00d2045 Extra file used by 16bit Fujitsu port. 2008-02-12 10:37:36 +00:00
Richard Barry 35afa63a47 Add Fujitsu 16bit port files. 2008-02-12 09:29:26 +00:00
Richard Barry b4ed11bddb Add Fujitsu 16bit demo files. 2008-02-12 09:26:41 +00:00
Richard Barry 7e5450acd1 Change the critical section handling (Fujitsu 32bit port). 2008-02-11 21:02:40 +00:00
Richard Barry eb64d935dc Update interrupt priorities for Fujitsu port. 2008-02-11 21:01:22 +00:00
Richard Barry 6610911d3e Continue to work on Fujitsu 32bit port. 2008-02-11 18:28:03 +00:00
Richard Barry 7e6a2b0bd5 Update Fujitsu port files - work in progress. 2008-02-10 20:31:19 +00:00
Richard Barry ba4d636307 Update Fujitsu 32bit port - work in progress. 2008-02-10 20:30:11 +00:00
Richard Barry 778b0d13ef Remove qualifier from cast. 2008-02-10 20:28:55 +00:00
Richard Barry 3b1b99c0d7 2008-02-10 14:48:23 +00:00
Richard Barry b5d4e08320 2008-02-10 14:45:24 +00:00
Richard Barry 93dd04d5dd Work in progress... 2008-02-10 14:44:30 +00:00
Richard Barry 5afe5250e5 Add softtune required directory structure. 2008-02-06 18:09:27 +00:00
Richard Barry eed758709c Add MB91460 port and demo files. 2008-02-06 17:27:42 +00:00
Richard Barry e6e5add7d8 Remove obsolete comment. 2008-02-06 16:49:39 +00:00
Richard Barry 7d0f249fad Correct API call used to create mutex. 2008-02-04 08:42:12 +00:00
Richard Barry 05920be92a Correct sample code for recursive mutexes. 2008-02-04 08:37:01 +00:00
Richard Barry c86dcf7826 Update to V4.7.1 2008-02-03 19:45:58 +00:00
Richard Barry e018422743 Update to allow use with the cooperative scheduler. 2008-01-27 20:25:36 +00:00
Richard Barry 2ee98beba2 Add recursive mutexes to PC demo. 2008-01-27 19:27:51 +00:00
Richard Barry 354a57ed5e Update counting semaphore function prototype. 2008-01-27 19:25:11 +00:00
Richard Barry 3ddf9a4210 Correct spelling. 2008-01-27 19:11:49 +00:00
Richard Barry c4dbab94f3 Set the interrupt priority of the button and UART interrupts. 2008-01-27 18:57:59 +00:00
Richard Barry 008f4cb517 Set the interrupt priority of the button and UART interrupts. 2008-01-27 18:49:53 +00:00
Richard Barry d7e0337587 Update the release build for use with IAR V5.11. 2008-01-27 18:09:00 +00:00
Richard Barry 625a65e970 IAR V5.11 compatible linker script. 2008-01-27 18:00:13 +00:00
Richard Barry e6d0609a54 Update release build for IAR 5.11. 2008-01-27 17:41:19 +00:00
Richard Barry 8ac8b20960 Remove incorrect comment. 2008-01-27 17:21:14 +00:00
Richard Barry 0b5d1fb68a Update for 48MHz operation. 2008-01-27 17:02:05 +00:00
Richard Barry 701b090cd1 Header associated with new recursive mutex test file. 2008-01-27 16:04:18 +00:00
Richard Barry 1bf8332ada Update the release build for IAR V5.11. 2008-01-27 15:49:22 +00:00
Richard Barry ef46e9bc60 Delete old IAR V4 library format. 2008-01-27 14:41:43 +00:00
Richard Barry 79b506472d Documentation updates. 2008-01-24 21:33:00 +00:00
Richard Barry c4edb21f63 Remove system files not longer required by IAR V5.11. 2008-01-23 19:35:54 +00:00
Richard Barry 474cb76864 UpdUpdate IAR projects to use Embedded Workbench V5.11. 2008-01-23 08:35:47 +00:00
Richard Barry dfb8e7003b Prepare for V4.7.1 release. 2008-01-22 18:43:03 +00:00
Richard Barry 3c02bc385b Remove .bak files. 2008-01-22 18:26:07 +00:00
Richard Barry 2ac722926e Correct some documentation. 2007-12-18 20:07:21 +00:00
Richard Barry fb799b7647 Update documentation. 2007-12-06 10:19:28 +00:00
Richard Barry 6e27b6ec86 Update documentation to correct spelling. 2007-12-05 21:50:00 +00:00
Richard Barry 44911a1c48 Update to V4.7.0. 2007-12-05 21:24:47 +00:00
Richard Barry 8603259d40 Add first version of alternative API. 2007-12-02 18:37:43 +00:00
Richard Barry b6d2b739f3 Ensure warning free compilation under GCC. 2007-12-01 20:56:44 +00:00
Richard Barry 2931f43895 Missing PIC32 files. 2007-12-01 20:29:54 +00:00
Richard Barry d69d2df8d6 Counting semaphore demo added. 2007-12-01 20:28:04 +00:00
Richard Barry a8eabeabbb Add PIC32 code. 2007-11-26 15:45:21 +00:00
Richard Barry 48b4870c7e Add STM32 Primer demo. Remove the .lock file from the Eclipse demos. 2007-11-26 15:43:24 +00:00
Richard Barry e8ddef1d93 Add the SAM7X Eclipse files. 2007-11-21 18:29:41 +00:00
Richard Barry 620d3999ef Update to V4.6.1 - including PIC32MX port. 2007-11-05 16:44:39 +00:00
Richard Barry 0a9c978f18 Changes between V4.5.0 and V4.6.0 released October 28 2007
+ Changed the method used to force a context switch within an ISR for the
	  ARM7/9 GCC ports only.  The portENTER_SWITCHING_ISR() and 
	  portEXIT_SWITCHING_ISR() macros are no longer supported.  This is to 
	  ensure correct behaviour no matter which GCC version is used, with or
	  without the -fomit-frame-pointer option, and at all optimisation levels.
	+ Corrected the prototype for xQueueGenericSend() within queue.h.
2007-10-28 14:42:46 +00:00
Richard Barry ada7fa862d Changed the way the ARM7/9 GCC ports enter interrupts that can cause a context switch. 2007-10-28 13:55:35 +00:00
Richard Barry c54ec1c639 Updated GCC/ARM7 ISR functions so they only use static variables. 2007-10-26 10:14:19 +00:00
Richard Barry a3921adfe1 + The macro portENTER_SWITCHING_ISR() no longer attempts to use the frame pointer. Variables declared within ISRs must now be declared static. 2007-10-26 09:52:15 +00:00
Richard Barry 98a9959a44 Update to V4.5.0 files and directory structure. 2007-09-17 10:07:48 +00:00
Richard Barry 1362bebfdc Remove separate LM3Sxxxx directories. These have been replaced by consolidated directories in the V4.5.0 version. 2007-09-17 09:51:42 +00:00
Richard Barry bd5a0a1ce8 Fixed bugs as listed to date in the tracker for the SourceForge project. 2007-08-24 15:35:09 +00:00
Richard Barry c77358491a Update the queue peek behaviour and add QPeek test files. 2007-08-23 11:37:41 +00:00
Richard Barry 5f16b0abca Fixed name of xQueueSendToFrontFromISR. 2007-08-23 07:23:53 +00:00
Richard Barry 86f4e8b4a0 Changed a couple of casts to remove compiler warnings. 2007-08-22 16:56:05 +00:00
Richard Barry 60338bd872 Added xQueueSendToBack, xQueueSendToFront, xQueuePeek and xSemaphoreCreateMutex - along with GenQTest.c to demonstrate their usage. 2007-08-21 16:54:48 +00:00
Richard Barry ac14fdb0b7 Updates prior to release of V4.4.0 due to testing. 2007-07-30 20:48:12 +00:00
Richard Barry 15268bfbeb Update to V4.4.0. 2007-07-29 15:23:39 +00:00
Richard Barry a06a2e492f Results of testing new prvIsTaskSuspended() function. 2007-07-28 18:41:53 +00:00
Richard Barry de1094e980 Removed const from xTaskResumeFromISR() and xTaskResume() local variables as it upsets the call to the list function. 2007-07-28 18:35:03 +00:00
Richard Barry 7a8eb507a7 Modifications to correct behaviour when a task is blocked without specifying a wake time, and also introduce the xTaskGetSchedulerState() function. 2007-07-28 16:33:07 +00:00
Richard Barry 94c94d3c0e Updated AVR32 demos and added AVR32 UC3B demo. 2007-07-27 07:59:50 +00:00
Richard Barry 45e7e5ac55 Add in first STM32 demo. 2007-06-11 05:36:39 +00:00
Richard Barry 543ec864c4 Update in preparation for the V4.3.1 release. 2007-06-09 15:13:29 +00:00
Richard Barry fc1d6ea442 Update in preparation for the V4.3.1 release. 2007-06-09 15:10:24 +00:00
Richard Barry 42b2cbf237 Update in preparation for the V4.3.1 release. 2007-06-09 15:08:43 +00:00
Richard Barry 8235f7a15f Update in preparation for the V4.3.1 release. 2007-06-09 15:05:10 +00:00
Richard Barry 68a1ab1d04 Update in preparation for the V4.3.1 release. 2007-06-09 15:03:03 +00:00
Richard Barry 623aa3675f Update to V4.3.0 as described in http://www.FreeRTOS.org/History.txt 2007-06-05 09:56:16 +00:00
Richard Barry 017740b75a Update to V4.3.0 as described in http://www.FreeRTOS.org/History.txt 2007-06-05 09:53:14 +00:00
Richard Barry 67d0d1ec3b Update to V4.3.0 as described in http://www.FreeRTOS.org/History.txt 2007-06-05 09:44:58 +00:00
Richard Barry 45410fcd3a Update to V4.3.0 as described in http://www.FreeRTOS.org/History.txt 2007-06-05 09:43:26 +00:00
Richard Barry 9af97b86f8 Update to V4.3.0 as described in http://www.FreeRTOS.org/History.txt 2007-06-05 09:36:57 +00:00
Richard Barry 22e434dfaf 2007-06-05 09:35:13 +00:00
Richard Barry 014d7f5b8f Update to V4.3.0 as described in http://www.FreeRTOS.org/History.txt 2007-06-05 08:59:26 +00:00
Richard Barry 5a3272cdca Accomodates wizC V14.00B and up with full optimisations.
Thanks Marcel.
2007-04-22 10:50:03 +00:00
Richard Barry b36ba44e0d Add LPC2368 demo. 2007-04-05 13:47:25 +00:00
Richard Barry 0a6d59a611 V4.2.1 files. 2007-04-01 20:47:49 +00:00
Richard Barry 6118595a07 Add AVR32 port and demo files. 2007-04-01 19:52:27 +00:00
Richard Barry 504382bcb8 Add AVR32 port and demo files. 2007-04-01 19:46:26 +00:00
Richard Barry 45d8ca15b5 Add AVR32 port and demo files. 2007-04-01 19:45:41 +00:00
Richard Barry 06bbaed27a Add AVR32 port and demo files. 2007-04-01 19:44:02 +00:00
Richard Barry b578c75c4e Get rid of compiler warnings. 2007-04-01 19:40:34 +00:00
Richard Barry bf2b676eaa Add AVR32 port and demo files. 2007-04-01 19:37:01 +00:00
Richard Barry b727359f1b Add AVR32 port and demo files. 2007-04-01 19:33:44 +00:00
Richard Barry 4c3a1e29e0 Update include file from lpc2128.h to lpc21xx.h. 2007-03-26 12:04:12 +00:00
Richard Barry 5d413a0078 Moved where LCD_Init() is called from so it cannot call vTaskDelay() before the scheduler is started. 2007-03-08 21:08:52 +00:00
Richard Barry 17228aca47 Add an option for 8 byte alignment. 2007-03-07 17:52:10 +00:00
Richard Barry 8b8a0eeff3 Added -fomit-frame-pointer option. 2007-02-09 21:34:04 +00:00
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AASR
ABETRG
ABSR
ABTSZ
ACCAH
ACCAL
ACCAU
ACCBH
ACCBL
ACCBU
ACLK
acpa
ACPA
acpc
ACPC
addi
addiu
ADTRG
aeevt
AEEVT
AERR
AIRCR
ALMIEN
ALMV
ANDC
andi
ANDCCR
APIC
APROCFREQ
APSR
ARMCM
Armv
ARMVFP
ASTRINGZ
aswtrg
ASWTRG
Ateml
ATMEGA
Atmel
ATMEL
atomatic
ATPASTE
AVRDX
BANDL
bcpb
BCPB
bcpc
BCPC
beevt
BEEVT
beqz
BERR
bfextu
Biagioni
bics
BISR
BODIEN
BODSTS
brealid
BRGR
brhi
brne
bswtrg
BSWTRG
Bytesto
CANEN
CANRX
CANTX
capitalisation
cbmc
CBMC
cbor
CBOR
CCIE
CCMP
CCNT
CCNTR
CCPN
CCPR
CCRH
CDTY
CDTYR
CFBS
CFRC
CHDIV
CHDR
CHRL
CHSR
CICR
CISR
CKDIV
CKDIVMD
CKEY
CKGR
CKLO
CKPS
CLDIV
CLEARINTENA
CLKA
CLKB
CLKDIS
CLKEN
clki
CLKI
CLKP
CLKS
CLKSOURCE
CLKSTA
CLRB
CLRF
clrm
CLRPSW
CMCNT
CMCON
CMCOR
CMCR
CMIE
cmock
Cmock
CMock
CMOCK
cmpx
CMSIS
CMSTR
CNTE
coalescences
CODAN
codecov
CODR
comms
COMPA
CONFG
coreid
coremqtt
CORTUS
coverity
Coverity
covfs
COVFS
CPACR
cpas
CPAS
cpbs
CPBS
cpcdis
CPCDIS
CPCS
cpcstop
CPCSTOP
CPCTRG
CPIV
CPRD
CPRDR
CPRE
cpsid
cpsie
CPSR
CPUCLK
CPUID
CRCB
crflash
CRGFLG
CRGINT
crhook
croutine
CRTV
CSAAT
CSDK
csrr
csrs
csrw
CTCR
ctest
CTPC
CTPSW
CTRLA
CTSIC
CUPD
CUPDR
CWGR
cxsf
CYGNAL
DADR
daif
DAIFCLR
DAIFSET
DATAR
DATAW
DATNB
DATRDY
DBGU
DCDIC
DCMOCK
DCMR
Dconfig
DCOUNT
decf
decfsz
decihours
Decihours
DECIHOURS
DECNT
DFPU
DFREERTOS
dicr
DICR
DIVB
DLYBCS
DLYBCT
DLYBS
DLYI
DNDEBUG
DOCOUNT
DOENDH
DOENDL
DOHIGH
DOLOW
DOSTARTH
DOSTARTL
DPFPU
DPLB
DPOPM
DPSW
DPUSHM
DRDY
DRFCS
DRPT
DRXD
DSLPE
DSNACK
DSPIC
DSRIC
DSWPAG
DTGLE
DTREN
DTXD
DUNITY
DVAR
Dxxx
EABI
ecall
ECIT
ECRS
ECRSDV
eevt
EEVT
eevtedg
EEVTEDG
EFRHD
EIIC
EINT
EIPC
EIPSW
Elektronika
EMACB
EMDC
EMDIO
emption
endm
ENDRX
ENDTX
enetrg
ENETRG
ENMFILE
EOICR
epage
EPEDS
EPINT
EPTYPE
EQIC
EQIF
EQMK
EREFCK
eret
ERRA
ERSTL
ERXCK
ERXDV
ERXER
Espeche
Espressif
ESTATUS
ETRCS
ETRGEDG
etrgs
ETRGS
ETXCK
ETXEN
ETXER
evba
EVBA
EWARM
EWAVR
EWRL
EWRX
EXID
expandnl
EXTRSM
FADD
FCMD
fcolor
FCSE
fcsr
fdiagnostics
fdiv
FDIV
FEDPICC
FERR
FFDR
FFER
FFSR
FIDI
FLASH
Flsh
FLSH
FMCN
FMRXNE
FMXR
fninit
fnsave
FNTR
FOSC
FPCCR
FPCSR
FPEPC
FPSW
FPUL
FRDY
Frieder
FSDEN
FSEDGE
FSLEN
FSOS
FSR
fwait
GCACC
GCTRL
getpacketid
getvect
GIEH
GIEL
GIRQ
GLBSTATE
GMSK
GNURX
GOVRE
gpio
GPIO
GPNVM
GPTA
HCLK
Hitach
HRESP
HTCFG
HWHSH
HWORD
HWRD
IADR
IADRSZ
ICCAVR
ICCBPR
ICCEOIR
ICCIAR
ICCICAR
ICCPMR
ICCR
ICCRPR
ICCRX
ICERST
ICIPI
ICSR
IDCR
IECR
IFDR
IFER
IFLASH
IFSR
imajeff
INACK
INDF
inpw
INTE
INTFRCH
INTFRCL
INTIT
INTTM
IODEFINE
IORLW
IPEN
IPIR
IPLB
ipsr
IPSR
iret
IRET
IRXFCS
ISRAM
ISRR
ISRS
ISR's
ISRTICK
isystem
ITIF
ITMC
ITMK
ittt
JFRAME
JTAG
JTVIC
Kamil
kbhit
Kbyte
Krutmann
LAPIC
LCDR
LCOL
lcov
ldaa
LDATA
LDBDIS
LDBSTOP
ldmdb
LDMFD
ldmia
LDRA
ldras
LDRAS
ldrb
ldrbs
LDRBS
LDRNE
ldsr
lidt
LINKR
LJMP
LLIO
lovrs
LOVRS
lpcount
lpend
lpstart
LPTHREAD
lsls
LSPEN
LSPENS
ltorg
LWRD
MABT
MACL
MAINF
MAINRDY
MAIR
Mang
Mbits
mbranch
mcause
MCFR
MCKA
MCKB
MCKR
MCKRDY
MCLK
MCU
MDDR
MDER
MDIO
MDLC
MDSR
mepc
mevents
MFCR
mfear
mfedr
mfesr
mffsr
mfgpr
mfhi
MFID
mflo
mfloat
mfmsr
mfpu
mhartid
MIDE
Mikro
MIKROC
misra
Misra
MISRA
MMCR
MMSYSERR
MOSC
MOSCS
MOSI
movem
moveq
MOVF
MOVFF
movhi
movia
movlb
movlw
movne
movs
movw
MOVWF
movx
MPLAB
MPUCTRL
MQTT
MRDY
MREAD
mret
mrseq
mrsne
MRTR
MSBF
MSDIS
MSEN
mspgcc
msreq
mstatus
MSTATUS
MSTP
MSTPA
MSTPCR
MSTPCRA
MSTPCRC
MSTR
MTCR
mthi
MTIOA
MTIOB
mtlo
mtsr
MVFACGU
MVFACHI
MVFACLO
MVFACMI
MVFC
MVTACGU
MVTACHI
MVTACLO
MVTC
MVTIPL
mypy
NCFGR
NCPHA
NEBP
NFIQ
Nios
NIOSII
NIRQ
NOGIC
noheap
nondet
Nondet
NONDET
nostdint
NPCS
NRSTL
NSACR
NSFPU
NSSR
NTRST
NVIC
ODAT
ODSR
OINC
OIWBNOWA
OIWBWA
OIWTNOWA
OPMOD
optimisations
OPTIMISED
optimiser
ORCCR
orrs
OSCBYPASS
OSCEN
OSCOFF
OSCOUNT
OSMC
OSTM
outpw
OVLY
OVRE
OVRES
OVRUN
OWATCOM
OWDR
OWER
OWSR
pacbti
PACBTI
PAGEN
PCDR
PCER
PCKR
PCLATH
PCLATU
PCLK
PCLKSEL
PCSR
PCXI
PDSR
PEID
PEIE
PENDSV
PENDSVCLEAR
PENDSVSET
PENSVCLEAR
PERIODH
PERIODL
periph
PERIPH
PFRE
phelter
PHYA
PICNT
pico
picolibc
Picolibc
PICOLIBC
PIEN
PIIR
PIMR
PIOA
PIOB
PISR
PITC
PITEN
PITIEN
PIVR
PLLB
PLLR
popa
popm
POPNE
POPW
popx
portcomn
PORTEN
portex
portisr
POWERUP
ppuc
PPUDR
PPUER
PPUSR
ppux
PRCR
PREA
PREB
PRIA
Prioritised
PRIS
PRIVDEFENA
PROCDLY
PRODH
PRODL
PROGE
Prokic
prtmacro
psha
psplim
PSPLIM
PSTDBY
PSVPAG
PTCR
PTSR
Pulpino
PUON
pusha
pushf
pushm
PUSHNE
PUSHW
pushx
PWMC
pylint
pytest
pyyaml
RAMPZ
randomisation
RASR
Rationalised
Raynald
RBAR
RBOF
RBQP
RBSY
RCALL
RCAP
RCIF
RCMR
RCOMP
RCOUNT
rddsp
RDRF
reent
REENT
REGA
RELD
Renesas
reta
reti
RETP
RETTO
RFEIA
RFMR
RIIC
RIPL
riscv
RLAR
RLCE
RLES
RLEX
RMII
RMWUPE
RNCR
RNPR
ROUSSET
ROVR
RSHR
rslcx
RSLCX
RSMINPR
RSTC
RSTEP
RSTIT
RSTNACK
RSTRX
RSTSTA
RSTTX
Rsvd
RTAR
RTCEN
RTCSC
RTICTL
RTIE
RTIF
RTIFRC
RTMR
RTOR
RTSEN
RTSR
RTTC
RTVR
RVDS
RXBRK
RXBUFF
RXBYTECNT
RXDIS
Rxed
RXEN
RXENA
RXOVERWRITE
RXRDY
RXRSM
RXSETUP
RXSUSP
RXSYN
RXTDIS
RXTEN
RXUBR
SBYCR
SCALL
SCBR
SCDR
SCER
SCSR
SDCC
SECU
SENDA
SETB
SETEN
SETINTENA
SETPSW
SETR
setvect
SFRC
SHLL
SHLR
SHPR
SHTIM
SIFIVE
sinclude
slli
SODR
SOFTIRQ
SPCK
SPIEN
SPSR
SRCMP
SREG
SRSDB
SSBY
SSIR
SSKEY
staa
Stellaris
STILM
STKPTR
stmdb
stmia
stsr
STTBRK
STTDLY
STTOUT
STTTO
SVACC
svcne
SVDIS
svlcx
SVMST
SWAPW
SWHSH
SWINR
SWINT
SWINTR
SWRST
SWTRG
synchronise
SYNCM
syncm
SYSC
sysclk
Sysclk
SysClk
SYSClk
SYSCLK
sysclock
Sysclock
SysClock
SYSCLOCK
TACCR
TACCTL
TACLR
TACTL
TBCTRL
TBLPTRH
TBLPTRL
TBLPTRU
TBLPTRUH
TBLPTRUL
TBQP
TBSY
tcclks
TCCR
TCKPS
TCLK
TCMR
TCOMP
TDES
TDESMOD
TDMI
TDRE
TEOF
TFLG
TFMR
TGRA
THALT
TIAO
TICKISR
TIMFRZ
TIMSK
TIOA
TIOB
tmcsr
TMCSR
TMIF
TMKAEN
TMKAIF
TMKAMK
TMMK
TMPR
TMRLR
TNCR
TNPR
TOSU
TOVF
TPCS
TPFR
TRAPA
TRGEN
TRGSEL
TSHR
tstfsz
TSTP
TSTR
TTGR
TUND
TUNDR
TWCK
TXBUFE
TXCOMP
TXDIS
TXEMPTY
TXEN
TXENA
TXERR
TXIE
TXIF
TXPKTRDY
TXRDY
TXSYN
TXTEN
TXUBR
TXVC
TXVDIS
UBTI
UDCP
UNACKED
uncrustify
UNDADD
unpadded
Unpadded
UNPADDED
unprotect
Unprotect
Unprotected
UNRE
UNSUB
UNSUBACK
unsubscriptions
unsuspended
UPAC
URAD
URAT
URSTEN
URSTIEN
URSTS
Usart
USART
USPRG
USRIO
utest
utilises
utilising
vcsr
VDDCORE
vect
Vect
VECT
VECTACTIVE
VECTKEY
visualisation
vldmdbeq
vldmia
vldmiaeq
vlenb
VMSRNE
vpop
VPOPNE
vpush
VPUSHNE
VRPM
Vrtc
vsetvl
vstmdbeq
vstmiaeq
VTOR
W
WAVESEL
wavsel
Wcolor
Wconversion
WDCR
WDDBGHLT
WDDIS
WDERR
WDFIEN
WDIDLEHLT
WDMR
WDRPROC
WDRSTEN
WDRSTT
WDSR
WDTC
wdtcon
WDUNF
Werror
WESTAT
Weverything
Wextra
winmm
WIZC
Wpedantic
wrdsp
WREG
Wunused
XEXC
XPAR
xparameters
XPSR
XRAM
xtal
XTENSA

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# Each line is a file pattern followed by one or more owners.
# These owners will be the default owners for everything in
# the repo. Unless a later match takes precedence,
# @global-owner1 and @global-owner2 will be requested for
# review when someone opens a pull request.
* @FreeRTOS/pr-bar-raisers
# Order is important; the last matching pattern takes the most
# precedence. When someone opens a pull request that only
# modifies JS files, only @js-owner and not the global
# owner(s) will be requested for a review.
# *.c FreeRTOS/pr-bar-raiser
# You can also use email addresses if you prefer. They'll be
# used to look up users just like we do for commit author
# emails.
# *.go docs@example.com
# In this example, @doctocat owns any files in the build/logs
# directory at the root of the repository and any of its
# subdirectories.
# /build/logs/ @doctocat
# The `docs/*` pattern will match files like
# `docs/getting-started.md` but not further nested files like
# `docs/build-app/troubleshooting.md`.
# docs/* docs@example.com
# In this example, @octocat owns any file in an apps directory
# anywhere in your repository.
# apps/ @octocat
# In this example, @doctocat owns any file in the `/docs`
# directory in the root of your repository and any of its
# subdirectories.
# /docs/ @doctocat

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# Contribution guidelines
Thank you for your interest in contributing to our project. Whether it's a bug report, new feature, code, or
documentation, we welcome our community to be involved in this project.
Please read through this document before submitting any issues or pull requests to ensure we are able to help you and all members of the community as effectively as possible.
## Code of conduct
This project has adopted the [Amazon Open Source Code of Conduct](https://aws.github.io/code-of-conduct).
For more information see the [Code of Conduct FAQ](https://aws.github.io/code-of-conduct-faq) or contact
opensource-codeofconduct@amazon.com with any additional questions or comments.
## Security issue notifications
If you discover a potential security issue in this project we ask that you notify AWS/Amazon Security via our [vulnerability reporting page](https://aws.amazon.com/security/vulnerability-reporting/). Please do **not** create a public github issue.
## Submitting a bugs/feature request
Have a bug to report or feature to request? Follow these steps:
1. Search on the [FreeRTOS Community Support Forums](https://forums.freertos.org/) and [GitHub issue tracker](https://github.com/FreeRTOS/FreeRTOS/issues?utf8=%E2%9C%93&q=is%3Aissue) to be sure this hasn't been already reported or discussed.
2. If your search turns up empty, create a new topic in the [forums](https://forums.freertos.org/) and work with the community to help clarify issues or refine the idea. Include as many of the details listed below.
3. Once the community has had time to discuss and digest, we welcome you to create an [issue](https://github.com/FreeRTOS/FreeRTOS/issues) to report bugs or suggest features.
When creating a new topic on the forums or filing an issue, please include as many relevant details as possible. Examples include:
* A clear description of the situation - what you observe, what you expect, and your view on how the two differ.
* A reproducible test case or sequence of steps.
* The version of our code being used.
* Any modifications you've made relevant to the bug.
* Details of your environment or deployment. Highlight anything unusual.
## Contributing via pull request
Contributions via pull requests are much appreciated. Before sending us a pull request, please ensure that:
1. You are working against the latest source on the *main* branch.
2. You check existing open, and recently merged, pull requests to make sure someone else hasn't addressed the problem already.
3. You open an issue to discuss any significant work - we would hate for your time to be wasted.
To send us a pull request, please:
1. Fork the repository.
2. Modify the source; focus on the specific change you are contributing. If you also reformat all the code, it will be hard for us to focus on your change.
3. Follow the [coding style guide](https://www.FreeRTOS.org/FreeRTOS-Coding-Standard-and-Style-Guide.html).
4. Commit to your fork using clear commit messages.
5. Send us a pull request, answering any default questions in the pull request interface.
NOTE: Please make sure the default option (Allow edits from maintainers) is left checked.
6. Pay attention to any automated CI failures reported in the pull request, and stay involved in the conversation.
GitHub provides additional document on [forking a repository](https://help.github.com/articles/fork-a-repo/) and
[creating a pull request](https://help.github.com/articles/creating-a-pull-request/).
## Coding style
* Please ensure that your code complies to the [FreeRTOS coding style guidelines](https://www.FreeRTOS.org/FreeRTOS-Coding-Standard-and-Style-Guide.html).
## Getting your pull request merged
All pull requests must be approved by our review team before it can be merged in. We appreciate your patience while pull requests are reviewed. The time it takes to review will depend on complexity and consideration of wider implications. For more information on the pull request process, please see the documentation [here](pull_request_process.md).
## Finding contributions to work on
Looking at the existing issues is a great way to find something to contribute on. As our projects, by default, use the default GitHub issue labels (enhancement/bug/duplicate/help wanted/invalid/question/wontfix), tackling open 'help wanted' issues is a great place to start.
## Licensing
The FreeRTOS kernel is released under the MIT open source license, the text of which can be found [here](https://github.com/FreeRTOS/FreeRTOS/blob/main/FreeRTOS/License/license.txt)
Additional license files can be found in the folders containing any supplementary libraries licensed by their respective copyright owners where applicable.
We may ask you to sign a [Contributor License Agreement (CLA)](https://en.wikipedia.org/wiki/Contributor_License_Agreement) for larger changes.

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---
name: Bug report
about: Create a report to help us improve FreeRTOS. This should only be used for confirmed
bugs. If you suspect something it is best to first discuss it on the FreeRTOS community
support forums linked below.
title: "[BUG]"
labels: bug
assignees: ''
---
**Describe the bug**
A concise description of what the bug is.
**Target**
- Development board: [e.g. HiFive11 RevB]
- Instruction Set Architecture: [e.g. RV32IMAC]
- IDE and version: [e.g. Freedom Studio 4.12.0.2019-08-2]
- Toolchain and version: [e.g. riscv64-unknown-elf-gcc-8.3.0-2019.08.0]
**Host**
- Host OS: [e.g. MacOS]
- Version: [e.g. Mojave 10.14.6]
**To Reproduce**
- Use project ... and configure with ...
- Run on ... and could observe ...
**Expected behavior**
A concise description of what you expected to happen.
**Screenshots**
If applicable, add screenshots to help explain your problem.
**Additional context**
Add any other context about the problem here.
e.g. code snippet to reproduce the issue.
e.g. stack trace, memory dump, debugger log, and many etc.
<!-- For general inquiries, please post in [FreeRTOS forum](https://forums.FreeRTOS.org) for community support. -->

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blank_issues_enabled: false
contact_links:
- name: FreeRTOS Community Support Forum
url: https://forums.freertos.org/
about: Please ask and answer questions about FreeRTOS here.

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---
name: Documentation issue
about: Create a report to help us improve our documentation.
title: "[DOC]"
labels: documentation
assignees: ''
---
**Describe the issue**
Please describe the issue and expected clarification in concise language.
**Reference**
Please attach the URL at which you are experiencing the issue.
**Screenshot**
If applicable, please attach screenshot.
**Browser**
- Browser: [e.g. Chrome]
- Version: [e.g. 80.0.3987.132]
<!-- For general inquiries, please post in [FreeRTOS forum](https://forums.FreeRTOS.org) for community support. -->

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---
name: Feature request
about: Suggest a new feature for this project
title: "[Feature Request] <replace with your title>"
labels: enhancement
assignees: ''
---
**Is your feature request related to a problem? Please describe.**
A clear and concise description of what the problem is. Ex. I'm always frustrated when [...]
**Describe the solution you'd like**
A clear and concise description of what you want to happen.
**Describe alternatives you've considered**
A clear and concise description of any alternative solutions or features you've considered.
**How many devices will this feature impact?**
Expected volume for your product.
**What are your project timelines?**
Timeline for milestones such as design completion, testing and validation, and production.
**Additional context**
Add any other context or screenshots about the feature request here.
If you have the same (or similar) feature request, please upvote this issue with thumbs up 👍
and use the comments section to provide answers to the questions above.

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## Reporting a Vulnerability
If you discover a potential security issue in this project we ask that you notify AWS/Amazon Security
via our [vulnerability reporting page](https://aws.amazon.com/security/vulnerability-reporting/) or directly via email to aws-security@amazon.com.
Please do **not** create a public github issue.

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https://www.renesas.com/us/en/document/mah/rh850f1k-group-users-manual-hardware?r=1170166
https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rh850-automotive-mcus
https://www.renesas.com/us/en/software-tool/c-compiler-package-rh850-family#downloads

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# Pull Request Process
This document explains the stages that a Pull Request (PR) goes through when a pull request is submitted to a git repository in the FreeRTOS organization in Github. Before you start a PR, please read and familiarize yourself with [CONTRIBUTING.md](CONTRIBUTING.md)
## ****Terminologies****
**FreeRTOS Partner Contributors**: These are selected developers and experts from community.
**FreeRTOS Team**: The FreeRTOS team consists of “AWS employees”.
**CODEOWNERS**: For all the FreeRTOS repositories, “FreeRTOS Team” and/or “FreeRTOS Partner contributors” will be CODEOWNER.
**Contributor**: The Contributor is the person who submitted the pull request.
**Assignee**: The Assignee is an AWS Employee who is responsible for identifying reviewers and managing the PR. They track the progress of pull requests and ensure that they are reviewed and merged in a timely manner.
**Reviewer**: Reviewers are responsible for reviewing pull requests and providing feedback to the contributor. Two approving reviews, one of which must be from the CODEOWNER of the reposiroty, are required for a PR to be merged.
## ****Pull Request Life-Cycle****
Once a pull request (PR) is submitted, it goes through the following stages:
1. Open
1. The PR is created.
2. All the GitHub Actions pass and the PR is ready to be reviewed.
2. Triage
1. The PR is assigned to an assignee.
2. The assignee assigns a reviewer from the FreeRTOS Team to the PR.
3. Review
1. The reviewer provides feedback and discusses open questions with the contributor, if needed.
2. If the contributor and the reviewer conclude, after discussion, that the PR will not be merged, then the PR is closed.
3. The PR contributor addresses the feedback and makes changes to the PR, if needed.
4. The reviewer approves the PR and assigns a second reviewer.
4. Second Review
1. The second reviewer reviews the PR and provides feedback, if needed.
2. The PR contributor addresses the feedback and makes changes to the PR, if needed.
3. The second reviewer approves the PR.
5. Testing
1. One of the reviewers tests the PR to ensure that it works correctly.
6. Ready to Merge
A PR becomes Ready to Merge when all the branch protection rules are satisfied. We have branch protection rules which require the following:
1. At least 2 reviews.
2. One review from the CODEOWNER of the given repository.
3. All PR checks must pass.
7. Merge
1. The PR is merged.
</br>
The status of a PR is indicated through GitHub labels added by Reviewers/Assignees. The following are the most common status indicators: Triaged, Reviewer Assigned, Concept ACK/NACK, First Code Review In Progress, First Code Review Complete, Second Code Review In Progress, Second Code Review Complete, Testing In Progress and Testing Complete.
Please note that we may decide to skip some stages depending on the type of PR. For example, a PR with a simple doc update will likely not go through all the above stages, however every PR is required to get approvals from 2 reviewers.
The pictorial representation of our PR process is shown below.
![PR Process](media/pr_process.png)
</br>
## **Turnaround Times**
The length of time required to review a PR is unpredictable and varies from PR to PR since it depends on the complexity of the changes, availability of reviewers, and overall workload of the team. We generally attempt to resolve each PR in accordance with the timeframes below, excluding weekends and public holidays:
* Triage: < 24 hours
* Concept ACK/NACK: 1-2 weeks
* Code Review: 1-2 weeks
* Testing: 1-2 weeks
## **Addressing the changes requested by reviewers**
The author should address any review comments in 4 weeks or less. If the author is unable to address the comments in that time, we will do one of the following:
* Make the required changes ourselves and merge the pull request.
* Close the pull request.
</br>
### **Best Practices for Faster Reviews**
Here are some best practices to follow so that your PR gets reviewed quickly.
1. If you plan to contribute a new feature to FreeRTOS, please get confirmation beforehand that the FreeRTOS team and community want, and will accept, this feature. This is true especially when you plan to make large or significant changes. To get confirmation and feedback from FreeRTOS Team and community, create a post in the FreeRTOS forums.
2. Smaller is better. Small, focused PRs are reviewed more quickly and thoroughly, are simpler to rollback, and involve less wasted effort if rejected. Avoid opening pull requests that span the whole repository.
3. Dont mix refactoring, bug fixes and feature development into a single PR. Lets say you are developing feature-x and you come across poorly named variables or incomplete/incorrect comments. You should consider fixing those, but in a separate PR, not in the same PR as feature-x.
4. Comments matter. The code you develop will need to be maintained for a long time. Well placed comments provide context to your reviewers, maintainers and users, and also prevent them from misunderstanding the purpose of the code. However, DO NOT add comments to explain things which are obvious by just glancing at the code. [Good Read: https://stackoverflow.blog/2021/12/23/best-practices-for-writing-code-comments/]
5. Test your PR. In your PR, please accompany your changes with suitable unit tests and any other tests that will be helpful, and include descriptions of how to perform any manual tests. Instructions for unit tests can be found at [freertos.org](https://freertos.org/FreeRTOS-Coding-Standard-and-Style-Guide.html#Testing) and [Github](https://github.com/FreeRTOS/FreeRTOS/blob/main/FreeRTOS/Test/CMock/Readme.md)
**Push Back its ok:**
Sometimes reviewers make mistakes. If a reviewer has requested you to make changes and you feel strongly about doing it a certain way, you are free to debate the merits of the requested change with the reviewer, while still following the code of conduct. You might be overruled, but you might also prevail.
**Be Pragmatic**
Put a bit of thought into how your PR can be made easier to review and merge. No document can replace common sense and good taste. The best practices shared here and the contribution guidelines, if followed, will help you get your code reviewed and merged with less friction.
</br>
### **Why is my PR closed?**
Pull requests older than 120 days or not in-line with scope of the project will be closed. Exceptions can be made for pull requests that have active review comments, or that are awaiting other dependent pull requests. Closed pull requests are easy to recreate, and little work is lost by closing a pull request that is subsequently reopened. We want to limit the total number of pull requests in flight to:
* Maintain a clean project
* Remove old pull requests that would be difficult to rebase since the underlying code has changed over time
* Encourage code velocity
### **Why is my PR not getting reviewed/merged?**
* It may be because of a feature freeze due to an upcoming release. During this time, only bug fixes are taken into consideration. If your pull request is a new feature, it will not be prioritised until after the release. Wait for the release.
* It could be related to best practices (see contributing.md) not being followed. One common issue is that the pull request is too big to review. Lets say youve touched 21 files and have 9347 insertions. When your would-be reviewers pull up the diffs, they run away - this pull request is going to take a few hours to review and they dont have a few hours right now. Theyll get to it later, just as soon as they have more free time (ha!).
* If you think the above two situations are not the reason, and you are not getting some pull request love, please drop a couple of reminders on the PR comments. If everything else fails, please create a post on FreeRTOS forums with link to PR.

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<!--- Title -->
Description
-----------
<!--- Describe your changes in detail. -->
Test Steps
-----------
<!-- Describe the steps to reproduce. -->
Checklist:
----------
<!--- Go over all the following points, and put an `x` in all the boxes that apply. -->
<!--- If you're unsure about any of these, don't hesitate to ask. We're here to help! -->
- [ ] I have tested my changes. No regression in existing tests.
- [ ] I have modified and/or added unit-tests to cover the code changes in this Pull Request.
Related Issue
-----------
<!-- If any, please provide issue ID. -->
By submitting this pull request, I confirm that you can use, modify, copy, and redistribute this contribution, under the terms of your choice.

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#!/bin/bash
old_text=$1
new_text=$2
echo "Old text: ${old_text}"
echo "New text: ${new_text}"
grep -rl "${old_text}" . | xargs gsed -i -e '1h;2,$H;$!d;g' -e "s/${old_text}/${new_text}/g"

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#!/usr/bin/env python3
#/*
# * FreeRTOS Kernel <DEVELOPMENT BRANCH>
# * Copyright (C) 2024 Amazon.com, Inc. or its affiliates. All Rights Reserved.
# *
# * SPDX-License-Identifier: MIT
# *
# * Permission is hereby granted, free of charge, to any person obtaining a copy of
# * this software and associated documentation files (the "Software"), to deal in
# * the Software without restriction, including without limitation the rights to
# * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
# * the Software, and to permit persons to whom the Software is furnished to do so,
# * subject to the following conditions:
# *
# * The above copyright notice and this permission notice shall be included in all
# * copies or substantial portions of the Software.
# *
# * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
# * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
# * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
# * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
# * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
# *
# * https://www.FreeRTOS.org
# * https://github.com/FreeRTOS
# *
# */
import os
import re
from common.header_checker import HeaderChecker
#--------------------------------------------------------------------------------------------------
# CONFIG
#--------------------------------------------------------------------------------------------------
KERNEL_IGNORED_FILES = [
'FreeRTOS-openocd.c',
'Makefile',
'.DS_Store',
'cspell.config.yaml',
'.clang-format'
]
KERNEL_IGNORED_EXTENSIONS = [
'.yml',
'.css',
'.idx',
'.md',
'.url',
'.sty',
'.0-rc2',
'.s82',
'.js',
'.out',
'.pack',
'.2',
'.1-kernel-only',
'.0-kernel-only',
'.0-rc1',
'.readme',
'.tex',
'.png',
'.bat',
'.sh',
'.txt',
'.cmake',
'.config'
]
KERNEL_ASM_EXTENSIONS = [
'.s',
'.S',
'.src',
'.inc',
'.s26',
'.s43',
'.s79',
'.s85',
'.s87',
'.s90',
'.asm',
'.h'
]
KERNEL_PY_EXTENSIONS = [
'.py'
]
KERNEL_IGNORED_PATTERNS = [
r'.*\.git.*',
r'.*portable/IAR/AtmelSAM7S64/.*AT91SAM7.*',
r'.*portable/GCC/ARM7_AT91SAM7S/.*',
r'.*portable/MPLAB/PIC18F/stdio.h',
r'.*portable/ThirdParty/xClang/XCOREAI/*',
r'.*IAR/ARM_C*',
r'.*IAR/78K0R/*',
r'.*CCS/MSP430X/*',
r'.*portable/template/*',
r'.*template_configuration/*'
]
KERNEL_THIRD_PARTY_PATTERNS = [
r'.*portable/ThirdParty/GCC/Posix/port*',
r'.*portable/ThirdParty/*',
r'.*portable/IAR/AVR32_UC3/.*',
r'.*portable/GCC/AVR32_UC3/.*',
]
KERNEL_ARM_COLLAB_FILES_PATTERNS = [
r'.*portable/ARMv8M/*',
r'.*portable/.*/ARM_CM23*',
r'.*portable/.*/ARM_CM33*',
r'.*portable/.*/ARM_CM35*',
r'.*portable/.*/ARM_CM55*',
r'.*portable/.*/ARM_CM85*',
]
KERNEL_HEADER = [
'/*\n',
' * FreeRTOS Kernel <DEVELOPMENT BRANCH>\n',
' * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.\n',
' *\n',
' * SPDX-License-Identifier: MIT\n',
' *\n',
' * Permission is hereby granted, free of charge, to any person obtaining a copy of\n',
' * this software and associated documentation files (the "Software"), to deal in\n',
' * the Software without restriction, including without limitation the rights to\n',
' * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\n',
' * the Software, and to permit persons to whom the Software is furnished to do so,\n',
' * subject to the following conditions:\n',
' *\n',
' * The above copyright notice and this permission notice shall be included in all\n',
' * copies or substantial portions of the Software.\n',
' *\n',
' * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\n',
' * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\n',
' * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\n',
' * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\n',
' * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\n',
' * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\n',
' *\n',
' * https://www.FreeRTOS.org\n',
' * https://github.com/FreeRTOS\n',
' *\n',
' */\n',
]
FREERTOS_COPYRIGHT_REGEX = r"^(;|#)?( *(\/\*|\*|#|\/\/))? Copyright \(C\) 20\d\d Amazon.com, Inc. or its affiliates. All Rights Reserved\.( \*\/)?$"
FREERTOS_ARM_COLLAB_COPYRIGHT_REGEX = r"(^(;|#)?( *(\/\*|\*|#|\/\/))? Copyright \(C\) 20\d\d Amazon.com, Inc. or its affiliates. All Rights Reserved\.( \*\/)?$)|" + \
r"(^(;|#)?( *(\/\*|\*|#|\/\/))? Copyright 20\d\d Arm Limited and/or its affiliates( \*\/)?$)|" + \
r"(^(;|#)?( *(\/\*|\*|#|\/\/))? <open-source-office@arm.com>( \*\/)?$)"
class KernelHeaderChecker(HeaderChecker):
def __init__(
self,
header,
padding=1000,
ignored_files=None,
ignored_ext=None,
ignored_patterns=None,
py_ext=None,
asm_ext=None,
third_party_patterns=None,
copyright_regex = None
):
super().__init__(header, padding, ignored_files, ignored_ext, ignored_patterns,
py_ext, asm_ext, third_party_patterns, copyright_regex)
self.armCollabRegex = re.compile(FREERTOS_ARM_COLLAB_COPYRIGHT_REGEX)
self.armCollabFilesPatternList = []
for pattern in KERNEL_ARM_COLLAB_FILES_PATTERNS:
self.armCollabFilesPatternList.append(re.compile(pattern))
def isArmCollabFile(self, path):
for pattern in self.armCollabFilesPatternList:
if pattern.match(path):
return True
return False
def checkArmCollabFile(self, path):
isValid = False
file_ext = os.path.splitext(path)[-1]
with open(path, encoding="utf-8", errors="ignore") as file:
chunk = file.read(len("".join(self.header)) + self.padding)
lines = [("%s\n" % line) for line in chunk.strip().splitlines()][
: len(self.header) + 2
]
if (len(lines) > 0) and (lines[0].find("#!") == 0):
lines.remove(lines[0])
# Split lines in sections.
headers = dict()
headers["text"] = []
headers["copyright"] = []
headers["spdx"] = []
for line in lines:
if self.armCollabRegex.match(line):
headers["copyright"].append(line)
elif "SPDX-License-Identifier:" in line:
headers["spdx"].append(line)
else:
headers["text"].append(line)
text_equal = self.isValidHeaderSection(file_ext, "text", headers["text"])
spdx_equal = self.isValidHeaderSection(file_ext, "spdx", headers["spdx"])
if text_equal and spdx_equal and len(headers["copyright"]) == 3:
isValid = True
return isValid
def customCheck(self, path):
isValid = False
if self.isArmCollabFile(path):
isValid = self.checkArmCollabFile(path)
return isValid
def main():
parser = HeaderChecker.configArgParser()
args = parser.parse_args()
# Configure the checks then run
checker = KernelHeaderChecker(KERNEL_HEADER,
copyright_regex=FREERTOS_COPYRIGHT_REGEX,
ignored_files=KERNEL_IGNORED_FILES,
ignored_ext=KERNEL_IGNORED_EXTENSIONS,
ignored_patterns=KERNEL_IGNORED_PATTERNS,
third_party_patterns=KERNEL_THIRD_PARTY_PATTERNS,
py_ext=KERNEL_PY_EXTENSIONS,
asm_ext=KERNEL_ASM_EXTENSIONS)
checker.ignoreFile(os.path.split(__file__)[-1])
rc = checker.processArgs(args)
if rc:
checker.showHelp(__file__)
return rc
if __name__ == '__main__':
exit(main())

32
.github/scripts/manifest_updater.py vendored Executable file
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#!/usr/bin/env python3
import os
import argparse
THIS_FILE_PATH = os.path.dirname(os.path.abspath(__file__))
MANIFEST_FILE = os.path.join(THIS_FILE_PATH, '..', '..', 'manifest.yml')
def update_manifest_file(new_version_number):
updated_lines = []
with open(MANIFEST_FILE, 'r') as f:
for line in f:
line = line.strip()
if line.startswith('version'):
updated_lines.append(f'version: "V{new_version_number}"\n')
else:
updated_lines.append(f'{line}\n')
with open(MANIFEST_FILE, 'w') as f:
f.writelines(updated_lines)
def parse_args():
parser = argparse.ArgumentParser()
parser.add_argument('-v', '--version', required=True, help='New version number.')
args = parser.parse_args()
return args
def main():
args = parse_args()
update_manifest_file(args.version)
if __name__ == '__main__':
main()

14
.github/third_party_tools.md vendored Normal file
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Note that these tools are provided by different vendors and not by the FreeRTOS
team.
## Tracing Tools
| Tool | Website | Getting Started |
|------|---------|-----------------|
| Tracelyzer | [Link](https://percepio.com/tracealyzer/freertostrace/) | [Link](https://percepio.com/getstarted/latest/html/freertos.html) |
| SystemView | [Link](https://www.segger.com/products/development-tools/systemview/) | [Link](https://wiki.segger.com/FreeRTOS_with_SystemView) |
## Static Code Analysis Tools
| Tool | Website | Getting Started |
|------|---------|-----------------|
| Code Sonar | [Link](https://codesecure.com/our-products/codesonar/) | [Link](https://github.com/CodeSecure-SE/FreeRTOS-Kernel/blob/main/examples/codesonar/README.md) |
| Coverity | [Link](https://www.blackduck.com/static-analysis-tools-sast/coverity.html) | [Link](../examples/coverity/README.md) |

673
.github/uncrustify.cfg vendored Normal file
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# Uncrustify-0.69.0
newlines = auto # lf/crlf/cr/auto
input_tab_size = 4 # unsigned number
output_tab_size = 4 # unsigned number
string_escape_char = 92 # unsigned number
string_escape_char2 = 0 # unsigned number
string_replace_tab_chars = false # true/false
tok_split_gte = false # true/false
disable_processing_cmt = " *INDENT-OFF*" # string
enable_processing_cmt = " *INDENT-ON*" # string
enable_digraphs = false # true/false
utf8_bom = ignore # ignore/add/remove/force
utf8_byte = false # true/false
utf8_force = false # true/false
sp_arith = force # ignore/add/remove/force
sp_arith_additive = ignore # ignore/add/remove/force
sp_assign = force # ignore/add/remove/force
sp_cpp_lambda_assign = ignore # ignore/add/remove/force
sp_cpp_lambda_paren = ignore # ignore/add/remove/force
sp_assign_default = force # ignore/add/remove/force
sp_before_assign = force # ignore/add/remove/force
sp_after_assign = force # ignore/add/remove/force
sp_enum_paren = ignore # ignore/add/remove/force
sp_enum_assign = force # ignore/add/remove/force
sp_enum_before_assign = force # ignore/add/remove/force
sp_enum_after_assign = force # ignore/add/remove/force
sp_enum_colon = ignore # ignore/add/remove/force
sp_pp_concat = add # ignore/add/remove/force
sp_pp_stringify = add # ignore/add/remove/force
sp_before_pp_stringify = ignore # ignore/add/remove/force
sp_bool = force # ignore/add/remove/force
sp_compare = force # ignore/add/remove/force
sp_inside_paren = force # ignore/add/remove/force
sp_paren_paren = force # ignore/add/remove/force
sp_cparen_oparen = ignore # ignore/add/remove/force
sp_balance_nested_parens = false # true/false
sp_paren_brace = force # ignore/add/remove/force
sp_brace_brace = ignore # ignore/add/remove/force
sp_before_ptr_star = force # ignore/add/remove/force
sp_before_unnamed_ptr_star = force # ignore/add/remove/force
sp_between_ptr_star = remove # ignore/add/remove/force
sp_after_ptr_star = force # ignore/add/remove/force
sp_after_ptr_block_caret = ignore # ignore/add/remove/force
sp_after_ptr_star_qualifier = ignore # ignore/add/remove/force
sp_after_ptr_star_func = ignore # ignore/add/remove/force
sp_ptr_star_paren = ignore # ignore/add/remove/force
sp_before_ptr_star_func = ignore # ignore/add/remove/force
sp_before_byref = force # ignore/add/remove/force
sp_before_unnamed_byref = ignore # ignore/add/remove/force
sp_after_byref = remove # ignore/add/remove/force
sp_after_byref_func = remove # ignore/add/remove/force
sp_before_byref_func = ignore # ignore/add/remove/force
sp_after_type = force # ignore/add/remove/force
sp_after_decltype = ignore # ignore/add/remove/force
sp_before_template_paren = ignore # ignore/add/remove/force
sp_template_angle = ignore # ignore/add/remove/force
sp_before_angle = remove # ignore/add/remove/force
sp_inside_angle = remove # ignore/add/remove/force
sp_inside_angle_empty = ignore # ignore/add/remove/force
sp_angle_colon = ignore # ignore/add/remove/force
sp_after_angle = force # ignore/add/remove/force
sp_angle_paren = ignore # ignore/add/remove/force
sp_angle_paren_empty = ignore # ignore/add/remove/force
sp_angle_word = ignore # ignore/add/remove/force
sp_angle_shift = add # ignore/add/remove/force
sp_permit_cpp11_shift = false # true/false
sp_before_sparen = remove # ignore/add/remove/force
sp_inside_sparen = force # ignore/add/remove/force
sp_inside_sparen_open = ignore # ignore/add/remove/force
sp_inside_sparen_close = ignore # ignore/add/remove/force
sp_after_sparen = force # ignore/add/remove/force
sp_sparen_brace = force # ignore/add/remove/force
sp_invariant_paren = ignore # ignore/add/remove/force
sp_after_invariant_paren = ignore # ignore/add/remove/force
sp_special_semi = ignore # ignore/add/remove/force
sp_before_semi = remove # ignore/add/remove/force
sp_before_semi_for = remove # ignore/add/remove/force
sp_before_semi_for_empty = add # ignore/add/remove/force
sp_after_semi = add # ignore/add/remove/force
sp_after_semi_for = force # ignore/add/remove/force
sp_after_semi_for_empty = force # ignore/add/remove/force
sp_before_square = remove # ignore/add/remove/force
sp_before_squares = remove # ignore/add/remove/force
sp_cpp_before_struct_binding = ignore # ignore/add/remove/force
sp_inside_square = force # ignore/add/remove/force
sp_inside_square_oc_array = ignore # ignore/add/remove/force
sp_after_comma = force # ignore/add/remove/force
sp_before_comma = remove # ignore/add/remove/force
sp_after_mdatype_commas = ignore # ignore/add/remove/force
sp_before_mdatype_commas = ignore # ignore/add/remove/force
sp_between_mdatype_commas = ignore # ignore/add/remove/force
sp_paren_comma = force # ignore/add/remove/force
sp_before_ellipsis = ignore # ignore/add/remove/force
sp_type_ellipsis = ignore # ignore/add/remove/force
sp_type_question = ignore # ignore/add/remove/force
sp_paren_ellipsis = ignore # ignore/add/remove/force
sp_paren_qualifier = ignore # ignore/add/remove/force
sp_paren_noexcept = ignore # ignore/add/remove/force
sp_after_class_colon = ignore # ignore/add/remove/force
sp_before_class_colon = ignore # ignore/add/remove/force
sp_after_constr_colon = ignore # ignore/add/remove/force
sp_before_constr_colon = ignore # ignore/add/remove/force
sp_before_case_colon = remove # ignore/add/remove/force
sp_after_operator = ignore # ignore/add/remove/force
sp_after_operator_sym = ignore # ignore/add/remove/force
sp_after_operator_sym_empty = ignore # ignore/add/remove/force
sp_after_cast = force # ignore/add/remove/force
sp_inside_paren_cast = force # ignore/add/remove/force
sp_cpp_cast_paren = ignore # ignore/add/remove/force
sp_sizeof_paren = remove # ignore/add/remove/force
sp_sizeof_ellipsis = ignore # ignore/add/remove/force
sp_sizeof_ellipsis_paren = ignore # ignore/add/remove/force
sp_decltype_paren = ignore # ignore/add/remove/force
sp_after_tag = ignore # ignore/add/remove/force
sp_inside_braces_enum = force # ignore/add/remove/force
sp_inside_braces_struct = force # ignore/add/remove/force
sp_inside_braces_oc_dict = ignore # ignore/add/remove/force
sp_after_type_brace_init_lst_open = ignore # ignore/add/remove/force
sp_before_type_brace_init_lst_close = ignore # ignore/add/remove/force
sp_inside_type_brace_init_lst = ignore # ignore/add/remove/force
sp_inside_braces = force # ignore/add/remove/force
sp_inside_braces_empty = remove # ignore/add/remove/force
sp_type_func = force # ignore/add/remove/force
sp_type_brace_init_lst = ignore # ignore/add/remove/force
sp_func_proto_paren = remove # ignore/add/remove/force
sp_func_proto_paren_empty = ignore # ignore/add/remove/force
sp_func_def_paren = remove # ignore/add/remove/force
sp_func_def_paren_empty = ignore # ignore/add/remove/force
sp_inside_fparens = remove # ignore/add/remove/force
sp_inside_fparen = force # ignore/add/remove/force
sp_inside_tparen = ignore # ignore/add/remove/force
sp_after_tparen_close = ignore # ignore/add/remove/force
sp_square_fparen = ignore # ignore/add/remove/force
sp_fparen_brace = add # ignore/add/remove/force
sp_fparen_brace_initializer = ignore # ignore/add/remove/force
sp_fparen_dbrace = ignore # ignore/add/remove/force
sp_func_call_paren = remove # ignore/add/remove/force
sp_func_call_paren_empty = ignore # ignore/add/remove/force
sp_func_call_user_paren = ignore # ignore/add/remove/force
sp_func_call_user_inside_fparen = ignore # ignore/add/remove/force
sp_func_call_user_paren_paren = ignore # ignore/add/remove/force
sp_func_class_paren = remove # ignore/add/remove/force
sp_func_class_paren_empty = ignore # ignore/add/remove/force
sp_return_paren = remove # ignore/add/remove/force
sp_return_brace = ignore # ignore/add/remove/force
sp_attribute_paren = remove # ignore/add/remove/force
sp_defined_paren = remove # ignore/add/remove/force
sp_throw_paren = ignore # ignore/add/remove/force
sp_after_throw = ignore # ignore/add/remove/force
sp_catch_paren = ignore # ignore/add/remove/force
sp_oc_catch_paren = ignore # ignore/add/remove/force
sp_oc_classname_paren = ignore # ignore/add/remove/force
sp_version_paren = ignore # ignore/add/remove/force
sp_scope_paren = ignore # ignore/add/remove/force
sp_super_paren = remove # ignore/add/remove/force
sp_this_paren = remove # ignore/add/remove/force
sp_macro = force # ignore/add/remove/force
sp_macro_func = force # ignore/add/remove/force
sp_else_brace = ignore # ignore/add/remove/force
sp_brace_else = ignore # ignore/add/remove/force
sp_brace_typedef = force # ignore/add/remove/force
sp_catch_brace = ignore # ignore/add/remove/force
sp_oc_catch_brace = ignore # ignore/add/remove/force
sp_brace_catch = ignore # ignore/add/remove/force
sp_oc_brace_catch = ignore # ignore/add/remove/force
sp_finally_brace = ignore # ignore/add/remove/force
sp_brace_finally = ignore # ignore/add/remove/force
sp_try_brace = ignore # ignore/add/remove/force
sp_getset_brace = ignore # ignore/add/remove/force
sp_word_brace = add # ignore/add/remove/force
sp_word_brace_ns = add # ignore/add/remove/force
sp_before_dc = remove # ignore/add/remove/force
sp_after_dc = remove # ignore/add/remove/force
sp_d_array_colon = ignore # ignore/add/remove/force
sp_not = remove # ignore/add/remove/force
sp_inv = remove # ignore/add/remove/force
sp_addr = remove # ignore/add/remove/force
sp_member = remove # ignore/add/remove/force
sp_deref = remove # ignore/add/remove/force
sp_sign = remove # ignore/add/remove/force
sp_incdec = remove # ignore/add/remove/force
sp_before_nl_cont = add # ignore/add/remove/force
sp_after_oc_scope = ignore # ignore/add/remove/force
sp_after_oc_colon = ignore # ignore/add/remove/force
sp_before_oc_colon = ignore # ignore/add/remove/force
sp_after_oc_dict_colon = ignore # ignore/add/remove/force
sp_before_oc_dict_colon = ignore # ignore/add/remove/force
sp_after_send_oc_colon = ignore # ignore/add/remove/force
sp_before_send_oc_colon = ignore # ignore/add/remove/force
sp_after_oc_type = ignore # ignore/add/remove/force
sp_after_oc_return_type = ignore # ignore/add/remove/force
sp_after_oc_at_sel = ignore # ignore/add/remove/force
sp_after_oc_at_sel_parens = ignore # ignore/add/remove/force
sp_inside_oc_at_sel_parens = ignore # ignore/add/remove/force
sp_before_oc_block_caret = ignore # ignore/add/remove/force
sp_after_oc_block_caret = ignore # ignore/add/remove/force
sp_after_oc_msg_receiver = ignore # ignore/add/remove/force
sp_after_oc_property = ignore # ignore/add/remove/force
sp_after_oc_synchronized = ignore # ignore/add/remove/force
sp_cond_colon = force # ignore/add/remove/force
sp_cond_colon_before = ignore # ignore/add/remove/force
sp_cond_colon_after = ignore # ignore/add/remove/force
sp_cond_question = force # ignore/add/remove/force
sp_cond_question_before = ignore # ignore/add/remove/force
sp_cond_question_after = ignore # ignore/add/remove/force
sp_cond_ternary_short = ignore # ignore/add/remove/force
sp_case_label = force # ignore/add/remove/force
sp_range = ignore # ignore/add/remove/force
sp_after_for_colon = ignore # ignore/add/remove/force
sp_before_for_colon = ignore # ignore/add/remove/force
sp_extern_paren = ignore # ignore/add/remove/force
sp_cmt_cpp_start = ignore # ignore/add/remove/force
sp_cmt_cpp_doxygen = false # true/false
sp_cmt_cpp_qttr = false # true/false
sp_endif_cmt = force # ignore/add/remove/force
sp_after_new = ignore # ignore/add/remove/force
sp_between_new_paren = ignore # ignore/add/remove/force
sp_after_newop_paren = ignore # ignore/add/remove/force
sp_inside_newop_paren = ignore # ignore/add/remove/force
sp_inside_newop_paren_open = ignore # ignore/add/remove/force
sp_inside_newop_paren_close = ignore # ignore/add/remove/force
sp_before_tr_emb_cmt = force # ignore/add/remove/force
sp_num_before_tr_emb_cmt = 1 # unsigned number
sp_annotation_paren = ignore # ignore/add/remove/force
sp_skip_vbrace_tokens = false # true/false
sp_after_noexcept = ignore # ignore/add/remove/force
sp_vala_after_translation = ignore # ignore/add/remove/force
force_tab_after_define = false # true/false
indent_columns = 4 # unsigned number
indent_continue = 0 # number
indent_continue_class_head = 0 # unsigned number
indent_single_newlines = false # true/false
indent_param = 0 # unsigned number
indent_with_tabs = 0 # unsigned number
indent_cmt_with_tabs = false # true/false
indent_align_string = true # true/false
indent_xml_string = 0 # unsigned number
indent_brace = 0 # unsigned number
indent_braces = false # true/false
indent_braces_no_func = false # true/false
indent_braces_no_class = false # true/false
indent_braces_no_struct = false # true/false
indent_brace_parent = false # true/false
indent_paren_open_brace = false # true/false
indent_cs_delegate_brace = false # true/false
indent_cs_delegate_body = false # true/false
indent_namespace = false # true/false
indent_namespace_single_indent = false # true/false
indent_namespace_level = 0 # unsigned number
indent_namespace_limit = 0 # unsigned number
indent_extern = false # true/false
indent_class = true # true/false
indent_class_colon = true # true/false
indent_class_on_colon = false # true/false
indent_constr_colon = false # true/false
indent_ctor_init_leading = 2 # unsigned number
indent_ctor_init = 0 # number
indent_else_if = false # true/false
indent_var_def_blk = 0 # number
indent_var_def_cont = false # true/false
indent_shift = false # true/false
indent_func_def_force_col1 = false # true/false
indent_func_call_param = false # true/false
indent_func_def_param = false # true/false
indent_func_proto_param = false # true/false
indent_func_class_param = false # true/false
indent_func_ctor_var_param = false # true/false
indent_template_param = false # true/false
indent_func_param_double = false # true/false
indent_func_const = 0 # unsigned number
indent_func_throw = 0 # unsigned number
indent_member = 3 # unsigned number
indent_member_single = false # true/false
indent_sing_line_comments = 0 # unsigned number
indent_relative_single_line_comments = false # true/false
indent_switch_case = 4 # unsigned number
indent_switch_pp = true # true/false
indent_case_shift = 0 # unsigned number
indent_case_brace = 3 # number
indent_col1_comment = false # true/false
indent_col1_multi_string_literal = false # true/false
indent_label = 1 # number
indent_access_spec = 1 # number
indent_access_spec_body = false # true/false
indent_paren_nl = false # true/false
indent_paren_close = 0 # unsigned number
indent_paren_after_func_def = false # true/false
indent_paren_after_func_decl = false # true/false
indent_paren_after_func_call = false # true/false
indent_comma_paren = false # true/false
indent_bool_paren = false # true/false
indent_semicolon_for_paren = false # true/false
indent_first_bool_expr = false # true/false
indent_first_for_expr = false # true/false
indent_square_nl = false # true/false
indent_preserve_sql = false # true/false
indent_align_assign = true # true/false
indent_align_paren = true # true/false
indent_oc_block = false # true/false
indent_oc_block_msg = 0 # unsigned number
indent_oc_msg_colon = 0 # unsigned number
indent_oc_msg_prioritize_first_colon = true # true/false
indent_oc_block_msg_xcode_style = false # true/false
indent_oc_block_msg_from_keyword = false # true/false
indent_oc_block_msg_from_colon = false # true/false
indent_oc_block_msg_from_caret = false # true/false
indent_oc_block_msg_from_brace = false # true/false
indent_min_vbrace_open = 0 # unsigned number
indent_vbrace_open_on_tabstop = false # true/false
indent_token_after_brace = true # true/false
indent_cpp_lambda_body = false # true/false
indent_using_block = true # true/false
indent_ternary_operator = 0 # unsigned number
indent_off_after_return_new = false # true/false
indent_single_after_return = false # true/false
indent_ignore_asm_block = false # true/false
nl_collapse_empty_body = false # true/false
nl_assign_leave_one_liners = true # true/false
nl_class_leave_one_liners = true # true/false
nl_enum_leave_one_liners = false # true/false
nl_getset_leave_one_liners = false # true/false
nl_cs_property_leave_one_liners = false # true/false
nl_func_leave_one_liners = false # true/false
nl_cpp_lambda_leave_one_liners = false # true/false
nl_if_leave_one_liners = false # true/false
nl_while_leave_one_liners = false # true/false
nl_for_leave_one_liners = false # true/false
nl_oc_msg_leave_one_liner = false # true/false
nl_oc_mdef_brace = ignore # ignore/add/remove/force
nl_oc_block_brace = ignore # ignore/add/remove/force
nl_oc_interface_brace = ignore # ignore/add/remove/force
nl_oc_implementation_brace = ignore # ignore/add/remove/force
nl_start_of_file = remove # ignore/add/remove/force
nl_start_of_file_min = 0 # unsigned number
nl_end_of_file = force # ignore/add/remove/force
nl_end_of_file_min = 1 # unsigned number
nl_assign_brace = add # ignore/add/remove/force
nl_assign_square = ignore # ignore/add/remove/force
nl_tsquare_brace = ignore # ignore/add/remove/force
nl_after_square_assign = ignore # ignore/add/remove/force
nl_fcall_brace = add # ignore/add/remove/force
nl_enum_brace = force # ignore/add/remove/force
nl_enum_class = ignore # ignore/add/remove/force
nl_enum_class_identifier = ignore # ignore/add/remove/force
nl_enum_identifier_colon = ignore # ignore/add/remove/force
nl_enum_colon_type = ignore # ignore/add/remove/force
nl_struct_brace = force # ignore/add/remove/force
nl_union_brace = force # ignore/add/remove/force
nl_if_brace = add # ignore/add/remove/force
nl_brace_else = add # ignore/add/remove/force
nl_elseif_brace = ignore # ignore/add/remove/force
nl_else_brace = add # ignore/add/remove/force
nl_else_if = ignore # ignore/add/remove/force
nl_before_if_closing_paren = ignore # ignore/add/remove/force
nl_brace_finally = ignore # ignore/add/remove/force
nl_finally_brace = ignore # ignore/add/remove/force
nl_try_brace = ignore # ignore/add/remove/force
nl_getset_brace = force # ignore/add/remove/force
nl_for_brace = add # ignore/add/remove/force
nl_catch_brace = ignore # ignore/add/remove/force
nl_oc_catch_brace = ignore # ignore/add/remove/force
nl_brace_catch = ignore # ignore/add/remove/force
nl_oc_brace_catch = ignore # ignore/add/remove/force
nl_brace_square = ignore # ignore/add/remove/force
nl_brace_fparen = ignore # ignore/add/remove/force
nl_while_brace = add # ignore/add/remove/force
nl_scope_brace = ignore # ignore/add/remove/force
nl_unittest_brace = ignore # ignore/add/remove/force
nl_version_brace = ignore # ignore/add/remove/force
nl_using_brace = ignore # ignore/add/remove/force
nl_brace_brace = ignore # ignore/add/remove/force
nl_do_brace = add # ignore/add/remove/force
nl_brace_while = ignore # ignore/add/remove/force
nl_switch_brace = add # ignore/add/remove/force
nl_synchronized_brace = ignore # ignore/add/remove/force
nl_multi_line_cond = false # true/false
nl_multi_line_define = true # true/false
nl_before_case = true # true/false
nl_after_case = true # true/false
nl_case_colon_brace = ignore # ignore/add/remove/force
nl_before_throw = ignore # ignore/add/remove/force
nl_namespace_brace = ignore # ignore/add/remove/force
nl_template_class = ignore # ignore/add/remove/force
nl_class_brace = ignore # ignore/add/remove/force
nl_class_init_args = ignore # ignore/add/remove/force
nl_constr_init_args = ignore # ignore/add/remove/force
nl_enum_own_lines = ignore # ignore/add/remove/force
nl_func_type_name = remove # ignore/add/remove/force
nl_func_type_name_class = ignore # ignore/add/remove/force
nl_func_class_scope = ignore # ignore/add/remove/force
nl_func_scope_name = ignore # ignore/add/remove/force
nl_func_proto_type_name = remove # ignore/add/remove/force
nl_func_paren = remove # ignore/add/remove/force
nl_func_paren_empty = ignore # ignore/add/remove/force
nl_func_def_paren = remove # ignore/add/remove/force
nl_func_def_paren_empty = ignore # ignore/add/remove/force
nl_func_call_paren = ignore # ignore/add/remove/force
nl_func_call_paren_empty = ignore # ignore/add/remove/force
nl_func_decl_start = remove # ignore/add/remove/force
nl_func_def_start = remove # ignore/add/remove/force
nl_func_decl_start_single = ignore # ignore/add/remove/force
nl_func_def_start_single = ignore # ignore/add/remove/force
nl_func_decl_start_multi_line = false # true/false
nl_func_def_start_multi_line = false # true/false
nl_func_decl_args = add # ignore/add/remove/force
nl_func_def_args = add # ignore/add/remove/force
nl_func_decl_args_multi_line = false # true/false
nl_func_def_args_multi_line = false # true/false
nl_func_decl_end = remove # ignore/add/remove/force
nl_func_def_end = remove # ignore/add/remove/force
nl_func_decl_end_single = ignore # ignore/add/remove/force
nl_func_def_end_single = ignore # ignore/add/remove/force
nl_func_decl_end_multi_line = false # true/false
nl_func_def_end_multi_line = false # true/false
nl_func_decl_empty = ignore # ignore/add/remove/force
nl_func_def_empty = ignore # ignore/add/remove/force
nl_func_call_empty = ignore # ignore/add/remove/force
nl_func_call_start = ignore # ignore/add/remove/force
nl_func_call_start_multi_line = false # true/false
nl_func_call_args_multi_line = false # true/false
nl_func_call_end_multi_line = false # true/false
nl_oc_msg_args = false # true/false
nl_fdef_brace = add # ignore/add/remove/force
nl_fdef_brace_cond = ignore # ignore/add/remove/force
nl_cpp_ldef_brace = ignore # ignore/add/remove/force
nl_return_expr = ignore # ignore/add/remove/force
nl_after_semicolon = true # true/false
nl_paren_dbrace_open = ignore # ignore/add/remove/force
nl_type_brace_init_lst = ignore # ignore/add/remove/force
nl_type_brace_init_lst_open = ignore # ignore/add/remove/force
nl_type_brace_init_lst_close = ignore # ignore/add/remove/force
nl_after_brace_open = true # true/false
nl_after_brace_open_cmt = false # true/false
nl_after_vbrace_open = false # true/false
nl_after_vbrace_open_empty = false # true/false
nl_after_brace_close = true # true/false
nl_after_vbrace_close = false # true/false
nl_brace_struct_var = ignore # ignore/add/remove/force
nl_define_macro = false # true/false
nl_squeeze_paren_close = false # true/false
nl_squeeze_ifdef = true # true/false
nl_squeeze_ifdef_top_level = false # true/false
nl_before_if = force # ignore/add/remove/force
nl_after_if = force # ignore/add/remove/force
nl_before_for = force # ignore/add/remove/force
nl_after_for = force # ignore/add/remove/force
nl_before_while = force # ignore/add/remove/force
nl_after_while = force # ignore/add/remove/force
nl_before_switch = force # ignore/add/remove/force
nl_after_switch = force # ignore/add/remove/force
nl_before_synchronized = ignore # ignore/add/remove/force
nl_after_synchronized = ignore # ignore/add/remove/force
nl_before_do = force # ignore/add/remove/force
nl_after_do = force # ignore/add/remove/force
nl_before_return = false # true/false
nl_after_return = true # true/false
nl_ds_struct_enum_cmt = false # true/false
nl_ds_struct_enum_close_brace = false # true/false
nl_class_colon = ignore # ignore/add/remove/force
nl_constr_colon = ignore # ignore/add/remove/force
nl_namespace_two_to_one_liner = false # true/false
nl_create_if_one_liner = false # true/false
nl_create_for_one_liner = false # true/false
nl_create_while_one_liner = false # true/false
nl_create_func_def_one_liner = false # true/false
nl_split_if_one_liner = false # true/false
nl_split_for_one_liner = false # true/false
nl_split_while_one_liner = false # true/false
nl_max = 4 # unsigned number
nl_max_blank_in_func = 0 # unsigned number
nl_before_func_body_proto = 0 # unsigned number
nl_before_func_body_def = 0 # unsigned number
nl_before_func_class_proto = 0 # unsigned number
nl_before_func_class_def = 0 # unsigned number
nl_after_func_proto = 0 # unsigned number
nl_after_func_proto_group = 1 # unsigned number
nl_after_func_class_proto = 0 # unsigned number
nl_after_func_class_proto_group = 0 # unsigned number
nl_class_leave_one_liner_groups = false # true/false
nl_after_func_body = 0 # unsigned number
nl_after_func_body_class = 2 # unsigned number
nl_after_func_body_one_liner = 0 # unsigned number
nl_func_var_def_blk = 1 # unsigned number
nl_typedef_blk_start = 0 # unsigned number
nl_typedef_blk_end = 0 # unsigned number
nl_typedef_blk_in = 0 # unsigned number
nl_var_def_blk_start = 0 # unsigned number
nl_var_def_blk_end = 0 # unsigned number
nl_var_def_blk_in = 0 # unsigned number
nl_before_block_comment = 2 # unsigned number
nl_before_c_comment = 0 # unsigned number
nl_before_cpp_comment = 0 # unsigned number
nl_after_multiline_comment = false # true/false
nl_after_label_colon = false # true/false
nl_after_struct = 0 # unsigned number
nl_before_class = 0 # unsigned number
nl_after_class = 0 # unsigned number
nl_before_access_spec = 0 # unsigned number
nl_after_access_spec = 0 # unsigned number
nl_comment_func_def = 0 # unsigned number
nl_after_try_catch_finally = 0 # unsigned number
nl_around_cs_property = 0 # unsigned number
nl_between_get_set = 0 # unsigned number
nl_property_brace = ignore # ignore/add/remove/force
nl_inside_namespace = 0 # unsigned number
eat_blanks_after_open_brace = true # true/false
eat_blanks_before_close_brace = true # true/false
nl_remove_extra_newlines = 0 # unsigned number
nl_after_annotation = ignore # ignore/add/remove/force
nl_between_annotation = ignore # ignore/add/remove/force
pos_arith = ignore # ignore/break/force/lead/trail/join/lead_break/lead_force/trail_break/trail_force
pos_assign = ignore # ignore/break/force/lead/trail/join/lead_break/lead_force/trail_break/trail_force
pos_bool = trail # ignore/break/force/lead/trail/join/lead_break/lead_force/trail_break/trail_force
pos_compare = ignore # ignore/break/force/lead/trail/join/lead_break/lead_force/trail_break/trail_force
pos_conditional = ignore # ignore/break/force/lead/trail/join/lead_break/lead_force/trail_break/trail_force
pos_comma = ignore # ignore/break/force/lead/trail/join/lead_break/lead_force/trail_break/trail_force
pos_enum_comma = ignore # ignore/break/force/lead/trail/join/lead_break/lead_force/trail_break/trail_force
pos_class_comma = ignore # ignore/break/force/lead/trail/join/lead_break/lead_force/trail_break/trail_force
pos_constr_comma = ignore # ignore/break/force/lead/trail/join/lead_break/lead_force/trail_break/trail_force
pos_class_colon = ignore # ignore/break/force/lead/trail/join/lead_break/lead_force/trail_break/trail_force
pos_constr_colon = ignore # ignore/break/force/lead/trail/join/lead_break/lead_force/trail_break/trail_force
code_width = 0 # unsigned number
ls_for_split_full = false # true/false
ls_func_split_full = false # true/false
ls_code_width = false # true/false
align_keep_tabs = false # true/false
align_with_tabs = false # true/false
align_on_tabstop = false # true/false
align_number_right = false # true/false
align_keep_extra_space = false # true/false
align_func_params = false # true/false
align_func_params_span = 0 # unsigned number
align_func_params_thresh = 0 # number
align_func_params_gap = 0 # unsigned number
align_constr_value_span = 0 # unsigned number
align_constr_value_thresh = 0 # number
align_constr_value_gap = 0 # unsigned number
align_same_func_call_params = false # true/false
align_same_func_call_params_span = 0 # unsigned number
align_same_func_call_params_thresh = 0 # number
align_var_def_span = 0 # unsigned number
align_var_def_star_style = 0 # unsigned number
align_var_def_amp_style = 1 # unsigned number
align_var_def_thresh = 16 # number
align_var_def_gap = 0 # unsigned number
align_var_def_colon = false # true/false
align_var_def_colon_gap = 0 # unsigned number
align_var_def_attribute = false # true/false
align_var_def_inline = false # true/false
align_assign_span = 0 # unsigned number
align_assign_func_proto_span = 0 # unsigned number
align_assign_thresh = 12 # number
align_assign_decl_func = 0 # unsigned number
align_enum_equ_span = 0 # unsigned number
align_enum_equ_thresh = 0 # number
align_var_class_span = 0 # unsigned number
align_var_class_thresh = 0 # number
align_var_class_gap = 0 # unsigned number
align_var_struct_span = 0 # unsigned number
align_var_struct_thresh = 0 # number
align_var_struct_gap = 0 # unsigned number
align_struct_init_span = 3 # unsigned number
align_typedef_span = 5 # unsigned number
align_typedef_gap = 3 # unsigned number
align_typedef_func = 0 # unsigned number
align_typedef_star_style = 1 # unsigned number
align_typedef_amp_style = 1 # unsigned number
align_right_cmt_span = 3 # unsigned number
align_right_cmt_gap = 0 # unsigned number
align_right_cmt_mix = false # true/false
align_right_cmt_same_level = false # true/false
align_right_cmt_at_col = 0 # unsigned number
align_func_proto_span = 0 # unsigned number
align_func_proto_thresh = 0 # number
align_func_proto_gap = 0 # unsigned number
align_on_operator = false # true/false
align_mix_var_proto = false # true/false
align_single_line_func = false # true/false
align_single_line_brace = false # true/false
align_single_line_brace_gap = 0 # unsigned number
align_oc_msg_spec_span = 0 # unsigned number
align_nl_cont = true # true/false
align_pp_define_together = false # true/false
align_pp_define_span = 3 # unsigned number
align_pp_define_gap = 4 # unsigned number
align_left_shift = true # true/false
align_asm_colon = false # true/false
align_oc_msg_colon_span = 0 # unsigned number
align_oc_msg_colon_first = false # true/false
align_oc_decl_colon = false # true/false
cmt_width = 0 # unsigned number
cmt_reflow_mode = 0 # unsigned number
cmt_convert_tab_to_spaces = false # true/false
cmt_indent_multi = true # true/false
cmt_c_group = false # true/false
cmt_c_nl_start = false # true/false
cmt_c_nl_end = false # true/false
cmt_cpp_to_c = true # true/false
cmt_cpp_group = false # true/false
cmt_cpp_nl_start = false # true/false
cmt_cpp_nl_end = false # true/false
cmt_star_cont = true # true/false
cmt_sp_before_star_cont = 0 # unsigned number
cmt_sp_after_star_cont = 0 # unsigned number
cmt_multi_check_last = true # true/false
cmt_multi_first_len_minimum = 4 # unsigned number
cmt_insert_file_header = "" # string
cmt_insert_file_footer = "" # string
cmt_insert_func_header = "" # string
cmt_insert_class_header = "" # string
cmt_insert_oc_msg_header = "" # string
cmt_insert_before_preproc = false # true/false
cmt_insert_before_inlines = true # true/false
cmt_insert_before_ctor_dtor = false # true/false
mod_full_brace_do = add # ignore/add/remove/force
mod_full_brace_for = add # ignore/add/remove/force
mod_full_brace_function = ignore # ignore/add/remove/force
mod_full_brace_if = add # ignore/add/remove/force
mod_full_brace_if_chain = false # true/false
mod_full_brace_if_chain_only = false # true/false
mod_full_brace_while = add # ignore/add/remove/force
mod_full_brace_using = ignore # ignore/add/remove/force
mod_full_brace_nl = 0 # unsigned number
mod_full_brace_nl_block_rem_mlcond = false # true/false
mod_paren_on_return = ignore # ignore/add/remove/force
mod_pawn_semicolon = false # true/false
mod_full_paren_if_bool = true # true/false
mod_remove_extra_semicolon = true # true/false
mod_add_long_function_closebrace_comment = 0 # unsigned number
mod_add_long_namespace_closebrace_comment = 0 # unsigned number
mod_add_long_class_closebrace_comment = 0 # unsigned number
mod_add_long_switch_closebrace_comment = 0 # unsigned number
mod_add_long_ifdef_endif_comment = 10 # unsigned number
mod_add_long_ifdef_else_comment = 10 # unsigned number
mod_sort_import = false # true/false
mod_sort_using = false # true/false
mod_sort_include = false # true/false
mod_move_case_break = false # true/false
mod_case_brace = remove # ignore/add/remove/force
mod_remove_empty_return = true # true/false
mod_enum_last_comma = ignore # ignore/add/remove/force
mod_sort_oc_properties = false # true/false
mod_sort_oc_property_class_weight = 0 # number
mod_sort_oc_property_thread_safe_weight = 0 # number
mod_sort_oc_property_readwrite_weight = 0 # number
mod_sort_oc_property_reference_weight = 0 # number
mod_sort_oc_property_getter_weight = 0 # number
mod_sort_oc_property_setter_weight = 0 # number
mod_sort_oc_property_nullability_weight = 0 # number
pp_indent = force # ignore/add/remove/force
pp_indent_at_level = true # true/false
pp_indent_count = 4 # unsigned number
pp_space = remove # ignore/add/remove/force
pp_space_count = 0 # unsigned number
pp_indent_region = 0 # number
pp_region_indent_code = false # true/false
pp_indent_if = 0 # number
pp_if_indent_code = true # true/false
pp_define_at_level = false # true/false
pp_ignore_define_body = false # true/false
pp_indent_case = true # true/false
pp_indent_func_def = true # true/false
pp_indent_extern = true # true/false
pp_indent_brace = false # true/false
include_category_0 = "" # string
include_category_1 = "" # string
include_category_2 = "" # string
use_indent_func_call_param = true # true/false
use_indent_continue_only_once = false # true/false
indent_cpp_lambda_only_once = false # true/false
use_options_overriding_for_qt_macros = true # true/false
warn_level_tabs_found_in_verbatim_string_literals = 2 # unsigned number

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name: Kernel-Auto-Release
on:
workflow_dispatch:
inputs:
commit_id:
description: 'Commit ID'
required: true
default: 'HEAD'
version_number:
description: 'Version Number (Ex. 10.4.4)'
required: true
default: '10.4.4'
main_br_version:
description: "Version String for task.h on main branch (leave empty to leave as-is)."
required: false
default: ''
jobs:
release-packager:
name: Release Packager
runs-on: ubuntu-latest
steps:
# Install python 3
- name: Tool Setup
uses: actions/setup-python@v2
with:
architecture: x64
env:
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
# Currently FreeRTOS/.github/scripts houses the release script. Download it for upcoming usage
- name: Checkout FreeRTOS Release Tools
uses: actions/checkout@v4.1.1
with:
repository: FreeRTOS/FreeRTOS
path: tools
# Simpler git auth if we use checkout action and forward the repo to release script
- name: Checkout FreeRTOS Kernel
uses: actions/checkout@v4.1.1
with:
path: local_kernel
fetch-depth: 0
- name: Configure git identity
env:
ACTOR: ${{ github.actor }}
run: |
git config --global user.name "$ACTOR"
git config --global user.email "$ACTOR"@users.noreply.github.com
- name: create a new branch that references commit id
env:
VERSION_NUMBER: ${{ github.event.inputs.version_number }}
COMMIT_ID: ${{ github.event.inputs.commit_id }}
working-directory: ./local_kernel
run: |
git checkout -b "$VERSION_NUMBER" "$COMMIT_ID"
echo "COMMIT_SHA_1=$(git rev-parse HEAD)" >> $GITHUB_ENV
- name: Update source files with version info
env:
VERSION_NUMBER: ${{ github.event.inputs.version_number }}
MAIN_BR_VERSION_NUMBER: ${{ github.event.inputs.main_br_version }}
COMMIT_SHA_1: ${{ env.COMMIT_SHA_1 }}
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
run: |
# Install deps and run
pip install -r ./tools/.github/scripts/release-requirements.txt
./tools/.github/scripts/update_src_version.py FreeRTOS --kernel-repo-path=local_kernel --kernel-commit="$COMMIT_SHA_1" --new-kernel-version="$VERSION_NUMBER" --new-kernel-main-br-version="$MAIN_BR_VERSION_NUMBER"
exit $?
- name : Update version number in manifest.yml
env:
VERSION_NUMBER: ${{ github.event.inputs.version_number }}
working-directory: ./local_kernel
run: |
./.github/scripts/manifest_updater.py -v "$VERSION_NUMBER"
exit $?
- name : Commit version number change in manifest.yml
env:
VERSION_NUMBER: ${{ github.event.inputs.version_number }}
working-directory: ./local_kernel
run: |
git add .
git commit -m '[AUTO][RELEASE]: Update version number in manifest.yml'
git push -u origin "$VERSION_NUMBER"
- name: Generate SBOM
uses: FreeRTOS/CI-CD-Github-Actions/sbom-generator@main
with:
repo_path: ./local_kernel
source_path: ./
- name: commit SBOM file
env:
VERSION_NUMBER: ${{ github.event.inputs.version_number }}
working-directory: ./local_kernel
run: |
git add .
git commit -m '[AUTO][RELEASE]: Update SBOM'
git push -u origin "$VERSION_NUMBER"
echo "COMMIT_SHA_2=$(git rev-parse HEAD)" >> $GITHUB_ENV
- name: Release
env:
VERSION_NUMBER: ${{ github.event.inputs.version_number }}
MAIN_BR_VERSION_NUMBER: ${{ github.event.inputs.main_br_version }}
COMMIT_SHA_2: ${{ env.COMMIT_SHA_2 }}
REPO_OWNER: ${{ github.repository_owner }}
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
run: |
# Install deps and run
pip install -r ./tools/.github/scripts/release-requirements.txt
./tools/.github/scripts/release.py "$REPO_OWNER" --kernel-repo-path=local_kernel --kernel-commit="$COMMIT_SHA_2" --new-kernel-version="$VERSION_NUMBER" --new-kernel-main-br-version="$MAIN_BR_VERSION_NUMBER"
exit $?
- name: Cleanup
env:
VERSION_NUMBER: ${{ github.event.inputs.version_number }}
working-directory: ./local_kernel
run: |
# Delete the branch created for Tag by SBOM generator
git push -u origin --delete "$VERSION_NUMBER"

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name: CI Checks
on:
push:
branches: ["**"]
pull_request:
branches: [main]
workflow_dispatch:
jobs:
formatting:
runs-on: ubuntu-20.04
steps:
- uses: actions/checkout@v4.1.1
- name: Check Formatting of FreeRTOS-Kernel Files
uses: FreeRTOS/CI-CD-Github-Actions/formatting@main
with:
exclude-dirs: portable
spell-check:
runs-on: ubuntu-latest
steps:
- name: Clone This Repo
uses: actions/checkout@v4.1.1
- name: Run spellings check
uses: FreeRTOS/CI-CD-Github-Actions/spellings@main
with:
path: ./
exclude-files: History.txt
link-verifier:
runs-on: ubuntu-latest
steps:
- name: Clone This Repo
uses: actions/checkout@v4.1.1
- name: Link Verification
uses: FreeRTOS/CI-CD-Github-Actions/link-verifier@main
with:
allowlist-file: '.github/allowed_urls.txt'
verify-manifest:
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@v4.1.1
with:
submodules: true
fetch-depth: 0
- name: Run manifest verifier
uses: FreeRTOS/CI-CD-GitHub-Actions/manifest-verifier@main
with:
path: ./
fail-on-incorrect-version: true

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name: Coverity Scan
on:
# Run on every commit to mainline
push:
branches: main
# Allow manual running of the scan
workflow_dispatch:
env:
bashPass: \033[32;1mPASSED -
bashInfo: \033[33;1mINFO -
bashFail: \033[31;1mFAILED -
bashEnd: \033[0m
jobs:
Coverity-Scan:
if: ( github.repository == 'FreeRTOS/FreeRTOS-Kernel' )
name: Coverity Scan
runs-on: ubuntu-latest
steps:
- name: Checkout the Repository
uses: actions/checkout@v4.1.1
- env:
stepName: Install Build Essentials
shell: bash
run: |
# ${{ env.stepName }}
echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
sudo apt-get -y update
sudo apt-get -y install build-essential
echo "::endgroup::"
echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }}"
- env:
stepName: Install Coverity Build
COVERITY_TOKEN: ${{ secrets.COVERITY_SCAN_TOKEN }}
shell: bash
run: |
# ${{ env.stepName }}
echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
wget -nv -qO- https://scan.coverity.com/download/linux64 --post-data "token=${COVERITY_TOKEN}&project=FreeRTOS-Kernel" | tar -zx --one-top-level=cov_scan --strip-components 1
echo "cov_scan_path=$(pwd)/cov_scan/bin" >> $GITHUB_ENV
echo "::endgroup::"
echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }} "
- env:
stepName: Coverity Build
COVERITY_TOKEN: ${{ secrets.COVERITY_SCAN_TOKEN }}
COVERITY_EMAIL: ${{ secrets.COVERITY_SCAN_EMAIL }}
shell: bash
run: |
# ${{ env.stepName }}
echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
export PATH="$PATH:${{env.cov_scan_path}}"
cmake -S ./examples/cmake_example/ -B build
cd build
cov-build --dir cov-int make -j
# Move the report out of the build directory
tar czvf ../gcc_freertos_kernel_sample_build.tgz cov-int
echo "::endgroup::"
echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }} "
- env:
stepName: Upload Coverity Report for Scan
COVERITY_TOKEN: ${{ secrets.COVERITY_SCAN_TOKEN }}
COVERITY_EMAIL: ${{ secrets.COVERITY_SCAN_EMAIL }}
shell: bash
run: |
# ${{ env.stepName }}
echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
COV_SCAN_UPLOAD_STATUS=$(curl --form token=${COVERITY_TOKEN} \
--form email=${COVERITY_EMAIL} \
--form file=@gcc_freertos_kernel_sample_build.tgz \
--form version="Mainline" \
--form description="FreeRTOS Kernel Commit Scan" \
https://scan.coverity.com/builds?project=FreeRTOS-Kernel)
echo "::endgroup::"
echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }} "
echo "${COV_SCAN_UPLOAD_STATUS}" | grep -q -e 'Build successfully submitted' || echo >&2 "Error submitting build for analysis: ${COV_SCAN_UPLOAD_STATUS}"
- env:
stepName: Coverity Build for SMP FreeRTOS
COVERITY_TOKEN: ${{ secrets.COVERITY_SCAN_TOKEN }}
COVERITY_EMAIL: ${{ secrets.COVERITY_SCAN_EMAIL }}
shell: bash
run: |
# ${{ env.stepName }}
echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
export PATH="$PATH:${{env.cov_scan_path}}"
cmake -S ./examples/cmake_example/ -B build -DFREERTOS_SMP_EXAMPLE=1
cd build
cov-build --dir cov-int make -j
# Move the report out of the build directory
tar czvf ../gcc_freertos_kernel_smp_sample_build.tgz cov-int
echo "::endgroup::"
echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }} "
- env:
stepName: Upload FreeRTOS SMP Coverity Report for Scan
COVERITY_TOKEN: ${{ secrets.COVERITY_SCAN_TOKEN }}
COVERITY_EMAIL: ${{ secrets.COVERITY_SCAN_EMAIL }}
shell: bash
run: |
# ${{ env.stepName }}
echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
COV_SCAN_UPLOAD_STATUS=$(curl --form token=${COVERITY_TOKEN} \
--form email=${COVERITY_EMAIL} \
--form file=@gcc_freertos_kernel_smp_sample_build.tgz \
--form version="Mainline" \
--form description="FreeRTOS Kernel SMP Commit Scan" \
https://scan.coverity.com/builds?project=FreeRTOS-Kernel)
echo "::endgroup::"
echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }} "
echo "${COV_SCAN_UPLOAD_STATUS}" | grep -q -e 'Build successfully submitted' || echo >&2 "Error submitting build for analysis: ${COV_SCAN_UPLOAD_STATUS}"

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name: Format Pull Request Files
on:
issue_comment:
types: [created]
env:
bashPass: \033[32;1mPASSED -
bashInfo: \033[33;1mINFO -
bashFail: \033[31;1mFAILED -
bashEnd: \033[0m
jobs:
Formatting:
name: Run Formatting Check
if: ${{ github.event.issue.pull_request &&
( ( github.event.comment.body == '/bot run uncrustify' ) ||
( github.event.comment.body == '/bot run formatting' ) ) }}
runs-on: ubuntu-20.04
steps:
- name: Apply Formatting Fix
id: check-formatting
uses: FreeRTOS/CI-CD-Github-Actions/formatting-bot@main
with:
exclude-dirs: portable

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name: git-secrets Check
on:
push:
pull_request:
workflow_dispatch:
jobs:
git-secrets:
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@v4.1.1
with:
submodules: recursive
- name: Checkout awslabs/git-secrets
uses: actions/checkout@v4.1.1
with:
repository: awslabs/git-secrets
ref: master
path: git-secrets
- name: Install git-secrets
run: cd git-secrets && sudo make install && cd ..
- name: Run git-secrets
run: |
git-secrets --register-aws
git-secrets --scan

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name: Kernel-Checker
on: [push, pull_request]
jobs:
kernel-checker:
name: FreeRTOS Kernel Header Checks
runs-on: ubuntu-20.04
steps:
# Install python 3
- name: Tool Setup
uses: actions/setup-python@v3
env:
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
# There is shared code, hosted by FreeRTOS/FreeRTOS, with deps needed by header checker
- name: Checkout FreeRTOS Tools
uses: actions/checkout@v4.1.1
with:
repository: FreeRTOS/FreeRTOS
sparse-checkout: '.github'
ref: main
path: tools
# Checkout user pull request changes
- name: Checkout Pull Request
uses: actions/checkout@v4.1.1
with:
path: inspect
# Collect all affected files
- name: Collecting changed files
uses: lots0logs/gh-action-get-changed-files@2.2.2
with:
token: ${{ secrets.GITHUB_TOKEN }}
# Run checks
- env:
bashPass: \033[32;1mPASSED -
bashInfo: \033[33;1mINFO -
bashFail: \033[31;1mFAILED -
bashEnd: \033[0m
stepName: Check File Headers
name: ${{ env.stepName }}
shell: bash
run: |
# ${{ env.stepName }}
echo -e "::group::${{ env.bashInfo }} Install Dependencies ${{ env.bashEnd }}"
# Copy the common tools from the FreeRTOS/FreeRTOS repo.
mv tools/.github/scripts/common inspect/.github/scripts
# Install the necessary python dependencies
pip install -r inspect/.github/scripts/common/requirements.txt
cd inspect
echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
# Use the python script to check the copyright header of modified files.
.github/scripts/kernel_checker.py --json ${HOME}/files_modified.json ${HOME}/files_added.json ${HOME}/files_renamed.json
exitStatus=$?
echo -e "::endgroup::"
if [ $exitStatus -eq 0 ]; then
echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }}"
else
echo -e "${{ env.bashFail }} ${{ env.stepName }} ${{ env.bashEnd }}"
fi
exit $exitStatus

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name: FreeRTOS-Kernel Demos
on: [push, pull_request]
env:
# The bash escape character is \033
bashPass: \033[32;1mPASSED -
bashInfo: \033[33;1mINFO -
bashFail: \033[31;1mFAILED -
bashEnd: \033[0m
jobs:
WIN32-MSVC:
name: WIN32 MSVC
runs-on: windows-latest
steps:
- name: Checkout the FreeRTOS/FreeRTOS Repository
uses: actions/checkout@v4.1.1
with:
ref: main
repository: FreeRTOS/FreeRTOS
submodules: 'recursive'
fetch-depth: 1
# Checkout user pull request changes
- name: Checkout Pull Request
uses: actions/checkout@v4.1.1
with:
path: ./FreeRTOS/Source
- name: Add msbuild to PATH
uses: microsoft/setup-msbuild@v1.1
- name: Build WIN32-MSVC Demo
working-directory: FreeRTOS/Demo/WIN32-MSVC
run: msbuild WIN32.sln -t:rebuild
- name: Build WIN32-MSVC-Static-Allocation-Only Demo
working-directory: FreeRTOS/Demo/WIN32-MSVC-Static-Allocation-Only
run: msbuild WIN32.sln -t:rebuild
WIN32-MingW:
name: WIN32 MingW
runs-on: windows-latest
steps:
- name: Checkout the FreeRTOS/FreeRTOS Repository
uses: actions/checkout@v4.1.1
with:
ref: main
repository: FreeRTOS/FreeRTOS
submodules: 'recursive'
fetch-depth: 1
# Checkout user pull request changes
- name: Checkout Pull Request
uses: actions/checkout@v4.1.1
with:
path: ./FreeRTOS/Source
- name: Build WIN32-MingW Demo
working-directory: FreeRTOS/Demo/WIN32-MingW
run: |
gcc --version
make --version
make
POSIX-GCC:
name: Native GCC
strategy:
fail-fast: false
matrix:
os:
- macos-latest
- ubuntu-latest
runs-on: ${{ matrix.os }}
steps:
- name: Checkout the FreeRTOS/FreeRTOS Repository
uses: actions/checkout@v4.1.1
with:
ref: main
repository: FreeRTOS/FreeRTOS
submodules: 'recursive'
fetch-depth: 1
# Checkout user pull request changes
- name: Checkout Pull Request
uses: actions/checkout@v4.1.1
with:
path: ./FreeRTOS/Source
- name: Install GCC
shell: bash
if: matrix.os == 'ubuntu-latest'
run: |
sudo apt-get -y update
sudo apt-get -y install build-essential
- name: Build Posix_GCC Demo
shell: bash
working-directory: FreeRTOS/Demo/Posix_GCC
run: make -j
- name: Build Posix_GCC Demo for Coverage Test
shell: bash
working-directory: FreeRTOS/Demo/Posix_GCC
run: make -j COVERAGE_TEST=1
CMake-Example:
name: CMake Example with Native GCC
runs-on: ubuntu-latest
steps:
# Checkout user pull request changes
- name: Checkout Repository
uses: actions/checkout@v4.1.1
- name: Install GCC
shell: bash
run: |
sudo apt-get -y update
sudo apt-get -y install build-essential
- name: Build CMake Example Demo
shell: bash
working-directory: examples/cmake_example
run: |
cmake -S . -B build
cmake --build build
- name: Build CMake SMP Example Demo
shell: bash
working-directory: examples/cmake_example
run: |
cmake -S . -B build -DFREERTOS_SMP_EXAMPLE=1
cmake --build build
MSP430-GCC:
name: GNU MSP430 Toolchain
runs-on: ubuntu-latest
steps:
- name: Checkout the FreeRTOS/FreeRTOS Repository
uses: actions/checkout@v4.1.1
with:
ref: main
repository: FreeRTOS/FreeRTOS
submodules: 'recursive'
fetch-depth: 1
# Checkout user pull request changes
- name: Checkout Pull Request
uses: actions/checkout@v4.1.1
with:
path: ./FreeRTOS/Source
- env:
stepName: Install MSP430 Toolchain
shell: bash
run: |
# ${{ env.stepName }}
echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
curl -L -O https://dr-download.ti.com/software-development/ide-configuration-compiler-or-debugger/MD-LlCjWuAbzH/9.3.1.2/msp430-gcc-full-linux-x64-installer-9.3.1.2.7z
sudo apt update -y
sudo apt install -y p7zip-full
7z x ./msp430-gcc-full-linux-x64-installer-9.3.1.2.7z
chmod +x ./msp430-gcc-full-linux-x64-installer-9.3.1.2.run
sudo ./msp430-gcc-full-linux-x64-installer-9.3.1.2.run --prefix /usr/bin/msp430-gcc --mode unattended
echo "::endgroup::"
echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }}"
- name: Build msp430_GCC Demo
shell: bash
working-directory: FreeRTOS/Demo/msp430_GCC
run: make -j CC=/usr/bin/msp430-gcc/bin/msp430-elf-gcc OPT="-Os -I/usr/bin/msp430-gcc/include -L/usr/bin/msp430-gcc/include"
MicroBlaze-GCC:
name: GCC MicroBlaze Toolchain
runs-on: ubuntu-latest
steps:
- name: Checkout the FreeRTOS/FreeRTOS Repository
uses: actions/checkout@v4.1.1
with:
ref: main
repository: FreeRTOS/FreeRTOS
fetch-depth: 1
- env:
stepName: Fetch Community-Supported-Demos Submodule
shell: bash
run: |
# ${{ env.stepName }}
echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
git submodule update --checkout --init --depth 1 FreeRTOS/Demo/ThirdParty/Community-Supported-Demos
# This repository contains the microblaze_instructions.h header file
git clone https://github.com/Xilinx/embeddedsw.git --branch xilinx_v2023.1
echo "::endgroup::"
echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }}"
# Checkout user pull request changes
- name: Checkout Pull Request
uses: actions/checkout@v4.1.1
with:
path: ./FreeRTOS/Source
- env:
stepName: Install Dependancies
shell: bash
run: |
# ${{ env.stepName }}
echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
sudo apt update -y
sudo apt upgrade -y
sudo apt install -y build-essential m4 debhelper bison texinfo dejagnu flex
sudo apt install -y autogen gawk libgmp-dev libmpc-dev libmpfr-dev
sudo apt install -y patchutils sharutils zlib1g-dev autoconf2.64
# Download the mb-gcc toolchain from github
curl -L -O https://github.com/mdednev/mb-gcc/releases/download/2021-0623%2B2/binutils-microblaze_2.35-2021-0623+1_amd64.deb;
curl -L -O https://github.com/mdednev/mb-gcc/releases/download/2021-0623%2B2/gcc-microblaze_10.2.0-2021-0623+2_amd64.deb;
curl -L -O https://github.com/mdednev/mb-gcc/releases/download/2021-0623%2B2/libnewlib-microblaze-dev_3.3.0-2021-0623+3_all.deb;
curl -L -O https://github.com/mdednev/mb-gcc/releases/download/2021-0623%2B2/libnewlib-microblaze-doc_3.3.0-2021-0623+3_all.deb;
curl -L -O https://github.com/mdednev/mb-gcc/releases/download/2021-0623%2B2/libnewlib-microblaze_3.3.0-2021-0623+3_all.deb;
curl -L -O https://github.com/mdednev/mb-gcc/releases/download/2021-0623%2B2/newlib-source_3.3.0-2021-0623+3_all.deb;
# Install the packages for the toolchain
sudo apt install -y ./binutils-microblaze*.deb;
sudo apt install -y ./gcc-microblaze*.deb;
sudo apt install -y ./libnewlib-microblaze-dev*.deb;
sudo apt install -y ./libnewlib-microblaze-doc*.deb;
sudo apt install -y ./libnewlib-microblaze*.deb;
sudo apt install -y ./newlib-source*.deb;
# Validate that the toolchain is in the path and can be called
which mb-gcc
mb-gcc --version
echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }}"
- env:
stepName: Compile Microblaze Port
shell: bash
run: |
# ${{ env.stepName }}
echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
# Compile MicroBlazeV9 Port files to validate they build
mb-gcc -mcpu=v9.5 -c \
FreeRTOS/Source/portable/GCC/MicroBlazeV9/port.c \
FreeRTOS/Source/portable/GCC/MicroBlazeV9/portasm.S \
FreeRTOS/Source/portable/GCC/MicroBlazeV9/port_exceptions.c \
FreeRTOS/Source/tasks.c \
FreeRTOS/Source/list.c \
-I embeddedsw/lib/bsp/standalone/src/microblaze \
-I FreeRTOS/Source/portable/GCC/MicroBlazeV9/ \
-I FreeRTOS/Source/include \
-I FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src \
-I FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/BSP/microblaze_0/libsrc/standalone_v5_4/src \
-I FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/BSP/microblaze_0/include \
-I FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/BSP/microblaze_0/libsrc/intc_v3_5/src
echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }}"
ARM-GCC:
name: GNU ARM Toolchain
runs-on: ubuntu-latest
steps:
- name: Checkout the FreeRTOS/FreeRTOS Repository
uses: actions/checkout@v4.1.1
with:
ref: main
repository: FreeRTOS/FreeRTOS
fetch-depth: 1
- env:
stepName: Fetch Dependencies
shell: bash
run: |
# ${{ env.stepName }}
echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
git submodule update --checkout --init --depth 1 FreeRTOS/Demo/ThirdParty/Community-Supported-Demos FreeRTOS-Plus/Source/FreeRTOS-Plus-Trace
echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }}"
# Checkout user pull request changes
- name: Checkout Pull Request
uses: actions/checkout@v4.1.1
with:
path: ./FreeRTOS/Source
- name: Install GNU ARM Toolchain
shell: bash
run: |
sudo apt-get -y update
sudo apt-get -y install gcc-arm-none-eabi build-essential cmake git ninja-build python3-minimal
- name: Build CORTEX_MPU_M3_MPS2_QEMU_GCC Demo
shell: bash
working-directory: FreeRTOS/Demo/CORTEX_MPU_M3_MPS2_QEMU_GCC
run: make -j
- name: Build CORTEX_MPU_R4F_TI_RM46_HERCULES_GCC Demo
shell: bash
working-directory: FreeRTOS/Demo/CORTEX_MPU_R4F_TI_RM46_HERCULES_GCC
run: cmake -S . -B build && make -j -C build all
- name: Build CORTEX_MPU_R5F_TI_RM57_HERCULES_GCC Demo
shell: bash
working-directory: FreeRTOS/Demo/CORTEX_MPU_R5F_TI_RM57_HERCULES_GCC
run: cmake -S . -B build && make -j -C build all
- name: Build CORTEX_LM3S102_GCC Demo
shell: bash
working-directory: FreeRTOS/Demo/CORTEX_LM3S102_GCC
run: make -j
- name: Build CORTEX_LM3S811_GCC Demo
shell: bash
working-directory: FreeRTOS/Demo/CORTEX_LM3S811_GCC
run: make -j
- name: Build CORTEX_M0+_RP2040 Demos
shell: bash
working-directory: FreeRTOS/Demo/ThirdParty/Community-Supported-Demos/CORTEX_M0+_RP2040
run: |
git clone https://github.com/raspberrypi/pico-sdk.git
cmake -B build -DPICO_SDK_PATH=pico-sdk -GNinja
ninja -C build --verbose
- name: Build CORTEX_MPS2_QEMU_IAR_GCC Demo
shell: bash
working-directory: FreeRTOS/Demo/CORTEX_MPS2_QEMU_IAR_GCC
run: make -C build/gcc -j

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name: CMock Unit Tests
on: [push, pull_request]
jobs:
run:
runs-on: ubuntu-20.04
steps:
- name: Checkout Parent Repository
uses: actions/checkout@v4.1.1
with:
ref: main
repository: FreeRTOS/FreeRTOS
submodules: 'recursive'
fetch-depth: 1
# Checkout user pull request changes
- name: Checkout Pull Request
uses: actions/checkout@v4.1.1
with:
path: ./FreeRTOS/Source
- name: Setup Python
uses: actions/setup-python@master
with:
python-version: 3.8
- name: Install packages
run: |
sudo apt-get install lcov cflow ruby doxygen build-essential unifdef
- name: Run Unit Tests with ENABLE_SANITIZER=1
run: |
make -C FreeRTOS/Test/CMock clean
make -C FreeRTOS/Test/CMock ENABLE_SANITIZER=1 run_col_formatted
- name: Run Unit Tests for coverage
run: |
make -C FreeRTOS/Test/CMock clean
make -C FreeRTOS/Test/CMock lcovhtml
lcov --config-file FreeRTOS/Test/CMock/lcovrc --summary FreeRTOS/Test/CMock/build/cmock_test.info > FreeRTOS/Test/CMock/build/cmock_test_summary.txt
- name: Upload coverage to Codecov
uses: codecov/codecov-action@v3.1.0
with:
files: ${{ github.workspace }}/FreeRTOS/Test/CMock/build/cmock_test.info
root_dir: ${{ github.workspace }}/FreeRTOS/Source
flags: unittests
fail_ci_if_error: false
verbose: false
- name: Archive code coverage data
uses: actions/upload-artifact@v4
with:
name: coverage-data
path: FreeRTOS/Test/CMock/build/cmock_test*
- name: Archive code coverage html report
uses: actions/upload-artifact@v4
with:
name: coverage-report
path: FreeRTOS/Test/CMock/build/coverage

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[submodule "ThirdParty/FreeRTOS-Kernel-Partner-Supported-Ports"]
path = portable/ThirdParty/Partner-Supported-Ports
url = https://github.com/FreeRTOS/FreeRTOS-Kernel-Partner-Supported-Ports
[submodule "ThirdParty/FreeRTOS-Kernel-Community-Supported-Ports"]
path = portable/ThirdParty/Community-Supported-Ports
url = https://github.com/FreeRTOS/FreeRTOS-Kernel-Community-Supported-Ports

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cmake_minimum_required(VERSION 3.15)
# User is responsible to one mandatory option:
# FREERTOS_PORT, if not specified and native port detected, uses the native compile.
#
# User is responsible for one library target:
# freertos_config ,typically an INTERFACE library
#
# DEPRECATED: FREERTOS_CONFIG_FILE_DIRECTORY - but still supported if no freertos_config defined for now.
# May be removed at some point in the future.
#
# User can choose which heap implementation to use (either the implementations
# included with FreeRTOS [1..5] or a custom implementation) by providing the
# option FREERTOS_HEAP. When dynamic allocation is used, the user must specify a
# heap implementation. If the option is not set, the cmake will use no heap
# implementation (e.g. when only static allocation is used).
# `freertos_config` target defines the path to FreeRTOSConfig.h and optionally other freertos based config files
if(NOT TARGET freertos_config )
if (NOT DEFINED FREERTOS_CONFIG_FILE_DIRECTORY )
message(FATAL_ERROR " freertos_config target not specified. Please specify a cmake target that defines the include directory for FreeRTOSConfig.h:\n"
" add_library(freertos_config INTERFACE)\n"
" target_include_directories(freertos_config SYSTEM\n"
" INTERFACE\n"
" include) # The config file directory\n"
" target_compile_definitions(freertos_config\n"
" PUBLIC\n"
" projCOVERAGE_TEST=0)\n")
else()
message(WARNING " Using deprecated 'FREERTOS_CONFIG_FILE_DIRECTORY' - please update your project CMakeLists.txt file:\n"
" add_library(freertos_config INTERFACE)\n"
" target_include_directories(freertos_config SYSTEM\n"
" INTERFACE\n"
" include) # The config file directory\n"
" target_compile_definitions(freertos_config\n"
" PUBLIC\n"
" projCOVERAGE_TEST=0)\n")
endif()
endif()
# FreeRTOS port option
if(NOT FREERTOS_PORT)
message(WARNING " FREERTOS_PORT is not set. Please specify it from top-level CMake file (example):\n"
" set(FREERTOS_PORT GCC_ARM_CM4F CACHE STRING \"\")\n"
" or from CMake command line option:\n"
" -DFREERTOS_PORT=GCC_ARM_CM4F\n"
" \n"
" Available port options:\n"
" A_CUSTOM_PORT - Compiler: User Defined Target: User Defined\n"
" BCC_16BIT_DOS_FLSH186 - Compiler: BCC Target: 16 bit DOS Flsh186\n"
" BCC_16BIT_DOS_PC - Compiler: BCC Target: 16 bit DOS PC\n"
" CCS_ARM_CM3 - Compiler: CCS Target: ARM Cortex-M3\n"
" CCS_ARM_CM4F - Compiler: CCS Target: ARM Cortex-M4 with FPU\n"
" CCS_ARM_CR4 - Compiler: CCS Target: ARM Cortex-R4\n"
" CCS_MSP430X - Compiler: CCS Target: MSP430X\n"
" CODEWARRIOR_COLDFIRE_V1 - Compiler: CoreWarrior Target: ColdFire V1\n"
" CODEWARRIOR_COLDFIRE_V2 - Compiler: CoreWarrior Target: ColdFire V2\n"
" CODEWARRIOR_HCS12 - Compiler: CoreWarrior Target: HCS12\n"
" GCC_ARM_CA9 - Compiler: GCC Target: ARM Cortex-A9\n"
" GCC_ARM_AARCH64 - Compiler: GCC Target: ARM v8-A\n"
" GCC_ARM_AARCH64_SRE - Compiler: GCC Target: ARM v8-A SRE\n"
" GCC_ARM_CM0 - Compiler: GCC Target: ARM Cortex-M0\n"
" GCC_ARM_CM3 - Compiler: GCC Target: ARM Cortex-M3\n"
" GCC_ARM_CM3_MPU - Compiler: GCC Target: ARM Cortex-M3 with MPU\n"
" GCC_ARM_CM4_MPU - Compiler: GCC Target: ARM Cortex-M4 with MPU\n"
" GCC_ARM_CM4F - Compiler: GCC Target: ARM Cortex-M4 with FPU\n"
" GCC_ARM_CM7 - Compiler: GCC Target: ARM Cortex-M7\n"
" GCC_ARM_CM23_NONSECURE - Compiler: GCC Target: ARM Cortex-M23 non-secure\n"
" GCC_ARM_CM23_SECURE - Compiler: GCC Target: ARM Cortex-M23 secure\n"
" GCC_ARM_CM23_NTZ_NONSECURE - Compiler: GCC Target: ARM Cortex-M23 non-trustzone non-secure\n"
" GCC_ARM_CM33_NONSECURE - Compiler: GCC Target: ARM Cortex-M33 non-secure\n"
" GCC_ARM_CM33_SECURE - Compiler: GCC Target: ARM Cortex-M33 secure\n"
" GCC_ARM_CM33_NTZ_NONSECURE - Compiler: GCC Target: ARM Cortex-M33 non-trustzone non-secure\n"
" GCC_ARM_CM33_TFM - Compiler: GCC Target: ARM Cortex-M33 non-secure for TF-M\n"
" GCC_ARM_CM35P_NONSECURE - Compiler: GCC Target: ARM Cortex-M35P non-secure\n"
" GCC_ARM_CM35P_SECURE - Compiler: GCC Target: ARM Cortex-M35P secure\n"
" GCC_ARM_CM35P_NTZ_NONSECURE - Compiler: GCC Target: ARM Cortex-M35P non-trustzone non-secure\n"
" GCC_ARM_CM55_NONSECURE - Compiler: GCC Target: ARM Cortex-M55 non-secure\n"
" GCC_ARM_CM55_SECURE - Compiler: GCC Target: ARM Cortex-M55 secure\n"
" GCC_ARM_CM55_NTZ_NONSECURE - Compiler: GCC Target: ARM Cortex-M55 non-trustzone non-secure\n"
" GCC_ARM_CM55_TFM - Compiler: GCC Target: ARM Cortex-M55 non-secure for TF-M\n"
" GCC_ARM_CM85_NONSECURE - Compiler: GCC Target: ARM Cortex-M85 non-secure\n"
" GCC_ARM_CM85_SECURE - Compiler: GCC Target: ARM Cortex-M85 secure\n"
" GCC_ARM_CM85_NTZ_NONSECURE - Compiler: GCC Target: ARM Cortex-M85 non-trustzone non-secure\n"
" GCC_ARM_CM85_TFM - Compiler: GCC Target: ARM Cortex-M85 non-secure for TF-M\n"
" GCC_ARM_CR5 - Compiler: GCC Target: ARM Cortex-R5\n"
" GCC_ARM_CRX_MPU - Compiler: GCC Target: ARM Cortex-Rx with MPU\n"
" GCC_ARM_CRX_NOGIC - Compiler: GCC Target: ARM Cortex-Rx no GIC\n"
" GCC_ARM7_AT91FR40008 - Compiler: GCC Target: ARM7 Atmel AT91R40008\n"
" GCC_ARM7_AT91SAM7S - Compiler: GCC Target: ARM7 Atmel AT91SAM7S\n"
" GCC_ARM7_LPC2000 - Compiler: GCC Target: ARM7 LPC2000\n"
" GCC_ARM7_LPC23XX - Compiler: GCC Target: ARM7 LPC23xx\n"
" GCC_ATMEGA323 - Compiler: GCC Target: ATMega323\n"
" GCC_AVR32_UC3 - Compiler: GCC Target: AVR32 UC3\n"
" GCC_COLDFIRE_V2 - Compiler: GCC Target: ColdFire V2\n"
" GCC_CORTUS_APS3 - Compiler: GCC Target: CORTUS APS3\n"
" GCC_H8S2329 - Compiler: GCC Target: H8S2329\n"
" GCC_HCS12 - Compiler: GCC Target: HCS12\n"
" GCC_IA32_FLAT - Compiler: GCC Target: IA32 flat\n"
" GCC_MICROBLAZE - Compiler: GCC Target: MicroBlaze\n"
" GCC_MICROBLAZE_V8 - Compiler: GCC Target: MicroBlaze V8\n"
" GCC_MICROBLAZE_V9 - Compiler: GCC Target: MicroBlaze V9\n"
" GCC_MSP430F449 - Compiler: GCC Target: MSP430F449\n"
" GCC_NIOSII - Compiler: GCC Target: NiosII\n"
" GCC_PPC405_XILINX - Compiler: GCC Target: Xilinx PPC405\n"
" GCC_PPC440_XILINX - Compiler: GCC Target: Xilinx PPC440\n"
" GCC_RISC_V - Compiler: GCC Target: RISC-V\n"
" GCC_RISC_V_PULPINO_VEGA_RV32M1RM - Compiler: GCC Target: RISC-V Pulpino Vega RV32M1RM\n"
" GCC_RISC_V_GENERIC - Compiler: GCC Target: RISC-V with FREERTOS_RISCV_EXTENSION\n"
" GCC_RL78 - Compiler: GCC Target: Renesas RL78\n"
" GCC_RX100 - Compiler: GCC Target: Renesas RX100\n"
" GCC_RX200 - Compiler: GCC Target: Renesas RX200\n"
" GCC_RX600 - Compiler: GCC Target: Renesas RX600\n"
" GCC_RX600_V2 - Compiler: GCC Target: Renesas RX600 v2\n"
" GCC_RX700_V3_DPFPU - Compiler: GCC Target: Renesas RX700 v3 with DPFPU\n"
" GCC_STR75X - Compiler: GCC Target: STR75x\n"
" GCC_TRICORE_1782 - Compiler: GCC Target: TriCore 1782\n"
" GCC_ARC_EM_HS - Compiler: GCC Target: DesignWare ARC EM HS\n"
" GCC_ARC_V1 - Compiler: GCC Target: DesignWare ARC v1\n"
" GCC_ATMEGA - Compiler: GCC Target: ATmega\n"
" GCC_POSIX - Compiler: GCC Target: Posix\n"
" GCC_RP2040 - Compiler: GCC Target: RP2040 ARM Cortex-M0+\n"
" GCC_XTENSA_ESP32 - Compiler: GCC Target: Xtensa ESP32\n"
" GCC_AVRDX - Compiler: GCC Target: AVRDx\n"
" GCC_AVR_MEGA0 - Compiler: GCC Target: AVR Mega0\n"
" IAR_78K0K - Compiler: IAR Target: Renesas 78K0K\n"
" IAR_ARM_CA5_NOGIC - Compiler: IAR Target: ARM Cortex-A5 no GIC\n"
" IAR_ARM_CA9 - Compiler: IAR Target: ARM Cortex-A9\n"
" IAR_ARM_CM0 - Compiler: IAR Target: ARM Cortex-M0\n"
" IAR_ARM_CM3 - Compiler: IAR Target: ARM Cortex-M3\n"
" IAR_ARM_CM4F - Compiler: IAR Target: ARM Cortex-M4 with FPU\n"
" IAR_ARM_CM4F_MPU - Compiler: IAR Target: ARM Cortex-M4 with FPU and MPU\n"
" IAR_ARM_CM7 - Compiler: IAR Target: ARM Cortex-M7\n"
" IAR_ARM_CM23_NONSECURE - Compiler: IAR Target: ARM Cortex-M23 non-secure\n"
" IAR_ARM_CM23_SECURE - Compiler: IAR Target: ARM Cortex-M23 secure\n"
" IAR_ARM_CM23_NTZ_NONSECURE - Compiler: IAR Target: ARM Cortex-M23 non-trustzone non-secure\n"
" IAR_ARM_CM33_NONSECURE - Compiler: IAR Target: ARM Cortex-M33 non-secure\n"
" IAR_ARM_CM33_SECURE - Compiler: IAR Target: ARM Cortex-M33 secure\n"
" IAR_ARM_CM33_NTZ_NONSECURE - Compiler: IAR Target: ARM Cortex-M33 non-trustzone non-secure\n"
" IAR_ARM_CM33_TFM - Compiler: IAR Target: ARM Cortex-M33 non-secure for TF-M\n"
" IAR_ARM_CM35P_NONSECURE - Compiler: IAR Target: ARM Cortex-M35P non-secure\n"
" IAR_ARM_CM35P_SECURE - Compiler: IAR Target: ARM Cortex-M35P secure\n"
" IAR_ARM_CM35P_NTZ_NONSECURE - Compiler: IAR Target: ARM Cortex-M35P non-trustzone non-secure\n"
" IAR_ARM_CM55_NONSECURE - Compiler: IAR Target: ARM Cortex-M55 non-secure\n"
" IAR_ARM_CM55_SECURE - Compiler: IAR Target: ARM Cortex-M55 secure\n"
" IAR_ARM_CM55_NTZ_NONSECURE - Compiler: IAR Target: ARM Cortex-M55 non-trustzone non-secure\n"
" IAR_ARM_CM55_TFM - Compiler: IAR Target: ARM Cortex-M55 non-secure for TF-M\n"
" IAR_ARM_CM85_NONSECURE - Compiler: IAR Target: ARM Cortex-M85 non-secure\n"
" IAR_ARM_CM85_SECURE - Compiler: IAR Target: ARM Cortex-M85 secure\n"
" IAR_ARM_CM85_NTZ_NONSECURE - Compiler: IAR Target: ARM Cortex-M85 non-trustzone non-secure\n"
" IAR_ARM_CM85_TFM - Compiler: IAR Target: ARM Cortex-M85 non-secure for TF-M\n"
" IAR_ARM_CRX_NOGIC - Compiler: IAR Target: ARM Cortex-Rx no GIC\n"
" IAR_ATMEGA323 - Compiler: IAR Target: ATMega323\n"
" IAR_ATMEL_SAM7S64 - Compiler: IAR Target: Atmel SAM7S64\n"
" IAR_ATMEL_SAM9XE - Compiler: IAR Target: Atmel SAM9XE\n"
" IAR_AVR_AVRDX - Compiler: IAR Target: AVRDx\n"
" IAR_AVR_MEGA0 - Compiler: IAR Target: AVR Mega0\n"
" IAR_AVR32_UC3 - Compiler: IAR Target: AVR32 UC3\n"
" IAR_LPC2000 - Compiler: IAR Target: LPC2000\n"
" IAR_MSP430 - Compiler: IAR Target: MSP430\n"
" IAR_MSP430X - Compiler: IAR Target: MSP430X\n"
" IAR_RISC_V - Compiler: IAR Target: RISC-V\n"
" IAR_RISC_V_GENERIC - Compiler: IAR Target: RISC-V with FREERTOS_RISCV_EXTENSION\n"
" IAR_RL78 - Compiler: IAR Target: Renesas RL78\n"
" IAR_RX100 - Compiler: IAR Target: Renesas RX100\n"
" IAR_RX600 - Compiler: IAR Target: Renesas RX600\n"
" IAR_RX700_V3_DPFPU - Compiler: IAR Target: Renesas RX700 v3 with DPFPU\n"
" IAR_RX_V2 - Compiler: IAR Target: Renesas RX v2\n"
" IAR_STR71X - Compiler: IAR Target: STR71x\n"
" IAR_STR75X - Compiler: IAR Target: STR75x\n"
" IAR_STR91X - Compiler: IAR Target: STR91x\n"
" IAR_V850ES_FX3 - Compiler: IAR Target: Renesas V850ES/Fx3\n"
" IAR_V850ES_HX3 - Compiler: IAR Target: Renesas V850ES/Hx3\n"
" MIKROC_ARM_CM4F - Compiler: MikroC Target: ARM Cortex-M4 with FPU\n"
" MPLAB_PIC18F - Compiler: MPLAB Target: PIC18F\n"
" MPLAB_PIC24 - Compiler: MPLAB Target: PIC24\n"
" MPLAB_PIC32MEC14XX - Compiler: MPLAB Target: PIC32MEC14xx\n"
" MPLAB_PIC32MX - Compiler: MPLAB Target: PIC32MX\n"
" MPLAB_PIC32MZ - Compiler: MPLAB Target: PIC32MZ\n"
" MSVC_MINGW - Compiler: MSVC or MinGW Target: x86\n"
" OWATCOM_16BIT_DOS_FLSH186 - Compiler: Open Watcom Target: 16 bit DOS Flsh186\n"
" OWATCOM_16BIT_DOS_PC - Compiler: Open Watcom Target: 16 bit DOS PC\n"
" PARADIGM_TERN_EE_LARGE - Compiler: Paradigm Target: Tern EE large\n"
" PARADIGM_TERN_EE_SMALL - Compiler: Paradigm Target: Tern EE small\n"
" RENESAS_RX100 - Compiler: Renesas Target: RX100\n"
" RENESAS_RX200 - Compiler: Renesas Target: RX200\n"
" RENESAS_RX600 - Compiler: Renesas Target: RX600\n"
" RENESAS_RX600_V2 - Compiler: Renesas Target: RX600 v2\n"
" RENESAS_RX700_V3_DPFPU - Compiler: Renesas Target: RX700 v3 with DPFPU\n"
" RENESAS_SH2A_FPU - Compiler: Renesas Target: SH2A with FPU\n"
" ROWLEY_MSP430F449 - Compiler: Rowley Target: MSP430F449\n"
" RVDS_ARM_CA9 - Compiler: RVDS Target: ARM Cortex-A9\n"
" RVDS_ARM_CM0 - Compiler: RVDS Target: ARM Cortex-M0\n"
" RVDS_ARM_CM3 - Compiler: RVDS Target: ARM Cortex-M3\n"
" RVDS_ARM_CM4_MPU - Compiler: RVDS Target: ARM Cortex-M4 with MPU\n"
" RVDS_ARM_CM4F - Compiler: RVDS Target: ARM Cortex-M4 with FPU\n"
" RVDS_ARM_CM7 - Compiler: RVDS Target: ARM Cortex-M7\n"
" RVDS_ARM7_LPC21XX - Compiler: RVDS Target: ARM7 LPC21xx\n"
" SDCC_CYGNAL - Compiler: SDCC Target: Cygnal\n"
" SOFTUNE_MB91460 - Compiler: Softune Target: MB91460\n"
" SOFTUNE_MB96340 - Compiler: Softune Target: MB96340\n"
" TASKING_ARM_CM4F - Compiler: Tasking Target: ARM Cortex-M4 with FPU\n"
" TEMPLATE - Compiler: HOST Target: None\n"
" CDK_THEAD_CK802 - Compiler: CDK Target: T-head CK802\n"
" XCC_XTENSA - Compiler: XCC Target: Xtensa\n"
" WIZC_PIC18 - Compiler: WizC Target: PIC18")
# Native FREERTOS_PORT for Linux and Windows MINGW builds
if(UNIX)
message(STATUS " Auto-Detected Unix, setting FREERTOS_PORT=GCC_POSIX")
set(FREERTOS_PORT GCC_POSIX CACHE STRING "FreeRTOS port name")
elseif(MINGW)
message(STATUS " Auto-Detected MINGW, setting FREERTOS_PORT=MSVC_MINGW")
set(FREERTOS_PORT MSVC_MINGW CACHE STRING "FreeRTOS port name")
endif()
elseif((FREERTOS_PORT STREQUAL "A_CUSTOM_PORT") AND (NOT TARGET freertos_kernel_port) )
message(FATAL_ERROR " FREERTOS_PORT is set to A_CUSTOM_PORT. Please specify the custom port target with all necessary files. For example:\n"
" Assuming a directory of:\n"
" FreeRTOSCustomPort/\n"
" CMakeLists.txt\n"
" port.c\n"
" portmacro.h\n"
" Where FreeRTOSCustomPort/CMakeLists.txt is a modified version of:\n"
" add_library(freertos_kernel_port OBJECT)\n"
" target_sources(freertos_kernel_port\n"
" PRIVATE\n"
" port.c\n"
" portmacro.h)\n"
" add_library(freertos_kernel_port_headers INTERFACE)\n"
" target_include_directories(freertos_kernel_port_headers INTERFACE \n"
" .)\n"
" target_link_libraries(freertos_kernel_port\n"
" PRIVATE\n"
" freertos_kernel_port_headers\n"
" freertos_kernel_include)")
endif()
add_library(freertos_kernel STATIC)
########################################################################
add_subdirectory(include)
add_subdirectory(portable)
target_sources(freertos_kernel PRIVATE
croutine.c
event_groups.c
list.c
queue.c
stream_buffer.c
tasks.c
timers.c
)
if (DEFINED FREERTOS_HEAP )
# User specified a heap implementation add heap implementation to freertos_kernel.
target_sources(freertos_kernel PRIVATE
# If FREERTOS_HEAP is digit between 1 .. 5 - it is heap number, otherwise - it is path to custom heap source file
$<IF:$<BOOL:$<FILTER:${FREERTOS_HEAP},EXCLUDE,^[1-5]$>>,${FREERTOS_HEAP},portable/MemMang/heap_${FREERTOS_HEAP}.c>
)
endif()
target_link_libraries(freertos_kernel
PUBLIC
freertos_kernel_include
freertos_kernel_port_headers
PRIVATE
freertos_kernel_port
)
########################################################################

View file

@ -1,707 +0,0 @@
// ----------------------------------------------------------------------------
// ATMEL Microcontroller Software Support - ROUSSET -
// ----------------------------------------------------------------------------
// The software is delivered "AS IS" without warranty or condition of any
// kind, either express, implied or statutory. This includes without
// limitation any warranty or condition with respect to merchantability or
// fitness for any particular purpose, or against the infringements of
// intellectual property rights of others.
// ----------------------------------------------------------------------------
// File Name : AT91R40008.h
// Object : AT91R40008 definitions
// Generated : AT91 SW Application Group 02/19/2003 (11:13:31)
//
// CVS Reference : /AT91R40008.pl/1.3/Tue Nov 12 16:01:52 2002//
// CVS Reference : /AIC_1246F.pl/1.4/Mon Nov 04 17:51:00 2002//
// CVS Reference : /WD_1241B.pl/1.1/Mon Nov 04 17:51:00 2002//
// CVS Reference : /PS_x40.pl/1.2/Tue Nov 12 16:01:52 2002//
// CVS Reference : /PIO_1321C.pl/1.5/Tue Oct 29 15:50:24 2002//
// CVS Reference : /TC_1243B.pl/1.4/Tue Nov 05 12:43:10 2002//
// CVS Reference : /PDC_1363D.pl/1.3/Wed Oct 23 14:49:48 2002//
// CVS Reference : /US_1242E.pl/1.5/Thu Nov 21 13:37:56 2002//
// CVS Reference : /SF_x40.pl/1.1/Tue Nov 12 13:27:20 2002//
// CVS Reference : /EBI_x40.pl/1.5/Wed Feb 19 09:25:22 2003//
// ----------------------------------------------------------------------------
#ifndef AT91R40008_H
#define AT91R40008_H
/* AT91 Register type */
typedef volatile unsigned int AT91_REG; // Hardware register definition
typedef volatile unsigned int at91_reg;
// *****************************************************************************
// SOFTWARE API DEFINITION FOR Advanced Interrupt Controller
// *****************************************************************************
typedef struct _AT91S_AIC {
AT91_REG AIC_SMR[32]; // Source Mode egister
AT91_REG AIC_SVR[32]; // Source Vector egister
AT91_REG AIC_IVR; // IRQ Vector Register
AT91_REG AIC_FVR; // FIQ Vector Register
AT91_REG AIC_ISR; // Interrupt Status Register
AT91_REG AIC_IPR; // Interrupt Pending Register
AT91_REG AIC_IMR; // Interrupt Mask Register
AT91_REG AIC_CISR; // Core Interrupt Status Register
AT91_REG Reserved0[2]; //
AT91_REG AIC_IECR; // Interrupt Enable Command Register
AT91_REG AIC_IDCR; // Interrupt Disable Command egister
AT91_REG AIC_ICCR; // Interrupt Clear Command Register
AT91_REG AIC_ISCR; // Interrupt Set Command Register
AT91_REG AIC_EOICR; // End of Interrupt Command Register
AT91_REG AIC_SPU; // Spurious Vector Register
} AT91S_AIC, *AT91PS_AIC;
// -------- AIC_SMR : (AIC Offset: 0x0) Control Register --------
#define AT91C_AIC_PRIOR ((unsigned int) 0x7 << 0) // (AIC) Priority Level
#define AT91C_AIC_PRIOR_LOWEST ((unsigned int) 0x0) // (AIC) Lowest priority level
#define AT91C_AIC_PRIOR_HIGHEST ((unsigned int) 0x7) // (AIC) Highest priority level
#define AT91C_AIC_SRCTYPE ((unsigned int) 0x3 << 5) // (AIC) Interrupt Source Type
#define AT91C_AIC_SRCTYPE_INT_LEVEL_SENSITIVE ((unsigned int) 0x0 << 5) // (AIC) Internal Sources Code Label Level Sensitive
#define AT91C_AIC_SRCTYPE_INT_EDGE_TRIGGERED ((unsigned int) 0x1 << 5) // (AIC) Internal Sources Code Label Edge triggered
#define AT91C_AIC_SRCTYPE_EXT_HIGH_LEVEL ((unsigned int) 0x2 << 5) // (AIC) External Sources Code Label High-level Sensitive
#define AT91C_AIC_SRCTYPE_EXT_POSITIVE_EDGE ((unsigned int) 0x3 << 5) // (AIC) External Sources Code Label Positive Edge triggered
// -------- AIC_CISR : (AIC Offset: 0x114) AIC Core Interrupt Status Register --------
#define AT91C_AIC_NFIQ ((unsigned int) 0x1 << 0) // (AIC) NFIQ Status
#define AT91C_AIC_NIRQ ((unsigned int) 0x1 << 1) // (AIC) NIRQ Status
// *****************************************************************************
// SOFTWARE API DEFINITION FOR Watchdog Timer Interface
// *****************************************************************************
typedef struct _AT91S_WD {
AT91_REG WD_OMR; // Overflow Mode Register
AT91_REG WD_CMR; // Clock Mode Register
AT91_REG WD_CR; // Control Register
AT91_REG WD_SR; // Status Register
} AT91S_WD, *AT91PS_WD;
// -------- WD_OMR : (WD Offset: 0x0) Overflow Mode Register --------
#define AT91C_WD_WDEN ((unsigned int) 0x1 << 0) // (WD) Watchdog Enable
#define AT91C_WD_RSTEN ((unsigned int) 0x1 << 1) // (WD) Reset Enable
#define AT91C_WD_IRQEN ((unsigned int) 0x1 << 2) // (WD) Interrupt Enable
#define AT91C_WD_EXTEN ((unsigned int) 0x1 << 3) // (WD) External Signal Enable
#define AT91C_WD_OKEY ((unsigned int) 0xFFF << 4) // (WD) Watchdog Enable
// -------- WD_CMR : (WD Offset: 0x4) Clock Mode Register --------
#define AT91C_WD_WDCLKS ((unsigned int) 0x3 << 0) // (WD) Clock Selection
#define AT91C_WD_WDCLKS_MCK32 ((unsigned int) 0x0) // (WD) Master Clock divided by 32
#define AT91C_WD_WDCLKS_MCK128 ((unsigned int) 0x1) // (WD) Master Clock divided by 128
#define AT91C_WD_WDCLKS_MCK1024 ((unsigned int) 0x2) // (WD) Master Clock divided by 1024
#define AT91C_WD_WDCLKS_MCK4096 ((unsigned int) 0x3) // (WD) Master Clock divided by 4096
#define AT91C_WD_HPCV ((unsigned int) 0xF << 2) // (WD) High Pre-load Counter Value
#define AT91C_WD_CKEY ((unsigned int) 0x1FF << 7) // (WD) Clock Access Key
// -------- WD_CR : (WD Offset: 0x8) Control Register --------
#define AT91C_WD_RSTKEY ((unsigned int) 0xFFFF << 0) // (WD) Restart Key
// -------- WD_SR : (WD Offset: 0xc) Status Register --------
#define AT91C_WD_WDOVF ((unsigned int) 0x1 << 0) // (WD) Watchdog Overflow
// *****************************************************************************
// SOFTWARE API DEFINITION FOR Power Saving Controler
// *****************************************************************************
typedef struct _AT91S_PS {
AT91_REG PS_CR; // Control Register
AT91_REG PS_PCER; // Peripheral Clock Enable Register
AT91_REG PS_PCDR; // Peripheral Clock Disable Register
AT91_REG PS_PCSR; // Peripheral Clock Status Register
} AT91S_PS, *AT91PS_PS;
// -------- PS_PCER : (PS Offset: 0x4) Peripheral Clock Enable Register --------
#define AT91C_PS_US0 ((unsigned int) 0x1 << 2) // (PS) Usart 0 Clock
#define AT91C_PS_US1 ((unsigned int) 0x1 << 3) // (PS) Usart 1 Clock
#define AT91C_PS_TC0 ((unsigned int) 0x1 << 4) // (PS) Timer Counter 0 Clock
#define AT91C_PS_TC1 ((unsigned int) 0x1 << 5) // (PS) Timer Counter 1 Clock
#define AT91C_PS_TC2 ((unsigned int) 0x1 << 6) // (PS) Timer Counter 2 Clock
#define AT91C_PS_PIO ((unsigned int) 0x1 << 8) // (PS) PIO Clock
// -------- PS_PCDR : (PS Offset: 0x8) Peripheral Clock Disable Register --------
// -------- PS_PCSR : (PS Offset: 0xc) Peripheral Clock Satus Register --------
// *****************************************************************************
// SOFTWARE API DEFINITION FOR Parallel Input Output Controler
// *****************************************************************************
typedef struct _AT91S_PIO {
AT91_REG PIO_PER; // PIO Enable Register
AT91_REG PIO_PDR; // PIO Disable Register
AT91_REG PIO_PSR; // PIO Status Register
AT91_REG Reserved0[1]; //
AT91_REG PIO_OER; // Output Enable Register
AT91_REG PIO_ODR; // Output Disable Registerr
AT91_REG PIO_OSR; // Output Status Register
AT91_REG Reserved1[1]; //
AT91_REG PIO_IFER; // Input Filter Enable Register
AT91_REG PIO_IFDR; // Input Filter Disable Register
AT91_REG PIO_IFSR; // Input Filter Status Register
AT91_REG Reserved2[1]; //
AT91_REG PIO_SODR; // Set Output Data Register
AT91_REG PIO_CODR; // Clear Output Data Register
AT91_REG PIO_ODSR; // Output Data Status Register
AT91_REG PIO_PDSR; // Pin Data Status Register
AT91_REG PIO_IER; // Interrupt Enable Register
AT91_REG PIO_IDR; // Interrupt Disable Register
AT91_REG PIO_IMR; // Interrupt Mask Register
AT91_REG PIO_ISR; // Interrupt Status Register
AT91_REG PIO_MDER; // Multi-driver Enable Register
AT91_REG PIO_MDDR; // Multi-driver Disable Register
AT91_REG PIO_MDSR; // Multi-driver Status Register
} AT91S_PIO, *AT91PS_PIO;
// *****************************************************************************
// SOFTWARE API DEFINITION FOR Timer Counter Channel Interface
// *****************************************************************************
typedef struct _AT91S_TC {
AT91_REG TC_CCR; // Channel Control Register
AT91_REG TC_CMR; // Channel Mode Register
AT91_REG Reserved0[2]; //
AT91_REG TC_CV; // Counter Value
AT91_REG TC_RA; // Register A
AT91_REG TC_RB; // Register B
AT91_REG TC_RC; // Register C
AT91_REG TC_SR; // Status Register
AT91_REG TC_IER; // Interrupt Enable Register
AT91_REG TC_IDR; // Interrupt Disable Register
AT91_REG TC_IMR; // Interrupt Mask Register
} AT91S_TC, *AT91PS_TC;
// -------- TC_CCR : (TC Offset: 0x0) TC Channel Control Register --------
#define AT91C_TC_CLKEN ((unsigned int) 0x1 << 0) // (TC) Counter Clock Enable Command
#define AT91C_TC_CLKDIS ((unsigned int) 0x1 << 1) // (TC) Counter Clock Disable Command
#define AT91C_TC_SWTRG ((unsigned int) 0x1 << 2) // (TC) Software Trigger Command
// -------- TC_CMR : (TC Offset: 0x4) TC Channel Mode Register: Capture Mode / Waveform Mode --------
#define AT91C_TC_CPCSTOP ((unsigned int) 0x1 << 6) // (TC) Counter Clock Stopped with RC Compare
#define AT91C_TC_CPCDIS ((unsigned int) 0x1 << 7) // (TC) Counter Clock Disable with RC Compare
#define AT91C_TC_EEVTEDG ((unsigned int) 0x3 << 8) // (TC) External Event Edge Selection
#define AT91C_TC_EEVTEDG_NONE ((unsigned int) 0x0 << 8) // (TC) Edge: None
#define AT91C_TC_EEVTEDG_RISING ((unsigned int) 0x1 << 8) // (TC) Edge: rising edge
#define AT91C_TC_EEVTEDG_FALLING ((unsigned int) 0x2 << 8) // (TC) Edge: falling edge
#define AT91C_TC_EEVTEDG_BOTH ((unsigned int) 0x3 << 8) // (TC) Edge: each edge
#define AT91C_TC_EEVT ((unsigned int) 0x3 << 10) // (TC) External Event Selection
#define AT91C_TC_EEVT_NONE ((unsigned int) 0x0 << 10) // (TC) Signal selected as external event: TIOB TIOB direction: input
#define AT91C_TC_EEVT_RISING ((unsigned int) 0x1 << 10) // (TC) Signal selected as external event: XC0 TIOB direction: output
#define AT91C_TC_EEVT_FALLING ((unsigned int) 0x2 << 10) // (TC) Signal selected as external event: XC1 TIOB direction: output
#define AT91C_TC_EEVT_BOTH ((unsigned int) 0x3 << 10) // (TC) Signal selected as external event: XC2 TIOB direction: output
#define AT91C_TC_ENETRG ((unsigned int) 0x1 << 12) // (TC) External Event Trigger enable
#define AT91C_TC_WAVESEL ((unsigned int) 0x3 << 13) // (TC) Waveform Selection
#define AT91C_TC_WAVESEL_UP ((unsigned int) 0x0 << 13) // (TC) UP mode without atomatic trigger on RC Compare
#define AT91C_TC_WAVESEL_UP_AUTO ((unsigned int) 0x1 << 13) // (TC) UP mode with automatic trigger on RC Compare
#define AT91C_TC_WAVESEL_UPDOWN ((unsigned int) 0x2 << 13) // (TC) UPDOWN mode without automatic trigger on RC Compare
#define AT91C_TC_WAVESEL_UPDOWN_AUTO ((unsigned int) 0x3 << 13) // (TC) UPDOWN mode with automatic trigger on RC Compare
#define AT91C_TC_CPCTRG ((unsigned int) 0x1 << 14) // (TC) RC Compare Trigger Enable
#define AT91C_TC_WAVE ((unsigned int) 0x1 << 15) // (TC)
#define AT91C_TC_ACPA ((unsigned int) 0x3 << 16) // (TC) RA Compare Effect on TIOA
#define AT91C_TC_ACPA_NONE ((unsigned int) 0x0 << 16) // (TC) Effect: none
#define AT91C_TC_ACPA_SET ((unsigned int) 0x1 << 16) // (TC) Effect: set
#define AT91C_TC_ACPA_CLEAR ((unsigned int) 0x2 << 16) // (TC) Effect: clear
#define AT91C_TC_ACPA_TOGGLE ((unsigned int) 0x3 << 16) // (TC) Effect: toggle
#define AT91C_TC_ACPC ((unsigned int) 0x3 << 18) // (TC) RC Compare Effect on TIOA
#define AT91C_TC_ACPC_NONE ((unsigned int) 0x0 << 18) // (TC) Effect: none
#define AT91C_TC_ACPC_SET ((unsigned int) 0x1 << 18) // (TC) Effect: set
#define AT91C_TC_ACPC_CLEAR ((unsigned int) 0x2 << 18) // (TC) Effect: clear
#define AT91C_TC_ACPC_TOGGLE ((unsigned int) 0x3 << 18) // (TC) Effect: toggle
#define AT91C_TC_AEEVT ((unsigned int) 0x3 << 20) // (TC) External Event Effect on TIOA
#define AT91C_TC_AEEVT_NONE ((unsigned int) 0x0 << 20) // (TC) Effect: none
#define AT91C_TC_AEEVT_SET ((unsigned int) 0x1 << 20) // (TC) Effect: set
#define AT91C_TC_AEEVT_CLEAR ((unsigned int) 0x2 << 20) // (TC) Effect: clear
#define AT91C_TC_AEEVT_TOGGLE ((unsigned int) 0x3 << 20) // (TC) Effect: toggle
#define AT91C_TC_ASWTRG ((unsigned int) 0x3 << 22) // (TC) Software Trigger Effect on TIOA
#define AT91C_TC_ASWTRG_NONE ((unsigned int) 0x0 << 22) // (TC) Effect: none
#define AT91C_TC_ASWTRG_SET ((unsigned int) 0x1 << 22) // (TC) Effect: set
#define AT91C_TC_ASWTRG_CLEAR ((unsigned int) 0x2 << 22) // (TC) Effect: clear
#define AT91C_TC_ASWTRG_TOGGLE ((unsigned int) 0x3 << 22) // (TC) Effect: toggle
#define AT91C_TC_BCPB ((unsigned int) 0x3 << 24) // (TC) RB Compare Effect on TIOB
#define AT91C_TC_BCPB_NONE ((unsigned int) 0x0 << 24) // (TC) Effect: none
#define AT91C_TC_BCPB_SET ((unsigned int) 0x1 << 24) // (TC) Effect: set
#define AT91C_TC_BCPB_CLEAR ((unsigned int) 0x2 << 24) // (TC) Effect: clear
#define AT91C_TC_BCPB_TOGGLE ((unsigned int) 0x3 << 24) // (TC) Effect: toggle
#define AT91C_TC_BCPC ((unsigned int) 0x3 << 26) // (TC) RC Compare Effect on TIOB
#define AT91C_TC_BCPC_NONE ((unsigned int) 0x0 << 26) // (TC) Effect: none
#define AT91C_TC_BCPC_SET ((unsigned int) 0x1 << 26) // (TC) Effect: set
#define AT91C_TC_BCPC_CLEAR ((unsigned int) 0x2 << 26) // (TC) Effect: clear
#define AT91C_TC_BCPC_TOGGLE ((unsigned int) 0x3 << 26) // (TC) Effect: toggle
#define AT91C_TC_BEEVT ((unsigned int) 0x3 << 28) // (TC) External Event Effect on TIOB
#define AT91C_TC_BEEVT_NONE ((unsigned int) 0x0 << 28) // (TC) Effect: none
#define AT91C_TC_BEEVT_SET ((unsigned int) 0x1 << 28) // (TC) Effect: set
#define AT91C_TC_BEEVT_CLEAR ((unsigned int) 0x2 << 28) // (TC) Effect: clear
#define AT91C_TC_BEEVT_TOGGLE ((unsigned int) 0x3 << 28) // (TC) Effect: toggle
#define AT91C_TC_BSWTRG ((unsigned int) 0x3 << 30) // (TC) Software Trigger Effect on TIOB
#define AT91C_TC_BSWTRG_NONE ((unsigned int) 0x0 << 30) // (TC) Effect: none
#define AT91C_TC_BSWTRG_SET ((unsigned int) 0x1 << 30) // (TC) Effect: set
#define AT91C_TC_BSWTRG_CLEAR ((unsigned int) 0x2 << 30) // (TC) Effect: clear
#define AT91C_TC_BSWTRG_TOGGLE ((unsigned int) 0x3 << 30) // (TC) Effect: toggle
// -------- TC_SR : (TC Offset: 0x20) TC Channel Status Register --------
#define AT91C_TC_COVFS ((unsigned int) 0x1 << 0) // (TC) Counter Overflow
#define AT91C_TC_LOVRS ((unsigned int) 0x1 << 1) // (TC) Load Overrun
#define AT91C_TC_CPAS ((unsigned int) 0x1 << 2) // (TC) RA Compare
#define AT91C_TC_CPBS ((unsigned int) 0x1 << 3) // (TC) RB Compare
#define AT91C_TC_CPCS ((unsigned int) 0x1 << 4) // (TC) RC Compare
#define AT91C_TC_LDRAS ((unsigned int) 0x1 << 5) // (TC) RA Loading
#define AT91C_TC_LDRBS ((unsigned int) 0x1 << 6) // (TC) RB Loading
#define AT91C_TC_ETRCS ((unsigned int) 0x1 << 7) // (TC) External Trigger
#define AT91C_TC_ETRGS ((unsigned int) 0x1 << 16) // (TC) Clock Enabling
#define AT91C_TC_MTIOA ((unsigned int) 0x1 << 17) // (TC) TIOA Mirror
#define AT91C_TC_MTIOB ((unsigned int) 0x1 << 18) // (TC) TIOA Mirror
// -------- TC_IER : (TC Offset: 0x24) TC Channel Interrupt Enable Register --------
// -------- TC_IDR : (TC Offset: 0x28) TC Channel Interrupt Disable Register --------
// -------- TC_IMR : (TC Offset: 0x2c) TC Channel Interrupt Mask Register --------
// *****************************************************************************
// SOFTWARE API DEFINITION FOR Timer Counter Interface
// *****************************************************************************
typedef struct _AT91S_TCB {
AT91S_TC TCB_TC0; // TC Channel 0
AT91_REG Reserved0[4]; //
AT91S_TC TCB_TC1; // TC Channel 1
AT91_REG Reserved1[4]; //
AT91S_TC TCB_TC2; // TC Channel 2
AT91_REG Reserved2[4]; //
AT91_REG TCB_BCR; // TC Block Control Register
AT91_REG TCB_BMR; // TC Block Mode Register
} AT91S_TCB, *AT91PS_TCB;
// -------- TCB_BCR : (TCB Offset: 0xc0) TC Block Control Register --------
#define AT91C_TCB_SYNC ((unsigned int) 0x1 << 0) // (TCB) Synchro Command
// -------- TCB_BMR : (TCB Offset: 0xc4) TC Block Mode Register --------
#define AT91C_TCB_TC0XC0S ((unsigned int) 0x1 << 0) // (TCB) External Clock Signal 0 Selection
#define AT91C_TCB_TC0XC0S_TCLK0 ((unsigned int) 0x0) // (TCB) TCLK0 connected to XC0
#define AT91C_TCB_TC0XC0S_NONE ((unsigned int) 0x1) // (TCB) None signal connected to XC0
#define AT91C_TCB_TC0XC0S_TIOA1 ((unsigned int) 0x2) // (TCB) TIOA1 connected to XC0
#define AT91C_TCB_TC0XC0S_TIOA2 ((unsigned int) 0x3) // (TCB) TIOA2 connected to XC0
#define AT91C_TCB_TC1XC1S ((unsigned int) 0x1 << 2) // (TCB) External Clock Signal 1 Selection
#define AT91C_TCB_TC1XC1S_TCLK1 ((unsigned int) 0x0 << 2) // (TCB) TCLK1 connected to XC1
#define AT91C_TCB_TC1XC1S_NONE ((unsigned int) 0x1 << 2) // (TCB) None signal connected to XC1
#define AT91C_TCB_TC1XC1S_TIOA0 ((unsigned int) 0x2 << 2) // (TCB) TIOA0 connected to XC1
#define AT91C_TCB_TC1XC1S_TIOA2 ((unsigned int) 0x3 << 2) // (TCB) TIOA2 connected to XC1
#define AT91C_TCB_TC2XC2S ((unsigned int) 0x1 << 4) // (TCB) External Clock Signal 2 Selection
#define AT91C_TCB_TC2XC2S_TCLK2 ((unsigned int) 0x0 << 4) // (TCB) TCLK2 connected to XC2
#define AT91C_TCB_TC2XC2S_NONE ((unsigned int) 0x1 << 4) // (TCB) None signal connected to XC2
#define AT91C_TCB_TC2XC2S_TIOA0 ((unsigned int) 0x2 << 4) // (TCB) TIOA0 connected to XC2
#define AT91C_TCB_TC2XC2S_TIOA2 ((unsigned int) 0x3 << 4) // (TCB) TIOA2 connected to XC2
// *****************************************************************************
// SOFTWARE API DEFINITION FOR Peripheral Data Controller
// *****************************************************************************
typedef struct _AT91S_PDC {
AT91_REG PDC_RPR; // Receive Pointer Register
AT91_REG PDC_RCR; // Receive Counter Register
AT91_REG PDC_TPR; // Transmit Pointer Register
AT91_REG PDC_TCR; // Transmit Counter Register
} AT91S_PDC, *AT91PS_PDC;
// *****************************************************************************
// SOFTWARE API DEFINITION FOR Usart
// *****************************************************************************
typedef struct _AT91S_USART {
AT91_REG US_CR; // Control Register
AT91_REG US_MR; // Mode Register
AT91_REG US_IER; // Interrupt Enable Register
AT91_REG US_IDR; // Interrupt Disable Register
AT91_REG US_IMR; // Interrupt Mask Register
AT91_REG US_CSR; // Channel Status Register
AT91_REG US_RHR; // Receiver Holding Register
AT91_REG US_THR; // Transmitter Holding Register
AT91_REG US_BRGR; // Baud Rate Generator Register
AT91_REG US_RTOR; // Receiver Time-out Register
AT91_REG US_TTGR; // Transmitter Time-guard Register
AT91_REG Reserved0[1]; //
AT91_REG US_RPR; // Receive Pointer Register
AT91_REG US_RCR; // Receive Counter Register
AT91_REG US_TPR; // Transmit Pointer Register
AT91_REG US_TCR; // Transmit Counter Register
} AT91S_USART, *AT91PS_USART;
// -------- US_CR : (USART Offset: 0x0) Debug Unit Control Register --------
#define AT91C_US_RSTRX ((unsigned int) 0x1 << 2) // (USART) Reset Receiver
#define AT91C_US_RSTTX ((unsigned int) 0x1 << 3) // (USART) Reset Transmitter
#define AT91C_US_RXEN ((unsigned int) 0x1 << 4) // (USART) Receiver Enable
#define AT91C_US_RXDIS ((unsigned int) 0x1 << 5) // (USART) Receiver Disable
#define AT91C_US_TXEN ((unsigned int) 0x1 << 6) // (USART) Transmitter Enable
#define AT91C_US_TXDIS ((unsigned int) 0x1 << 7) // (USART) Transmitter Disable
#define AT91C_US_RSTSTA ((unsigned int) 0x1 << 8) // (USART) Reset Status Bits
#define AT91C_US_STTBRK ((unsigned int) 0x1 << 9) // (USART) Start Break
#define AT91C_US_STPBRK ((unsigned int) 0x1 << 10) // (USART) Stop Break
#define AT91C_US_STTTO ((unsigned int) 0x1 << 11) // (USART) Start Time-out
#define AT91C_US_SENDA ((unsigned int) 0x1 << 12) // (USART) Send Address
// -------- US_MR : (USART Offset: 0x4) Debug Unit Mode Register --------
#define AT91C_US_CLKS ((unsigned int) 0x3 << 4) // (USART) Clock Selection (Baud Rate generator Input Clock
#define AT91C_US_CLKS_CLOCK ((unsigned int) 0x0 << 4) // (USART) Clock
#define AT91C_US_CLKS_FDIV1 ((unsigned int) 0x1 << 4) // (USART) fdiv1
#define AT91C_US_CLKS_SLOW ((unsigned int) 0x2 << 4) // (USART) slow_clock (ARM)
#define AT91C_US_CLKS_EXT ((unsigned int) 0x3 << 4) // (USART) External (SCK)
#define AT91C_US_CHRL ((unsigned int) 0x3 << 6) // (USART) Clock Selection (Baud Rate generator Input Clock
#define AT91C_US_CHRL_5_BITS ((unsigned int) 0x0 << 6) // (USART) Character Length: 5 bits
#define AT91C_US_CHRL_6_BITS ((unsigned int) 0x1 << 6) // (USART) Character Length: 6 bits
#define AT91C_US_CHRL_7_BITS ((unsigned int) 0x2 << 6) // (USART) Character Length: 7 bits
#define AT91C_US_CHRL_8_BITS ((unsigned int) 0x3 << 6) // (USART) Character Length: 8 bits
#define AT91C_US_SYNC ((unsigned int) 0x1 << 8) // (USART) Synchronous Mode Select
#define AT91C_US_PAR ((unsigned int) 0x7 << 9) // (USART) Parity type
#define AT91C_US_PAR_EVEN ((unsigned int) 0x0 << 9) // (USART) Even Parity
#define AT91C_US_PAR_ODD ((unsigned int) 0x1 << 9) // (USART) Odd Parity
#define AT91C_US_PAR_SPACE ((unsigned int) 0x2 << 9) // (USART) Parity forced to 0 (Space)
#define AT91C_US_PAR_MARK ((unsigned int) 0x3 << 9) // (USART) Parity forced to 1 (Mark)
#define AT91C_US_PAR_NONE ((unsigned int) 0x4 << 9) // (USART) No Parity
#define AT91C_US_PAR_MULTI_DROP ((unsigned int) 0x6 << 9) // (USART) Multi-drop mode
#define AT91C_US_NBSTOP ((unsigned int) 0x3 << 12) // (USART) Number of Stop bits
#define AT91C_US_NBSTOP_1_BIT ((unsigned int) 0x0 << 12) // (USART) 1 stop bit
#define AT91C_US_NBSTOP_15_BIT ((unsigned int) 0x1 << 12) // (USART) Asynchronous (SYNC=0) 2 stop bits Synchronous (SYNC=1) 2 stop bits
#define AT91C_US_NBSTOP_2_BIT ((unsigned int) 0x2 << 12) // (USART) 2 stop bits
#define AT91C_US_CHMODE ((unsigned int) 0x3 << 14) // (USART) Channel Mode
#define AT91C_US_CHMODE_NORMAL ((unsigned int) 0x0 << 14) // (USART) Normal Mode: The USART channel operates as an RX/TX USART.
#define AT91C_US_CHMODE_AUTO ((unsigned int) 0x1 << 14) // (USART) Automatic Echo: Receiver Data Input is connected to the TXD pin.
#define AT91C_US_CHMODE_LOCAL ((unsigned int) 0x2 << 14) // (USART) Local Loopback: Transmitter Output Signal is connected to Receiver Input Signal.
#define AT91C_US_CHMODE_REMOTE ((unsigned int) 0x3 << 14) // (USART) Remote Loopback: RXD pin is internally connected to TXD pin.
#define AT91C_US_MODE9 ((unsigned int) 0x1 << 17) // (USART) 9-bit Character length
#define AT91C_US_CKLO ((unsigned int) 0x1 << 18) // (USART) Clock Output Select
// -------- US_IER : (USART Offset: 0x8) Debug Unit Interrupt Enable Register --------
#define AT91C_US_RXRDY ((unsigned int) 0x1 << 0) // (USART) RXRDY Interrupt
#define AT91C_US_TXRDY ((unsigned int) 0x1 << 1) // (USART) TXRDY Interrupt
#define AT91C_US_RXBRK ((unsigned int) 0x1 << 2) // (USART) Break Received/End of Break
#define AT91C_US_ENDRX ((unsigned int) 0x1 << 3) // (USART) End of Receive Transfer Interrupt
#define AT91C_US_ENDTX ((unsigned int) 0x1 << 4) // (USART) End of Transmit Interrupt
#define AT91C_US_OVRE ((unsigned int) 0x1 << 5) // (USART) Overrun Interrupt
#define AT91C_US_FRAME ((unsigned int) 0x1 << 6) // (USART) Framing Error Interrupt
#define AT91C_US_PARE ((unsigned int) 0x1 << 7) // (USART) Parity Error Interrupt
#define AT91C_US_TIMEOUT ((unsigned int) 0x1 << 8) // (USART) Receiver Time-out
#define AT91C_US_TXEMPTY ((unsigned int) 0x1 << 9) // (USART) TXEMPTY Interrupt
// -------- US_IDR : (USART Offset: 0xc) Debug Unit Interrupt Disable Register --------
// -------- US_IMR : (USART Offset: 0x10) Debug Unit Interrupt Mask Register --------
// -------- US_CSR : (USART Offset: 0x14) Debug Unit Channel Status Register --------
// *****************************************************************************
// SOFTWARE API DEFINITION FOR Special Function Interface
// *****************************************************************************
typedef struct _AT91S_SF {
AT91_REG SF_CIDR; // Chip ID Register
AT91_REG SF_EXID; // Chip ID Extension Register
AT91_REG SF_RSR; // Reset Status Register
AT91_REG SF_MMR; // Memory Mode Register
AT91_REG Reserved0[2]; //
AT91_REG SF_PMR; // Protect Mode Register
} AT91S_SF, *AT91PS_SF;
// -------- SF_CIDR : (SF Offset: 0x0) Chip ID Register --------
#define AT91C_SF_VERSION ((unsigned int) 0x1F << 0) // (SF) Version of the chip
#define AT91C_SF_BIT5 ((unsigned int) 0x1 << 5) // (SF) Hardwired at 0
#define AT91C_SF_BIT6 ((unsigned int) 0x1 << 6) // (SF) Hardwired at 1
#define AT91C_SF_BIT7 ((unsigned int) 0x1 << 7) // (SF) Hardwired at 0
#define AT91C_SF_NVPSIZ ((unsigned int) 0xF << 8) // (SF) Nonvolatile Program Memory Size
#define AT91C_SF_NVPSIZ_NONE ((unsigned int) 0x0 << 8) // (SF) None
#define AT91C_SF_NVPSIZ_32K ((unsigned int) 0x3 << 8) // (SF) 32K Bytes
#define AT91C_SF_NVPSIZ_64K ((unsigned int) 0x5 << 8) // (SF) 64K Bytes
#define AT91C_SF_NVPSIZ_128K ((unsigned int) 0x7 << 8) // (SF) 128K Bytes
#define AT91C_SF_NVPSIZ_256K ((unsigned int) 0x11 << 8) // (SF) 256K Bytes
#define AT91C_SF_NVDSIZ ((unsigned int) 0xF << 12) // (SF) Nonvolatile Data Memory Size
#define AT91C_SF_NVDSIZ_NONE ((unsigned int) 0x0 << 12) // (SF) None
#define AT91C_SF_VDSIZ ((unsigned int) 0xF << 16) // (SF) Volatile Data Memory Size
#define AT91C_SF_VDSIZ_NONE ((unsigned int) 0x0 << 16) // (SF) None
#define AT91C_SF_VDSIZ_1K ((unsigned int) 0x3 << 16) // (SF) 1K Bytes
#define AT91C_SF_VDSIZ_2K ((unsigned int) 0x5 << 16) // (SF) 2K Bytes
#define AT91C_SF_VDSIZ_4K ((unsigned int) 0x7 << 16) // (SF) 4K Bytes
#define AT91C_SF_VDSIZ_8K ((unsigned int) 0x11 << 16) // (SF) 8K Bytes
#define AT91C_SF_ARCH ((unsigned int) 0xFF << 20) // (SF) Chip Architecture
#define AT91C_SF_ARCH_AT91x40 ((unsigned int) 0x28 << 20) // (SF) AT91x40yyy
#define AT91C_SF_ARCH_AT91x55 ((unsigned int) 0x37 << 20) // (SF) AT91x55yyy
#define AT91C_SF_ARCH_AT91x63 ((unsigned int) 0x3F << 20) // (SF) AT91x63yyy
#define AT91C_SF_NVPTYP ((unsigned int) 0x7 << 28) // (SF) Nonvolatile Program Memory Type
#define AT91C_SF_NVPTYP_NVPTYP_M ((unsigned int) 0x1 << 28) // (SF) 'M' Series or 'F' Series
#define AT91C_SF_NVPTYP_NVPTYP_R ((unsigned int) 0x4 << 28) // (SF) 'R' Series
#define AT91C_SF_EXT ((unsigned int) 0x1 << 31) // (SF) Extension Flag
// -------- SF_RSR : (SF Offset: 0x8) Reset Status Information --------
#define AT91C_SF_RESET ((unsigned int) 0xFF << 0) // (SF) Cause of Reset
#define AT91C_SF_RESET_WD ((unsigned int) 0x35) // (SF) Internal Watchdog
#define AT91C_SF_RESET_EXT ((unsigned int) 0x6C) // (SF) External Pin
// -------- SF_MMR : (SF Offset: 0xc) Memory Mode Register --------
#define AT91C_SF_RAMWU ((unsigned int) 0x1 << 0) // (SF) Internal Extended RAM Write Detection
// -------- SF_PMR : (SF Offset: 0x18) Protection Mode Register --------
#define AT91C_SF_AIC ((unsigned int) 0x1 << 5) // (SF) AIC Protect Mode Enable
#define AT91C_SF_PMRKEY ((unsigned int) 0xFFFF << 16) // (SF) Protect Mode Register Key
// *****************************************************************************
// SOFTWARE API DEFINITION FOR External Bus Interface
// *****************************************************************************
typedef struct _AT91S_EBI {
AT91_REG EBI_CSR[8]; // Chip-select Register
AT91_REG EBI_RCR; // Remap Control Register
AT91_REG EBI_MCR; // Memory Control Register
} AT91S_EBI, *AT91PS_EBI;
// -------- EBI_CSR : (EBI Offset: 0x0) Chip Select Register --------
#define AT91C_EBI_DBW ((unsigned int) 0x3 << 0) // (EBI) Data Bus Width
#define AT91C_EBI_DBW_16 ((unsigned int) 0x1) // (EBI) 16-bit data bus width
#define AT91C_EBI_DBW_8 ((unsigned int) 0x2) // (EBI) 8-bit data bus width
#define AT91C_EBI_NWS ((unsigned int) 0x7 << 2) // (EBI) Number of wait states
#define AT91C_EBI_NWS_1 ((unsigned int) 0x0 << 2) // (EBI) 1 wait state
#define AT91C_EBI_NWS_2 ((unsigned int) 0x1 << 2) // (EBI) 2 wait state
#define AT91C_EBI_NWS_3 ((unsigned int) 0x2 << 2) // (EBI) 3 wait state
#define AT91C_EBI_NWS_4 ((unsigned int) 0x3 << 2) // (EBI) 4 wait state
#define AT91C_EBI_NWS_5 ((unsigned int) 0x4 << 2) // (EBI) 5 wait state
#define AT91C_EBI_NWS_6 ((unsigned int) 0x5 << 2) // (EBI) 6 wait state
#define AT91C_EBI_NWS_7 ((unsigned int) 0x6 << 2) // (EBI) 7 wait state
#define AT91C_EBI_NWS_8 ((unsigned int) 0x7 << 2) // (EBI) 8 wait state
#define AT91C_EBI_WSE ((unsigned int) 0x1 << 5) // (EBI) Wait State Enable
#define AT91C_EBI_PAGES ((unsigned int) 0x3 << 7) // (EBI) Pages Size
#define AT91C_EBI_PAGES_1M ((unsigned int) 0x0 << 7) // (EBI) 1M Byte
#define AT91C_EBI_PAGES_4M ((unsigned int) 0x1 << 7) // (EBI) 4M Byte
#define AT91C_EBI_PAGES_16M ((unsigned int) 0x2 << 7) // (EBI) 16M Byte
#define AT91C_EBI_PAGES_64M ((unsigned int) 0x3 << 7) // (EBI) 64M Byte
#define AT91C_EBI_TDF ((unsigned int) 0x7 << 9) // (EBI) Data Float Output Time
#define AT91C_EBI_TDF_0 ((unsigned int) 0x0 << 9) // (EBI) 1 TDF
#define AT91C_EBI_TDF_1 ((unsigned int) 0x1 << 9) // (EBI) 2 TDF
#define AT91C_EBI_TDF_2 ((unsigned int) 0x2 << 9) // (EBI) 3 TDF
#define AT91C_EBI_TDF_3 ((unsigned int) 0x3 << 9) // (EBI) 4 TDF
#define AT91C_EBI_TDF_4 ((unsigned int) 0x4 << 9) // (EBI) 5 TDF
#define AT91C_EBI_TDF_5 ((unsigned int) 0x5 << 9) // (EBI) 6 TDF
#define AT91C_EBI_TDF_6 ((unsigned int) 0x6 << 9) // (EBI) 7 TDF
#define AT91C_EBI_TDF_7 ((unsigned int) 0x7 << 9) // (EBI) 8 TDF
#define AT91C_EBI_BAT ((unsigned int) 0x1 << 12) // (EBI) Byte Access Type
#define AT91C_EBI_CSEN ((unsigned int) 0x1 << 13) // (EBI) Chip Select Enable
#define AT91C_EBI_BA ((unsigned int) 0xFFF << 20) // (EBI) Base Address
// -------- EBI_RCR : (EBI Offset: 0x20) Remap Control Register --------
#define AT91C_EBI_RCB ((unsigned int) 0x1 << 0) // (EBI) 0 = No effect. 1 = Cancels the remapping (performed at reset) of the page zero memory devices.
// -------- EBI_MCR : (EBI Offset: 0x24) Memory Control Register --------
#define AT91C_EBI_ALE ((unsigned int) 0x7 << 0) // (EBI) Address Line Enable
#define AT91C_EBI_ALE_16M ((unsigned int) 0x0) // (EBI) Valid Address Bits = A20, A21, A22, A23 Max Addressable Space = 16M Bytes Valid Chip Select=None
#define AT91C_EBI_ALE_8M ((unsigned int) 0x4) // (EBI) Valid Address Bits = A20, A21, A22 Max Addressable Space = 8M Bytes Valid Chip Select = CS4
#define AT91C_EBI_ALE_4M ((unsigned int) 0x5) // (EBI) Valid Address Bits = A20, A21 Max Addressable Space = 4M Bytes Valid Chip Select = CS4, CS5
#define AT91C_EBI_ALE_2M ((unsigned int) 0x6) // (EBI) Valid Address Bits = A20 Max Addressable Space = 2M Bytes Valid Chip Select = CS4, CS5, CS6
#define AT91C_EBI_ALE_1M ((unsigned int) 0x7) // (EBI) Valid Address Bits = None Max Addressable Space = 1M Byte Valid Chip Select = CS4, CS5, CS6, CS7
#define AT91C_EBI_DRP ((unsigned int) 0x1 << 4) // (EBI)
// *****************************************************************************
// REGISTER ADDRESS DEFINITION FOR AT91R40008
// *****************************************************************************
// ========== Register definition for AIC peripheral ==========
#define AT91C_AIC_EOICR ((AT91_REG *) 0xFFFFF130) // (AIC) End of Interrupt Command Register
#define AT91C_AIC_ICCR ((AT91_REG *) 0xFFFFF128) // (AIC) Interrupt Clear Command Register
#define AT91C_AIC_IECR ((AT91_REG *) 0xFFFFF120) // (AIC) Interrupt Enable Command Register
#define AT91C_AIC_SVR ((AT91_REG *) 0xFFFFF080) // (AIC) Source Vector egister
#define AT91C_AIC_SMR ((AT91_REG *) 0xFFFFF000) // (AIC) Source Mode egister
#define AT91C_AIC_SPU ((AT91_REG *) 0xFFFFF134) // (AIC) Spurious Vector Register
#define AT91C_AIC_FVR ((AT91_REG *) 0xFFFFF104) // (AIC) FIQ Vector Register
#define AT91C_AIC_IVR ((AT91_REG *) 0xFFFFF100) // (AIC) IRQ Vector Register
#define AT91C_AIC_ISR ((AT91_REG *) 0xFFFFF108) // (AIC) Interrupt Status Register
#define AT91C_AIC_IMR ((AT91_REG *) 0xFFFFF110) // (AIC) Interrupt Mask Register
#define AT91C_AIC_ISCR ((AT91_REG *) 0xFFFFF12C) // (AIC) Interrupt Set Command Register
#define AT91C_AIC_IPR ((AT91_REG *) 0xFFFFF10C) // (AIC) Interrupt Pending Register
#define AT91C_AIC_CISR ((AT91_REG *) 0xFFFFF114) // (AIC) Core Interrupt Status Register
#define AT91C_AIC_IDCR ((AT91_REG *) 0xFFFFF124) // (AIC) Interrupt Disable Command egister
// ========== Register definition for WD peripheral ==========
#define AT91C_WD_SR ((AT91_REG *) 0xFFFF800C) // (WD) Status Register
#define AT91C_WD_CMR ((AT91_REG *) 0xFFFF8004) // (WD) Clock Mode Register
#define AT91C_WD_CR ((AT91_REG *) 0xFFFF8008) // (WD) Control Register
#define AT91C_WD_OMR ((AT91_REG *) 0xFFFF8000) // (WD) Overflow Mode Register
// ========== Register definition for PS peripheral ==========
#define AT91C_PS_PCDR ((AT91_REG *) 0xFFFF4008) // (PS) Peripheral Clock Disable Register
#define AT91C_PS_CR ((AT91_REG *) 0xFFFF4000) // (PS) Control Register
#define AT91C_PS_PCSR ((AT91_REG *) 0xFFFF400C) // (PS) Peripheral Clock Status Register
#define AT91C_PS_PCER ((AT91_REG *) 0xFFFF4004) // (PS) Peripheral Clock Enable Register
// ========== Register definition for PIO peripheral ==========
#define AT91C_PIO_MDSR ((AT91_REG *) 0xFFFF0058) // (PIO) Multi-driver Status Register
#define AT91C_PIO_IFSR ((AT91_REG *) 0xFFFF0028) // (PIO) Input Filter Status Register
#define AT91C_PIO_IFER ((AT91_REG *) 0xFFFF0020) // (PIO) Input Filter Enable Register
#define AT91C_PIO_OSR ((AT91_REG *) 0xFFFF0018) // (PIO) Output Status Register
#define AT91C_PIO_OER ((AT91_REG *) 0xFFFF0010) // (PIO) Output Enable Register
#define AT91C_PIO_PSR ((AT91_REG *) 0xFFFF0008) // (PIO) PIO Status Register
#define AT91C_PIO_PDSR ((AT91_REG *) 0xFFFF003C) // (PIO) Pin Data Status Register
#define AT91C_PIO_CODR ((AT91_REG *) 0xFFFF0034) // (PIO) Clear Output Data Register
#define AT91C_PIO_IFDR ((AT91_REG *) 0xFFFF0024) // (PIO) Input Filter Disable Register
#define AT91C_PIO_MDER ((AT91_REG *) 0xFFFF0050) // (PIO) Multi-driver Enable Register
#define AT91C_PIO_IMR ((AT91_REG *) 0xFFFF0048) // (PIO) Interrupt Mask Register
#define AT91C_PIO_IER ((AT91_REG *) 0xFFFF0040) // (PIO) Interrupt Enable Register
#define AT91C_PIO_ODSR ((AT91_REG *) 0xFFFF0038) // (PIO) Output Data Status Register
#define AT91C_PIO_SODR ((AT91_REG *) 0xFFFF0030) // (PIO) Set Output Data Register
#define AT91C_PIO_PER ((AT91_REG *) 0xFFFF0000) // (PIO) PIO Enable Register
#define AT91C_PIO_MDDR ((AT91_REG *) 0xFFFF0054) // (PIO) Multi-driver Disable Register
#define AT91C_PIO_ISR ((AT91_REG *) 0xFFFF004C) // (PIO) Interrupt Status Register
#define AT91C_PIO_IDR ((AT91_REG *) 0xFFFF0044) // (PIO) Interrupt Disable Register
#define AT91C_PIO_PDR ((AT91_REG *) 0xFFFF0004) // (PIO) PIO Disable Register
#define AT91C_PIO_ODR ((AT91_REG *) 0xFFFF0014) // (PIO) Output Disable Registerr
// ========== Register definition for TC2 peripheral ==========
#define AT91C_TC2_IDR ((AT91_REG *) 0xFFFE00A8) // (TC2) Interrupt Disable Register
#define AT91C_TC2_SR ((AT91_REG *) 0xFFFE00A0) // (TC2) Status Register
#define AT91C_TC2_RB ((AT91_REG *) 0xFFFE0098) // (TC2) Register B
#define AT91C_TC2_CV ((AT91_REG *) 0xFFFE0090) // (TC2) Counter Value
#define AT91C_TC2_CCR ((AT91_REG *) 0xFFFE0080) // (TC2) Channel Control Register
#define AT91C_TC2_IMR ((AT91_REG *) 0xFFFE00AC) // (TC2) Interrupt Mask Register
#define AT91C_TC2_IER ((AT91_REG *) 0xFFFE00A4) // (TC2) Interrupt Enable Register
#define AT91C_TC2_RC ((AT91_REG *) 0xFFFE009C) // (TC2) Register C
#define AT91C_TC2_RA ((AT91_REG *) 0xFFFE0094) // (TC2) Register A
#define AT91C_TC2_CMR ((AT91_REG *) 0xFFFE0084) // (TC2) Channel Mode Register
// ========== Register definition for TC1 peripheral ==========
#define AT91C_TC1_IDR ((AT91_REG *) 0xFFFE0068) // (TC1) Interrupt Disable Register
#define AT91C_TC1_SR ((AT91_REG *) 0xFFFE0060) // (TC1) Status Register
#define AT91C_TC1_RB ((AT91_REG *) 0xFFFE0058) // (TC1) Register B
#define AT91C_TC1_CV ((AT91_REG *) 0xFFFE0050) // (TC1) Counter Value
#define AT91C_TC1_CCR ((AT91_REG *) 0xFFFE0040) // (TC1) Channel Control Register
#define AT91C_TC1_IMR ((AT91_REG *) 0xFFFE006C) // (TC1) Interrupt Mask Register
#define AT91C_TC1_IER ((AT91_REG *) 0xFFFE0064) // (TC1) Interrupt Enable Register
#define AT91C_TC1_RC ((AT91_REG *) 0xFFFE005C) // (TC1) Register C
#define AT91C_TC1_RA ((AT91_REG *) 0xFFFE0054) // (TC1) Register A
#define AT91C_TC1_CMR ((AT91_REG *) 0xFFFE0044) // (TC1) Channel Mode Register
// ========== Register definition for TC0 peripheral ==========
#define AT91C_TC0_IDR ((AT91_REG *) 0xFFFE0028) // (TC0) Interrupt Disable Register
#define AT91C_TC0_SR ((AT91_REG *) 0xFFFE0020) // (TC0) Status Register
#define AT91C_TC0_RB ((AT91_REG *) 0xFFFE0018) // (TC0) Register B
#define AT91C_TC0_CV ((AT91_REG *) 0xFFFE0010) // (TC0) Counter Value
#define AT91C_TC0_CCR ((AT91_REG *) 0xFFFE0000) // (TC0) Channel Control Register
#define AT91C_TC0_IMR ((AT91_REG *) 0xFFFE002C) // (TC0) Interrupt Mask Register
#define AT91C_TC0_IER ((AT91_REG *) 0xFFFE0024) // (TC0) Interrupt Enable Register
#define AT91C_TC0_RC ((AT91_REG *) 0xFFFE001C) // (TC0) Register C
#define AT91C_TC0_RA ((AT91_REG *) 0xFFFE0014) // (TC0) Register A
#define AT91C_TC0_CMR ((AT91_REG *) 0xFFFE0004) // (TC0) Channel Mode Register
// ========== Register definition for TCB0 peripheral ==========
#define AT91C_TCB0_BCR ((AT91_REG *) 0xFFFE00C0) // (TCB0) TC Block Control Register
#define AT91C_TCB0_BMR ((AT91_REG *) 0xFFFE00C4) // (TCB0) TC Block Mode Register
// ========== Register definition for PDC_US1 peripheral ==========
#define AT91C_US1_TPR ((AT91_REG *) 0xFFFC4038) // (PDC_US1) Transmit Pointer Register
#define AT91C_US1_RPR ((AT91_REG *) 0xFFFC4030) // (PDC_US1) Receive Pointer Register
#define AT91C_US1_TCR ((AT91_REG *) 0xFFFC403C) // (PDC_US1) Transmit Counter Register
#define AT91C_US1_RCR ((AT91_REG *) 0xFFFC4034) // (PDC_US1) Receive Counter Register
// ========== Register definition for US1 peripheral ==========
#define AT91C_US1_RTOR ((AT91_REG *) 0xFFFCC024) // (US1) Receiver Time-out Register
#define AT91C_US1_THR ((AT91_REG *) 0xFFFCC01C) // (US1) Transmitter Holding Register
#define AT91C_US1_CSR ((AT91_REG *) 0xFFFCC014) // (US1) Channel Status Register
#define AT91C_US1_IDR ((AT91_REG *) 0xFFFCC00C) // (US1) Interrupt Disable Register
#define AT91C_US1_MR ((AT91_REG *) 0xFFFCC004) // (US1) Mode Register
#define AT91C_US1_TTGR ((AT91_REG *) 0xFFFCC028) // (US1) Transmitter Time-guard Register
#define AT91C_US1_BRGR ((AT91_REG *) 0xFFFCC020) // (US1) Baud Rate Generator Register
#define AT91C_US1_RHR ((AT91_REG *) 0xFFFCC018) // (US1) Receiver Holding Register
#define AT91C_US1_IMR ((AT91_REG *) 0xFFFCC010) // (US1) Interrupt Mask Register
#define AT91C_US1_IER ((AT91_REG *) 0xFFFCC008) // (US1) Interrupt Enable Register
#define AT91C_US1_CR ((AT91_REG *) 0xFFFCC000) // (US1) Control Register
// ========== Register definition for PDC_US0 peripheral ==========
#define AT91C_US0_TPR ((AT91_REG *) 0xFFFC0038) // (PDC_US0) Transmit Pointer Register
#define AT91C_US0_RPR ((AT91_REG *) 0xFFFC0030) // (PDC_US0) Receive Pointer Register
#define AT91C_US0_TCR ((AT91_REG *) 0xFFFC003C) // (PDC_US0) Transmit Counter Register
#define AT91C_US0_RCR ((AT91_REG *) 0xFFFC0034) // (PDC_US0) Receive Counter Register
// ========== Register definition for US0 peripheral ==========
#define AT91C_US0_RTOR ((AT91_REG *) 0xFFFD0024) // (US0) Receiver Time-out Register
#define AT91C_US0_THR ((AT91_REG *) 0xFFFD001C) // (US0) Transmitter Holding Register
#define AT91C_US0_CSR ((AT91_REG *) 0xFFFD0014) // (US0) Channel Status Register
#define AT91C_US0_IDR ((AT91_REG *) 0xFFFD000C) // (US0) Interrupt Disable Register
#define AT91C_US0_MR ((AT91_REG *) 0xFFFD0004) // (US0) Mode Register
#define AT91C_US0_TTGR ((AT91_REG *) 0xFFFD0028) // (US0) Transmitter Time-guard Register
#define AT91C_US0_BRGR ((AT91_REG *) 0xFFFD0020) // (US0) Baud Rate Generator Register
#define AT91C_US0_RHR ((AT91_REG *) 0xFFFD0018) // (US0) Receiver Holding Register
#define AT91C_US0_IMR ((AT91_REG *) 0xFFFD0010) // (US0) Interrupt Mask Register
#define AT91C_US0_IER ((AT91_REG *) 0xFFFD0008) // (US0) Interrupt Enable Register
#define AT91C_US0_CR ((AT91_REG *) 0xFFFD0000) // (US0) Control Register
// ========== Register definition for SF peripheral ==========
#define AT91C_SF_PMR ((AT91_REG *) 0xFFF00018) // (SF) Protect Mode Register
#define AT91C_SF_RSR ((AT91_REG *) 0xFFF00008) // (SF) Reset Status Register
#define AT91C_SF_CIDR ((AT91_REG *) 0xFFF00000) // (SF) Chip ID Register
#define AT91C_SF_MMR ((AT91_REG *) 0xFFF0000C) // (SF) Memory Mode Register
#define AT91C_SF_EXID ((AT91_REG *) 0xFFF00004) // (SF) Chip ID Extension Register
// ========== Register definition for EBI peripheral ==========
#define AT91C_EBI_RCR ((AT91_REG *) 0xFFE00020) // (EBI) Remap Control Register
#define AT91C_EBI_CSR ((AT91_REG *) 0xFFE00000) // (EBI) Chip-select Register
#define AT91C_EBI_MCR ((AT91_REG *) 0xFFE00024) // (EBI) Memory Control Register
// *****************************************************************************
// PIO DEFINITIONS FOR AT91R40008
// *****************************************************************************
#define AT91C_PIO_P0 ((unsigned int) 1 << 0) // Pin Controlled by P0
#define AT91C_P0_TCLK0 ((unsigned int) AT91C_PIO_P0) // Timer 0 Clock signal
#define AT91C_PIO_P1 ((unsigned int) 1 << 1) // Pin Controlled by P1
#define AT91C_P1_TIOA0 ((unsigned int) AT91C_PIO_P1) // Timer 0 Signal A
#define AT91C_PIO_P10 ((unsigned int) 1 << 10) // Pin Controlled by P10
#define AT91C_P10_IRQ1 ((unsigned int) AT91C_PIO_P10) // External Interrupt 1
#define AT91C_PIO_P11 ((unsigned int) 1 << 11) // Pin Controlled by P11
#define AT91C_P11_IRQ2 ((unsigned int) AT91C_PIO_P11) // External Interrupt 2
#define AT91C_PIO_P12 ((unsigned int) 1 << 12) // Pin Controlled by P12
#define AT91C_P12_FIQ ((unsigned int) AT91C_PIO_P12) // Fast External Interrupt
#define AT91C_PIO_P13 ((unsigned int) 1 << 13) // Pin Controlled by P13
#define AT91C_P13_SCK0 ((unsigned int) AT91C_PIO_P13) // USART 0 Serial Clock
#define AT91C_PIO_P14 ((unsigned int) 1 << 14) // Pin Controlled by P14
#define AT91C_P14_TXD0 ((unsigned int) AT91C_PIO_P14) // USART 0 Transmit Data
#define AT91C_PIO_P15 ((unsigned int) 1 << 15) // Pin Controlled by P15
#define AT91C_P15_RXD0 ((unsigned int) AT91C_PIO_P15) // USART 0 Receive Data
#define AT91C_PIO_P16 ((unsigned int) 1 << 16) // Pin Controlled by P16
#define AT91C_PIO_P17 ((unsigned int) 1 << 17) // Pin Controlled by P17
#define AT91C_PIO_P18 ((unsigned int) 1 << 18) // Pin Controlled by P18
#define AT91C_PIO_P19 ((unsigned int) 1 << 19) // Pin Controlled by P19
#define AT91C_PIO_P2 ((unsigned int) 1 << 2) // Pin Controlled by P2
#define AT91C_P2_TIOB0 ((unsigned int) AT91C_PIO_P2) // Timer 0 Signal B
#define AT91C_PIO_P20 ((unsigned int) 1 << 20) // Pin Controlled by P20
#define AT91C_P20_SCK1 ((unsigned int) AT91C_PIO_P20) // USART 1 Serial Clock
#define AT91C_PIO_P21 ((unsigned int) 1 << 21) // Pin Controlled by P21
#define AT91C_P21_TXD1 ((unsigned int) AT91C_PIO_P21) // USART 1 Transmit Data
#define AT91C_P21_NTRI ((unsigned int) AT91C_PIO_P21) // Tri-state Mode
#define AT91C_PIO_P22 ((unsigned int) 1 << 22) // Pin Controlled by P22
#define AT91C_P22_RXD1 ((unsigned int) AT91C_PIO_P22) // USART 1 Receive Data
#define AT91C_PIO_P23 ((unsigned int) 1 << 23) // Pin Controlled by P23
#define AT91C_PIO_P24 ((unsigned int) 1 << 24) // Pin Controlled by P24
#define AT91C_P24_BMS ((unsigned int) AT91C_PIO_P24) // Boot Mode Select
#define AT91C_PIO_P25 ((unsigned int) 1 << 25) // Pin Controlled by P25
#define AT91C_P25_MCKO ((unsigned int) AT91C_PIO_P25) // Master Clock Out
#define AT91C_PIO_P26 ((unsigned int) 1 << 26) // Pin Controlled by P26
#define AT91C_P26_NCS2 ((unsigned int) AT91C_PIO_P26) // Chip Select 2
#define AT91C_PIO_P27 ((unsigned int) 1 << 27) // Pin Controlled by P27
#define AT91C_P27_NCS3 ((unsigned int) AT91C_PIO_P27) // Chip Select 3
#define AT91C_PIO_P28 ((unsigned int) 1 << 28) // Pin Controlled by P28
#define AT91C_P28_A20 ((unsigned int) AT91C_PIO_P28) // Address line A20
#define AT91C_P28_NCS7 ((unsigned int) AT91C_PIO_P28) // Chip Select 7
#define AT91C_PIO_P29 ((unsigned int) 1 << 29) // Pin Controlled by P29
#define AT91C_P29_A21 ((unsigned int) AT91C_PIO_P29) // Address line A21
#define AT91C_P29_NCS6 ((unsigned int) AT91C_PIO_P29) // Chip Select 6
#define AT91C_PIO_P3 ((unsigned int) 1 << 3) // Pin Controlled by P3
#define AT91C_P3_TCLK1 ((unsigned int) AT91C_PIO_P3) // Timer 1 Clock signal
#define AT91C_PIO_P30 ((unsigned int) 1 << 30) // Pin Controlled by P30
#define AT91C_P30_A22 ((unsigned int) AT91C_PIO_P30) // Address line A22
#define AT91C_P30_NCS5 ((unsigned int) AT91C_PIO_P30) // Chip Select 5
#define AT91C_PIO_P31 ((unsigned int) 1 << 31) // Pin Controlled by P31
#define AT91C_P31_A23 ((unsigned int) AT91C_PIO_P31) // Address line A23
#define AT91C_P31_NCS4 ((unsigned int) AT91C_PIO_P31) // Chip Select 4
#define AT91C_PIO_P4 ((unsigned int) 1 << 4) // Pin Controlled by P4
#define AT91C_P4_TIOA1 ((unsigned int) AT91C_PIO_P4) // Timer 1 Signal A
#define AT91C_PIO_P5 ((unsigned int) 1 << 5) // Pin Controlled by P5
#define AT91C_P5_TIOB1 ((unsigned int) AT91C_PIO_P5) // Timer 1 Signal B
#define AT91C_PIO_P6 ((unsigned int) 1 << 6) // Pin Controlled by P6
#define AT91C_P6_TCLK2 ((unsigned int) AT91C_PIO_P6) // Timer 2 Clock signal
#define AT91C_PIO_P7 ((unsigned int) 1 << 7) // Pin Controlled by P7
#define AT91C_P7_TIOA2 ((unsigned int) AT91C_PIO_P7) // Timer 2 Signal A
#define AT91C_PIO_P8 ((unsigned int) 1 << 8) // Pin Controlled by P8
#define AT91C_P8_TIOB2 ((unsigned int) AT91C_PIO_P8) // Timer 2 Signal B
#define AT91C_PIO_P9 ((unsigned int) 1 << 9) // Pin Controlled by P9
#define AT91C_P9_IRQ0 ((unsigned int) AT91C_PIO_P9) // External Interrupt 0
// *****************************************************************************
// PERIPHERAL ID DEFINITIONS FOR AT91R40008
// *****************************************************************************
#define AT91C_ID_FIQ ((unsigned int) 0) // Advanced Interrupt Controller (FIQ)
#define AT91C_ID_SYS ((unsigned int) 1) // SWI
#define AT91C_ID_US0 ((unsigned int) 2) // USART 0
#define AT91C_ID_US1 ((unsigned int) 3) // USART 1
#define AT91C_ID_TC0 ((unsigned int) 4) // Timer Counter 0
#define AT91C_ID_TC1 ((unsigned int) 5) // Timer Counter 1
#define AT91C_ID_TC2 ((unsigned int) 6) // Timer Counter 2
#define AT91C_ID_WD ((unsigned int) 7) // Watchdog Timer
#define AT91C_ID_PIO ((unsigned int) 8) // Parallel IO Controller
#define AT91C_ID_IRQ0 ((unsigned int) 16) // Advanced Interrupt Controller (IRQ0)
#define AT91C_ID_IRQ1 ((unsigned int) 17) // Advanced Interrupt Controller (IRQ1)
#define AT91C_ID_IRQ2 ((unsigned int) 18) // Advanced Interrupt Controller (IRQ2)
// *****************************************************************************
// BASE ADDRESS DEFINITIONS FOR AT91R40008
// *****************************************************************************
#define AT91C_BASE_AIC ((AT91PS_AIC) 0xFFFFF000) // (AIC) Base Address
#define AT91C_BASE_WD ((AT91PS_WD) 0xFFFF8000) // (WD) Base Address
#define AT91C_BASE_PS ((AT91PS_PS) 0xFFFF4000) // (PS) Base Address
#define AT91C_BASE_PIO ((AT91PS_PIO) 0xFFFF0000) // (PIO) Base Address
#define AT91C_BASE_TC2 ((AT91PS_TC) 0xFFFE0080) // (TC2) Base Address
#define AT91C_BASE_TC1 ((AT91PS_TC) 0xFFFE0040) // (TC1) Base Address
#define AT91C_BASE_TC0 ((AT91PS_TC) 0xFFFE0000) // (TC0) Base Address
#define AT91C_BASE_TCB0 ((AT91PS_TCB) 0xFFFE0000) // (TCB0) Base Address
#define AT91C_BASE_PDC_US1 ((AT91PS_PDC) 0xFFFC4030) // (PDC_US1) Base Address
#define AT91C_BASE_US1 ((AT91PS_USART) 0xFFFCC000) // (US1) Base Address
#define AT91C_BASE_PDC_US0 ((AT91PS_PDC) 0xFFFC0030) // (PDC_US0) Base Address
#define AT91C_BASE_US0 ((AT91PS_USART) 0xFFFD0000) // (US0) Base Address
#define AT91C_BASE_SF ((AT91PS_SF) 0xFFF00000) // (SF) Base Address
#define AT91C_BASE_EBI ((AT91PS_EBI) 0xFFE00000) // (EBI) Base Address
// *****************************************************************************
// MEMORY MAPPING DEFINITIONS FOR AT91R40008
// *****************************************************************************
#define AT91C_SRAM_BEFORE_REMAP ((char *) 0x00300000) // Internal SRAM before remap base address
#define AT91C_SRAM_BEFORE_REMAP_SIZE ((unsigned int) 0x00040000) // Internal SRAM before remap size in byte (256 Kbyte)
#define AT91C_SRAM_AFTER_REMAP ((char *) 0x00000000) // Internal SRAM after remap base address
#define AT91C_SRAM_AFTER_REMAP_SIZE ((unsigned int) 0x00040000) // Internal SRAM after remap size in byte (256 Kbyte)
#endif

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@ -1,24 +0,0 @@
[SETUP]
CpuVendor=Atmel
CpuChip=AT91R40807
FlashVendor=Atmel
FlashChip=AT49BV/F1614A
RamAddress=$00000000
RamSupport=1
FlashAddress=$01000000
FlashWidth=16
FlashChipsPerSector=1
LittleEndian=0
SectStart=0
SectEnd=38
AutoErase=0
AutoVerify=1
CpuEndian=LITTLE
SimCount=3
MemoryCount=0
ProgramFile=E:\temp\embesttest\Demo\ARM7_AT91R40008_GCC_Embest\rtosdemo.hex
UploadFile=c:\EB40_Lower.bin
Format=Intel Hex
Sim3=EBI_RCR:$00000001
Sim2=EBI_CSR1:$02002122
Sim1=EBI_CSR0:$01002539

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@ -1,79 +0,0 @@
/*
FreeRTOS.org V4.2.0 - Copyright (C) 2003-2007 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
See http://www.FreeRTOS.org for documentation, latest information, license
and contact details. Please ensure to read the configuration and relevant
port sections of the online documentation.
***************************************************************************
*/
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
#include <AT91R40008.h>
#define configFLASH_SPEED_NSEC 100 /* External flash access speed (for ROM builds) */
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
*----------------------------------------------------------*/
#define configUSE_PREEMPTION 1
#define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 0
#define configCPU_CLOCK_HZ ( ( unsigned portLONG ) 66000000 ) /* = 66.000MHz clk gen */
#define configTICK_RATE_HZ ( ( portTickType ) 1000 )
#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 5 )
#define configMINIMAL_STACK_SIZE ( ( unsigned portSHORT ) 128 )
#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 25 * 1024 ) )
#define configMAX_TASK_NAME_LEN ( 16 )
#define configUSE_TRACE_FACILITY 0
#define configUSE_16_BIT_TICKS 0
#define configIDLE_SHOULD_YIELD 1
/* Co-routine definitions. */
#define configUSE_CO_ROUTINES 0
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
/* Set the following definitions to 1 to include the API function, or zero
to exclude the API function. */
#define INCLUDE_vTaskPrioritySet 1
#define INCLUDE_uxTaskPriorityGet 1
#define INCLUDE_vTaskDelete 1
#define INCLUDE_vTaskCleanUpResources 0
#define INCLUDE_vTaskSuspend 1
#define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelay 1
#endif /* FREERTOS_CONFIG_H */

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@ -1,99 +0,0 @@
# FreeRTOS.org V4.2.0 - Copyright (C) 2003-2007 Richard Barry.
#
# This file is part of the FreeRTOS.org distribution.
#
# FreeRTOS.org is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 2 of the License, or
# (at your option) any later version.
#
# FreeRTOS.org is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with FreeRTOS.org; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
#
# A special exception to the GPL can be applied should you wish to distribute
# a combined work that includes FreeRTOS.org, without being obliged to provide
# the source code for any proprietary components. See the licensing section
# of http://www.FreeRTOS.org for full details of how and when the exception
# can be applied.
#
# ***************************************************************************
# See http://www.FreeRTOS.org for documentation, latest information, license
# and contact details. Please ensure to read the configuration and relevant
# port sections of the online documentation.
# ***************************************************************************
CC=arm-elf-gcc
OBJCOPY=arm-elf-objcopy
ARCH=arm-elf-ar
CRT0=boot.s
#
# CFLAGS common to both the THUMB and ARM mode builds
#
CFLAGS=-Wall -D $(RUN_MODE) -D GCC_AT91FR40008 -I. -I../../Source/include \
-I../Common/include $(DEBUG) -mcpu=arm7tdmi -T$(LDSCRIPT) \
-Wcast-align $(OPTIM) -fomit-frame-pointer
ifeq ($(USE_THUMB_MODE),YES)
CFLAGS += -mthumb-interwork -D THUMB_INTERWORK
THUMB_FLAGS=-mthumb
endif
LINKER_FLAGS=-Xlinker -ortosdemo.elf -Xlinker -M -Xlinker -Map=rtosdemo.map
#
# Source files that can be built to THUMB mode.
#
THUMB_SRC = \
main.c \
serial/serial.c \
ParTest/ParTest.c \
../Common/Minimal/integer.c \
../Common/Minimal/flash.c \
../Common/Minimal/PollQ.c \
../Common/Minimal/comtest.c \
../Common/Minimal/flop.c \
../Common/Minimal/semtest.c \
../Common/Minimal/dynamic.c \
../Common/Minimal/BlockQ.c \
../../Source/tasks.c \
../../Source/queue.c \
../../Source/list.c \
../../Source/portable/MemMang/heap_2.c \
../../Source/portable/GCC/ARM7_AT91FR40008/port.c
#
# Source files that must be built to ARM mode.
#
ARM_SRC = \
../../Source/portable/GCC/ARM7_AT91FR40008/portISR.c \
serial/serialISR.c
#
# Define all object files.
#
ARM_OBJ = $(ARM_SRC:.c=.o)
THUMB_OBJ = $(THUMB_SRC:.c=.o)
rtosdemo.hex : rtosdemo.elf
$(OBJCOPY) rtosdemo.elf -O ihex rtosdemo.hex
rtosdemo.elf : $(ARM_OBJ) $(THUMB_OBJ) $(CRT0) Makefile
$(CC) $(CFLAGS) $(ARM_OBJ) $(THUMB_OBJ) -nostartfiles $(CRT0) $(LINKER_FLAGS)
$(THUMB_OBJ) : %.o : %.c $(LDSCRIPT) Makefile
$(CC) -c $(THUMB_FLAGS) $(CFLAGS) $< -o $@
$(ARM_OBJ) : %.o : %.c $(LDSCRIPT) Makefile
$(CC) -c $(CFLAGS) $< -o $@
clean :
touch Makefile

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@ -1,120 +0,0 @@
/*
FreeRTOS.org V4.2.0 - Copyright (C) 2003-2007 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
See http://www.FreeRTOS.org for documentation, latest information, license
and contact details. Please ensure to read the configuration and relevant
port sections of the online documentation.
***************************************************************************
*/
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "portable.h"
/* Demo app includes. */
#include "partest.h"
/* Hardware specific definitions. */
#include "AT91R40008.h"
#include "pio.h"
#include "aic.h"
#define partstNUM_LEDS ( 8 )
#define partstALL_OUTPUTS_OFF ( ( unsigned portLONG ) ~(0xFFFFFFFF << partstNUM_LEDS) )
static unsigned portLONG ulLEDReg;
/*-----------------------------------------------------------
* Simple parallel port IO routines.
*-----------------------------------------------------------*/
static void SetLeds (unsigned int leds)
{
unsigned portLONG ulPIOSetReg, ulPIOClearReg;
/* LEDs are grouped in different port bits: P3-P6 and P16-P19.
A port bit set to '0' turns an LED on, '1' turns it off. */
ulPIOSetReg = ( (leds & 0xF) << 16 ) | ( (leds & 0xF0) >> 1 );
ulPIOClearReg = (~ulPIOSetReg) & 0x000F0078;
AT91C_BASE_PIO->PIO_SODR = ulPIOSetReg;
AT91C_BASE_PIO->PIO_CODR = ulPIOClearReg;
}
/*-----------------------------------------------------------*/
void vParTestInitialise( void )
{
/* This is performed from main() as the io bits are shared with other setup
functions. Ensure the outputs are off to start. */
ulLEDReg = partstALL_OUTPUTS_OFF;
/* Enable clock to PIO... */
AT91C_BASE_PS->PS_PCER = AT91C_PS_PIO;
/* Enable all 8 LEDs and the four switches to be controlled by PIO... */
AT91C_BASE_PIO->PIO_PER = P3 | P4 | P5 | P6 | P16 | P17 | P18 | P19 | P1 | P2 | P9 | P12;
/* Configure all LED PIO lines for output... */
AT91C_BASE_PIO->PIO_OER = P3 | P4 | P5 | P6 | P16 | P17 | P18 | P19;
/* Configure all switch PIO lines for input... */
AT91C_BASE_PIO->PIO_ODR = P1 | P2 | P9 | P12;
/* Set initial state of LEDs. */
SetLeds( ulLEDReg );
}
/*-----------------------------------------------------------*/
void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )
{
/* Switch an LED on or off as requested. */
if (uxLED < partstNUM_LEDS)
{
if( xValue )
{
ulLEDReg &= ~(1 << uxLED);
}
else
{
ulLEDReg |= (1 << uxLED);
}
SetLeds( ulLEDReg );
}
}
/*-----------------------------------------------------------*/
void vParTestToggleLED( unsigned portBASE_TYPE uxLED )
{
/* Toggle the state of the requested LED. */
if (uxLED < partstNUM_LEDS)
{
ulLEDReg ^= ( 1 << uxLED );
SetLeds( ulLEDReg );
}
}

View file

@ -1,81 +0,0 @@
//*----------------------------------------------------------------------------
//* ATMEL Microcontroller Software Support - ROUSSET -
//*----------------------------------------------------------------------------
//* The software is delivered "AS IS" without warranty or condition of any
//* kind, either express, implied or statutory. This includes without
//* limitation any warranty or condition with respect to merchantability or
//* fitness for any particular purpose, or against the infringements of
//* intellectual property rights of others.
//*----------------------------------------------------------------------------
//* File Name : aic.h
//* Object : Advanced Interrupt Controller Definition File.
//*
//* 1.0 01/04/00 JCZ : Creation
//*----------------------------------------------------------------------------
#ifndef aic_h
#define aic_h
//#include "periph/stdc/std_c.h"
/*-----------------------------------------*/
/* AIC User Interface Structure Definition */
/*-----------------------------------------*/
typedef struct
{
at91_reg AIC_SMR[32] ; /* Source Mode Register */
at91_reg AIC_SVR[32] ; /* Source Vector Register */
at91_reg AIC_IVR ; /* IRQ Vector Register */
at91_reg AIC_FVR ; /* FIQ Vector Register */
at91_reg AIC_ISR ; /* Interrupt Status Register */
at91_reg AIC_IPR ; /* Interrupt Pending Register */
at91_reg AIC_IMR ; /* Interrupt Mask Register */
at91_reg AIC_CISR ; /* Core Interrupt Status Register */
at91_reg reserved0 ;
at91_reg reserved1 ;
at91_reg AIC_IECR ; /* Interrupt Enable Command Register */
at91_reg AIC_IDCR ; /* Interrupt Disable Command Register */
at91_reg AIC_ICCR ; /* Interrupt Clear Command Register */
at91_reg AIC_ISCR ; /* Interrupt Set Command Register */
at91_reg AIC_EOICR ; /* End of Interrupt Command Register */
at91_reg AIC_SPU ; /* Spurious Vector Register */
} StructAIC ;
/*--------------------------------------------*/
/* AIC_SMR[]: Interrupt Source Mode Registers */
/*--------------------------------------------*/
#define AIC_PRIOR 0x07 /* Priority */
#define AIC_SRCTYPE 0x60 /* Source Type Definition */
/* Internal Interrupts */
#define AIC_SRCTYPE_INT_LEVEL_SENSITIVE 0x00 /* Level Sensitive */
#define AIC_SRCTYPE_INT_EDGE_TRIGGERED 0x20 /* Edge Triggered */
/* External Interrupts */
#define AIC_SRCTYPE_EXT_LOW_LEVEL 0x00 /* Low Level */
#define AIC_SRCTYPE_EXT_NEGATIVE_EDGE 0x20 /* Negative Edge */
#define AIC_SRCTYPE_EXT_HIGH_LEVEL 0x40 /* High Level */
#define AIC_SRCTYPE_EXT_POSITIVE_EDGE 0x60 /* Positive Edge */
/*------------------------------------*/
/* AIC_ISR: Interrupt Status Register */
/*------------------------------------*/
#define AIC_IRQID 0x1F /* Current source interrupt */
/*------------------------------------------*/
/* AIC_CISR: Interrupt Core Status Register */
/*------------------------------------------*/
#define AIC_NFIQ 0x01 /* Core FIQ Status */
#define AIC_NIRQ 0x02 /* Core IRQ Status */
/*-------------------------------*/
/* Advanced Interrupt Controller */
/*-------------------------------*/
#define AIC_BASE ((StructAIC *)0xFFFFF000)
#endif /* aic_h */

View file

@ -1,48 +0,0 @@
MEMORY
{
ram : ORIGIN = 0x00000000, LENGTH = 256K
}
__stack_end__ = 0x00000000 + 256K - 4;
SECTIONS
{
. = 0;
startup : { *(.startup)} >ram
prog :
{
*(.text)
*(.rodata)
*(.rodata*)
*(.glue_7)
*(.glue_7t)
} >ram
__end_of_text__ = .;
.data :
{
__data_beg__ = .;
__data_beg_src__ = __end_of_text__;
*(.data)
__data_end__ = .;
} >ram
.bss :
{
__bss_beg__ = .;
*(.bss)
} >ram
/* Align here to ensure that the .bss section occupies space up to
_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections. */
. = ALIGN(32 / 8);
}
. = ALIGN(32 / 8);
_end = .;
_bss_end__ = . ; __bss_end__ = . ; __end__ = . ;
PROVIDE (end = .);

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@ -1,49 +0,0 @@
MEMORY
{
flash : ORIGIN = 0x00000000, LENGTH = 2048K
ram : ORIGIN = 0x00300000, LENGTH = 256K
}
__stack_end__ = 0x00300000 + 256K - 4;
SECTIONS
{
. = 0;
startup : { *(.startup)} >flash
prog :
{
*(.text)
*(.rodata)
*(.rodata*)
*(.glue_7)
*(.glue_7t)
} >flash
__end_of_text__ = .;
.data :
{
__data_beg__ = .;
__data_beg_src__ = __end_of_text__;
*(.data)
__data_end__ = .;
} >ram AT>flash
.bss :
{
__bss_beg__ = .;
*(.bss)
} >ram
/* Align here to ensure that the .bss section occupies space up to
_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections. */
. = ALIGN(32 / 8);
}
. = ALIGN(32 / 8);
_end = .;
_bss_end__ = . ; __bss_end__ = . ; __end__ = . ;
PROVIDE (end = .);

View file

@ -1,157 +0,0 @@
/* Sample initialization file */
.extern main
.extern exit
.text
.code 32
.align 0
.extern __bss_beg__
.extern __bss_end__
.extern __stack_end__
.extern __data_beg__
.extern __data_end__
.extern __data+beg_src__
.global start
.global endless_loop
/* Stack Sizes */
.set UND_STACK_SIZE, 0x00000004
.set ABT_STACK_SIZE, 0x00000004
.set FIQ_STACK_SIZE, 0x00000004
.set IRQ_STACK_SIZE, 0X00000400
.set SVC_STACK_SIZE, 0x00000400
/* Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs */
.set MODE_USR, 0x10 /* User Mode */
.set MODE_FIQ, 0x11 /* FIQ Mode */
.set MODE_IRQ, 0x12 /* IRQ Mode */
.set MODE_SVC, 0x13 /* Supervisor Mode */
.set MODE_ABT, 0x17 /* Abort Mode */
.set MODE_UND, 0x1B /* Undefined Mode */
.set MODE_SYS, 0x1F /* System Mode */
.equ I_BIT, 0x80 /* when I bit is set, IRQ is disabled */
.equ F_BIT, 0x40 /* when F bit is set, FIQ is disabled */
start:
_start:
_mainCRTStartup:
/* Setup a stack for each mode - note that this only sets up a usable stack
for system/user, SWI and IRQ modes. Also each mode is setup with
interrupts initially disabled. */
ldr r0, .LC6
msr CPSR_c, #MODE_UND|I_BIT|F_BIT /* Undefined Instruction Mode */
mov sp, r0
sub r0, r0, #UND_STACK_SIZE
msr CPSR_c, #MODE_ABT|I_BIT|F_BIT /* Abort Mode */
mov sp, r0
sub r0, r0, #ABT_STACK_SIZE
msr CPSR_c, #MODE_FIQ|I_BIT|F_BIT /* FIQ Mode */
mov sp, r0
sub r0, r0, #FIQ_STACK_SIZE
msr CPSR_c, #MODE_IRQ|I_BIT|F_BIT /* IRQ Mode */
mov sp, r0
sub r0, r0, #IRQ_STACK_SIZE
msr CPSR_c, #MODE_SVC|I_BIT|F_BIT /* Supervisor Mode */
mov sp, r0
sub r0, r0, #SVC_STACK_SIZE
msr CPSR_c, #MODE_SYS|I_BIT|F_BIT /* System Mode */
mov sp, r0
/* We want to start in supervisor mode. Operation will switch to system
mode when the first task starts. */
msr CPSR_c, #MODE_SVC|I_BIT|F_BIT
/* Clear BSS. */
mov a2, #0 /* Fill value */
mov fp, a2 /* Null frame pointer */
mov r7, a2 /* Null frame pointer for Thumb */
ldr r1, .LC1 /* Start of memory block */
ldr r3, .LC2 /* End of memory block */
subs r3, r3, r1 /* Length of block */
beq .end_clear_loop
mov r2, #0
.clear_loop:
strb r2, [r1], #1
subs r3, r3, #1
bgt .clear_loop
.end_clear_loop:
/* Initialise data. */
ldr r1, .LC3 /* Start of memory block */
ldr r2, .LC4 /* End of memory block */
ldr r3, .LC5
subs r3, r3, r1 /* Length of block */
beq .end_set_loop
.set_loop:
ldrb r4, [r2], #1
strb r4, [r1], #1
subs r3, r3, #1
bgt .set_loop
.end_set_loop:
mov r0, #0 /* no arguments */
mov r1, #0 /* no argv either */
bl main
endless_loop:
b endless_loop
.align 0
.LC1:
.word __bss_beg__
.LC2:
.word __bss_end__
.LC3:
.word __data_beg__
.LC4:
.word __data_beg_src__
.LC5:
.word __data_end__
.LC6:
.word __stack_end__
/* Setup vector table. Note that undf, pabt, dabt, fiq just execute
a null loop. */
.section .startup,"ax"
.code 32
.align 0
b _start /* reset - _start */
ldr pc, _undf /* undefined - _undf */
ldr pc, _swi /* SWI - _swi */
ldr pc, _pabt /* program abort - _pabt */
ldr pc, _dabt /* data abort - _dabt */
nop /* reserved */
ldr pc, [pc,#-0xF20] /* IRQ - read the AIC */
ldr pc, _fiq /* FIQ - _fiq */
_undf: .word __undf /* undefined */
_swi: .word vPortYieldProcessor /* SWI */
_pabt: .word __pabt /* program abort */
_dabt: .word __dabt /* data abort */
_fiq: .word __fiq /* FIQ */
__undf: b . /* undefined */
__pabt: b . /* program abort */
__dabt: b . /* data abort */
__fiq: b . /* FIQ */

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@ -1,121 +0,0 @@
//*-----------------------------------------------------------------------------
//* ATMEL Microcontroller Software Support - ROUSSET -
//*-----------------------------------------------------------------------------
//* The software is delivered "AS IS" without warranty or condition of any
//* kind, either express, implied or statutory. This includes without
//* limitation any warranty or condition with respect to merchantability or
//* fitness for any particular purpose, or against the infringements of
//* intellectual property rights of others.
//*-----------------------------------------------------------------------------
//* File Name : ebi.h
//* Object : External Bus Interface Definition File
//* Translator : ARM Software Development Toolkit V2.11a
//*
//* 1.0 03/11/97 JCZ : Creation
//* 2.0 21/10/98 JCZ : Clean up
//*-----------------------------------------------------------------------------
#ifndef ebi_h
#define ebi_h
/*----------------------------------------*/
/* Memory Controller Interface Definition */
/*----------------------------------------*/
typedef struct
{
at91_reg EBI_CSR[8] ; /* Chip Select Register */
at91_reg EBI_RCR ; /* Remap Control Register */
at91_reg EBI_MCR ; /* Memory Control Register */
} StructEBI ;
/*-----------------------*/
/* Chip Select Registers */
/*-----------------------*/
/* Data Bus Width */
#define DataBus16 (1<<0)
#define DataBus8 (2<<0)
#define DBW (3<<0)
/* Number of Wait States */
#define B_NWS 2
#define WaitState1 (0<<B_NWS)
#define WaitState2 (1<<B_NWS)
#define WaitState3 (2<<B_NWS)
#define WaitState4 (3<<B_NWS)
#define WaitState5 (4<<B_NWS)
#define WaitState6 (5<<B_NWS)
#define WaitState7 (6<<B_NWS)
#define WaitState8 (7<<B_NWS)
#define NWS (7<<B_NWS)
/* Wait State Enable */
#define WaitStateDisable (0<<5)
#define WaitStateEnable (1<<5)
#define WSE (1<<5)
/* Page size */
#define PageSize1M (0<<7)
#define PageSize4M (1<<7)
#define PageSize16M (2<<7)
#define PageSize64M (3<<7)
#define PAGES (3<<7)
/* Number of Data Float Output Time Clock Cycle */
#define B_TDF 9
#define tDF_0cycle (0<<B_TDF)
#define tDF_1cycle (1<<B_TDF)
#define tDF_2cycle (2<<B_TDF)
#define tDF_3cycle (3<<B_TDF)
#define tDF_4cycle (4<<B_TDF)
#define tDF_5cycle (5<<B_TDF)
#define tDF_6cycle (6<<B_TDF)
#define tDF_7cycle (7<<B_TDF)
#define TDF (7<<B_TDF)
/* Byte Access Type */
#define ByteWriteAccessType (0<<12)
#define ByteSelectAccessType (1<<12)
#define BAT 1<<12)
/* Chip Select Enable */
#define CSEnable (1<<13)
#define CSDisable (0<<13)
#define CSE (1<<13)
#define BA ((u_int)(0xFFF)<<20)
/*-------------------------*/
/* Memory Control Register */
/*-------------------------*/
/* Address Line Enable */
#define ALE (7<<0)
#define BankSize16M (0<<0)
#define BankSize8M (4<<0)
#define BankSize4M (5<<0)
#define BankSize2M (6<<0)
#define BankSize1M (7<<0)
/* Data Read Protocol */
#define StandardReadProtocol (0<<4)
#define EarlyReadProtocol (1<<4)
#define DRP (1<<4)
/*------------------------*/
/* Remap Control Register */
/*------------------------*/
#define RCB (1<<0)
/*--------------------------------*/
/* Device Dependancies Definition */
/*--------------------------------*/
#ifdef AT91M40400
/* External Bus Interface User Interface BAse Address */
#define EBI_BASE ((StructEBI *) 0xFFE00000)
#endif
#endif /* ebi_h */

View file

@ -1,469 +0,0 @@
/*
FreeRTOS.org V4.2.0 - Copyright (C) 2003-2007 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
See http://www.FreeRTOS.org for documentation, latest information, license
and contact details. Please ensure to read the configuration and relevant
port sections of the online documentation.
***************************************************************************
*/
/*
NOTE : Tasks run in system mode and the scheduler runs in Supervisor mode.
The processor MUST be in supervisor mode when vTaskStartScheduler is
called. The demo applications included in the FreeRTOS.org download switch
to supervisor mode prior to main being called. If you are not using one of
these demo application projects then ensure Supervisor mode is used.
*/
/*
* Creates all the demo application tasks, then starts the scheduler. The WEB
* documentation provides more details of the demo application tasks.
*
* Main.c also creates a task called "Check". This only executes every three
* seconds but has the highest priority so is guaranteed to get processor time.
* Its main function is to check that all the other tasks are still operational.
* Each task (other than the "flash" tasks) maintains a unique count that is
* incremented each time the task successfully completes its function. Should
* any error occur within such a task the count is permanently halted. The
* check task inspects the count of each task to ensure it has changed since
* the last time the check task executed. If all the count variables have
* changed all the tasks are still executing error free, and the check task
* toggles the onboard LED. Should any task contain an error at any time
* the LED toggle rate will change from 3 seconds to 500ms.
*
* To check the operation of the memory allocator the check task also
* dynamically creates a task before delaying, and deletes it again when it
* wakes. If memory cannot be allocated for the new task the call to xTaskCreate
* will fail and an error is signalled. The dynamically created task itself
* allocates and frees memory just to give the allocator a bit more exercise.
*
*/
/* Standard includes. */
#include <stdlib.h>
#include <string.h>
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "task.h"
/* Demo application includes. */
#include "partest.h"
#include "flash.h"
#include "integer.h"
#include "PollQ.h"
#include "comtest2.h"
#include "semtest.h"
#include "flop.h"
#include "dynamic.h"
#include "BlockQ.h"
#include "serial.h"
/* Hardware specific definitions. */
#include "aic.h"
#include "ebi.h"
/*-----------------------------------------------------------*/
/* Constants for the ComTest tasks. */
#define mainCOM_TEST_BAUD_RATE ( ( unsigned portLONG ) 115200 )
#define mainCOM_TEST_LED ( 5 )
/* Priorities for the demo application tasks. */
#define mainLED_TASK_PRIORITY ( tskIDLE_PRIORITY + 3 )
#define mainCOM_TEST_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define mainCHECK_TASK_PRIORITY ( tskIDLE_PRIORITY + 4 )
#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1 )
#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2 )
/* The rate at which the on board LED will toggle when there is/is not an
error. */
#define mainNO_ERROR_FLASH_PERIOD ( ( portTickType ) 3000 / portTICK_RATE_MS )
#define mainERROR_FLASH_PERIOD ( ( portTickType ) 500 / portTICK_RATE_MS )
#define mainON_BOARD_LED_BIT ( ( unsigned portLONG ) 7 )
/* Constants used by the vMemCheckTask() task. */
#define mainCOUNT_INITIAL_VALUE ( ( unsigned portLONG ) 0 )
#define mainNO_TASK ( 0 )
/* The size of the memory blocks allocated by the vMemCheckTask() task. */
#define mainMEM_CHECK_SIZE_1 ( ( size_t ) 51 )
#define mainMEM_CHECK_SIZE_2 ( ( size_t ) 52 )
#define mainMEM_CHECK_SIZE_3 ( ( size_t ) 151 )
#define MAX_WAIT_STATES 8
static const unsigned portLONG ululCSRWaitValues[ MAX_WAIT_STATES + 1 ] =
{
WaitState1,/* There is no "zero wait state" value, so use one wait state */
WaitState1,
WaitState2,
WaitState3,
WaitState4,
WaitState5,
WaitState6,
WaitState7,
WaitState8
};
/*-----------------------------------------------------------*/
/*
* Checks that all the demo application tasks are still executing without error
* - as described at the top of the file.
*/
static portLONG prvCheckOtherTasksAreStillRunning( unsigned portLONG ulMemCheckTaskCount );
/*
* The task that executes at the highest priority and calls
* prvCheckOtherTasksAreStillRunning(). See the description at the top
* of the file.
*/
static void vErrorChecks( void *pvParameters );
/*
* Dynamically created and deleted during each cycle of the vErrorChecks()
* task. This is done to check the operation of the memory allocator.
* See the top of vErrorChecks for more details.
*/
static void vMemCheckTask( void *pvParameters );
/*
* Configure the processor for use with the Olimex demo board. This includes
* setup for the I/O, system clock, and access timings.
*/
static void prvSetupHardware( void );
/*-----------------------------------------------------------*/
/*
* Starts all the other tasks, then starts the scheduler.
*/
int main( void )
{
/* Setup the hardware for use with the Olimex demo board. */
prvSetupHardware();
/* Start the demo/test application tasks. */
vStartIntegerMathTasks( tskIDLE_PRIORITY );
vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainCOM_TEST_BAUD_RATE, mainCOM_TEST_LED );
vStartLEDFlashTasks( mainLED_TASK_PRIORITY );
vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );
vStartMathTasks( tskIDLE_PRIORITY );
vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );
vStartDynamicPriorityTasks();
vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );
/* Start the check task - which is defined in this file. */
xTaskCreate( vErrorChecks, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );
/* Now all the tasks have been started - start the scheduler.
NOTE : Tasks run in system mode and the scheduler runs in Supervisor mode.
The processor MUST be in supervisor mode when vTaskStartScheduler is
called. The demo applications included in the FreeRTOS.org download switch
to supervisor mode prior to main being called. If you are not using one of
these demo application projects then ensure Supervisor mode is used here. */
vTaskStartScheduler();
/* Should never reach here! */
return 0;
}
/*-----------------------------------------------------------*/
static void vErrorChecks( void *pvParameters )
{
portTickType xDelayPeriod = mainNO_ERROR_FLASH_PERIOD;
unsigned portLONG ulMemCheckTaskRunningCount;
xTaskHandle xCreatedTask;
/* Cycle for ever, delaying then checking all the other tasks are still
operating without error. If an error is detected then the delay period
is decreased from mainNO_ERROR_FLASH_PERIOD to mainERROR_FLASH_PERIOD so
the on board LED flash rate will increase.
In addition to the standard tests the memory allocator is tested through
the dynamic creation and deletion of a task each cycle. Each time the
task is created memory must be allocated for its stack. When the task is
deleted this memory is returned to the heap. If the task cannot be created
then it is likely that the memory allocation failed. */
for( ;; )
{
/* Reset xCreatedTask. This is modified by the task about to be
created so we can tell if it is executing correctly or not. */
xCreatedTask = mainNO_TASK;
/* Dynamically create a task - passing ulMemCheckTaskRunningCount as a
parameter. */
ulMemCheckTaskRunningCount = mainCOUNT_INITIAL_VALUE;
if( xTaskCreate( vMemCheckTask, ( signed portCHAR * ) "MEM_CHECK", configMINIMAL_STACK_SIZE, ( void * ) &ulMemCheckTaskRunningCount, tskIDLE_PRIORITY, &xCreatedTask ) != pdPASS )
{
/* Could not create the task - we have probably run out of heap. */
xDelayPeriod = mainERROR_FLASH_PERIOD;
}
/* Delay until it is time to execute again. */
vTaskDelay( xDelayPeriod );
/* Delete the dynamically created task. */
if( xCreatedTask != mainNO_TASK )
{
vTaskDelete( xCreatedTask );
}
/* Check all the standard demo application tasks are executing without
error. ulMemCheckTaskRunningCount is checked to ensure it was
modified by the task just deleted. */
if( prvCheckOtherTasksAreStillRunning( ulMemCheckTaskRunningCount ) != pdPASS )
{
/* An error has been detected in one of the tasks - flash faster. */
xDelayPeriod = mainERROR_FLASH_PERIOD;
}
/* The toggle rate of the LED depends on how long this task delays for.
An error reduces the delay period and so increases the toggle rate. */
vParTestToggleLED( mainON_BOARD_LED_BIT );
}
}
/*-----------------------------------------------------------*/
static void prvSetupHardware( void )
{
portLONG lCount;
#ifdef RUN_FROM_ROM
{
portFLOAT nsecsPerClockTick;
portLONG lNumWaitStates;
unsigned portLONG ulCSRWaitValue;
/* We are compiling to run from ROM (either on-chip or off-chip flash).
Leave the RAM/flash mapped the way they are on reset
(flash @ 0x00000000, RAM @ 0x00300000), and set up the
proper flash wait states (starts out at the maximum number
of wait states on reset, so we should be able to reduce it).
Most of this code will probably get removed by the compiler
if optimization is enabled, since these calculations are
based on constants. But the compiler should still produce
a correct wait state register value. */
nsecsPerClockTick = ( portFLOAT ) 1000000000 / configCPU_CLOCK_HZ;
lNumWaitStates = ( portLONG )( ( configFLASH_SPEED_NSEC / nsecsPerClockTick ) + 0.5 ) - 1;
if( lNumWaitStates < 0 )
{
lNumWaitStates = 0;
}
if( lNumWaitStates > MAX_WAIT_STATES )
{
lNumWaitStates = MAX_WAIT_STATES;
}
ulCSRWaitValue = ululCSRWaitValues[ lNumWaitStates ];
ulCSRWaitValue = WaitState5;
AT91C_BASE_EBI->EBI_CSR[ 0 ] = ulCSRWaitValue | DataBus16 | WaitStateEnable
| PageSize1M | tDF_0cycle
| ByteWriteAccessType | CSEnable
| 0x00000000 /* Base Address */;
}
#else /* else we are compiling to run from on-chip RAM */
{
/* If compiling to run from RAM, we expect the on-chip RAM to already
be mapped at 0x00000000. This is typically done with an initialization
script for the JTAG emulator you are using to download and run the
demo application. So there is nothing to do here in this case. */
}
#endif
/* Disable all interrupts at the AIC level initially... */
AT91C_BASE_AIC->AIC_IDCR = 0xFFFFFFFF;
/* Set all SVR and SMR entries to default values (start with a clean slate)... */
for( lCount = 0; lCount < 32; lCount++ )
{
AT91C_BASE_AIC->AIC_SVR[ lCount ] = (unsigned long) 0;
AT91C_BASE_AIC->AIC_SMR[ lCount ] = AIC_SRCTYPE_INT_EDGE_TRIGGERED;
}
/* Disable clocks to all peripherals initially... */
AT91C_BASE_PS->PS_PCDR = 0xFFFFFFFF;
/* Clear all interrupts at the AIC level initially... */
AT91C_BASE_AIC->AIC_ICCR = 0xFFFFFFFF;
/* Perform 8 "End Of Interrupt" cmds to make sure AIC will not Lock out
nIRQ */
for( lCount = 0; lCount < 8; lCount++ )
{
AT91C_BASE_AIC->AIC_EOICR = 0;
}
/* Initialise LED outputs. */
vParTestInitialise();
}
/*-----------------------------------------------------------*/
static portLONG prvCheckOtherTasksAreStillRunning( unsigned portLONG ulMemCheckTaskCount )
{
portLONG lReturn = ( portLONG ) pdPASS;
/* Check all the demo tasks (other than the flash tasks) to ensure
that they are all still running, and that none of them have detected
an error. */
if( xAreIntegerMathsTaskStillRunning() != pdTRUE )
{
lReturn = ( portLONG ) pdFAIL;
}
if( xAreComTestTasksStillRunning() != pdTRUE )
{
lReturn = ( portLONG ) pdFAIL;
}
if( xArePollingQueuesStillRunning() != pdTRUE )
{
lReturn = ( portLONG ) pdFAIL;
}
if( xAreMathsTaskStillRunning() != pdTRUE )
{
lReturn = ( portLONG ) pdFAIL;
}
if( xAreSemaphoreTasksStillRunning() != pdTRUE )
{
lReturn = ( portLONG ) pdFAIL;
}
if( xAreDynamicPriorityTasksStillRunning() != pdTRUE )
{
lReturn = ( portLONG ) pdFAIL;
}
if( xAreBlockingQueuesStillRunning() != pdTRUE )
{
lReturn = ( portLONG ) pdFAIL;
}
if( ulMemCheckTaskCount == mainCOUNT_INITIAL_VALUE )
{
/* The vMemCheckTask did not increment the counter - it must
have failed. */
lReturn = ( portLONG ) pdFAIL;
}
return lReturn;
}
/*-----------------------------------------------------------*/
static void vMemCheckTask( void *pvParameters )
{
unsigned portLONG *pulMemCheckTaskRunningCounter;
void *pvMem1, *pvMem2, *pvMem3;
static portLONG lErrorOccurred = pdFALSE;
/* This task is dynamically created then deleted during each cycle of the
vErrorChecks task to check the operation of the memory allocator. Each time
the task is created memory is allocated for the stack and TCB. Each time
the task is deleted this memory is returned to the heap. This task itself
exercises the allocator by allocating and freeing blocks.
The task executes at the idle priority so does not require a delay.
pulMemCheckTaskRunningCounter is incremented each cycle to indicate to the
vErrorChecks() task that this task is still executing without error. */
pulMemCheckTaskRunningCounter = ( unsigned portLONG * ) pvParameters;
for( ;; )
{
if( lErrorOccurred == pdFALSE )
{
/* We have never seen an error so increment the counter. */
( *pulMemCheckTaskRunningCounter )++;
}
else
{
/* There has been an error so reset the counter so the check task
can tell that an error occurred. */
*pulMemCheckTaskRunningCounter = mainCOUNT_INITIAL_VALUE;
}
/* Allocate some memory - just to give the allocator some extra
exercise. This has to be in a critical section to ensure the
task does not get deleted while it has memory allocated. */
vTaskSuspendAll();
{
pvMem1 = pvPortMalloc( mainMEM_CHECK_SIZE_1 );
if( pvMem1 == NULL )
{
lErrorOccurred = pdTRUE;
}
else
{
memset( pvMem1, 0xaa, mainMEM_CHECK_SIZE_1 );
vPortFree( pvMem1 );
}
}
xTaskResumeAll();
/* Again - with a different size block. */
vTaskSuspendAll();
{
pvMem2 = pvPortMalloc( mainMEM_CHECK_SIZE_2 );
if( pvMem2 == NULL )
{
lErrorOccurred = pdTRUE;
}
else
{
memset( pvMem2, 0xaa, mainMEM_CHECK_SIZE_2 );
vPortFree( pvMem2 );
}
}
xTaskResumeAll();
/* Again - with a different size block. */
vTaskSuspendAll();
{
pvMem3 = pvPortMalloc( mainMEM_CHECK_SIZE_3 );
if( pvMem3 == NULL )
{
lErrorOccurred = pdTRUE;
}
else
{
memset( pvMem3, 0xaa, mainMEM_CHECK_SIZE_3 );
vPortFree( pvMem3 );
}
}
xTaskResumeAll();
}
}

View file

@ -1,149 +0,0 @@
//*---------------------------------------------------------------------------
//* ATMEL Microcontroller Software Support - ROUSSET -
//*---------------------------------------------------------------------------
//* The software is delivered "AS IS" without warranty or condition of any
//* kind, either express, implied or statutory. This includes without
//* limitation any warranty or condition with respect to merchantability or
//* fitness for any particular purpose, or against the infringements of
//* intellectual property rights of others.
//*-----------------------------------------------------------------------------
//* File Name : pio.h
//* Object : Parallel I/O Definition File
//* Translator : ARM Software Development Toolkit V2.11a
//*
//* 1.0 20/10/97 JCZ : Creation
//* 2.0 21/10/98 JCZ : Clean up
//*---------------------------------------------------------------------------
#ifndef pio_h
#define pio_h
/*---------------------------------------------*/
/* Parallel I/O Interface Structure Definition */
/*---------------------------------------------*/
typedef struct
{
at91_reg PIO_PER ; /* PIO Enable Register */
at91_reg PIO_PDR ; /* PIO Disable Register */
at91_reg PIO_PSR ; /* PIO Status Register */
at91_reg Reserved0 ;
at91_reg PIO_OER ; /* Output Enable Register */
at91_reg PIO_ODR ; /* Output Disable Register */
at91_reg PIO_OSR ; /* Output Status Register */
at91_reg Reserved1 ;
at91_reg PIO_IFER ; /* Input Filter Enable Register */
at91_reg PIO_IFDR ; /* Input Filter Disable Register */
at91_reg PIO_IFSR ; /* Input Filter Status Register */
at91_reg Reserved2 ;
at91_reg PIO_SODR ; /* Set Output Data Register */
at91_reg PIO_CODR ; /* Clear Output Data Register */
at91_reg PIO_ODSR ; /* Output Data Status Register */
at91_reg PIO_PDSR ; /* Pin Data Status Register */
at91_reg PIO_IER ; /* Interrupt Enable Register */
at91_reg PIO_IDR ; /* Interrupt Disable Register */
at91_reg PIO_IMR ; /* Interrupt Mask Register */
at91_reg PIO_ISR ; /* Interrupt Status Register */
} StructPIO ;
/*-----------------------------*/
/* PIO Handler type definition */
/*-----------------------------*/
//typedef void (*TypePIOHandler) ( StructPIO *pio_pt, u_int pio_mask ) ;
/*--------------------------------*/
/* Device Dependancies Definition */
/*--------------------------------*/
/* Number of PIO Controller */
#define NB_PIO_CTRL 1
/* Base Address */
#define PIO_BASE ((StructPIO *) 0xFFFF0000 )
/* Number of PIO Lines */
#define NB_PIO 32
/* Parallel I/O Bits Definition */
#define P0 (1<<0)
#define P1 (1<<1)
#define P2 (1<<2)
#define P3 (1<<3)
#define P4 (1<<4)
#define P5 (1<<5)
#define P6 (1<<6)
#define P7 (1<<7)
#define P8 (1<<8)
#define P9 (1<<9)
#define P10 (1<<10)
#define P11 (1<<11)
#define P12 (1<<12)
#define P13 (1<<13)
#define P14 (1<<14)
#define P15 (1<<15)
#define P16 (1<<16)
#define P17 (1<<17)
#define P18 (1<<18)
#define P19 (1<<19)
#define P20 (1<<20)
#define P21 (1<<21)
#define P22 (1<<22)
#define P23 (1<<23)
#define P24 (1<<24)
#define P25 (1<<25)
#define P26 (1<<26)
#define P27 (1<<27)
#define P28 (1<<28)
#define P29 (1<<29)
#define P30 (1<<30)
#define P31 (1<<31)
/* PIO Multiplexing Definition */
/* There is only one PIO Controller */
#define PIO_CTRL 0
#define PIO_TC0 PIO_CTRL
#define TCLK0 P0
#define TIOA0 P1
#define TIOB0 P2
#define PIN_TC0 (TIOA0|TIOB0|TCLK0)
#define PIO_TC1 PIO_CTRL
#define TCLK1 P3
#define TIOA1 P4
#define TIOB1 P5
#define PIN_TC1 (TIOA1|TIOB1|TCLK1)
#define PIO_TC2 PIO_CTRL
#define TCLK2 P6
#define TIOA2 P7
#define TIOB2 P8
#define PIN_TC2 (TIOA2|TIOB2|TCLK2)
#define PIO_EXT_IRQ PIO_CTRL
#define PIN_IRQ0 P9
#define PIN_IRQ1 P10
#define PIN_IRQ2 P11
#define PIN_FIQ P12
#define PIO_USART0 PIO_CTRL
#define SCK0 P13
#define TXD0 P14
#define RXD0 P15
#define PIN_USART0 (SCK0|TXD0|RXD0)
#define PIO_USART1 PIO_CTRL
#define SCK1 P20
#define TXD1 P21
#define RXD1 P22
#define PIN_USART1 (SCK1|TXD1|RXD1)
#define MCKO P25
#define CS2 P26
#define CS3 P27
#define CS4 P31
#define CS5 P30
#define CS6 P29
#define CS7 P28
#endif /* pio_h */

View file

@ -1,6 +0,0 @@
set USE_THUMB_MODE=NO
set DEBUG=-g
set OPTIM=-O0
set RUN_MODE=RUN_FROM_RAM
set LDSCRIPT=atmel-ram.ld
make

View file

@ -1,6 +0,0 @@
set USE_THUMB_MODE=YES
set DEBUG=-g
set OPTIM=-O0
set RUN_MODE=RUN_FROM_RAM
set LDSCRIPT=atmel-ram.ld
make

View file

@ -1,6 +0,0 @@
set USE_THUMB_MODE=NO
set DEBUG=-g
set OPTIM=-O2
set RUN_MODE=RUN_FROM_ROM
set LDSCRIPT=atmel-rom.ld
make

View file

@ -1,6 +0,0 @@
set USE_THUMB_MODE=YES
set DEBUG=-g
set OPTIM=-O2
set RUN_MODE=RUN_FROM_ROM
set LDSCRIPT=atmel-rom.ld
make

View file

@ -1,228 +0,0 @@
/*
FreeRTOS.org V4.2.0 - Copyright (C) 2003-2007 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
See http://www.FreeRTOS.org for documentation, latest information, license
and contact details. Please ensure to read the configuration and relevant
port sections of the online documentation.
***************************************************************************
*/
/*
BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR USART0.
This file contains all the serial port components that can be compiled to
either ARM or THUMB mode. Components that must be compiled to ARM mode are
contained in serialISR.c.
*/
/* Standard includes. */
#include <stdlib.h>
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "queue.h"
#include "task.h"
/* Demo application includes. */
#include "serial.h"
#include "AT91R40008.h"
#include "usart.h"
#include "pio.h"
#include "aic.h"
/*-----------------------------------------------------------*/
/* Constants to setup and access the UART. */
#define portUSART0_AIC_CHANNEL ( ( unsigned portLONG ) 2 )
#define serINVALID_QUEUE ( ( xQueueHandle ) 0 )
#define serHANDLE ( ( xComPortHandle ) 1 )
#define serNO_BLOCK ( ( portTickType ) 0 )
/*-----------------------------------------------------------*/
/* Queues used to hold received characters, and characters waiting to be
transmitted. */
static xQueueHandle xRxedChars;
static xQueueHandle xCharsForTx;
/*-----------------------------------------------------------*/
/*
* The queues are created in serialISR.c as they are used from the ISR.
* Obtain references to the queues and THRE Empty flag.
*/
extern void vSerialISRCreateQueues( unsigned portBASE_TYPE uxQueueLength, xQueueHandle *pxRxedChars, xQueueHandle *pxCharsForTx );
/*-----------------------------------------------------------*/
xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
{
unsigned portLONG ulSpeed;
unsigned portLONG ulCD;
xComPortHandle xReturn = serHANDLE;
extern void ( vUART_ISR )( void );
/* The queues are used in the serial ISR routine, so are created from
serialISR.c (which is always compiled to ARM mode. */
vSerialISRCreateQueues( uxQueueLength, &xRxedChars, &xCharsForTx );
if(
( xRxedChars != serINVALID_QUEUE ) &&
( xCharsForTx != serINVALID_QUEUE ) &&
( ulWantedBaud != ( unsigned portLONG ) 0 )
)
{
portENTER_CRITICAL();
{
/* Enable clock to USART0... */
AT91C_BASE_PS->PS_PCER = AT91C_PS_US0;
/* Disable all USART0 interrupt sources to begin... */
AT91C_BASE_US0->US_IDR = 0xFFFFFFFF;
/* Reset various status bits (just in case)... */
AT91C_BASE_US0->US_CR = US_RSTSTA;
AT91C_BASE_PIO->PIO_PDR = TXD0 | RXD0; /* Enable RXD and TXD pins */
AT91C_BASE_US0->US_CR = US_RSTRX | US_RSTTX | US_RXDIS | US_TXDIS;
/* Clear Transmit and Receive Counters */
AT91C_BASE_US0->US_RCR = 0;
AT91C_BASE_US0->US_TCR = 0;
/* Input clock to baud rate generator is MCK */
ulSpeed = configCPU_CLOCK_HZ * 10;
ulSpeed = ulSpeed / 16;
ulSpeed = ulSpeed / ulWantedBaud;
/* compute the error */
ulCD = ulSpeed / 10;
if ((ulSpeed - (ulCD * 10)) >= 5)
ulCD++;
/* Define the baud rate divisor register */
AT91C_BASE_US0->US_BRGR = ulCD;
/* Define the USART mode */
AT91C_BASE_US0->US_MR = US_CLKS_MCK | US_CHRL_8 | US_PAR_NO | US_NBSTOP_1 | US_CHMODE_NORMAL;
/* Write the Timeguard Register */
AT91C_BASE_US0->US_TTGR = 0;
/* Setup the interrupt for USART0.
Store interrupt handler function address in USART0 vector register... */
AT91C_BASE_AIC->AIC_SVR[ portUSART0_AIC_CHANNEL ] = (unsigned long)vUART_ISR;
/* USART0 interrupt level-sensitive, priority 1... */
AT91C_BASE_AIC->AIC_SMR[ portUSART0_AIC_CHANNEL ] = AIC_SRCTYPE_INT_LEVEL_SENSITIVE | 1;
/* Clear some pending USART0 interrupts (just in case)... */
AT91C_BASE_US0->US_CR = US_RSTSTA;
/* Enable USART0 interrupt sources (but not Tx for now)... */
AT91C_BASE_US0->US_IER = US_RXRDY;
/* Enable USART0 interrupts in the AIC... */
AT91C_BASE_AIC->AIC_IECR = ( 1 << portUSART0_AIC_CHANNEL );
/* Enable receiver and transmitter... */
AT91C_BASE_US0->US_CR = US_RXEN | US_TXEN;
}
portEXIT_CRITICAL();
}
else
{
xReturn = ( xComPortHandle ) 0;
}
return xReturn;
}
/*-----------------------------------------------------------*/
signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )
{
/* The port handle is not required as this driver only supports UART0. */
( void ) pxPort;
/* Get the next character from the buffer. Return false if no characters
are available, or arrive before xBlockTime expires. */
if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
{
return pdTRUE;
}
else
{
return pdFALSE;
}
}
/*-----------------------------------------------------------*/
void vSerialPutString( xComPortHandle pxPort, const signed portCHAR * const pcString, unsigned portSHORT usStringLength )
{
signed portCHAR *pxNext;
/* NOTE: This implementation does not handle the queue being full as no
block time is used! */
/* The port handle is not required as this driver only supports UART0. */
( void ) pxPort;
/* Send each character in the string, one at a time. */
pxNext = ( signed portCHAR * ) pcString;
while( *pxNext )
{
xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );
pxNext++;
}
}
/*-----------------------------------------------------------*/
signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
{
/* Place the character in the queue of characters to be transmitted. */
if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )
{
return pdFAIL;
}
/* Turn on the Tx interrupt so the ISR will remove the character from the
queue and send it. This does not need to be in a critical section as
if the interrupt has already removed the character the next interrupt
will simply turn off the Tx interrupt again. */
AT91C_BASE_US0->US_IER = US_TXRDY;
return pdPASS;
}
/*-----------------------------------------------------------*/
void vSerialClose( xComPortHandle xPort )
{
/* Not supported as not required by the demo application. */
}
/*-----------------------------------------------------------*/

View file

@ -1,144 +0,0 @@
/*
FreeRTOS.org V4.2.0 - Copyright (C) 2003-2007 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
See http://www.FreeRTOS.org for documentation, latest information, license
and contact details. Please ensure to read the configuration and relevant
port sections of the online documentation.
***************************************************************************
*/
/*
BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR USART0.
This file contains all the serial port components that must be compiled
to ARM mode. The components that can be compiled to either ARM or THUMB
mode are contained in serial.c.
*/
/* Standard includes. */
#include <stdlib.h>
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "queue.h"
#include "task.h"
/* Demo application includes. */
#include "serial.h"
#include "AT91R40008.h"
#include "usart.h"
/*-----------------------------------------------------------*/
/* Constant to access the AIC. */
#define serCLEAR_AIC_INTERRUPT ( ( unsigned portLONG ) 0 )
/* Constants to determine the ISR source. */
#define serSOURCE_THRE ( ( unsigned portCHAR ) 0x02 )
#define serSOURCE_RX_TIMEOUT ( ( unsigned portCHAR ) 0x0c )
#define serSOURCE_ERROR ( ( unsigned portCHAR ) 0x06 )
#define serSOURCE_RX ( ( unsigned portCHAR ) 0x04 )
#define serINTERRUPT_SOURCE_MASK ( ( unsigned portLONG ) (US_RXRDY | US_TXRDY | US_RXBRK | US_OVRE | US_FRAME | US_PARE) )
/* Queues used to hold received characters, and characters waiting to be
transmitted. */
static xQueueHandle xRxedChars;
static xQueueHandle xCharsForTx;
/*-----------------------------------------------------------*/
/* UART0 interrupt service routine. This can cause a context switch so MUST
be declared "naked". */
void vUART_ISR( void ) __attribute__ ((naked));
/*-----------------------------------------------------------*/
void vSerialISRCreateQueues( unsigned portBASE_TYPE uxQueueLength, xQueueHandle *pxRxedChars, xQueueHandle *pxCharsForTx )
{
/* Create the queues used to hold Rx and Tx characters. */
xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
/* Pass back a reference to the queues so the serial API file can
post/receive characters. */
*pxRxedChars = xRxedChars;
*pxCharsForTx = xCharsForTx;
}
/*-----------------------------------------------------------*/
void vUART_ISR( void )
{
/* This ISR can cause a context switch, so the first statement must be a
call to the portENTER_SWITCHING_ISR() macro. This must be BEFORE any
variable declarations. */
portENTER_SWITCHING_ISR();
/* Now we can declare the local variables. */
signed portCHAR cChar;
portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByRx = pdFALSE;
unsigned portLONG ulStatus;
/* What caused the interrupt? */
ulStatus = AT91C_BASE_US0->US_CSR & AT91C_BASE_US0->US_IMR;
if (ulStatus & US_TXRDY)
{
/* The interrupt was caused by the THR becoming empty. Are there any
more characters to transmit? */
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWokenByTx ) == pdTRUE )
{
/* A character was retrieved from the queue so can be sent to the
THR now. */
AT91C_BASE_US0->US_THR = cChar;
}
else
{
/* Queue empty, nothing to send so turn off the Tx interrupt. */
AT91C_BASE_US0->US_IDR = US_TXRDY;
}
}
if (ulStatus & US_RXRDY)
{
/* The interrupt was caused by the receiver getting data. */
cChar = AT91C_BASE_US0->US_RHR;
if (xQueueSendFromISR(xRxedChars, &cChar, pdFALSE))
{
xTaskWokenByRx = pdTRUE;
}
}
// Acknowledge the interrupt at AIC level...
AT91C_BASE_AIC->AIC_EOICR = serCLEAR_AIC_INTERRUPT;
/* Exit the ISR. If a task was woken by either a character being received
or transmitted then a context switch will occur. */
portEXIT_SWITCHING_ISR( ( xTaskWokenByTx || xTaskWokenByRx ) );
}
/*-----------------------------------------------------------*/

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@ -1,301 +0,0 @@
//*----------------------------------------------------------------------------
//* ATMEL Microcontroller Software Support - ROUSSET -
//*----------------------------------------------------------------------------
//* The software is delivered "AS IS" without warranty or condition of any
//* kind, either express, implied or statutory. This includes without
//* limitation any warranty or condition with respect to merchantability or
//* fitness for any particular purpose, or against the infringements of
//* intellectual property rights of others.
//*-----------------------------------------------------------------------------
//* File Name : tc.h
//* Object : Timer Counter Header File
//*
//* 1.0 01/04/00 JCZ : Creation
//* 1.0 01/09/00 JPP : modification TC_BEEVT, TC_BEEVT_SET_OUTPUT,
//* TC_BEEVT_CLEAR_OUTPUT, TC_BEEVT_TOGGLE_OUTPUT
//*-----------------------------------------------------------------------------
#ifndef tc_h
#define tc_h
//#include "periph/stdc/std_c.h"
//#include "periph/pio/lib_pio.h"
/*-------------------------------------------*/
/* Timer User Interface Structure Definition */
/*-------------------------------------------*/
typedef struct
{
at91_reg TC_CCR ; /* Control Register */
at91_reg TC_CMR ; /* Mode Register */
at91_reg Reserved0 ;
at91_reg Reserved1 ;
at91_reg TC_CV ; /* Counter value */
at91_reg TC_RA ; /* Register A */
at91_reg TC_RB ; /* Register B */
at91_reg TC_RC ; /* Register C */
at91_reg TC_SR ; /* Status Register */
at91_reg TC_IER ; /* Interrupt Enable Register */
at91_reg TC_IDR ; /* Interrupt Disable Register */
at91_reg TC_IMR ; /* Interrupt Mask Register */
at91_reg Reserved2 ;
at91_reg Reserved3 ;
at91_reg Reserved4 ;
at91_reg Reserved5 ;
} StructTC ;
#define NB_TC_CHANNEL 3
typedef struct
{
StructTC TC[NB_TC_CHANNEL] ;
at91_reg TC_BCR ; /* Block Control Register */
at91_reg TC_BMR ; /* Block Mode Register */
} StructTCBlock ;
/*--------------------------------------------------------*/
/* TC_CCR: Timer Counter Control Register Bits Definition */
/*--------------------------------------------------------*/
#define TC_CLKEN 0x1
#define TC_CLKDIS 0x2
#define TC_SWTRG 0x4
/*---------------------------------------------------------------*/
/* TC_CMR: Timer Counter Channel Mode Register Bits Definition */
/*---------------------------------------------------------------*/
/*-----------------*/
/* Clock Selection */
/*-----------------*/
#define TC_CLKS 0x7
#define TC_CLKS_MCK2 0x0
#define TC_CLKS_MCK8 0x1
#define TC_CLKS_MCK32 0x2
#define TC_CLKS_MCK128 0x3
#define TC_CLKS_MCK1024 0x4
#define TC_CLKS_SLCK 0x4
#define TC_CLKS_XC0 0x5
#define TC_CLKS_XC1 0x6
#define TC_CLKS_XC2 0x7
/*-----------------*/
/* Clock Inversion */
/*-----------------*/
#define TC_CLKI 0x8
/*------------------------*/
/* Burst Signal Selection */
/*------------------------*/
#define TC_BURST 0x30
#define TC_BURST_NONE 0x0
#define TC_BUSRT_XC0 0x10
#define TC_BURST_XC1 0x20
#define TC_BURST_XC2 0x30
/*------------------------------------------------------*/
/* Capture Mode : Counter Clock Stopped with RB Loading */
/*------------------------------------------------------*/
#define TC_LDBSTOP 0x40
/*-------------------------------------------------------*/
/* Waveform Mode : Counter Clock Stopped with RC Compare */
/*-------------------------------------------------------*/
#define TC_CPCSTOP 0x40
/*-------------------------------------------------------*/
/* Capture Mode : Counter Clock Disabled with RB Loading */
/*--------------------------------------------------------*/
#define TC_LDBDIS 0x80
/*--------------------------------------------------------*/
/* Waveform Mode : Counter Clock Disabled with RC Compare */
/*--------------------------------------------------------*/
#define TC_CPCDIS 0x80
/*------------------------------------------------*/
/* Capture Mode : External Trigger Edge Selection */
/*------------------------------------------------*/
#define TC_ETRGEDG 0x300
#define TC_ETRGEDG_EDGE_NONE 0x0
#define TC_ETRGEDG_RISING_EDGE 0x100
#define TC_ETRGEDG_FALLING_EDGE 0x200
#define TC_ETRGEDG_BOTH_EDGE 0x300
/*-----------------------------------------------*/
/* Waveform Mode : External Event Edge Selection */
/*-----------------------------------------------*/
#define TC_EEVTEDG 0x300
#define TC_EEVTEDG_EDGE_NONE 0x0
#define TC_EEVTEDG_RISING_EDGE 0x100
#define TC_EEVTEDG_FALLING_EDGE 0x200
#define TC_EEVTEDG_BOTH_EDGE 0x300
/*--------------------------------------------------------*/
/* Capture Mode : TIOA or TIOB External Trigger Selection */
/*--------------------------------------------------------*/
#define TC_ABETRG 0x400
#define TC_ABETRG_TIOB 0x0
#define TC_ABETRG_TIOA 0x400
/*------------------------------------------*/
/* Waveform Mode : External Event Selection */
/*------------------------------------------*/
#define TC_EEVT 0xC00
#define TC_EEVT_TIOB 0x0
#define TC_EEVT_XC0 0x400
#define TC_EEVT_XC1 0x800
#define TC_EEVT_XC2 0xC00
/*--------------------------------------------------*/
/* Waveform Mode : Enable Trigger on External Event */
/*--------------------------------------------------*/
#define TC_ENETRG 0x1000
/*----------------------------------*/
/* RC Compare Enable Trigger Enable */
/*----------------------------------*/
#define TC_CPCTRG 0x4000
/*----------------*/
/* Mode Selection */
/*----------------*/
#define TC_WAVE 0x8000
#define TC_CAPT 0x0
/*-------------------------------------*/
/* Capture Mode : RA Loading Selection */
/*-------------------------------------*/
#define TC_LDRA 0x30000
#define TC_LDRA_EDGE_NONE 0x0
#define TC_LDRA_RISING_EDGE 0x10000
#define TC_LDRA_FALLING_EDGE 0x20000
#define TC_LDRA_BOTH_EDGE 0x30000
/*-------------------------------------------*/
/* Waveform Mode : RA Compare Effect on TIOA */
/*-------------------------------------------*/
#define TC_ACPA 0x30000
#define TC_ACPA_OUTPUT_NONE 0x0
#define TC_ACPA_SET_OUTPUT 0x10000
#define TC_ACPA_CLEAR_OUTPUT 0x20000
#define TC_ACPA_TOGGLE_OUTPUT 0x30000
/*-------------------------------------*/
/* Capture Mode : RB Loading Selection */
/*-------------------------------------*/
#define TC_LDRB 0xC0000
#define TC_LDRB_EDGE_NONE 0x0
#define TC_LDRB_RISING_EDGE 0x40000
#define TC_LDRB_FALLING_EDGE 0x80000
#define TC_LDRB_BOTH_EDGE 0xC0000
/*-------------------------------------------*/
/* Waveform Mode : RC Compare Effect on TIOA */
/*-------------------------------------------*/
#define TC_ACPC 0xC0000
#define TC_ACPC_OUTPUT_NONE 0x0
#define TC_ACPC_SET_OUTPUT 0x40000
#define TC_ACPC_CLEAR_OUTPUT 0x80000
#define TC_ACPC_TOGGLE_OUTPUT 0xC0000
/*-----------------------------------------------*/
/* Waveform Mode : External Event Effect on TIOA */
/*-----------------------------------------------*/
#define TC_AEEVT 0x300000
#define TC_AEEVT_OUTPUT_NONE 0x0
#define TC_AEEVT_SET_OUTPUT 0x100000
#define TC_AEEVT_CLEAR_OUTPUT 0x200000
#define TC_AEEVT_TOGGLE_OUTPUT 0x300000
/*-------------------------------------------------*/
/* Waveform Mode : Software Trigger Effect on TIOA */
/*-------------------------------------------------*/
#define TC_ASWTRG 0xC00000
#define TC_ASWTRG_OUTPUT_NONE 0x0
#define TC_ASWTRG_SET_OUTPUT 0x400000
#define TC_ASWTRG_CLEAR_OUTPUT 0x800000
#define TC_ASWTRG_TOGGLE_OUTPUT 0xC00000
/*-------------------------------------------*/
/* Waveform Mode : RB Compare Effect on TIOB */
/*-------------------------------------------*/
#define TC_BCPB 0x1000000
#define TC_BCPB_OUTPUT_NONE 0x0
#define TC_BCPB_SET_OUTPUT 0x1000000
#define TC_BCPB_CLEAR_OUTPUT 0x2000000
#define TC_BCPB_TOGGLE_OUTPUT 0x3000000
/*-------------------------------------------*/
/* Waveform Mode : RC Compare Effect on TIOB */
/*-------------------------------------------*/
#define TC_BCPC 0xC000000
#define TC_BCPC_OUTPUT_NONE 0x0
#define TC_BCPC_SET_OUTPUT 0x4000000
#define TC_BCPC_CLEAR_OUTPUT 0x8000000
#define TC_BCPC_TOGGLE_OUTPUT 0xC000000
/*-----------------------------------------------*/
/* Waveform Mode : External Event Effect on TIOB */
/*-----------------------------------------------*/
#define TC_BEEVT 0x30000000 //* bit 29-28
#define TC_BEEVT_OUTPUT_NONE 0x0
#define TC_BEEVT_SET_OUTPUT 0x10000000 //* bit 29-28 01
#define TC_BEEVT_CLEAR_OUTPUT 0x20000000 //* bit 29-28 10
#define TC_BEEVT_TOGGLE_OUTPUT 0x30000000 //* bit 29-28 11
/*- -----------------------------------------------*/
/* Waveform Mode : Software Trigger Effect on TIOB */
/*-------------------------------------------------*/
#define TC_BSWTRG 0xC0000000
#define TC_BSWTRG_OUTPUT_NONE 0x0
#define TC_BSWTRG_SET_OUTPUT 0x40000000
#define TC_BSWTRG_CLEAR_OUTPUT 0x80000000
#define TC_BSWTRG_TOGGLE_OUTPUT 0xC0000000
/*------------------------------------------------------*/
/* TC_SR: Timer Counter Status Register Bits Definition */
/*------------------------------------------------------*/
#define TC_COVFS 0x1 /* Counter Overflow Status */
#define TC_LOVRS 0x2 /* Load Overrun Status */
#define TC_CPAS 0x4 /* RA Compare Status */
#define TC_CPBS 0x8 /* RB Compare Status */
#define TC_CPCS 0x10 /* RC Compare Status */
#define TC_LDRAS 0x20 /* RA Loading Status */
#define TC_LDRBS 0x40 /* RB Loading Status */
#define TC_ETRGS 0x80 /* External Trigger Status */
#define TC_CLKSTA 0x10000 /* Clock Status */
#define TC_MTIOA 0x20000 /* TIOA Mirror */
#define TC_MTIOB 0x40000 /* TIOB Status */
/*--------------------------------------------------------------*/
/* TC_BCR: Timer Counter Block Control Register Bits Definition */
/*--------------------------------------------------------------*/
#define TC_SYNC 0x1 /* Synchronisation Trigger */
/*------------------------------------------------------------*/
/* TC_BMR: Timer Counter Block Mode Register Bits Definition */
/*------------------------------------------------------------*/
#define TC_TC0XC0S 0x3 /* External Clock Signal 0 Selection */
#define TC_TCLK0XC0 0x0
#define TC_NONEXC0 0x1
#define TC_TIOA1XC0 0x2
#define TC_TIOA2XC0 0x3
#define TC_TC1XC1S 0xC /* External Clock Signal 1 Selection */
#define TC_TCLK1XC1 0x0
#define TC_NONEXC1 0x4
#define TC_TIOA0XC1 0x8
#define TC_TIOA2XC1 0xC
#define TC_TC2XC2S 0x30 /* External Clock Signal 2 Selection */
#define TC_TCLK2XC2 0x0
#define TC_NONEXC2 0x10
#define TC_TIOA0XC2 0x20
#define TC_TIOA1XC2 0x30
#endif /* tc_h */

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@ -1,151 +0,0 @@
//*----------------------------------------------------------------------------
//* ATMEL Microcontroller Software Support - ROUSSET -
//*----------------------------------------------------------------------------
//* The software is delivered "AS IS" without warranty or condition of any
//* kind, either express, implied or statutory. This includes without
//* limitation any warranty or condition with respect to merchantability or
//* fitness for any particular purpose, or against the infringements of
//* intellectual property rights of others.
//*-----------------------------------------------------------------------------
//* File Name : usart.h
//* Object : USART Header File.
//*
//* 1.0 01/04/00 JCZ : Creation
//*----------------------------------------------------------------------------
#ifndef usart_h
#define usart_h
//#include "periph/stdc/std_c.h"
//#include "periph/pio/lib_pio.h"
/*-------------------------------------------*/
/* USART User Interface Structure Definition */
/*-------------------------------------------*/
typedef struct
{
at91_reg US_CR ; /* Control Register */
at91_reg US_MR ; /* Mode Register */
at91_reg US_IER ; /* Interrupt Enable Register */
at91_reg US_IDR ; /* Interrupt Disable Register */
at91_reg US_IMR ; /* Interrupt Mask Register */
at91_reg US_CSR ; /* Channel Status Register */
at91_reg US_RHR ; /* Receive Holding Register */
at91_reg US_THR ; /* Transmit Holding Register */
at91_reg US_BRGR ; /* Baud Rate Generator Register */
at91_reg US_RTOR ; /* Receiver Timeout Register */
at91_reg US_TTGR ; /* Transmitter Time-guard Register */
at91_reg Reserved ;
at91_reg US_RPR ; /* Receiver Pointer Register */
at91_reg US_RCR ; /* Receiver Counter Register */
at91_reg US_TPR ; /* Transmitter Pointer Register */
at91_reg US_TCR ; /* Transmitter Counter Register */
} StructUSART ;
/*--------------------------*/
/* US_CR : Control Register */
/*--------------------------*/
#define US_RSTRX 0x0004 /* Reset Receiver */
#define US_RSTTX 0x0008 /* Reset Transmitter */
#define US_RXEN 0x0010 /* Receiver Enable */
#define US_RXDIS 0x0020 /* Receiver Disable */
#define US_TXEN 0x0040 /* Transmitter Enable */
#define US_TXDIS 0x0080 /* Transmitter Disable */
#define US_RSTSTA 0x0100 /* Reset Status Bits */
#define US_STTBRK 0x0200 /* Start Break */
#define US_STPBRK 0x0400 /* Stop Break */
#define US_STTTO 0x0800 /* Start Time-out */
#define US_SENDA 0x1000 /* Send Address */
/*-----------------------*/
/* US_MR : Mode Register */
/*-----------------------*/
#define US_CLKS 0x0030 /* Clock Selection */
#define US_CLKS_MCK 0x00 /* Master Clock */
#define US_CLKS_MCK8 0x10 /* Master Clock divided by 8 */
#define US_CLKS_SCK 0x20 /* External Clock */
#define US_CLKS_SLCK 0x30 /* Slow Clock */
#define US_CHRL 0x00C0 /* Byte Length */
#define US_CHRL_5 0x00 /* 5 bits */
#define US_CHRL_6 0x40 /* 6 bits */
#define US_CHRL_7 0x80 /* 7 bits */
#define US_CHRL_8 0xC0 /* 8 bits */
#define US_SYNC 0x0100 /* Synchronous Mode Enable */
#define US_PAR 0x0E00 /* Parity Mode */
#define US_PAR_EVEN 0x00 /* Even Parity */
#define US_PAR_ODD 0x200 /* Odd Parity */
#define US_PAR_SPACE 0x400 /* Space Parity to 0 */
#define US_PAR_MARK 0x600 /* Marked Parity to 1 */
#define US_PAR_NO 0x800 /* No Parity */
#define US_PAR_MULTIDROP 0xC00 /* Multi-drop Mode */
#define US_NBSTOP 0x3000 /* Stop Bit Number */
#define US_NBSTOP_1 0x0000 /* 1 Stop Bit */
#define US_NBSTOP_1_5 0x1000 /* 1.5 Stop Bits */
#define US_NBSTOP_2 0x2000 /* 2 Stop Bits */
#define US_CHMODE 0xC000 /* Channel Mode */
#define US_CHMODE_NORMAL 0x0000 /* Normal Mode */
#define US_CHMODE_AUTOMATIC_ECHO 0x4000 /* Automatic Echo */
#define US_CHMODE_LOCAL_LOOPBACK 0x8000 /* Local Loopback */
#define US_CHMODE_REMOTE_LOOPBACK 0xC000 /* Remote Loopback */
#define US_MODE9 0x20000 /* 9 Bit Mode */
#define US_CLKO 0x40000 /* Baud Rate Output Enable */
/* Mode Register model */
/* Standard Asynchronous Mode : 8 bits , 1 stop , no parity */
#define US_ASYNC_MODE ( US_CHMODE_NORMAL + \
US_NBSTOP_1 + \
US_PAR_NO + \
US_CHRL_8 + \
US_CLKS_MCK )
/* Standard External Asynchronous Mode : 8 bits , 1 stop , no parity */
#define US_ASYNC_SCK_MODE ( US_CHMODE_NORMAL + \
US_NBSTOP_1 + \
US_PAR_NO + \
US_CHRL_8 + \
US_CLKS_SCK )
/* Standard Synchronous Mode : 8 bits , 1 stop , no parity */
#define US_SYNC_MODE ( US_SYNC + \
US_CHMODE_NORMAL + \
US_NBSTOP_1 + \
US_PAR_NO + \
US_CHRL_8 + \
US_CLKS_MCK )
/* SCK used Label */
#define SCK_USED (US_CLKO | US_CLKS_SCK)
/*---------------------------------------------------------------*/
/* US_IER, US_IDR, US_IMR, US_IMR: Status and Interrupt Register */
/*---------------------------------------------------------------*/
#define US_RXRDY 0x1 /* Receiver Ready */
#define US_TXRDY 0x2 /* Transmitter Ready */
#define US_RXBRK 0x4 /* Receiver Break */
#define US_ENDRX 0x8 /* End of Receiver PDC Transfer */
#define US_ENDTX 0x10 /* End of Transmitter PDC Transfer */
#define US_OVRE 0x20 /* Overrun Error */
#define US_FRAME 0x40 /* Framing Error */
#define US_PARE 0x80 /* Parity Error */
#define US_TIMEOUT 0x100 /* Receiver Timeout */
#define US_TXEMPTY 0x200 /* Transmitter Empty */
#define US_MASK_IRQ_TX (US_TXRDY | US_ENDTX | US_TXEMPTY)
#define US_MASK_IRQ_RX (US_RXRDY | US_ENDRX | US_TIMEOUT)
#define US_MASK_IRQ_ERROR (US_PARE | US_FRAME | US_OVRE | US_RXBRK)
#endif /* usart_h */

View file

@ -1,78 +0,0 @@
/*
FreeRTOS.org V4.2.0 - Copyright (C) 2003-2007 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
See http://www.FreeRTOS.org for documentation, latest information, license
and contact details. Please ensure to read the configuration and relevant
port sections of the online documentation.
***************************************************************************
*/
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
#include <intrinsic.h>
#include "Board.h"
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
*----------------------------------------------------------*/
#define configUSE_PREEMPTION 1
#define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 0
#define configCPU_CLOCK_HZ ( ( unsigned portLONG ) 47923200 )
#define configTICK_RATE_HZ ( ( portTickType ) 1000 )
#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 5 )
#define configMINIMAL_STACK_SIZE ( ( unsigned portSHORT ) 100 )
#define configTOTAL_HEAP_SIZE ( ( size_t ) 14200 )
#define configMAX_TASK_NAME_LEN ( 16 )
#define configUSE_TRACE_FACILITY 0
#define configUSE_16_BIT_TICKS 0
#define configIDLE_SHOULD_YIELD 1
/* Co-routine definitions. */
#define configUSE_CO_ROUTINES 0
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
/* Set the following definitions to 1 to include the API function, or zero
to exclude the API function. */
#define INCLUDE_vTaskPrioritySet 1
#define INCLUDE_uxTaskPriorityGet 1
#define INCLUDE_vTaskDelete 0
#define INCLUDE_vTaskCleanUpResources 0
#define INCLUDE_vTaskSuspend 1
#define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelay 1
#endif /* FREERTOS_CONFIG_H */

View file

@ -1,81 +0,0 @@
/*
FreeRTOS.org V4.2.0 - Copyright (C) 2003-2007 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
See http://www.FreeRTOS.org for documentation, latest information, license
and contact details. Please ensure to read the configuration and relevant
port sections of the online documentation.
***************************************************************************
*/
#include "FreeRTOS.h"
#include "partest.h"
#include "board.h"
/*-----------------------------------------------------------
* Simple parallel port IO routines for the LED's.
*-----------------------------------------------------------*/
const unsigned portLONG led_mask[ NB_LED ]= { LED1, LED2, LED3, LED4 };
void vParTestInitialise( void )
{
/* Start with all LED's off. */
AT91F_PIO_SetOutput( AT91C_BASE_PIOA, LED_MASK );
}
/*-----------------------------------------------------------*/
void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )
{
if( uxLED < ( portBASE_TYPE ) NB_LED )
{
if( xValue )
{
AT91F_PIO_SetOutput( AT91C_BASE_PIOA, led_mask[ uxLED ] );
}
else
{
AT91F_PIO_ClearOutput( AT91C_BASE_PIOA, led_mask[ uxLED ]);
}
}
}
/*-----------------------------------------------------------*/
void vParTestToggleLED( unsigned portBASE_TYPE uxLED )
{
if( uxLED < ( portBASE_TYPE ) NB_LED )
{
if( AT91F_PIO_GetInput( AT91C_BASE_PIOA ) & led_mask[ uxLED ] )
{
AT91F_PIO_ClearOutput( AT91C_BASE_PIOA, led_mask[ uxLED ]);
}
else
{
AT91F_PIO_SetOutput( AT91C_BASE_PIOA, led_mask[ uxLED ] );
}
}
}

View file

@ -1,89 +0,0 @@
/*----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support - ROUSSET -
*----------------------------------------------------------------------------
* The software is delivered "AS IS" without warranty or condition of any
* kind, either express, implied or statutory. This includes without
* limitation any warranty or condition with respect to merchantability or
* fitness for any particular purpose, or against the infringements of
* intellectual property rights of others.
*----------------------------------------------------------------------------
* File Name : Board.h
* Object : AT91SAM7S Evaluation Board Features Definition File.
*
* Creation : JPP 16/Jun/2004
*----------------------------------------------------------------------------
*/
#ifndef Board_h
#define Board_h
#include "AT91SAM7S64.h"
#define __inline inline
#include "lib_AT91SAM7S64.h"
#define true -1
#define false 0
/*-------------------------------*/
/* SAM7Board Memories Definition */
/*-------------------------------*/
// The AT91SAM7S64 embeds a 16-Kbyte SRAM bank, and 64 K-Byte Flash
#define INT_SARM 0x00200000
#define INT_SARM_REMAP 0x00000000
#define INT_FLASH 0x00000000
#define INT_FLASH_REMAP 0x01000000
#define FLASH_PAGE_NB 512
#define FLASH_PAGE_SIZE 128
/*-----------------*/
/* Leds Definition */
/*-----------------*/
/* PIO Flash PA PB PIN */
#define LED1 (1<<0) /* PA0 / PGMEN0 & PWM0 TIOA0 48 */
#define LED2 (1<<1) /* PA1 / PGMEN1 & PWM1 TIOB0 47 */
#define LED3 (1<<2) /* PA2 & PWM2 SCK0 44 */
#define LED4 (1<<3) /* PA3 & TWD NPCS3 43 */
#define NB_LED 4
#define LED_MASK (LED1|LED2|LED3|LED4)
/*-------------------------*/
/* Push Buttons Definition */
/*-------------------------*/
/* PIO Flash PA PB PIN */
#define SW1_MASK (1<<19) /* PA19 / PGMD7 & RK FIQ 13 */
#define SW2_MASK (1<<20) /* PA20 / PGMD8 & RF IRQ0 16 */
#define SW3_MASK (1<<15) /* PA15 / PGM3 & TF TIOA1 20 */
#define SW4_MASK (1<<14) /* PA14 / PGMD2 & SPCK PWM3 21 */
#define SW_MASK (SW1_MASK|SW2_MASK|SW3_MASK|SW4_MASK)
#define SW1 (1<<19) // PA19
#define SW2 (1<<20) // PA20
#define SW3 (1<<15) // PA15
#define SW4 (1<<14) // PA14
/*------------------*/
/* USART Definition */
/*------------------*/
/* SUB-D 9 points J3 DBGU*/
#define DBGU_RXD AT91C_PA9_DRXD /* JP11 must be close */
#define DBGU_TXD AT91C_PA10_DTXD /* JP12 must be close */
#define AT91C_DBGU_BAUD 115200 // Baud rate
#define US_RXD_PIN AT91C_PA5_RXD0 /* JP9 must be close */
#define US_TXD_PIN AT91C_PA6_TXD0 /* JP7 must be close */
#define US_RTS_PIN AT91C_PA7_RTS0 /* JP8 must be close */
#define US_CTS_PIN AT91C_PA8_CTS0 /* JP6 must be close */
/*--------------*/
/* Master Clock */
/*--------------*/
#define EXT_OC 18432000 // Exetrnal ocilator MAINCK
#define MCK 47923200 // MCK (PLLRC div by 2)
#define MCKKHz (MCK/1000) //
#endif /* Board_h */

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@ -1,223 +0,0 @@
;------------------------------------------------------------------------------
;- ATMEL Microcontroller Software Support - ROUSSET -
;------------------------------------------------------------------------------
; The software is delivered "AS IS" without warranty or condition of any
; kind, either express, implied or statutory. This includes without
; limitation any warranty or condition with respect to merchantability or
; fitness for any particular purpose, or against the infringements of
; intellectual property rights of others.
;-----------------------------------------------------------------------------
;- File source : Cstartup.s79
;- Object : Generic CStartup for IAR No Use REMAP
;- Compilation flag : None
;-
;- 1.0 15/Jun/04 JPP : Creation
;------------------------------------------------------------------------------
#include "AT91SAM7S64_inc.h"
;------------------------------------------------------------------------------
;- Area Definition
;------------------------------------------------------------------------------
;---------------------------------------------------------------
; ?RESET
; Reset Vector.
; Normally, segment INTVEC is linked at address 0.
; For debugging purposes, INTVEC may be placed at other
; addresses.
; A debugger that honors the entry point will start the
; program in a normal way even if INTVEC is not at address 0.
;-------------------------------------------------------------
PROGRAM ?RESET
RSEG INTRAMSTART_REMAP
RSEG INTRAMEND_REMAP
EXTERN vPortYieldProcessor
RSEG ICODE:CODE:ROOT(2)
CODE32 ; Always ARM mode after reset
org 0
reset
;------------------------------------------------------------------------------
;- Exception vectors
;--------------------
;- These vectors can be read at address 0 or at RAM address
;- They ABSOLUTELY requires to be in relative addresssing mode in order to
;- guarantee a valid jump. For the moment, all are just looping.
;- If an exception occurs before remap, this would result in an infinite loop.
;- To ensure if a exeption occurs before start application to infinite loop.
;------------------------------------------------------------------------------
B InitReset ; 0x00 Reset handler
undefvec:
B undefvec ; 0x04 Undefined Instruction
swivec:
B vPortYieldProcessor ; 0x08 Software Interrupt
pabtvec:
B pabtvec ; 0x0C Prefetch Abort
dabtvec:
B dabtvec ; 0x10 Data Abort
rsvdvec:
B rsvdvec ; 0x14 reserved
irqvec:
LDR PC, [PC, #-0xF20] ; Jump directly to the address given by the AIC
fiqvec: ; 0x1c FIQ
;------------------------------------------------------------------------------
;- Function : FIQ_Handler_Entry
;- Treatments : FIQ Controller Interrupt Handler.
;- Called Functions : AIC_FVR[interrupt]
;------------------------------------------------------------------------------
FIQ_Handler_Entry:
;- Switch in SVC/User Mode to allow User Stack access for C code
; because the FIQ is not yet acknowledged
;- Save and r0 in FIQ_Register
mov r9,r0
ldr r0 , [r8, #AIC_FVR]
msr CPSR_c,#I_BIT | F_BIT | ARM_MODE_SVC
;- Save scratch/used registers and LR in User Stack
stmfd sp!, { r1-r3, r12, lr}
;- Branch to the routine pointed by the AIC_FVR
mov r14, pc
bx r0
;- Restore scratch/used registers and LR from User Stack
ldmia sp!, { r1-r3, r12, lr}
;- Leave Interrupts disabled and switch back in FIQ mode
msr CPSR_c, #I_BIT | F_BIT | ARM_MODE_FIQ
;- Restore the R0 ARM_MODE_SVC register
mov r0,r9
;- Restore the Program Counter using the LR_fiq directly in the PC
subs pc,lr,#4
InitReset:
;------------------------------------------------------------------------------
;- Low level Init (PMC, AIC, ? ....) by C function AT91F_LowLevelInit
;------------------------------------------------------------------------------
EXTERN AT91F_LowLevelInit
#define __iramend SFB(INTRAMEND_REMAP)
;- minumum C initialization
;- call AT91F_LowLevelInit( void)
ldr r13,=__iramend ; temporary stack in internal RAM
;--Call Low level init function in ABSOLUTE through the Interworking
ldr r0,=AT91F_LowLevelInit
mov lr, pc
bx r0
;------------------------------------------------------------------------------
;- Stack Sizes Definition
;------------------------
;- Interrupt Stack requires 2 words x 8 priority level x 4 bytes when using
;- the vectoring. This assume that the IRQ management.
;- The Interrupt Stack must be adjusted depending on the interrupt handlers.
;- Fast Interrupt not requires stack If in your application it required you must
;- be definehere.
;- The System stack size is not defined and is limited by the free internal
;- SRAM.
;------------------------------------------------------------------------------
;------------------------------------------------------------------------------
;- Top of Stack Definition
;-------------------------
;- Interrupt and Supervisor Stack are located at the top of internal memory in
;- order to speed the exception handling context saving and restoring.
;- ARM_MODE_SVC (Application, C) Stack is located at the top of the external memory.
;------------------------------------------------------------------------------
IRQ_STACK_SIZE EQU 300
ARM_MODE_FIQ EQU 0x11
ARM_MODE_IRQ EQU 0x12
ARM_MODE_SVC EQU 0x13
I_BIT EQU 0x80
F_BIT EQU 0x40
;------------------------------------------------------------------------------
;- Setup the stack for each mode
;-------------------------------
ldr r0, =__iramend
;- Set up Fast Interrupt Mode and set FIQ Mode Stack
msr CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT
;- Init the FIQ register
ldr r8, =AT91C_BASE_AIC
;- Set up Interrupt Mode and set IRQ Mode Stack
msr CPSR_c, #ARM_MODE_IRQ | I_BIT | F_BIT
mov r13, r0 ; Init stack IRQ
sub r0, r0, #IRQ_STACK_SIZE
;- Enable interrupt & Set up Supervisor Mode and set Supervisor Mode Stack
msr CPSR_c, #ARM_MODE_SVC
mov r13, r0
;---------------------------------------------------------------
; ?CSTARTUP
;---------------------------------------------------------------
EXTERN __segment_init
EXTERN main
; Initialize segments.
; __segment_init is assumed to use
; instruction set and to be reachable by BL from the ICODE segment
; (it is safest to link them in segment ICODE).
ldr r0,=__segment_init
mov lr, pc
bx r0
PUBLIC __main
?jump_to_main:
ldr lr,=?call_exit
ldr r0,=main
__main:
bx r0
;------------------------------------------------------------------------------
;- Loop for ever
;---------------
;- End of application. Normally, never occur.
;- Could jump on Software Reset ( B 0x0 ).
;------------------------------------------------------------------------------
?call_exit:
End
b End
;---------------------------------------------------------------
; ?EXEPTION_VECTOR
; This module is only linked if needed for closing files.
;---------------------------------------------------------------
PUBLIC AT91F_Default_FIQ_handler
PUBLIC AT91F_Default_IRQ_handler
PUBLIC AT91F_Spurious_handler
CODE32 ; Always ARM mode after exeption
AT91F_Default_FIQ_handler
b AT91F_Default_FIQ_handler
AT91F_Default_IRQ_handler
b AT91F_Default_IRQ_handler
AT91F_Spurious_handler
b AT91F_Spurious_handler
ENDMOD
END

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@ -1,84 +0,0 @@
//*----------------------------------------------------------------------------
//* ATMEL Microcontroller Software Support - ROUSSET -
//*----------------------------------------------------------------------------
//* The software is delivered "AS IS" without warranty or condition of any
//* kind, either express, implied or statutory. This includes without
//* limitation any warranty or condition with respect to merchantability or
//* fitness for any particular purpose, or against the infringements of
//* intellectual property rights of others.
//*----------------------------------------------------------------------------
//* File Name : Cstartup_SAM7.c
//* Object : Low level initializations written in C for IAR
//* tools
//* Creation : 12/Jun/04
//*
//*----------------------------------------------------------------------------
// Include the board file description
#include "Board.h"
// The following functions must be write in ARM mode this function called directly
// by exception vector
extern void AT91F_Spurious_handler(void);
extern void AT91F_Default_IRQ_handler(void);
extern void AT91F_Default_FIQ_handler(void);
//*----------------------------------------------------------------------------
//* \fn AT91F_LowLevelInit
//* \brief This function performs very low level HW initialization
//* this function can be use a Stack, depending the compilation
//* optimization mode
//*----------------------------------------------------------------------------
void AT91F_LowLevelInit( void );
void AT91F_LowLevelInit( void) @ "ICODE"
{
int i;
AT91PS_PMC pPMC = AT91C_BASE_PMC;
//* Set Flash Waite sate
// Single Cycle Access at Up to 30 MHz, or 40
// if MCK = 47923200 I have 50 Cycle for 1 useconde ( flied MC_FMR->FMCN
AT91C_BASE_MC->MC_FMR = ((AT91C_MC_FMCN)&(50 <<16)) | AT91C_MC_FWS_1FWS ;
//* Watchdog Disable
AT91C_BASE_WDTC->WDTC_WDMR= AT91C_SYSC_WDDIS;
//* Set MCK at 47 923 200
// 1 Enabling the Main Oscillator:
// SCK = 1/32768 = 30.51 uSeconde
// Start up time = 8 * 6 / SCK = 56 * 30.51 = 1,46484375 ms
pPMC->PMC_MOR = (( AT91C_CKGR_OSCOUNT & (0x06 <<8) | AT91C_CKGR_MOSCEN ));
// Wait the startup time
while(!(pPMC->PMC_SR & AT91C_PMC_MOSCS));
// 2 Checking the Main Oscillator Frequency (Optional)
// 3 Setting PLL and divider:
// - div by 5 Fin = 3,6864 =(18,432 / 5)
// - Mul 25+1: Fout = 95,8464 =(3,6864 *26)
// for 96 MHz the erroe is 0.16%
// Field out NOT USED = 0
// PLLCOUNT pll startup time esrtimate at : 0.844 ms
// PLLCOUNT 28 = 0.000844 /(1/32768)
pPMC->PMC_PLLR = ((AT91C_CKGR_DIV & 0x05) |
(AT91C_CKGR_PLLCOUNT & (28<<8)) |
(AT91C_CKGR_MUL & (25<<16)));
// Wait the startup time
while(!(pPMC->PMC_SR & AT91C_PMC_LOCK));
// 4. Selection of Master Clock and Processor Clock
// select the PLL clock divided by 2
pPMC->PMC_MCKR = AT91C_PMC_CSS_PLL_CLK | AT91C_PMC_PRES_CLK_2 ;
// Enable User Reset and set its minimal assertion to 960 us
AT91C_BASE_RSTC->RSTC_RMR = AT91C_SYSC_URSTEN | (0x4<<8) | (unsigned int) (0xA5<<24);
// Set up the default interrupts handler vectors
AT91C_BASE_AIC->AIC_SVR[0] = (int) AT91F_Default_FIQ_handler ;
for (i=1;i < 31; i++)
{
AT91C_BASE_AIC->AIC_SVR[i] = (int) AT91F_Default_IRQ_handler ;
}
AT91C_BASE_AIC->AIC_SPU = (int) AT91F_Spurious_handler ;
}

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@ -1,8 +0,0 @@
#ifndef USB_DEMO_H
#define USB_DEMO_H
void vUSBDemoTask( void *pvParameters );
#endif

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@ -1,24 +0,0 @@
RSEG ICODE:CODE
CODE32
EXTERN vUSB_ISR
PUBLIC vUSBISREntry
; Wrapper for the USB interrupt service routine. This can cause a
; context switch so requires an assembly wrapper.
; Defines the portSAVE_CONTEXT and portRESTORE_CONTEXT macros.
#include "ISR_Support.h"
vUSBISREntry:
portSAVE_CONTEXT ; Save the context of the current task.
bl vUSB_ISR ; Call the ISR routine.
portRESTORE_CONTEXT ; Restore the context of the current task -
; which may be different to the task that
; was interrupted.
END

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@ -1,252 +0,0 @@
/*
FreeRTOS.org V4.2.0 - Copyright (C) 2003-2007 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
See http://www.FreeRTOS.org for documentation, latest information, license
and contact details. Please ensure to read the configuration and relevant
port sections of the online documentation.
***************************************************************************
*/
/*
NOTE : Tasks run in system mode and the scheduler runs in Supervisor mode.
The processor MUST be in supervisor mode when vTaskStartScheduler is
called. The demo applications included in the FreeRTOS.org download switch
to supervisor mode prior to main being called. If you are not using one of
these demo application projects then ensure Supervisor mode is used.
*/
/*
* Creates all the demo application tasks, then starts the scheduler. The WEB
* documentation provides more details of the demo application tasks. The SAM7
* includes a sample USB that emulates a Joystick input to a USB host.
*
* Main.c also creates a task called "Check". This only executes every three
* seconds but has the highest priority so is guaranteed to get processor time.
* Its main function is to check that all the other tasks are still operational.
* Each task (other than the "flash" tasks) maintains a unique count that is
* incremented each time the task successfully completes its function. Should
* any error occur within such a task the count is permanently halted. The
* check task inspects the count of each task to ensure it has changed since
* the last time the check task executed. If all the count variables have
* changed all the tasks are still executing error free, and the check task
* toggles the onboard LED. Should any task contain an error at any time
* the LED toggle rate will change from 3 seconds to 500ms.
*
*/
/* Standard includes. */
#include <stdlib.h>
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "task.h"
/* Demo application includes. */
#include "flash.h"
#include "integer.h"
#include "PollQ.h"
#include "BlockQ.h"
#include "semtest.h"
#include "dynamic.h"
#include "partest.h"
#include "comtest2.h"
#include "USB/USBSample.h"
/* Priorities for the demo application tasks. */
#define mainLED_TASK_PRIORITY ( tskIDLE_PRIORITY + 3 )
#define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define mainCHECK_TASK_PRIORITY ( tskIDLE_PRIORITY + 4 )
#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1 )
#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define mainCOM_TEST_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define mainUSB_PRIORITY ( tskIDLE_PRIORITY + 2 )
/* Constants required by the 'Check' task. */
#define mainNO_ERROR_FLASH_PERIOD ( ( portTickType ) 3000 / portTICK_RATE_MS )
#define mainERROR_FLASH_PERIOD ( ( portTickType ) 500 / portTICK_RATE_MS )
#define mainCHECK_TASK_LED ( 3 )
/* Constants for the ComTest tasks. */
#define mainCOM_TEST_BAUD_RATE ( ( unsigned portLONG ) 115200 )
#define mainCOM_TEST_LED ( 4 ) /* Off the board. */
/*
* The task that executes at the highest priority and calls
* prvCheckOtherTasksAreStillRunning(). See the description at the top
* of the file.
*/
static void vErrorChecks( void *pvParameters );
/*
* Configure the processor for use with the Atmel demo board. Setup is minimal
* as the low level init function (called from the startup asm file) takes care
* of most things.
*/
static void prvSetupHardware( void );
/*
* Checks that all the demo application tasks are still executing without error
* - as described at the top of the file.
*/
static portLONG prvCheckOtherTasksAreStillRunning( void );
/*-----------------------------------------------------------*/
/*
* Starts all the other tasks, then starts the scheduler.
*/
void main( void )
{
/* Setup any hardware that has not already been configured by the low
level init routines. */
prvSetupHardware();
/* Initialise the LED outputs for use by the demo application tasks. */
vParTestInitialise();
/* Start all the standard demo application tasks. */
vStartIntegerMathTasks( tskIDLE_PRIORITY );
vStartLEDFlashTasks( mainLED_TASK_PRIORITY );
vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );
vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );
vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );
vStartDynamicPriorityTasks();
vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainCOM_TEST_BAUD_RATE, mainCOM_TEST_LED );
/* Also start the USB demo which is just for the SAM7. */
xTaskCreate( vUSBDemoTask, "USB", configMINIMAL_STACK_SIZE, NULL, mainUSB_PRIORITY, NULL );
/* Start the check task - which is defined in this file. */
xTaskCreate( vErrorChecks, "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );
/* Start the scheduler.
NOTE : Tasks run in system mode and the scheduler runs in Supervisor mode.
The processor MUST be in supervisor mode when vTaskStartScheduler is
called. The demo applications included in the FreeRTOS.org download switch
to supervisor mode prior to main being called. If you are not using one of
these demo application projects then ensure Supervisor mode is used here. */
vTaskStartScheduler();
/* We should never get here as control is now taken by the scheduler. */
return;
}
/*-----------------------------------------------------------*/
static void prvSetupHardware( void )
{
/* When using the JTAG debugger the hardware is not always initialised to
the correct default state. This line just ensures that this does not
cause all interrupts to be masked at the start. */
AT91C_BASE_AIC->AIC_EOICR = 0;
/* Most setup is performed by the low level init function called from the
startup asm file. */
/* Configure the PIO Lines corresponding to LED1 to LED4 to be outputs as
well as the UART Tx line. */
AT91F_PIO_CfgOutput( AT91C_BASE_PIOA, LED_MASK );
/* Enable the peripheral clock. */
AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, 1 << AT91C_ID_PIOA );
}
/*-----------------------------------------------------------*/
static void vErrorChecks( void *pvParameters )
{
portTickType xDelayPeriod = mainNO_ERROR_FLASH_PERIOD;
/* The parameters are not used in this task. */
( void ) pvParameters;
/* Cycle for ever, delaying then checking all the other tasks are still
operating without error. If an error is detected then the delay period
is decreased from mainNO_ERROR_FLASH_PERIOD to mainERROR_FLASH_PERIOD so
the on board LED flash rate will increase. */
for( ;; )
{
/* Delay until it is time to execute again. */
vTaskDelay( xDelayPeriod );
/* Check all the standard demo application tasks are executing without
error. */
if( prvCheckOtherTasksAreStillRunning() != pdPASS )
{
/* An error has been detected in one of the tasks - flash faster. */
xDelayPeriod = mainERROR_FLASH_PERIOD;
}
vParTestToggleLED( mainCHECK_TASK_LED );
}
}
/*-----------------------------------------------------------*/
static portLONG prvCheckOtherTasksAreStillRunning( void )
{
portLONG lReturn = ( portLONG ) pdPASS;
/* Check all the demo tasks (other than the flash tasks) to ensure
that they are all still running, and that none of them have detected
an error. */
if( xAreIntegerMathsTaskStillRunning() != pdTRUE )
{
lReturn = ( portLONG ) pdFAIL;
}
if( xArePollingQueuesStillRunning() != pdTRUE )
{
lReturn = ( portLONG ) pdFAIL;
}
if( xAreSemaphoreTasksStillRunning() != pdTRUE )
{
lReturn = ( portLONG ) pdFAIL;
}
if( xAreBlockingQueuesStillRunning() != pdTRUE )
{
lReturn = ( portLONG ) pdFAIL;
}
if( xAreComTestTasksStillRunning() != pdTRUE )
{
lReturn = ( portLONG ) pdFAIL;
}
if( xAreDynamicPriorityTasksStillRunning() != pdTRUE )
{
lReturn = ( portLONG ) pdFAIL;
}
return lReturn;
}
/*-----------------------------------------------------------*/

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@ -1,180 +0,0 @@
// ---------------------------------------------------------
// ATMEL Microcontroller Software Support - ROUSSET -
// ---------------------------------------------------------
// The software is delivered "AS IS" without warranty or
// condition of any kind, either express, implied or
// statutory. This includes without limitation any warranty
// or condition with respect to merchantability or fitness
// for any particular purpose, or against the infringements of
// intellectual property rights of others.
// ---------------------------------------------------------
// File: SAM7.mac
//
// User setup file for CSPY debugger to simulate interrupt
// driven Fibonacchi data input.
// 1.1 16/Jun/04 JPP : Creation
//
// $Revision: 1.3 $
//
// ---------------------------------------------------------
__var i;
__var pt;
execUserPreload()
{
//* Set the RAM memory at 0x0020 0000 for code AT 0 flash area
CheckRemap();
//* Get the Chip ID (AT91C_DBGU_C1R & AT91C_DBGU_C2R
i=__readMemory32(0xFFFFF240,"Memory");
__message " ---------------------------------------- Chip ID 0x",i:%X;
i=__readMemory32(0xFFFFF244,"Memory");
__message " ---------------------------------------- Extention 0x",i:%X;
//* Get the chip status
//* Init AIC
AIC();
//* Watchdog Disable
Watchdog();
}
//-----------------------------------------------------------------------------
// Watchdog
//-------------------------------
// Normally, the Watchdog is enable at the reset for load it's preferable to
// Disable.
//-----------------------------------------------------------------------------
Watchdog()
{
//* Watchdog Disable
// AT91C_BASE_WDTC->WDTC_WDMR= AT91C_SYSC_WDDIS;
__writeMemory32(0x00008000,0xFFFFFD44,"Memory");
__message "------------------------------- Watchdog Disable ----------------------------------------";
}
//-----------------------------------------------------------------------------
// Check Remap
//-------------
//-----------------------------------------------------------------------------
CheckRemap()
{
//* Read the value at 0x0
i=__readMemory32(0x00000000,"Memory");
i=i+1;
__writeMemory32(i,0x00,"Memory");
pt=__readMemory32(0x00000000,"Memory");
if (i == pt)
{
__message "------------------------------- The Remap is done ----------------------------------------";
//* Toggel RESET The remap
__writeMemory32(0x00000001,0xFFFFFF00,"Memory");
} else {
__message "------------------------------- The Remap is NOT -----------------------------------------";
}
}
execUserSetup()
{
ini();
__message "-------------------------------Set PC ----------------------------------------";
__writeMemory32(0x00000000,0xB4,"Register");
}
//-----------------------------------------------------------------------------
// Reset the Interrupt Controller
//-------------------------------
// Normally, the code is executed only if a reset has been actually performed.
// So, the AIC initialization resumes at setting up the default vectors.
//-----------------------------------------------------------------------------
AIC()
{
// Mask All interrupt pAic->AIC_IDCR = 0xFFFFFFFF;
__writeMemory32(0xFFFFFFFF,0xFFFFF124,"Memory");
for (i=0;i < 8; i++)
{
// AT91C_BASE_AIC->AIC_EOICR
pt = __readMemory32(0xFFFFF130,"Memory");
}
__message "------------------------------- AIC INIT ---------------------------------------------";
}
ini()
{
__writeMemory32(0x0,0x00,"Register");
__writeMemory32(0x0,0x04,"Register");
__writeMemory32(0x0,0x08,"Register");
__writeMemory32(0x0,0x0C,"Register");
__writeMemory32(0x0,0x10,"Register");
__writeMemory32(0x0,0x14,"Register");
__writeMemory32(0x0,0x18,"Register");
__writeMemory32(0x0,0x1C,"Register");
__writeMemory32(0x0,0x20,"Register");
__writeMemory32(0x0,0x24,"Register");
__writeMemory32(0x0,0x28,"Register");
__writeMemory32(0x0,0x2C,"Register");
__writeMemory32(0x0,0x30,"Register");
__writeMemory32(0x0,0x34,"Register");
__writeMemory32(0x0,0x38,"Register");
// Set CPSR
__writeMemory32(0x0D3,0x98,"Register");
}
RG()
{
i=__readMemory32(0x00,"Register"); __message "R00 0x",i:%X;
i=__readMemory32(0x04,"Register"); __message "R01 0x",i:%X;
i=__readMemory32(0x08,"Register"); __message "R02 0x",i:%X;
i=__readMemory32(0x0C,"Register"); __message "R03 0x",i:%X;
i=__readMemory32(0x10,"Register"); __message "R04 0x",i:%X;
i=__readMemory32(0x14,"Register"); __message "R05 0x",i:%X;
i=__readMemory32(0x18,"Register"); __message "R06 0x",i:%X;
i=__readMemory32(0x1C,"Register"); __message "R07 0x",i:%X;
i=__readMemory32(0x20,"Register"); __message "R08 0x",i:%X;
i=__readMemory32(0x24,"Register"); __message "R09 0x",i:%X;
i=__readMemory32(0x28,"Register"); __message "R10 0x",i:%X;
i=__readMemory32(0x2C,"Register"); __message "R11 0x",i:%X;
i=__readMemory32(0x30,"Register"); __message "R12 0x",i:%X;
i=__readMemory32(0x34,"Register"); __message "R13 0x",i:%X;
i=__readMemory32(0x38,"Register"); __message "R14 0x",i:%X;
i=__readMemory32(0x3C,"Register"); __message "R13 SVC 0x",i:%X;
i=__readMemory32(0x40,"Register"); __message "R14 SVC 0x",i:%X;
i=__readMemory32(0x44,"Register"); __message "R13 ABT 0x",i:%X;
i=__readMemory32(0x48,"Register"); __message "R14 ABT 0x",i:%X;
i=__readMemory32(0x4C,"Register"); __message "R13 UND 0x",i:%X;
i=__readMemory32(0x50,"Register"); __message "R14 UND 0x",i:%X;
i=__readMemory32(0x54,"Register"); __message "R13 IRQ 0x",i:%X;
i=__readMemory32(0x58,"Register"); __message "R14 IRQ 0x",i:%X;
i=__readMemory32(0x5C,"Register"); __message "R08 FIQ 0x",i:%X;
i=__readMemory32(0x60,"Register"); __message "R09 FIQ 0x",i:%X;
i=__readMemory32(0x64,"Register"); __message "R10 FIQ 0x",i:%X;
i=__readMemory32(0x68,"Register"); __message "R11 FIQ 0x",i:%X;
i=__readMemory32(0x6C,"Register"); __message "R12 FIQ 0x",i:%X;
i=__readMemory32(0x70,"Register"); __message "R13 FIQ 0x",i:%X;
i=__readMemory32(0x74,"Register"); __message "R14 FIQ0x",i:%X;
i=__readMemory32(0x98,"Register"); __message "CPSR ",i:%X;
i=__readMemory32(0x94,"Register"); __message "SPSR ",i:%X;
i=__readMemory32(0x9C,"Register"); __message "SPSR ABT ",i:%X;
i=__readMemory32(0xA0,"Register"); __message "SPSR ABT ",i:%X;
i=__readMemory32(0xA4,"Register"); __message "SPSR UND ",i:%X;
i=__readMemory32(0xA8,"Register"); __message "SPSR IRQ ",i:%X;
i=__readMemory32(0xAC,"Register"); __message "SPSR FIQ ",i:%X;
i=__readMemory32(0xB4,"Register"); __message "PC 0x",i:%X;
}

View file

@ -1,211 +0,0 @@
// ---------------------------------------------------------
// ATMEL Microcontroller Software Support - ROUSSET -
// ---------------------------------------------------------
// The software is delivered "AS IS" without warranty or
// condition of any kind, either express, implied or
// statutory. This includes without limitation any warranty
// or condition with respect to merchantability or fitness
// for any particular purpose, or against the infringements of
// intellectual property rights of others.
// ---------------------------------------------------------
// File: SAM7_RAM.mac
//
// User setup file for CSPY debugger to simulate interrupt
// driven Fibonacchi data input.
// 1.1 16/Jun/04 JPP : Creation
// 1.2 27/Aug/04 JPP : PLL setting
//
// $Revision: 1.3 $
//
// ---------------------------------------------------------
__var i;
__var pt;
execUserPreload()
{
//*
PllSetting();
//* Set the RAM memory at 0x0020 0000 for code AT 0 flash area
CheckNoRemap();
//* Get the Chip ID (AT91C_DBGU_C1R & AT91C_DBGU_C2R
i=__readMemory32(0xFFFFF240,"Memory");
__message " ---------------------------------------- Chip ID 0x",i:%X;
i=__readMemory32(0xFFFFF244,"Memory");
__message " ---------------------------------------- Extention 0x",i:%X;
i=__readMemory32(0xFFFFFF6C,"Memory");
__message " ---------------------------------------- Flash Version 0x",i:%X;
//* Get the chip status
//* Init AIC
AIC();
//* Watchdog Disable
Watchdog();
}
//-----------------------------------------------------------------------------
// PllSetting
//-------------------------------
// Set PLL
//-----------------------------------------------------------------------------
PllSetting()
{
// -1- Enabling the Main Oscillator:
//*#define AT91C_PMC_MOR ((AT91_REG *) 0xFFFFFC20) // (PMC) Main Oscillator Register
//*#define AT91C_PMC_PLLR ((AT91_REG *) 0xFFFFFC2C) // (PMC) PLL Register
//*#define AT91C_PMC_MCKR ((AT91_REG *) 0xFFFFFC30) // (PMC) Master Clock Register
//*pPMC->PMC_MOR = (( AT91C_CKGR_OSCOUNT & (0x06 <<8) | //0x0000 0600
// AT91C_CKGR_MOSCEN )); //0x0000 0001
__writeMemory32(0x00000601,0xFFFFFC20,"Memory");
// -2- Wait
// -3- Setting PLL and divider:
// - div by 5 Fin = 3,6864 =(18,432 / 5)
// - Mul 25+1: Fout = 95,8464 =(3,6864 *26)
// for 96 MHz the erroe is 0.16%
// Field out NOT USED = 0
// PLLCOUNT pll startup time esrtimate at : 0.844 ms
// PLLCOUNT 28 = 0.000844 /(1/32768)
// pPMC->PMC_PLLR = ((AT91C_CKGR_DIV & 0x05) | //0x0000 0005
// (AT91C_CKGR_PLLCOUNT & (28<<8)) //0x0000 1C00
// (AT91C_CKGR_MUL & (25<<16))); //0x0019 0000
__writeMemory32(0x00191C05,0xFFFFFC2C,"Memory");
// -2- Wait
// -5- Selection of Master Clock and Processor Clock
// select the PLL clock divided by 2
// pPMC->PMC_MCKR = AT91C_PMC_CSS_PLL_CLK | //0x0000 0003
// AT91C_PMC_PRES_CLK_2 ; //0x0000 0004
__writeMemory32(0x00000007,0xFFFFFC30,"Memory");
__message "------------------------------- PLL Enable ----------------------------------------";
}
//-----------------------------------------------------------------------------
// Watchdog
//-------------------------------
// Normally, the Watchdog is enable at the reset for load it's preferable to
// Disable.
//-----------------------------------------------------------------------------
Watchdog()
{
//* Watchdog Disable
// AT91C_BASE_WDTC->WDTC_WDMR= AT91C_SYSC_WDDIS;
__writeMemory32(0x00008000,0xFFFFFD44,"Memory");
__message "------------------------------- Watchdog Disable ----------------------------------------";
}
CheckNoRemap()
{
//* Read the value at 0x0
i=__readMemory32(0x00000000,"Memory");
i=i+1;
__writeMemory32(i,0x00,"Memory");
pt=__readMemory32(0x00000000,"Memory");
if (i == pt)
{
__message "------------------------------- The Remap is done ----------------------------------------";
} else {
__message "------------------------------- The Remap is NOT -----------------------------------------";
//* Toggel RESET The remap
__writeMemory32(0x00000001,0xFFFFFF00,"Memory");
}
}
execUserSetup()
{
ini();
__message "-------------------------------Set PC ----------------------------------------";
__writeMemory32(0x00000000,0xB4,"Register");
}
//-----------------------------------------------------------------------------
// Reset the Interrupt Controller
//-------------------------------
// Normally, the code is executed only if a reset has been actually performed.
// So, the AIC initialization resumes at setting up the default vectors.
//-----------------------------------------------------------------------------
AIC()
{
// Mask All interrupt pAic->AIC_IDCR = 0xFFFFFFFF;
__writeMemory32(0xFFFFFFFF,0xFFFFF124,"Memory");
for (i=0;i < 8; i++)
{
// AT91C_BASE_AIC->AIC_EOICR
pt = __readMemory32(0xFFFFF130,"Memory");
}
__message "------------------------------- AIC INIT ---------------------------------------------";
}
ini()
{
__writeMemory32(0x0,0x00,"Register");
__writeMemory32(0x0,0x04,"Register");
__writeMemory32(0x0,0x08,"Register");
__writeMemory32(0x0,0x0C,"Register");
__writeMemory32(0x0,0x10,"Register");
__writeMemory32(0x0,0x14,"Register");
__writeMemory32(0x0,0x18,"Register");
__writeMemory32(0x0,0x1C,"Register");
__writeMemory32(0x0,0x20,"Register");
__writeMemory32(0x0,0x24,"Register");
__writeMemory32(0x0,0x28,"Register");
__writeMemory32(0x0,0x2C,"Register");
__writeMemory32(0x0,0x30,"Register");
__writeMemory32(0x0,0x34,"Register");
__writeMemory32(0x0,0x38,"Register");
// Set CPSR
__writeMemory32(0x0D3,0x98,"Register");
}
RG()
{
i=__readMemory32(0x00,"Register"); __message "R00 0x",i:%X;
i=__readMemory32(0x04,"Register"); __message "R01 0x",i:%X;
i=__readMemory32(0x08,"Register"); __message "R02 0x",i:%X;
i=__readMemory32(0x0C,"Register"); __message "R03 0x",i:%X;
i=__readMemory32(0x10,"Register"); __message "R04 0x",i:%X;
i=__readMemory32(0x14,"Register"); __message "R05 0x",i:%X;
i=__readMemory32(0x18,"Register"); __message "R06 0x",i:%X;
i=__readMemory32(0x1C,"Register"); __message "R07 0x",i:%X;
i=__readMemory32(0x20,"Register"); __message "R08 0x",i:%X;
i=__readMemory32(0x24,"Register"); __message "R09 0x",i:%X;
i=__readMemory32(0x28,"Register"); __message "R10 0x",i:%X;
i=__readMemory32(0x2C,"Register"); __message "R11 0x",i:%X;
i=__readMemory32(0x30,"Register"); __message "R12 0x",i:%X;
i=__readMemory32(0x34,"Register"); __message "R13 0x",i:%X;
i=__readMemory32(0x38,"Register"); __message "R14 0x",i:%X;
i=__readMemory32(0x3C,"Register"); __message "R13 SVC 0x",i:%X;
i=__readMemory32(0x40,"Register"); __message "R14 SVC 0x",i:%X;
i=__readMemory32(0x44,"Register"); __message "R13 ABT 0x",i:%X;
i=__readMemory32(0x48,"Register"); __message "R14 ABT 0x",i:%X;
i=__readMemory32(0x4C,"Register"); __message "R13 UND 0x",i:%X;
i=__readMemory32(0x50,"Register"); __message "R14 UND 0x",i:%X;
i=__readMemory32(0x54,"Register"); __message "R13 IRQ 0x",i:%X;
i=__readMemory32(0x58,"Register"); __message "R14 IRQ 0x",i:%X;
i=__readMemory32(0x5C,"Register"); __message "R08 FIQ 0x",i:%X;
i=__readMemory32(0x60,"Register"); __message "R09 FIQ 0x",i:%X;
i=__readMemory32(0x64,"Register"); __message "R10 FIQ 0x",i:%X;
i=__readMemory32(0x68,"Register"); __message "R11 FIQ 0x",i:%X;
i=__readMemory32(0x6C,"Register"); __message "R12 FIQ 0x",i:%X;
i=__readMemory32(0x70,"Register"); __message "R13 FIQ 0x",i:%X;
i=__readMemory32(0x74,"Register"); __message "R14 FIQ0x",i:%X;
i=__readMemory32(0x98,"Register"); __message "CPSR ",i:%X;
i=__readMemory32(0x94,"Register"); __message "SPSR ",i:%X;
i=__readMemory32(0x9C,"Register"); __message "SPSR ABT ",i:%X;
i=__readMemory32(0xA0,"Register"); __message "SPSR ABT ",i:%X;
i=__readMemory32(0xA4,"Register"); __message "SPSR UND ",i:%X;
i=__readMemory32(0xA8,"Register"); __message "SPSR IRQ ",i:%X;
i=__readMemory32(0xAC,"Register"); __message "SPSR FIQ ",i:%X;
i=__readMemory32(0xB4,"Register"); __message "PC 0x",i:%X;
}

View file

@ -1,135 +0,0 @@
// ---------------------------------------------------------
// ATMEL Microcontroller Software Support - ROUSSET -
// ---------------------------------------------------------
// The software is delivered "AS IS" without warranty or
// condition of any kind, either express, implied or
// statutory. This includes without limitation any warranty
// or condition with respect to merchantability or fitness
// for any particular purpose, or against the infringements of
// intellectual property rights of others.
// ---------------------------------------------------------
// File: at91SAM7S64_16KRAM.xlc
//
// 1.1 16/Jun/04 JPP : Creation for 4.11A
//
// $Revision: 1.1.1.1 $
//
// ---------------------------------------------------------
//*************************************************************************
// XLINK command file template for EWARM/ICCARM
//
// Usage: xlink -f lnkarm <your_object_file(s)>
// -s <program start label> <C/C++ runtime library>
//
// $Revision: 1.1.1.1 $
//*************************************************************************
//************************************************
// Inform the linker about the CPU family used.
// AT91SAM7S64 Memory mapping
// No remap
// ROMSTART
// Start address 0x0000 0000
// Size 64 Kbo 0x0001 0000
// RAMSTART
// Start address 0x0020 0000
// Size 16 Kbo 0x0000 4000
// Remap done
// RAMSTART
// Start address 0x0000 0000
// Size 16 Kbo 0x0000 4000
// ROMSTART
// Start address 0x0010 0000
// Size 64 Kbo 0x0001 0000
//************************************************
-carm
//*************************************************************************
// Internal Ram segments mapped AFTER REMAP 16 K.
//*************************************************************************
// Use these addresses for the .
-Z(CONST)INTRAMSTART_REMAP=00000000
-Z(CONST)INTRAMEND_REMAP=00003FFF
//*************************************************************************
// Read-only segments mapped to Flash 64 K.
//*************************************************************************
-DROMSTART=00000000
-DROMEND=0000FFFF
//*************************************************************************
// Read/write segments mapped to RAM.
//*************************************************************************
-DRAMSTART=00000000
-DRAMEND=00003FFF
//************************************************
// Address range for reset and exception
// vectors (INTVEC).
// The vector area is 32 bytes,
// an additional 32 bytes is allocated for the
// constant table used by ldr PC in cstartup.s79.
//************************************************
-Z(CODE)INTVEC=00-3F
//************************************************
// Startup code and exception routines (ICODE).
//************************************************
-Z(CODE)ICODE,DIFUNCT=ROMSTART-ROMEND
-Z(CODE)SWITAB=ROMSTART-ROMEND
//************************************************
// Code segments may be placed anywhere.
//************************************************
-Z(CODE)CODE=ROMSTART-ROMEND
//************************************************
// Various constants and initializers.
//************************************************
-Z(CONST)INITTAB,DATA_ID,DATA_C=ROMSTART-ROMEND
-Z(CONST)CHECKSUM=ROMSTART-ROMEND
//************************************************
// Data segments.
//************************************************
-Z(DATA)DATA_I,DATA_Z,DATA_N=RAMSTART-RAMEND
//************************************************
// __ramfunc code copied to and executed from RAM.
//************************************************
-Z(DATA)CODE_I=RAMSTART-RAMEND
//************************************************
// ICCARM produces code for __ramfunc functions in
// CODE_I segments. The -Q XLINK command line
// option redirects XLINK to emit the code in the
// debug information associated with the CODE_I
// segment, where the code will execute.
//************************************************
//*************************************************************************
// Stack and heap segments.
//*************************************************************************
-D_CSTACK_SIZE=(100*4)
-D_IRQ_STACK_SIZE=(2*8*4)
-Z(DATA)CSTACK+_CSTACK_SIZE=RAMSTART-RAMEND
-Z(DATA)IRQ_STACK+_IRQ_STACK_SIZE=RAMSTART-RAMEND
//*************************************************************************
// ELF/DWARF support.
//
// Uncomment the line "-Felf" below to generate ELF/DWARF output.
// Available format specifiers are:
//
// "-yn": Suppress DWARF debug output
// "-yp": Multiple ELF program sections
// "-yas": Format suitable for debuggers from ARM Ltd (also sets -p flag)
//
// "-Felf" and the format specifiers can also be supplied directly as
// command line options, or selected from the Xlink Output tab in the
// IAR Embedded Workbench.
//*************************************************************************
// -Felf

View file

@ -1,136 +0,0 @@
// ---------------------------------------------------------
// ATMEL Microcontroller Software Support - ROUSSET -
// ---------------------------------------------------------
// The software is delivered "AS IS" without warranty or
// condition of any kind, either express, implied or
// statutory. This includes without limitation any warranty
// or condition with respect to merchantability or fitness
// for any particular purpose, or against the infringements of
// intellectual property rights of others.
// ---------------------------------------------------------
// File: at91SAM7S64_NoRemap.xlc
//
// 1.1 16/Jun/04 JPP : Creation for 4.11A
//
// $Revision: 1.1.1.1 $
//
// ---------------------------------------------------------
//*************************************************************************
// XLINK command file template for EWARM/ICCARM
//
// Usage: xlink -f lnkarm <your_object_file(s)>
// -s <program start label> <C/C++ runtime library>
//
// $Revision: 1.1.1.1 $
//*************************************************************************
//************************************************
// Inform the linker about the CPU family used.
// AT91SAM7S64 Memory mapping
// No remap
// ROMSTART
// Start address 0x0000 0000
// Size 64 Kbo 0x0001 0000
// RAMSTART
// Start address 0x0020 0000
// Size 16 Kbo 0x0000 4000
// Remap done
// RAMSTART
// Start address 0x0000 0000
// Size 16 Kbo 0x0000 4000
// ROMSTART
// Start address 0x0010 0000
// Size 64 Kbo 0x0001 0000
//************************************************
-carm
//*************************************************************************
// Internal Ram segments mapped AFTER REMAP 16 K.
//*************************************************************************
// Use these addresses for the .
-Z(CONST)INTRAMSTART_REMAP=00200000
-Z(CONST)INTRAMEND_REMAP=00203FFF
//*************************************************************************
// Read-only segments mapped to Flash 64 K.
//*************************************************************************
-DROMSTART=00000000
-DROMEND=0000FFFF
//*************************************************************************
// Read/write segments mapped to RAM.
//*************************************************************************
-DRAMSTART=00200000
-DRAMEND=002003FFF
//************************************************
// Address range for reset and exception
// vectors (INTVEC).
// The vector area is 32 bytes,
// an additional 32 bytes is allocated for the
// constant table used by ldr PC in cstartup.s79.
//************************************************
-Z(CODE)INTVEC=00-3F
//************************************************
// Startup code and exception routines (ICODE).
//************************************************
-Z(CODE)ICODE,DIFUNCT=ROMSTART-ROMEND
-Z(CODE)SWITAB=ROMSTART-ROMEND
//************************************************
// Code segments may be placed anywhere.
//************************************************
-Z(CODE)CODE=ROMSTART-ROMEND
//************************************************
// Various constants and initializers.
//************************************************
-Z(CONST)INITTAB,DATA_ID,DATA_C=ROMSTART-ROMEND
-Z(CONST)CHECKSUM=ROMSTART-ROMEND
//************************************************
// Data segments.
//************************************************
-Z(DATA)DATA_I,DATA_Z,DATA_N=RAMSTART-RAMEND
//************************************************
// __ramfunc code copied to and executed from RAM.
//************************************************
-Z(DATA)CODE_I=RAMSTART-RAMEND
//************************************************
// ICCARM produces code for __ramfunc functions in
// CODE_I segments. The -Q XLINK command line
// option redirects XLINK to emit the code in the
// debug information associated with the CODE_I
// segment, where the code will execute.
//************************************************
//*************************************************************************
// Stack and heap segments.
//*************************************************************************
//-D_CSTACK_SIZE=(100*4)
//-D_IRQ_STACK_SIZE=(2*8*4)
//-Z(DATA)CSTACK+_CSTACK_SIZE=RAMSTART-RAMEND
//-Z(DATA)IRQ_STACK+_IRQ_STACK_SIZE=RAMSTART-RAMEND
//*************************************************************************
// ELF/DWARF support.
//
// Uncomment the line "-Felf" below to generate ELF/DWARF output.
// Available format specifiers are:
//
// "-yn": Suppress DWARF debug output
// "-yp": Multiple ELF program sections
// "-yas": Format suitable for debuggers from ARM Ltd (also sets -p flag)
//
// "-Felf" and the format specifiers can also be supplied directly as
// command line options, or selected from the Xlink Output tab in the
// IAR Embedded Workbench.
//*************************************************************************
// -Felf

View file

@ -1,905 +0,0 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<project>
<fileVersion>1</fileVersion>
<configuration>
<name>Flash Debug</name>
<toolchain>
<name>ARM</name>
</toolchain>
<debug>1</debug>
<settings>
<name>C-SPY</name>
<archiveVersion>2</archiveVersion>
<data>
<version>13</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>CInput</name>
<state>1</state>
</option>
<option>
<name>CEndian</name>
<state>1</state>
</option>
<option>
<name>CProcessor</name>
<state>1</state>
</option>
<option>
<name>OCVariant</name>
<state>0</state>
</option>
<option>
<name>MacOverride</name>
<state>1</state>
</option>
<option>
<name>MacFile</name>
<state>$PROJ_DIR$\resource\SAM7.mac</state>
</option>
<option>
<name>MemOverride</name>
<state>0</state>
</option>
<option>
<name>MemFile</name>
<state>$TOOLKIT_DIR$\CONFIG\ioat91sam7s64.ddf</state>
</option>
<option>
<name>RunToEnable</name>
<state>0</state>
</option>
<option>
<name>RunToName</name>
<state>main</state>
</option>
<option>
<name>CExtraOptionsCheck</name>
<state>0</state>
</option>
<option>
<name>CExtraOptions</name>
<state></state>
</option>
<option>
<name>CFpuProcessor</name>
<state>1</state>
</option>
<option>
<name>OCDDFArgumentProducer</name>
<state></state>
</option>
<option>
<name>OCDownloadSuppressDownload</name>
<state>0</state>
</option>
<option>
<name>OCDownloadVerifyAll</name>
<state>0</state>
</option>
<option>
<name>OCProductVersion</name>
<state>4.10B</state>
</option>
<option>
<name>OCDynDriverList</name>
<state>JLINK_ID</state>
</option>
<option>
<name>OCLastSavedByProductVersion</name>
<state>4.30A</state>
</option>
<option>
<name>OCDownloadAttachToProgram</name>
<state>0</state>
</option>
<option>
<name>FlashLoaders</name>
<state>,,,,(default),</state>
</option>
<option>
<name>UseFlashLoader</name>
<state>1</state>
</option>
</data>
</settings>
<settings>
<name>ARMSIM_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>0</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>OCSimDriverInfo</name>
<state>1</state>
</option>
</data>
</settings>
<settings>
<name>ANGEL_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>0</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>CCAngelHeartbeat</name>
<state>1</state>
</option>
<option>
<name>CAngelCommunication</name>
<state>1</state>
</option>
<option>
<name>CAngelCommBaud</name>
<version>0</version>
<state>3</state>
</option>
<option>
<name>CAngelCommPort</name>
<version>0</version>
<state>0</state>
</option>
<option>
<name>ANGELTCPIP</name>
<state>aaa.bbb.ccc.ddd</state>
</option>
<option>
<name>DoAngelLogfile</name>
<state>0</state>
</option>
<option>
<name>AngelLogFile</name>
<state>$TOOLKIT_DIR$\cspycomm.log</state>
</option>
<option>
<name>OCDriverInfo</name>
<state>1</state>
</option>
</data>
</settings>
<settings>
<name>IARROM_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>0</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>CRomLogFileCheck</name>
<state>0</state>
</option>
<option>
<name>CRomLogFileEditB</name>
<state>$TOOLKIT_DIR$\cspycomm.log</state>
</option>
<option>
<name>CRomCommunication</name>
<state>0</state>
</option>
<option>
<name>CRomCommPort</name>
<version>0</version>
<state>0</state>
</option>
<option>
<name>CRomCommBaud</name>
<version>0</version>
<state>7</state>
</option>
<option>
<name>OCDriverInfo</name>
<state>1</state>
</option>
</data>
</settings>
<settings>
<name>JLINK_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>2</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>JLinkSpeed</name>
<state>30</state>
</option>
<option>
<name>CCJLinkHWReset</name>
<state>0</state>
</option>
<option>
<name>CCJLinkTRSTReset</name>
<state>0</state>
</option>
<option>
<name>CCJLinkDoLogfile</name>
<state>0</state>
</option>
<option>
<name>CCJLinkLogFile</name>
<state>$TOOLKIT_DIR$\cspycomm.log</state>
</option>
<option>
<name>CCJLinkHWResetDelay</name>
<state></state>
</option>
<option>
<name>CCJLinkSpeedRadio</name>
<state>0</state>
</option>
<option>
<name>OCDriverInfo</name>
<state>1</state>
</option>
<option>
<name>JLinkInitialSpeed</name>
<state>32</state>
</option>
<option>
<name>CCDoJlinkMultiTarget</name>
<state>0</state>
</option>
<option>
<name>CCScanChainNonARMDevices</name>
<state>0</state>
</option>
<option>
<name>CCJLinkMultiTarget</name>
<state>0</state>
</option>
<option>
<name>CCJLinkIRLength</name>
<state>0</state>
</option>
<option>
<name>CCJLinkCommRadio</name>
<state>0</state>
</option>
<option>
<name>CCJLinkTCPIP</name>
<state>aaa.bbb.ccc.ddd</state>
</option>
</data>
</settings>
<settings>
<name>MACRAIGOR_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>1</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>jtag</name>
<version>0</version>
<state>0</state>
</option>
<option>
<name>EmuSpeed</name>
<state>1</state>
</option>
<option>
<name>TCPIP</name>
<state>aaa.bbb.ccc.ddd</state>
</option>
<option>
<name>DoLogfile</name>
<state>0</state>
</option>
<option>
<name>LogFile</name>
<state>$TOOLKIT_DIR$\cspycomm.log</state>
</option>
<option>
<name>DoEmuMultiTarget</name>
<state>0</state>
</option>
<option>
<name>EmuMultiTarget</name>
<state>0@ARM7TDMI</state>
</option>
<option>
<name>EmuHWReset</name>
<state>0</state>
</option>
<option>
<name>CEmuCommBaud</name>
<version>0</version>
<state>4</state>
</option>
<option>
<name>CEmuCommPort</name>
<version>0</version>
<state>0</state>
</option>
<option>
<name>jtago</name>
<version>0</version>
<state>0</state>
</option>
<option>
<name>OCDriverInfo</name>
<state>1</state>
</option>
<option>
<name>UnusedAddr</name>
<state>0x00800000</state>
</option>
<option>
<name>CCMacraigorHWResetDelay</name>
<state></state>
</option>
</data>
</settings>
<settings>
<name>RDI_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>1</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>CRDIDriverDll</name>
<state>Browse to your RDI driver</state>
</option>
<option>
<name>CRDILogFileCheck</name>
<state>0</state>
</option>
<option>
<name>CRDILogFileEdit</name>
<state>$TOOLKIT_DIR$\cspycomm.log</state>
</option>
<option>
<name>CCRDIHWReset</name>
<state>0</state>
</option>
<option>
<name>CCRDICatchReset</name>
<state>0</state>
</option>
<option>
<name>CCRDICatchUndef</name>
<state>0</state>
</option>
<option>
<name>CCRDICatchSWI</name>
<state>0</state>
</option>
<option>
<name>CCRDICatchData</name>
<state>0</state>
</option>
<option>
<name>CCRDICatchPrefetch</name>
<state>0</state>
</option>
<option>
<name>CCRDICatchIRQ</name>
<state>0</state>
</option>
<option>
<name>CCRDICatchFIQ</name>
<state>0</state>
</option>
<option>
<name>CCRDIUseETM</name>
<state>0</state>
</option>
<option>
<name>OCDriverInfo</name>
<state>1</state>
</option>
</data>
</settings>
<settings>
<name>THIRDPARTY_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>0</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>CThirdPartyDriverDll</name>
<state>Browse to your third-party driver</state>
</option>
<option>
<name>CThirdPartyLogFileCheck</name>
<state>0</state>
</option>
<option>
<name>CThirdPartyLogFileEditB</name>
<state>$TOOLKIT_DIR$\cspycomm.log</state>
</option>
<option>
<name>OCDriverInfo</name>
<state>1</state>
</option>
</data>
</settings>
<debuggerPlugins>
<plugin>
<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ewplugin</file>
<loadFlag>1</loadFlag>
</plugin>
<plugin>
<file>$EW_DIR$\common\plugins\Orti\Orti.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$EW_DIR$\common\plugins\Profiling\Profiling.ewplugin</file>
<loadFlag>1</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CMXArmPlugin.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CMXTinyArmPlugin.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\OSE\OseEpsilonPlugin.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
</debuggerPlugins>
</configuration>
<configuration>
<name>Flash Bin</name>
<toolchain>
<name>ARM</name>
</toolchain>
<debug>1</debug>
<settings>
<name>C-SPY</name>
<archiveVersion>2</archiveVersion>
<data>
<version>13</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>CInput</name>
<state>1</state>
</option>
<option>
<name>CEndian</name>
<state>1</state>
</option>
<option>
<name>CProcessor</name>
<state>1</state>
</option>
<option>
<name>OCVariant</name>
<state>0</state>
</option>
<option>
<name>MacOverride</name>
<state>1</state>
</option>
<option>
<name>MacFile</name>
<state>$PROJ_DIR$\resource\SAM7.mac</state>
</option>
<option>
<name>MemOverride</name>
<state>0</state>
</option>
<option>
<name>MemFile</name>
<state>$TOOLKIT_DIR$\CONFIG\ioat91sam7s64.ddf</state>
</option>
<option>
<name>RunToEnable</name>
<state>0</state>
</option>
<option>
<name>RunToName</name>
<state>main</state>
</option>
<option>
<name>CExtraOptionsCheck</name>
<state>0</state>
</option>
<option>
<name>CExtraOptions</name>
<state></state>
</option>
<option>
<name>CFpuProcessor</name>
<state>1</state>
</option>
<option>
<name>OCDDFArgumentProducer</name>
<state></state>
</option>
<option>
<name>OCDownloadSuppressDownload</name>
<state>0</state>
</option>
<option>
<name>OCDownloadVerifyAll</name>
<state>0</state>
</option>
<option>
<name>OCProductVersion</name>
<state>4.10B</state>
</option>
<option>
<name>OCDynDriverList</name>
<state>JLINK_ID</state>
</option>
<option>
<name>OCLastSavedByProductVersion</name>
<state>4.30A</state>
</option>
<option>
<name>OCDownloadAttachToProgram</name>
<state>0</state>
</option>
<option>
<name>FlashLoaders</name>
<state>,,,,(default),</state>
</option>
<option>
<name>UseFlashLoader</name>
<state>1</state>
</option>
</data>
</settings>
<settings>
<name>ARMSIM_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>0</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>OCSimDriverInfo</name>
<state>1</state>
</option>
</data>
</settings>
<settings>
<name>ANGEL_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>0</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>CCAngelHeartbeat</name>
<state>1</state>
</option>
<option>
<name>CAngelCommunication</name>
<state>1</state>
</option>
<option>
<name>CAngelCommBaud</name>
<version>0</version>
<state>3</state>
</option>
<option>
<name>CAngelCommPort</name>
<version>0</version>
<state>0</state>
</option>
<option>
<name>ANGELTCPIP</name>
<state>aaa.bbb.ccc.ddd</state>
</option>
<option>
<name>DoAngelLogfile</name>
<state>0</state>
</option>
<option>
<name>AngelLogFile</name>
<state>$TOOLKIT_DIR$\cspycomm.log</state>
</option>
<option>
<name>OCDriverInfo</name>
<state>1</state>
</option>
</data>
</settings>
<settings>
<name>IARROM_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>0</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>CRomLogFileCheck</name>
<state>0</state>
</option>
<option>
<name>CRomLogFileEditB</name>
<state>$TOOLKIT_DIR$\cspycomm.log</state>
</option>
<option>
<name>CRomCommunication</name>
<state>0</state>
</option>
<option>
<name>CRomCommPort</name>
<version>0</version>
<state>0</state>
</option>
<option>
<name>CRomCommBaud</name>
<version>0</version>
<state>7</state>
</option>
<option>
<name>OCDriverInfo</name>
<state>1</state>
</option>
</data>
</settings>
<settings>
<name>JLINK_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>2</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>JLinkSpeed</name>
<state>30</state>
</option>
<option>
<name>CCJLinkHWReset</name>
<state>0</state>
</option>
<option>
<name>CCJLinkTRSTReset</name>
<state>0</state>
</option>
<option>
<name>CCJLinkDoLogfile</name>
<state>0</state>
</option>
<option>
<name>CCJLinkLogFile</name>
<state>$TOOLKIT_DIR$\cspycomm.log</state>
</option>
<option>
<name>CCJLinkHWResetDelay</name>
<state></state>
</option>
<option>
<name>CCJLinkSpeedRadio</name>
<state>0</state>
</option>
<option>
<name>OCDriverInfo</name>
<state>1</state>
</option>
<option>
<name>JLinkInitialSpeed</name>
<state>32</state>
</option>
<option>
<name>CCDoJlinkMultiTarget</name>
<state>0</state>
</option>
<option>
<name>CCScanChainNonARMDevices</name>
<state>0</state>
</option>
<option>
<name>CCJLinkMultiTarget</name>
<state>0</state>
</option>
<option>
<name>CCJLinkIRLength</name>
<state>0</state>
</option>
<option>
<name>CCJLinkCommRadio</name>
<state>0</state>
</option>
<option>
<name>CCJLinkTCPIP</name>
<state>aaa.bbb.ccc.ddd</state>
</option>
</data>
</settings>
<settings>
<name>MACRAIGOR_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>1</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>jtag</name>
<version>0</version>
<state>0</state>
</option>
<option>
<name>EmuSpeed</name>
<state>1</state>
</option>
<option>
<name>TCPIP</name>
<state>aaa.bbb.ccc.ddd</state>
</option>
<option>
<name>DoLogfile</name>
<state>0</state>
</option>
<option>
<name>LogFile</name>
<state>$TOOLKIT_DIR$\cspycomm.log</state>
</option>
<option>
<name>DoEmuMultiTarget</name>
<state>0</state>
</option>
<option>
<name>EmuMultiTarget</name>
<state>0@ARM7TDMI</state>
</option>
<option>
<name>EmuHWReset</name>
<state>0</state>
</option>
<option>
<name>CEmuCommBaud</name>
<version>0</version>
<state>4</state>
</option>
<option>
<name>CEmuCommPort</name>
<version>0</version>
<state>0</state>
</option>
<option>
<name>jtago</name>
<version>0</version>
<state>0</state>
</option>
<option>
<name>OCDriverInfo</name>
<state>1</state>
</option>
<option>
<name>UnusedAddr</name>
<state>0x00800000</state>
</option>
<option>
<name>CCMacraigorHWResetDelay</name>
<state></state>
</option>
</data>
</settings>
<settings>
<name>RDI_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>1</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>CRDIDriverDll</name>
<state>Browse to your RDI driver</state>
</option>
<option>
<name>CRDILogFileCheck</name>
<state>0</state>
</option>
<option>
<name>CRDILogFileEdit</name>
<state>$TOOLKIT_DIR$\cspycomm.log</state>
</option>
<option>
<name>CCRDIHWReset</name>
<state>0</state>
</option>
<option>
<name>CCRDICatchReset</name>
<state>0</state>
</option>
<option>
<name>CCRDICatchUndef</name>
<state>0</state>
</option>
<option>
<name>CCRDICatchSWI</name>
<state>0</state>
</option>
<option>
<name>CCRDICatchData</name>
<state>0</state>
</option>
<option>
<name>CCRDICatchPrefetch</name>
<state>0</state>
</option>
<option>
<name>CCRDICatchIRQ</name>
<state>0</state>
</option>
<option>
<name>CCRDICatchFIQ</name>
<state>0</state>
</option>
<option>
<name>CCRDIUseETM</name>
<state>0</state>
</option>
<option>
<name>OCDriverInfo</name>
<state>1</state>
</option>
</data>
</settings>
<settings>
<name>THIRDPARTY_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>0</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>CThirdPartyDriverDll</name>
<state>Browse to your third-party driver</state>
</option>
<option>
<name>CThirdPartyLogFileCheck</name>
<state>0</state>
</option>
<option>
<name>CThirdPartyLogFileEditB</name>
<state>$TOOLKIT_DIR$\cspycomm.log</state>
</option>
<option>
<name>OCDriverInfo</name>
<state>1</state>
</option>
</data>
</settings>
<debuggerPlugins>
<plugin>
<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ewplugin</file>
<loadFlag>1</loadFlag>
</plugin>
<plugin>
<file>$EW_DIR$\common\plugins\Orti\Orti.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$EW_DIR$\common\plugins\Profiling\Profiling.ewplugin</file>
<loadFlag>1</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CMXArmPlugin.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CMXTinyArmPlugin.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\OSE\OseEpsilonPlugin.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
</debuggerPlugins>
</configuration>
</project>

File diff suppressed because it is too large Load diff

View file

@ -1,10 +0,0 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<workspace>
<project>
<path>$WS_DIR$\rtosdemo.ewp</path>
</project>
<batchBuild/>
</workspace>

View file

@ -1,246 +0,0 @@
/*
FreeRTOS.org V4.2.0 - Copyright (C) 2003-2007 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
See http://www.FreeRTOS.org for documentation, latest information, license
and contact details. Please ensure to read the configuration and relevant
port sections of the online documentation.
***************************************************************************
*/
/*
BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART0.
*/
/* Standard includes. */
#include <stdlib.h>
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "queue.h"
/* Demo application includes. */
#include "serial.h"
/*-----------------------------------------------------------*/
/* Location of the COM0 registers. */
#define serCOM0 ( ( AT91PS_USART ) AT91C_BASE_US0 )
/* Interrupt control macros. */
#define serINTERRUPT_LEVEL ( 5 )
#define vInterruptOn() AT91F_US_EnableIt( serCOM0, AT91C_US_TXRDY | AT91C_US_RXRDY )
#define vInterruptOff() AT91F_US_DisableIt( serCOM0, AT91C_US_TXRDY )
/* Misc constants. */
#define serINVALID_QUEUE ( ( xQueueHandle ) 0 )
#define serHANDLE ( ( xComPortHandle ) 1 )
#define serNO_BLOCK ( ( portTickType ) 0 )
#define serNO_TIMEGUARD ( ( unsigned portLONG ) 0 )
#define serNO_PERIPHERAL_B_SETUP ( ( unsigned portLONG ) 0 )
/* Queues used to hold received characters, and characters waiting to be
transmitted. */
static xQueueHandle xRxedChars;
static xQueueHandle xCharsForTx;
/*-----------------------------------------------------------*/
/* Interrupt entry point written in the assembler file serialISR.s79. */
extern void vSerialISREntry( void );
/* The interrupt service routine - called from the assembly entry point. */
__arm void vSerialISR( void );
/*-----------------------------------------------------------*/
/*
* See the serial2.h header file.
*/
xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
{
xComPortHandle xReturn = serHANDLE;
extern void ( vUART_ISR )( void );
/* Create the queues used to hold Rx and Tx characters. */
xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
/* If the queues were created correctly then setup the serial port
hardware. */
if( ( xRxedChars != serINVALID_QUEUE ) && ( xCharsForTx != serINVALID_QUEUE ) )
{
portENTER_CRITICAL();
{
/* Enable the USART clock. */
AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, 1 << AT91C_ID_US0 );
AT91F_PIO_CfgPeriph( AT91C_BASE_PIOA, ( ( unsigned portLONG ) AT91C_PA5_RXD0 ) | ( ( unsigned portLONG ) AT91C_PA6_TXD0 ), serNO_PERIPHERAL_B_SETUP );
/* Set the required protocol. */
AT91F_US_Configure( serCOM0, configCPU_CLOCK_HZ, AT91C_US_ASYNC_MODE, ulWantedBaud, serNO_TIMEGUARD );
/* Enable Rx and Tx. */
serCOM0->US_CR = AT91C_US_RXEN | AT91C_US_TXEN;
/* Enable the Rx interrupts. The Tx interrupts are not enabled
until there are characters to be transmitted. */
AT91F_US_EnableIt( serCOM0, AT91C_US_RXRDY );
/* Enable the interrupts in the AIC. */
AT91F_AIC_ConfigureIt( AT91C_BASE_AIC, AT91C_ID_US0, serINTERRUPT_LEVEL, AT91C_AIC_SRCTYPE_INT_LEVEL_SENSITIVE, ( void (*)( void ) ) vSerialISREntry );
AT91F_AIC_EnableIt( AT91C_BASE_AIC, AT91C_ID_US0 );
}
portEXIT_CRITICAL();
}
else
{
xReturn = ( xComPortHandle ) 0;
}
/* This demo file only supports a single port but we have to return
something to comply with the standard demo header file. */
return xReturn;
}
/*-----------------------------------------------------------*/
signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )
{
/* The port handle is not required as this driver only supports one port. */
( void ) pxPort;
/* Get the next character from the buffer. Return false if no characters
are available, or arrive before xBlockTime expires. */
if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
{
return pdTRUE;
}
else
{
return pdFALSE;
}
}
/*-----------------------------------------------------------*/
void vSerialPutString( xComPortHandle pxPort, const signed portCHAR * const pcString, unsigned portSHORT usStringLength )
{
signed portCHAR *pxNext;
/* A couple of parameters that this port does not use. */
( void ) usStringLength;
( void ) pxPort;
/* NOTE: This implementation does not handle the queue being full as no
block time is used! */
/* The port handle is not required as this driver only supports UART0. */
( void ) pxPort;
/* Send each character in the string, one at a time. */
pxNext = ( signed portCHAR * ) pcString;
while( *pxNext )
{
xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );
pxNext++;
}
}
/*-----------------------------------------------------------*/
signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
{
/* Place the character in the queue of characters to be transmitted. */
if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )
{
return pdFAIL;
}
/* Turn on the Tx interrupt so the ISR will remove the character from the
queue and send it. This does not need to be in a critical section as
if the interrupt has already removed the character the next interrupt
will simply turn off the Tx interrupt again. */
vInterruptOn();
return pdPASS;
}
/*-----------------------------------------------------------*/
void vSerialClose( xComPortHandle xPort )
{
/* Not supported as not required by the demo application. */
}
/*-----------------------------------------------------------*/
/* Serial port ISR. This can cause a context switch so is not defined as a
standard ISR using the __irq keyword. Instead a wrapper function is defined
within serialISR.s79 which in turn calls this function. See the port
documentation on the FreeRTOS.org website for more information. */
__arm void vSerialISR( void )
{
unsigned portLONG ulStatus;
signed portCHAR cChar;
portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByPost = pdFALSE;
/* What caused the interrupt? */
ulStatus = serCOM0->US_CSR &= serCOM0->US_IMR;
if( ulStatus & AT91C_US_TXRDY )
{
/* The interrupt was caused by the THR becoming empty. Are there any
more characters to transmit? */
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWokenByTx ) == pdTRUE )
{
/* A character was retrieved from the queue so can be sent to the
THR now. */
serCOM0->US_THR = cChar;
}
else
{
/* Queue empty, nothing to send so turn off the Tx interrupt. */
vInterruptOff();
}
}
if( ulStatus & AT91C_US_RXRDY )
{
/* The interrupt was caused by a character being received. Grab the
character from the RHR and place it in the queue or received
characters. */
cChar = serCOM0->US_RHR;
xTaskWokenByPost = xQueueSendFromISR( xRxedChars, &cChar, xTaskWokenByPost );
}
/* If a task was woken by either a character being received or a character
being transmitted then we may need to switch to another task. */
portEND_SWITCHING_ISR( ( xTaskWokenByPost || xTaskWokenByTx ) );
/* End the interrupt in the AIC. */
AT91C_BASE_AIC->AIC_EOICR = 0;
}

View file

@ -1,24 +0,0 @@
RSEG ICODE:CODE
CODE32
EXTERN vSerialISR
PUBLIC vSerialISREntry
; Wrapper for the serial port interrupt service routine. This can cause a
; context switch so requires an assembly wrapper.
; Defines the portSAVE_CONTEXT and portRESTORE_CONTEXT macros.
#include "ISR_Support.h"
vSerialISREntry:
portSAVE_CONTEXT ; Save the context of the current task.
bl vSerialISR ; Call the ISR routine.
portRESTORE_CONTEXT ; Restore the context of the current task -
; which may be different to the task that
; was interrupted.
END

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@ -1,71 +0,0 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<Project>
<Desktop>
<Static>
<Workspace>
<ColumnWidths>
<Column0>189</Column0><Column1>27</Column1><Column2>27</Column2></ColumnWidths>
</Workspace>
<Disassembly>
<PreferedWindows><Position>2</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows><MixedMode>1</MixedMode><CodeCovEnabled>0</CodeCovEnabled><CodeCovShow>0</CodeCovShow></Disassembly>
<Debug-Log/>
<Build/>
<Register><PreferedWindows><Position>2</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows></Register><QWatch><Column0>188</Column0><Column1>171</Column1><Column2>100</Column2><Column3>100</Column3></QWatch><Memory><ZoneNumber>0</ZoneNumber><FindDirection>1</FindDirection><FindAsHex>0</FindAsHex></Memory><Watch><Format><struct_types/><watch_formats/></Format></Watch></Static>
<Windows>
<Wnd0>
<Tabs>
<Tab>
<Identity>TabID-23416-30482</Identity>
<TabName>Workspace</TabName>
<Factory>Workspace</Factory>
<Session>
<NodeDict><ExpandedNode>rtosdemo</ExpandedNode></NodeDict></Session>
</Tab>
</Tabs>
<SelectedTab>0</SelectedTab></Wnd0>
<Wnd2>
<Tabs>
<Tab>
<Identity>TabID-12145-30489</Identity>
<TabName>Debug Log</TabName>
<Factory>Debug-Log</Factory>
<Session/>
</Tab>
<Tab>
<Identity>TabID-22894-30492</Identity>
<TabName>Build</TabName>
<Factory>Build</Factory>
<Session/>
</Tab>
</Tabs>
<SelectedTab>1</SelectedTab></Wnd2>
<Wnd4><Tabs><Tab><Identity>TabID-18780-12821</Identity><TabName>Memory</TabName><Factory>Memory</Factory><Session><SelectionAnchor>2097764</SelectionAnchor><SelectionEnd>2097764</SelectionEnd><UnitsPerGroup>1</UnitsPerGroup><EndianMode>0</EndianMode><DataCovEnabled>0</DataCovEnabled><DataCovShown>0</DataCovShown></Session></Tab></Tabs><SelectedTab>0</SelectedTab></Wnd4><Wnd5><Tabs><Tab><Identity>TabID-23506-14575</Identity><TabName>Watch</TabName><Factory>Watch</Factory><Session><Expressions><Expression><Expression>pxCurrentTCB</Expression></Expression><Expression><Expression>ulCriticalNesting</Expression></Expression></Expressions><TabId>0</TabId><Column0>176</Column0><Column1>100</Column1><Column2>100</Column2><Column3>100</Column3></Session></Tab></Tabs><SelectedTab>0</SelectedTab></Wnd5><Wnd1><Tabs><Tab><Identity>TabID-4859-22480</Identity><TabName>Disassembly</TabName><Factory>Disassembly</Factory><Session/></Tab></Tabs><SelectedTab>0</SelectedTab></Wnd1><Wnd3><Tabs><Tab><Identity>TabID-154-22568</Identity><TabName>Register</TabName><Factory>Register</Factory><Session><REG1>0</REG1><REG2>0</REG2><Group>0</Group><States>1</States><State0>CPSR</State0></Session></Tab></Tabs><SelectedTab>0</SelectedTab></Wnd3></Windows>
<Editor>
<Pane><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Demo\ARM7_Ateml_IAR\main.c</Filename><XPos>0</XPos><YPos>10</YPos><SelStart>378</SelStart><SelEnd>378</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\source\include\task.h</Filename><XPos>0</XPos><YPos>778</YPos><SelStart>24283</SelStart><SelEnd>24283</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Source\tasks.c</Filename><XPos>0</XPos><YPos>939</YPos><SelStart>30511</SelStart><SelEnd>30511</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Demo\ARM7_Ateml_IAR\SrcIAR\Cstartup.s79</Filename><XPos>0</XPos><YPos>48</YPos><SelStart>2226</SelStart><SelEnd>2226</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Demo\Common\Minimal\flash.c</Filename><XPos>0</XPos><YPos>98</YPos><SelStart>4025</SelStart><SelEnd>4025</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Source\portable\IAR\AtmelSAM7\portasm.s79</Filename><XPos>0</XPos><YPos>41</YPos><SelStart>1057</SelStart><SelEnd>1079</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Demo\ARM7_Ateml_IAR\srciar\lib_AT91SAM7S64.h</Filename><XPos>0</XPos><YPos>2778</YPos><SelStart>108450</SelStart><SelEnd>108450</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Source\portable\IAR\AtmelSAM7\port.c</Filename><XPos>0</XPos><YPos>136</YPos><SelStart>5326</SelStart><SelEnd>5326</SelEnd></Tab><ActiveTab>7</ActiveTab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Demo\ARM7_Ateml_IAR\ParTest\ParTest.c</Filename><XPos>0</XPos><YPos>36</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Source\portable\IAR\AtmelSAM7\portmacro.h</Filename><XPos>0</XPos><YPos>67</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd></Tab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>
<Positions>
<Top><Row0><Sizes><Toolbar-0084f8a0><key>IarIdePM1</key></Toolbar-0084f8a0></Sizes></Row0><Row1><Sizes><Toolbar-031ef990><key>DebuggerGui1</key></Toolbar-031ef990></Sizes></Row1></Top><Left><Row0><Sizes><Wnd0><Rect><Top>-2</Top><Left>-2</Left><Bottom>715</Bottom><Right>263</Right><x>-2</x><y>-2</y><xscreen>153</xscreen><yscreen>153</yscreen><sizeHorzCX>95625</sizeHorzCX><sizeHorzCY>136729</sizeHorzCY><sizeVertCX>165625</sizeVertCX><sizeVertCY>640750</sizeVertCY></Rect></Wnd0></Sizes></Row0></Left><Right><Row0><Sizes><Wnd1><Rect><Top>-2</Top><Left>-2</Left><Bottom>715</Bottom><Right>647</Right><x>-2</x><y>-2</y><xscreen>190</xscreen><yscreen>190</yscreen><sizeHorzCX>118750</sizeHorzCX><sizeHorzCY>169794</sizeHorzCY><sizeVertCX>405625</sizeVertCX><sizeVertCY>640750</sizeVertCY></Rect></Wnd1></Sizes></Row0><Row1><Sizes><Wnd3><Rect><Top>-2</Top><Left>645</Left><Bottom>715</Bottom><Right>1025</Right><x>645</x><y>-2</y><xscreen>190</xscreen><yscreen>190</yscreen><sizeHorzCX>118750</sizeHorzCX><sizeHorzCY>169794</sizeHorzCY><sizeVertCX>237500</sizeVertCX><sizeVertCY>640750</sizeVertCY></Rect></Wnd3></Sizes></Row1></Right><Bottom><Row0><Sizes><Wnd2><Rect><Top>-2</Top><Left>-2</Left><Bottom>151</Bottom><Right>1602</Right><x>-2</x><y>-2</y><xscreen>1604</xscreen><yscreen>153</yscreen><sizeHorzCX>1002500</sizeHorzCX><sizeHorzCY>136729</sizeHorzCY><sizeVertCX>95625</sizeVertCX><sizeVertCY>136729</sizeVertCY></Rect></Wnd2></Sizes></Row0><Row1><Sizes><Wnd4><Rect><Top>149</Top><Left>-2</Left><Bottom>333</Bottom><Right>669</Right><x>-2</x><y>149</y><xscreen>671</xscreen><yscreen>184</yscreen><sizeHorzCX>419375</sizeHorzCX><sizeHorzCY>164432</sizeHorzCY><sizeVertCX>114375</sizeVertCX><sizeVertCY>163538</sizeVertCY></Rect></Wnd4><Wnd5><Rect><Top>149</Top><Left>667</Left><Bottom>333</Bottom><Right>1602</Right><x>667</x><y>149</y><xscreen>935</xscreen><yscreen>184</yscreen><sizeHorzCX>584375</sizeHorzCX><sizeHorzCY>164432</sizeHorzCY><sizeVertCX>115000</sizeVertCX><sizeVertCY>598748</sizeVertCY></Rect></Wnd5></Sizes></Row1></Bot
tom><Float><Sizes/></Float></Positions>
</Desktop>
</Project>

View file

@ -1,23 +0,0 @@
[DisAssemblyWindow]
NumStates=_ 1
State 1=_ 1
[JLinkDriver]
WatchVectorCatch=_ 0
WatchCond=_ 0
Watch0=_ 0 "" 0 "" 0 "" 0 "" 0 0 0 0
Watch1=_ 0 "" 0 "" 0 "" 0 "" 0 0 0 0
[Log file]
LoggingEnabled=_ 0
LogFile=_ ""
Category=_ 0
[TermIOLog]
LoggingEnabled=_ 0
LogFile=_ ""
[Disassemble mode]
mode=0
[Breakpoints]
Bp0=_ "Code" "{E:\Dev\FreeRTOS\Source\portable\IAR\AtmelSAM7\port.c}.141.1@1" 1 0 0 0 "" 0 ""
Count=1
[Low Level]
Pipeline mode=0
Initialized=0

View file

@ -1,80 +0,0 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<Workspace>
<ConfigDictionary>
<CurrentConfigs><Project>rtosdemo/Flash Debug</Project></CurrentConfigs></ConfigDictionary>
<Desktop>
<Static>
<Workspace>
<ColumnWidths>
<Column0>232</Column0><Column1>27</Column1><Column2>27</Column2></ColumnWidths>
</Workspace>
<Build/>
<TerminalIO/>
<Profiling/>
<Watch>
<Format>
<struct_types/>
<watch_formats/>
</Format>
</Watch>
<Debug-Log/>
<Disassembly>
<MixedMode>1</MixedMode><CodeCovEnabled>0</CodeCovEnabled><CodeCovShow>0</CodeCovShow></Disassembly>
<CodeCoveragePlugin/><Memory><ZoneNumber>0</ZoneNumber><FindDirection>1</FindDirection><FindAsHex>0</FindAsHex></Memory></Static>
<Windows>
<Wnd6>
<Tabs>
<Tab>
<Identity>TabID-29690-30365</Identity>
<TabName>Workspace</TabName>
<Factory>Workspace</Factory>
<Session>
<NodeDict><ExpandedNode>rtosdemo</ExpandedNode></NodeDict></Session>
</Tab>
</Tabs>
<SelectedTab>0</SelectedTab></Wnd6><Wnd7>
<Tabs>
<Tab>
<Identity>TabID-27076-30414</Identity>
<TabName>Build</TabName>
<Factory>Build</Factory>
<Session/>
</Tab>
<Tab>
<Identity>TabID-12668-30479</Identity>
<TabName>Debug Log</TabName>
<Factory>Debug-Log</Factory>
<Session/>
</Tab>
</Tabs>
<SelectedTab>1</SelectedTab></Wnd7></Windows>
<Editor>
<Pane><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\source\include\task.h</Filename><XPos>0</XPos><YPos>778</YPos><SelStart>24283</SelStart><SelEnd>24283</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Source\portable\IAR\AtmelSAM7\portasm.s79</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>2583</SelStart><SelEnd>2583</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Demo\ARM7_Ateml_IAR\main.c</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Demo\ARM7_Ateml_IAR\SrcIAR\Cstartup.s79</Filename><XPos>0</XPos><YPos>30</YPos><SelStart>2226</SelStart><SelEnd>2226</SelEnd></Tab><ActiveTab>3</ActiveTab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Demo\ARM7_Ateml_IAR\srciar\lib_AT91SAM7S64.h</Filename><XPos>0</XPos><YPos>2371</YPos><SelStart>92638</SelStart><SelEnd>92638</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Demo\Common\Minimal\flash.c</Filename><XPos>0</XPos><YPos>98</YPos><SelStart>4025</SelStart><SelEnd>4025</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Source\portable\IAR\AtmelSAM7\port.c</Filename><XPos>0</XPos><YPos>177</YPos><SelStart>7662</SelStart><SelEnd>7662</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Demo\ARM7_Ateml_IAR\ParTest\ParTest.c</Filename><XPos>0</XPos><YPos>36</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Source\portable\IAR\AtmelSAM7\portmacro.h</Filename><XPos>0</XPos><YPos>21</YPos><SelStart>2110</SelStart><SelEnd>2110</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Demo\ARM7_Ateml_IAR\SrcIAR\Cstartup_SAM7.c</Filename><XPos>0</XPos><YPos>29</YPos><SelStart>3116</SelStart><SelEnd>3116</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Source\portable\MemMang\heap_2.c</Filename><XPos>0</XPos><YPos>170</YPos><SelStart>7352</SelStart><SelEnd>7352</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Source\tasks.c</Filename><XPos>0</XPos><YPos>1270</YPos><SelStart>40884</SelStart><SelEnd>40884</SelEnd></Tab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>
<Positions>
<Top><Row0><Sizes><Toolbar-0084f7c0><key>IarIdePM1</key></Toolbar-0084f7c0></Sizes></Row0></Top><Left><Row0><Sizes><Wnd6><Rect><Top>-2</Top><Left>-2</Left><Bottom>866</Bottom><Right>306</Right><x>-2</x><y>-2</y><xscreen>48</xscreen><yscreen>48</yscreen><sizeHorzCX>30000</sizeHorzCX><sizeHorzCY>42895</sizeHorzCY><sizeVertCX>192500</sizeVertCX><sizeVertCY>775692</sizeVertCY></Rect></Wnd6></Sizes></Row0></Left><Right><Row0><Sizes/></Row0></Right><Bottom><Row0><Sizes><Wnd7><Rect><Top>-2</Top><Left>-2</Left><Bottom>206</Bottom><Right>1602</Right><x>-2</x><y>-2</y><xscreen>1604</xscreen><yscreen>208</yscreen><sizeHorzCX>1002500</sizeHorzCX><sizeHorzCY>185880</sizeHorzCY><sizeVertCX>30000</sizeVertCX><sizeVertCY>42895</sizeVertCY></Rect></Wnd7></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>
</Desktop>
</Workspace>

View file

@ -1,62 +0,0 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<Project>
<Desktop>
<Static>
<Workspace>
<ColumnWidths>
<Column0>191</Column0><Column1>27</Column1><Column2>27</Column2></ColumnWidths>
</Workspace>
<Disassembly>
<PreferedWindows><Position>2</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows><MixedMode>1</MixedMode><CodeCovEnabled>0</CodeCovEnabled><CodeCovShow>0</CodeCovShow></Disassembly>
<Debug-Log><PreferedWindows><Position>3</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows><Window><Factory>Build</Factory></Window></Windows></PreferedWindows></Debug-Log>
<Build><PreferedWindows><Position>3</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows><Window><Factory>Debug-Log</Factory></Window></Windows></PreferedWindows></Build>
<Register>
<PreferedWindows>
<Position>2</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows>
</Register>
<QWatch><Column0>161</Column0><Column1>100</Column1><Column2>100</Column2><Column3>100</Column3></QWatch><Memory><PreferedWindows><Position>3</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows><ZoneNumber>0</ZoneNumber><FindDirection>1</FindDirection><FindAsHex>0</FindAsHex></Memory></Static>
<Windows>
<Wnd2>
<Tabs>
<Tab>
<Identity>TabID-22256-14845</Identity>
<TabName>Workspace</TabName>
<Factory>Workspace</Factory>
<Session>
<NodeDict><ExpandedNode>rtosdemo</ExpandedNode><ExpandedNode>rtosdemo/USBSample.c</ExpandedNode></NodeDict></Session>
</Tab>
</Tabs>
<SelectedTab>0</SelectedTab></Wnd2></Windows>
<Editor>
<Pane><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\source\portable\iar\AtmelSAM7S64\lib_AT91SAM7S64.h</Filename><XPos>0</XPos><YPos>615</YPos><SelStart>24806</SelStart><SelEnd>24806</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Demo\ARM7_AT91SAM7S64_IAR\USB\USBSample.c</Filename><XPos>0</XPos><YPos>289</YPos><SelStart>10498</SelStart><SelEnd>10498</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Demo\ARM7_AT91SAM7S64_IAR\main.c</Filename><XPos>0</XPos><YPos>141</YPos><SelStart>6420</SelStart><SelEnd>6420</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Source\portable\IAR\AtmelSAM7S64\port.c</Filename><XPos>0</XPos><YPos>117</YPos><SelStart>5493</SelStart><SelEnd>5493</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Demo\ARM7_AT91SAM7S64_IAR\serial\serial.c</Filename><XPos>0</XPos><YPos>132</YPos><SelStart>5547</SelStart><SelEnd>5547</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Source\portable\MemMang\heap_1.c</Filename><XPos>0</XPos><YPos>82</YPos><SelStart>3650</SelStart><SelEnd>3650</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Demo\ARM7_AT91SAM7S64_IAR\SrcIAR\Cstartup.s79</Filename><XPos>0</XPos><YPos>27</YPos><SelStart>2226</SelStart><SelEnd>2226</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Demo\Common\Minimal\integer.c</Filename><XPos>0</XPos><YPos>77</YPos><SelStart>4024</SelStart><SelEnd>4024</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Source\tasks.c</Filename><XPos>0</XPos><YPos>823</YPos><SelStart>29289</SelStart><SelEnd>29289</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Source\portable\IAR\AtmelSAM7S64\portasm.s79</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>519</SelStart><SelEnd>519</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Source\portable\IAR\AtmelSAM7S64\portmacro.h</Filename><XPos>0</XPos><YPos>57</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Demo\ARM7_AT91SAM7S64_IAR\FreeRTOSConfig.h</Filename><XPos>0</XPos><YPos>24</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Demo\Common\Minimal\semtest.c</Filename><XPos>0</XPos><YPos>166</YPos><SelStart>7856</SelStart><SelEnd>7856</SelEnd></Tab><ActiveTab>12</ActiveTab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>
<Positions>
<Top><Row0><Sizes><Toolbar-0084f8b0><key>IarIdePM1</key></Toolbar-0084f8b0><Toolbar-0272db18><key>DebuggerGui1</key></Toolbar-0272db18></Sizes></Row0></Top><Left><Row0><Sizes><Wnd2><Rect><Top>-2</Top><Left>-2</Left><Bottom>1072</Bottom><Right>265</Right><x>-2</x><y>-2</y><xscreen>0</xscreen><yscreen>0</yscreen><sizeHorzCX>0</sizeHorzCX><sizeHorzCY>0</sizeHorzCY><sizeVertCX>166875</sizeVertCX><sizeVertCY>959785</sizeVertCY></Rect></Wnd2></Sizes></Row0></Left><Right><Row0><Sizes/></Row0></Right><Bottom><Row0><Sizes/></Row0></Bottom><Float><Sizes/></Float></Positions>
</Desktop>
</Project>

View file

@ -1,22 +0,0 @@
[DisAssemblyWindow]
NumStates=_ 1
State 1=_ 1
[JLinkDriver]
WatchVectorCatch=_ 0
WatchCond=_ 0
Watch0=_ 0 "" 0 "" 0 "" 0 "" 0 0 0 0
Watch1=_ 0 "" 0 "" 0 "" 0 "" 0 0 0 0
[Low Level]
Pipeline mode=1
Initialized=0
[Log file]
LoggingEnabled=_ 0
LogFile=_ ""
Category=_ 0
[TermIOLog]
LoggingEnabled=_ 0
LogFile=_ ""
[Disassemble mode]
mode=0
[Breakpoints]
Count=0

View file

@ -1,76 +0,0 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<Workspace>
<ConfigDictionary>
<CurrentConfigs><Project>rtosdemo/Flash Debug</Project></CurrentConfigs></ConfigDictionary>
<Desktop>
<Static>
<Workspace>
<ColumnWidths>
<Column0>221</Column0><Column1>27</Column1><Column2>27</Column2><Column3>27</Column3></ColumnWidths>
</Workspace>
<Build><ColumnWidth0>18</ColumnWidth0><ColumnWidth1>1155</ColumnWidth1><ColumnWidth2>308</ColumnWidth2><ColumnWidth3>77</ColumnWidth3></Build>
<Debug-Log/>
<TerminalIO/>
<CodeCoveragePlugin/>
<Profiling/>
<Watch>
<Format>
<struct_types/>
<watch_formats/>
</Format>
</Watch>
<Disassembly><MixedMode>1</MixedMode><CodeCovEnabled>0</CodeCovEnabled><CodeCovShow>0</CodeCovShow></Disassembly><Memory><ZoneNumber>0</ZoneNumber><FindDirection>1</FindDirection><FindAsHex>0</FindAsHex></Memory></Static>
<Windows>
<Wnd0>
<Tabs>
<Tab>
<Identity>TabID-17425-14382</Identity>
<TabName>Workspace</TabName>
<Factory>Workspace</Factory>
<Session>
<NodeDict><ExpandedNode>rtosdemo</ExpandedNode><ExpandedNode>rtosdemo/Demo Source</ExpandedNode><ExpandedNode>rtosdemo/Scheduler Source</ExpandedNode><ExpandedNode>rtosdemo/System Files</ExpandedNode></NodeDict></Session>
</Tab>
</Tabs>
<SelectedTab>0</SelectedTab></Wnd0><Wnd1>
<Tabs>
<Tab>
<Identity>TabID-4084-16269</Identity>
<TabName>Build</TabName>
<Factory>Build</Factory>
<Session/>
</Tab>
<Tab>
<Identity>TabID-25581-16276</Identity>
<TabName>Debug Log</TabName>
<Factory>Debug-Log</Factory>
<Session/>
</Tab>
</Tabs>
<SelectedTab>0</SelectedTab></Wnd1></Windows>
<Editor>
<Pane><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Demo\ARM7_AT91SAM7S64_IAR\FreeRTOSConfig.h</Filename><XPos>0</XPos><YPos>18</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Demo\ARM7_AT91SAM7S64_IAR\SrcIAR\Board.h</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>952</SelStart><SelEnd>969</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Demo\ARM7_AT91SAM7S64_IAR\SrcIAR\Cstartup.s79</Filename><XPos>0</XPos><YPos>142</YPos><SelStart>6503</SelStart><SelEnd>6517</SelEnd></Tab><ActiveTab>2</ActiveTab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>
<Positions>
<Top><Row0><Sizes><Toolbar-0084c368><key>iaridepm1</key></Toolbar-0084c368></Sizes></Row0></Top><Left><Row0><Sizes><Wnd0><Rect><Top>-2</Top><Left>-2</Left><Bottom>659</Bottom><Right>295</Right><x>-2</x><y>-2</y><xscreen>30</xscreen><yscreen>30</yscreen><sizeHorzCX>18750</sizeHorzCX><sizeHorzCY>26809</sizeHorzCY><sizeVertCX>185625</sizeVertCX><sizeVertCY>590705</sizeVertCY></Rect></Wnd0></Sizes></Row0></Left><Right><Row0><Sizes/></Row0></Right><Bottom><Row0><Sizes><Wnd1><Rect><Top>-2</Top><Left>-2</Left><Bottom>413</Bottom><Right>1602</Right><x>-2</x><y>-2</y><xscreen>1604</xscreen><yscreen>415</yscreen><sizeHorzCX>1002500</sizeHorzCX><sizeHorzCY>370866</sizeHorzCY><sizeVertCX>18750</sizeVertCX><sizeVertCY>26809</sizeVertCY></Rect></Wnd1></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>
</Desktop>
</Workspace>

View file

@ -1,78 +0,0 @@
/*
FreeRTOS.org V4.2.0 - Copyright (C) 2003-2007 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
See http://www.FreeRTOS.org for documentation, latest information, license
and contact details. Please ensure to read the configuration and relevant
port sections of the online documentation.
***************************************************************************
*/
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
#include <lpc210x.h>
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
*----------------------------------------------------------*/
#define configUSE_PREEMPTION 1
#define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 0
#define configCPU_CLOCK_HZ ( ( unsigned portLONG ) 58982400 ) /* =14.7456MHz xtal multiplied by 4 using the PLL. */
#define configTICK_RATE_HZ ( ( portTickType ) 1000 )
#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 5 )
#define configMINIMAL_STACK_SIZE ( ( unsigned portSHORT ) 128 )
#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 23 * 1024 ) )
#define configMAX_TASK_NAME_LEN ( 16 )
#define configUSE_TRACE_FACILITY 0
#define configUSE_16_BIT_TICKS 0
#define configIDLE_SHOULD_YIELD 1
/* Co-routine definitions. */
#define configUSE_CO_ROUTINES 0
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
/* Set the following definitions to 1 to include the API function, or zero
to exclude the API function. */
#define INCLUDE_vTaskPrioritySet 1
#define INCLUDE_uxTaskPriorityGet 1
#define INCLUDE_vTaskDelete 1
#define INCLUDE_vTaskCleanUpResources 0
#define INCLUDE_vTaskSuspend 1
#define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelay 1
#endif /* FREERTOS_CONFIG_H */

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@ -1,118 +0,0 @@
# FreeRTOS.org V4.2.0 - Copyright (C) 2003-2007 Richard Barry.
#
# This file is part of the FreeRTOS.org distribution.
#
# FreeRTOS.org is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 2 of the License, or
# (at your option) any later version.
#
# FreeRTOS.org is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with FreeRTOS.org; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
#
# A special exception to the GPL can be applied should you wish to distribute
# a combined work that includes FreeRTOS.org, without being obliged to provide
# the source code for any proprietary components. See the licensing section
# of http://www.FreeRTOS.org for full details of how and when the exception
# can be applied.
#
# ***************************************************************************
# See http://www.FreeRTOS.org for documentation, latest information, license
# and contact details. Please ensure to read the configuration and relevant
# port sections of the online documentation.
# ***************************************************************************
# Changes from V2.4.2
#
# + Replaced source/portable/gcc/arm7/portheap.c with source/portable/memmang/heap_2.c.
CC=arm-elf-gcc
OBJCOPY=arm-elf-objcopy
ARCH=arm-elf-ar
CRT0=boot.s
WARNINGS=-Wall -Wextra -Wshadow -Wpointer-arith -Wbad-function-cast -Wcast-align -Wsign-compare \
-Waggregate-return -Wstrict-prototypes -Wmissing-prototypes -Wmissing-declarations -Wunused
#
# CFLAGS common to both the THUMB and ARM mode builds
#
CFLAGS=$(WARNINGS) -D $(RUN_MODE) -D GCC_ARM7 -I. -I../../Source/include \
-I../Common/include $(DEBUG) -mcpu=arm7tdmi -T$(LDSCRIPT) \
$(OPTIM) -fomit-frame-pointer
ifeq ($(USE_THUMB_MODE),YES)
CFLAGS += -mthumb-interwork -D THUMB_INTERWORK
THUMB_FLAGS=-mthumb
endif
LINKER_FLAGS=-Xlinker -ortosdemo.elf -Xlinker -M -Xlinker -Map=rtosdemo.map
RTOS_SOURCE_DIR=../../Source
DEMO_SOURCE_DIR=../Common/Minimal
#
# Source files that can be built to THUMB mode.
#
THUMB_SRC = \
main.c \
serial/serial.c \
ParTest/ParTest.c \
$(DEMO_SOURCE_DIR)/integer.c \
$(DEMO_SOURCE_DIR)/flash.c \
$(DEMO_SOURCE_DIR)/PollQ.c \
$(DEMO_SOURCE_DIR)/comtest.c \
$(DEMO_SOURCE_DIR)/flop.c \
$(DEMO_SOURCE_DIR)/semtest.c \
$(DEMO_SOURCE_DIR)/dynamic.c \
$(DEMO_SOURCE_DIR)/BlockQ.c \
$(RTOS_SOURCE_DIR)/tasks.c \
$(RTOS_SOURCE_DIR)/queue.c \
$(RTOS_SOURCE_DIR)/list.c \
$(RTOS_SOURCE_DIR)/portable/MemMang/heap_2.c \
$(RTOS_SOURCE_DIR)/portable/GCC/ARM7_LPC2000/port.c
#
# Source files that must be built to ARM mode.
#
ARM_SRC = \
$(RTOS_SOURCE_DIR)/portable/GCC/ARM7_LPC2000/portISR.c \
serial/serialISR.c
#
# Define all object files.
#
ARM_OBJ = $(ARM_SRC:.c=.o)
THUMB_OBJ = $(THUMB_SRC:.c=.o)
rtosdemo.hex : rtosdemo.elf
$(OBJCOPY) rtosdemo.elf -O ihex rtosdemo.hex
rtosdemo.elf : $(ARM_OBJ) $(THUMB_OBJ) $(CRT0) Makefile
$(CC) $(CFLAGS) $(ARM_OBJ) $(THUMB_OBJ) -nostartfiles $(CRT0) $(LINKER_FLAGS)
$(THUMB_OBJ) : %.o : %.c $(LDSCRIPT) Makefile
$(CC) -c $(THUMB_FLAGS) $(CFLAGS) $< -o $@
$(ARM_OBJ) : %.o : %.c $(LDSCRIPT) Makefile
$(CC) -c $(CFLAGS) $< -o $@
clean :
touch Makefile

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@ -1,106 +0,0 @@
/*
FreeRTOS.org V4.2.0 - Copyright (C) 2003-2007 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
See http://www.FreeRTOS.org for documentation, latest information, license
and contact details. Please ensure to read the configuration and relevant
port sections of the online documentation.
***************************************************************************
*/
/*
Changes from V2.5.2
+ All LED's are turned off to start.
*/
#include "FreeRTOS.h"
#include "partest.h"
#define partstFIRST_IO ( ( unsigned portLONG ) 0x400 )
#define partstNUM_LEDS ( 4 )
#define partstALL_OUTPUTS_OFF ( ( unsigned portLONG ) 0xffffffff )
/*-----------------------------------------------------------
* Simple parallel port IO routines.
*-----------------------------------------------------------*/
void vParTestInitialise( void )
{
/* This is performed from main() as the io bits are shared with other setup
functions. */
/* Turn all outputs off. */
GPIO_IOSET = partstALL_OUTPUTS_OFF;
}
/*-----------------------------------------------------------*/
void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )
{
unsigned portLONG ulLED = partstFIRST_IO;
if( uxLED < partstNUM_LEDS )
{
/* Rotate to the wanted bit of port 0. Only P10 to P13 have an LED
attached. */
ulLED <<= ( unsigned portLONG ) uxLED;
/* Set of clear the output. */
if( xValue )
{
GPIO_IOCLR = ulLED;
}
else
{
GPIO_IOSET = ulLED;
}
}
}
/*-----------------------------------------------------------*/
void vParTestToggleLED( unsigned portBASE_TYPE uxLED )
{
unsigned portLONG ulLED = partstFIRST_IO, ulCurrentState;
if( uxLED < partstNUM_LEDS )
{
/* Rotate to the wanted bit of port 0. Only P10 to P13 have an LED
attached. */
ulLED <<= ( unsigned portLONG ) uxLED;
/* If this bit is already set, clear it, and visa versa. */
ulCurrentState = GPIO0_IOPIN;
if( ulCurrentState & ulLED )
{
GPIO_IOCLR = ulLED;
}
else
{
GPIO_IOSET = ulLED;
}
}
}

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@ -1,157 +0,0 @@
/* Sample initialization file */
.extern main
.extern exit
.text
.code 32
.align 0
.extern __bss_beg__
.extern __bss_end__
.extern __stack_end__
.extern __data_beg__
.extern __data_end__
.extern __data+beg_src__
.global start
.global endless_loop
/* Stack Sizes */
.set UND_STACK_SIZE, 0x00000004
.set ABT_STACK_SIZE, 0x00000004
.set FIQ_STACK_SIZE, 0x00000004
.set IRQ_STACK_SIZE, 0X00000400
.set SVC_STACK_SIZE, 0x00000400
/* Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs */
.set MODE_USR, 0x10 /* User Mode */
.set MODE_FIQ, 0x11 /* FIQ Mode */
.set MODE_IRQ, 0x12 /* IRQ Mode */
.set MODE_SVC, 0x13 /* Supervisor Mode */
.set MODE_ABT, 0x17 /* Abort Mode */
.set MODE_UND, 0x1B /* Undefined Mode */
.set MODE_SYS, 0x1F /* System Mode */
.equ I_BIT, 0x80 /* when I bit is set, IRQ is disabled */
.equ F_BIT, 0x40 /* when F bit is set, FIQ is disabled */
start:
_start:
_mainCRTStartup:
/* Setup a stack for each mode - note that this only sets up a usable stack
for system/user, SWI and IRQ modes. Also each mode is setup with
interrupts initially disabled. */
ldr r0, .LC6
msr CPSR_c, #MODE_UND|I_BIT|F_BIT /* Undefined Instruction Mode
mov sp, r0
sub r0, r0, #UND_STACK_SIZE
msr CPSR_c, #MODE_ABT|I_BIT|F_BIT /* Abort Mode */
mov sp, r0
sub r0, r0, #ABT_STACK_SIZE
msr CPSR_c, #MODE_FIQ|I_BIT|F_BIT /* FIQ Mode */
mov sp, r0
sub r0, r0, #FIQ_STACK_SIZE
msr CPSR_c, #MODE_IRQ|I_BIT|F_BIT /* IRQ Mode */
mov sp, r0
sub r0, r0, #IRQ_STACK_SIZE
msr CPSR_c, #MODE_SVC|I_BIT|F_BIT /* Supervisor Mode */
mov sp, r0
sub r0, r0, #SVC_STACK_SIZE
msr CPSR_c, #MODE_SYS|I_BIT|F_BIT /* System Mode */
mov sp, r0
/* We want to start in supervisor mode. Operation will switch to system
mode when the first task starts. */
msr CPSR_c, #MODE_SVC|I_BIT|F_BIT
/* Clear BSS. */
mov a2, #0 /* Fill value */
mov fp, a2 /* Null frame pointer */
mov r7, a2 /* Null frame pointer for Thumb */
ldr r1, .LC1 /* Start of memory block */
ldr r3, .LC2 /* End of memory block */
subs r3, r3, r1 /* Length of block */
beq .end_clear_loop
mov r2, #0
.clear_loop:
strb r2, [r1], #1
subs r3, r3, #1
bgt .clear_loop
.end_clear_loop:
/* Initialise data. */
ldr r1, .LC3 /* Start of memory block */
ldr r2, .LC4 /* End of memory block */
ldr r3, .LC5
subs r3, r3, r1 /* Length of block */
beq .end_set_loop
.set_loop:
ldrb r4, [r2], #1
strb r4, [r1], #1
subs r3, r3, #1
bgt .set_loop
.end_set_loop:
mov r0, #0 /* no arguments */
mov r1, #0 /* no argv either */
bl main
endless_loop:
b endless_loop
.align 0
.LC1:
.word __bss_beg__
.LC2:
.word __bss_end__
.LC3:
.word __data_beg__
.LC4:
.word __data_beg_src__
.LC5:
.word __data_end__
.LC6:
.word __stack_end__
/* Setup vector table. Note that undf, pabt, dabt, fiq just execute
a null loop. */
.section .startup,"ax"
.code 32
.align 0
b _start /* reset - _start */
ldr pc, _undf /* undefined - _undf */
ldr pc, _swi /* SWI - _swi */
ldr pc, _pabt /* program abort - _pabt */
ldr pc, _dabt /* data abort - _dabt */
nop /* reserved */
ldr pc, [pc,#-0xFF0] /* IRQ - read the VIC */
ldr pc, _fiq /* FIQ - _fiq */
_undf: .word __undf /* undefined */
_swi: .word vPortYieldProcessor /* SWI */
_pabt: .word __pabt /* program abort */
_dabt: .word __dabt /* data abort */
_fiq: .word __fiq /* FIQ */
__undf: b . /* undefined */
__pabt: b . /* program abort */
__dabt: b . /* data abort */
__fiq: b . /* FIQ */

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@ -1,49 +0,0 @@
MEMORY
{
flash : ORIGIN = 0, LENGTH = 120K
ram : ORIGIN = 0x40000000, LENGTH = 64K
}
__stack_end__ = 0x40000000 + 64K - 4;
SECTIONS
{
. = 0;
startup : { *(.startup)} >ram
prog :
{
*(.text)
*(.rodata)
*(.rodata*)
*(.glue_7)
*(.glue_7t)
} >ram
__end_of_text__ = .;
.data :
{
__data_beg__ = .;
__data_beg_src__ = __end_of_text__;
*(.data)
__data_end__ = .;
} >ram
.bss :
{
__bss_beg__ = .;
*(.bss)
} >ram
/* Align here to ensure that the .bss section occupies space up to
_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections. */
. = ALIGN(32 / 8);
}
. = ALIGN(32 / 8);
_end = .;
_bss_end__ = . ; __bss_end__ = . ; __end__ = . ;
PROVIDE (end = .);

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@ -1,49 +0,0 @@
MEMORY
{
flash : ORIGIN = 0, LENGTH = 120K
ram : ORIGIN = 0x40000000, LENGTH = 64K
}
__stack_end__ = 0x40000000 + 64K - 4;
SECTIONS
{
. = 0;
startup : { *(.startup)} >flash
prog :
{
*(.text)
*(.rodata)
*(.rodata*)
*(.glue_7)
*(.glue_7t)
} >flash
__end_of_text__ = .;
.data :
{
__data_beg__ = .;
__data_beg_src__ = __end_of_text__;
*(.data)
__data_end__ = .;
} >ram AT>flash
.bss :
{
__bss_beg__ = .;
*(.bss)
} >ram
/* Align here to ensure that the .bss section occupies space up to
_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections. */
. = ALIGN(32 / 8);
}
. = ALIGN(32 / 8);
_end = .;
_bss_end__ = . ; __bss_end__ = . ; __end__ = . ;
PROVIDE (end = .);

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@ -1,321 +0,0 @@
#ifndef lpc210x_h
#define lpc210x_h
/*******************************************************************************
lpc210x.h - Register defs for Philips LPC210X: LPC2104, LPC2105 and LPC2106
THE SOFTWARE IS DELIVERED "AS IS" WITHOUT WARRANTY OR CONDITION OF ANY KIND,
EITHER EXPRESS, IMPLIED OR STATUTORY. THIS INCLUDES WITHOUT LIMITATION ANY
WARRANTY OR CONDITION WITH RESPECT TO MERCHANTABILITY OR FITNESS FOR ANY
PARTICULAR PURPOSE, OR AGAINST THE INFRINGEMENTS OF INTELLECTUAL PROPERTY RIGHTS
OF OTHERS.
This file may be freely used for commercial and non-commercial applications,
including being redistributed with any tools.
If you find a problem with the file, please report it so that it can be fixed.
Created by Sten Larsson (sten_larsson at yahoo com)
Edited by Richard Barry.
*******************************************************************************/
#define REG8 (volatile unsigned char*)
#define REG16 (volatile unsigned short*)
#define REG32 (volatile unsigned int*)
/*##############################################################################
## MISC
##############################################################################*/
/* Constants for data to put in IRQ/FIQ Exception Vectors */
#define VECTDATA_IRQ 0xE51FFFF0 /* LDR PC,[PC,#-0xFF0] */
#define VECTDATA_FIQ /* __TODO */
/*##############################################################################
## VECTORED INTERRUPT CONTROLLER
##############################################################################*/
#define VICIRQStatus (*(REG32 (0xFFFFF000)))
#define VICFIQStatus (*(REG32 (0xFFFFF004)))
#define VICRawIntr (*(REG32 (0xFFFFF008)))
#define VICIntSelect (*(REG32 (0xFFFFF00C)))
#define VICIntEnable (*(REG32 (0xFFFFF010)))
#define VICIntEnClear (*(REG32 (0xFFFFF014)))
#define VICSoftInt (*(REG32 (0xFFFFF018)))
#define VICSoftIntClear (*(REG32 (0xFFFFF01C)))
#define VICProtection (*(REG32 (0xFFFFF020)))
#define VICVectAddr (*(REG32 (0xFFFFF030)))
#define VICDefVectAddr (*(REG32 (0xFFFFF034)))
#define VICVectAddr0 (*(REG32 (0xFFFFF100)))
#define VICVectAddr1 (*(REG32 (0xFFFFF104)))
#define VICVectAddr2 (*(REG32 (0xFFFFF108)))
#define VICVectAddr3 (*(REG32 (0xFFFFF10C)))
#define VICVectAddr4 (*(REG32 (0xFFFFF110)))
#define VICVectAddr5 (*(REG32 (0xFFFFF114)))
#define VICVectAddr6 (*(REG32 (0xFFFFF118)))
#define VICVectAddr7 (*(REG32 (0xFFFFF11C)))
#define VICVectAddr8 (*(REG32 (0xFFFFF120)))
#define VICVectAddr9 (*(REG32 (0xFFFFF124)))
#define VICVectAddr10 (*(REG32 (0xFFFFF128)))
#define VICVectAddr11 (*(REG32 (0xFFFFF12C)))
#define VICVectAddr12 (*(REG32 (0xFFFFF130)))
#define VICVectAddr13 (*(REG32 (0xFFFFF134)))
#define VICVectAddr14 (*(REG32 (0xFFFFF138)))
#define VICVectAddr15 (*(REG32 (0xFFFFF13C)))
#define VICVectCntl0 (*(REG32 (0xFFFFF200)))
#define VICVectCntl1 (*(REG32 (0xFFFFF204)))
#define VICVectCntl2 (*(REG32 (0xFFFFF208)))
#define VICVectCntl3 (*(REG32 (0xFFFFF20C)))
#define VICVectCntl4 (*(REG32 (0xFFFFF210)))
#define VICVectCntl5 (*(REG32 (0xFFFFF214)))
#define VICVectCntl6 (*(REG32 (0xFFFFF218)))
#define VICVectCntl7 (*(REG32 (0xFFFFF21C)))
#define VICVectCntl8 (*(REG32 (0xFFFFF220)))
#define VICVectCntl9 (*(REG32 (0xFFFFF224)))
#define VICVectCntl10 (*(REG32 (0xFFFFF228)))
#define VICVectCntl11 (*(REG32 (0xFFFFF22C)))
#define VICVectCntl12 (*(REG32 (0xFFFFF230)))
#define VICVectCntl13 (*(REG32 (0xFFFFF234)))
#define VICVectCntl14 (*(REG32 (0xFFFFF238)))
#define VICVectCntl15 (*(REG32 (0xFFFFF23C)))
#define VICITCR (*(REG32 (0xFFFFF300)))
#define VICITIP1 (*(REG32 (0xFFFFF304)))
#define VICITIP2 (*(REG32 (0xFFFFF308)))
#define VICITOP1 (*(REG32 (0xFFFFF30C)))
#define VICITOP2 (*(REG32 (0xFFFFF310)))
#define VICPeriphID0 (*(REG32 (0xFFFFFFE0)))
#define VICPeriphID1 (*(REG32 (0xFFFFFFE4)))
#define VICPeriphID2 (*(REG32 (0xFFFFFFE8)))
#define VICPeriphID3 (*(REG32 (0xFFFFFFEC)))
#define VICIntEnClr VICIntEnClear
#define VICSoftIntClr VICSoftIntClear
/*##############################################################################
## PCB - Pin Connect Block
##############################################################################*/
#define PCB_PINSEL0 (*(REG32 (0xE002C000)))
#define PCB_PINSEL1 (*(REG32 (0xE002C004)))
/*##############################################################################
## GPIO - General Purpose I/O
##############################################################################*/
#define GPIO_IOPIN (*(REG32 (0xE0028000))) /* ALTERNATE NAME GPIO = GPIO0 */
#define GPIO_IOSET (*(REG32 (0xE0028004)))
#define GPIO_IODIR (*(REG32 (0xE0028008)))
#define GPIO_IOCLR (*(REG32 (0xE002800C)))
#define GPIO0_IOPIN (*(REG32 (0xE0028000))) /* ALTERNATE NAME GPIO = GPIO0 */
#define GPIO0_IOSET (*(REG32 (0xE0028004)))
#define GPIO0_IODIR (*(REG32 (0xE0028008)))
#define GPIO0_IOCLR (*(REG32 (0xE002800C)))
/*##############################################################################
## UART0 / UART1
##############################################################################*/
/* ---- UART 0 --------------------------------------------- */
#define UART0_RBR (*(REG32 (0xE000C000)))
#define UART0_THR (*(REG32 (0xE000C000)))
#define UART0_IER (*(REG32 (0xE000C004)))
#define UART0_IIR (*(REG32 (0xE000C008)))
#define UART0_FCR (*(REG32 (0xE000C008)))
#define UART0_LCR (*(REG32 (0xE000C00C)))
#define UART0_LSR (*(REG32 (0xE000C014)))
#define UART0_SCR (*(REG32 (0xE000C01C)))
#define UART0_DLL (*(REG32 (0xE000C000)))
#define UART0_DLM (*(REG32 (0xE000C004)))
/* ---- UART 1 --------------------------------------------- */
#define UART1_RBR (*(REG32 (0xE0010000)))
#define UART1_THR (*(REG32 (0xE0010000)))
#define UART1_IER (*(REG32 (0xE0010004)))
#define UART1_IIR (*(REG32 (0xE0010008)))
#define UART1_FCR (*(REG32 (0xE0010008)))
#define UART1_LCR (*(REG32 (0xE001000C)))
#define UART1_LSR (*(REG32 (0xE0010014)))
#define UART1_SCR (*(REG32 (0xE001001C)))
#define UART1_DLL (*(REG32 (0xE0010000)))
#define UART1_DLM (*(REG32 (0xE0010004)))
#define UART1_MCR (*(REG32 (0xE0010010)))
#define UART1_MSR (*(REG32 (0xE0010018)))
/*##############################################################################
## I2C
##############################################################################*/
#define I2C_I2CONSET (*(REG32 (0xE001C000)))
#define I2C_I2STAT (*(REG32 (0xE001C004)))
#define I2C_I2DAT (*(REG32 (0xE001C008)))
#define I2C_I2ADR (*(REG32 (0xE001C00C)))
#define I2C_I2SCLH (*(REG32 (0xE001C010)))
#define I2C_I2SCLL (*(REG32 (0xE001C014)))
#define I2C_I2CONCLR (*(REG32 (0xE001C018)))
/*##############################################################################
## SPI - Serial Peripheral Interface
##############################################################################*/
#define SPI_SPCR (*(REG32 (0xE0020000)))
#define SPI_SPSR (*(REG32 (0xE0020004)))
#define SPI_SPDR (*(REG32 (0xE0020008)))
#define SPI_SPCCR (*(REG32 (0xE002000C)))
#define SPI_SPTCR (*(REG32 (0xE0020010)))
#define SPI_SPTSR (*(REG32 (0xE0020014)))
#define SPI_SPTOR (*(REG32 (0xE0020018)))
#define SPI_SPINT (*(REG32 (0xE002001C)))
/*##############################################################################
## Timer 0 and Timer 1
##############################################################################*/
/* ---- Timer 0 -------------------------------------------- */
#define T0_IR (*(REG32 (0xE0004000)))
#define T0_TCR (*(REG32 (0xE0004004)))
#define T0_TC (*(REG32 (0xE0004008)))
#define T0_PR (*(REG32 (0xE000400C)))
#define T0_PC (*(REG32 (0xE0004010)))
#define T0_MCR (*(REG32 (0xE0004014)))
#define T0_MR0 (*(REG32 (0xE0004018)))
#define T0_MR1 (*(REG32 (0xE000401C)))
#define T0_MR2 (*(REG32 (0xE0004020)))
#define T0_MR3 (*(REG32 (0xE0004024)))
#define T0_CCR (*(REG32 (0xE0004028)))
#define T0_CR0 (*(REG32 (0xE000402C)))
#define T0_CR1 (*(REG32 (0xE0004030)))
#define T0_CR2 (*(REG32 (0xE0004034)))
#define T0_CR3 (*(REG32 (0xE0004038)))
#define T0_EMR (*(REG32 (0xE000403C)))
/* ---- Timer 1 -------------------------------------------- */
#define T1_IR (*(REG32 (0xE0008000)))
#define T1_TCR (*(REG32 (0xE0008004)))
#define T1_TC (*(REG32 (0xE0008008)))
#define T1_PR (*(REG32 (0xE000800C)))
#define T1_PC (*(REG32 (0xE0008010)))
#define T1_MCR (*(REG32 (0xE0008014)))
#define T1_MR0 (*(REG32 (0xE0008018)))
#define T1_MR1 (*(REG32 (0xE000801C)))
#define T1_MR2 (*(REG32 (0xE0008020)))
#define T1_MR3 (*(REG32 (0xE0008024)))
#define T1_CCR (*(REG32 (0xE0008028)))
#define T1_CR0 (*(REG32 (0xE000802C)))
#define T1_CR1 (*(REG32 (0xE0008030)))
#define T1_CR2 (*(REG32 (0xE0008034)))
#define T1_CR3 (*(REG32 (0xE0008038)))
#define T1_EMR (*(REG32 (0xE000803C)))
/*##############################################################################
## PWM
##############################################################################*/
#define PWM_IR (*(REG32 (0xE0014000)))
#define PWM_TCR (*(REG32 (0xE0014004)))
#define PWM_TC (*(REG32 (0xE0014008)))
#define PWM_PR (*(REG32 (0xE001400C)))
#define PWM_PC (*(REG32 (0xE0014010)))
#define PWM_MCR (*(REG32 (0xE0014014)))
#define PWM_MR0 (*(REG32 (0xE0014018)))
#define PWM_MR1 (*(REG32 (0xE001401C)))
#define PWM_MR2 (*(REG32 (0xE0014020)))
#define PWM_MR3 (*(REG32 (0xE0014024)))
#define PWM_MR4 (*(REG32 (0xE0014040)))
#define PWM_MR5 (*(REG32 (0xE0014044)))
#define PWM_MR6 (*(REG32 (0xE0014048)))
#define PWM_EMR (*(REG32 (0xE001403C)))
#define PWM_PCR (*(REG32 (0xE001404C)))
#define PWM_LER (*(REG32 (0xE0014050)))
#define PWM_CCR (*(REG32 (0xE0014028)))
#define PWM_CR0 (*(REG32 (0xE001402C)))
#define PWM_CR1 (*(REG32 (0xE0014030)))
#define PWM_CR2 (*(REG32 (0xE0014034)))
#define PWM_CR3 (*(REG32 (0xE0014038)))
/*##############################################################################
## RTC
##############################################################################*/
/* ---- RTC: Miscellaneous Register Group ------------------ */
#define RTC_ILR (*(REG32 (0xE0024000)))
#define RTC_CTC (*(REG32 (0xE0024004)))
#define RTC_CCR (*(REG32 (0xE0024008)))
#define RTC_CIIR (*(REG32 (0xE002400C)))
#define RTC_AMR (*(REG32 (0xE0024010)))
#define RTC_CTIME0 (*(REG32 (0xE0024014)))
#define RTC_CTIME1 (*(REG32 (0xE0024018)))
#define RTC_CTIME2 (*(REG32 (0xE002401C)))
/* ---- RTC: Timer Control Group --------------------------- */
#define RTC_SEC (*(REG32 (0xE0024020)))
#define RTC_MIN (*(REG32 (0xE0024024)))
#define RTC_HOUR (*(REG32 (0xE0024028)))
#define RTC_DOM (*(REG32 (0xE002402C)))
#define RTC_DOW (*(REG32 (0xE0024030)))
#define RTC_DOY (*(REG32 (0xE0024034)))
#define RTC_MONTH (*(REG32 (0xE0024038)))
#define RTC_YEAR (*(REG32 (0xE002403C)))
/* ---- RTC: Alarm Control Group --------------------------- */
#define RTC_ALSEC (*(REG32 (0xE0024060)))
#define RTC_ALMIN (*(REG32 (0xE0024064)))
#define RTC_ALHOUR (*(REG32 (0xE0024068)))
#define RTC_ALDOM (*(REG32 (0xE002406C)))
#define RTC_ALDOW (*(REG32 (0xE0024070)))
#define RTC_ALDOY (*(REG32 (0xE0024074)))
#define RTC_ALMON (*(REG32 (0xE0024078)))
#define RTC_ALYEAR (*(REG32 (0xE002407C)))
/* ---- RTC: Reference Clock Divider Group ----------------- */
#define RTC_PREINT (*(REG32 (0xE0024080)))
#define RTC_PREFRAC (*(REG32 (0xE0024084)))
/*##############################################################################
## WD - Watchdog
##############################################################################*/
#define WD_WDMOD (*(REG32 (0xE0000000)))
#define WD_WDTC (*(REG32 (0xE0000004)))
#define WD_WDFEED (*(REG32 (0xE0000008)))
#define WD_WDTV (*(REG32 (0xE000000C)))
/*##############################################################################
## System Control Block
##############################################################################*/
#define SCB_EXTINT (*(REG32 (0xE01FC140)))
#define SCB_EXTWAKE (*(REG32 (0xE01FC144)))
#define SCB_MEMMAP (*(REG32 (0xE01FC040)))
#define SCB_PLLCON (*(REG32 (0xE01FC080)))
#define SCB_PLLCFG (*(REG32 (0xE01FC084)))
#define SCB_PLLSTAT (*(REG32 (0xE01FC088)))
#define SCB_PLLFEED (*(REG32 (0xE01FC08C)))
#define SCB_PCON (*(REG32 (0xE01FC0C0)))
#define SCB_PCONP (*(REG32 (0xE01FC0C4)))
#define SCB_VPBDIV (*(REG32 (0xE01FC100)))
/*##############################################################################
## Memory Accelerator Module (MAM)
##############################################################################*/
#define MAM_TIM (*(REG32 (0xE01FC004)))
#define MAM_CR (*(REG32 (0xE01FC000)))
#endif /* lpc210x_h */

View file

@ -1 +0,0 @@
#include "lpc2114.h"

View file

@ -1,474 +0,0 @@
/*
FreeRTOS.org V4.2.0 - Copyright (C) 2003-2007 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
See http://www.FreeRTOS.org for documentation, latest information, license
and contact details. Please ensure to read the configuration and relevant
port sections of the online documentation.
***************************************************************************
*/
/*
NOTE : Tasks run in system mode and the scheduler runs in Supervisor mode.
The processor MUST be in supervisor mode when vTaskStartScheduler is
called. The demo applications included in the FreeRTOS.org download switch
to supervisor mode prior to main being called. If you are not using one of
these demo application projects then ensure Supervisor mode is used.
*/
/*
* Creates all the demo application tasks, then starts the scheduler. The WEB
* documentation provides more details of the demo application tasks.
*
* Main.c also creates a task called "Check". This only executes every three
* seconds but has the highest priority so is guaranteed to get processor time.
* Its main function is to check that all the other tasks are still operational.
* Each task (other than the "flash" tasks) maintains a unique count that is
* incremented each time the task successfully completes its function. Should
* any error occur within such a task the count is permanently halted. The
* check task inspects the count of each task to ensure it has changed since
* the last time the check task executed. If all the count variables have
* changed all the tasks are still executing error free, and the check task
* toggles the onboard LED. Should any task contain an error at any time
* the LED toggle rate will change from 3 seconds to 500ms.
*
* To check the operation of the memory allocator the check task also
* dynamically creates a task before delaying, and deletes it again when it
* wakes. If memory cannot be allocated for the new task the call to xTaskCreate
* will fail and an error is signalled. The dynamically created task itself
* allocates and frees memory just to give the allocator a bit more exercise.
*
*/
/*
Changes from V2.4.2
+ The vErrorChecks() task now dynamically creates then deletes a task each
cycle. This tests the operation of the memory allocator.
Changes from V2.5.2
+ vParTestInitialise() is called during initialisation to ensure all the
LED's start off.
*/
/* Standard includes. */
#include <stdlib.h>
#include <string.h>
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "task.h"
/* Demo application includes. */
#include "partest.h"
#include "flash.h"
#include "integer.h"
#include "PollQ.h"
#include "comtest2.h"
#include "semtest.h"
#include "flop.h"
#include "dynamic.h"
#include "BlockQ.h"
#include "serial.h"
/*-----------------------------------------------------------*/
/* Constants to setup I/O. */
#define mainTX_ENABLE ( ( unsigned portLONG ) 0x0001 )
#define mainRX_ENABLE ( ( unsigned portLONG ) 0x0004 )
#define mainP0_14 ( ( unsigned portLONG ) 0x4000 )
#define mainJTAG_PORT ( ( unsigned portLONG ) 0x3E0000UL )
/* Constants to setup the PLL. */
#define mainPLL_MUL_4 ( ( unsigned portCHAR ) 0x0003 )
#define mainPLL_DIV_1 ( ( unsigned portCHAR ) 0x0000 )
#define mainPLL_ENABLE ( ( unsigned portCHAR ) 0x0001 )
#define mainPLL_CONNECT ( ( unsigned portCHAR ) 0x0003 )
#define mainPLL_FEED_BYTE1 ( ( unsigned portCHAR ) 0xaa )
#define mainPLL_FEED_BYTE2 ( ( unsigned portCHAR ) 0x55 )
#define mainPLL_LOCK ( ( unsigned portLONG ) 0x0400 )
/* Constants to setup the MAM. */
#define mainMAM_TIM_3 ( ( unsigned portCHAR ) 0x03 )
#define mainMAM_MODE_FULL ( ( unsigned portCHAR ) 0x02 )
/* Constants to setup the peripheral bus. */
#define mainBUS_CLK_FULL ( ( unsigned portCHAR ) 0x01 )
/* Constants for the ComTest tasks. */
#define mainCOM_TEST_BAUD_RATE ( ( unsigned portLONG ) 115200 )
#define mainCOM_TEST_LED ( 3 )
/* Priorities for the demo application tasks. */
#define mainLED_TASK_PRIORITY ( tskIDLE_PRIORITY + 3 )
#define mainCOM_TEST_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define mainCHECK_TASK_PRIORITY ( tskIDLE_PRIORITY + 4 )
#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1 )
#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2 )
/* The rate at which the on board LED will toggle when there is/is not an
error. */
#define mainNO_ERROR_FLASH_PERIOD ( ( portTickType ) 3000 / portTICK_RATE_MS )
#define mainERROR_FLASH_PERIOD ( ( portTickType ) 500 / portTICK_RATE_MS )
#define mainON_BOARD_LED_BIT ( ( unsigned portLONG ) 0x80 )
/* Constants used by the vMemCheckTask() task. */
#define mainCOUNT_INITIAL_VALUE ( ( unsigned portLONG ) 0 )
#define mainNO_TASK ( 0 )
/* The size of the memory blocks allocated by the vMemCheckTask() task. */
#define mainMEM_CHECK_SIZE_1 ( ( size_t ) 51 )
#define mainMEM_CHECK_SIZE_2 ( ( size_t ) 52 )
#define mainMEM_CHECK_SIZE_3 ( ( size_t ) 151 )
/*-----------------------------------------------------------*/
/*
* The Olimex demo board has a single built in LED. This function simply
* toggles its state.
*/
void prvToggleOnBoardLED( void );
/*
* Checks that all the demo application tasks are still executing without error
* - as described at the top of the file.
*/
static portLONG prvCheckOtherTasksAreStillRunning( unsigned portLONG ulMemCheckTaskCount );
/*
* The task that executes at the highest priority and calls
* prvCheckOtherTasksAreStillRunning(). See the description at the top
* of the file.
*/
static void vErrorChecks( void *pvParameters );
/*
* Dynamically created and deleted during each cycle of the vErrorChecks()
* task. This is done to check the operation of the memory allocator.
* See the top of vErrorChecks for more details.
*/
static void vMemCheckTask( void *pvParameters );
/*
* Configure the processor for use with the Olimex demo board. This includes
* setup for the I/O, system clock, and access timings.
*/
static void prvSetupHardware( void );
/*-----------------------------------------------------------*/
/*
* Starts all the other tasks, then starts the scheduler.
*/
int main( void )
{
/* Setup the hardware for use with the Olimex demo board. */
prvSetupHardware();
/* Start the demo/test application tasks. */
vStartIntegerMathTasks( tskIDLE_PRIORITY );
vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainCOM_TEST_BAUD_RATE, mainCOM_TEST_LED );
vStartLEDFlashTasks( mainLED_TASK_PRIORITY );
vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );
vStartMathTasks( tskIDLE_PRIORITY );
vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );
vStartDynamicPriorityTasks();
vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );
/* Start the check task - which is defined in this file. */
xTaskCreate( vErrorChecks, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );
/* Now all the tasks have been started - start the scheduler.
NOTE : Tasks run in system mode and the scheduler runs in Supervisor mode.
The processor MUST be in supervisor mode when vTaskStartScheduler is
called. The demo applications included in the FreeRTOS.org download switch
to supervisor mode prior to main being called. If you are not using one of
these demo application projects then ensure Supervisor mode is used here. */
vTaskStartScheduler();
/* Should never reach here! */
return 0;
}
/*-----------------------------------------------------------*/
static void vErrorChecks( void *pvParameters )
{
portTickType xDelayPeriod = mainNO_ERROR_FLASH_PERIOD;
unsigned portLONG ulMemCheckTaskRunningCount;
xTaskHandle xCreatedTask;
/* The parameters are not used in this function. */
( void ) pvParameters;
/* Cycle for ever, delaying then checking all the other tasks are still
operating without error. If an error is detected then the delay period
is decreased from mainNO_ERROR_FLASH_PERIOD to mainERROR_FLASH_PERIOD so
the on board LED flash rate will increase.
In addition to the standard tests the memory allocator is tested through
the dynamic creation and deletion of a task each cycle. Each time the
task is created memory must be allocated for its stack. When the task is
deleted this memory is returned to the heap. If the task cannot be created
then it is likely that the memory allocation failed. */
for( ;; )
{
/* Dynamically create a task - passing ulMemCheckTaskRunningCount as a
parameter. */
ulMemCheckTaskRunningCount = mainCOUNT_INITIAL_VALUE;
xCreatedTask = mainNO_TASK;
if( xTaskCreate( vMemCheckTask, ( signed portCHAR * ) "MEM_CHECK", configMINIMAL_STACK_SIZE, ( void * ) &ulMemCheckTaskRunningCount, tskIDLE_PRIORITY, &xCreatedTask ) != pdPASS )
{
/* Could not create the task - we have probably run out of heap. */
xDelayPeriod = mainERROR_FLASH_PERIOD;
}
/* Delay until it is time to execute again. */
vTaskDelay( xDelayPeriod );
/* Delete the dynamically created task. */
if( xCreatedTask != mainNO_TASK )
{
vTaskDelete( xCreatedTask );
}
/* Check all the standard demo application tasks are executing without
error. ulMemCheckTaskRunningCount is checked to ensure it was
modified by the task just deleted. */
if( prvCheckOtherTasksAreStillRunning( ulMemCheckTaskRunningCount ) != pdPASS )
{
/* An error has been detected in one of the tasks - flash faster. */
xDelayPeriod = mainERROR_FLASH_PERIOD;
}
prvToggleOnBoardLED();
}
}
/*-----------------------------------------------------------*/
static void prvSetupHardware( void )
{
#ifdef RUN_FROM_RAM
/* Remap the interrupt vectors to RAM if we are are running from RAM. */
SCB_MEMMAP = 2;
#endif
/* Configure the RS2332 pins. All other pins remain at their default of 0. */
PCB_PINSEL0 |= mainTX_ENABLE;
PCB_PINSEL0 |= mainRX_ENABLE;
/* Set all GPIO to output other than the P0.14 (BSL), and the JTAG pins.
The JTAG pins are left as input as I'm not sure what will happen if the
Wiggler is connected after powerup - not that it would be a good idea to
do that anyway. */
GPIO_IODIR = ~( mainP0_14 + mainJTAG_PORT );
/* Setup the PLL to multiply the XTAL input by 4. */
SCB_PLLCFG = ( mainPLL_MUL_4 | mainPLL_DIV_1 );
/* Activate the PLL by turning it on then feeding the correct sequence of
bytes. */
SCB_PLLCON = mainPLL_ENABLE;
SCB_PLLFEED = mainPLL_FEED_BYTE1;
SCB_PLLFEED = mainPLL_FEED_BYTE2;
/* Wait for the PLL to lock... */
while( !( SCB_PLLSTAT & mainPLL_LOCK ) );
/* ...before connecting it using the feed sequence again. */
SCB_PLLCON = mainPLL_CONNECT;
SCB_PLLFEED = mainPLL_FEED_BYTE1;
SCB_PLLFEED = mainPLL_FEED_BYTE2;
/* Setup and turn on the MAM. Three cycle access is used due to the fast
PLL used. It is possible faster overall performance could be obtained by
tuning the MAM and PLL settings. */
MAM_TIM = mainMAM_TIM_3;
MAM_CR = mainMAM_MODE_FULL;
/* Setup the peripheral bus to be the same as the PLL output. */
SCB_VPBDIV = mainBUS_CLK_FULL;
/* Initialise LED outputs. */
vParTestInitialise();
}
/*-----------------------------------------------------------*/
void prvToggleOnBoardLED( void )
{
unsigned portLONG ulState;
ulState = GPIO0_IOPIN;
if( ulState & mainON_BOARD_LED_BIT )
{
GPIO_IOCLR = mainON_BOARD_LED_BIT;
}
else
{
GPIO_IOSET = mainON_BOARD_LED_BIT;
}
}
/*-----------------------------------------------------------*/
static portLONG prvCheckOtherTasksAreStillRunning( unsigned portLONG ulMemCheckTaskCount )
{
portLONG lReturn = ( portLONG ) pdPASS;
/* Check all the demo tasks (other than the flash tasks) to ensure
that they are all still running, and that none of them have detected
an error. */
if( xAreIntegerMathsTaskStillRunning() != pdTRUE )
{
lReturn = ( portLONG ) pdFAIL;
}
if( xAreComTestTasksStillRunning() != pdTRUE )
{
lReturn = ( portLONG ) pdFAIL;
}
if( xArePollingQueuesStillRunning() != pdTRUE )
{
lReturn = ( portLONG ) pdFAIL;
}
if( xAreMathsTaskStillRunning() != pdTRUE )
{
lReturn = ( portLONG ) pdFAIL;
}
if( xAreSemaphoreTasksStillRunning() != pdTRUE )
{
lReturn = ( portLONG ) pdFAIL;
}
if( xAreDynamicPriorityTasksStillRunning() != pdTRUE )
{
lReturn = ( portLONG ) pdFAIL;
}
if( xAreBlockingQueuesStillRunning() != pdTRUE )
{
lReturn = ( portLONG ) pdFAIL;
}
if( ulMemCheckTaskCount == mainCOUNT_INITIAL_VALUE )
{
/* The vMemCheckTask did not increment the counter - it must
have failed. */
lReturn = ( portLONG ) pdFAIL;
}
return lReturn;
}
/*-----------------------------------------------------------*/
static void vMemCheckTask( void *pvParameters )
{
unsigned portLONG *pulMemCheckTaskRunningCounter;
void *pvMem1, *pvMem2, *pvMem3;
static portLONG lErrorOccurred = pdFALSE;
/* This task is dynamically created then deleted during each cycle of the
vErrorChecks task to check the operation of the memory allocator. Each time
the task is created memory is allocated for the stack and TCB. Each time
the task is deleted this memory is returned to the heap. This task itself
exercises the allocator by allocating and freeing blocks.
The task executes at the idle priority so does not require a delay.
pulMemCheckTaskRunningCounter is incremented each cycle to indicate to the
vErrorChecks() task that this task is still executing without error. */
pulMemCheckTaskRunningCounter = ( unsigned portLONG * ) pvParameters;
for( ;; )
{
if( lErrorOccurred == pdFALSE )
{
/* We have never seen an error so increment the counter. */
( *pulMemCheckTaskRunningCounter )++;
}
/* Allocate some memory - just to give the allocator some extra
exercise. This has to be in a critical section to ensure the
task does not get deleted while it has memory allocated. */
vTaskSuspendAll();
{
pvMem1 = pvPortMalloc( mainMEM_CHECK_SIZE_1 );
if( pvMem1 == NULL )
{
lErrorOccurred = pdTRUE;
}
else
{
memset( pvMem1, 0xaa, mainMEM_CHECK_SIZE_1 );
vPortFree( pvMem1 );
}
}
xTaskResumeAll();
/* Again - with a different size block. */
vTaskSuspendAll();
{
pvMem2 = pvPortMalloc( mainMEM_CHECK_SIZE_2 );
if( pvMem2 == NULL )
{
lErrorOccurred = pdTRUE;
}
else
{
memset( pvMem2, 0xaa, mainMEM_CHECK_SIZE_2 );
vPortFree( pvMem2 );
}
}
xTaskResumeAll();
/* Again - with a different size block. */
vTaskSuspendAll();
{
pvMem3 = pvPortMalloc( mainMEM_CHECK_SIZE_3 );
if( pvMem3 == NULL )
{
lErrorOccurred = pdTRUE;
}
else
{
memset( pvMem3, 0xaa, mainMEM_CHECK_SIZE_3 );
vPortFree( pvMem3 );
}
}
xTaskResumeAll();
}
}

View file

@ -1,6 +0,0 @@
set USE_THUMB_MODE=NO
set DEBUG=-g
set OPTIM=-O0
set RUN_MODE=RUN_FROM_RAM
set LDSCRIPT=lpc2106-ram.ld
make

View file

@ -1,6 +0,0 @@
set USE_THUMB_MODE=YES
set DEBUG=-g
set OPTIM=-O0
set RUN_MODE=RUN_FROM_RAM
set LDSCRIPT=lpc2106-ram.ld
make

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@ -1,18 +0,0 @@
Use one of the following four batch files to build the demo application:
+ rom_arm.bat
Creates an ARM mode release build suitable for programming into flash.
+ ram_arm.bat
Creates an ARM mode debug build suitable for running from RAM.
+ rom_thumb.bat
Creates a THUMB mode release build suitable for programming into flash.
+ ram_thumb.bat
Creates a THUMB mode debug build suitable for running from RAM.

View file

@ -1,6 +0,0 @@
set USE_THUMB_MODE=NO
set DEBUG=
set OPTIM=-O3
set RUN_MODE=RUN_FROM_ROM
set LDSCRIPT=lpc2106-rom.ld
make

View file

@ -1,6 +0,0 @@
set USE_THUMB_MODE=YES
set DEBUG=
set OPTIM=-O3
set RUN_MODE=RUN_FROM_ROM
set LDSCRIPT=lpc2106-rom.ld
make

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@ -1,263 +0,0 @@
/*
FreeRTOS.org V4.2.0 - Copyright (C) 2003-2007 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
See http://www.FreeRTOS.org for documentation, latest information, license
and contact details. Please ensure to read the configuration and relevant
port sections of the online documentation.
***************************************************************************
*/
/*
Changes from V2.4.0
+ Made serial ISR handling more complete and robust.
Changes from V2.4.1
+ Split serial.c into serial.c and serialISR.c. serial.c can be
compiled using ARM or THUMB modes. serialISR.c must always be
compiled in ARM mode.
+ Another small change to cSerialPutChar().
Changed from V2.5.1
+ In cSerialPutChar() an extra check is made to ensure the post to
the queue was successful if then attempting to retrieve the posted
character.
*/
/*
BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART0.
This file contains all the serial port components that can be compiled to
either ARM or THUMB mode. Components that must be compiled to ARM mode are
contained in serialISR.c.
*/
/* Standard includes. */
#include <stdlib.h>
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "queue.h"
#include "task.h"
/* Demo application includes. */
#include "serial.h"
/*-----------------------------------------------------------*/
/* Constants to setup and access the UART. */
#define serDLAB ( ( unsigned portCHAR ) 0x80 )
#define serENABLE_INTERRUPTS ( ( unsigned portCHAR ) 0x03 )
#define serNO_PARITY ( ( unsigned portCHAR ) 0x00 )
#define ser1_STOP_BIT ( ( unsigned portCHAR ) 0x00 )
#define ser8_BIT_CHARS ( ( unsigned portCHAR ) 0x03 )
#define serFIFO_ON ( ( unsigned portCHAR ) 0x01 )
#define serCLEAR_FIFO ( ( unsigned portCHAR ) 0x06 )
#define serWANTED_CLOCK_SCALING ( ( unsigned portLONG ) 16 )
/* Constants to setup and access the VIC. */
#define serUART0_VIC_CHANNEL ( ( unsigned portLONG ) 0x0006 )
#define serUART0_VIC_CHANNEL_BIT ( ( unsigned portLONG ) 0x0040 )
#define serUART0_VIC_ENABLE ( ( unsigned portLONG ) 0x0020 )
#define serCLEAR_VIC_INTERRUPT ( ( unsigned portLONG ) 0 )
#define serINVALID_QUEUE ( ( xQueueHandle ) 0 )
#define serHANDLE ( ( xComPortHandle ) 1 )
#define serNO_BLOCK ( ( portTickType ) 0 )
/*-----------------------------------------------------------*/
/* Queues used to hold received characters, and characters waiting to be
transmitted. */
static xQueueHandle xRxedChars;
static xQueueHandle xCharsForTx;
/*-----------------------------------------------------------*/
/* Communication flag between the interrupt service routine and serial API. */
static volatile portLONG *plTHREEmpty;
/*
* The queues are created in serialISR.c as they are used from the ISR.
* Obtain references to the queues and THRE Empty flag.
*/
extern void vSerialISRCreateQueues( unsigned portBASE_TYPE uxQueueLength, xQueueHandle *pxRxedChars, xQueueHandle *pxCharsForTx, portLONG volatile **pplTHREEmptyFlag );
/*-----------------------------------------------------------*/
xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
{
unsigned portLONG ulDivisor, ulWantedClock;
xComPortHandle xReturn = serHANDLE;
extern void ( vUART_ISR )( void );
/* The queues are used in the serial ISR routine, so are created from
serialISR.c (which is always compiled to ARM mode. */
vSerialISRCreateQueues( uxQueueLength, &xRxedChars, &xCharsForTx, &plTHREEmpty );
if(
( xRxedChars != serINVALID_QUEUE ) &&
( xCharsForTx != serINVALID_QUEUE ) &&
( ulWantedBaud != ( unsigned portLONG ) 0 )
)
{
portENTER_CRITICAL();
{
/* Setup the baud rate: Calculate the divisor value. */
ulWantedClock = ulWantedBaud * serWANTED_CLOCK_SCALING;
ulDivisor = configCPU_CLOCK_HZ / ulWantedClock;
/* Set the DLAB bit so we can access the divisor. */
UART0_LCR |= serDLAB;
/* Setup the divisor. */
UART0_DLL = ( unsigned portCHAR ) ( ulDivisor & ( unsigned portLONG ) 0xff );
ulDivisor >>= 8;
UART0_DLM = ( unsigned portCHAR ) ( ulDivisor & ( unsigned portLONG ) 0xff );
/* Turn on the FIFO's and clear the buffers. */
UART0_FCR = ( serFIFO_ON | serCLEAR_FIFO );
/* Setup transmission format. */
UART0_LCR = serNO_PARITY | ser1_STOP_BIT | ser8_BIT_CHARS;
/* Setup the VIC for the UART. */
VICIntSelect &= ~( serUART0_VIC_CHANNEL_BIT );
VICIntEnable |= serUART0_VIC_CHANNEL_BIT;
VICVectAddr1 = ( portLONG ) vUART_ISR;
VICVectCntl1 = serUART0_VIC_CHANNEL | serUART0_VIC_ENABLE;
/* Enable UART0 interrupts. */
UART0_IER |= serENABLE_INTERRUPTS;
}
portEXIT_CRITICAL();
}
else
{
xReturn = ( xComPortHandle ) 0;
}
return xReturn;
}
/*-----------------------------------------------------------*/
signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )
{
/* The port handle is not required as this driver only supports UART0. */
( void ) pxPort;
/* Get the next character from the buffer. Return false if no characters
are available, or arrive before xBlockTime expires. */
if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
{
return pdTRUE;
}
else
{
return pdFALSE;
}
}
/*-----------------------------------------------------------*/
void vSerialPutString( xComPortHandle pxPort, const signed portCHAR * const pcString, unsigned portSHORT usStringLength )
{
signed portCHAR *pxNext;
/* NOTE: This implementation does not handle the queue being full as no
block time is used! */
/* The port handle is not required as this driver only supports UART0. */
( void ) pxPort;
( void ) usStringLength;
/* Send each character in the string, one at a time. */
pxNext = ( signed portCHAR * ) pcString;
while( *pxNext )
{
xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );
pxNext++;
}
}
/*-----------------------------------------------------------*/
signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
{
signed portBASE_TYPE xReturn;
/* This demo driver only supports one port so the parameter is not used. */
( void ) pxPort;
portENTER_CRITICAL();
{
/* Is there space to write directly to the UART? */
if( *plTHREEmpty == ( portLONG ) pdTRUE )
{
/* We wrote the character directly to the UART, so was
successful. */
*plTHREEmpty = pdFALSE;
UART0_THR = cOutChar;
xReturn = pdPASS;
}
else
{
/* We cannot write directly to the UART, so queue the character.
Block for a maximum of xBlockTime if there is no space in the
queue. */
xReturn = xQueueSend( xCharsForTx, &cOutChar, xBlockTime );
/* Depending on queue sizing and task prioritisation: While we
were blocked waiting to post interrupts were not disabled. It is
possible that the serial ISR has emptied the Tx queue, in which
case we need to start the Tx off again. */
if( ( *plTHREEmpty == ( portLONG ) pdTRUE ) && ( xReturn == pdPASS ) )
{
xQueueReceive( xCharsForTx, &cOutChar, serNO_BLOCK );
*plTHREEmpty = pdFALSE;
UART0_THR = cOutChar;
}
}
}
portEXIT_CRITICAL();
return xReturn;
}
/*-----------------------------------------------------------*/
void vSerialClose( xComPortHandle xPort )
{
/* Not supported as not required by the demo application. */
( void ) xPort;
}
/*-----------------------------------------------------------*/

View file

@ -1,163 +0,0 @@
/*
FreeRTOS.org V4.2.0 - Copyright (C) 2003-2007 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
See http://www.FreeRTOS.org for documentation, latest information, license
and contact details. Please ensure to read the configuration and relevant
port sections of the online documentation.
***************************************************************************
*/
/*
BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART0.
This file contains all the serial port components that must be compiled
to ARM mode. The components that can be compiled to either ARM or THUMB
mode are contained in serial.c.
*/
/* Standard includes. */
#include <stdlib.h>
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "queue.h"
#include "task.h"
/* Demo application includes. */
#include "serial.h"
/*-----------------------------------------------------------*/
/* Constant to access the VIC. */
#define serCLEAR_VIC_INTERRUPT ( ( unsigned portLONG ) 0 )
/* Constants to determine the ISR source. */
#define serSOURCE_THRE ( ( unsigned portCHAR ) 0x02 )
#define serSOURCE_RX_TIMEOUT ( ( unsigned portCHAR ) 0x0c )
#define serSOURCE_ERROR ( ( unsigned portCHAR ) 0x06 )
#define serSOURCE_RX ( ( unsigned portCHAR ) 0x04 )
#define serINTERRUPT_SOURCE_MASK ( ( unsigned portCHAR ) 0x0f )
/* Queues used to hold received characters, and characters waiting to be
transmitted. */
static xQueueHandle xRxedChars;
static xQueueHandle xCharsForTx;
static volatile portLONG lTHREEmpty;
/*-----------------------------------------------------------*/
/*
* The queues are created in serialISR.c as they are used from the ISR.
* Obtain references to the queues and THRE Empty flag.
*/
void vSerialISRCreateQueues( unsigned portBASE_TYPE uxQueueLength, xQueueHandle *pxRxedChars, xQueueHandle *pxCharsForTx, portLONG volatile **pplTHREEmptyFlag );
/* UART0 interrupt service routine. This can cause a context switch so MUST
be declared "naked". */
void vUART_ISR( void ) __attribute__ ((naked));
/*-----------------------------------------------------------*/
void vSerialISRCreateQueues( unsigned portBASE_TYPE uxQueueLength, xQueueHandle *pxRxedChars,
xQueueHandle *pxCharsForTx, portLONG volatile **pplTHREEmptyFlag )
{
/* Create the queues used to hold Rx and Tx characters. */
xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
/* Pass back a reference to the queues so the serial API file can
post/receive characters. */
*pxRxedChars = xRxedChars;
*pxCharsForTx = xCharsForTx;
/* Initialise the THRE empty flag - and pass back a reference. */
lTHREEmpty = ( portLONG ) pdTRUE;
*pplTHREEmptyFlag = &lTHREEmpty;
}
/*-----------------------------------------------------------*/
void vUART_ISR( void )
{
/* This ISR can cause a context switch, so the first statement must be a
call to the portENTER_SWITCHING_ISR() macro. This must be BEFORE any
variable declarations. */
portENTER_SWITCHING_ISR();
/* Now we can declare the local variables. */
signed portCHAR cChar;
portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByRx = pdFALSE;
/* What caused the interrupt? */
switch( UART0_IIR & serINTERRUPT_SOURCE_MASK )
{
case serSOURCE_ERROR : /* Not handling this, but clear the interrupt. */
cChar = UART0_LSR;
break;
case serSOURCE_THRE : /* The THRE is empty. If there is another
character in the Tx queue, send it now. */
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWokenByTx ) == pdTRUE )
{
UART0_THR = cChar;
}
else
{
/* There are no further characters
queued to send so we can indicate
that the THRE is available. */
lTHREEmpty = pdTRUE;
}
break;
case serSOURCE_RX_TIMEOUT :
case serSOURCE_RX : /* A character was received. Place it in
the queue of received characters. */
cChar = UART0_RBR;
if( xQueueSendFromISR( xRxedChars, &cChar, ( portBASE_TYPE ) pdFALSE ) )
{
xTaskWokenByRx = pdTRUE;
}
break;
default : /* There is nothing to do, leave the ISR. */
break;
}
/* Clear the ISR in the VIC. */
VICVectAddr = serCLEAR_VIC_INTERRUPT;
/* Exit the ISR. If a task was woken by either a character being received
or transmitted then a context switch will occur. */
portEXIT_SWITCHING_ISR( ( xTaskWokenByTx || xTaskWokenByRx ) );
}
/*-----------------------------------------------------------*/

View file

@ -1,78 +0,0 @@
/*
FreeRTOS.org V4.2.0 - Copyright (C) 2003-2007 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
See http://www.FreeRTOS.org for documentation, latest information, license
and contact details. Please ensure to read the configuration and relevant
port sections of the online documentation.
***************************************************************************
*/
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
/* Hardware specifics. */
#include <iolpc2129.h>
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
*----------------------------------------------------------*/
#define configUSE_PREEMPTION 1
#define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 0
#define configCPU_CLOCK_HZ ( ( unsigned portLONG ) 60000000 ) /* =12.0MHz xtal multiplied by 5 using the PLL. */
#define configTICK_RATE_HZ ( ( portTickType ) 1000 )
#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 5 )
#define configMINIMAL_STACK_SIZE ( ( unsigned portSHORT ) 100 )
#define configTOTAL_HEAP_SIZE ( ( size_t ) 14200 )
#define configMAX_TASK_NAME_LEN ( 16 )
#define configUSE_TRACE_FACILITY 0
#define configUSE_16_BIT_TICKS 0
#define configIDLE_SHOULD_YIELD 1
/* Co-routine definitions. */
#define configUSE_CO_ROUTINES 0
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
/* Set the following definitions to 1 to include the API function, or zero
to exclude the API function. */
#define INCLUDE_vTaskPrioritySet 1
#define INCLUDE_uxTaskPriorityGet 1
#define INCLUDE_vTaskDelete 0
#define INCLUDE_vTaskCleanUpResources 0
#define INCLUDE_vTaskSuspend 1
#define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelay 1
#endif /* FREERTOS_CONFIG_H */

View file

@ -1,102 +0,0 @@
/*
FreeRTOS.org V4.2.0 - Copyright (C) 2003-2007 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
See http://www.FreeRTOS.org for documentation, latest information, license
and contact details. Please ensure to read the configuration and relevant
port sections of the online documentation.
***************************************************************************
*/
/*-----------------------------------------------------------
* Simple parallel port IO routines for the LED's.
*-----------------------------------------------------------*/
/* Scheduler includes. */
#include "FreeRTOS.h"
/* Demo application includes. */
#include "partest.h"
/* Board specific defines. */
#define partstFIRST_IO ( ( unsigned portLONG ) 0x10000 )
#define partstNUM_LEDS ( 8 )
/*-----------------------------------------------------------*/
void vParTestInitialise( void )
{
/* The ports are setup within prvInitialiseHardware(), called by main(). */
}
/*-----------------------------------------------------------*/
void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )
{
unsigned portLONG ulLED = partstFIRST_IO;
if( uxLED < partstNUM_LEDS )
{
/* Rotate to the wanted bit of port 1. Only P16 to P23 have an LED
attached. */
ulLED <<= ( unsigned portLONG ) uxLED;
/* Set or clear the output. */
if( xValue )
{
IO1SET = ulLED;
}
else
{
IO1CLR = ulLED;
}
}
}
/*-----------------------------------------------------------*/
void vParTestToggleLED( unsigned portBASE_TYPE uxLED )
{
unsigned portLONG ulLED = partstFIRST_IO, ulCurrentState;
if( uxLED < partstNUM_LEDS )
{
/* Rotate to the wanted bit of port 1. Only P10 to P13 have an LED
attached. */
ulLED <<= ( unsigned portLONG ) uxLED;
/* If this bit is already set, clear it, and visa versa. */
ulCurrentState = IO1PIN;
if( ulCurrentState & ulLED )
{
IO1CLR = ulLED;
}
else
{
IO1SET = ulLED;
}
}
}

View file

@ -1,173 +0,0 @@
;-----------------------------------------------------------------------------
; This file contains the startup code used by the ICCARM C compiler.
;
; The modules in this file are included in the libraries, and may be replaced
; by any user-defined modules that define the PUBLIC symbol _program_start or
; a user defined start symbol.
; To override the cstartup defined in the library, simply add your modified
; version to the workbench project.
;
; All code in the modules (except ?RESET) will be placed in the ICODE segment.
;
; $Revision: 1.56 $
;
;-----------------------------------------------------------------------------
;
; Naming covention of labels in this file:
;
; ?xxx - External labels only accessed from assembler.
; __xxx - External labels accessed from or defined in C.
; xxx - Labels local to one module (note: this file contains
; several modules).
; main - The starting point of the user program.
;
;---------------------------------------------------------------
; Macros and definitions for the whole file
;---------------------------------------------------------------
; Mode, correspords to bits 0-5 in CPSR
MODE_BITS DEFINE 0x1F ; Bit mask for mode bits in CPSR
USR_MODE DEFINE 0x10 ; User mode
FIQ_MODE DEFINE 0x11 ; Fast Interrupt Request mode
IRQ_MODE DEFINE 0x12 ; Interrupt Request mode
SVC_MODE DEFINE 0x13 ; Supervisor mode
ABT_MODE DEFINE 0x17 ; Abort mode
UND_MODE DEFINE 0x1B ; Undefined Instruction mode
SYS_MODE DEFINE 0x1F ; System mode
I_Bit DEFINE 0x80 ; IRQ Disable Bit
F_Bit DEFINE 0x40 ; FIQ Disable Bit
;---------------------------------------------------------------
; ?RESET
; Reset Vector.
; Normally, segment INTVEC is linked at address 0.
; For debugging purposes, INTVEC may be placed at other
; addresses.
; A debugger that honors the entry point will start the
; program in a normal way even if INTVEC is not at address 0.
;---------------------------------------------------------------
MODULE ?RESET
COMMON INTVEC:CODE:NOROOT(2)
PUBLIC __program_start
EXTERN ?cstartup
EXTERN undef_handler, swi_handler, prefetch_handler
EXTERN data_handler, irq_handler, fiq_handler
EXTERN vPortYieldProcessor
CODE32 ; Always ARM mode after reset
__program_start
org 0x00
B InitReset ; 0x00 Reset handler
undefvec:
B undefvec ; 0x04 Undefined Instruction
swivec:
B vPortYieldProcessor ; 0x08 Software Interrupt
pabtvec:
B pabtvec ; 0x0C Prefetch Abort
dabtvec:
B dabtvec ; 0x10 Data Abort
rsvdvec:
B rsvdvec ; 0x14 reserved
irqvec:
LDR PC, [PC, #-0xFF0] ; Jump directly to the address given by the AIC
fiqvec: ; 0x1c FIQ
;---------------------------------------------------------------
; ?CSTARTUP
;---------------------------------------------------------------
RSEG IRQ_STACK:DATA(2)
RSEG SVC_STACK:DATA:NOROOT(2)
RSEG CSTACK:DATA(2)
RSEG ICODE:CODE:NOROOT(2)
EXTERN ?main
; Execution starts here.
; After a reset, the mode is ARM, Supervisor, interrupts disabled.
CODE32
InitReset
; Add initialization needed before setup of stackpointers here
; Initialize the stack pointers.
; The pattern below can be used for any of the exception stacks:
; FIQ, IRQ, SVC, ABT, UND, SYS.
; The USR mode uses the same stack as SYS.
; The stack segments must be defined in the linker command file,
; and be declared above.
mrs r0,cpsr ; Original PSR value
bic r0,r0,#MODE_BITS ; Clear the mode bits
orr r0,r0,#IRQ_MODE ; Set IRQ mode bits
msr cpsr_c,r0 ; Change the mode
ldr sp,=SFE(IRQ_STACK) & 0xFFFFFFF8 ; End of IRQ_STACK
bic r0,r0,#MODE_BITS ; Clear the mode bits
orr r0,r0,#SYS_MODE ; Set System mode bits
msr cpsr_c,r0 ; Change the mode
ldr sp,=SFE(CSTACK) & 0xFFFFFFF8 ; End of CSTACK
bic r0,r0,#MODE_BITS ; Clear the mode bits
orr r0,r0,#SVC_MODE ; Set System mode bits
msr cpsr_c,r0 ; Change the mode
ldr sp,=SFE(SVC_STACK) & 0xFFFFFFF8 ; End of CSTACK
; Must start in supervisor mode.
MSR CPSR_c, #SVC_MODE|I_Bit|F_Bit
; Add more initialization here
; Continue to ?main for more IAR specific system startup
ldr r0,=?main
bx r0
;---------------------------------------------------------------
; ?EXEPTION_VECTOR
; This module is only linked if needed for closing files.
;---------------------------------------------------------------
PUBLIC AT91F_Default_FIQ_handler
PUBLIC AT91F_Default_IRQ_handler
PUBLIC AT91F_Spurious_handler
CODE32 ; Always ARM mode after exeption
AT91F_Default_FIQ_handler
b AT91F_Default_FIQ_handler
AT91F_Default_IRQ_handler
b AT91F_Default_IRQ_handler
AT91F_Spurious_handler
b AT91F_Spurious_handler
ENDMOD
END
ENDMOD
END

View file

@ -1,284 +0,0 @@
/*
FreeRTOS.org V4.2.0 - Copyright (C) 2003-2007 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
See http://www.FreeRTOS.org for documentation, latest information, license
and contact details. Please ensure to read the configuration and relevant
port sections of the online documentation.
***************************************************************************
*/
/*
NOTE : Tasks run in system mode and the scheduler runs in Supervisor mode.
The processor MUST be in supervisor mode when vTaskStartScheduler is
called. The demo applications included in the FreeRTOS.org download switch
to supervisor mode prior to main being called. If you are not using one of
these demo application projects then ensure Supervisor mode is used.
*/
/*
* Creates all the demo application tasks, then starts the scheduler. The WEB
* documentation provides more details of the demo application tasks.
*
* Main.c also creates a task called "Check". This only executes every three
* seconds but has the highest priority so is guaranteed to get processor time.
* Its main function is to check that all the other tasks are still operational.
* Each task (other than the "flash" tasks) maintains a unique count that is
* incremented each time the task successfully completes its function. Should
* any error occur within such a task the count is permanently halted. The
* check task inspects the count of each task to ensure it has changed since
* the last time the check task executed. If all the count variables have
* changed all the tasks are still executing error free, and the check task
* toggles the onboard LED. Should any task contain an error at any time
* the LED toggle rate will change from 3 seconds to 500ms.
*
*/
/* Standard includes. */
#include <stdlib.h>
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "task.h"
/* Demo application includes. */
#include "flash.h"
#include "integer.h"
#include "PollQ.h"
#include "BlockQ.h"
#include "semtest.h"
#include "dynamic.h"
#include "partest.h"
#include "comtest2.h"
/* Priorities for the demo application tasks. */
#define mainLED_TASK_PRIORITY ( tskIDLE_PRIORITY + 3 )
#define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define mainCHECK_TASK_PRIORITY ( tskIDLE_PRIORITY + 4 )
#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1 )
#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define mainCOM_TEST_PRIORITY ( tskIDLE_PRIORITY + 2 )
/* Constants required by the 'Check' task. */
#define mainNO_ERROR_FLASH_PERIOD ( ( portTickType ) 3000 / portTICK_RATE_MS )
#define mainERROR_FLASH_PERIOD ( ( portTickType ) 500 / portTICK_RATE_MS )
#define mainCHECK_TASK_LED ( 7 )
/* Constants for the ComTest tasks. */
#define mainCOM_TEST_BAUD_RATE ( ( unsigned portLONG ) 115200 )
#define mainCOM_TEST_LED ( 4 )
#define mainTX_ENABLE ( ( unsigned portLONG ) 0x0001 )
#define mainRX_ENABLE ( ( unsigned portLONG ) 0x0004 )
/* Constants to setup the PLL. */
#define mainPLL_MUL_4 ( ( unsigned portCHAR ) 0x0003 )
#define mainPLL_DIV_1 ( ( unsigned portCHAR ) 0x0000 )
#define mainPLL_ENABLE ( ( unsigned portCHAR ) 0x0001 )
#define mainPLL_CONNECT ( ( unsigned portCHAR ) 0x0003 )
#define mainPLL_FEED_BYTE1 ( ( unsigned portCHAR ) 0xaa )
#define mainPLL_FEED_BYTE2 ( ( unsigned portCHAR ) 0x55 )
#define mainPLL_LOCK ( ( unsigned portLONG ) 0x0400 )
/* Constants to setup the MAM. */
#define mainMAM_TIM_3 ( ( unsigned portCHAR ) 0x03 )
#define mainMAM_MODE_FULL ( ( unsigned portCHAR ) 0x02 )
/* Constants to setup the peripheral bus. */
#define mainBUS_CLK_FULL ( ( unsigned portCHAR ) 0x01 )
/* And finally, constant to setup the port for the LED's. */
#define mainLED_TO_OUTPUT ( ( unsigned portLONG ) 0xff0000 )
/*
* The task that executes at the highest priority and calls
* prvCheckOtherTasksAreStillRunning(). See the description at the top
* of the file.
*/
static void vErrorChecks( void *pvParameters );
/*
* Configures the processor for use with this demo.
*/
static void prvSetupHardware( void );
/*
* Checks that all the demo application tasks are still executing without error
* - as described at the top of the file.
*/
static portLONG prvCheckOtherTasksAreStillRunning( void );
/*-----------------------------------------------------------*/
/*
* Starts all the other tasks, then starts the scheduler.
*/
void main( void )
{
/* Setup the processor. */
prvSetupHardware();
/* Start all the standard demo application tasks. */
vStartIntegerMathTasks( tskIDLE_PRIORITY );
vStartLEDFlashTasks( mainLED_TASK_PRIORITY );
vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );
vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );
vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );
vStartDynamicPriorityTasks();
vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainCOM_TEST_BAUD_RATE, mainCOM_TEST_LED );
/* Start the check task - which is defined in this file. */
xTaskCreate( vErrorChecks, "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );
/* Start the scheduler.
NOTE : Tasks run in system mode and the scheduler runs in Supervisor mode.
The processor MUST be in supervisor mode when vTaskStartScheduler is
called. The demo applications included in the FreeRTOS.org download switch
to supervisor mode prior to main being called. If you are not using one of
these demo application projects then ensure Supervisor mode is used here.
*/
vTaskStartScheduler();
/* We should never get here as control is now taken by the scheduler. */
return;
}
/*-----------------------------------------------------------*/
static void prvSetupHardware( void )
{
/* Setup the PLL to multiply the XTAL input by 4. */
PLLCFG = ( mainPLL_MUL_4 | mainPLL_DIV_1 );
/* Activate the PLL by turning it on then feeding the correct sequence of
bytes. */
PLLCON = mainPLL_ENABLE;
PLLFEED = mainPLL_FEED_BYTE1;
PLLFEED = mainPLL_FEED_BYTE2;
/* Wait for the PLL to lock... */
while( !( PLLSTAT & mainPLL_LOCK ) );
/* ...before connecting it using the feed sequence again. */
PLLCON = mainPLL_CONNECT;
PLLFEED = mainPLL_FEED_BYTE1;
PLLFEED = mainPLL_FEED_BYTE2;
/* Setup and turn on the MAM. Three cycle access is used due to the fast
PLL used. It is possible faster overall performance could be obtained by
tuning the MAM and PLL settings. */
MAMTIM = mainMAM_TIM_3;
MAMCR = mainMAM_MODE_FULL;
/* Setup the peripheral bus to be the same as the PLL output. */
VPBDIV = mainBUS_CLK_FULL;
/* Configure the RS2332 pins. All other pins remain at their default of 0. */
PINSEL0 |= mainTX_ENABLE;
PINSEL0 |= mainRX_ENABLE;
/* LED pins need to be output. */
IO1DIR = mainLED_TO_OUTPUT;
/* Setup the peripheral bus to be the same as the PLL output. */
VPBDIV = mainBUS_CLK_FULL;
}
/*-----------------------------------------------------------*/
static void vErrorChecks( void *pvParameters )
{
portTickType xDelayPeriod = mainNO_ERROR_FLASH_PERIOD;
/* The parameters are not used in this task. */
( void ) pvParameters;
/* Cycle for ever, delaying then checking all the other tasks are still
operating without error. If an error is detected then the delay period
is decreased from mainNO_ERROR_FLASH_PERIOD to mainERROR_FLASH_PERIOD so
the on board LED flash rate will increase. */
for( ;; )
{
/* Delay until it is time to execute again. */
vTaskDelay( xDelayPeriod );
/* Check all the standard demo application tasks are executing without
error. */
if( prvCheckOtherTasksAreStillRunning() != pdPASS )
{
/* An error has been detected in one of the tasks - flash faster. */
xDelayPeriod = mainERROR_FLASH_PERIOD;
}
vParTestToggleLED( mainCHECK_TASK_LED );
}
}
/*-----------------------------------------------------------*/
static portLONG prvCheckOtherTasksAreStillRunning( void )
{
portLONG lReturn = ( portLONG ) pdPASS;
/* Check all the demo tasks (other than the flash tasks) to ensure
that they are all still running, and that none of them have detected
an error. */
if( xAreIntegerMathsTaskStillRunning() != pdTRUE )
{
lReturn = ( portLONG ) pdFAIL;
}
if( xArePollingQueuesStillRunning() != pdTRUE )
{
lReturn = ( portLONG ) pdFAIL;
}
if( xAreSemaphoreTasksStillRunning() != pdTRUE )
{
lReturn = ( portLONG ) pdFAIL;
}
if( xAreBlockingQueuesStillRunning() != pdTRUE )
{
lReturn = ( portLONG ) pdFAIL;
}
if( xAreComTestTasksStillRunning() != pdTRUE )
{
lReturn = ( portLONG ) pdFAIL;
}
if( xAreDynamicPriorityTasksStillRunning() != pdTRUE )
{
lReturn = ( portLONG ) pdFAIL;
}
return lReturn;
}
/*-----------------------------------------------------------*/

View file

@ -1,190 +0,0 @@
//*************************************************************************
// XLINK command file template for EWARM/ICCARM
//
// Usage: xlink -f lnkarm <your_object_file(s)>
// -s <program start label> <C/C++ runtime library>
//
// $Revision: 1.1 $
//*************************************************************************
//*************************************************************************
//
// -------------
// Code segments - may be placed anywhere in memory.
// -------------
//
// INTVEC -- Exception vector table.
// SWITAB -- Software interrupt vector table.
// ICODE -- Startup (cstartup) and exception code.
// DIFUNCT -- Dynamic initialization vectors used by C++.
// CODE -- Compiler generated code.
// CODE_I -- Compiler generated code declared __ramfunc (executes in RAM)
// CODE_ID -- Initializer for CODE_I (ROM).
//
// -------------
// Data segments - may be placed anywhere in memory.
// -------------
//
// CSTACK -- The stack used by C/C++ programs (system and user mode).
// IRQ_STACK -- The stack used by IRQ service routines.
// SVC_STACK -- The stack used in supervisor mode
// (Define other exception stacks as needed for
// FIQ, ABT, UND).
// HEAP -- The heap used by malloc and free in C and new and
// delete in C++.
// INITTAB -- Table containing addresses and sizes of segments that
// need to be initialized at startup (by cstartup).
// CHECKSUM -- The linker places checksum byte(s) in this segment,
// when the -J linker command line option is used.
// DATA_y -- Data objects.
//
// Where _y can be one of:
//
// _AN -- Holds uninitialized located objects, i.e. objects with
// an absolute location given by the @ operator or the
// #pragma location directive. Since these segments
// contain objects which already have a fixed address,
// they should not be mentioned in this linker command
// file.
// _C -- Constants (ROM).
// _I -- Initialized data (RAM).
// _ID -- The original content of _I (copied to _I by cstartup) (ROM).
// _N -- Uninitialized data (RAM).
// _Z -- Zero initialized data (RAM).
//
// Note: Be sure to use end values for the defined address ranges.
// Otherwise, the linker may allocate space outside the
// intended memory range.
//*************************************************************************
//************************************************
// Inform the linker about the CPU family used.
//************************************************
-carm
//*************************************************************************
// Segment placement - General information
//
// All numbers in the segment placement command lines below are interpreted
// as hexadecimal unless they are immediately preceded by a '.', which
// denotes decimal notation.
//
// When specifying the segment placement using the -P instead of the -Z
// option, the linker is free to split each segment into its segment parts
// and randomly place these parts within the given ranges in order to
// achieve a more efficient memory usage. One disadvantage, however, is
// that it is not possible to find the start or end address (using
// the assembler operators .sfb./.sfe.) of a segment which has been split
// and reformed.
//
// When generating an output file which is to be used for programming
// external ROM/Flash devices, the -M linker option is very useful
// (see xlink.pdf for details).
//*************************************************************************
//*************************************************************************
// Read-only segments mapped to ROM.
//*************************************************************************
-DROMSTART=00000000
-DROMEND=00001ffff
//************************************************
// Address range for reset and exception
// vectors (INTVEC).
// The vector area is 32 bytes,
// an additional 32 bytes is allocated for the
// constant table used by ldr PC in cstartup.s79.
//************************************************
-Z(CODE)INTVEC=00000000-0000003f
//************************************************
// Startup code and exception routines (ICODE).
//************************************************
-Z(CODE)ICODE,DIFUNCT=ROMSTART-ROMEND
-Z(CODE)SWITAB=ROMSTART-ROMEND
//************************************************
// Code segments may be placed anywhere.
//************************************************
-Z(CODE)CODE=ROMSTART-ROMEND
//************************************************
// Original ROM location for __ramfunc code copied
// to and executed from RAM.
//************************************************
-Z(CONST)CODE_ID=ROMSTART-ROMEND
//************************************************
// Various constants and initializers.
//************************************************
-Z(CONST)INITTAB,DATA_ID,DATA_C=ROMSTART-ROMEND
-Z(CONST)CHECKSUM=ROMSTART-ROMEND
//*************************************************************************
// Read/write segments mapped to RAM.
//*************************************************************************
-DRAMSTART=40000000
-DRAMEND=40003fff
//************************************************
// Data segments.
//************************************************
-Z(DATA)DATA_I,DATA_Z,DATA_N=RAMSTART-RAMEND
//************************************************
// __ramfunc code copied to and executed from RAM.
//************************************************
-Z(DATA)CODE_I=RAMSTART-RAMEND
//************************************************
// ICCARM produces code for __ramfunc functions in
// CODE_I segments. The -Q XLINK command line
// option redirects XLINK to emit the code in the
// CODE_ID segment instead, but to keep symbol and
// debug information associated with the CODE_I
// segment, where the code will execute.
//************************************************
-QCODE_I=CODE_ID
//*************************************************************************
// Stack and heap segments.
//*************************************************************************
-D_CSTACK_SIZE=200
-D_SVC_STACK_SIZE=190
-D_IRQ_STACK_SIZE=190
-D_HEAP_SIZE=4
-Z(DATA)CSTACK+_CSTACK_SIZE=RAMSTART-RAMEND
-Z(DATA)SVC_STACK+_SVC_STACK_SIZE=RAMSTART-RAMEND
-Z(DATA)IRQ_STACK+_IRQ_STACK_SIZE,HEAP+_HEAP_SIZE=RAMSTART-RAMEND
//*************************************************************************
// ELF/DWARF support.
//
// Uncomment the line "-Felf" below to generate ELF/DWARF output.
// Available format specifiers are:
//
// "-yn": Suppress DWARF debug output
// "-yp": Multiple ELF program sections
// "-yas": Format suitable for debuggers from ARM Ltd (also sets -p flag)
//
// "-Felf" and the format specifiers can also be supplied directly as
// command line options, or selected from the Xlink Output tab in the
// IAR Embedded Workbench.
//*************************************************************************
// -Felf

View file

@ -1,913 +0,0 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<project>
<fileVersion>1</fileVersion>
<configuration>
<name>Flash Debug</name>
<toolchain>
<name>ARM</name>
</toolchain>
<debug>1</debug>
<settings>
<name>C-SPY</name>
<archiveVersion>2</archiveVersion>
<data>
<version>13</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>CInput</name>
<state>1</state>
</option>
<option>
<name>CEndian</name>
<state>1</state>
</option>
<option>
<name>CProcessor</name>
<state>1</state>
</option>
<option>
<name>OCVariant</name>
<state>0</state>
</option>
<option>
<name>MacOverride</name>
<state>0</state>
</option>
<option>
<name>MacFile</name>
<state></state>
</option>
<option>
<name>MemOverride</name>
<state>0</state>
</option>
<option>
<name>MemFile</name>
<state>$TOOLKIT_DIR$\CONFIG\iolpc2129.ddf</state>
</option>
<option>
<name>RunToEnable</name>
<state>1</state>
</option>
<option>
<name>RunToName</name>
<state>main</state>
</option>
<option>
<name>CExtraOptionsCheck</name>
<state>0</state>
</option>
<option>
<name>CExtraOptions</name>
<state></state>
</option>
<option>
<name>CFpuProcessor</name>
<state>1</state>
</option>
<option>
<name>OCDDFArgumentProducer</name>
<state></state>
</option>
<option>
<name>OCDownloadSuppressDownload</name>
<state>0</state>
</option>
<option>
<name>OCDownloadVerifyAll</name>
<state>0</state>
</option>
<option>
<name>OCProductVersion</name>
<state>4.10B</state>
</option>
<option>
<name>OCDynDriverList</name>
<state>JLINK_ID</state>
</option>
<option>
<name>OCLastSavedByProductVersion</name>
<state>4.30A</state>
</option>
<option>
<name>OCDownloadAttachToProgram</name>
<state>0</state>
</option>
<option>
<name>FlashLoaders</name>
<state>,,,,(default),</state>
</option>
<option>
<name>UseFlashLoader</name>
<state>1</state>
</option>
</data>
</settings>
<settings>
<name>ARMSIM_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>0</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>OCSimDriverInfo</name>
<state>1</state>
</option>
</data>
</settings>
<settings>
<name>ANGEL_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>0</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>CCAngelHeartbeat</name>
<state>1</state>
</option>
<option>
<name>CAngelCommunication</name>
<state>1</state>
</option>
<option>
<name>CAngelCommBaud</name>
<version>0</version>
<state>3</state>
</option>
<option>
<name>CAngelCommPort</name>
<version>0</version>
<state>0</state>
</option>
<option>
<name>ANGELTCPIP</name>
<state>aaa.bbb.ccc.ddd</state>
</option>
<option>
<name>DoAngelLogfile</name>
<state>0</state>
</option>
<option>
<name>AngelLogFile</name>
<state>$TOOLKIT_DIR$\cspycomm.log</state>
</option>
<option>
<name>OCDriverInfo</name>
<state>1</state>
</option>
</data>
</settings>
<settings>
<name>IARROM_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>0</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>CRomLogFileCheck</name>
<state>0</state>
</option>
<option>
<name>CRomLogFileEditB</name>
<state>$TOOLKIT_DIR$\cspycomm.log</state>
</option>
<option>
<name>CRomCommunication</name>
<state>0</state>
</option>
<option>
<name>CRomCommPort</name>
<version>0</version>
<state>0</state>
</option>
<option>
<name>CRomCommBaud</name>
<version>0</version>
<state>7</state>
</option>
<option>
<name>OCDriverInfo</name>
<state>1</state>
</option>
</data>
</settings>
<settings>
<name>JLINK_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>2</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>JLinkSpeed</name>
<state>30</state>
</option>
<option>
<name>CCJLinkHWReset</name>
<state>1</state>
</option>
<option>
<name>CCJLinkTRSTReset</name>
<state>0</state>
</option>
<option>
<name>CCJLinkDoLogfile</name>
<state>0</state>
</option>
<option>
<name>CCJLinkLogFile</name>
<state>$TOOLKIT_DIR$\cspycomm.log</state>
</option>
<option>
<name>CCJLinkHWResetDelay</name>
<state></state>
</option>
<option>
<name>CCJLinkSpeedRadio</name>
<state>0</state>
</option>
<option>
<name>OCDriverInfo</name>
<state>1</state>
</option>
<option>
<name>JLinkInitialSpeed</name>
<state>32</state>
</option>
<option>
<name>CCDoJlinkMultiTarget</name>
<state>0</state>
</option>
<option>
<name>CCScanChainNonARMDevices</name>
<state>0</state>
</option>
<option>
<name>CCJLinkMultiTarget</name>
<state>0</state>
</option>
<option>
<name>CCJLinkIRLength</name>
<state>0</state>
</option>
<option>
<name>CCJLinkCommRadio</name>
<state>0</state>
</option>
<option>
<name>CCJLinkTCPIP</name>
<state>aaa.bbb.ccc.ddd</state>
</option>
</data>
</settings>
<settings>
<name>MACRAIGOR_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>1</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>jtag</name>
<version>0</version>
<state>0</state>
</option>
<option>
<name>EmuSpeed</name>
<state>1</state>
</option>
<option>
<name>TCPIP</name>
<state>aaa.bbb.ccc.ddd</state>
</option>
<option>
<name>DoLogfile</name>
<state>0</state>
</option>
<option>
<name>LogFile</name>
<state>$TOOLKIT_DIR$\cspycomm.log</state>
</option>
<option>
<name>DoEmuMultiTarget</name>
<state>0</state>
</option>
<option>
<name>EmuMultiTarget</name>
<state>0@ARM7TDMI</state>
</option>
<option>
<name>EmuHWReset</name>
<state>0</state>
</option>
<option>
<name>CEmuCommBaud</name>
<version>0</version>
<state>4</state>
</option>
<option>
<name>CEmuCommPort</name>
<version>0</version>
<state>0</state>
</option>
<option>
<name>jtago</name>
<version>0</version>
<state>0</state>
</option>
<option>
<name>OCDriverInfo</name>
<state>1</state>
</option>
<option>
<name>UnusedAddr</name>
<state>0x00800000</state>
</option>
<option>
<name>CCMacraigorHWResetDelay</name>
<state></state>
</option>
</data>
</settings>
<settings>
<name>RDI_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>1</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>CRDIDriverDll</name>
<state>Browse to your RDI driver</state>
</option>
<option>
<name>CRDILogFileCheck</name>
<state>0</state>
</option>
<option>
<name>CRDILogFileEdit</name>
<state>$TOOLKIT_DIR$\cspycomm.log</state>
</option>
<option>
<name>CCRDIHWReset</name>
<state>0</state>
</option>
<option>
<name>CCRDICatchReset</name>
<state>0</state>
</option>
<option>
<name>CCRDICatchUndef</name>
<state>0</state>
</option>
<option>
<name>CCRDICatchSWI</name>
<state>0</state>
</option>
<option>
<name>CCRDICatchData</name>
<state>0</state>
</option>
<option>
<name>CCRDICatchPrefetch</name>
<state>0</state>
</option>
<option>
<name>CCRDICatchIRQ</name>
<state>0</state>
</option>
<option>
<name>CCRDICatchFIQ</name>
<state>0</state>
</option>
<option>
<name>CCRDIUseETM</name>
<state>0</state>
</option>
<option>
<name>OCDriverInfo</name>
<state>1</state>
</option>
</data>
</settings>
<settings>
<name>THIRDPARTY_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>0</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>CThirdPartyDriverDll</name>
<state>Browse to your third-party driver</state>
</option>
<option>
<name>CThirdPartyLogFileCheck</name>
<state>0</state>
</option>
<option>
<name>CThirdPartyLogFileEditB</name>
<state>$TOOLKIT_DIR$\cspycomm.log</state>
</option>
<option>
<name>OCDriverInfo</name>
<state>1</state>
</option>
</data>
</settings>
<debuggerPlugins>
<plugin>
<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ewplugin</file>
<loadFlag>1</loadFlag>
</plugin>
<plugin>
<file>$EW_DIR$\common\plugins\Profiling\Profiling.ewplugin</file>
<loadFlag>1</loadFlag>
</plugin>
<plugin>
<file>$EW_DIR$\common\plugins\Trace\Trace.ewplugin</file>
<loadFlag>1</loadFlag>
</plugin>
<plugin>
<file>$EW_DIR$\common\plugins\Orti\Orti.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CMXArmPlugin.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CMXTinyArmPlugin.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\OSE\OseEpsilonPlugin.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
</debuggerPlugins>
</configuration>
<configuration>
<name>Flash Bin</name>
<toolchain>
<name>ARM</name>
</toolchain>
<debug>0</debug>
<settings>
<name>C-SPY</name>
<archiveVersion>2</archiveVersion>
<data>
<version>13</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
<name>CInput</name>
<state>1</state>
</option>
<option>
<name>CEndian</name>
<state>1</state>
</option>
<option>
<name>CProcessor</name>
<state>1</state>
</option>
<option>
<name>OCVariant</name>
<state>0</state>
</option>
<option>
<name>MacOverride</name>
<state>0</state>
</option>
<option>
<name>MacFile</name>
<state></state>
</option>
<option>
<name>MemOverride</name>
<state>0</state>
</option>
<option>
<name>MemFile</name>
<state>$TOOLKIT_DIR$\CONFIG\iolpc2129.ddf</state>
</option>
<option>
<name>RunToEnable</name>
<state>1</state>
</option>
<option>
<name>RunToName</name>
<state>main</state>
</option>
<option>
<name>CExtraOptionsCheck</name>
<state>0</state>
</option>
<option>
<name>CExtraOptions</name>
<state></state>
</option>
<option>
<name>CFpuProcessor</name>
<state>1</state>
</option>
<option>
<name>OCDDFArgumentProducer</name>
<state></state>
</option>
<option>
<name>OCDownloadSuppressDownload</name>
<state>0</state>
</option>
<option>
<name>OCDownloadVerifyAll</name>
<state>0</state>
</option>
<option>
<name>OCProductVersion</name>
<state>4.10B</state>
</option>
<option>
<name>OCDynDriverList</name>
<state>JLINK_ID</state>
</option>
<option>
<name>OCLastSavedByProductVersion</name>
<state>4.30A</state>
</option>
<option>
<name>OCDownloadAttachToProgram</name>
<state>0</state>
</option>
<option>
<name>FlashLoaders</name>
<state>,,,,(default),</state>
</option>
<option>
<name>UseFlashLoader</name>
<state>1</state>
</option>
</data>
</settings>
<settings>
<name>ARMSIM_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>0</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
<name>OCSimDriverInfo</name>
<state>1</state>
</option>
</data>
</settings>
<settings>
<name>ANGEL_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>0</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
<name>CCAngelHeartbeat</name>
<state>1</state>
</option>
<option>
<name>CAngelCommunication</name>
<state>1</state>
</option>
<option>
<name>CAngelCommBaud</name>
<version>0</version>
<state>3</state>
</option>
<option>
<name>CAngelCommPort</name>
<version>0</version>
<state>0</state>
</option>
<option>
<name>ANGELTCPIP</name>
<state>aaa.bbb.ccc.ddd</state>
</option>
<option>
<name>DoAngelLogfile</name>
<state>0</state>
</option>
<option>
<name>AngelLogFile</name>
<state>$TOOLKIT_DIR$\cspycomm.log</state>
</option>
<option>
<name>OCDriverInfo</name>
<state>1</state>
</option>
</data>
</settings>
<settings>
<name>IARROM_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>0</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
<name>CRomLogFileCheck</name>
<state>0</state>
</option>
<option>
<name>CRomLogFileEditB</name>
<state>$TOOLKIT_DIR$\cspycomm.log</state>
</option>
<option>
<name>CRomCommunication</name>
<state>0</state>
</option>
<option>
<name>CRomCommPort</name>
<version>0</version>
<state>0</state>
</option>
<option>
<name>CRomCommBaud</name>
<version>0</version>
<state>7</state>
</option>
<option>
<name>OCDriverInfo</name>
<state>1</state>
</option>
</data>
</settings>
<settings>
<name>JLINK_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>2</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
<name>JLinkSpeed</name>
<state>30</state>
</option>
<option>
<name>CCJLinkHWReset</name>
<state>1</state>
</option>
<option>
<name>CCJLinkTRSTReset</name>
<state>0</state>
</option>
<option>
<name>CCJLinkDoLogfile</name>
<state>0</state>
</option>
<option>
<name>CCJLinkLogFile</name>
<state>$TOOLKIT_DIR$\cspycomm.log</state>
</option>
<option>
<name>CCJLinkHWResetDelay</name>
<state></state>
</option>
<option>
<name>CCJLinkSpeedRadio</name>
<state>0</state>
</option>
<option>
<name>OCDriverInfo</name>
<state>1</state>
</option>
<option>
<name>JLinkInitialSpeed</name>
<state>32</state>
</option>
<option>
<name>CCDoJlinkMultiTarget</name>
<state>0</state>
</option>
<option>
<name>CCScanChainNonARMDevices</name>
<state>0</state>
</option>
<option>
<name>CCJLinkMultiTarget</name>
<state>0</state>
</option>
<option>
<name>CCJLinkIRLength</name>
<state>0</state>
</option>
<option>
<name>CCJLinkCommRadio</name>
<state>0</state>
</option>
<option>
<name>CCJLinkTCPIP</name>
<state>aaa.bbb.ccc.ddd</state>
</option>
</data>
</settings>
<settings>
<name>MACRAIGOR_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>1</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
<name>jtag</name>
<version>0</version>
<state>0</state>
</option>
<option>
<name>EmuSpeed</name>
<state>1</state>
</option>
<option>
<name>TCPIP</name>
<state>aaa.bbb.ccc.ddd</state>
</option>
<option>
<name>DoLogfile</name>
<state>0</state>
</option>
<option>
<name>LogFile</name>
<state>$TOOLKIT_DIR$\cspycomm.log</state>
</option>
<option>
<name>DoEmuMultiTarget</name>
<state>0</state>
</option>
<option>
<name>EmuMultiTarget</name>
<state>0@ARM7TDMI</state>
</option>
<option>
<name>EmuHWReset</name>
<state>0</state>
</option>
<option>
<name>CEmuCommBaud</name>
<version>0</version>
<state>4</state>
</option>
<option>
<name>CEmuCommPort</name>
<version>0</version>
<state>0</state>
</option>
<option>
<name>jtago</name>
<version>0</version>
<state>0</state>
</option>
<option>
<name>OCDriverInfo</name>
<state>1</state>
</option>
<option>
<name>UnusedAddr</name>
<state>0x00800000</state>
</option>
<option>
<name>CCMacraigorHWResetDelay</name>
<state></state>
</option>
</data>
</settings>
<settings>
<name>RDI_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>1</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
<name>CRDIDriverDll</name>
<state>Browse to your RDI driver</state>
</option>
<option>
<name>CRDILogFileCheck</name>
<state>0</state>
</option>
<option>
<name>CRDILogFileEdit</name>
<state>$TOOLKIT_DIR$\cspycomm.log</state>
</option>
<option>
<name>CCRDIHWReset</name>
<state>0</state>
</option>
<option>
<name>CCRDICatchReset</name>
<state>0</state>
</option>
<option>
<name>CCRDICatchUndef</name>
<state>0</state>
</option>
<option>
<name>CCRDICatchSWI</name>
<state>0</state>
</option>
<option>
<name>CCRDICatchData</name>
<state>0</state>
</option>
<option>
<name>CCRDICatchPrefetch</name>
<state>0</state>
</option>
<option>
<name>CCRDICatchIRQ</name>
<state>0</state>
</option>
<option>
<name>CCRDICatchFIQ</name>
<state>0</state>
</option>
<option>
<name>CCRDIUseETM</name>
<state>0</state>
</option>
<option>
<name>OCDriverInfo</name>
<state>1</state>
</option>
</data>
</settings>
<settings>
<name>THIRDPARTY_ID</name>
<archiveVersion>2</archiveVersion>
<data>
<version>0</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
<name>CThirdPartyDriverDll</name>
<state>Browse to your third-party driver</state>
</option>
<option>
<name>CThirdPartyLogFileCheck</name>
<state>0</state>
</option>
<option>
<name>CThirdPartyLogFileEditB</name>
<state>$TOOLKIT_DIR$\cspycomm.log</state>
</option>
<option>
<name>OCDriverInfo</name>
<state>1</state>
</option>
</data>
</settings>
<debuggerPlugins>
<plugin>
<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ewplugin</file>
<loadFlag>1</loadFlag>
</plugin>
<plugin>
<file>$EW_DIR$\common\plugins\Profiling\Profiling.ewplugin</file>
<loadFlag>1</loadFlag>
</plugin>
<plugin>
<file>$EW_DIR$\common\plugins\Trace\Trace.ewplugin</file>
<loadFlag>1</loadFlag>
</plugin>
<plugin>
<file>$EW_DIR$\common\plugins\Orti\Orti.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CMXArmPlugin.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\CMX\CMXTinyArmPlugin.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\OSE\OseEpsilonPlugin.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
</debuggerPlugins>
</configuration>
</project>

File diff suppressed because it is too large Load diff

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@ -1,10 +0,0 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<workspace>
<project>
<path>$WS_DIR$\rtosdemo.ewp</path>
</project>
<batchBuild/>
</workspace>

View file

@ -1,288 +0,0 @@
/*
FreeRTOS.org V4.2.0 - Copyright (C) 2003-2007 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
See http://www.FreeRTOS.org for documentation, latest information, license
and contact details. Please ensure to read the configuration and relevant
port sections of the online documentation.
***************************************************************************
*/
/*
BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART0.
*/
/* Standard includes. */
#include <stdlib.h>
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "queue.h"
#include "task.h"
/* Demo application includes. */
#include "serial.h"
/*-----------------------------------------------------------*/
/* Constants to setup and access the UART. */
#define serDLAB ( ( unsigned portCHAR ) 0x80 )
#define serENABLE_INTERRUPTS ( ( unsigned portCHAR ) 0x03 )
#define serNO_PARITY ( ( unsigned portCHAR ) 0x00 )
#define ser1_STOP_BIT ( ( unsigned portCHAR ) 0x00 )
#define ser8_BIT_CHARS ( ( unsigned portCHAR ) 0x03 )
#define serFIFO_ON ( ( unsigned portCHAR ) 0x01 )
#define serCLEAR_FIFO ( ( unsigned portCHAR ) 0x06 )
#define serWANTED_CLOCK_SCALING ( ( unsigned portLONG ) 16 )
/* Constants to setup and access the VIC. */
#define serU0VIC_CHANNEL ( ( unsigned portLONG ) 0x0006 )
#define serU0VIC_CHANNEL_BIT ( ( unsigned portLONG ) 0x0040 )
#define serU0VIC_ENABLE ( ( unsigned portLONG ) 0x0020 )
#define serCLEAR_VIC_INTERRUPT ( ( unsigned portLONG ) 0 )
/* Constants to determine the ISR source. */
#define serSOURCE_THRE ( ( unsigned portCHAR ) 0x02 )
#define serSOURCE_RX_TIMEOUT ( ( unsigned portCHAR ) 0x0c )
#define serSOURCE_ERROR ( ( unsigned portCHAR ) 0x06 )
#define serSOURCE_RX ( ( unsigned portCHAR ) 0x04 )
#define serINTERRUPT_SOURCE_MASK ( ( unsigned portCHAR ) 0x0f )
/* Misc. */
#define serINVALID_QUEUE ( ( xQueueHandle ) 0 )
#define serHANDLE ( ( xComPortHandle ) 1 )
#define serNO_BLOCK ( ( portTickType ) 0 )
/*-----------------------------------------------------------*/
/* Queues used to hold received characters, and characters waiting to be
transmitted. */
static xQueueHandle xRxedChars;
static xQueueHandle xCharsForTx;
static volatile portLONG lTHREEmpty = pdFALSE;
/*-----------------------------------------------------------*/
/* The ISR. Note that this is called by a wrapper written in the file
SerialISR.s79. See the WEB documentation for this port for further
information. */
__arm void vSerialISR( void );
/*-----------------------------------------------------------*/
xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
{
unsigned portLONG ulDivisor, ulWantedClock;
xComPortHandle xReturn = serHANDLE;
extern void ( vSerialISREntry) ( void );
/* Create the queues used to hold Rx and Tx characters. */
xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
/* Initialise the THRE empty flag. */
lTHREEmpty = pdTRUE;
if(
( xRxedChars != serINVALID_QUEUE ) &&
( xCharsForTx != serINVALID_QUEUE ) &&
( ulWantedBaud != ( unsigned portLONG ) 0 )
)
{
portENTER_CRITICAL();
{
/* Setup the baud rate: Calculate the divisor value. */
ulWantedClock = ulWantedBaud * serWANTED_CLOCK_SCALING;
ulDivisor = configCPU_CLOCK_HZ / ulWantedClock;
/* Set the DLAB bit so we can access the divisor. */
U0LCR |= serDLAB;
/* Setup the divisor. */
U0DLL = ( unsigned portCHAR ) ( ulDivisor & ( unsigned portLONG ) 0xff );
ulDivisor >>= 8;
U0DLM = ( unsigned portCHAR ) ( ulDivisor & ( unsigned portLONG ) 0xff );
/* Turn on the FIFO's and clear the buffers. */
U0FCR = ( serFIFO_ON | serCLEAR_FIFO );
/* Setup transmission format. */
U0LCR = serNO_PARITY | ser1_STOP_BIT | ser8_BIT_CHARS;
/* Setup the VIC for the UART. */
VICIntSelect &= ~( serU0VIC_CHANNEL_BIT );
VICIntEnable |= serU0VIC_CHANNEL_BIT;
VICVectAddr1 = ( unsigned portLONG ) vSerialISREntry;
VICVectCntl1 = serU0VIC_CHANNEL | serU0VIC_ENABLE;
/* Enable UART0 interrupts. */
U0IER |= serENABLE_INTERRUPTS;
}
portEXIT_CRITICAL();
xReturn = ( xComPortHandle ) 1;
}
else
{
xReturn = ( xComPortHandle ) 0;
}
return xReturn;
}
/*-----------------------------------------------------------*/
signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )
{
/* The port handle is not required as this driver only supports UART0. */
( void ) pxPort;
/* Get the next character from the buffer. Return false if no characters
are available, or arrive before xBlockTime expires. */
if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
{
return pdTRUE;
}
else
{
return pdFALSE;
}
}
/*-----------------------------------------------------------*/
void vSerialPutString( xComPortHandle pxPort, const signed portCHAR * const pcString, unsigned portSHORT usStringLength )
{
signed portCHAR *pxNext;
/* NOTE: This implementation does not handle the queue being full as no
block time is used! */
/* The port handle is not required as this driver only supports UART0. */
( void ) pxPort;
( void ) usStringLength;
/* Send each character in the string, one at a time. */
pxNext = ( signed portCHAR * ) pcString;
while( *pxNext )
{
xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );
pxNext++;
}
}
/*-----------------------------------------------------------*/
signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
{
signed portBASE_TYPE xReturn;
/* The port handle is not required as this driver only supports UART0. */
( void ) pxPort;
portENTER_CRITICAL();
{
/* Is there space to write directly to the UART? */
if( lTHREEmpty == ( portLONG ) pdTRUE )
{
/* We wrote the character directly to the UART, so was
successful. */
lTHREEmpty = pdFALSE;
U0THR = cOutChar;
xReturn = pdPASS;
}
else
{
/* We cannot write directly to the UART, so queue the character.
Block for a maximum of xBlockTime if there is no space in the
queue. It is ok to block within a critical section as each
task has it's own critical section management. */
xReturn = xQueueSend( xCharsForTx, &cOutChar, xBlockTime );
/* Depending on queue sizing and task prioritisation: While we
were blocked waiting to post interrupts were not disabled. It is
possible that the serial ISR has emptied the Tx queue, in which
case we need to start the Tx off again. */
if( lTHREEmpty == ( portLONG ) pdTRUE )
{
xQueueReceive( xCharsForTx, &cOutChar, serNO_BLOCK );
lTHREEmpty = pdFALSE;
U0THR = cOutChar;
}
}
}
portEXIT_CRITICAL();
return xReturn;
}
/*-----------------------------------------------------------*/
__arm void vSerialISR( void )
{
signed portCHAR cChar;
portBASE_TYPE xTaskWokenByRx = pdFALSE, xTaskWokenByTx = pdFALSE;
/* What caused the interrupt? */
switch( U0IIR & serINTERRUPT_SOURCE_MASK )
{
case serSOURCE_ERROR : /* Not handling this, but clear the interrupt. */
cChar = U0LSR;
break;
case serSOURCE_THRE : /* The THRE is empty. If there is another
character in the Tx queue, send it now. */
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWokenByTx ) == pdTRUE )
{
U0THR = cChar;
}
else
{
/* There are no further characters
queued to send so we can indicate
that the THRE is available. */
lTHREEmpty = pdTRUE;
}
break;
case serSOURCE_RX_TIMEOUT :
case serSOURCE_RX : /* A character was received. Place it in
the queue of received characters. */
cChar = U0RBR;
if( xQueueSendFromISR( xRxedChars, &cChar, pdFALSE ) )
{
xTaskWokenByRx = pdTRUE;
}
break;
default : /* There is nothing to do, leave the ISR. */
break;
}
/* Exit the ISR. If a task was woken by either a character being received
or transmitted then a context switch will occur. */
portEND_SWITCHING_ISR( ( xTaskWokenByTx || xTaskWokenByRx ) );
/* Clear the ISR in the VIC. */
VICVectAddr = serCLEAR_VIC_INTERRUPT;
}
/*-----------------------------------------------------------*/

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@ -1,24 +0,0 @@
RSEG ICODE:CODE
CODE32
EXTERN vSerialISR
PUBLIC vSerialISREntry
; Wrapper for the serial port interrupt service routine. This can cause a
; context switch so requires an assembly wrapper.
; Defines the portSAVE_CONTEXT and portRESTORE_CONTEXT macros.
#include "ISR_Support.h"
vSerialISREntry:
portSAVE_CONTEXT ; Save the context of the current task.
bl vSerialISR ; Call the ISR routine.
portRESTORE_CONTEXT ; Restore the context of the current task -
; which may be different to the task that
; was interrupted.
END

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@ -1,71 +0,0 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<Project>
<Desktop>
<Static>
<Workspace>
<ColumnWidths>
<Column0>189</Column0><Column1>27</Column1><Column2>27</Column2></ColumnWidths>
</Workspace>
<Disassembly>
<PreferedWindows><Position>2</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows><MixedMode>1</MixedMode><CodeCovEnabled>0</CodeCovEnabled><CodeCovShow>0</CodeCovShow></Disassembly>
<Debug-Log/>
<Build/>
<Register><PreferedWindows><Position>2</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows></Register><QWatch><Column0>188</Column0><Column1>171</Column1><Column2>100</Column2><Column3>100</Column3></QWatch><Memory><ZoneNumber>0</ZoneNumber><FindDirection>1</FindDirection><FindAsHex>0</FindAsHex></Memory><Watch><Format><struct_types/><watch_formats/></Format></Watch></Static>
<Windows>
<Wnd0>
<Tabs>
<Tab>
<Identity>TabID-23416-30482</Identity>
<TabName>Workspace</TabName>
<Factory>Workspace</Factory>
<Session>
<NodeDict><ExpandedNode>rtosdemo</ExpandedNode></NodeDict></Session>
</Tab>
</Tabs>
<SelectedTab>0</SelectedTab></Wnd0>
<Wnd2>
<Tabs>
<Tab>
<Identity>TabID-12145-30489</Identity>
<TabName>Debug Log</TabName>
<Factory>Debug-Log</Factory>
<Session/>
</Tab>
<Tab>
<Identity>TabID-22894-30492</Identity>
<TabName>Build</TabName>
<Factory>Build</Factory>
<Session/>
</Tab>
</Tabs>
<SelectedTab>1</SelectedTab></Wnd2>
<Wnd4><Tabs><Tab><Identity>TabID-18780-12821</Identity><TabName>Memory</TabName><Factory>Memory</Factory><Session><SelectionAnchor>2097764</SelectionAnchor><SelectionEnd>2097764</SelectionEnd><UnitsPerGroup>1</UnitsPerGroup><EndianMode>0</EndianMode><DataCovEnabled>0</DataCovEnabled><DataCovShown>0</DataCovShown></Session></Tab></Tabs><SelectedTab>0</SelectedTab></Wnd4><Wnd5><Tabs><Tab><Identity>TabID-23506-14575</Identity><TabName>Watch</TabName><Factory>Watch</Factory><Session><Expressions><Expression><Expression>pxCurrentTCB</Expression></Expression><Expression><Expression>ulCriticalNesting</Expression></Expression></Expressions><TabId>0</TabId><Column0>176</Column0><Column1>100</Column1><Column2>100</Column2><Column3>100</Column3></Session></Tab></Tabs><SelectedTab>0</SelectedTab></Wnd5><Wnd1><Tabs><Tab><Identity>TabID-4859-22480</Identity><TabName>Disassembly</TabName><Factory>Disassembly</Factory><Session/></Tab></Tabs><SelectedTab>0</SelectedTab></Wnd1><Wnd3><Tabs><Tab><Identity>TabID-154-22568</Identity><TabName>Register</TabName><Factory>Register</Factory><Session><REG1>0</REG1><REG2>0</REG2><Group>0</Group><States>1</States><State0>CPSR</State0></Session></Tab></Tabs><SelectedTab>0</SelectedTab></Wnd3></Windows>
<Editor>
<Pane><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Demo\ARM7_Ateml_IAR\main.c</Filename><XPos>0</XPos><YPos>10</YPos><SelStart>378</SelStart><SelEnd>378</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\source\include\task.h</Filename><XPos>0</XPos><YPos>778</YPos><SelStart>24283</SelStart><SelEnd>24283</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Source\tasks.c</Filename><XPos>0</XPos><YPos>939</YPos><SelStart>30511</SelStart><SelEnd>30511</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Demo\ARM7_Ateml_IAR\SrcIAR\Cstartup.s79</Filename><XPos>0</XPos><YPos>48</YPos><SelStart>2226</SelStart><SelEnd>2226</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Demo\Common\Minimal\flash.c</Filename><XPos>0</XPos><YPos>98</YPos><SelStart>4025</SelStart><SelEnd>4025</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Source\portable\IAR\AtmelSAM7\portasm.s79</Filename><XPos>0</XPos><YPos>41</YPos><SelStart>1057</SelStart><SelEnd>1079</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Demo\ARM7_Ateml_IAR\srciar\lib_AT91SAM7S64.h</Filename><XPos>0</XPos><YPos>2778</YPos><SelStart>108450</SelStart><SelEnd>108450</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Source\portable\IAR\AtmelSAM7\port.c</Filename><XPos>0</XPos><YPos>136</YPos><SelStart>5326</SelStart><SelEnd>5326</SelEnd></Tab><ActiveTab>7</ActiveTab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Demo\ARM7_Ateml_IAR\ParTest\ParTest.c</Filename><XPos>0</XPos><YPos>36</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>E:\Dev\FreeRTOS\Source\portable\IAR\AtmelSAM7\portmacro.h</Filename><XPos>0</XPos><YPos>67</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd></Tab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>
<Positions>
<Top><Row0><Sizes><Toolbar-0084f8a0><key>IarIdePM1</key></Toolbar-0084f8a0></Sizes></Row0><Row1><Sizes><Toolbar-031ef990><key>DebuggerGui1</key></Toolbar-031ef990></Sizes></Row1></Top><Left><Row0><Sizes><Wnd0><Rect><Top>-2</Top><Left>-2</Left><Bottom>715</Bottom><Right>263</Right><x>-2</x><y>-2</y><xscreen>153</xscreen><yscreen>153</yscreen><sizeHorzCX>95625</sizeHorzCX><sizeHorzCY>136729</sizeHorzCY><sizeVertCX>165625</sizeVertCX><sizeVertCY>640750</sizeVertCY></Rect></Wnd0></Sizes></Row0></Left><Right><Row0><Sizes><Wnd1><Rect><Top>-2</Top><Left>-2</Left><Bottom>715</Bottom><Right>647</Right><x>-2</x><y>-2</y><xscreen>190</xscreen><yscreen>190</yscreen><sizeHorzCX>118750</sizeHorzCX><sizeHorzCY>169794</sizeHorzCY><sizeVertCX>405625</sizeVertCX><sizeVertCY>640750</sizeVertCY></Rect></Wnd1></Sizes></Row0><Row1><Sizes><Wnd3><Rect><Top>-2</Top><Left>645</Left><Bottom>715</Bottom><Right>1025</Right><x>645</x><y>-2</y><xscreen>190</xscreen><yscreen>190</yscreen><sizeHorzCX>118750</sizeHorzCX><sizeHorzCY>169794</sizeHorzCY><sizeVertCX>237500</sizeVertCX><sizeVertCY>640750</sizeVertCY></Rect></Wnd3></Sizes></Row1></Right><Bottom><Row0><Sizes><Wnd2><Rect><Top>-2</Top><Left>-2</Left><Bottom>151</Bottom><Right>1602</Right><x>-2</x><y>-2</y><xscreen>1604</xscreen><yscreen>153</yscreen><sizeHorzCX>1002500</sizeHorzCX><sizeHorzCY>136729</sizeHorzCY><sizeVertCX>95625</sizeVertCX><sizeVertCY>136729</sizeVertCY></Rect></Wnd2></Sizes></Row0><Row1><Sizes><Wnd4><Rect><Top>149</Top><Left>-2</Left><Bottom>333</Bottom><Right>669</Right><x>-2</x><y>149</y><xscreen>671</xscreen><yscreen>184</yscreen><sizeHorzCX>419375</sizeHorzCX><sizeHorzCY>164432</sizeHorzCY><sizeVertCX>114375</sizeVertCX><sizeVertCY>163538</sizeVertCY></Rect></Wnd4><Wnd5><Rect><Top>149</Top><Left>667</Left><Bottom>333</Bottom><Right>1602</Right><x>667</x><y>149</y><xscreen>935</xscreen><yscreen>184</yscreen><sizeHorzCX>584375</sizeHorzCX><sizeHorzCY>164432</sizeHorzCY><sizeVertCX>115000</sizeVertCX><sizeVertCY>598748</sizeVertCY></Rect></Wnd5></Sizes></Row1></Bot
tom><Float><Sizes/></Float></Positions>
</Desktop>
</Project>

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