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Tidy up new port file.
This commit is contained in:
Richard Barry
parent
18797cb689
commit
c8b25f8bf2
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@ -65,7 +65,7 @@
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* |||------------------- Auxiliary Cary Flag cleared
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* ||-------------------- Register bank Select 1 Flag cleared
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* |--------------------- Zero Flag set
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* ---------------------- Global Interrupt Flag set
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* ---------------------- Global Interrupt Flag set (enabled)
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*/
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#define portPSW (( portSTACK_TYPE ) 0xC600)
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@ -75,26 +75,27 @@ typedef void tskTCB;
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extern volatile tskTCB * volatile pxCurrentTCB;
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/* Most ports implement critical sections by placing the interrupt flags on
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* the stack before disabling interrupts. Exiting the critical section is then
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* simply a case of popping the flags from the stack. As 78K0 IAR does not use
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* a frame pointer this cannot be done as modifying the stack will clobber all
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* the stack variables. Instead each task maintains a count of the critical
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* section nesting depth. Each time a critical section is entered the count is
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* incremented. Each time a critical section is left the count is decremented -
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* with interrupts only being re-enabled if the count is zero.
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*
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* usCriticalNesting will get set to zero when the scheduler starts, but must
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* not be initialised to zero as this will cause problems during the startup
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* sequence.
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*/
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the stack before disabling interrupts. Exiting the critical section is then
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simply a case of popping the flags from the stack. As 78K0 IAR does not use
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a frame pointer this cannot be done as modifying the stack will clobber all
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the stack variables. Instead each task maintains a count of the critical
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section nesting depth. Each time a critical section is entered the count is
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incremented. Each time a critical section is left the count is decremented -
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with interrupts only being re-enabled if the count is zero.
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usCriticalNesting will get set to zero when the scheduler starts, but must
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not be initialised to zero as this will cause problems during the startup
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sequence. */
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volatile unsigned portSHORT usCriticalNesting = portINITIAL_CRITICAL_NESTING;
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/*-----------------------------------------------------------*/
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/*
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* The tick interrupt handler.
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*/
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__interrupt void MD_INTTM05( void );
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/*
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* Sets up the periodic ISR used for the RTOS tick. This uses timer 0, but
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* could have alternatively used the watchdog timer or timer 1.
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* Sets up the periodic ISR used for the RTOS tick.
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*/
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static void prvSetupTimerInterrupt( void );
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/*-----------------------------------------------------------*/
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@ -107,70 +108,65 @@ static void prvSetupTimerInterrupt( void );
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*/
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portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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{
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unsigned portLONG *pxLocal;
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unsigned long *pulLocal;
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/*
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* The 78K0R/Kx3 automatically pushes the PSW then PC onto the stack before
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* executing an ISR. We want the stack to look just as if this has happened
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* so place a pointer to the start of the task on the stack first - followed
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* by the flags we want the task to use when it starts up.
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*/
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#if configMEMORY_MODE == 1
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pxTopOfStack--;
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pxLocal = (unsigned portLONG*) pxTopOfStack;
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*pxLocal = (unsigned portLONG) pvParameters;
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pxTopOfStack--;
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#if configMEMORY_MODE == 1
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{
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/* Parameters are passed in on the stack. */
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pxTopOfStack--;
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pulLocal = ( unsigned long * ) pxTopOfStack;
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*pulLocal = ( unsigned long ) pvParameters;
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pxTopOfStack--;
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/* dummy are on the stack cause there normaly the return adress of the funtion
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* is written. Can be a dummy cause the function will never end but only be
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* yielded an reentered
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*/
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*pxTopOfStack = ( portSTACK_TYPE ) 0xcdcd;
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0xcdcd;
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pxTopOfStack--;
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pxTopOfStack--;
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/* Dummy values on the stack because there normaly the return address
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of the funtion is written. */
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*pxTopOfStack = ( portSTACK_TYPE ) 0xcdcd;
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0xcdcd;
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pxTopOfStack--;
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pxTopOfStack--;
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/* task function start address */
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pxLocal = (unsigned portLONG*) pxTopOfStack;
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*pxLocal = (unsigned portLONG) pxCode;
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pxTopOfStack--;
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/* Task function start address. */
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pulLocal = ( unsigned long * ) pxTopOfStack;
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*pulLocal = ( unsigned long ) pxCode;
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pxTopOfStack--;
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/* write initial value of the PSW */
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*pxTopOfStack = portPSW;
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pxTopOfStack--;
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/* Initial PSW value. */
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*pxTopOfStack = portPSW;
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pxTopOfStack--;
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/* Next general purpose register AX */
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*pxTopOfStack = ( portSTACK_TYPE ) 0x1111;
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pxTopOfStack--;
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/* Next general purpose register AX. */
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*pxTopOfStack = ( portSTACK_TYPE ) 0x1111;
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pxTopOfStack--;
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}
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#else
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{
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pxTopOfStack--;
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#else
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/* Task function start address. */
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pulLocal = (unsigned long*) pxTopOfStack;
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*pulLocal = (unsigned long) pxCode;
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pxTopOfStack--;
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pxTopOfStack--;
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/* Initial PSW value. */
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*pxTopOfStack = portPSW;
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pxTopOfStack--;
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/* task function start address */
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pxLocal = (unsigned portLONG*) pxTopOfStack;
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*pxLocal = (unsigned portLONG) pxCode;
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pxTopOfStack--;
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/* write initial value of the PSW */
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*pxTopOfStack = portPSW;
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pxTopOfStack--;
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/* Next general purpose registers AX with the task function parameter start address */
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*pxTopOfStack = ( portSTACK_TYPE ) pvParameters;
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pxTopOfStack--;
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#endif
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/* The parameter is passed in AX. */
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*pxTopOfStack = ( portSTACK_TYPE ) pvParameters;
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pxTopOfStack--;
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}
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#endif
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/* HL. */
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*pxTopOfStack = ( portSTACK_TYPE ) 0x2222;
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pxTopOfStack--;
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/* save the CS and ES register */
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/* CS and ES registers. */
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*pxTopOfStack = ( portSTACK_TYPE ) 0x0F00;
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pxTopOfStack--;
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/* Next the remaining general purpose registers DE and BC */
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/* Finally the remaining general purpose registers DE and BC */
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*pxTopOfStack = ( portSTACK_TYPE ) 0xDEDE;
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) 0xBCBC;
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@ -212,41 +208,42 @@ void vPortEndScheduler( void )
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*/
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static void prvSetupTimerInterrupt( void )
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{
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/* First the Timer Array Unit has to be enabled */
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/* First the Timer Array Unit has to be enabled. */
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TAU0EN = 1;
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/* To configure the Timer Array Unit all Channels have to been stopped */
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/* To configure the Timer Array Unit all Channels have to first be stopped. */
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TT0 = 0xff;
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/* Interrupt of Timer Array Unit Channel 5 disabled to set Interrupt Priority */
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/* Interrupt of Timer Array Unit Channel 5 is disabled to set the interrupt
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priority. */
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TMMK05 = 1;
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/* Clear Timer Array Unit Channel 5 Interrupt Flag */
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/* Clear Timer Array Unit Channel 5 interrupt flag. */
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TMIF05 = 0;
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/* Set Timer Array Unit Channel 5 Interrupt Priority */
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/* Set Timer Array Unit Channel 5 interrupt priority */
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TMPR005 = 0;
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TMPR105 = 0;
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/* Set Timer Array Unit Channel 5 Mode as Interval Timer */
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/* Set Timer Array Unit Channel 5 Mode as interval timer. */
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TMR05 = 0x0000;
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/* Set the compare match value according to the tick rate we want. */
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TDR05 = (portTickType) (configCPU_CLOCK_HZ / configTICK_RATE_HZ);
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TDR05 = ( portTickType ) ( configCPU_CLOCK_HZ / configTICK_RATE_HZ );
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/* Set Timer Array Unit Channel 5 Output Mode */
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/* Set Timer Array Unit Channel 5 output mode */
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TOM0 &= ~0x0020;
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/* Set Timer Array Unit Channel 5 Output Level */
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/* Set Timer Array Unit Channel 5 output level */
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TOL0 &= ~0x0020;
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/* Set Timer Array Unit Channel 5 Output Enable */
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/* Set Timer Array Unit Channel 5 output enable */
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TOE0 &= ~0x0020;
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/* Interrupt of Timer Array Unit Channel 5 enabled */
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TMMK05 = 0;
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/* Set Timer Array Unit Channel 5 Start*/
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/* Start Timer Array Unit Channel 5.*/
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TS0 |= 0x0020;
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}
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/*-----------------------------------------------------------*/
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