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Update the pin mux setup on the Vega board demo to enable the LED.

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This commit is contained in:
Richard Barry 2018-12-31 20:14:34 +00:00
parent 11d9c440b8
commit 80df5cd517
4 changed files with 34 additions and 2 deletions
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4
FreeRTOS/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/common/pin_mux.c
View file

@ -32,12 +32,14 @@ void BOARD_InitBootPins(void) {
#define PIN7_IDX 7u /*!< Pin number for pin 7 in a port */
#define PIN8_IDX 8u /*!< Pin number for pin 8 in a port */
#define PIN24_IDX 24u /*!< Pin number for pin 24 in a port */
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitPins:
- options: {callFromInitBoot: 'true', coreID: cm4, enableClock: 'true'}
- pin_list:
- {pin_num: D6, peripheral: GPIOA, signal: 'GPIO, 24', pin_signal: PTA24/LPSPI2_PCS0/LPSPI1_SCK/LPI2C2_SCL/FB_OE_b/TPM2_CH0}
- {pin_num: N2, peripheral: LPUART0, signal: RX, pin_signal: LPCMP0_IN0/PTC7/LLWU_P15/LPSPI0_PCS3/LPUART0_RX/LPI2C1_HREQ/TPM0_CH0/LPTMR1_ALT1}
- {pin_num: P3, peripheral: LPUART0, signal: TX, pin_signal: LPCMP0_IN1/PTC8/LPSPI0_SCK/LPUART0_TX/LPI2C0_HREQ/TPM0_CH1}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
@ -50,8 +52,10 @@ BOARD_InitPins:
*
*END**************************************************************************/
void BOARD_InitPins(void) {
CLOCK_EnableClock(kCLOCK_PortA); /* Clock Gate Control: 0x01u */
CLOCK_EnableClock(kCLOCK_PortC); /* Clock Gate Control: 0x01u */
PORT_SetPinMux(PORTA, PIN24_IDX, kPORT_MuxAsGpio); /* PORTA24 (pin D6) is configured as PTA24 */
PORT_SetPinMux(PORTC, PIN7_IDX, kPORT_MuxAlt3); /* PORTC7 (pin N2) is configured as LPUART0_RX */
PORT_SetPinMux(PORTC, PIN8_IDX, kPORT_MuxAlt3); /* PORTC8 (pin P3) is configured as LPUART0_TX */
}

3
FreeRTOS/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/projects/RTOSDemo_ri5cy/.cproject
View file

@ -181,6 +181,9 @@
</tool>
</toolChain>
</folderInfo>
<fileInfo id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.2124579326.468406560" name="fsl_lpuart.c" rcbsApplicability="disable" resourcePath="common/rv32m1_sdk_riscv/devices/RV32M1/drivers/fsl_lpuart.c" toolsToInvoke="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.906968630.2006953853">
<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.906968630.2006953853" name="GNU RISC-V Cross C Compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.906968630"/>
</fileInfo>
<sourceEntries>
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
</sourceEntries>

6
FreeRTOS/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/projects/RTOSDemo_ri5cy/full_demo/main_full.c
View file

@ -93,7 +93,7 @@
pdMS_TO_TICKS() macro. mainNO_ERROR_CHECK_TASK_PERIOD is used if no errors have
been found, mainERROR_CHECK_TASK_PERIOD is used if an error has been found. */
#define mainNO_ERROR_CHECK_TASK_PERIOD pdMS_TO_TICKS( 3000UL )
#define mainERROR_CHECK_TASK_PERIOD pdMS_TO_TICKS( 500UL )
#define mainERROR_CHECK_TASK_PERIOD pdMS_TO_TICKS( 500UL )
/* Parameters that are passed into the register check tasks solely for the
purpose of ensuring parameters are passed into tasks correctly. */
@ -104,7 +104,9 @@ purpose of ensuring parameters are passed into tasks correctly. */
#define mainTIMER_TEST_PERIOD ( 50 )
/* The size of the stack allocated to the check task (as described in the
comments at the top of this file. */
comments at the top of this file. This is surprisingly large as it calls
the logging library's print function, which allocates a 128 byte buffer on its
stack. */
#define mainCHECK_TASK_STACK_SIZE_WORDS 200
/* Size of the stacks to allocated for the register check tasks. */

23
FreeRTOS/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/projects/RTOSDemo_ri5cy/main.c
View file

@ -226,4 +226,27 @@ void vTaskSwitchContext( void );
/* Clear LPIT0 interrupt. */
LPIT0->MSR = 1U;
}
/*-----------------------------------------------------------*/
/* At the time of writing, interrupt nesting is not supported, so do not use
the default SystemIrqHandler() implementation as that enables interrupts. A
version that does not enable interrupts is provided below. THIS INTERRUPT
HANDLER IS SPECIFIC TO THE VEGA BOARD WHICH DOES NOT INCLUDE A CLINT! */
void SystemIrqHandler( uint32_t mcause )
{
uint32_t ulInterruptNumber;
typedef void ( * irq_handler_t )( void );
extern const irq_handler_t isrTable[];
ulInterruptNumber = mcause & 0x1FUL;
/* Clear pending flag in EVENT unit .*/
EVENT_UNIT->INTPTPENDCLEAR = ( 1U << ulInterruptNumber );
/* Read back to make sure write finished. */
(void)(EVENT_UNIT->INTPTPENDCLEAR);
/* Now call the real irq handler for ulInterruptNumber */
isrTable[ ulInterruptNumber ]();
}