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https://github.com/FreeRTOS/FreeRTOS-Kernel.git
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Update MPS430X ports so the sleep mode bits are cleared on exit from the tick interrupt.
Update heap_4.c.
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59c9044de1
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@ -213,6 +213,7 @@ interrupt void vTickISREntry( void )
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{
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extern void vPortTickISR( void );
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__bic_SR_register_on_exit( SCG1 + SCG0 + OSCOFF + CPUOFF );
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#if configUSE_PREEMPTION == 1
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extern void vPortPreemptiveTickISR( void );
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vPortPreemptiveTickISR();
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@ -88,12 +88,6 @@ portRESTORE_CONTEXT .macro
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pop_x r15
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mov.w r15, &usCriticalNesting
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popm_x #12, r15
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;The last thing on the stack will be the status register.
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;Ensure the power down bits are clear ready for the next
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;time this power down register is popped from the stack.
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bic.w #0xf0, 0( sp )
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pop.w sr
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ret_x
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.endm
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@ -214,6 +214,7 @@ __interrupt __raw void vTickISREntry( void )
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{
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extern void vPortTickISR( void );
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__bic_SR_register_on_exit( SCG1 + SCG0 + OSCOFF + CPUOFF );
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vPortTickISR();
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}
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@ -95,12 +95,6 @@ portRESTORE_CONTEXT macro
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pop_x r15
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mov.w r15, &usCriticalNesting
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popm_x #12, r15
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/* The last thing on the stack will be the status register.
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Ensure the power down bits are clear ready for the next
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time this power down register is popped from the stack. */
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bic.w #0xf0, 0( sp )
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pop.w sr
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reta
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endm
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@ -115,23 +109,25 @@ portRESTORE_CONTEXT macro
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*
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* If the preemptive scheduler is in use a context switch can also occur.
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*/
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RSEG CODE
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EVEN
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vPortTickISR:
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/* The sr is not saved in portSAVE_CONTEXT() because vPortYield() needs
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to save it manually before it gets modified (interrupts get disabled). */
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to save it manually before it gets modified (interrupts get disabled).
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Entering through this interrupt means the SR is already on the stack, but
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this keeps the stack frames identical. */
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push.w sr
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portSAVE_CONTEXT
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calla #vTaskIncrementTick
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#if configUSE_PREEMPTION == 1
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calla #vTaskSwitchContext
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#endif
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portRESTORE_CONTEXT
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/*-----------------------------------------------------------*/
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@ -139,21 +135,21 @@ vPortTickISR:
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* Manual context switch called by the portYIELD() macro.
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*/
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EVEN
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vPortYield:
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/* The sr needs saving before it is modified. */
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push.w sr
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/* Now the SR is stacked we can disable interrupts. */
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dint
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dint
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nop
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/* Save the context of the current task. */
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portSAVE_CONTEXT
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portSAVE_CONTEXT
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/* Select the next task to run. */
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calla #vTaskSwitchContext
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calla #vTaskSwitchContext
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/* Restore the context of the new task. */
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portRESTORE_CONTEXT
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@ -165,7 +161,7 @@ vPortYield:
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* the context of the first task.
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*/
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EVEN
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xPortStartScheduler:
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/* Setup the hardware to generate the tick. Interrupts are disabled
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@ -175,6 +171,6 @@ xPortStartScheduler:
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/* Restore the context of the first task that is going to run. */
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portRESTORE_CONTEXT
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/*-----------------------------------------------------------*/
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END
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@ -356,7 +356,7 @@ unsigned char *puc;
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}
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#define INCLUDE_TEST_CODE 1
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#define INCLUDE_TEST_CODE 0
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#if INCLUDE_TEST_CODE == 1
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#define heapMAX_TEST_BLOCKS 6
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@ -366,6 +366,7 @@ void vTestHeap4( void )
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void *pvReturned;
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static void *pvUsedBlocks[ heapMAX_TEST_BLOCKS ];
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unsigned long ulIndex = 0, ulSize, ulRandSample;
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size_t xSize1, xSize2, xSize3;
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static const unsigned long ulCombinations[ 6 ][ 3 ] =
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{
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{ 0, 1, 2 },
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@ -530,13 +531,17 @@ static const unsigned long ulCombinations[ 6 ][ 3 ] =
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}
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/* Do the same, but using random block sizes. */
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for( ulRandSample = 0; ulRandSample < 0x5ffff; ulRandSample++ )
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for( ulRandSample = 0; ulRandSample < 0xffffffUL; ulRandSample++ )
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{
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xSize1 = rand();
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xSize2 = rand();
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xSize3 = rand();
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for( ulIndex = 0; ulIndex < 6; ulIndex++ )
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{
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pvUsedBlocks[ 0 ] = pvPortMalloc( rand() );
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pvUsedBlocks[ 1 ] = pvPortMalloc( rand() );
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pvUsedBlocks[ 2 ] = pvPortMalloc( rand() );
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pvUsedBlocks[ 0 ] = pvPortMalloc( xSize1 );
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pvUsedBlocks[ 1 ] = pvPortMalloc( xSize2 );
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pvUsedBlocks[ 2 ] = pvPortMalloc( xSize3 );
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vPortFree( pvUsedBlocks[ ulCombinations[ ulIndex ][ 0 ] ] );
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vPortFree( pvUsedBlocks[ ulCombinations[ ulIndex ][ 1 ] ] );
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