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https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-04-20 05:21:59 -04:00
Change occurrences of "Cortex M3" to "Cortex-M3".
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1374a17f73
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@ -119,7 +119,7 @@ WEAK void PendSV_Handler(void)
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}
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//------------------------------------------------------------------------------
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// for Cortex M3
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// for Cortex-M3
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//------------------------------------------------------------------------------
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WEAK void SysTick_Handler(void)
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{
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@ -114,7 +114,7 @@
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//
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//*****************************************************************************
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#define SYSCTL_DC1_SYSDIV_MASK 0x0000F000 // Minimum system divider mask
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#define SYSCTL_DC1_MPU 0x00000080 // Cortex M3 MPU present
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#define SYSCTL_DC1_MPU 0x00000080 // Cortex-M3 MPU present
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#define SYSCTL_DC1_PLL 0x00000010 // PLL present
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#define SYSCTL_DC1_WDOG 0x00000008 // Watchdog present
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#define SYSCTL_DC1_SWO 0x00000004 // Serial wire output present
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@ -55,7 +55,7 @@ static unsigned long pulMainStack[STACK_SIZE];
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//*****************************************************************************
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//
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// The minimal vector table for a Cortex M3. Note that the proper constructs
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// The minimal vector table for a Cortex-M3. Note that the proper constructs
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// must be placed on this to ensure that it ends up at physical address
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// 0x0000.0000.
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//
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@ -114,7 +114,7 @@
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//
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//*****************************************************************************
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#define SYSCTL_DC1_SYSDIV_MASK 0x0000F000 // Minimum system divider mask
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#define SYSCTL_DC1_MPU 0x00000080 // Cortex M3 MPU present
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#define SYSCTL_DC1_MPU 0x00000080 // Cortex-M3 MPU present
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#define SYSCTL_DC1_PLL 0x00000010 // PLL present
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#define SYSCTL_DC1_WDOG 0x00000008 // Watchdog present
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#define SYSCTL_DC1_SWO 0x00000004 // Serial wire output present
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@ -128,7 +128,7 @@
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#define SYSCTL_DC1_ADCSPD_MASK 0x00000F00 // ADC speed mask
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#define SYSCTL_DC1_ADCSPD_250K 0x00000100 // 250Ksps ADC
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#define SYSCTL_DC1_ADCSPD_125K 0x00000000 // 125Ksps ADC
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#define SYSCTL_DC1_MPU 0x00000080 // Cortex M3 MPU present
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#define SYSCTL_DC1_MPU 0x00000080 // Cortex-M3 MPU present
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#define SYSCTL_DC1_TEMP 0x00000020 // Temperature sensor present
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#define SYSCTL_DC1_PLL 0x00000010 // PLL present
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#define SYSCTL_DC1_WDOG 0x00000008 // Watchdog present
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@ -83,7 +83,7 @@ uVectorEntry;
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//*****************************************************************************
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//
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// The minimal vector table for a Cortex M3. Note that the proper constructs
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// The minimal vector table for a Cortex-M3. Note that the proper constructs
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// must be placed on this to ensure that it ends up at physical address
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// 0x0000.0000.
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//
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@ -60,7 +60,7 @@ extern "C"
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#define SYSCTL_PERIPH_GPIOC 0x20000004 // GPIO C
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#define SYSCTL_PERIPH_GPIOD 0x20000008 // GPIO D
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#define SYSCTL_PERIPH_GPIOE 0x20000010 // GPIO E
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#define SYSCTL_PERIPH_MPU 0x30000080 // Cortex M3 MPU
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#define SYSCTL_PERIPH_MPU 0x30000080 // Cortex-M3 MPU
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#define SYSCTL_PERIPH_TEMP 0x30000020 // Temperature sensor
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#define SYSCTL_PERIPH_PLL 0x30000010 // PLL
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@ -146,7 +146,7 @@
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#define SYSCTL_DC1_ADCSPD_500K 0x00000200 // 500Ksps ADC
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#define SYSCTL_DC1_ADCSPD_250K 0x00000100 // 250Ksps ADC
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#define SYSCTL_DC1_ADCSPD_125K 0x00000000 // 125Ksps ADC
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#define SYSCTL_DC1_MPU 0x00000080 // Cortex M3 MPU present
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#define SYSCTL_DC1_MPU 0x00000080 // Cortex-M3 MPU present
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#define SYSCTL_DC1_TEMP 0x00000020 // Temperature sensor present
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#define SYSCTL_DC1_PLL 0x00000010 // PLL present
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#define SYSCTL_DC1_WDOG 0x00000008 // Watchdog present
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@ -61,7 +61,7 @@ extern "C"
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#define SYSCTL_PERIPH_GPIOC 0x20000004 // GPIO C
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#define SYSCTL_PERIPH_GPIOD 0x20000008 // GPIO D
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#define SYSCTL_PERIPH_GPIOE 0x20000010 // GPIO E
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#define SYSCTL_PERIPH_MPU 0x30000080 // Cortex M3 MPU
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#define SYSCTL_PERIPH_MPU 0x30000080 // Cortex-M3 MPU
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#define SYSCTL_PERIPH_TEMP 0x30000020 // Temperature sensor
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#define SYSCTL_PERIPH_PLL 0x30000010 // PLL
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@ -59,7 +59,7 @@ static unsigned long pulStack[STACK_SIZE];
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//*****************************************************************************
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//
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// The minimal vector table for a Cortex M3. Note that the proper constructs
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// The minimal vector table for a Cortex-M3. Note that the proper constructs
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// must be placed on this to ensure that it ends up at physical address
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// 0x0000.0000.
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//
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@ -146,7 +146,7 @@
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#define SYSCTL_DC1_ADCSPD_500K 0x00000200 // 500Ksps ADC
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#define SYSCTL_DC1_ADCSPD_250K 0x00000100 // 250Ksps ADC
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#define SYSCTL_DC1_ADCSPD_125K 0x00000000 // 125Ksps ADC
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#define SYSCTL_DC1_MPU 0x00000080 // Cortex M3 MPU present
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#define SYSCTL_DC1_MPU 0x00000080 // Cortex-M3 MPU present
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#define SYSCTL_DC1_TEMP 0x00000020 // Temperature sensor present
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#define SYSCTL_DC1_PLL 0x00000010 // PLL present
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#define SYSCTL_DC1_WDOG 0x00000008 // Watchdog present
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@ -61,7 +61,7 @@ extern "C"
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#define SYSCTL_PERIPH_GPIOC 0x20000004 // GPIO C
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#define SYSCTL_PERIPH_GPIOD 0x20000008 // GPIO D
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#define SYSCTL_PERIPH_GPIOE 0x20000010 // GPIO E
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#define SYSCTL_PERIPH_MPU 0x30000080 // Cortex M3 MPU
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#define SYSCTL_PERIPH_MPU 0x30000080 // Cortex-M3 MPU
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#define SYSCTL_PERIPH_TEMP 0x30000020 // Temperature sensor
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#define SYSCTL_PERIPH_PLL 0x30000010 // PLL
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@ -85,7 +85,7 @@ uVectorEntry;
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//*****************************************************************************
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//
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// The minimal vector table for a Cortex M3. Note that the proper constructs
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// The minimal vector table for a Cortex-M3. Note that the proper constructs
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// must be placed on this to ensure that it ends up at physical address
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// 0x0000.0000.
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//
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@ -146,7 +146,7 @@
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#define SYSCTL_DC1_ADCSPD_500K 0x00000200 // 500Ksps ADC
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#define SYSCTL_DC1_ADCSPD_250K 0x00000100 // 250Ksps ADC
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#define SYSCTL_DC1_ADCSPD_125K 0x00000000 // 125Ksps ADC
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#define SYSCTL_DC1_MPU 0x00000080 // Cortex M3 MPU present
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#define SYSCTL_DC1_MPU 0x00000080 // Cortex-M3 MPU present
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#define SYSCTL_DC1_TEMP 0x00000020 // Temperature sensor present
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#define SYSCTL_DC1_PLL 0x00000010 // PLL present
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#define SYSCTL_DC1_WDOG 0x00000008 // Watchdog present
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@ -61,7 +61,7 @@ extern "C"
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#define SYSCTL_PERIPH_GPIOC 0x20000004 // GPIO C
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#define SYSCTL_PERIPH_GPIOD 0x20000008 // GPIO D
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#define SYSCTL_PERIPH_GPIOE 0x20000010 // GPIO E
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#define SYSCTL_PERIPH_MPU 0x30000080 // Cortex M3 MPU
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#define SYSCTL_PERIPH_MPU 0x30000080 // Cortex-M3 MPU
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#define SYSCTL_PERIPH_TEMP 0x30000020 // Temperature sensor
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#define SYSCTL_PERIPH_PLL 0x30000010 // PLL
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@ -61,7 +61,7 @@ static unsigned long pulStack[STACK_SIZE];
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//*****************************************************************************
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//
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// The minimal vector table for a Cortex M3. Note that the proper constructs
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// The minimal vector table for a Cortex-M3. Note that the proper constructs
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// must be placed on this to ensure that it ends up at physical address
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// 0x0000.0000.
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//
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@ -89,7 +89,7 @@ uVectorEntry;
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//*****************************************************************************
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//
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// The minimal vector table for a Cortex M3. Note that the proper constructs
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// The minimal vector table for a Cortex-M3. Note that the proper constructs
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// must be placed on this to ensure that it ends up at physical address
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// 0x0000.0000.
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//
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@ -141,7 +141,7 @@ to exclude the API function. */
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/* Priorities passed to NVIC_SetPriority() do not require shifting as the
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function does the shifting itself. Note these priorities need to be equal to
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or lower than configMAX_SYSCALL_INTERRUPT_PRIORITY - therefore the numeric
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value needs to be equal to or greater than 5 (on the Cortex M3 the lower the
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value needs to be equal to or greater than 5 (on the Cortex-M3 the lower the
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numeric value the higher the interrupt priority). */
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#define configEMAC_INTERRUPT_PRIORITY 5
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#define configUSB_INTERRUPT_PRIORITY 6
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@ -141,7 +141,7 @@ to exclude the API function. */
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/* Priorities passed to NVIC_SetPriority() do not require shifting as the
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function does the shifting itself. Note these priorities need to be equal to
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or lower than configMAX_SYSCALL_INTERRUPT_PRIORITY - therefore the numeric
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value needs to be equal to or greater than 5 (on the Cortex M3 the lower the
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value needs to be equal to or greater than 5 (on the Cortex-M3 the lower the
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numeric value the higher the interrupt priority). */
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#define configEMAC_INTERRUPT_PRIORITY 5
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#define configUSB_INTERRUPT_PRIORITY 6
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@ -139,7 +139,7 @@ to exclude the API function. */
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/* Priorities passed to NVIC_SetPriority() do not require shifting as the
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function does the shifting itself. Note these priorities need to be equal to
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or lower than configMAX_SYSCALL_INTERRUPT_PRIORITY - therefore the numeric
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value needs to be equal to or greater than 5 (on the Cortex M3 the lower the
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value needs to be equal to or greater than 5 (on the Cortex-M3 the lower the
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numeric value the higher the interrupt priority). */
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#define configEMAC_INTERRUPT_PRIORITY 5
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#define configUSB_INTERRUPT_PRIORITY 6
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@ -75,7 +75,7 @@
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* file contains a simple repeating string of fixed width.
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*
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* Currently this demo does not include interrupt nesting examples. High
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* frequency timer and simpler nesting examples can be found in most Cortex M3
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* frequency timer and simpler nesting examples can be found in most Cortex-M3
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* demo applications.
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*
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* The functions used to initialise, set and clear LED outputs are normally
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@ -100,7 +100,7 @@ extern void vPortSVCHandler( void );
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/******************************************************************************
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*
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* The minimal vector table for a Cortex M3. Note that the proper constructs
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* The minimal vector table for a Cortex-M3. Note that the proper constructs
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* must be placed on this to ensure that it ends up at physical address
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* 0x0000.0000.
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*
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@ -318,7 +318,7 @@
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#define SYSCTL_DC1_ADCSPD_250K 0x00000100 // 250Ksps ADC
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#define SYSCTL_DC1_ADCSPD_500K 0x00000200 // 500Ksps ADC
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#define SYSCTL_DC1_ADCSPD_1M 0x00000300 // 1Msps ADC
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#define SYSCTL_DC1_MPU 0x00000080 // Cortex M3 MPU present
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#define SYSCTL_DC1_MPU 0x00000080 // Cortex-M3 MPU present
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#define SYSCTL_DC1_HIB 0x00000040 // Hibernation module present
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#define SYSCTL_DC1_TEMP 0x00000020 // Temperature sensor present
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#define SYSCTL_DC1_PLL 0x00000010 // PLL present
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@ -95,7 +95,7 @@ extern "C"
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#define SYSCTL_PERIPH_IEEE1588 0x20100100 // IEEE1588
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#define SYSCTL_PERIPH_PLL 0x30000010 // PLL
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#define SYSCTL_PERIPH_TEMP 0x30000020 // Temperature sensor
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#define SYSCTL_PERIPH_MPU 0x30000080 // Cortex M3 MPU
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#define SYSCTL_PERIPH_MPU 0x30000080 // Cortex-M3 MPU
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//*****************************************************************************
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//
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