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synced 2025-05-11 23:59:03 -04:00
Update Risc-V port to use environment call in place of software interrupt - still very much a work in progress.
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@ -94,6 +94,12 @@ StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t px
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x28-31 t3-6 Temporaries Caller
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*/
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/* To ensure alignment. */
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//_RB_ pxTopOfStack--;
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//_RB_ pxTopOfStack--;
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//_RB_pxTopOfStack--;
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/* Numbers correspond to the x register number. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 31;
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pxTopOfStack--;
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@ -185,7 +191,7 @@ volatile uint32_t * const pulTimeLow = ( volatile uint32_t * const ) ( configCTR
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ullNextTime += ullTimerIncrementsForOneTick;
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/* Enable timer interrupt */
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__asm volatile( "csrs mie, %0" :: "r"(0x80) );
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__asm volatile( "csrs mie, %0" :: "r"(0x80) ); /* 1<<7 for timer interrupt. */
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}
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/*-----------------------------------------------------------*/
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@ -196,19 +202,21 @@ volatile uint32_t * const ulSoftInterrupt = ( uint32_t * ) configCTRL_BASE;
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vTaskSwitchContext();
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/* Clear software interrupt. */
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*( ( uint32_t * ) configCTRL_BASE ) = 0UL;
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*( ( uint32_t * ) configCTRL_BASE ) &= 0x08UL;
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}
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/*-----------------------------------------------------------*/
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void Timer_IRQHandler( void )
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{
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extern void vTaskSwitchContext( void );
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/* Reload for the next timer interrupt. */
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*pullMachineTimerCompareRegister = ullNextTime;
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ullNextTime += ullTimerIncrementsForOneTick;
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if( xTaskIncrementTick() != pdFALSE )
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{
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portYIELD();
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vTaskSwitchContext();
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}
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}
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/*-----------------------------------------------------------*/
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@ -217,6 +225,17 @@ BaseType_t xPortStartScheduler( void )
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{
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extern void xPortStartFirstTask( void );
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#if( configASSERT_DEFINED == 1 )
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{
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volatile uint32_t mtvec = 0;
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/* Check the least significant two bits of mtvec are 00 - indicating single
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vector mode. */
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__asm volatile( "csrr %0, mtvec" : "=r"( mtvec ) );
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configASSERT( ( mtvec & 0x03UL ) == 0 );
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}
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#endif
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vPortSetupTimerInterrupt();
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xPortStartFirstTask();
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@ -82,14 +82,14 @@ xPortStartFirstTask:
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addi sp, sp, CONTEXT_SIZE
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csrs mstatus, 8 /* Enable machine interrupts. */
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csrs mie, 8 /* Enable soft interrupt. */
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ret
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ret
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/*-----------------------------------------------------------*/
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.align 8
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vPortTrapHandler:
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addi sp, sp, -CONTEXT_SIZE
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sw x1, 1( sp )
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sw x1, 1 * WORD_SIZE( sp )
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sw x5, 2 * WORD_SIZE( sp )
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sw x6, 3 * WORD_SIZE( sp )
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sw x7, 4 * WORD_SIZE( sp )
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@ -118,10 +118,6 @@ vPortTrapHandler:
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sw x30, 27 * WORD_SIZE( sp )
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sw x31, 28 * WORD_SIZE( sp )
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/* Save exception return address. */
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csrr t0, mepc
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sw t0, 0( sp )
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lw t0, pxCurrentTCB /* Load pxCurrentTCB. */
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sw sp, 0( t0 ) /* Write sp from first TCB member. */
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@ -130,6 +126,9 @@ vPortTrapHandler:
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mv a2, sp
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jal handle_trap
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csrw mepc, a0
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/* Save exception return address. */
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sw a0, 0( sp )
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# Remain in M-mode after mret
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li t0, 0x00001800 /* MSTATUS MPP */
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@ -138,11 +137,11 @@ vPortTrapHandler:
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lw sp, pxCurrentTCB /* Load pxCurrentTCB. */
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lw sp, 0( sp ) /* Read sp from first TCB member. */
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/* Load mret with the address of the first task. */
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/* Load mret with the address of the next task. */
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lw t0, 0( sp )
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csrw mepc, t0
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lw x1, 1( sp )
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lw x1, 1 * WORD_SIZE( sp )
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lw x5, 2 * WORD_SIZE( sp ) /* t0 */
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lw x6, 3 * WORD_SIZE( sp ) /* t1 */
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lw x7, 4 * WORD_SIZE( sp ) /* t2 */
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@ -70,7 +70,7 @@ not need to be guarded with a critical section. */
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/* Scheduler utilities. */
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#define portYIELD() *( ( uint32_t * ) configCTRL_BASE ) = 1UL
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#define portYIELD() __asm volatile( "ecall" ); // software interrupt alternative *( ( uint32_t * ) configCTRL_BASE ) |= 0x08UL
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#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) vPortYield()
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#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
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/*-----------------------------------------------------------*/
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