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Update to use the latest version of the Ride libraries.

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This commit is contained in:
Richard Barry 2009-01-17 18:52:26 +00:00
parent aee92373cf
commit e41454c461
6 changed files with 2086 additions and 2657 deletions
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1022
Demo/CORTEX_STM32F103_Primer_GCC/RTOSDemo-globals.Standard.xml
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File diff suppressed because it is too large Load diff

3681
Demo/CORTEX_STM32F103_Primer_GCC/RTOSDemo.Standard.xml
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File diff suppressed because it is too large Load diff

8
Demo/CORTEX_STM32F103_Primer_GCC/ST_Code/buzzer.c
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@ -205,10 +205,10 @@ void BUZZER_SetFrequency ( u16 freq )
/* Output Compare Toggle Mode configuration: Channel3 */
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
TIM_OCInitStructure.TIM_Channel = TIM_Channel_3;
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_Pulse = CCR_Val;
TIM_OCInit( TIM3, &TIM_OCInitStructure );
TIM_OC3Init( TIM3, &TIM_OCInitStructure );
TIM_OC3PreloadConfig( TIM3, TIM_OCPreload_Enable );
}
@ -261,10 +261,10 @@ void BUZZER_Init( void )
/* Output Compare Toggle Mode configuration: Channel3 */
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_Toggle;
TIM_OCInitStructure.TIM_Channel = TIM_Channel_3;
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_Pulse = CCR_Val;
TIM_OCInit( TIM3, &TIM_OCInitStructure );
TIM_OC3Init( TIM3, &TIM_OCInitStructure );
TIM_OC3PreloadConfig( TIM3, TIM_OCPreload_Disable );
BUZZER_SetFrequency( 440 );

20
Demo/CORTEX_STM32F103_Primer_GCC/ST_Code/crt0_STM32x.c
View file

@ -117,10 +117,10 @@ void (* const g_pfnVectors[])(void) =
MemManageException,
BusFaultException,
UsageFaultException,
0, 0, 0, 0, /* Reserved */
(void*)0, (void*)0, (void*)0, (void*)0, /* Reserved */
vPortSVCHandler,
DebugMonitor,
0, /* Reserved */
(void*)0, /* Reserved */
xPortPendSVHandler,
xPortSysTickHandler,
WWDG_IRQHandler,
@ -166,14 +166,14 @@ void (* const g_pfnVectors[])(void) =
EXTI15_10_IRQHandler,
RTCAlarm_IRQHandler,
USBWakeUp_IRQHandler,
0,
0,
0,
0,
0,
0,
0,
(unsigned long)0xF108F85F //this is a workaround for boot in RAM mode.
(void*)0,
(void*)0,
(void*)0,
(void*)0,
(void*)0,
(void*)0,
(void*)0,
(void*)0xF108F85F //this is a workaround for boot in RAM mode.
};
/*******************************************************************************

4
Demo/CORTEX_STM32F103_Primer_GCC/ST_Code/lcd.c
View file

@ -561,10 +561,10 @@ static void LCD_BackLightConfig( void )
/* Output Compare Toggle Mode configuration: Channel2 */
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
TIM_OCInitStructure.TIM_Channel = TIM_Channel_2;
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_Pulse = Current_CCR_BackLightStart;
TIM_OCInit( TIM4, &TIM_OCInitStructure );
TIM_OC2Init( TIM4, &TIM_OCInitStructure );
TIM_OC4PreloadConfig( TIM4, TIM_OCPreload_Disable );
TIM_ARRPreloadConfig( TIM4, ENABLE );

8
Demo/CORTEX_STM32F103_Primer_GCC/ST_Code/mems.c
View file

@ -235,16 +235,16 @@ static void MEMS_ChipSelect( u8 State )
static u8 MEMS_SendByte( u8 byte )
{
/* Loop while DR register in not emplty */
while( SPI_GetFlagStatus( SPI2, SPI_FLAG_TXE ) == RESET );
while( SPI_I2S_GetFlagStatus( SPI2, SPI_I2S_FLAG_TXE ) == RESET );
/* Send byte through the SPI2 peripheral */
SPI_SendData( SPI2, byte );
SPI_I2S_SendData( SPI2, byte );
/* Wait to receive a byte */
while( SPI_GetFlagStatus( SPI2, SPI_FLAG_RXNE ) == RESET );
while( SPI_I2S_GetFlagStatus( SPI2, SPI_I2S_FLAG_RXNE ) == RESET );
/* Return the byte read from the SPI bus */
return SPI_ReceiveData( SPI2 );
return SPI_I2S_ReceiveData( SPI2 );
}
/* Public functions for CircleOS ---------------------------------------------*/