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Update platform studio project for MicroBlaze with full Ethernet.

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This commit is contained in:
Richard Barry 2011-08-27 11:55:55 +00:00
parent dbb0c1d13a
commit a16be7fb4e
15 changed files with 19223 additions and 197 deletions
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Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/SDK/SDK_Export/hw/system.bit Normal file
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<!DOCTYPE html PUBLIC "-//W3C//DTD SVG 1.0//EN" "http://www.w3.org/TR/SVG/DTD/svg10.dtd">
<HTML>
<HEAD>
<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
<TITLE>XPS Project Report</TITLE>
</HEAD>
<HEAD><TITLE>XPS Project Report</TITLE></HEAD>
<FRAMESET COLS="20%,80%" BORDER="0" FRAMESPACING="0">
<FRAME SRC="system_toc.html" MARGINWIDTH="0" MARINHEIGHT="0" FRAMEBORDER="NO" BORDER="NO" NAME="system_toc" SCROLLING="YES">
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Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/SDK/SDK_Export/hw/system_bd.bmm Normal file
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// BMM LOC annotation file.
//
// Release 13.1 - Data2MEM O.40d, build 1.9 Aug 19, 2010
// Copyright (c) 1995-2011 Xilinx, Inc. All rights reserved.
///////////////////////////////////////////////////////////////////////////////
//
// Processor 'microblaze_0', ID 100, memory map.
//
///////////////////////////////////////////////////////////////////////////////
ADDRESS_MAP microblaze_0 MICROBLAZE-LE 100
///////////////////////////////////////////////////////////////////////////////
//
// Processor 'microblaze_0' address space 'microblaze_0_bram_block_combined' 0x00000000:0x00001FFF (8 KBytes).
//
///////////////////////////////////////////////////////////////////////////////
ADDRESS_SPACE microblaze_0_bram_block_combined RAMB16 [0x00000000:0x00001FFF]
BUS_BLOCK
microblaze_0_bram_block/microblaze_0_bram_block/ramb16bwer_0 [31:24] INPUT = microblaze_0_bram_block_combined_0.mem PLACED = X0Y24;
microblaze_0_bram_block/microblaze_0_bram_block/ramb16bwer_1 [23:16] INPUT = microblaze_0_bram_block_combined_1.mem PLACED = X0Y26;
microblaze_0_bram_block/microblaze_0_bram_block/ramb16bwer_2 [15:8] INPUT = microblaze_0_bram_block_combined_2.mem PLACED = X0Y22;
microblaze_0_bram_block/microblaze_0_bram_block/ramb16bwer_3 [7:0] INPUT = microblaze_0_bram_block_combined_3.mem PLACED = X0Y28;
END_BUS_BLOCK;
END_ADDRESS_SPACE;
END_ADDRESS_MAP;

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<A HREF="system_main.html#ANCHOR_OVERVIEW" style="text-decoration:none"><SPAN style="color:#000000; font: bold 16px Verdana Arial,Helvetica,sans-serif">Overview</SPAN></A><BR><A HREF="system_main.html#ANCHOR_BLOCKDIAGRAM" style="text-decoration:none"><SPAN style="color:#000000; font: bold 16px Verdana Arial,Helvetica,sans-serif">Block Diagram</SPAN></A><BR><A HREF="system_main.html#ANCHOR_EXTERNALPORTS" style="text-decoration:none"><SPAN style="color:#000000; font: bold 16px Verdana Arial,Helvetica,sans-serif">External Ports</SPAN></A><BR><DIV class="trigger" onClick="showBranch('Processors'); swapBranchImg('BranchImg_Processors');">
<IMG src="imgs/IMG_openBranch.png" border="0" id="BranchImg_Processors"><SPAN style="color:#000000; font: bold 16px Verdana ArialHelvetica,sans-serif"> Processor</SPAN>
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Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/MCB_DDR3/param_input.xml
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@ -589,7 +589,7 @@
</spirit:modelParameter>
<spirit:modelParameter>
<spirit:name>C_S0_AXI_STRICT_COHERENCY</spirit:name>
<spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_S0_AXI_STRICT_COHERENCY"> "1" </spirit:value>
<spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_S0_AXI_STRICT_COHERENCY"> "0" </spirit:value>
</spirit:modelParameter>
<spirit:modelParameter>
<spirit:name>C_S0_AXI_SUPPORTS_NARROW_BURST</spirit:name>

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Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/MCB_DDR3/tcl.log
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@ -1,6 +1,6 @@
=========================================================================
Time: Fri Aug 26 20:58:58 GMT Daylight Time 2011
Running: run_batch_mode 74543544
Time: Sat Aug 27 12:49:03 GMT Daylight Time 2011
Running: run_batch_mode 96333944
{COLLECTING: INSTANCE MCB_DDR3 }
{COLLECTING: C_INTERCONNECT_S0_AXI_MASTERS ETHERNET_dma.M_AXI_SG & ETHERNET_dma.M_AXI_MM2S & ETHERNET_dma.M_AXI_S2MM OPTIONAL string none ETHERNET_dma.M_AXI_SG & ETHERNET_dma.M_AXI_MM2S & ETHERNET_dma.M_AXI_S2MM}
{COLLECTING: C_INTERCONNECT_S0_AXI_IS_ACLK_ASYNC 0 OPTIONAL_UPDATE integer 0 }
@ -109,13 +109,13 @@ Running: run_batch_mode 74543544
{COLLECTING: C_S4_AXI_HIGHADDR 0x00000000 OPTIONAL STD_LOGIC_VECTOR 0x00000000 }
{COLLECTING: C_S5_AXI_BASEADDR 0xFFFFFFFF OPTIONAL STD_LOGIC_VECTOR 0xFFFFFFFF }
{COLLECTING: C_S5_AXI_HIGHADDR 0x00000000 OPTIONAL STD_LOGIC_VECTOR 0x00000000 }
{COLLECTING: C_MEM_TYPE DDR3 OPTIONAL STRING DDR3 DDR3}
{COLLECTING: C_MEM_TYPE DDR3 OPTIONAL STRING DDR3 }
{COLLECTING: C_MEM_PARTNO MT41J64M16XX-187E REQUIRE STRING NOT_SET MT41J64M16XX-187E}
{COLLECTING: C_MEM_BASEPARTNO NOT_SET OPTIONAL STRING NOT_SET }
{COLLECTING: C_NUM_DQ_PINS 16 OPTIONAL_UPDATE INTEGER 16 }
{COLLECTING: C_MEM_ADDR_WIDTH 13 OPTIONAL_UPDATE INTEGER 13 }
{COLLECTING: C_MEM_BANKADDR_WIDTH 3 OPTIONAL_UPDATE INTEGER 3 3}
{COLLECTING: C_MEM_NUM_COL_BITS 10 OPTIONAL_UPDATE INTEGER 10 10}
{COLLECTING: C_MEM_BANKADDR_WIDTH 3 OPTIONAL_UPDATE INTEGER 3 }
{COLLECTING: C_MEM_NUM_COL_BITS 10 OPTIONAL_UPDATE INTEGER 10 }
{COLLECTING: C_MEM_TRAS -1 OPTIONAL_UPDATE INTEGER -1 }
{COLLECTING: C_MEM_TRCD -1 OPTIONAL_UPDATE INTEGER -1 }
{COLLECTING: C_MEM_TREFI -1 OPTIONAL_UPDATE INTEGER -1 }
@ -125,7 +125,7 @@ Running: run_batch_mode 74543544
{COLLECTING: C_MEM_TRTP -1 OPTIONAL_UPDATE INTEGER -1 }
{COLLECTING: C_MEM_TWTR -1 OPTIONAL_UPDATE INTEGER -1 }
{COLLECTING: C_PORT_CONFIG B32_B32_B32_B32 OPTIONAL STRING B32_B32_B32_B32 }
{COLLECTING: C_SKIP_IN_TERM_CAL 0 OPTIONAL INTEGER 0 0}
{COLLECTING: C_SKIP_IN_TERM_CAL 0 OPTIONAL INTEGER 0 }
{COLLECTING: C_SKIP_IN_TERM_CAL_VALUE NONE OPTIONAL STRING NONE }
{COLLECTING: C_MEMCLK_PERIOD 0 OPTIONAL_UPDATE INTEGER 0 }
{COLLECTING: C_MEM_ADDR_ORDER ROW_BANK_COLUMN OPTIONAL STRING ROW_BANK_COLUMN }
@ -160,7 +160,7 @@ Running: run_batch_mode 74543544
{COLLECTING: C_ARB_TIME_SLOT_9 0b000000001010011000 OPTIONAL STD_LOGIC_VECTOR 0b000000001010011000 }
{COLLECTING: C_ARB_TIME_SLOT_10 0b000000010011000001 OPTIONAL STD_LOGIC_VECTOR 0b000000010011000001 }
{COLLECTING: C_ARB_TIME_SLOT_11 0b000000011000001010 OPTIONAL STD_LOGIC_VECTOR 0b000000011000001010 }
{COLLECTING: C_S0_AXI_ENABLE 1 OPTIONAL INTEGER 1 1}
{COLLECTING: C_S0_AXI_ENABLE 1 OPTIONAL INTEGER 1 }
{COLLECTING: C_S0_AXI_PROTOCOL AXI4 CONSTANT STRING AXI4 }
{COLLECTING: C_S0_AXI_ID_WIDTH 2 UPDATE INTEGER 4 }
{COLLECTING: C_S0_AXI_ADDR_WIDTH 32 CONSTANT INTEGER 32 }
@ -170,7 +170,7 @@ Running: run_batch_mode 74543544
{COLLECTING: C_S0_AXI_SUPPORTS_NARROW_BURST Auto OPTIONAL_UPDATE INTEGER 1 }
{COLLECTING: C_S0_AXI_REG_EN0 0x00000 OPTIONAL_UPDATE STD_LOGIC_VECTOR 0x00000 }
{COLLECTING: C_S0_AXI_REG_EN1 0x01000 OPTIONAL STD_LOGIC_VECTOR 0x01000 }
{COLLECTING: C_S0_AXI_STRICT_COHERENCY 1 OPTIONAL_UPDATE INTEGER 1 }
{COLLECTING: C_S0_AXI_STRICT_COHERENCY 0 OPTIONAL_UPDATE INTEGER 1 0}
{COLLECTING: C_S0_AXI_ENABLE_AP 0 OPTIONAL INTEGER 0 }
{COLLECTING: C_S1_AXI_ENABLE 0 OPTIONAL INTEGER 0 }
{COLLECTING: C_S1_AXI_PROTOCOL AXI4 CONSTANT STRING AXI4 }
@ -379,7 +379,7 @@ Running: run_batch_mode 74543544
{SENDING PARAMETER: C_S0_AXI_PROTOCOL : AXI4 STRING CONSTANT}
{SENDING PARAMETER: C_S0_AXI_REG_EN0 : 0x00000 STD_LOGIC_VECTOR OPTIONAL_UPDATE}
{SENDING PARAMETER: C_S0_AXI_REG_EN1 : 0x01000 STD_LOGIC_VECTOR OPTIONAL}
{SENDING PARAMETER: C_S0_AXI_STRICT_COHERENCY : 1 INTEGER OPTIONAL_UPDATE}
{SENDING PARAMETER: C_S0_AXI_STRICT_COHERENCY : 0 INTEGER OPTIONAL_UPDATE}
{SENDING PARAMETER: C_S0_AXI_SUPPORTS_NARROW_BURST : Auto INTEGER OPTIONAL_UPDATE}
{SENDING PARAMETER: C_S0_AXI_SUPPORTS_READ : 1 INTEGER OPTIONAL_UPDATE}
{SENDING PARAMETER: C_S0_AXI_SUPPORTS_WRITE : 1 INTEGER OPTIONAL_UPDATE}
@ -479,14 +479,14 @@ Running: run_batch_mode 74543544
{SET: IGNORE C_MEM_DDR2_DIFF_DQS_EN = YES (BATCH:OPTIONAL::MPD:MPDVAL)}
{SET: IGNORE C_S2_AXI_ENABLE = 0 (BATCH:OPTIONAL::MPD:MPDVAL)}
{SET: IGNORE C_S0_AXI_DATA_WIDTH = 32 (BATCH:OPTIONAL::MPD:MPDVAL)}
{SET: CHECK C_MEM_NUM_COL_BITS = 10 (BATCH:OPTIONAL_UPDATE:CHECK:MHS:MPDVAL)}
{SET: CHECK C_MEM_NUM_COL_BITS = 10 (BATCH:OPTIONAL_UPDATE:CHECK:MPD:MPDVAL)}
{SET: IGNORE C_MEM_DDR3_RTT = DIV4 (BATCH:OPTIONAL::MPD:MPDVAL)}
{SET: UPDREM C_MEM_CAS_LATENCY = 6 (BATCH:UPDATE::MPD:MPDVAL)}
{SET: UPDATE C_MEM_TRFC = 160000 (BATCH:OPTIONAL_UPDATE::MPD:COMPVAL)}
{SET: IGNORE C_INTERCONNECT_S0_AXI_AR_REGISTER = 1 (BATCH:OPTIONAL::MHS:COMPVAL)}
{SET: UPDATE C_S3_AXI_SUPPORTS_READ = 0 (BATCH:OPTIONAL_UPDATE::MPD:COMPVAL)}
{SET: IGNORE C_S0_AXI_SUPPORTS_NARROW_BURST = Auto (BATCH:OPTIONAL_UPDATE::MPD:DEFVAL)}
{SET: UPDREM C_S0_AXI_STRICT_COHERENCY = 1 (BATCH:OPTIONAL_UPDATE::MPD:MPDVAL)}
{SET: IGNORE C_S0_AXI_STRICT_COHERENCY = 0 (BATCH:OPTIONAL_UPDATE::MHS:COMPVAL)}
{SET: IGNORE C_ARB_TIME_SLOT_10 = 0b000000000000000000 (BATCH:OPTIONAL::MPD:COMPVAL)}
{SET: IGNORE C_INTERCONNECT_S0_AXI_SECURE = 0 (BATCH:OPTIONAL::MPD:MPDVAL)}
{SET: IGNORE C_ARB_TIME_SLOT_11 = 0b000000000000000000 (BATCH:OPTIONAL::MPD:COMPVAL)}
@ -497,14 +497,14 @@ Running: run_batch_mode 74543544
{SET: UPDATE C_MEM_TREFI = 7800000 (BATCH:OPTIONAL_UPDATE::MPD:COMPVAL)}
{SET: IGNORE C_INTERCONNECT_S0_AXI_READ_ACCEPTANCE = 4 (BATCH:OPTIONAL::MPD:MPDVAL)}
{SET: IGNORE C_INTERCONNECT_S0_AXI_READ_FIFO_DEPTH = 0 (BATCH:OPTIONAL::MPD:MPDVAL)}
{SET: IGNORE C_S0_AXI_ENABLE = 1 (BATCH:OPTIONAL::MHS:MPDVAL)}
{SET: IGNORE C_S0_AXI_ENABLE = 1 (BATCH:OPTIONAL::MPD:MPDVAL)}
{SET: IGNORE C_MEM_MOBILE_PA_SR = FULL (BATCH:OPTIONAL::MPD:MPDVAL)}
{SET: IGNORE C_SKIP_IN_TERM_CAL = 0 (BATCH:OPTIONAL::MHS:MPDVAL)}
{SET: IGNORE C_SKIP_IN_TERM_CAL = 0 (BATCH:OPTIONAL::MPD:MPDVAL)}
{SET: IGNORE C_MEM_DDR2_3_HIGH_TEMP_SR = NORMAL (BATCH:OPTIONAL::MPD:MPDVAL)}
{SET: UPDREM C_S0_AXI_SUPPORTS_READ = 1 (BATCH:OPTIONAL_UPDATE::MPD:MPDVAL)}
{SET: IGNORE C_S0_AXI_HIGHADDR = 0x87ffffff (BATCH:OPTIONAL::MHS:COMPVAL)}
{SET: IGNORE C_MEM_DDR1_2_ODS = FULL (BATCH:OPTIONAL::MPD:MPDVAL)}
{SET: IGNORE C_MEM_TYPE = DDR3 (BATCH:OPTIONAL::MHS:MPDVAL)}
{SET: IGNORE C_MEM_TYPE = DDR3 (BATCH:OPTIONAL::MPD:MPDVAL)}
{SET: CHECK C_MEM_ADDR_WIDTH = 13 (BATCH:OPTIONAL_UPDATE:CHECK:MPD:MPDVAL)}
{SET: UPDATE C_S5_AXI_SUPPORTS_WRITE = 0 (BATCH:OPTIONAL_UPDATE::MPD:COMPVAL)}
{SET: UPDATE C_S4_AXI_SUPPORTS_READ = 0 (BATCH:OPTIONAL_UPDATE::MPD:COMPVAL)}
@ -521,7 +521,7 @@ Running: run_batch_mode 74543544
{SET: IGNORE C_INTERCONNECT_S0_AXI_W_REGISTER = 1 (BATCH:OPTIONAL::MHS:COMPVAL)}
{SET: IGNORE C_MEM_DDR2_RTT = 150OHMS (BATCH:OPTIONAL::MPD:MPDVAL)}
{SET: IGNORE C_MCB_PERFORMANCE = STANDARD (BATCH:OPTIONAL::MPD:MPDVAL)}
{SET: CHECK C_MEM_BANKADDR_WIDTH = 3 (BATCH:OPTIONAL_UPDATE:CHECK:MHS:MPDVAL)}
{SET: CHECK C_MEM_BANKADDR_WIDTH = 3 (BATCH:OPTIONAL_UPDATE:CHECK:MPD:MPDVAL)}
{SET: IGNORE C_INTERCONNECT_S0_AXI_B_REGISTER = 1 (BATCH:OPTIONAL::MHS:COMPVAL)}
{SET: IGNORE C_SIMULATION = FALSE (BATCH:OPTIONAL::MPD:MPDVAL)}
{SET: UPDATE C_S1_AXI_SUPPORTS_READ = 0 (BATCH:OPTIONAL_UPDATE::MPD:COMPVAL)}
@ -561,7 +561,3 @@ Running: run_batch_mode 74543544
{SET: IGNORE C_MEM_PARTNO = MT41J64M16XX-187E (BATCH:REQUIRE::MHS:COMPVAL)}
{SET: CHECK C_NUM_DQ_PINS = 16 (BATCH:OPTIONAL_UPDATE:CHECK:MPD:MPDVAL)}
RETURN: 0
=========================================================================
Time: Fri Aug 26 20:59:03 GMT Daylight Time 2011
Running: generate_corelevel_constraints 74543544
RETURN:

4
Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/ise/system.xreport
View file

@ -1,9 +1,9 @@
<?xml version='1.0' encoding='UTF-8'?>
<report-views version="2.0" >
<header>
<DateModified>2011-08-26T20:58:42</DateModified>
<DateModified>2011-08-27T11:01:38</DateModified>
<ModuleName>system</ModuleName>
<SummaryTimeStamp>2011-08-26T20:58:42</SummaryTimeStamp>
<SummaryTimeStamp>2011-08-27T11:01:38</SummaryTimeStamp>
<SavedFilePath>C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/ise/system.xreport</SavedFilePath>
<FilterFile>filter.filter</FilterFile>
<SavedFilterFilePath>C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/ise</SavedFilterFilePath>

227
Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/system.xml
View file

@ -1,48 +1,8 @@
<EDKSYSTEM EDKVERSION="13.1" EDWVERSION="1.2" TIMESTAMP="Fri Aug 26 20:58:41 2011">
<EDKSYSTEM EDKVERSION="13.1" EDWVERSION="1.2" TIMESTAMP="Sat Aug 27 11:01:36 2011">
<SYSTEMINFO ARCH="spartan6" DEVICE="xc6slx45t" PACKAGE="fgg484" PART="xc6slx45tfgg484-3" SOURCE="C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/system.xmp" SPEEDGRADE="-3"/>
<EXTERNALPORTS>
<PORT DIR="I" MHS_INDEX="0" NAME="RESET" RSTPOLARITY="1" SIGIS="RST" SIGNAME="RESET"/>
<PORT CLKFREQUENCY="200000000" DIFFPOLARITY="P" DIR="I" MHS_INDEX="1" NAME="CLK_P" SIGIS="CLK" SIGNAME="CLK"/>
<PORT CLKFREQUENCY="200000000" DIFFPOLARITY="N" DIR="I" MHS_INDEX="2" NAME="CLK_N" SIGIS="CLK" SIGNAME="CLK"/>
<PORT DIR="O" MHS_INDEX="3" NAME="RS232_Uart_1_sout" SIGNAME="RS232_Uart_1_sout"/>
<PORT DIR="I" MHS_INDEX="4" NAME="RS232_Uart_1_sin" SIGNAME="RS232_Uart_1_sin"/>
<PORT DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MHS_INDEX="5" MSB="3" NAME="LEDs_4Bits_TRI_O" RIGHT="0" SIGNAME="LEDs_4Bits_TRI_O"/>
<PORT DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MHS_INDEX="6" MSB="3" NAME="Push_Buttons_4Bits_TRI_I" RIGHT="0" SIGNAME="Push_Buttons_4Bits_TRI_I"/>
<PORT DIR="O" MHS_INDEX="7" NAME="mcbx_dram_clk" SIGNAME="mcbx_dram_clk"/>
<PORT DIR="O" MHS_INDEX="8" NAME="mcbx_dram_clk_n" SIGNAME="mcbx_dram_clk_n"/>
<PORT DIR="O" MHS_INDEX="9" NAME="mcbx_dram_cke" SIGNAME="mcbx_dram_cke"/>
<PORT DIR="O" MHS_INDEX="10" NAME="mcbx_dram_odt" SIGNAME="mcbx_dram_odt"/>
<PORT DIR="O" MHS_INDEX="11" NAME="mcbx_dram_ras_n" SIGNAME="mcbx_dram_ras_n"/>
<PORT DIR="O" MHS_INDEX="12" NAME="mcbx_dram_cas_n" SIGNAME="mcbx_dram_cas_n"/>
<PORT DIR="O" MHS_INDEX="13" NAME="mcbx_dram_we_n" SIGNAME="mcbx_dram_we_n"/>
<PORT DIR="O" MHS_INDEX="14" NAME="mcbx_dram_udm" SIGNAME="mcbx_dram_udm"/>
<PORT DIR="O" MHS_INDEX="15" NAME="mcbx_dram_ldm" SIGNAME="mcbx_dram_ldm"/>
<PORT DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MHS_INDEX="16" MSB="2" NAME="mcbx_dram_ba" RIGHT="0" SIGNAME="mcbx_dram_ba"/>
<PORT DIR="O" ENDIAN="LITTLE" LEFT="12" LSB="0" MHS_INDEX="17" MSB="12" NAME="mcbx_dram_addr" RIGHT="0" SIGNAME="mcbx_dram_addr"/>
<PORT DIR="O" MHS_INDEX="18" NAME="mcbx_dram_ddr3_rst" SIGNAME="mcbx_dram_ddr3_rst"/>
<PORT DIR="IO" ENDIAN="LITTLE" LEFT="15" LSB="0" MHS_INDEX="19" MSB="15" NAME="mcbx_dram_dq" RIGHT="0" SIGNAME="mcbx_dram_dq"/>
<PORT DIR="IO" MHS_INDEX="20" NAME="mcbx_dram_dqs" SIGNAME="mcbx_dram_dqs"/>
<PORT DIR="IO" MHS_INDEX="21" NAME="mcbx_dram_dqs_n" SIGNAME="mcbx_dram_dqs_n"/>
<PORT DIR="IO" MHS_INDEX="22" NAME="mcbx_dram_udqs" SIGNAME="mcbx_dram_udqs"/>
<PORT DIR="IO" MHS_INDEX="23" NAME="mcbx_dram_udqs_n" SIGNAME="mcbx_dram_udqs_n"/>
<PORT DIR="IO" MHS_INDEX="24" NAME="rzq" SIGNAME="rzq"/>
<PORT DIR="IO" MHS_INDEX="25" NAME="zio" SIGNAME="zio"/>
<PORT DIR="IO" MHS_INDEX="26" NAME="ETHERNET_MDIO" SIGNAME="ETHERNET_MDIO"/>
<PORT DIR="O" MHS_INDEX="27" NAME="ETHERNET_MDC" SIGNAME="ETHERNET_MDC"/>
<PORT DIR="O" MHS_INDEX="28" NAME="ETHERNET_TX_ER" SIGNAME="ETHERNET_TX_ER"/>
<PORT DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MHS_INDEX="29" MSB="7" NAME="ETHERNET_TXD" RIGHT="0" SIGNAME="ETHERNET_TXD"/>
<PORT DIR="O" MHS_INDEX="30" NAME="ETHERNET_TX_EN" SIGNAME="ETHERNET_TX_EN"/>
<PORT DIR="I" MHS_INDEX="31" NAME="ETHERNET_MII_TX_CLK" SIGNAME="ETHERNET_MII_TX_CLK"/>
<PORT DIR="O" MHS_INDEX="32" NAME="ETHERNET_TX_CLK" SIGNAME="ETHERNET_TX_CLK"/>
<PORT DIR="I" ENDIAN="LITTLE" LEFT="7" LSB="0" MHS_INDEX="33" MSB="7" NAME="ETHERNET_RXD" RIGHT="0" SIGNAME="ETHERNET_RXD"/>
<PORT DIR="I" MHS_INDEX="34" NAME="ETHERNET_RX_ER" SIGNAME="ETHERNET_RX_ER"/>
<PORT DIR="I" MHS_INDEX="35" NAME="ETHERNET_RX_CLK" SIGNAME="ETHERNET_RX_CLK"/>
<PORT DIR="I" MHS_INDEX="36" NAME="ETHERNET_RX_DV" SIGNAME="ETHERNET_RX_DV"/>
<PORT DIR="O" MHS_INDEX="37" NAME="ETHERNET_PHY_RST_N" SIGNAME="ETHERNET_PHY_RST_N"/>
</EXTERNALPORTS>
<MODULES>
<MODULE BUSSTD="AXI" BUSSTD_PSF="AXI" HWVERSION="1.02.a" INSTANCE="axi4_0" IPTYPE="BUS" IS_CROSSBAR="TRUE" MHS_INDEX="0" MODCLASS="BUS" MODTYPE="axi_interconnect">
<DESCRIPTION TYPE="SHORT">AXI Interconnect</DESCRIPTION>
@ -50,7 +10,6 @@
<DOCUMENTATION>
<DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/axi_interconnect_v1_02_a/doc/ds768_axi_interconnect.pdf" TYPE="IP"/>
</DOCUMENTATION>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETERS>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="spartan6"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="1" NAME="C_BASEFAMILY" TYPE="STRING" VALUE="spartan6"/>
@ -271,6 +230,7 @@
</SLAVES>
</MEMRANGE>
</MEMORYMAP>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
</MODULE>
<MODULE BUSSTD="AXI" BUSSTD_PSF="AXI" HWVERSION="1.02.a" INSTANCE="axi4lite_0" IPTYPE="BUS" MHS_INDEX="1" MODCLASS="BUS" MODTYPE="axi_interconnect">
<DESCRIPTION TYPE="SHORT">AXI Interconnect</DESCRIPTION>
@ -278,7 +238,6 @@
<DOCUMENTATION>
<DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/axi_interconnect_v1_02_a/doc/ds768_axi_interconnect.pdf" TYPE="IP"/>
</DOCUMENTATION>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETERS>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="spartan6"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="1" NAME="C_BASEFAMILY" TYPE="STRING" VALUE="spartan6"/>
@ -293,7 +252,7 @@
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="10" NAME="C_S_AXI_PROTOCOL" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="11" NAME="C_M_AXI_PROTOCOL" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000200000002000000020000000200000002000000020000000200000002"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="12" NAME="C_M_AXI_BASE_ADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0xffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff0000000041c00000ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff0000000041200000ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff0000000041e00000ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff0000000041240000ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff0000000040000000ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff0000000040020000ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff0000000040600000ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff0000000074800000"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="13" NAME="C_M_AXI_HIGH_ADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000041c0ffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004120ffff0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000041e0ffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004127ffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004000ffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004002ffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004060ffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007480ffff"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="13" NAME="C_M_AXI_HIGH_ADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000041c0ffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004120ffff0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000041e0ffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004127ffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004000ffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004002ffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004060ffff00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000748fffff"/>
<PARAMETER MPD_INDEX="14" NAME="C_S_AXI_BASE_ID" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"/>
<PARAMETER MPD_INDEX="15" NAME="C_S_AXI_THREAD_ID_WIDTH" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"/>
<PARAMETER MPD_INDEX="16" NAME="C_S_AXI_IS_INTERCONNECT" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000"/>
@ -499,6 +458,7 @@
</SLAVES>
</MEMRANGE>
</MEMORYMAP>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
</MODULE>
<MODULE HWVERSION="8.10.a" INSTANCE="microblaze_0" IPTYPE="PROCESSOR" MHS_INDEX="2" MODCLASS="PROCESSOR" MODTYPE="microblaze" PROCTYPE="MICROBLAZE">
<DESCRIPTION TYPE="SHORT">MicroBlaze</DESCRIPTION>
@ -506,7 +466,6 @@
<DOCUMENTATION>
<DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/microblaze_v8_10_a/doc/microblaze.pdf" TYPE="IP"/>
</DOCUMENTATION>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETERS>
<PARAMETER MPD_INDEX="0" NAME="C_SCO" TYPE="integer" VALUE="0"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="1" NAME="C_FREQ" TYPE="integer" VALUE="100000000"/>
@ -2519,18 +2478,21 @@
</PORTMAPS>
</BUSINTERFACE>
</BUSINTERFACES>
<INTERRUPTINFO TYPE="TARGET">
<SOURCE INSTANCE="microblaze_0_intc" INTC_INDEX="0"/>
</INTERRUPTINFO>
<MEMORYMAP>
<MEMRANGE BASEDECIMAL="0" BASENAME="C_BASEADDR" BASEVALUE="0x00000000" HIGHDECIMAL="65535" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x0000ffff" INSTANCE="microblaze_0_d_bram_ctrl" IS_DATA="TRUE" IS_INSTRUCTION="FALSE" IS_VALID="TRUE" MEMTYPE="MEMORY" SIZE="65536" SIZEABRV="64K">
<MEMRANGE BASEDECIMAL="0" BASENAME="C_BASEADDR" BASEVALUE="0x00000000" HIGHDECIMAL="8191" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x00001FFF" INSTANCE="microblaze_0_d_bram_ctrl" IS_DATA="TRUE" IS_INSTRUCTION="FALSE" IS_VALID="TRUE" MEMTYPE="MEMORY" SIZE="8192" SIZEABRV="8K">
<ACCESSROUTE>
<ROUTEPNT INDEX="0" INSTANCE="microblaze_0_dlmb"/>
</ACCESSROUTE>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="0" BASENAME="C_BASEADDR" BASEVALUE="0x00000000" HIGHDECIMAL="65535" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x0000ffff" INSTANCE="microblaze_0_i_bram_ctrl" IS_DATA="FALSE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="MEMORY" SIZE="65536" SIZEABRV="64K">
<MEMRANGE BASEDECIMAL="0" BASENAME="C_BASEADDR" BASEVALUE="0x00000000" HIGHDECIMAL="8191" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x00001FFF" INSTANCE="microblaze_0_i_bram_ctrl" IS_DATA="FALSE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="MEMORY" SIZE="8192" SIZEABRV="8K">
<ACCESSROUTE>
<ROUTEPNT INDEX="0" INSTANCE="microblaze_0_ilmb"/>
</ACCESSROUTE>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="1954545664" BASENAME="C_BASEADDR" BASEVALUE="0x74800000" HIGHDECIMAL="1954611199" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x7480ffff" INSTANCE="debug_module" IS_DATA="TRUE" IS_INSTRUCTION="FALSE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
<MEMRANGE BASEDECIMAL="1954545664" BASENAME="C_BASEADDR" BASEVALUE="0x74800000" HIGHDECIMAL="1955594239" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x748FFFFF" INSTANCE="debug_module" IS_DATA="TRUE" IS_INSTRUCTION="FALSE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="1048576" SIZEABRV="1M">
<ACCESSROUTE>
<ROUTEPNT INDEX="0" INSTANCE="axi4lite_0"/>
</ACCESSROUTE>
@ -2583,9 +2545,7 @@
<PERIPHERAL INSTANCE="microblaze_0_intc"/>
<PERIPHERAL INSTANCE="axi_timer_0"/>
</PERIPHERALS>
<INTERRUPTINFO TYPE="TARGET">
<SOURCE INSTANCE="microblaze_0_intc" INTC_INDEX="0"/>
</INTERRUPTINFO>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
</MODULE>
<MODULE BUSSTD="LMB" BUSSTD_PSF="LMB" HWVERSION="2.00.a" INSTANCE="microblaze_0_ilmb" IPTYPE="BUS" MHS_INDEX="3" MODCLASS="BUS" MODTYPE="lmb_v10">
<DESCRIPTION TYPE="SHORT">Local Memory Bus (LMB) 1.0</DESCRIPTION>
@ -2593,7 +2553,6 @@
<DOCUMENTATION>
<DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/lmb_v10_v2_00_a/doc/lmb_v10.pdf" TYPE="IP"/>
</DOCUMENTATION>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETERS>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_LMB_NUM_SLAVES" TYPE="integer" VALUE="1"/>
<PARAMETER MPD_INDEX="1" NAME="C_LMB_AWIDTH" TYPE="integer" VALUE="32"/>
@ -2631,6 +2590,7 @@
<IOINTERFACES>
<IOINTERFACE MPD_INDEX="0" NAME="reset_0"/>
</IOINTERFACES>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
</MODULE>
<MODULE BUSSTD="LMB" BUSSTD_PSF="LMB" HWVERSION="2.00.a" INSTANCE="microblaze_0_dlmb" IPTYPE="BUS" MHS_INDEX="4" MODCLASS="BUS" MODTYPE="lmb_v10">
<DESCRIPTION TYPE="SHORT">Local Memory Bus (LMB) 1.0</DESCRIPTION>
@ -2638,7 +2598,6 @@
<DOCUMENTATION>
<DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/lmb_v10_v2_00_a/doc/lmb_v10.pdf" TYPE="IP"/>
</DOCUMENTATION>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETERS>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_LMB_NUM_SLAVES" TYPE="integer" VALUE="1"/>
<PARAMETER MPD_INDEX="1" NAME="C_LMB_AWIDTH" TYPE="integer" VALUE="32"/>
@ -2676,6 +2635,7 @@
<IOINTERFACES>
<IOINTERFACE MPD_INDEX="0" NAME="reset_0"/>
</IOINTERFACES>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
</MODULE>
<MODULE HWVERSION="3.00.a" INSTANCE="microblaze_0_i_bram_ctrl" IPTYPE="PERIPHERAL" MHS_INDEX="5" MODCLASS="MEMORY_CNTLR" MODTYPE="lmb_bram_if_cntlr">
<DESCRIPTION TYPE="SHORT">LMB BRAM Controller</DESCRIPTION>
@ -2683,10 +2643,9 @@
<DOCUMENTATION>
<DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/lmb_bram_if_cntlr_v3_00_a/doc/lmb_bram_if_cntlr.pdf" TYPE="IP"/>
</DOCUMENTATION>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETERS>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" CHANGEDBY="USER" ENDIAN="BIG" IS_INSTANTIATED="TRUE" LSB="31" MHS_INDEX="2" MPD_INDEX="0" MSB="0" NAME="C_BASEADDR" TYPE="std_logic_vector" VALUE="0x00000000"/>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" CHANGEDBY="USER" ENDIAN="BIG" IS_INSTANTIATED="TRUE" LSB="31" MHS_INDEX="3" MPD_INDEX="1" MSB="0" NAME="C_HIGHADDR" TYPE="std_logic_vector" VALUE="0x0000ffff"/>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" CHANGEDBY="USER" ENDIAN="BIG" IS_INSTANTIATED="TRUE" LSB="31" MHS_INDEX="3" MPD_INDEX="1" MSB="0" NAME="C_HIGHADDR" TYPE="std_logic_vector" VALUE="0x00001FFF"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="2" NAME="C_FAMILY" TYPE="string" VALUE="spartan6"/>
<PARAMETER ENDIAN="BIG" LSB="31" MPD_INDEX="3" MSB="0" NAME="C_MASK" TYPE="std_logic_vector" VALUE="0x00800000"/>
<PARAMETER MPD_INDEX="4" NAME="C_LMB_AWIDTH" TYPE="integer" VALUE="32"/>
@ -2898,7 +2857,7 @@
</BUSINTERFACE>
</BUSINTERFACES>
<MEMORYMAP>
<MEMRANGE BASEDECIMAL="0" BASENAME="C_BASEADDR" BASEVALUE="0x00000000" HIGHDECIMAL="65535" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x0000ffff" MEMTYPE="MEMORY" MINSIZE="0x800" SIZE="65536" SIZEABRV="64K">
<MEMRANGE BASEDECIMAL="0" BASENAME="C_BASEADDR" BASEVALUE="0x00000000" HIGHDECIMAL="8191" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x00001FFF" MEMTYPE="MEMORY" MINSIZE="0x800" SIZE="8192" SIZEABRV="8K">
<SLAVES>
<SLAVE BUSINTERFACE="SLMB"/>
</SLAVES>
@ -2914,6 +2873,7 @@
</SLAVES>
</MEMRANGE>
</MEMORYMAP>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
</MODULE>
<MODULE HWVERSION="3.00.a" INSTANCE="microblaze_0_d_bram_ctrl" IPTYPE="PERIPHERAL" MHS_INDEX="6" MODCLASS="MEMORY_CNTLR" MODTYPE="lmb_bram_if_cntlr">
<DESCRIPTION TYPE="SHORT">LMB BRAM Controller</DESCRIPTION>
@ -2921,10 +2881,9 @@
<DOCUMENTATION>
<DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/lmb_bram_if_cntlr_v3_00_a/doc/lmb_bram_if_cntlr.pdf" TYPE="IP"/>
</DOCUMENTATION>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETERS>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" CHANGEDBY="USER" ENDIAN="BIG" IS_INSTANTIATED="TRUE" LSB="31" MHS_INDEX="2" MPD_INDEX="0" MSB="0" NAME="C_BASEADDR" TYPE="std_logic_vector" VALUE="0x00000000"/>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" CHANGEDBY="USER" ENDIAN="BIG" IS_INSTANTIATED="TRUE" LSB="31" MHS_INDEX="3" MPD_INDEX="1" MSB="0" NAME="C_HIGHADDR" TYPE="std_logic_vector" VALUE="0x0000ffff"/>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" CHANGEDBY="USER" ENDIAN="BIG" IS_INSTANTIATED="TRUE" LSB="31" MHS_INDEX="3" MPD_INDEX="1" MSB="0" NAME="C_HIGHADDR" TYPE="std_logic_vector" VALUE="0x00001FFF"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="2" NAME="C_FAMILY" TYPE="string" VALUE="spartan6"/>
<PARAMETER ENDIAN="BIG" LSB="31" MPD_INDEX="3" MSB="0" NAME="C_MASK" TYPE="std_logic_vector" VALUE="0x00800000"/>
<PARAMETER MPD_INDEX="4" NAME="C_LMB_AWIDTH" TYPE="integer" VALUE="32"/>
@ -3136,7 +3095,7 @@
</BUSINTERFACE>
</BUSINTERFACES>
<MEMORYMAP>
<MEMRANGE BASEDECIMAL="0" BASENAME="C_BASEADDR" BASEVALUE="0x00000000" HIGHDECIMAL="65535" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x0000ffff" MEMTYPE="MEMORY" MINSIZE="0x800" SIZE="65536" SIZEABRV="64K">
<MEMRANGE BASEDECIMAL="0" BASENAME="C_BASEADDR" BASEVALUE="0x00000000" HIGHDECIMAL="8191" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x00001FFF" MEMTYPE="MEMORY" MINSIZE="0x800" SIZE="8192" SIZEABRV="8K">
<SLAVES>
<SLAVE BUSINTERFACE="SLMB"/>
</SLAVES>
@ -3152,6 +3111,7 @@
</SLAVES>
</MEMRANGE>
</MEMORYMAP>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
</MODULE>
<MODULE HWVERSION="1.00.a" INSTANCE="microblaze_0_bram_block" IPTYPE="PERIPHERAL" MHS_INDEX="7" MODCLASS="MEMORY" MODTYPE="bram_block">
<DESCRIPTION TYPE="SHORT">Block RAM (BRAM) Block</DESCRIPTION>
@ -3159,9 +3119,8 @@
<DOCUMENTATION>
<DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/bram_block_v1_00_a/doc/bram_block.pdf" TYPE="IP"/>
</DOCUMENTATION>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETERS>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_MEMSIZE" TYPE="integer" VALUE="0x10000"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_MEMSIZE" TYPE="integer" VALUE="0x2000"/>
<PARAMETER MPD_INDEX="1" NAME="C_PORT_DWIDTH" TYPE="integer" VALUE="32"/>
<PARAMETER MPD_INDEX="2" NAME="C_PORT_AWIDTH" TYPE="integer" VALUE="32"/>
<PARAMETER MPD_INDEX="3" NAME="C_NUM_WE" TYPE="integer" VALUE="4"/>
@ -3207,6 +3166,7 @@
</PORTMAPS>
</BUSINTERFACE>
</BUSINTERFACES>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
</MODULE>
<MODULE HWVERSION="3.00.a" INSTANCE="proc_sys_reset_0" IPTYPE="PERIPHERAL" MHS_INDEX="8" MODCLASS="PERIPHERAL" MODTYPE="proc_sys_reset">
<DESCRIPTION TYPE="SHORT">Processor System Reset Module</DESCRIPTION>
@ -3214,7 +3174,6 @@
<DOCUMENTATION>
<DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/proc_sys_reset_v3_00_a/doc/proc_sys_reset.pdf" TYPE="IP"/>
</DOCUMENTATION>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETERS>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_SUBFAMILY" TYPE="string" VALUE="t"/>
<PARAMETER MPD_INDEX="1" NAME="C_EXT_RST_WIDTH" TYPE="integer" VALUE="4"/>
@ -3276,6 +3235,7 @@
<IOINTERFACES>
<IOINTERFACE MPD_INDEX="0" NAME="reset_0"/>
</IOINTERFACES>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
</MODULE>
<MODULE HWVERSION="4.01.a" INSTANCE="clock_generator_0" IPTYPE="PERIPHERAL" MHS_INDEX="9" MODCLASS="IP" MODTYPE="clock_generator">
<DESCRIPTION TYPE="SHORT">Clock Generator</DESCRIPTION>
@ -3283,7 +3243,6 @@
<DOCUMENTATION>
<DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/clock_generator_v4_01_a/doc/clock_generator.pdf" TYPE="IP"/>
</DOCUMENTATION>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETERS>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="spartan6"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="1" NAME="C_DEVICE" TYPE="STRING" VALUE="6slx45t"/>
@ -3409,6 +3368,7 @@
<PORT DIR="O" MPD_INDEX="22" NAME="PSDONE" SIGNAME="__NOC__"/>
</PORTS>
<BUSINTERFACES/>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
</MODULE>
<MODULE HWVERSION="2.00.b" INSTANCE="debug_module" IPTYPE="PERIPHERAL" MHS_INDEX="10" MODCLASS="DEBUG" MODTYPE="mdm">
<DESCRIPTION TYPE="SHORT">MicroBlaze Debug Module (MDM)</DESCRIPTION>
@ -3416,13 +3376,12 @@
<DOCUMENTATION>
<DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/mdm_v2_00_b/doc/mdm.pdf" TYPE="IP"/>
</DOCUMENTATION>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETERS>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="spartan6"/>
<PARAMETER MPD_INDEX="1" NAME="C_JTAG_CHAIN" TYPE="INTEGER" VALUE="2"/>
<PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="2" NAME="C_INTERCONNECT" TYPE="INTEGER" VALUE="2"/>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="9" MPD_INDEX="3" NAME="C_BASEADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x74800000"/>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="10" MPD_INDEX="4" NAME="C_HIGHADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x7480ffff"/>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="10" MPD_INDEX="4" NAME="C_HIGHADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x748FFFFF"/>
<PARAMETER MPD_INDEX="5" NAME="C_SPLB_AWIDTH" TYPE="INTEGER" VALUE="32"/>
<PARAMETER MPD_INDEX="6" NAME="C_SPLB_DWIDTH" TYPE="INTEGER" VALUE="32"/>
<PARAMETER MPD_INDEX="7" NAME="C_SPLB_P2P" TYPE="INTEGER" VALUE="0"/>
@ -3768,13 +3727,14 @@
</BUSINTERFACE>
</BUSINTERFACES>
<MEMORYMAP>
<MEMRANGE BASEDECIMAL="1954545664" BASENAME="C_BASEADDR" BASEVALUE="0x74800000" HIGHDECIMAL="1954611199" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x7480ffff" MEMTYPE="REGISTER" MINSIZE="0x100" SIZE="65536" SIZEABRV="64K">
<MEMRANGE BASEDECIMAL="1954545664" BASENAME="C_BASEADDR" BASEVALUE="0x74800000" HIGHDECIMAL="1955594239" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x748FFFFF" MEMTYPE="REGISTER" MINSIZE="0x100" SIZE="1048576" SIZEABRV="1M">
<SLAVES>
<SLAVE BUSINTERFACE="SPLB"/>
<SLAVE BUSINTERFACE="S_AXI"/>
</SLAVES>
</MEMRANGE>
</MEMORYMAP>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
</MODULE>
<MODULE HWVERSION="1.01.a" INSTANCE="RS232_Uart_1" IPTYPE="PERIPHERAL" MHS_INDEX="11" MODCLASS="PERIPHERAL" MODTYPE="axi_uartlite">
<DESCRIPTION TYPE="SHORT">AXI UART (Lite)</DESCRIPTION>
@ -3782,7 +3742,6 @@
<DOCUMENTATION>
<DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/axi_uartlite_v1_01_a/doc/axi_uartlite_ds741.pdf" TYPE="IP"/>
</DOCUMENTATION>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETERS>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="spartan6"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="1" NAME="C_S_AXI_ACLK_FREQ_HZ" TYPE="INTEGER" VALUE="50000000"/>
@ -3862,6 +3821,9 @@
</PORTMAPS>
</IOINTERFACE>
</IOINTERFACES>
<INTERRUPTINFO TYPE="SOURCE">
<TARGET INSTANCE="microblaze_0_intc" INTC_INDEX="0" PRIORITY="4"/>
</INTERRUPTINFO>
<MEMORYMAP>
<MEMRANGE BASEDECIMAL="1080033280" BASENAME="C_BASEADDR" BASEVALUE="0x40600000" HIGHDECIMAL="1080098815" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x4060ffff" MEMTYPE="REGISTER" MINSIZE="0x1000" SIZE="65536" SIZEABRV="64K">
<SLAVES>
@ -3869,9 +3831,7 @@
</SLAVES>
</MEMRANGE>
</MEMORYMAP>
<INTERRUPTINFO TYPE="SOURCE">
<TARGET INSTANCE="microblaze_0_intc" INTC_INDEX="0" PRIORITY="4"/>
</INTERRUPTINFO>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
</MODULE>
<MODULE HWVERSION="1.01.a" INSTANCE="LEDs_4Bits" IPTYPE="PERIPHERAL" MHS_INDEX="12" MODCLASS="PERIPHERAL" MODTYPE="axi_gpio">
<DESCRIPTION TYPE="SHORT">AXI General Purpose IO</DESCRIPTION>
@ -3879,7 +3839,6 @@
<DOCUMENTATION>
<DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/axi_gpio_v1_01_a/doc/ds744_axi_gpio.pdf" TYPE="IP"/>
</DOCUMENTATION>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETERS>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="spartan6"/>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="11" MPD_INDEX="1" NAME="C_BASEADDR" TYPE="std_logic_vector" VALUE="0x40020000"/>
@ -3983,6 +3942,7 @@
</SLAVES>
</MEMRANGE>
</MEMORYMAP>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
</MODULE>
<MODULE HWVERSION="1.01.a" INSTANCE="Push_Buttons_4Bits" IPTYPE="PERIPHERAL" MHS_INDEX="13" MODCLASS="PERIPHERAL" MODTYPE="axi_gpio">
<DESCRIPTION TYPE="SHORT">AXI General Purpose IO</DESCRIPTION>
@ -3990,7 +3950,6 @@
<DOCUMENTATION>
<DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/axi_gpio_v1_01_a/doc/ds744_axi_gpio.pdf" TYPE="IP"/>
</DOCUMENTATION>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETERS>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="spartan6"/>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="11" MPD_INDEX="1" NAME="C_BASEADDR" TYPE="std_logic_vector" VALUE="0x40000000"/>
@ -4087,6 +4046,9 @@
</PORTMAPS>
</IOINTERFACE>
</IOINTERFACES>
<INTERRUPTINFO TYPE="SOURCE">
<TARGET INSTANCE="microblaze_0_intc" INTC_INDEX="0" PRIORITY="3"/>
</INTERRUPTINFO>
<MEMORYMAP>
<MEMRANGE BASEDECIMAL="1073741824" BASENAME="C_BASEADDR" BASEVALUE="0x40000000" HIGHDECIMAL="1073807359" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x4000ffff" MEMTYPE="REGISTER" MINSIZE="0x1000" SIZE="65536" SIZEABRV="64K">
<SLAVES>
@ -4094,9 +4056,7 @@
</SLAVES>
</MEMRANGE>
</MEMORYMAP>
<INTERRUPTINFO TYPE="SOURCE">
<TARGET INSTANCE="microblaze_0_intc" INTC_INDEX="0" PRIORITY="3"/>
</INTERRUPTINFO>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
</MODULE>
<MODULE HWVERSION="1.02.a" INSTANCE="MCB_DDR3" IPTYPE="PERIPHERAL" MHS_INDEX="14" MODCLASS="MEMORY_CNTLR" MODTYPE="axi_s6_ddrx">
<DESCRIPTION TYPE="SHORT">AXI S6 Memory Controller(DDR/DDR2/DDR3)</DESCRIPTION>
@ -4104,15 +4064,14 @@
<DOCUMENTATION>
<DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/axi_s6_ddrx_v1_02_a/doc/axi_s6_ddrx.pdf" TYPE="IP"/>
</DOCUMENTATION>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETERS>
<PARAMETER MPD_INDEX="0" NAME="C_MCB_LOC" VALUE="MEMC3"/>
<PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="1" NAME="C_MCB_RZQ_LOC" TYPE="STRING" VALUE="K7"/>
<PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="3" MPD_INDEX="2" NAME="C_MCB_ZIO_LOC" TYPE="STRING" VALUE="R7"/>
<PARAMETER MPD_INDEX="3" NAME="C_MCB_PERFORMANCE" TYPE="STRING" VALUE="STANDARD"/>
<PARAMETER MPD_INDEX="4" NAME="C_BYPASS_CORE_UCF" VALUE="0"/>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="16" MPD_INDEX="5" NAME="C_S0_AXI_BASEADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x80000000"/>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="17" MPD_INDEX="6" NAME="C_S0_AXI_HIGHADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x87ffffff"/>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="11" MPD_INDEX="5" NAME="C_S0_AXI_BASEADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x80000000"/>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="12" MPD_INDEX="6" NAME="C_S0_AXI_HIGHADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x87ffffff"/>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" MPD_INDEX="7" NAME="C_S1_AXI_BASEADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0xFFFFFFFF"/>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" MPD_INDEX="8" NAME="C_S1_AXI_HIGHADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000"/>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" MPD_INDEX="9" NAME="C_S2_AXI_BASEADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0xFFFFFFFF"/>
@ -4123,13 +4082,13 @@
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" MPD_INDEX="14" NAME="C_S4_AXI_HIGHADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000"/>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" MPD_INDEX="15" NAME="C_S5_AXI_BASEADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0xFFFFFFFF"/>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" MPD_INDEX="16" NAME="C_S5_AXI_HIGHADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000"/>
<PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="4" MPD_INDEX="17" NAME="C_MEM_TYPE" TYPE="STRING" VALUE="DDR3"/>
<PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="5" MPD_INDEX="18" NAME="C_MEM_PARTNO" TYPE="STRING" VALUE="MT41J64M16XX-187E"/>
<PARAMETER MPD_INDEX="17" NAME="C_MEM_TYPE" TYPE="STRING" VALUE="DDR3"/>
<PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="4" MPD_INDEX="18" NAME="C_MEM_PARTNO" TYPE="STRING" VALUE="MT41J64M16XX-187E"/>
<PARAMETER MPD_INDEX="19" NAME="C_MEM_BASEPARTNO" TYPE="STRING" VALUE="NOT_SET"/>
<PARAMETER MPD_INDEX="20" NAME="C_NUM_DQ_PINS" TYPE="INTEGER" VALUE="16"/>
<PARAMETER MPD_INDEX="21" NAME="C_MEM_ADDR_WIDTH" TYPE="INTEGER" VALUE="13"/>
<PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="6" MPD_INDEX="22" NAME="C_MEM_BANKADDR_WIDTH" TYPE="INTEGER" VALUE="3"/>
<PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="7" MPD_INDEX="23" NAME="C_MEM_NUM_COL_BITS" TYPE="INTEGER" VALUE="10"/>
<PARAMETER MPD_INDEX="22" NAME="C_MEM_BANKADDR_WIDTH" TYPE="INTEGER" VALUE="3"/>
<PARAMETER MPD_INDEX="23" NAME="C_MEM_NUM_COL_BITS" TYPE="INTEGER" VALUE="10"/>
<PARAMETER MPD_INDEX="24" NAME="C_MEM_TRAS" TYPE="INTEGER" VALUE="-1"/>
<PARAMETER MPD_INDEX="25" NAME="C_MEM_TRCD" TYPE="INTEGER" VALUE="-1"/>
<PARAMETER MPD_INDEX="26" NAME="C_MEM_TREFI" TYPE="INTEGER" VALUE="-1"/>
@ -4139,7 +4098,7 @@
<PARAMETER MPD_INDEX="30" NAME="C_MEM_TRTP" TYPE="INTEGER" VALUE="-1"/>
<PARAMETER MPD_INDEX="31" NAME="C_MEM_TWTR" TYPE="INTEGER" VALUE="-1"/>
<PARAMETER MPD_INDEX="32" NAME="C_PORT_CONFIG" TYPE="STRING" VALUE="B32_B32_B32_B32"/>
<PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="8" MPD_INDEX="33" NAME="C_SKIP_IN_TERM_CAL" TYPE="INTEGER" VALUE="0"/>
<PARAMETER MPD_INDEX="33" NAME="C_SKIP_IN_TERM_CAL" TYPE="INTEGER" VALUE="0"/>
<PARAMETER MPD_INDEX="34" NAME="C_SKIP_IN_TERM_CAL_VALUE" TYPE="STRING" VALUE="NONE"/>
<PARAMETER MPD_INDEX="35" NAME="C_MEMCLK_PERIOD" TYPE="INTEGER" VALUE="0"/>
<PARAMETER MPD_INDEX="36" NAME="C_MEM_ADDR_ORDER" TYPE="STRING" VALUE="ROW_BANK_COLUMN"/>
@ -4174,7 +4133,7 @@
<PARAMETER MPD_INDEX="65" NAME="C_ARB_TIME_SLOT_9" TYPE="STD_LOGIC_VECTOR" VALUE="0b000000001010011000"/>
<PARAMETER MPD_INDEX="66" NAME="C_ARB_TIME_SLOT_10" TYPE="STD_LOGIC_VECTOR" VALUE="0b000000010011000001"/>
<PARAMETER MPD_INDEX="67" NAME="C_ARB_TIME_SLOT_11" TYPE="STD_LOGIC_VECTOR" VALUE="0b000000011000001010"/>
<PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="9" MPD_INDEX="68" NAME="C_S0_AXI_ENABLE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="68" NAME="C_S0_AXI_ENABLE" TYPE="INTEGER" VALUE="1"/>
<PARAMETER MPD_INDEX="69" NAME="C_S0_AXI_PROTOCOL" TYPE="STRING" VALUE="AXI4"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="70" NAME="C_S0_AXI_ID_WIDTH" TYPE="INTEGER" VALUE="2"/>
<PARAMETER MPD_INDEX="71" NAME="C_S0_AXI_ADDR_WIDTH" TYPE="INTEGER" VALUE="32"/>
@ -4184,7 +4143,7 @@
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="75" NAME="C_S0_AXI_SUPPORTS_NARROW_BURST" TYPE="INTEGER" VALUE="0"/>
<PARAMETER MPD_INDEX="76" NAME="C_S0_AXI_REG_EN0" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000"/>
<PARAMETER MPD_INDEX="77" NAME="C_S0_AXI_REG_EN1" TYPE="STD_LOGIC_VECTOR" VALUE="0x01000"/>
<PARAMETER MPD_INDEX="78" NAME="C_S0_AXI_STRICT_COHERENCY" TYPE="INTEGER" VALUE="1"/>
<PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="13" MPD_INDEX="78" NAME="C_S0_AXI_STRICT_COHERENCY" TYPE="INTEGER" VALUE="0"/>
<PARAMETER MPD_INDEX="79" NAME="C_S0_AXI_ENABLE_AP" TYPE="INTEGER" VALUE="0"/>
<PARAMETER MPD_INDEX="80" NAME="C_INTERCONNECT_S0_AXI_READ_ACCEPTANCE" TYPE="INTEGER" VALUE="4"/>
<PARAMETER MPD_INDEX="81" NAME="C_INTERCONNECT_S0_AXI_WRITE_ACCEPTANCE" TYPE="INTEGER" VALUE="4"/>
@ -4260,12 +4219,12 @@
<PARAMETER MPD_INDEX="151" NAME="C_INTERCONNECT_S5_AXI_WRITE_ACCEPTANCE" TYPE="INTEGER" VALUE="4"/>
<PARAMETER MPD_INDEX="152" NAME="C_MCB_USE_EXTERNAL_BUFPLL" TYPE="INTEGER" VALUE="0"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="153" NAME="C_SYS_RST_PRESENT" TYPE="INTEGER" VALUE="1"/>
<PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="10" NAME="C_INTERCONNECT_S0_AXI_MASTERS" VALUE="ETHERNET_dma.M_AXI_SG &amp; ETHERNET_dma.M_AXI_MM2S &amp; ETHERNET_dma.M_AXI_S2MM"/>
<PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="11" NAME="C_INTERCONNECT_S0_AXI_AW_REGISTER" VALUE="1"/>
<PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="12" NAME="C_INTERCONNECT_S0_AXI_AR_REGISTER" VALUE="1"/>
<PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="13" NAME="C_INTERCONNECT_S0_AXI_W_REGISTER" VALUE="1"/>
<PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="14" NAME="C_INTERCONNECT_S0_AXI_R_REGISTER" VALUE="1"/>
<PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="15" NAME="C_INTERCONNECT_S0_AXI_B_REGISTER" VALUE="1"/>
<PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="5" NAME="C_INTERCONNECT_S0_AXI_MASTERS" VALUE="ETHERNET_dma.M_AXI_SG &amp; ETHERNET_dma.M_AXI_MM2S &amp; ETHERNET_dma.M_AXI_S2MM"/>
<PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="6" NAME="C_INTERCONNECT_S0_AXI_AW_REGISTER" VALUE="1"/>
<PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="7" NAME="C_INTERCONNECT_S0_AXI_AR_REGISTER" VALUE="1"/>
<PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="8" NAME="C_INTERCONNECT_S0_AXI_W_REGISTER" VALUE="1"/>
<PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="9" NAME="C_INTERCONNECT_S0_AXI_R_REGISTER" VALUE="1"/>
<PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="10" NAME="C_INTERCONNECT_S0_AXI_B_REGISTER" VALUE="1"/>
</PARAMETERS>
<PORTS>
<PORT DIR="O" IOS="memory_0" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="17" NAME="mcbx_dram_clk" SIGIS="CLK" SIGNAME="mcbx_dram_clk"/>
@ -4857,6 +4816,7 @@
</SLAVES>
</MEMRANGE>
</MEMORYMAP>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
</MODULE>
<MODULE HWVERSION="2.01.a" INSTANCE="ETHERNET" IPTYPE="PERIPHERAL" MHS_INDEX="15" MODCLASS="PERIPHERAL" MODTYPE="axi_ethernet">
<DESCRIPTION TYPE="SHORT">AXI Ethernet</DESCRIPTION>
@ -4864,7 +4824,6 @@
<DOCUMENTATION>
<DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/axi_ethernet_v2_01_a/doc/ds759_axi_ethernet.pdf" TYPE="IP"/>
</DOCUMENTATION>
<LICENSEINFO EXPIRESON="Jan-30-2016" ICON_NAME="ps_core_preferred" STATE="Hardware Evaluation" TYPE="Hardware_Evaluation"/>
<PARAMETERS>
<PARAMETER MPD_INDEX="0" NAME="C_S_AXI_PROTOCOL" TYPE="STRING" VALUE="AXI4LITE"/>
<PARAMETER MPD_INDEX="1" NAME="C_AXI_STR_TXC_TDATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
@ -5177,6 +5136,9 @@
</PORTMAPS>
</IOINTERFACE>
</IOINTERFACES>
<INTERRUPTINFO TYPE="SOURCE">
<TARGET INSTANCE="microblaze_0_intc" INTC_INDEX="0" PRIORITY="0"/>
</INTERRUPTINFO>
<MEMORYMAP>
<MEMRANGE BASEDECIMAL="1092878336" BASENAME="C_BASEADDR" BASEVALUE="0x41240000" HIGHDECIMAL="1093140479" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x4127ffff" MEMTYPE="REGISTER" MINSIZE="0x40000" SIZE="262144" SIZEABRV="256K">
<SLAVES>
@ -5184,9 +5146,7 @@
</SLAVES>
</MEMRANGE>
</MEMORYMAP>
<INTERRUPTINFO TYPE="SOURCE">
<TARGET INSTANCE="microblaze_0_intc" INTC_INDEX="0" PRIORITY="0"/>
</INTERRUPTINFO>
<LICENSEINFO EXPIRESON="Jan-30-2016" ICON_NAME="ps_core_preferred" STATE="Hardware Evaluation" TYPE="Hardware_Evaluation"/>
</MODULE>
<MODULE HWVERSION="3.00.a" INSTANCE="ETHERNET_dma" IPTYPE="PERIPHERAL" MHS_INDEX="16" MODCLASS="PERIPHERAL" MODTYPE="axi_dma">
<DESCRIPTION TYPE="SHORT">AXI DMA Engine</DESCRIPTION>
@ -5194,7 +5154,6 @@
<DOCUMENTATION>
<DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/axi_dma_v3_00_a/doc/axi_dma_ds781.pdf" TYPE="IP"/>
</DOCUMENTATION>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETERS>
<PARAMETER MPD_INDEX="0" NAME="C_S_AXI_LITE_ADDR_WIDTH" TYPE="INTEGER" VALUE="32"/>
<PARAMETER MPD_INDEX="1" NAME="C_S_AXI_LITE_DATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
@ -5530,6 +5489,10 @@
</PORTMAPS>
</BUSINTERFACE>
</BUSINTERFACES>
<INTERRUPTINFO TYPE="SOURCE">
<TARGET INSTANCE="microblaze_0_intc" INTC_INDEX="0" PRIORITY="1"/>
<TARGET INSTANCE="microblaze_0_intc" INTC_INDEX="0" PRIORITY="2"/>
</INTERRUPTINFO>
<MEMORYMAP>
<MEMRANGE BASEDECIMAL="1105199104" BASENAME="C_BASEADDR" BASEVALUE="0x41e00000" HIGHDECIMAL="1105264639" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x41e0ffff" MEMTYPE="REGISTER" MINSIZE="0x1000" SIZE="65536" SIZEABRV="64K">
<SLAVES>
@ -5537,10 +5500,7 @@
</SLAVES>
</MEMRANGE>
</MEMORYMAP>
<INTERRUPTINFO TYPE="SOURCE">
<TARGET INSTANCE="microblaze_0_intc" INTC_INDEX="0" PRIORITY="1"/>
<TARGET INSTANCE="microblaze_0_intc" INTC_INDEX="0" PRIORITY="2"/>
</INTERRUPTINFO>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
</MODULE>
<MODULE HWVERSION="1.01.a" INSTANCE="microblaze_0_intc" IPTYPE="PERIPHERAL" MHS_INDEX="17" MODCLASS="INTERRUPT_CNTLR" MODTYPE="axi_intc">
<DESCRIPTION TYPE="SHORT">AXI Interrupt Controller</DESCRIPTION>
@ -5548,7 +5508,6 @@
<DOCUMENTATION>
<DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/axi_intc_v1_01_a/doc/ds747_axi_intc.pdf" TYPE="IP"/>
</DOCUMENTATION>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETERS>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="spartan6"/>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="7" MPD_INDEX="1" NAME="C_BASEADDR" TYPE="std_logic_vector" VALUE="0x41200000"/>
@ -5632,13 +5591,6 @@
</PORTMAPS>
</BUSINTERFACE>
</BUSINTERFACES>
<MEMORYMAP>
<MEMRANGE BASEDECIMAL="1092616192" BASENAME="C_BASEADDR" BASEVALUE="0x41200000" HIGHDECIMAL="1092681727" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x4120ffff" MEMTYPE="REGISTER" MINSIZE="0x1000" SIZE="65536" SIZEABRV="64K">
<SLAVES>
<SLAVE BUSINTERFACE="S_AXI"/>
</SLAVES>
</MEMRANGE>
</MEMORYMAP>
<INTERRUPTINFO INTC_INDEX="0" TYPE="CONTROLLER">
<SOURCE INSTANCE="ETHERNET" PRIORITY="0" SIGNAME="ETHERNET_INTERRUPT"/>
<SOURCE INSTANCE="ETHERNET_dma" PRIORITY="1" SIGNAME="ETHERNET_dma_mm2s_introut"/>
@ -5648,6 +5600,14 @@
<SOURCE INSTANCE="axi_timer_0" PRIORITY="5" SIGNAME="axi_timer_0_Interrupt"/>
<TARGET INSTANCE="microblaze_0"/>
</INTERRUPTINFO>
<MEMORYMAP>
<MEMRANGE BASEDECIMAL="1092616192" BASENAME="C_BASEADDR" BASEVALUE="0x41200000" HIGHDECIMAL="1092681727" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x4120ffff" MEMTYPE="REGISTER" MINSIZE="0x1000" SIZE="65536" SIZEABRV="64K">
<SLAVES>
<SLAVE BUSINTERFACE="S_AXI"/>
</SLAVES>
</MEMRANGE>
</MEMORYMAP>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
</MODULE>
<MODULE HWVERSION="1.01.a" INSTANCE="axi_timer_0" IPTYPE="PERIPHERAL" MHS_INDEX="18" MODCLASS="PERIPHERAL" MODTYPE="axi_timer">
<DESCRIPTION TYPE="SHORT">AXI Timer/Counter</DESCRIPTION>
@ -5655,7 +5615,6 @@
<DOCUMENTATION>
<DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/axi_timer_v1_01_a/doc/axi_timer_ds764.pdf" TYPE="IP"/>
</DOCUMENTATION>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETERS>
<PARAMETER MPD_INDEX="0" NAME="C_S_AXI_PROTOCOL" TYPE="STRING" VALUE="AXI4LITE"/>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="1" NAME="C_FAMILY" TYPE="STRING" VALUE="spartan6"/>
@ -5733,6 +5692,9 @@
</PORTMAPS>
</BUSINTERFACE>
</BUSINTERFACES>
<INTERRUPTINFO TYPE="SOURCE">
<TARGET INSTANCE="microblaze_0_intc" INTC_INDEX="0" PRIORITY="5"/>
</INTERRUPTINFO>
<MEMORYMAP>
<MEMRANGE BASEDECIMAL="1103101952" BASENAME="C_BASEADDR" BASEVALUE="0x41c00000" HIGHDECIMAL="1103167487" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x41c0ffff" MEMTYPE="REGISTER" MINSIZE="0x1000" SIZE="65536" SIZEABRV="64K">
<SLAVES>
@ -5740,10 +5702,49 @@
</SLAVES>
</MEMRANGE>
</MEMORYMAP>
<INTERRUPTINFO TYPE="SOURCE">
<TARGET INSTANCE="microblaze_0_intc" INTC_INDEX="0" PRIORITY="5"/>
</INTERRUPTINFO>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
</MODULE>
</MODULES>
<EXTERNALPORTS>
<PORT DIR="I" MHS_INDEX="0" NAME="RESET" RSTPOLARITY="1" SIGIS="RST" SIGNAME="RESET"/>
<PORT CLKFREQUENCY="200000000" DIFFPOLARITY="P" DIR="I" MHS_INDEX="1" NAME="CLK_P" SIGIS="CLK" SIGNAME="CLK"/>
<PORT CLKFREQUENCY="200000000" DIFFPOLARITY="N" DIR="I" MHS_INDEX="2" NAME="CLK_N" SIGIS="CLK" SIGNAME="CLK"/>
<PORT DIR="O" MHS_INDEX="3" NAME="RS232_Uart_1_sout" SIGNAME="RS232_Uart_1_sout"/>
<PORT DIR="I" MHS_INDEX="4" NAME="RS232_Uart_1_sin" SIGNAME="RS232_Uart_1_sin"/>
<PORT DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MHS_INDEX="5" MSB="3" NAME="LEDs_4Bits_TRI_O" RIGHT="0" SIGNAME="LEDs_4Bits_TRI_O"/>
<PORT DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MHS_INDEX="6" MSB="3" NAME="Push_Buttons_4Bits_TRI_I" RIGHT="0" SIGNAME="Push_Buttons_4Bits_TRI_I"/>
<PORT DIR="O" MHS_INDEX="7" NAME="mcbx_dram_clk" SIGNAME="mcbx_dram_clk"/>
<PORT DIR="O" MHS_INDEX="8" NAME="mcbx_dram_clk_n" SIGNAME="mcbx_dram_clk_n"/>
<PORT DIR="O" MHS_INDEX="9" NAME="mcbx_dram_cke" SIGNAME="mcbx_dram_cke"/>
<PORT DIR="O" MHS_INDEX="10" NAME="mcbx_dram_odt" SIGNAME="mcbx_dram_odt"/>
<PORT DIR="O" MHS_INDEX="11" NAME="mcbx_dram_ras_n" SIGNAME="mcbx_dram_ras_n"/>
<PORT DIR="O" MHS_INDEX="12" NAME="mcbx_dram_cas_n" SIGNAME="mcbx_dram_cas_n"/>
<PORT DIR="O" MHS_INDEX="13" NAME="mcbx_dram_we_n" SIGNAME="mcbx_dram_we_n"/>
<PORT DIR="O" MHS_INDEX="14" NAME="mcbx_dram_udm" SIGNAME="mcbx_dram_udm"/>
<PORT DIR="O" MHS_INDEX="15" NAME="mcbx_dram_ldm" SIGNAME="mcbx_dram_ldm"/>
<PORT DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MHS_INDEX="16" MSB="2" NAME="mcbx_dram_ba" RIGHT="0" SIGNAME="mcbx_dram_ba"/>
<PORT DIR="O" ENDIAN="LITTLE" LEFT="12" LSB="0" MHS_INDEX="17" MSB="12" NAME="mcbx_dram_addr" RIGHT="0" SIGNAME="mcbx_dram_addr"/>
<PORT DIR="O" MHS_INDEX="18" NAME="mcbx_dram_ddr3_rst" SIGNAME="mcbx_dram_ddr3_rst"/>
<PORT DIR="IO" ENDIAN="LITTLE" LEFT="15" LSB="0" MHS_INDEX="19" MSB="15" NAME="mcbx_dram_dq" RIGHT="0" SIGNAME="mcbx_dram_dq"/>
<PORT DIR="IO" MHS_INDEX="20" NAME="mcbx_dram_dqs" SIGNAME="mcbx_dram_dqs"/>
<PORT DIR="IO" MHS_INDEX="21" NAME="mcbx_dram_dqs_n" SIGNAME="mcbx_dram_dqs_n"/>
<PORT DIR="IO" MHS_INDEX="22" NAME="mcbx_dram_udqs" SIGNAME="mcbx_dram_udqs"/>
<PORT DIR="IO" MHS_INDEX="23" NAME="mcbx_dram_udqs_n" SIGNAME="mcbx_dram_udqs_n"/>
<PORT DIR="IO" MHS_INDEX="24" NAME="rzq" SIGNAME="rzq"/>
<PORT DIR="IO" MHS_INDEX="25" NAME="zio" SIGNAME="zio"/>
<PORT DIR="IO" MHS_INDEX="26" NAME="ETHERNET_MDIO" SIGNAME="ETHERNET_MDIO"/>
<PORT DIR="O" MHS_INDEX="27" NAME="ETHERNET_MDC" SIGNAME="ETHERNET_MDC"/>
<PORT DIR="O" MHS_INDEX="28" NAME="ETHERNET_TX_ER" SIGNAME="ETHERNET_TX_ER"/>
<PORT DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MHS_INDEX="29" MSB="7" NAME="ETHERNET_TXD" RIGHT="0" SIGNAME="ETHERNET_TXD"/>
<PORT DIR="O" MHS_INDEX="30" NAME="ETHERNET_TX_EN" SIGNAME="ETHERNET_TX_EN"/>
<PORT DIR="I" MHS_INDEX="31" NAME="ETHERNET_MII_TX_CLK" SIGNAME="ETHERNET_MII_TX_CLK"/>
<PORT DIR="O" MHS_INDEX="32" NAME="ETHERNET_TX_CLK" SIGNAME="ETHERNET_TX_CLK"/>
<PORT DIR="I" ENDIAN="LITTLE" LEFT="7" LSB="0" MHS_INDEX="33" MSB="7" NAME="ETHERNET_RXD" RIGHT="0" SIGNAME="ETHERNET_RXD"/>
<PORT DIR="I" MHS_INDEX="34" NAME="ETHERNET_RX_ER" SIGNAME="ETHERNET_RX_ER"/>
<PORT DIR="I" MHS_INDEX="35" NAME="ETHERNET_RX_CLK" SIGNAME="ETHERNET_RX_CLK"/>
<PORT DIR="I" MHS_INDEX="36" NAME="ETHERNET_RX_DV" SIGNAME="ETHERNET_RX_DV"/>
<PORT DIR="O" MHS_INDEX="37" NAME="ETHERNET_PHY_RST_N" SIGNAME="ETHERNET_PHY_RST_N"/>
</EXTERNALPORTS>
</EDKSYSTEM>

7
Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/etc/system.filters
View file

@ -1,10 +1,11 @@
<FILTERS>
<IDENTIFICATION VERSION="1.2" XTLVERSION="1.2"/>
<SET CLASS="PROJECT" VIEW_ID="BUSINTERFACE">
<HEADERS HSCROLL="0" VSCROLL="0">
<VARIABLE COL_INDEX="0" COL_WIDTH="306" IS_VISIBLE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="HEADER"/>
<VARIABLE COL_INDEX="0" COL_WIDTH="321" IS_VISIBLE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="HEADER"/>
</HEADERS>
<SET CLASS="FILTER_GROUP" ID="By Connection" IS_EXPANDED="TRUE">
<VARIABLE NAME="By Connection" VALUE="By Connection" VIEWDISP="Bus Interface Filters" VIEWTYPE="STATIC"/>
@ -93,8 +94,8 @@
</SET>
<SET CLASS="PROJECT" VIEW_ID="PORT">
<HEADERS>
<VARIABLE COL_WIDTH="50" IS_VISIBLE="TRUE" VIEWDISP="Port Filters" VIEWTYPE="HEADER"/>
<HEADERS HSCROLL="0" VSCROLL="0">
<VARIABLE COL_INDEX="0" COL_WIDTH="307" IS_VISIBLE="TRUE" VIEWDISP="Port Filters" VIEWTYPE="HEADER"/>
</HEADERS>
<SET CLASS="FILTER_GROUP" ID="By Interface" IS_EXPANDED="TRUE">
<VARIABLE NAME="By Interface" VALUE="By Interface" VIEWDISP="Port Filters" VIEWTYPE="STATIC"/>

33
Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/etc/system.gui
View file

@ -6,16 +6,18 @@
<SET CLASS="PROJECT" DISPLAYMODE="TREE" VIEW_ID="BUSINTERFACE">
<HEADERS HSCROLL="0" VSCROLL="0">
<VARIABLE COL_INDEX="0" COL_WIDTH="224" IS_VISIBLE="TRUE" VIEWDISP="Name" VIEWTYPE="HEADER"/>
<VARIABLE COL_INDEX="1" COL_WIDTH="100" IS_VISIBLE="TRUE" VIEWDISP="Bus Name" VIEWTYPE="HEADER"/>
<VARIABLE COL_INDEX="1" COL_WIDTH="525" IS_VISIBLE="TRUE" VIEWDISP="Bus Name" VIEWTYPE="HEADER"/>
<VARIABLE COL_INDEX="2" IS_VISIBLE="FALSE" VIEWDISP="Bus Standard" VIEWTYPE="HEADER"/>
<VARIABLE COL_INDEX="3" COL_WIDTH="230" IS_VISIBLE="TRUE" VIEWDISP="IP Type" VIEWTYPE="HEADER"/>
<VARIABLE COL_INDEX="4" COL_WIDTH="250" IS_VISIBLE="TRUE" VIEWDISP="IP Version" VIEWTYPE="HEADER"/>
<VARIABLE COL_INDEX="4" COL_WIDTH="797" IS_VISIBLE="TRUE" VIEWDISP="IP Version" VIEWTYPE="HEADER"/>
<VARIABLE COL_INDEX="5" IS_VISIBLE="FALSE" VIEWDISP="IP Classification" VIEWTYPE="HEADER"/>
<VARIABLE COL_INDEX="6" IS_VISIBLE="FALSE" VIEWDISP="Type" VIEWTYPE="HEADER"/>
</HEADERS>
<SPLITTERS COLLAPSIBLE="1" HANDLEWIDTH="4" MARKER="255" ORIENTATION="1" RESIZE="1" SIZES="180,450,180" VERSION="0"/>
<SPLITTERS COLLAPSIBLE="1" HANDLEWIDTH="4" MARKER="255" ORIENTATION="1" RESIZE="1" SIZES="172,900,325" VERSION="0"/>
<STATUS>
<SELECTIONS/>
<SELECTIONS>
<VARIABLE ID="S0_AXI" PARENT="MCB_DDR3"/>
</SELECTIONS>
</STATUS>
<SEQUENCES IS_DEF_SEQUENCES="TRUE">
<VARIABLE ID="axi4_0" ROW_INDEX="0"/>
@ -96,6 +98,7 @@
<VARIABLE COL_INDEX="10" IS_VISIBLE="TRUE" VIEWDISP="IP Classification" VIEWTYPE="HEADER"/>
</HEADERS>
<SPLITTERS COLLAPSIBLE="1" HANDLEWIDTH="4" MARKER="255" ORIENTATION="1" RESIZE="1" SIZES="0,630,180" VERSION="0"/>
<SET ID="MCB_DDR3" IS_EXPANDED="TRUE"/>
<STATUS>
<SELECTIONS/>
</STATUS>
@ -109,16 +112,17 @@
<VARIABLE ID="microblaze_0_i_bram_ctrl" ROW_INDEX="8"/>
<VARIABLE ID="microblaze_0_d_bram_ctrl" ROW_INDEX="7"/>
<VARIABLE ID="microblaze_0_bram_block" ROW_INDEX="6"/>
<VARIABLE ID="proc_sys_reset_0" ROW_INDEX="18"/>
<VARIABLE ID="clock_generator_0" ROW_INDEX="17"/>
<VARIABLE ID="proc_sys_reset_0" ROW_INDEX="19"/>
<VARIABLE ID="clock_generator_0" ROW_INDEX="18"/>
<VARIABLE ID="debug_module" ROW_INDEX="10"/>
<VARIABLE ID="RS232_Uart_1" ROW_INDEX="16"/>
<VARIABLE ID="RS232_Uart_1" ROW_INDEX="17"/>
<VARIABLE ID="LEDs_4Bits" ROW_INDEX="14"/>
<VARIABLE ID="Push_Buttons_4Bits" ROW_INDEX="15"/>
<VARIABLE ID="MCB_DDR3" ROW_INDEX="9"/>
<VARIABLE ID="MCB_DDR3" IS_EXPANDED="TRUE" ROW_INDEX="9"/>
<VARIABLE ID="ETHERNET" ROW_INDEX="13"/>
<VARIABLE ID="ETHERNET_dma" ROW_INDEX="12"/>
<VARIABLE ID="microblaze_0_intc" ROW_INDEX="11"/>
<VARIABLE ID="axi_timer_0" ROW_INDEX="16"/>
</SEQUENCES>
</SET>
@ -189,12 +193,19 @@
<VARIABLE COL_INDEX="8" IS_VISIBLE="FALSE" VIEWDISP="IP Type" VIEWTYPE="HEADER"/>
<VARIABLE COL_INDEX="10" IS_VISIBLE="FALSE" VIEWDISP="IP Version" VIEWTYPE="HEADER"/>
<VARIABLE COL_INDEX="7" IS_VISIBLE="FALSE" VIEWDISP="Address Type" VIEWTYPE="HEADER"/>
<VARIABLE COL_INDEX="9" COL_WIDTH="100" IS_VISIBLE="TRUE" VIEWDISP="Lock" VIEWTYPE="HEADER"/>
<VARIABLE COL_INDEX="9" COL_WIDTH="592" IS_VISIBLE="TRUE" VIEWDISP="Lock" VIEWTYPE="HEADER"/>
</HEADERS>
<SPLITTERS COLLAPSIBLE="1" HANDLEWIDTH="4" MARKER="255" ORIENTATION="1" RESIZE="1" SIZES="0,630,180" VERSION="0"/>
<SET ID="microblaze_0" IS_EXPANDED="TRUE"/>
<STATUS IS_EXPANDED="TRUE">
<SELECTIONS/>
<STATUS>
<SELECTIONS>
<VARIABLE ID="microblaze_0.debug_module:C_BASEADDR:C_HIGHADDR" PARENT="microblaze_0"/>
</SELECTIONS>
</STATUS>
<SEQUENCES IS_DEF_SEQUENCES="TRUE">
<VARIABLE ID="microblaze_0" IS_EXPANDED="TRUE" ROW_INDEX="0"/>
<VARIABLE ID="Unmapped Addresses" ROW_INDEX="1"/>
</SEQUENCES>
</SET>
<SET CLASS="PROJECT" DISPLAYMODE="FLAT" VIEW_ID="ADDRESS">

80
Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/implementation/system_summary.html
View file

@ -2,7 +2,7 @@
<BODY TEXT='#000000' BGCOLOR='#FFFFFF' LINK='#0000EE' VLINK='#551A8B' ALINK='#FF0000'>
<TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
<TD ALIGN=CENTER COLSPAN='4'><B>Project Status (08/27/2011 - 07:43:24)</B></TD></TR>
<TD ALIGN=CENTER COLSPAN='4'><B>Project Status (08/27/2011 - 12:37:45)</B></TD></TR>
<TR ALIGN=LEFT>
<TD BGCOLOR='#FFFF99'><B>Project File:</B></TD>
<TD>system.xmp</TD>
@ -19,7 +19,7 @@ No Errors</TD>
<TR ALIGN=LEFT>
<TD BGCOLOR='#FFFF99'><B>Product Version:</B></TD><TD>EDK 13.1</TD>
<TD BGCOLOR='#FFFF99'><UL><LI><B>Warnings:</B></LI></UL></TD>
<TD ALIGN=LEFT><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\_xmsgs/*.xmsgs?&DataKey=Warning'>238 Warnings (237 new)</A></TD>
<TD ALIGN=LEFT><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\_xmsgs/*.xmsgs?&DataKey=Warning'>238 Warnings (0 new)</A></TD>
</TR>
</TABLE>
@ -29,16 +29,23 @@ No Errors</TD>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='5'><B>XPS Reports</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=EDKReports"><B>[-]</B></a></TD></TR>
<TR BGCOLOR='#FFFF99'><TD><B>Report Name</B></TD><TD><B>Generated</B></TD>
<TD ALIGN=LEFT><B>Errors</B></TD><TD ALIGN=LEFT><B>Warnings</B></TD><TD ALIGN=LEFT COLSPAN='2'><B>Infos</B></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\platgen.log'>Platgen Log File</A></TD><TD>Fri 26. Aug 21:18:30 2011</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\__xps/ise/_xmsgs/platgen.xmsgs?&DataKey=Warning'>19 Warnings (19 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\__xps/ise/_xmsgs/platgen.xmsgs?&DataKey=Info'>35 Infos (35 new)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\platgen.log'>Platgen Log File</A></TD><TD>Sat 27. Aug 12:17:02 2011</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\__xps/ise/_xmsgs/platgen.xmsgs?&DataKey=Warning'>19 Warnings (18 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\__xps/ise/_xmsgs/platgen.xmsgs?&DataKey=Info'>34 Infos (32 new)</A></TD></TR>
<TR ALIGN=LEFT><TD>Libgen Log File</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD COLSPAN='2'>&nbsp;</TD></TR>
<TR ALIGN=LEFT><TD>Simgen Log File</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD COLSPAN='2'>&nbsp;</TD></TR>
<TR ALIGN=LEFT><TD>BitInit Log File</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD COLSPAN='2'>&nbsp;</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\system.log'>System Log File</A></TD><TD>Fri 26. Aug 21:36:10 2011</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD COLSPAN='2'>&nbsp;</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\system.log'>System Log File</A></TD><TD>Sat 27. Aug 12:34:09 2011</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD COLSPAN='2'>&nbsp;</TD></TR>
</TABLE>
&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='6'><B>XPS Synthesis Summary (estimated values)</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=EDKSynthesisSumary"><B>[-]</B></a></TD></TR>
<TR BGCOLOR='#FFFF99'><TD><B>Report</B></TD><TD><B>Generated</B></TD><TD><B>Flip Flops Used</B></TD><TD><B>LUTs Used</B></TD><TD><B>BRAMS Used</B></TD><TD COLSPAN='2'><B>Errors</B></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\system_xst.srp'>system</A></TD><TD>Fri 26. Aug 21:19:20 2011</TD><TD ALIGN=RIGHT>14696</TD><TD ALIGN=RIGHT>14249</TD><TD ALIGN=RIGHT>42</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\system_xst.srp'>system</A></TD><TD>Sat 27. Aug 12:17:50 2011</TD><TD ALIGN=RIGHT>14696</TD><TD ALIGN=RIGHT>14247</TD><TD ALIGN=RIGHT>14</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\mcb_ddr3_wrapper_xst.srp'>mcb_ddr3_wrapper</A></TD><TD>Sat 27. Aug 12:16:50 2011</TD><TD ALIGN=RIGHT>373</TD><TD ALIGN=RIGHT>690</TD><TD>&nbsp;</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\debug_module_wrapper_xst.srp'>debug_module_wrapper</A></TD><TD>Sat 27. Aug 12:16:27 2011</TD><TD ALIGN=RIGHT>131</TD><TD ALIGN=RIGHT>142</TD><TD>&nbsp;</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\clock_generator_0_wrapper_xst.srp'>clock_generator_0_wrapper</A></TD><TD>Sat 27. Aug 12:16:17 2011</TD><TD>&nbsp;</TD><TD ALIGN=RIGHT>1</TD><TD>&nbsp;</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\microblaze_0_bram_block_wrapper_xst.srp'>microblaze_0_bram_block_wrapper</A></TD><TD>Sat 27. Aug 12:16:12 2011</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD ALIGN=RIGHT>4</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\microblaze_0_d_bram_ctrl_wrapper_xst.srp'>microblaze_0_d_bram_ctrl_wrapper</A></TD><TD>Sat 27. Aug 12:16:06 2011</TD><TD ALIGN=RIGHT>2</TD><TD ALIGN=RIGHT>6</TD><TD>&nbsp;</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\microblaze_0_i_bram_ctrl_wrapper_xst.srp'>microblaze_0_i_bram_ctrl_wrapper</A></TD><TD>Sat 27. Aug 12:16:01 2011</TD><TD ALIGN=RIGHT>2</TD><TD ALIGN=RIGHT>6</TD><TD>&nbsp;</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\axi4lite_0_wrapper_xst.srp'>axi4lite_0_wrapper</A></TD><TD>Sat 27. Aug 12:15:55 2011</TD><TD ALIGN=RIGHT>2905</TD><TD ALIGN=RIGHT>1827</TD><TD>&nbsp;</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\axi_timer_0_wrapper_xst.srp'>axi_timer_0_wrapper</A></TD><TD>Fri 26. Aug 21:17:55 2011</TD><TD ALIGN=RIGHT>260</TD><TD ALIGN=RIGHT>272</TD><TD>&nbsp;</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\microblaze_0_intc_wrapper_xst.srp'>microblaze_0_intc_wrapper</A></TD><TD>Fri 26. Aug 21:17:45 2011</TD><TD ALIGN=RIGHT>86</TD><TD ALIGN=RIGHT>115</TD><TD>&nbsp;</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\ethernet_dma_wrapper_xst.srp'>ethernet_dma_wrapper</A></TD><TD>Fri 26. Aug 21:17:37 2011</TD><TD ALIGN=RIGHT>3728</TD><TD ALIGN=RIGHT>3798</TD><TD>&nbsp;</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
@ -55,20 +62,13 @@ No Errors</TD>
<TR ALIGN=LEFT><TD>ethernet_wrapper_blk_mem_gen_v5_2_1_blk_mem_gen_v5_2_xst_1</TD><TD>Fri 26. Aug 21:07:03 2011</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD ALIGN=RIGHT>2</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD>ethernet_wrapper_blk_mem_gen_v5_2_4_blk_mem_gen_v5_2_xst_1</TD><TD>Fri 26. Aug 21:06:36 2011</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD ALIGN=RIGHT>1</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD>ethernet_wrapper_blk_mem_gen_v5_2_3_blk_mem_gen_v5_2_xst_1</TD><TD>Fri 26. Aug 21:06:10 2011</TD><TD ALIGN=RIGHT>2</TD><TD ALIGN=RIGHT>49</TD><TD ALIGN=RIGHT>2</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\mcb_ddr3_wrapper_xst.srp'>mcb_ddr3_wrapper</A></TD><TD>Fri 26. Aug 21:04:44 2011</TD><TD ALIGN=RIGHT>373</TD><TD ALIGN=RIGHT>691</TD><TD>&nbsp;</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\push_buttons_4bits_wrapper_xst.srp'>push_buttons_4bits_wrapper</A></TD><TD>Fri 26. Aug 21:04:24 2011</TD><TD ALIGN=RIGHT>72</TD><TD ALIGN=RIGHT>85</TD><TD>&nbsp;</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\leds_4bits_wrapper_xst.srp'>leds_4bits_wrapper</A></TD><TD>Fri 26. Aug 21:04:14 2011</TD><TD ALIGN=RIGHT>33</TD><TD ALIGN=RIGHT>41</TD><TD>&nbsp;</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\rs232_uart_1_wrapper_xst.srp'>rs232_uart_1_wrapper</A></TD><TD>Fri 26. Aug 21:04:05 2011</TD><TD ALIGN=RIGHT>84</TD><TD ALIGN=RIGHT>102</TD><TD>&nbsp;</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\debug_module_wrapper_xst.srp'>debug_module_wrapper</A></TD><TD>Fri 26. Aug 21:03:57 2011</TD><TD ALIGN=RIGHT>131</TD><TD ALIGN=RIGHT>142</TD><TD>&nbsp;</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\clock_generator_0_wrapper_xst.srp'>clock_generator_0_wrapper</A></TD><TD>Fri 26. Aug 21:03:48 2011</TD><TD>&nbsp;</TD><TD ALIGN=RIGHT>1</TD><TD>&nbsp;</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\proc_sys_reset_0_wrapper_xst.srp'>proc_sys_reset_0_wrapper</A></TD><TD>Fri 26. Aug 21:03:43 2011</TD><TD ALIGN=RIGHT>69</TD><TD ALIGN=RIGHT>55</TD><TD>&nbsp;</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\microblaze_0_bram_block_wrapper_xst.srp'>microblaze_0_bram_block_wrapper</A></TD><TD>Fri 26. Aug 21:03:37 2011</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD ALIGN=RIGHT>32</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\microblaze_0_d_bram_ctrl_wrapper_xst.srp'>microblaze_0_d_bram_ctrl_wrapper</A></TD><TD>Fri 26. Aug 21:03:30 2011</TD><TD ALIGN=RIGHT>2</TD><TD ALIGN=RIGHT>6</TD><TD>&nbsp;</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\microblaze_0_i_bram_ctrl_wrapper_xst.srp'>microblaze_0_i_bram_ctrl_wrapper</A></TD><TD>Fri 26. Aug 21:03:25 2011</TD><TD ALIGN=RIGHT>2</TD><TD ALIGN=RIGHT>6</TD><TD>&nbsp;</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\microblaze_0_dlmb_wrapper_xst.srp'>microblaze_0_dlmb_wrapper</A></TD><TD>Fri 26. Aug 21:03:19 2011</TD><TD ALIGN=RIGHT>1</TD><TD ALIGN=RIGHT>1</TD><TD>&nbsp;</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\microblaze_0_ilmb_wrapper_xst.srp'>microblaze_0_ilmb_wrapper</A></TD><TD>Fri 26. Aug 21:03:15 2011</TD><TD ALIGN=RIGHT>1</TD><TD ALIGN=RIGHT>1</TD><TD>&nbsp;</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\microblaze_0_wrapper_xst.srp'>microblaze_0_wrapper</A></TD><TD>Fri 26. Aug 21:03:10 2011</TD><TD ALIGN=RIGHT>1301</TD><TD ALIGN=RIGHT>1703</TD><TD>&nbsp;</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\axi4lite_0_wrapper_xst.srp'>axi4lite_0_wrapper</A></TD><TD>Fri 26. Aug 21:02:41 2011</TD><TD ALIGN=RIGHT>2905</TD><TD ALIGN=RIGHT>1828</TD><TD>&nbsp;</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\axi4_0_wrapper_xst.srp'>axi4_0_wrapper</A></TD><TD>Fri 26. Aug 21:02:14 2011</TD><TD ALIGN=RIGHT>1488</TD><TD ALIGN=RIGHT>1083</TD><TD>&nbsp;</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD>axi4_0_wrapper_FIFO_GENERATOR_V8_1_2_fifo_generator_v8_1_xst_1</TD><TD>Fri 26. Aug 21:01:57 2011</TD><TD ALIGN=RIGHT>90</TD><TD ALIGN=RIGHT>97</TD><TD ALIGN=RIGHT>2</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD>axi4_0_wrapper_FIFO_GENERATOR_V8_1_1_fifo_generator_v8_1_xst_1</TD><TD>Fri 26. Aug 21:00:49 2011</TD><TD ALIGN=RIGHT>89</TD><TD ALIGN=RIGHT>96</TD><TD ALIGN=RIGHT>1</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
@ -109,31 +109,31 @@ No Errors</TD>
<TD COLSPAN='2'>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of Slice LUTs</TD>
<TD ALIGN=RIGHT>10,973</TD>
<TD ALIGN=RIGHT>10,940</TD>
<TD ALIGN=RIGHT>27,288</TD>
<TD ALIGN=RIGHT>40%</TD>
<TD COLSPAN='2'>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>&nbsp;&nbsp;&nbsp;&nbsp;Number used as logic</TD>
<TD ALIGN=RIGHT>9,641</TD>
<TD ALIGN=RIGHT>9,639</TD>
<TD ALIGN=RIGHT>27,288</TD>
<TD ALIGN=RIGHT>35%</TD>
<TD COLSPAN='2'>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;Number using O6 output only</TD>
<TD ALIGN=RIGHT>6,887</TD>
<TD ALIGN=RIGHT>6,889</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
<TD COLSPAN='2'>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;Number using O5 output only</TD>
<TD ALIGN=RIGHT>261</TD>
<TD ALIGN=RIGHT>260</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
<TD COLSPAN='2'>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;Number using O5 and O6</TD>
<TD ALIGN=RIGHT>2,493</TD>
<TD ALIGN=RIGHT>2,490</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
<TD COLSPAN='2'>&nbsp;</TD>
@ -223,13 +223,13 @@ No Errors</TD>
<TD COLSPAN='2'>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>&nbsp;&nbsp;&nbsp;&nbsp;Number used exclusively as route-thrus</TD>
<TD ALIGN=RIGHT>639</TD>
<TD ALIGN=RIGHT>608</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
<TD COLSPAN='2'>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;Number with same-slice register load</TD>
<TD ALIGN=RIGHT>597</TD>
<TD ALIGN=RIGHT>566</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
<TD COLSPAN='2'>&nbsp;</TD>
@ -247,33 +247,33 @@ No Errors</TD>
<TD COLSPAN='2'>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of occupied Slices</TD>
<TD ALIGN=RIGHT>4,520</TD>
<TD ALIGN=RIGHT>4,589</TD>
<TD ALIGN=RIGHT>6,822</TD>
<TD ALIGN=RIGHT>66%</TD>
<TD ALIGN=RIGHT>67%</TD>
<TD COLSPAN='2'>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of LUT Flip Flop pairs used</TD>
<TD ALIGN=RIGHT>13,731</TD>
<TD ALIGN=RIGHT>13,843</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
<TD COLSPAN='2'>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>&nbsp;&nbsp;&nbsp;&nbsp;Number with an unused Flip Flop</TD>
<TD ALIGN=RIGHT>3,686</TD>
<TD ALIGN=RIGHT>13,731</TD>
<TD ALIGN=RIGHT>26%</TD>
<TD ALIGN=RIGHT>3,765</TD>
<TD ALIGN=RIGHT>13,843</TD>
<TD ALIGN=RIGHT>27%</TD>
<TD COLSPAN='2'>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>&nbsp;&nbsp;&nbsp;&nbsp;Number with an unused LUT</TD>
<TD ALIGN=RIGHT>2,758</TD>
<TD ALIGN=RIGHT>13,731</TD>
<TD ALIGN=RIGHT>2,903</TD>
<TD ALIGN=RIGHT>13,843</TD>
<TD ALIGN=RIGHT>20%</TD>
<TD COLSPAN='2'>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>&nbsp;&nbsp;&nbsp;&nbsp;Number of fully used LUT-FF pairs</TD>
<TD ALIGN=RIGHT>7,287</TD>
<TD ALIGN=RIGHT>13,731</TD>
<TD ALIGN=RIGHT>53%</TD>
<TD ALIGN=RIGHT>7,175</TD>
<TD ALIGN=RIGHT>13,843</TD>
<TD ALIGN=RIGHT>51%</TD>
<TD COLSPAN='2'>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>&nbsp;&nbsp;&nbsp;&nbsp;Number of unique control sets</TD>
@ -307,9 +307,9 @@ No Errors</TD>
<TD COLSPAN='2'>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of RAMB16BWERs</TD>
<TD ALIGN=RIGHT>40</TD>
<TD ALIGN=RIGHT>12</TD>
<TD ALIGN=RIGHT>116</TD>
<TD ALIGN=RIGHT>34%</TD>
<TD ALIGN=RIGHT>10%</TD>
<TD COLSPAN='2'>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of RAMB8BWERs</TD>
@ -511,7 +511,7 @@ No Errors</TD>
<TD COLSPAN='2'>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Average Fanout of Non-Clock Nets</TD>
<TD ALIGN=RIGHT>3.95</TD>
<TD ALIGN=RIGHT>3.89</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
<TD COLSPAN='2'>&nbsp;</TD>
@ -548,18 +548,18 @@ No Errors</TD>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='6'><B>Detailed Reports</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=DetailedReports"><B>[-]</B></a></TD></TR>
<TR BGCOLOR='#FFFF99'><TD><B>Report Name</B></TD><TD><B>Status</B></TD><TD><B>Generated</B></TD>
<TD ALIGN=LEFT><B>Errors</B></TD><TD ALIGN=LEFT><B>Warnings</B></TD><TD ALIGN=LEFT COLSPAN='2'><B>Infos</B></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\system.bld'>Translation Report</A></TD><TD>Current</TD><TD>Fri 26. Aug 21:20:32 2011</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\_xmsgs/ngdbuild.xmsgs?&DataKey=Warning'>87 Warnings (86 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\_xmsgs/ngdbuild.xmsgs?&DataKey=Info'>13 Infos (13 new)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\system_map.mrp'>Map Report</A></TD><TD>Current</TD><TD>Fri 26. Aug 21:30:17 2011</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\_xmsgs/map.xmsgs?&DataKey=Warning'>50 Warnings (50 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\_xmsgs/map.xmsgs?&DataKey=Info'>1134 Infos (1134 new)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\system.par'>Place and Route Report</A></TD><TD>Current</TD><TD>Fri 26. Aug 21:33:52 2011</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\_xmsgs/par.xmsgs?&DataKey=Warning'>51 Warnings (51 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\_xmsgs/par.xmsgs?&DataKey=Info'>3 Infos (3 new)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\system.twr'>Post-PAR Static Timing Report</A></TD><TD>Current</TD><TD>Fri 26. Aug 21:34:50 2011</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\_xmsgs/trce.xmsgs?&DataKey=Warning'>3 Warnings (3 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\_xmsgs/trce.xmsgs?&DataKey=Info'>3 Infos (3 new)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\system.bgn'>Bitgen Report</A></TD><TD>Current</TD><TD>Fri 26. Aug 21:36:07 2011</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\_xmsgs/bitgen.xmsgs?&DataKey=Warning'>47 Warnings (47 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\system.bld'>Translation Report</A></TD><TD>Current</TD><TD>Sat 27. Aug 12:19:05 2011</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\_xmsgs/ngdbuild.xmsgs?&DataKey=Warning'>87 Warnings (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\_xmsgs/ngdbuild.xmsgs?&DataKey=Info'>13 Infos (8 new)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\system_map.mrp'>Map Report</A></TD><TD>Current</TD><TD>Sat 27. Aug 12:28:13 2011</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\_xmsgs/map.xmsgs?&DataKey=Warning'>50 Warnings (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\_xmsgs/map.xmsgs?&DataKey=Info'>1134 Infos (0 new)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\system.par'>Place and Route Report</A></TD><TD>Current</TD><TD>Sat 27. Aug 12:31:43 2011</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\_xmsgs/par.xmsgs?&DataKey=Warning'>51 Warnings (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\_xmsgs/par.xmsgs?&DataKey=Info'>3 Infos (0 new)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\system.twr'>Post-PAR Static Timing Report</A></TD><TD>Current</TD><TD>Sat 27. Aug 12:32:50 2011</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\_xmsgs/trce.xmsgs?&DataKey=Warning'>3 Warnings (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\_xmsgs/trce.xmsgs?&DataKey=Info'>3 Infos (0 new)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\system.bgn'>Bitgen Report</A></TD><TD>Current</TD><TD>Sat 27. Aug 12:34:09 2011</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\_xmsgs/bitgen.xmsgs?&DataKey=Warning'>47 Warnings (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR>
</TABLE>
&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='3'><B>Secondary Reports</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=SecondaryReports"><B>[-]</B></a></TD></TR>
<TR BGCOLOR='#FFFF99'><TD><B>Report Name</B></TD><TD><B>Status</B></TD><TD COLSPAN='2'><B>Generated</B></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\webtalk.log'>WebTalk Log File</A></TD><TD>Current</TD><TD COLSPAN='2'>Fri 26. Aug 21:36:10 2011</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\webtalk.log'>WebTalk Log File</A></TD><TD>Current</TD><TD COLSPAN='2'>Sat 27. Aug 12:34:09 2011</TD></TR>
</TABLE>
<br><center><b>Date Generated:</b> 08/27/2011 - 07:43:25</center>
<br><center><b>Date Generated:</b> 08/27/2011 - 12:37:46</center>
</BODY></HTML>

12
Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/system.mhs
View file

@ -126,7 +126,7 @@ BEGIN lmb_bram_if_cntlr
PARAMETER INSTANCE = microblaze_0_i_bram_ctrl
PARAMETER HW_VER = 3.00.a
PARAMETER C_BASEADDR = 0x00000000
PARAMETER C_HIGHADDR = 0x0000ffff
PARAMETER C_HIGHADDR = 0x00001FFF
BUS_INTERFACE SLMB = microblaze_0_ilmb
BUS_INTERFACE BRAM_PORT = microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block
END
@ -135,7 +135,7 @@ BEGIN lmb_bram_if_cntlr
PARAMETER INSTANCE = microblaze_0_d_bram_ctrl
PARAMETER HW_VER = 3.00.a
PARAMETER C_BASEADDR = 0x00000000
PARAMETER C_HIGHADDR = 0x0000ffff
PARAMETER C_HIGHADDR = 0x00001FFF
BUS_INTERFACE SLMB = microblaze_0_dlmb
BUS_INTERFACE BRAM_PORT = microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block
END
@ -201,7 +201,7 @@ BEGIN mdm
PARAMETER C_INTERCONNECT_S_AXI_R_REGISTER = 1
PARAMETER C_INTERCONNECT_S_AXI_B_REGISTER = 1
PARAMETER C_BASEADDR = 0x74800000
PARAMETER C_HIGHADDR = 0x7480ffff
PARAMETER C_HIGHADDR = 0x748FFFFF
BUS_INTERFACE S_AXI = axi4lite_0
BUS_INTERFACE MBDEBUG_0 = microblaze_0_debug
PORT S_AXI_ACLK = clk_50_0000MHzPLL0
@ -273,12 +273,7 @@ BEGIN axi_s6_ddrx
PARAMETER HW_VER = 1.02.a
PARAMETER C_MCB_RZQ_LOC = K7
PARAMETER C_MCB_ZIO_LOC = R7
PARAMETER C_MEM_TYPE = DDR3
PARAMETER C_MEM_PARTNO = MT41J64M16XX-187E
PARAMETER C_MEM_BANKADDR_WIDTH = 3
PARAMETER C_MEM_NUM_COL_BITS = 10
PARAMETER C_SKIP_IN_TERM_CAL = 0
PARAMETER C_S0_AXI_ENABLE = 1
PARAMETER C_INTERCONNECT_S0_AXI_MASTERS = ETHERNET_dma.M_AXI_SG & ETHERNET_dma.M_AXI_MM2S & ETHERNET_dma.M_AXI_S2MM
PARAMETER C_INTERCONNECT_S0_AXI_AW_REGISTER = 1
PARAMETER C_INTERCONNECT_S0_AXI_AR_REGISTER = 1
@ -287,6 +282,7 @@ BEGIN axi_s6_ddrx
PARAMETER C_INTERCONNECT_S0_AXI_B_REGISTER = 1
PARAMETER C_S0_AXI_BASEADDR = 0x80000000
PARAMETER C_S0_AXI_HIGHADDR = 0x87ffffff
PARAMETER C_S0_AXI_STRICT_COHERENCY = 0
BUS_INTERFACE S0_AXI = axi4_0
PORT mcbx_dram_clk = mcbx_dram_clk
PORT mcbx_dram_clk_n = mcbx_dram_clk_n