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Replace portasmHAS_CLINT with configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS definitions in the GCC RISC-V port - portasmHAS_CLIT will still work by deriving the new definitions from the old.
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@ -59,7 +59,7 @@
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#ifndef __FREERTOS_RISC_V_EXTENSIONS_H__
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#define __FREERTOS_RISC_V_EXTENSIONS_H__
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#define portasmHAS_CLINT 0
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#define portasmHAS_MTIME 0
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/* Constants to define the additional registers found on the Pulpino RI5KY. */
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#define lpstart0 0x7b0
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@ -53,7 +53,7 @@
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#ifndef __FREERTOS_RISC_V_EXTENSIONS_H__
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#define __FREERTOS_RISC_V_EXTENSIONS_H__
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#define portasmHAS_CLINT 1
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#define portasmHAS_MTIME 1
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#define portasmADDITIONAL_CONTEXT_SIZE 0 /* Must be even number on 32-bit cores. */
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.macro portasmSAVE_ADDITIONAL_REGISTERS
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@ -37,8 +37,16 @@
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/* Standard includes. */
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#include "string.h"
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#ifndef configCLINT_BASE_ADDRESS
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#warning configCLINT_BASE_ADDRESS must be defined in FreeRTOSConfig.h. If the target chip includes a Core Local Interrupter (CLINT) then set configCLINT_BASE_ADDRESS to the CLINT base address. Otherwise set configCLINT_BASE_ADDRESS to 0.
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#ifdef configCLINT_BASE_ADDRESS
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#warning The configCLINT_BASE_ADDRESS constant has been deprecated. configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS are currently being derived from configCLINT_BASE_ADDRESS. Please update to define configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS dirctly in place of configCLINT_BASE_ADDRESS.
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#endif
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#ifndef configMTIME_BASE_ADDRESS
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#warning configMTIME_BASE_ADDRESS must be defined in FreeRTOSConfig.h. If the target chip includes a memory-mapped mtime register then set configMTIME_BASE_ADDRESS to the mapped address. Otherwise set configMTIME_BASE_ADDRESS to 0.
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#endif
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#ifndef configMTIMECMP_BASE_ADDRESS
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#warning configMTIMECMP_BASE_ADDRESS must be defined in FreeRTOSConfig.h. If the target chip includes a memory-mapped mtimecmp register then set configMTIMECMP_BASE_ADDRESS to the mapped address. Otherwise set configMTIMECMP_BASE_ADDRESS to 0.
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#endif
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/* Let the user override the pre-loading of the initial LR with the address of
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@ -83,7 +91,7 @@ void vPortSetupTimerInterrupt( void ) __attribute__(( weak ));
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uint64_t ullNextTime = 0ULL;
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const uint64_t *pullNextTime = &ullNextTime;
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const size_t uxTimerIncrementsForOneTick = ( size_t ) ( ( configCPU_CLOCK_HZ ) / ( configTICK_RATE_HZ ) ); /* Assumes increment won't go over 32-bits. */
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uint32_t const ullMachineTimerCompareRegisterBase = ( uint64_t const ) ( ( configCLINT_BASE_ADDRESS ) + 0x4000 );
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uint32_t const ullMachineTimerCompareRegisterBase = configMTIMECMP_BASE_ADDRESS;
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volatile uint64_t * pullMachineTimerCompareRegister = NULL;
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/* Set configCHECK_FOR_STACK_OVERFLOW to 3 to add ISR stack checking to task
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@ -108,13 +116,13 @@ task stack, not the ISR stack). */
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/*-----------------------------------------------------------*/
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#if( configCLINT_BASE_ADDRESS != 0 )
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#if( configMTIME_BASE_ADDRESS != 0 ) && ( configMTIMECMP_BASE_ADDRESS != 0 )
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void vPortSetupTimerInterrupt( void )
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{
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uint32_t ulCurrentTimeHigh, ulCurrentTimeLow;
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volatile uint32_t * const pulTimeHigh = ( volatile uint32_t * const ) ( configCLINT_BASE_ADDRESS + 0xBFFC );
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volatile uint32_t * const pulTimeLow = ( volatile uint32_t * const ) ( configCLINT_BASE_ADDRESS + 0xBFF8 );
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volatile uint32_t * const pulTimeHigh = ( volatile uint32_t * const ) ( ( configMTIME_BASE_ADDRESS ) + 4UL ); /* 8-byte typer so high 32-bit word is 4 bytes up. */
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volatile uint32_t * const pulTimeLow = ( volatile uint32_t * const ) ( configMTIME_BASE_ADDRESS );
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volatile uint32_t ulHartId;
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__asm volatile( "csrr %0, mhartid" : "=r"( ulHartId ) );
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@ -127,7 +135,7 @@ task stack, not the ISR stack). */
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} while( ulCurrentTimeHigh != *pulTimeHigh );
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ullNextTime = ( uint64_t ) ulCurrentTimeHigh;
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ullNextTime <<= 32ULL;
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ullNextTime <<= 32ULL; /* High 4-byte word is 32-bits up. */
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ullNextTime |= ( uint64_t ) ulCurrentTimeLow;
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ullNextTime += ( uint64_t ) uxTimerIncrementsForOneTick;
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*pullMachineTimerCompareRegister = ullNextTime;
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@ -136,7 +144,7 @@ task stack, not the ISR stack). */
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ullNextTime += ( uint64_t ) uxTimerIncrementsForOneTick;
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}
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#endif /* ( configCLINT_BASE_ADDRESS != 0 ) */
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#endif /* ( configMTIME_BASE_ADDRESS != 0 ) && ( configMTIME_BASE_ADDRESS != 0 ) */
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/*-----------------------------------------------------------*/
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BaseType_t xPortStartScheduler( void )
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@ -170,7 +178,7 @@ extern void xPortStartFirstTask( void );
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configure whichever clock is to be used to generate the tick interrupt. */
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vPortSetupTimerInterrupt();
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#if( configCLINT_BASE_ADDRESS != 0 )
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#if( ( configMTIME_BASE_ADDRESS != 0 ) && ( configMTIMECMP_BASE_ADDRESS != 0 ) )
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{
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/* Enable mtime and external interrupts. 1<<7 for timer interrupt, 1<<11
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for external interrupt. _RB_ What happens here when mtime is not present as
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@ -182,7 +190,7 @@ extern void xPortStartFirstTask( void );
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/* Enable external interrupts. */
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__asm volatile( "csrs mie, %0" :: "r"(0x800) );
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}
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#endif /* configCLINT_BASE_ADDRESS */
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#endif /* ( configMTIME_BASE_ADDRESS != 0 ) && ( configMTIMECMP_BASE_ADDRESS != 0 ) */
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xPortStartFirstTask();
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@ -71,8 +71,17 @@
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/* Check the freertos_risc_v_chip_specific_extensions.h and/or command line
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definitions. */
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#ifndef portasmHAS_CLINT
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#error freertos_risc_v_chip_specific_extensions.h must define portasmHAS_CLINT to either 1 (CLINT present) or 0 (clint not present).
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#if defined( portasmHAS_CLINT ) && defined( portasmHAS_MTIME )
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#error The portasmHAS_CLINT constant has been depracted. Please replace it with portasmHAS_CLINT. portasmHAS_CLINT and portasmHAS_MTIME cannot both be defined at once.
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#endif
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#ifdef portasmHAS_CLINT
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#warning The portasmHAS_CLINT constant has been depracted. Please replace it with portasmHAS_CLINT. For now portasmHAS_MTIME is derived from portasmHAS_CLINT.
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#define portasmHAS_MTIME portasmHAS_CLINT
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#endif
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#ifndef portasmHAS_MTIME
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#error freertos_risc_v_chip_specific_extensions.h must define portasmHAS_MTIME to either 1 (MTIME clock present) or 0 (MTIME clock not present).
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#endif
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#ifndef portasmHANDLE_INTERRUPT
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@ -153,7 +162,7 @@ test_if_asynchronous:
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handle_asynchronous:
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#if( portasmHAS_CLINT != 0 )
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#if( portasmHAS_MTIME != 0 )
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test_if_mtimer: /* If there is a CLINT then the mtimer is used to generate the tick interrupt. */
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@ -205,7 +214,7 @@ handle_asynchronous:
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addi t1, t1, 4 /* 0x80000007 + 4 = 0x8000000b == Machine external interrupt. */
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bne a0, t1, as_yet_unhandled /* Something as yet unhandled. */
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#endif /* portasmHAS_CLINT */
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#endif /* portasmHAS_MTIME */
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load_x sp, xISRStackTop /* Switch to ISR stack before function call. */
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jal portasmHANDLE_INTERRUPT /* Jump to the interrupt handler if there is no CLINT or if there is a CLINT and it has been determined that an external interrupt is pending. */
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@ -284,7 +293,7 @@ processed_source:
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.func
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xPortStartFirstTask:
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#if( portasmHAS_CLINT != 0 )
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#if( portasmHAS_MTIME != 0 )
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/* If there is a clint then interrupts can branch directly to the FreeRTOS
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trap handler. Otherwise the interrupt controller will need to be configured
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outside of this file. */
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@ -153,6 +153,21 @@ not necessary for to use this port. They are defined so the common demo files
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#endif
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#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )
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/*-----------------------------------------------------------*/
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/* configCLINT_BASE_ADDRESS is a legacy definition that was replaced by the
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configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS definitions. For
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backward compatibility derive the newer definitions from the old if the old
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definition is found. */
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#if defined( configCLINT_BASE_ADDRESS ) && !defined( configMTIME_BASE_ADDRESS )
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#define configMTIME_BASE_ADDRESS ( ( configCLINT_BASE_ADDRESS ) + 0xBFF8UL )
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#define configMTIMECMP_BASE_ADDRESS ( ( configCLINT_BASE_ADDRESS ) + 0x4000UL )
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#elif !defined( configMTIME_BASE_ADDRESS ) || !defined( configMTIMECMP_BASE_ADDRESS )
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#error configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS must be defined in FreeRTOSConfig.h. See https://www.freertos.org/Using-FreeRTOS-on-RISC-V.html
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#endif
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#ifdef __cplusplus
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}
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