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Update the Red Suite LPC1768 project and source to use the latest version of the tools.

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This commit is contained in:
Richard Barry 2010-11-25 13:21:39 +00:00
parent 19cdcbd681
commit 1677ec5c60
8 changed files with 190 additions and 169 deletions
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38
Demo/CORTEX_LPC1768_GCC_RedSuite/.cproject
View file

@ -30,6 +30,7 @@
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<listOptionValue builtIn="false" value="ALIGN_STRUCT_END=__attribute\(\(aligned\(4\)\)\)"/>
<listOptionValue builtIn="false" value="__CODE_RED"/>
<listOptionValue builtIn="false" value="__REDLIB__"/>
</option>
<option id="gnu.c.compiler.option.misc.other.644577272" name="Other flags" superClass="gnu.c.compiler.option.misc.other" value="-c -fmessage-length=0 -fno-builtin -ffunction-sections -Wextra" valueType="string"/>
<option id="gnu.c.compiler.option.preprocessor.nostdinc.242908842" name="Do not search system directories (-nostdinc)" superClass="gnu.c.compiler.option.preprocessor.nostdinc"/>
@ -67,15 +68,15 @@
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<option id="com.crt.advproject.gas.thumb.1906562556" name="Thumb mode" superClass="com.crt.advproject.gas.thumb" value="true" valueType="boolean"/>
<option id="gnu.both.asm.option.flags.crt.638939077" name="Assembler flags" superClass="gnu.both.asm.option.flags.crt" value="-c -x assembler-with-cpp -DDEBUG -D__CODE_RED" valueType="string"/>
<option id="gnu.both.asm.option.flags.crt.638939077" name="Assembler flags" superClass="gnu.both.asm.option.flags.crt" value="-c -x assembler-with-cpp -DDEBUG -D__CODE_RED -D__REDLIB__ " valueType="string"/>
<inputType id="com.crt.advproject.assembler.input.1954791986" name="Additional Assembly Source Files" superClass="com.crt.advproject.assembler.input"/>
</tool>
<tool id="com.crt.advproject.link.cpp.exe.debug.696640668" name="MCU C++ Linker" superClass="com.crt.advproject.link.cpp.exe.debug"/>
<tool id="com.crt.advproject.link.exe.debug.1514106711" name="MCU Linker" superClass="com.crt.advproject.link.exe.debug">
<option id="com.crt.advproject.link.arch.420484637" name="Architecture" superClass="com.crt.advproject.link.arch" value="com.crt.advproject.link.target.cm3" valueType="enumerated"/>
<option id="com.crt.advproject.link.thumb.1827721661" name="Thumb mode" superClass="com.crt.advproject.link.thumb" value="true" valueType="boolean"/>
<option id="com.crt.advproject.link.script.285435470" name="Linker script" superClass="com.crt.advproject.link.script" value="&quot;${workspace_loc:/RTOSDemo_RDB1768/src/rtosdemo_rdb1768_Debug.ld}&quot;" valueType="string"/>
<option id="com.crt.advproject.link.manage.913993351" name="Manage linker script" superClass="com.crt.advproject.link.manage" value="false" valueType="boolean"/>
<option id="com.crt.advproject.link.script.285435470" name="Linker script" superClass="com.crt.advproject.link.script" value="RTOSDemo_RDB1768.ld" valueType="string"/>
<option id="com.crt.advproject.link.manage.913993351" name="Manage linker script" superClass="com.crt.advproject.link.manage" value="true" valueType="boolean"/>
<option id="gnu.c.link.option.nostdlibs.1027293252" name="No startup or default libs (-nostdlib)" superClass="gnu.c.link.option.nostdlibs" value="true" valueType="boolean"/>
<option id="gnu.c.link.option.other.762506621" name="Other options (-Xlinker [option])" superClass="gnu.c.link.option.other" valueType="stringList">
<listOptionValue builtIn="false" value="--gc-sections"/>
@ -450,6 +451,7 @@
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
<storageModule moduleId="org.eclipse.cdt.core.language.mapping"/>
<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
</cconfiguration>
<cconfiguration id="com.crt.advproject.config.exe.release.429003282">
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.crt.advproject.config.exe.release.429003282" moduleId="org.eclipse.cdt.core.settings" name="Release">
@ -476,6 +478,7 @@
<option id="gnu.c.compiler.option.preprocessor.def.symbols.1242089509" name="Defined symbols (-D)" superClass="gnu.c.compiler.option.preprocessor.def.symbols" valueType="definedSymbols">
<listOptionValue builtIn="false" value="NDEBUG"/>
<listOptionValue builtIn="false" value="__CODE_RED"/>
<listOptionValue builtIn="false" value="__REDLIB__"/>
</option>
<option id="gnu.c.compiler.option.misc.other.1084357971" name="Other flags" superClass="gnu.c.compiler.option.misc.other" value="-c -fmessage-length=0 -fno-builtin -ffunction-sections" valueType="string"/>
<inputType id="com.crt.advproject.compiler.input.1760064385" superClass="com.crt.advproject.compiler.input"/>
@ -483,7 +486,7 @@
<tool id="com.crt.advproject.gas.exe.release.340210131" name="MCU Assembler" superClass="com.crt.advproject.gas.exe.release">
<option id="com.crt.advproject.gas.arch.1089759047" name="Architecture" superClass="com.crt.advproject.gas.arch" value="com.crt.advproject.gas.target.cm3" valueType="enumerated"/>
<option id="com.crt.advproject.gas.thumb.147071109" name="Thumb mode" superClass="com.crt.advproject.gas.thumb" value="true" valueType="boolean"/>
<option id="gnu.both.asm.option.flags.crt.2019607838" name="Assembler flags" superClass="gnu.both.asm.option.flags.crt" value="-c -x assembler-with-cpp -DNDEBUG -D__CODE_RED" valueType="string"/>
<option id="gnu.both.asm.option.flags.crt.2019607838" name="Assembler flags" superClass="gnu.both.asm.option.flags.crt" value="-c -x assembler-with-cpp -DNDEBUG -D__CODE_RED -D__REDLIB__ " valueType="string"/>
<inputType id="com.crt.advproject.assembler.input.1748919550" name="Additional Assembly Source Files" superClass="com.crt.advproject.assembler.input"/>
</tool>
<tool id="com.crt.advproject.link.cpp.exe.release.116216997" name="MCU C++ Linker" superClass="com.crt.advproject.link.cpp.exe.release"/>
@ -851,6 +854,7 @@
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
<storageModule moduleId="org.eclipse.cdt.core.language.mapping"/>
<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
</cconfiguration>
</storageModule>
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
@ -860,7 +864,10 @@
<projectStorage>&lt;?xml version="1.0" encoding="UTF-8"?&gt;&#13;
&lt;TargetConfig&gt;&#13;
&lt;Properties property_0="" property_1="" property_2="" property_3="NXP" property_4="LPC1768" property_count="5" version="1"/&gt;&#13;
&lt;infoList vendor="NXP"&gt;&lt;info chip="LPC1768" match_id="0x00013f37,0x26013F37" name="LPC1768" package="lpc17_lqfp100.xml"&gt;&lt;chip&gt;&lt;name&gt;LPC1768&lt;/name&gt;&#13;
&lt;infoList vendor="NXP"&gt;&#13;
&lt;info chip="LPC1768" match_id="0x00013f37,0x26013F37" name="LPC1768" package="lpc17_lqfp100.xml"&gt;&#13;
&lt;chip&gt;&#13;
&lt;name&gt;LPC1768&lt;/name&gt;&#13;
&lt;family&gt;LPC17xx&lt;/family&gt;&#13;
&lt;vendor&gt;NXP (formerly Philips)&lt;/vendor&gt;&#13;
&lt;reset board="None" core="Real" sys="Real"/&gt;&#13;
@ -873,7 +880,7 @@
&lt;memoryInstance derived_from="RAM" id="RamAHB32" location="0x2007c000" size="0x8000"/&gt;&#13;
&lt;prog_flash blocksz="0x1000" location="0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x10000"/&gt;&#13;
&lt;prog_flash blocksz="0x8000" location="0x10000" maxprgbuff="0x1000" progwithcode="TRUE" size="0x70000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_NVIC" determined="infoFile" id="NVIC" location="0xE000E000"/&gt;&#13;
&lt;peripheralInstance derived_from="SVD_NVIC" determined="infoFile" id="NVIC" location="0xE000E000"/&gt;&#13;
&lt;peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM0&amp;amp;0x1" id="TIMER0" location="0x40004000"/&gt;&#13;
&lt;peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM1&amp;amp;0x1" id="TIMER1" location="0x40008000"/&gt;&#13;
&lt;peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM2&amp;amp;0x1" id="TIMER2" location="0x40090000"/&gt;&#13;
@ -886,10 +893,10 @@
&lt;peripheralInstance derived_from="LPC17_I2S" determined="infoFile" enable="SYSCTL.PCONP&amp;amp;0x08000000" id="I2S" location="0x400A8000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_SYSCTL" determined="infoFile" id="SYSCTL" location="0x400FC000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_DAC" determined="infoFile" enable="PCB.PINSEL1.P0_26&amp;amp;0x2=2" id="DAC" location="0x4008C000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC1xxx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART0&amp;amp;0x1" id="UART0" location="0x4000C000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC1xxx_UART_MODEM" determined="infoFile" enable="SYSCTL.PCONP.PCUART1&amp;amp;0x1" id="UART1" location="0x40010000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC1xxx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART2&amp;amp;0x1" id="UART2" location="0x40098000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC1xxx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCAURT3&amp;amp;0x1" id="UART3" location="0x4009C000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART0&amp;amp;0x1" id="UART0" location="0x4000C000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17xx_UART_MODEM" determined="infoFile" enable="SYSCTL.PCONP.PCUART1&amp;amp;0x1" id="UART1" location="0x40010000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART2&amp;amp;0x1" id="UART2" location="0x40098000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART3&amp;amp;0x1" id="UART3" location="0x4009C000"/&gt;&#13;
&lt;peripheralInstance derived_from="SPI" determined="infoFile" enable="SYSCTL.PCONP.PCSPI&amp;amp;0x1" id="SPI" location="0x40020000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP0&amp;amp;0x1" id="SSP0" location="0x40088000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP1&amp;amp;0x1" id="SSP1" location="0x40030000"/&gt;&#13;
@ -911,8 +918,17 @@
&lt;peripheralInstance derived_from="LPC17_RTC" determined="infoFile" enable="SYSCTL.PCONP.PCRTC&amp;amp;0x1" id="RTC" location="0x40024000"/&gt;&#13;
&lt;peripheralInstance derived_from="MPU" determined="infoFile" id="MPU" location="0xE000ED90"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC1x_WDT" determined="infoFile" id="WDT" location="0x40000000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_FLASHCFG" determined="infoFile" id="FLASHACCEL" location="0x400FC000"/&gt;&#13;
&lt;peripheralInstance derived_from="GPIO_INT" determined="infoFile" id="GPIOINTMAP" location="0x40028080"/&gt;&#13;
&lt;memoryInstance derived_from="RAM" id="CANAccFilterRAM" location="0x40038000" size="0x800"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_CANAFR" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;amp;0x1|SYSCTL.PCONP.PCCAN2&amp;amp;0x1" id="CANAFR" location="0x4003C000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_CANCEN" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;amp;0x1|SYSCTL.PCONP.PCCAN2&amp;amp;0x1" id="CANCEN" location="0x40040000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_CANWAKESLEEP" determined="infoFile" id="CANWAKESLEEP" location="0x400FC110"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;amp;0x1" id="CANCON1" location="0x40044000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN2&amp;amp;0x1" id="CANCON2" location="0x40048000"/&gt;&#13;
&lt;/chip&gt;&#13;
&lt;processor&gt;&lt;name gcc_name="cortex-m3"&gt;Cortex-M3&lt;/name&gt;&#13;
&lt;processor&gt;&#13;
&lt;name gcc_name="cortex-m3"&gt;Cortex-M3&lt;/name&gt;&#13;
&lt;family&gt;Cortex-M&lt;/family&gt;&#13;
&lt;/processor&gt;&#13;
&lt;link href="nxp_lpcxxxx_peripheral.xme" show="embed" type="simple"/&gt;&#13;

2
Demo/CORTEX_LPC1768_GCC_RedSuite/src/FreeRTOSConfig.h
View file

@ -153,7 +153,7 @@ numeric value the higher the interrupt priority). */
*-----------------------------------------------------------*/
extern void vConfigureTimerForRunTimeStats( void );
#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() vConfigureTimerForRunTimeStats()
#define portGET_RUN_TIME_COUNTER_VALUE() TIM0->TC
#define portGET_RUN_TIME_COUNTER_VALUE() LPC_TIM0->TC
#endif /* FREERTOS_CONFIG_H */

88
Demo/CORTEX_LPC1768_GCC_RedSuite/src/LPCUSB/usbhw_lpc.c
View file

@ -62,9 +62,9 @@ static TFnFrameHandler *_pfnFrameHandler = NULL;
static void Wait4DevInt(unsigned long dwIntr)
{
// wait for specific interrupt
while ((USB->USBDevIntSt & dwIntr) != dwIntr);
while ((LPC_USB->USBDevIntSt & dwIntr) != dwIntr);
// clear the interrupt bits
USB->USBDevIntClr = dwIntr;
LPC_USB->USBDevIntClr = dwIntr;
}
@ -76,9 +76,9 @@ static void Wait4DevInt(unsigned long dwIntr)
static void USBHwCmd(unsigned char bCmd)
{
// clear CDFULL/CCEMTY
USB->USBDevIntClr = CDFULL | CCEMTY;
LPC_USB->USBDevIntClr = CDFULL | CCEMTY;
// write command code
USB->USBCmdCode = 0x00000500 | (bCmd << 16);
LPC_USB->USBCmdCode = 0x00000500 | (bCmd << 16);
Wait4DevInt(CCEMTY);
}
@ -95,7 +95,7 @@ static void USBHwCmdWrite(unsigned char bCmd, unsigned short bData)
USBHwCmd(bCmd);
// write command data
USB->USBCmdCode = 0x00000100 | (bData << 16);
LPC_USB->USBCmdCode = 0x00000100 | (bData << 16);
Wait4DevInt(CCEMTY);
}
@ -113,9 +113,9 @@ static unsigned char USBHwCmdRead(unsigned char bCmd)
USBHwCmd(bCmd);
// get data
USB->USBCmdCode = 0x00000200 | (bCmd << 16);
LPC_USB->USBCmdCode = 0x00000200 | (bCmd << 16);
Wait4DevInt(CDFULL);
return USB->USBCmdData;
return LPC_USB->USBCmdData;
}
@ -132,9 +132,9 @@ static unsigned char USBHwCmdRead(unsigned char bCmd)
*/
static void USBHwEPRealize(int idx, unsigned short wMaxPSize)
{
USB->USBReEP |= (1 << idx);
USB->USBEpInd = idx;
USB->USBMaxPSize = wMaxPSize;
LPC_USB->USBReEP |= (1 << idx);
LPC_USB->USBEpInd = idx;
LPC_USB->USBMaxPSize = wMaxPSize;
Wait4DevInt(EP_RLZED);
}
@ -189,8 +189,8 @@ void USBHwRegisterEPIntHandler(unsigned char bEP, TFnEPIntHandler *pfnHandler)
_apfnEPIntHandlers[idx / 2] = pfnHandler;
/* enable EP interrupt */
USB->USBEpIntEn |= (1 << idx);
USB->USBDevIntEn |= EP_SLOW;
LPC_USB->USBEpIntEn |= (1 << idx);
LPC_USB->USBDevIntEn |= EP_SLOW;
DBG("Registered handler for EP 0x%x\n", bEP);
}
@ -206,7 +206,7 @@ void USBHwRegisterDevIntHandler(TFnDevIntHandler *pfnHandler)
_pfnDevIntHandler = pfnHandler;
// enable device interrupt
USB->USBDevIntEn |= DEV_STAT;
LPC_USB->USBDevIntEn |= DEV_STAT;
DBG("Registered handler for device status\n");
}
@ -222,7 +222,7 @@ void USBHwRegisterFrameHandler(TFnFrameHandler *pfnHandler)
_pfnFrameHandler = pfnHandler;
// enable device interrupt
USB->USBDevIntEn |= FRAME;
LPC_USB->USBDevIntEn |= FRAME;
DBG("Registered handler for frame\n");
}
@ -313,14 +313,14 @@ int USBHwEPWrite(unsigned char bEP, unsigned char *pbBuf, int iLen)
idx = EP2IDX(bEP);
// set write enable for specific endpoint
USB->USBCtrl = WR_EN | ((bEP & 0xF) << 2);
LPC_USB->USBCtrl = WR_EN | ((bEP & 0xF) << 2);
// set packet length
USB->USBTxPLen = iLen;
LPC_USB->USBTxPLen = iLen;
// write data
while (USB->USBCtrl & WR_EN) {
USB->USBTxData = (pbBuf[3] << 24) | (pbBuf[2] << 16) | (pbBuf[1] << 8) | pbBuf[0];
while (LPC_USB->USBCtrl & WR_EN) {
LPC_USB->USBTxData = (pbBuf[3] << 24) | (pbBuf[2] << 16) | (pbBuf[1] << 8) | pbBuf[0];
pbBuf += 4;
}
@ -350,11 +350,11 @@ int USBHwEPRead(unsigned char bEP, unsigned char *pbBuf, int iMaxLen)
idx = EP2IDX(bEP);
// set read enable bit for specific endpoint
USB->USBCtrl = RD_EN | ((bEP & 0xF) << 2);
LPC_USB->USBCtrl = RD_EN | ((bEP & 0xF) << 2);
// wait for PKT_RDY
do {
dwLen = USB->USBRxPLen;
dwLen = LPC_USB->USBRxPLen;
} while ((dwLen & PKT_RDY) == 0);
// packet valid?
@ -369,7 +369,7 @@ int USBHwEPRead(unsigned char bEP, unsigned char *pbBuf, int iMaxLen)
dwData = 0;
for (i = 0; i < dwLen; i++) {
if ((i % 4) == 0) {
dwData = USB->USBRxData;
dwData = LPC_USB->USBRxData;
}
if ((pbBuf != NULL) && (i < iMaxLen)) {
pbBuf[i] = dwData & 0xFF;
@ -378,7 +378,7 @@ int USBHwEPRead(unsigned char bEP, unsigned char *pbBuf, int iMaxLen)
}
// make sure RD_EN is clear
USB->USBCtrl = 0;
LPC_USB->USBCtrl = 0;
// select endpoint and clear buffer
USBHwCmd(CMD_EP_SELECT | idx);
@ -419,12 +419,12 @@ void USBHwISR(void)
unsigned short wFrame;
// handle device interrupts
dwStatus = USB->USBDevIntSt;
dwStatus = LPC_USB->USBDevIntSt;
// frame interrupt
if (dwStatus & FRAME) {
// clear int
USB->USBDevIntClr = FRAME;
LPC_USB->USBDevIntClr = FRAME;
// call handler
if (_pfnFrameHandler != NULL) {
wFrame = USBHwCmdRead(CMD_DEV_READ_CUR_FRAME_NR);
@ -438,7 +438,7 @@ void USBHwISR(void)
This prevents corrupted device status reads, see
LPC2148 User manual revision 2, 25 july 2006.
*/
USB->USBDevIntClr = DEV_STAT;
LPC_USB->USBDevIntClr = DEV_STAT;
bDevStat = USBHwCmdRead(CMD_DEV_STATUS);
if (bDevStat & (CON_CH | SUS_CH | RST)) {
// convert device status into something HW independent
@ -455,15 +455,15 @@ void USBHwISR(void)
// endpoint interrupt
if (dwStatus & EP_SLOW) {
// clear EP_SLOW
USB->USBDevIntClr = EP_SLOW;
LPC_USB->USBDevIntClr = EP_SLOW;
// check all endpoints
for (i = 0; i < 32; i++) {
dwIntBit = (1 << i);
if (USB->USBEpIntSt & dwIntBit) {
if (LPC_USB->USBEpIntSt & dwIntBit) {
// clear int (and retrieve status)
USB->USBEpIntClr = dwIntBit;
LPC_USB->USBEpIntClr = dwIntBit;
Wait4DevInt(CDFULL);
bEPStat = USB->USBCmdData;
bEPStat = LPC_USB->USBCmdData;
// convert EP pipe stat into something HW independent
bStat = ((bEPStat & EPSTAT_FE) ? EP_STATUS_DATA : 0) |
((bEPStat & EPSTAT_ST) ? EP_STATUS_STALLED : 0) |
@ -490,33 +490,33 @@ void USBHwISR(void)
BOOL USBHwInit(void)
{
// P2.9 -> USB_CONNECT
PINCON->PINSEL4 &= ~0x000C0000;
PINCON->PINSEL4 |= 0x00040000;
LPC_PINCON->PINSEL4 &= ~0x000C0000;
LPC_PINCON->PINSEL4 |= 0x00040000;
// P1.18 -> USB_UP_LED
// P1.30 -> VBUS
PINCON->PINSEL3 &= ~0x30000030;
PINCON->PINSEL3 |= 0x20000010;
LPC_PINCON->PINSEL3 &= ~0x30000030;
LPC_PINCON->PINSEL3 |= 0x20000010;
// P0.29 -> USB_D+
// P0.30 -> USB_D-
PINCON->PINSEL1 &= ~0x3C000000;
PINCON->PINSEL1 |= 0x14000000;
LPC_PINCON->PINSEL1 &= ~0x3C000000;
LPC_PINCON->PINSEL1 |= 0x14000000;
// enable PUSB
SC->PCONP |= (1 << 31);
LPC_SC->PCONP |= (1 << 31);
USB->OTGClkCtrl = 0x12; /* Dev clock, AHB clock enable */
while ((USB->OTGClkSt & 0x12) != 0x12);
LPC_USB->OTGClkCtrl = 0x12; /* Dev clock, AHB clock enable */
while ((LPC_USB->OTGClkSt & 0x12) != 0x12);
// disable/clear all interrupts for now
USB->USBDevIntEn = 0;
USB->USBDevIntClr = 0xFFFFFFFF;
USB->USBDevIntPri = 0;
LPC_USB->USBDevIntEn = 0;
LPC_USB->USBDevIntClr = 0xFFFFFFFF;
LPC_USB->USBDevIntPri = 0;
USB->USBEpIntEn = 0;
USB->USBEpIntClr = 0xFFFFFFFF;
USB->USBEpIntPri = 0;
LPC_USB->USBEpIntEn = 0;
LPC_USB->USBEpIntClr = 0xFFFFFFFF;
LPC_USB->USBEpIntPri = 0;
// by default, only ACKs generate interrupts
USBHwNakIntEnable(0);

16
Demo/CORTEX_LPC1768_GCC_RedSuite/src/ParTest.c
View file

@ -74,10 +74,10 @@ static unsigned long ulLEDs[] = { LED_3, LED_2, LED_5, LED_4 };
void vParTestInitialise( void )
{
/* LEDs on port 1. */
GPIO1->FIODIR = partstFIO1_BITS;
LPC_GPIO1->FIODIR = partstFIO1_BITS;
/* Start will all LEDs off. */
GPIO1->FIOCLR = partstFIO1_BITS;
LPC_GPIO1->FIOCLR = partstFIO1_BITS;
}
/*-----------------------------------------------------------*/
@ -88,11 +88,11 @@ void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )
/* Set of clear the output. */
if( xValue )
{
GPIO1->FIOCLR = ulLEDs[ uxLED ];
LPC_GPIO1->FIOCLR = ulLEDs[ uxLED ];
}
else
{
GPIO1->FIOSET = ulLEDs[ uxLED ];
LPC_GPIO1->FIOSET = ulLEDs[ uxLED ];
}
}
}
@ -102,13 +102,13 @@ void vParTestToggleLED( unsigned portBASE_TYPE uxLED )
{
if( uxLED < partstNUM_LEDS )
{
if( GPIO1->FIOPIN & ulLEDs[ uxLED ] )
if( LPC_GPIO1->FIOPIN & ulLEDs[ uxLED ] )
{
GPIO1->FIOCLR = ulLEDs[ uxLED ];
LPC_GPIO1->FIOCLR = ulLEDs[ uxLED ];
}
else
{
GPIO1->FIOSET = ulLEDs[ uxLED ];
LPC_GPIO1->FIOSET = ulLEDs[ uxLED ];
}
}
}
@ -118,7 +118,7 @@ unsigned portBASE_TYPE uxParTextGetLED( unsigned portBASE_TYPE uxLED )
{
if( uxLED < partstNUM_LEDS )
{
return ( GPIO1->FIOPIN & ulLEDs[ uxLED ] );
return ( LPC_GPIO1->FIOPIN & ulLEDs[ uxLED ] );
}
else
{

2
Demo/CORTEX_LPC1768_GCC_RedSuite/src/cr_startup_lpc17.c
View file

@ -229,7 +229,7 @@ extern unsigned long _ebss;
// library.
//
//*****************************************************************************
void Reset_Handler(void)
void
ResetISR(void) {
unsigned long *pulSrc, *pulDest;

106
Demo/CORTEX_LPC1768_GCC_RedSuite/src/main.c
View file

@ -125,6 +125,10 @@ handling library calls. */
without an error being reported. */
#define mainPASS_STATUS_MESSAGE "All tasks are executing without error."
/* Bit definitions. */
#define PCONP_PCGPIO 0x00008000
#define PLLFEED_FEED1 0x000000AA
#define PLLFEED_FEED2 0x00000055
/*-----------------------------------------------------------*/
/*
@ -257,94 +261,94 @@ char *pcGetTaskStatusMessage( void )
void prvSetupHardware( void )
{
/* Disable peripherals power. */
SC->PCONP = 0;
LPC_SC->PCONP = 0;
/* Enable GPIO power. */
SC->PCONP = PCONP_PCGPIO;
LPC_SC->PCONP = PCONP_PCGPIO;
/* Disable TPIU. */
PINCON->PINSEL10 = 0;
LPC_PINCON->PINSEL10 = 0;
if ( SC->PLL0STAT & ( 1 << 25 ) )
if ( LPC_SC->PLL0STAT & ( 1 << 25 ) )
{
/* Enable PLL, disconnected. */
SC->PLL0CON = 1;
SC->PLL0FEED = PLLFEED_FEED1;
SC->PLL0FEED = PLLFEED_FEED2;
LPC_SC->PLL0CON = 1;
LPC_SC->PLL0FEED = PLLFEED_FEED1;
LPC_SC->PLL0FEED = PLLFEED_FEED2;
}
/* Disable PLL, disconnected. */
SC->PLL0CON = 0;
SC->PLL0FEED = PLLFEED_FEED1;
SC->PLL0FEED = PLLFEED_FEED2;
LPC_SC->PLL0CON = 0;
LPC_SC->PLL0FEED = PLLFEED_FEED1;
LPC_SC->PLL0FEED = PLLFEED_FEED2;
/* Enable main OSC. */
SC->SCS |= 0x20;
while( !( SC->SCS & 0x40 ) );
LPC_SC->SCS |= 0x20;
while( !( LPC_SC->SCS & 0x40 ) );
/* select main OSC, 12MHz, as the PLL clock source. */
SC->CLKSRCSEL = 0x1;
LPC_SC->CLKSRCSEL = 0x1;
SC->PLL0CFG = 0x20031;
SC->PLL0FEED = PLLFEED_FEED1;
SC->PLL0FEED = PLLFEED_FEED2;
LPC_SC->PLL0CFG = 0x20031;
LPC_SC->PLL0FEED = PLLFEED_FEED1;
LPC_SC->PLL0FEED = PLLFEED_FEED2;
/* Enable PLL, disconnected. */
SC->PLL0CON = 1;
SC->PLL0FEED = PLLFEED_FEED1;
SC->PLL0FEED = PLLFEED_FEED2;
LPC_SC->PLL0CON = 1;
LPC_SC->PLL0FEED = PLLFEED_FEED1;
LPC_SC->PLL0FEED = PLLFEED_FEED2;
/* Set clock divider. */
SC->CCLKCFG = 0x03;
LPC_SC->CCLKCFG = 0x03;
/* Configure flash accelerator. */
SC->FLASHCFG = 0x403a;
LPC_SC->FLASHCFG = 0x403a;
/* Check lock bit status. */
while( ( ( SC->PLL0STAT & ( 1 << 26 ) ) == 0 ) );
while( ( ( LPC_SC->PLL0STAT & ( 1 << 26 ) ) == 0 ) );
/* Enable and connect. */
SC->PLL0CON = 3;
SC->PLL0FEED = PLLFEED_FEED1;
SC->PLL0FEED = PLLFEED_FEED2;
while( ( ( SC->PLL0STAT & ( 1 << 25 ) ) == 0 ) );
LPC_SC->PLL0CON = 3;
LPC_SC->PLL0FEED = PLLFEED_FEED1;
LPC_SC->PLL0FEED = PLLFEED_FEED2;
while( ( ( LPC_SC->PLL0STAT & ( 1 << 25 ) ) == 0 ) );
/* Configure the clock for the USB. */
if( SC->PLL1STAT & ( 1 << 9 ) )
if( LPC_SC->PLL1STAT & ( 1 << 9 ) )
{
/* Enable PLL, disconnected. */
SC->PLL1CON = 1;
SC->PLL1FEED = PLLFEED_FEED1;
SC->PLL1FEED = PLLFEED_FEED2;
LPC_SC->PLL1CON = 1;
LPC_SC->PLL1FEED = PLLFEED_FEED1;
LPC_SC->PLL1FEED = PLLFEED_FEED2;
}
/* Disable PLL, disconnected. */
SC->PLL1CON = 0;
SC->PLL1FEED = PLLFEED_FEED1;
SC->PLL1FEED = PLLFEED_FEED2;
LPC_SC->PLL1CON = 0;
LPC_SC->PLL1FEED = PLLFEED_FEED1;
LPC_SC->PLL1FEED = PLLFEED_FEED2;
SC->PLL1CFG = 0x23;
SC->PLL1FEED = PLLFEED_FEED1;
SC->PLL1FEED = PLLFEED_FEED2;
LPC_SC->PLL1CFG = 0x23;
LPC_SC->PLL1FEED = PLLFEED_FEED1;
LPC_SC->PLL1FEED = PLLFEED_FEED2;
/* Enable PLL, disconnected. */
SC->PLL1CON = 1;
SC->PLL1FEED = PLLFEED_FEED1;
SC->PLL1FEED = PLLFEED_FEED2;
while( ( ( SC->PLL1STAT & ( 1 << 10 ) ) == 0 ) );
LPC_SC->PLL1CON = 1;
LPC_SC->PLL1FEED = PLLFEED_FEED1;
LPC_SC->PLL1FEED = PLLFEED_FEED2;
while( ( ( LPC_SC->PLL1STAT & ( 1 << 10 ) ) == 0 ) );
/* Enable and connect. */
SC->PLL1CON = 3;
SC->PLL1FEED = PLLFEED_FEED1;
SC->PLL1FEED = PLLFEED_FEED2;
while( ( ( SC->PLL1STAT & ( 1 << 9 ) ) == 0 ) );
LPC_SC->PLL1CON = 3;
LPC_SC->PLL1FEED = PLLFEED_FEED1;
LPC_SC->PLL1FEED = PLLFEED_FEED2;
while( ( ( LPC_SC->PLL1STAT & ( 1 << 9 ) ) == 0 ) );
/* Setup the peripheral bus to be the same as the PLL output (64 MHz). */
SC->PCLKSEL0 = 0x05555555;
LPC_SC->PCLKSEL0 = 0x05555555;
/* Configure the LEDs. */
vParTestInitialise();
@ -373,21 +377,21 @@ const unsigned long TCR_COUNT_RESET = 2, CTCR_CTM_TIMER = 0x00, TCR_COUNT_ENABLE
to 1). */
/* Power up and feed the timer. */
SC->PCONP |= 0x02UL;
SC->PCLKSEL0 = (SC->PCLKSEL0 & (~(0x3<<2))) | (0x01 << 2);
LPC_SC->PCONP |= 0x02UL;
LPC_SC->PCLKSEL0 = (LPC_SC->PCLKSEL0 & (~(0x3<<2))) | (0x01 << 2);
/* Reset Timer 0 */
TIM0->TCR = TCR_COUNT_RESET;
LPC_TIM0->TCR = TCR_COUNT_RESET;
/* Just count up. */
TIM0->CTCR = CTCR_CTM_TIMER;
LPC_TIM0->CTCR = CTCR_CTM_TIMER;
/* Prescale to a frequency that is good enough to get a decent resolution,
but not too fast so as to overflow all the time. */
TIM0->PR = ( configCPU_CLOCK_HZ / 10000UL ) - 1UL;
LPC_TIM0->PR = ( configCPU_CLOCK_HZ / 10000UL ) - 1UL;
/* Start the counter. */
TIM0->TCR = TCR_COUNT_ENABLE;
LPC_TIM0->TCR = TCR_COUNT_ENABLE;
}
/*-----------------------------------------------------------*/

105
Demo/CORTEX_LPC1768_GCC_RedSuite/src/webserver/emac.c
View file

@ -83,6 +83,7 @@
descriptor is then used to re-send in order to speed up the uIP Tx process. */
#define emacTX_DESC_INDEX ( 0 )
#define PCONP_PCENET 0x40000000
/*-----------------------------------------------------------*/
/*
@ -162,15 +163,15 @@ unsigned long ulID1, ulID2;
if( ( (ulID1 << 16UL ) | ( ulID2 & 0xFFF0UL ) ) == DP83848C_ID )
{
/* Set the Ethernet MAC Address registers */
EMAC->SA0 = ( configMAC_ADDR0 << 8 ) | configMAC_ADDR1;
EMAC->SA1 = ( configMAC_ADDR2 << 8 ) | configMAC_ADDR3;
EMAC->SA2 = ( configMAC_ADDR4 << 8 ) | configMAC_ADDR5;
LPC_EMAC->SA0 = ( configMAC_ADDR0 << 8 ) | configMAC_ADDR1;
LPC_EMAC->SA1 = ( configMAC_ADDR2 << 8 ) | configMAC_ADDR3;
LPC_EMAC->SA2 = ( configMAC_ADDR4 << 8 ) | configMAC_ADDR5;
/* Initialize Tx and Rx DMA Descriptors */
prvInitDescriptors();
/* Receive broadcast and perfect match packets */
EMAC->RxFilterCtrl = RFC_UCAST_EN | RFC_BCAST_EN | RFC_PERFECT_EN;
LPC_EMAC->RxFilterCtrl = RFC_UCAST_EN | RFC_BCAST_EN | RFC_PERFECT_EN;
/* Setup the PHY. */
prvConfigurePHY();
@ -192,11 +193,11 @@ unsigned long ulID1, ulID2;
uip_buf = prvGetNextBuffer();
/* Reset all interrupts */
EMAC->IntClear = ( INT_RX_OVERRUN | INT_RX_ERR | INT_RX_FIN | INT_RX_DONE | INT_TX_UNDERRUN | INT_TX_ERR | INT_TX_FIN | INT_TX_DONE | INT_SOFT_INT | INT_WAKEUP );
LPC_EMAC->IntClear = ( INT_RX_OVERRUN | INT_RX_ERR | INT_RX_FIN | INT_RX_DONE | INT_TX_UNDERRUN | INT_TX_ERR | INT_TX_FIN | INT_TX_DONE | INT_SOFT_INT | INT_WAKEUP );
/* Enable receive and transmit mode of MAC Ethernet core */
EMAC->Command |= ( CR_RX_EN | CR_TX_EN );
EMAC->MAC1 |= MAC1_REC_EN;
LPC_EMAC->Command |= ( CR_RX_EN | CR_TX_EN );
LPC_EMAC->MAC1 |= MAC1_REC_EN;
}
return lReturn;
@ -260,12 +261,12 @@ long x, lNextBuffer = 0;
}
/* Set EMAC Receive Descriptor Registers. */
EMAC->RxDescriptor = RX_DESC_BASE;
EMAC->RxStatus = RX_STAT_BASE;
EMAC->RxDescriptorNumber = NUM_RX_FRAG - 1;
LPC_EMAC->RxDescriptor = RX_DESC_BASE;
LPC_EMAC->RxStatus = RX_STAT_BASE;
LPC_EMAC->RxDescriptorNumber = NUM_RX_FRAG - 1;
/* Rx Descriptors Point to 0 */
EMAC->RxConsumeIndex = 0;
LPC_EMAC->RxConsumeIndex = 0;
/* A buffer is not allocated to the Tx descriptors until they are actually
used. */
@ -277,12 +278,12 @@ long x, lNextBuffer = 0;
}
/* Set EMAC Transmit Descriptor Registers. */
EMAC->TxDescriptor = TX_DESC_BASE;
EMAC->TxStatus = TX_STAT_BASE;
EMAC->TxDescriptorNumber = NUM_TX_FRAG - 1;
LPC_EMAC->TxDescriptor = TX_DESC_BASE;
LPC_EMAC->TxStatus = TX_STAT_BASE;
LPC_EMAC->TxDescriptorNumber = NUM_TX_FRAG - 1;
/* Tx Descriptors Point to 0 */
EMAC->TxProduceIndex = 0;
LPC_EMAC->TxProduceIndex = 0;
}
/*-----------------------------------------------------------*/
@ -292,34 +293,34 @@ unsigned short us;
long x, lDummy;
/* Enable P1 Ethernet Pins. */
PINCON->PINSEL2 = emacPINSEL2_VALUE;
PINCON->PINSEL3 = ( PINCON->PINSEL3 & ~0x0000000F ) | 0x00000005;
LPC_PINCON->PINSEL2 = emacPINSEL2_VALUE;
LPC_PINCON->PINSEL3 = ( LPC_PINCON->PINSEL3 & ~0x0000000F ) | 0x00000005;
/* Power Up the EMAC controller. */
SC->PCONP |= PCONP_PCENET;
LPC_SC->PCONP |= PCONP_PCENET;
vTaskDelay( emacSHORT_DELAY );
/* Reset all EMAC internal modules. */
EMAC->MAC1 = MAC1_RES_TX | MAC1_RES_MCS_TX | MAC1_RES_RX | MAC1_RES_MCS_RX | MAC1_SIM_RES | MAC1_SOFT_RES;
EMAC->Command = CR_REG_RES | CR_TX_RES | CR_RX_RES | CR_PASS_RUNT_FRM;
LPC_EMAC->MAC1 = MAC1_RES_TX | MAC1_RES_MCS_TX | MAC1_RES_RX | MAC1_RES_MCS_RX | MAC1_SIM_RES | MAC1_SOFT_RES;
LPC_EMAC->Command = CR_REG_RES | CR_TX_RES | CR_RX_RES | CR_PASS_RUNT_FRM;
/* A short delay after reset. */
vTaskDelay( emacSHORT_DELAY );
/* Initialize MAC control registers. */
EMAC->MAC1 = MAC1_PASS_ALL;
EMAC->MAC2 = MAC2_CRC_EN | MAC2_PAD_EN;
EMAC->MAXF = ETH_MAX_FLEN;
EMAC->CLRT = CLRT_DEF;
EMAC->IPGR = IPGR_DEF;
LPC_EMAC->MAC1 = MAC1_PASS_ALL;
LPC_EMAC->MAC2 = MAC2_CRC_EN | MAC2_PAD_EN;
LPC_EMAC->MAXF = ETH_MAX_FLEN;
LPC_EMAC->CLRT = CLRT_DEF;
LPC_EMAC->IPGR = IPGR_DEF;
/* Enable Reduced MII interface. */
EMAC->Command = CR_RMII | CR_PASS_RUNT_FRM;
LPC_EMAC->Command = CR_RMII | CR_PASS_RUNT_FRM;
/* Reset Reduced MII Logic. */
EMAC->SUPP = SUPP_RES_RMII;
LPC_EMAC->SUPP = SUPP_RES_RMII;
vTaskDelay( emacSHORT_DELAY );
EMAC->SUPP = 0;
LPC_EMAC->SUPP = 0;
/* Put the PHY in reset mode */
prvWritePHY( PHY_REG_BMCR, MCFG_RES_MII );
@ -389,26 +390,26 @@ unsigned short usLinkStatus;
if( usLinkStatus & emacFULL_DUPLEX_ENABLED )
{
/* Full duplex is enabled. */
EMAC->MAC2 |= MAC2_FULL_DUP;
EMAC->Command |= CR_FULL_DUP;
EMAC->IPGT = IPGT_FULL_DUP;
LPC_EMAC->MAC2 |= MAC2_FULL_DUP;
LPC_EMAC->Command |= CR_FULL_DUP;
LPC_EMAC->IPGT = IPGT_FULL_DUP;
}
else
{
/* Half duplex mode. */
EMAC->IPGT = IPGT_HALF_DUP;
LPC_EMAC->IPGT = IPGT_HALF_DUP;
}
/* Configure 100MBit/10MBit mode. */
if( usLinkStatus & emac10BASE_T_MODE )
{
/* 10MBit mode. */
EMAC->SUPP = 0;
LPC_EMAC->SUPP = 0;
}
else
{
/* 100MBit mode. */
EMAC->SUPP = SUPP_SPEED;
LPC_EMAC->SUPP = SUPP_SPEED;
}
}
@ -437,21 +438,21 @@ unsigned long ulGetEMACRxData( void )
unsigned long ulLen = 0;
long lIndex;
if( EMAC->RxProduceIndex != EMAC->RxConsumeIndex )
if( LPC_EMAC->RxProduceIndex != LPC_EMAC->RxConsumeIndex )
{
/* Mark the current buffer as free as uip_buf is going to be set to
the buffer that contains the received data. */
prvReturnBuffer( uip_buf );
ulLen = ( RX_STAT_INFO( EMAC->RxConsumeIndex ) & RINFO_SIZE ) - 3;
uip_buf = ( unsigned char * ) RX_DESC_PACKET( EMAC->RxConsumeIndex );
ulLen = ( RX_STAT_INFO( LPC_EMAC->RxConsumeIndex ) & RINFO_SIZE ) - 3;
uip_buf = ( unsigned char * ) RX_DESC_PACKET( LPC_EMAC->RxConsumeIndex );
/* Allocate a new buffer to the descriptor. */
RX_DESC_PACKET( EMAC->RxConsumeIndex ) = ( unsigned long ) prvGetNextBuffer();
RX_DESC_PACKET( LPC_EMAC->RxConsumeIndex ) = ( unsigned long ) prvGetNextBuffer();
/* Move the consume index onto the next position, ensuring it wraps to
the beginning at the appropriate place. */
lIndex = EMAC->RxConsumeIndex;
lIndex = LPC_EMAC->RxConsumeIndex;
lIndex++;
if( lIndex >= NUM_RX_FRAG )
@ -459,7 +460,7 @@ long lIndex;
lIndex = 0;
}
EMAC->RxConsumeIndex = lIndex;
LPC_EMAC->RxConsumeIndex = lIndex;
}
return ulLen;
@ -494,7 +495,7 @@ unsigned long ulAttempts = 0UL;
usSendLen = usTxDataLen;
TX_DESC_PACKET( emacTX_DESC_INDEX ) = ( unsigned long ) uip_buf;
TX_DESC_CTRL( emacTX_DESC_INDEX ) = ( usTxDataLen | TCTRL_LAST | TCTRL_INT );
EMAC->TxProduceIndex = ( emacTX_DESC_INDEX + 1 );
LPC_EMAC->TxProduceIndex = ( emacTX_DESC_INDEX + 1 );
/* uip_buf is being sent by the Tx descriptor. Allocate a new buffer. */
uip_buf = prvGetNextBuffer();
@ -506,13 +507,13 @@ static long prvWritePHY( long lPhyReg, long lValue )
const long lMaxTime = 10;
long x;
EMAC->MADR = DP83848C_DEF_ADR | lPhyReg;
EMAC->MWTD = lValue;
LPC_EMAC->MADR = DP83848C_DEF_ADR | lPhyReg;
LPC_EMAC->MWTD = lValue;
x = 0;
for( x = 0; x < lMaxTime; x++ )
{
if( ( EMAC->MIND & MIND_BUSY ) == 0 )
if( ( LPC_EMAC->MIND & MIND_BUSY ) == 0 )
{
/* Operation has finished. */
break;
@ -537,13 +538,13 @@ static unsigned short prvReadPHY( unsigned char ucPhyReg, long *plStatus )
long x;
const long lMaxTime = 10;
EMAC->MADR = DP83848C_DEF_ADR | ucPhyReg;
EMAC->MCMD = MCMD_READ;
LPC_EMAC->MADR = DP83848C_DEF_ADR | ucPhyReg;
LPC_EMAC->MCMD = MCMD_READ;
for( x = 0; x < lMaxTime; x++ )
{
/* Operation has finished. */
if( ( EMAC->MIND & MIND_BUSY ) == 0 )
if( ( LPC_EMAC->MIND & MIND_BUSY ) == 0 )
{
break;
}
@ -551,14 +552,14 @@ const long lMaxTime = 10;
vTaskDelay( emacSHORT_DELAY );
}
EMAC->MCMD = 0;
LPC_EMAC->MCMD = 0;
if( x >= lMaxTime )
{
*plStatus = pdFAIL;
}
return( EMAC->MRDD );
return( LPC_EMAC->MRDD );
}
/*-----------------------------------------------------------*/
@ -567,10 +568,10 @@ void vEMAC_ISR( void )
unsigned long ulStatus;
long lHigherPriorityTaskWoken = pdFALSE;
ulStatus = EMAC->IntStatus;
ulStatus = LPC_EMAC->IntStatus;
/* Clear the interrupt. */
EMAC->IntClear = ulStatus;
LPC_EMAC->IntClear = ulStatus;
if( ulStatus & INT_RX_DONE )
{
@ -586,7 +587,7 @@ long lHigherPriorityTaskWoken = pdFALSE;
only two descriptors the index is set back to 0. */
TX_DESC_PACKET( ( emacTX_DESC_INDEX + 1 ) ) = TX_DESC_PACKET( emacTX_DESC_INDEX );
TX_DESC_CTRL( ( emacTX_DESC_INDEX + 1 ) ) = ( usSendLen | TCTRL_LAST | TCTRL_INT );
EMAC->TxProduceIndex = ( emacTX_DESC_INDEX );
LPC_EMAC->TxProduceIndex = ( emacTX_DESC_INDEX );
/* This is the second Tx so set usSendLen to 0 to indicate that the
Tx descriptors will be free again. */

2
Demo/CORTEX_LPC1768_GCC_RedSuite/src/webserver/uIP_Task.c
View file

@ -144,7 +144,7 @@ extern void ( vEMAC_ISR_Wrapper )( void );
portENTER_CRITICAL();
{
EMAC->IntEnable = ( INT_RX_DONE | INT_TX_DONE );
LPC_EMAC->IntEnable = ( INT_RX_DONE | INT_TX_DONE );
/* Set the interrupt priority to the max permissible to cause some
interrupt nesting. */