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Implement prvYieldCore with macro (#785)
* Implement prvYieldCore with macro for performance and memory * Remove the portCHECK_IF_IN_ISR macro check. It is not required in SMP now Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
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@ -453,14 +453,6 @@
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#endif /* portGET_ISR_LOCK */
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#ifndef portCHECK_IF_IN_ISR
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#if ( configNUMBER_OF_CORES > 1 )
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#error portCHECK_IF_IN_ISR is required in SMP
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#endif
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#endif /* portCHECK_IF_IN_ISR */
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#ifndef portENTER_CRITICAL_FROM_ISR
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#if ( configNUMBER_OF_CORES > 1 )
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60
tasks.c
60
tasks.c
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@ -325,6 +325,31 @@
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#define taskBITS_PER_BYTE ( ( size_t ) 8 )
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#if ( configNUMBER_OF_CORES > 1 )
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/* Yields the given core. This must be called from a critical section and xCoreID
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* must be valid. This macro is not required in single core since there is only
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* one core to yield. */
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#define prvYieldCore( xCoreID ) \
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do { \
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if( xCoreID == ( BaseType_t ) portGET_CORE_ID() ) \
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{ \
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/* Pending a yield for this core since it is in the critical section. */ \
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xYieldPendings[ xCoreID ] = pdTRUE; \
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} \
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else \
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{ \
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/* Request other core to yield if it is not requested before. */ \
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if( pxCurrentTCBs[ xCoreID ]->xTaskRunState != taskTASK_SCHEDULED_TO_YIELD ) \
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{ \
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portYIELD_CORE( xCoreID ); \
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pxCurrentTCBs[ xCoreID ]->xTaskRunState = taskTASK_SCHEDULED_TO_YIELD; \
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} \
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} \
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} while( 0 )
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#endif /* #if ( configNUMBER_OF_CORES > 1 ) */
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/*-----------------------------------------------------------*/
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/*
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* Task control block. A task control block (TCB) is allocated for each task,
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* and stores task state information, including a pointer to the task's context
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@ -527,14 +552,6 @@ static BaseType_t prvCreateIdleTasks( void );
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#if ( configNUMBER_OF_CORES > 1 )
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/*
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* Yields the given core.
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*/
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static void prvYieldCore( BaseType_t xCoreID );
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#endif /* #if ( configNUMBER_OF_CORES > 1 ) */
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#if ( configNUMBER_OF_CORES > 1 )
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/*
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* Yields a core, or cores if multiple priorities are not allowed to run
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* simultaneously, to allow the task pxTCB to run.
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@ -811,33 +828,6 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB ) PRIVILEGED_FUNCTION;
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/*-----------------------------------------------------------*/
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#if ( configNUMBER_OF_CORES > 1 )
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static void prvYieldCore( BaseType_t xCoreID )
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{
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/* This must be called from a critical section and xCoreID must be valid. */
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if( ( portCHECK_IF_IN_ISR() == pdTRUE ) && ( xCoreID == ( BaseType_t ) portGET_CORE_ID() ) )
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{
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xYieldPendings[ xCoreID ] = pdTRUE;
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}
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else
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{
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if( pxCurrentTCBs[ xCoreID ]->xTaskRunState != taskTASK_SCHEDULED_TO_YIELD )
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{
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if( xCoreID == ( BaseType_t ) portGET_CORE_ID() )
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{
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xYieldPendings[ xCoreID ] = pdTRUE;
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}
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else
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{
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portYIELD_CORE( xCoreID );
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pxCurrentTCBs[ xCoreID ]->xTaskRunState = taskTASK_SCHEDULED_TO_YIELD;
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}
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}
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}
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}
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#endif /* #if ( configNUMBER_OF_CORES > 1 ) */
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/*-----------------------------------------------------------*/
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#if ( configNUMBER_OF_CORES > 1 )
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static void prvYieldForTask( const TCB_t * pxTCB )
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{
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