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565 lines
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565 lines
32 KiB
HTML
<HTML><HEAD><TITLE>Xilinx Design Summary</TITLE></HEAD>
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<BODY TEXT='#000000' BGCOLOR='#FFFFFF' LINK='#0000EE' VLINK='#551A8B' ALINK='#FF0000'>
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<TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
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<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
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<TD ALIGN=CENTER COLSPAN='4'><B>Project Status (08/27/2011 - 12:37:45)</B></TD></TR>
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<TR ALIGN=LEFT>
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<TD BGCOLOR='#FFFF99'><B>Project File:</B></TD>
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<TD>system.xmp</TD>
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<TD BGCOLOR='#FFFF99'><B>Implementation State:</B></TD>
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<TD>Programming File Generated</TD>
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</TR>
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<TR ALIGN=LEFT>
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<TD BGCOLOR='#FFFF99'><B>Module Name:</B></TD>
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<TD>system</TD>
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<TD BGCOLOR='#FFFF99'><UL><LI><B>Errors:</B></LI></UL></TD>
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<TD>
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No Errors</TD>
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</TR>
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<TR ALIGN=LEFT>
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<TD BGCOLOR='#FFFF99'><B>Product Version:</B></TD><TD>EDK 13.1</TD>
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<TD BGCOLOR='#FFFF99'><UL><LI><B>Warnings:</B></LI></UL></TD>
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<TD ALIGN=LEFT><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\_xmsgs/*.xmsgs?&DataKey=Warning'>238 Warnings (0 new)</A></TD>
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</TR>
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</TABLE>
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<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
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<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='5'><B>XPS Reports</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=EDKReports"><B>[-]</B></a></TD></TR>
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<TR BGCOLOR='#FFFF99'><TD><B>Report Name</B></TD><TD><B>Generated</B></TD>
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<TD ALIGN=LEFT><B>Errors</B></TD><TD ALIGN=LEFT><B>Warnings</B></TD><TD ALIGN=LEFT COLSPAN='2'><B>Infos</B></TD></TR>
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<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\platgen.log'>Platgen Log File</A></TD><TD>Sat 27. Aug 12:17:02 2011</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\__xps/ise/_xmsgs/platgen.xmsgs?&DataKey=Warning'>19 Warnings (18 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\__xps/ise/_xmsgs/platgen.xmsgs?&DataKey=Info'>34 Infos (32 new)</A></TD></TR>
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<TR ALIGN=LEFT><TD>Libgen Log File</TD><TD> </TD><TD> </TD><TD> </TD><TD COLSPAN='2'> </TD></TR>
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<TR ALIGN=LEFT><TD>Simgen Log File</TD><TD> </TD><TD> </TD><TD> </TD><TD COLSPAN='2'> </TD></TR>
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<TR ALIGN=LEFT><TD>BitInit Log File</TD><TD> </TD><TD> </TD><TD> </TD><TD COLSPAN='2'> </TD></TR>
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<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\system.log'>System Log File</A></TD><TD>Sat 27. Aug 12:34:09 2011</TD><TD> </TD><TD> </TD><TD COLSPAN='2'> </TD></TR>
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</TABLE>
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<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
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<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='6'><B>XPS Synthesis Summary (estimated values)</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=EDKSynthesisSumary"><B>[-]</B></a></TD></TR>
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<TR BGCOLOR='#FFFF99'><TD><B>Report</B></TD><TD><B>Generated</B></TD><TD><B>Flip Flops Used</B></TD><TD><B>LUTs Used</B></TD><TD><B>BRAMS Used</B></TD><TD COLSPAN='2'><B>Errors</B></TD></TR>
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<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\system_xst.srp'>system</A></TD><TD>Sat 27. Aug 12:17:50 2011</TD><TD ALIGN=RIGHT>14696</TD><TD ALIGN=RIGHT>14247</TD><TD ALIGN=RIGHT>14</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
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<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\mcb_ddr3_wrapper_xst.srp'>mcb_ddr3_wrapper</A></TD><TD>Sat 27. Aug 12:16:50 2011</TD><TD ALIGN=RIGHT>373</TD><TD ALIGN=RIGHT>690</TD><TD> </TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
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<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\debug_module_wrapper_xst.srp'>debug_module_wrapper</A></TD><TD>Sat 27. Aug 12:16:27 2011</TD><TD ALIGN=RIGHT>131</TD><TD ALIGN=RIGHT>142</TD><TD> </TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
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<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\clock_generator_0_wrapper_xst.srp'>clock_generator_0_wrapper</A></TD><TD>Sat 27. Aug 12:16:17 2011</TD><TD> </TD><TD ALIGN=RIGHT>1</TD><TD> </TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
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<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\microblaze_0_bram_block_wrapper_xst.srp'>microblaze_0_bram_block_wrapper</A></TD><TD>Sat 27. Aug 12:16:12 2011</TD><TD> </TD><TD> </TD><TD ALIGN=RIGHT>4</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
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<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\microblaze_0_d_bram_ctrl_wrapper_xst.srp'>microblaze_0_d_bram_ctrl_wrapper</A></TD><TD>Sat 27. Aug 12:16:06 2011</TD><TD ALIGN=RIGHT>2</TD><TD ALIGN=RIGHT>6</TD><TD> </TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
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<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\microblaze_0_i_bram_ctrl_wrapper_xst.srp'>microblaze_0_i_bram_ctrl_wrapper</A></TD><TD>Sat 27. Aug 12:16:01 2011</TD><TD ALIGN=RIGHT>2</TD><TD ALIGN=RIGHT>6</TD><TD> </TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
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<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\axi4lite_0_wrapper_xst.srp'>axi4lite_0_wrapper</A></TD><TD>Sat 27. Aug 12:15:55 2011</TD><TD ALIGN=RIGHT>2905</TD><TD ALIGN=RIGHT>1827</TD><TD> </TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
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<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\axi_timer_0_wrapper_xst.srp'>axi_timer_0_wrapper</A></TD><TD>Fri 26. Aug 21:17:55 2011</TD><TD ALIGN=RIGHT>260</TD><TD ALIGN=RIGHT>272</TD><TD> </TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
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<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\microblaze_0_intc_wrapper_xst.srp'>microblaze_0_intc_wrapper</A></TD><TD>Fri 26. Aug 21:17:45 2011</TD><TD ALIGN=RIGHT>86</TD><TD ALIGN=RIGHT>115</TD><TD> </TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
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<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\ethernet_dma_wrapper_xst.srp'>ethernet_dma_wrapper</A></TD><TD>Fri 26. Aug 21:17:37 2011</TD><TD ALIGN=RIGHT>3728</TD><TD ALIGN=RIGHT>3798</TD><TD> </TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
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<TR ALIGN=LEFT><TD>ethernet_dma_wrapper_fifo_generator_v8_1_6_fifo_generator_v8_1_xst_1</TD><TD>Fri 26. Aug 21:16:56 2011</TD><TD ALIGN=RIGHT>107</TD><TD ALIGN=RIGHT>109</TD><TD> </TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
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<TR ALIGN=LEFT><TD>ethernet_dma_wrapper_fifo_generator_v8_1_7_fifo_generator_v8_1_xst_1</TD><TD>Fri 26. Aug 21:15:53 2011</TD><TD ALIGN=RIGHT>98</TD><TD ALIGN=RIGHT>100</TD><TD> </TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
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<TR ALIGN=LEFT><TD>ethernet_dma_wrapper_fifo_generator_v8_1_2_fifo_generator_v8_1_xst_1</TD><TD>Fri 26. Aug 21:14:50 2011</TD><TD ALIGN=RIGHT>68</TD><TD ALIGN=RIGHT>49</TD><TD ALIGN=RIGHT>1</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
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<TR ALIGN=LEFT><TD>ethernet_dma_wrapper_fifo_generator_v8_1_1_fifo_generator_v8_1_xst_1</TD><TD>Fri 26. Aug 21:13:47 2011</TD><TD ALIGN=RIGHT>74</TD><TD ALIGN=RIGHT>59</TD><TD ALIGN=RIGHT>1</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
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<TR ALIGN=LEFT><TD>ethernet_dma_wrapper_fifo_generator_v8_1_5_fifo_generator_v8_1_xst_1</TD><TD>Fri 26. Aug 21:12:44 2011</TD><TD ALIGN=RIGHT>69</TD><TD ALIGN=RIGHT>49</TD><TD ALIGN=RIGHT>1</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
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<TR ALIGN=LEFT><TD>ethernet_dma_wrapper_fifo_generator_v8_1_4_fifo_generator_v8_1_xst_1</TD><TD>Fri 26. Aug 21:11:41 2011</TD><TD ALIGN=RIGHT>99</TD><TD ALIGN=RIGHT>103</TD><TD> </TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
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<TR ALIGN=LEFT><TD>ethernet_dma_wrapper_fifo_generator_v8_1_3_fifo_generator_v8_1_xst_1</TD><TD>Fri 26. Aug 21:10:39 2011</TD><TD ALIGN=RIGHT>97</TD><TD ALIGN=RIGHT>98</TD><TD> </TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
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<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\ethernet_wrapper_xst.srp'>ethernet_wrapper</A></TD><TD>Fri 26. Aug 21:09:24 2011</TD><TD ALIGN=RIGHT>3166</TD><TD ALIGN=RIGHT>3264</TD><TD> </TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
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<TR ALIGN=LEFT><TD>ethernet_wrapper_fifo_generator_v8_1_fifo_generator_v8_1_xst_1</TD><TD>Fri 26. Aug 21:08:27 2011</TD><TD ALIGN=RIGHT>104</TD><TD ALIGN=RIGHT>148</TD><TD> </TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
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<TR ALIGN=LEFT><TD>ethernet_wrapper_blk_mem_gen_v5_2_2_blk_mem_gen_v5_2_xst_1</TD><TD>Fri 26. Aug 21:07:29 2011</TD><TD> </TD><TD> </TD><TD ALIGN=RIGHT>1</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
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<TR ALIGN=LEFT><TD>ethernet_wrapper_blk_mem_gen_v5_2_1_blk_mem_gen_v5_2_xst_1</TD><TD>Fri 26. Aug 21:07:03 2011</TD><TD> </TD><TD> </TD><TD ALIGN=RIGHT>2</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
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<TR ALIGN=LEFT><TD>ethernet_wrapper_blk_mem_gen_v5_2_4_blk_mem_gen_v5_2_xst_1</TD><TD>Fri 26. Aug 21:06:36 2011</TD><TD> </TD><TD> </TD><TD ALIGN=RIGHT>1</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
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<TR ALIGN=LEFT><TD>ethernet_wrapper_blk_mem_gen_v5_2_3_blk_mem_gen_v5_2_xst_1</TD><TD>Fri 26. Aug 21:06:10 2011</TD><TD ALIGN=RIGHT>2</TD><TD ALIGN=RIGHT>49</TD><TD ALIGN=RIGHT>2</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
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<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\push_buttons_4bits_wrapper_xst.srp'>push_buttons_4bits_wrapper</A></TD><TD>Fri 26. Aug 21:04:24 2011</TD><TD ALIGN=RIGHT>72</TD><TD ALIGN=RIGHT>85</TD><TD> </TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
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<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\leds_4bits_wrapper_xst.srp'>leds_4bits_wrapper</A></TD><TD>Fri 26. Aug 21:04:14 2011</TD><TD ALIGN=RIGHT>33</TD><TD ALIGN=RIGHT>41</TD><TD> </TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
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<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\rs232_uart_1_wrapper_xst.srp'>rs232_uart_1_wrapper</A></TD><TD>Fri 26. Aug 21:04:05 2011</TD><TD ALIGN=RIGHT>84</TD><TD ALIGN=RIGHT>102</TD><TD> </TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
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<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\proc_sys_reset_0_wrapper_xst.srp'>proc_sys_reset_0_wrapper</A></TD><TD>Fri 26. Aug 21:03:43 2011</TD><TD ALIGN=RIGHT>69</TD><TD ALIGN=RIGHT>55</TD><TD> </TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
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<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\microblaze_0_dlmb_wrapper_xst.srp'>microblaze_0_dlmb_wrapper</A></TD><TD>Fri 26. Aug 21:03:19 2011</TD><TD ALIGN=RIGHT>1</TD><TD ALIGN=RIGHT>1</TD><TD> </TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
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<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\microblaze_0_ilmb_wrapper_xst.srp'>microblaze_0_ilmb_wrapper</A></TD><TD>Fri 26. Aug 21:03:15 2011</TD><TD ALIGN=RIGHT>1</TD><TD ALIGN=RIGHT>1</TD><TD> </TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
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<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\microblaze_0_wrapper_xst.srp'>microblaze_0_wrapper</A></TD><TD>Fri 26. Aug 21:03:10 2011</TD><TD ALIGN=RIGHT>1301</TD><TD ALIGN=RIGHT>1703</TD><TD> </TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
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<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/synthesis\axi4_0_wrapper_xst.srp'>axi4_0_wrapper</A></TD><TD>Fri 26. Aug 21:02:14 2011</TD><TD ALIGN=RIGHT>1488</TD><TD ALIGN=RIGHT>1083</TD><TD> </TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
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<TR ALIGN=LEFT><TD>axi4_0_wrapper_FIFO_GENERATOR_V8_1_2_fifo_generator_v8_1_xst_1</TD><TD>Fri 26. Aug 21:01:57 2011</TD><TD ALIGN=RIGHT>90</TD><TD ALIGN=RIGHT>97</TD><TD ALIGN=RIGHT>2</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
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<TR ALIGN=LEFT><TD>axi4_0_wrapper_FIFO_GENERATOR_V8_1_1_fifo_generator_v8_1_xst_1</TD><TD>Fri 26. Aug 21:00:49 2011</TD><TD ALIGN=RIGHT>89</TD><TD ALIGN=RIGHT>96</TD><TD ALIGN=RIGHT>1</TD><TD ALIGN=RIGHT COLSPAN='2'>0</TD></TR>
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</TABLE>
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<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
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<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='5'><B>Device Utilization Summary (actual values)</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=DeviceUtilizationSummary"><B>[-]</B></a></TD></TR>
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<TR ALIGN=CENTER BGCOLOR='#FFFF99'>
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<TD ALIGN=LEFT><B>Slice Logic Utilization</B></TD><TD><B>Used</B></TD><TD><B>Available</B></TD><TD><B>Utilization</B></TD><TD COLSPAN='2'><B>Note(s)</B></TD>
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</TR>
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<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of Slice Registers</TD>
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<TD ALIGN=RIGHT>12,060</TD>
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<TD ALIGN=RIGHT>54,576</TD>
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<TD ALIGN=RIGHT>22%</TD>
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<TD COLSPAN='2'> </TD>
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</TR>
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<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as Flip Flops</TD>
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<TD ALIGN=RIGHT>12,052</TD>
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<TD> </TD>
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<TD> </TD>
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<TD COLSPAN='2'> </TD>
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</TR>
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<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as Latches</TD>
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<TD ALIGN=RIGHT>0</TD>
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<TD> </TD>
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<TD> </TD>
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<TD COLSPAN='2'> </TD>
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</TR>
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<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as Latch-thrus</TD>
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<TD ALIGN=RIGHT>0</TD>
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<TD> </TD>
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<TD> </TD>
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<TD COLSPAN='2'> </TD>
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</TR>
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<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as AND/OR logics</TD>
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<TD ALIGN=RIGHT>8</TD>
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<TD> </TD>
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<TD> </TD>
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<TD COLSPAN='2'> </TD>
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</TR>
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<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of Slice LUTs</TD>
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<TD ALIGN=RIGHT>10,940</TD>
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<TD ALIGN=RIGHT>27,288</TD>
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<TD ALIGN=RIGHT>40%</TD>
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<TD COLSPAN='2'> </TD>
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</TR>
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<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as logic</TD>
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<TD ALIGN=RIGHT>9,639</TD>
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<TD ALIGN=RIGHT>27,288</TD>
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<TD ALIGN=RIGHT>35%</TD>
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<TD COLSPAN='2'> </TD>
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</TR>
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<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number using O6 output only</TD>
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<TD ALIGN=RIGHT>6,889</TD>
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<TD> </TD>
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<TD> </TD>
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<TD COLSPAN='2'> </TD>
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</TR>
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<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number using O5 output only</TD>
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<TD ALIGN=RIGHT>260</TD>
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<TD> </TD>
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<TD> </TD>
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<TD COLSPAN='2'> </TD>
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</TR>
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<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number using O5 and O6</TD>
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<TD ALIGN=RIGHT>2,490</TD>
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<TD> </TD>
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<TD> </TD>
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<TD COLSPAN='2'> </TD>
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</TR>
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<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as ROM</TD>
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<TD ALIGN=RIGHT>0</TD>
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<TD> </TD>
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<TD> </TD>
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<TD COLSPAN='2'> </TD>
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</TR>
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<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as Memory</TD>
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<TD ALIGN=RIGHT>693</TD>
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<TD ALIGN=RIGHT>6,408</TD>
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<TD ALIGN=RIGHT>10%</TD>
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<TD COLSPAN='2'> </TD>
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</TR>
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<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as Dual Port RAM</TD>
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<TD ALIGN=RIGHT>250</TD>
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<TD> </TD>
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<TD> </TD>
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<TD COLSPAN='2'> </TD>
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</TR>
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<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number using O6 output only</TD>
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<TD ALIGN=RIGHT>10</TD>
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<TD> </TD>
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<TD> </TD>
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<TD COLSPAN='2'> </TD>
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</TR>
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<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number using O5 output only</TD>
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<TD ALIGN=RIGHT>4</TD>
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<TD> </TD>
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<TD> </TD>
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<TD COLSPAN='2'> </TD>
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</TR>
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<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number using O5 and O6</TD>
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<TD ALIGN=RIGHT>236</TD>
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<TD> </TD>
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<TD> </TD>
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<TD COLSPAN='2'> </TD>
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</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as Single Port RAM</TD>
|
|
<TD ALIGN=RIGHT>1</TD>
|
|
<TD> </TD>
|
|
<TD> </TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number using O6 output only</TD>
|
|
<TD ALIGN=RIGHT>1</TD>
|
|
<TD> </TD>
|
|
<TD> </TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number using O5 output only</TD>
|
|
<TD ALIGN=RIGHT>0</TD>
|
|
<TD> </TD>
|
|
<TD> </TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number using O5 and O6</TD>
|
|
<TD ALIGN=RIGHT>0</TD>
|
|
<TD> </TD>
|
|
<TD> </TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as Shift Register</TD>
|
|
<TD ALIGN=RIGHT>442</TD>
|
|
<TD> </TD>
|
|
<TD> </TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number using O6 output only</TD>
|
|
<TD ALIGN=RIGHT>205</TD>
|
|
<TD> </TD>
|
|
<TD> </TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number using O5 output only</TD>
|
|
<TD ALIGN=RIGHT>7</TD>
|
|
<TD> </TD>
|
|
<TD> </TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number using O5 and O6</TD>
|
|
<TD ALIGN=RIGHT>230</TD>
|
|
<TD> </TD>
|
|
<TD> </TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used exclusively as route-thrus</TD>
|
|
<TD ALIGN=RIGHT>608</TD>
|
|
<TD> </TD>
|
|
<TD> </TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number with same-slice register load</TD>
|
|
<TD ALIGN=RIGHT>566</TD>
|
|
<TD> </TD>
|
|
<TD> </TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number with same-slice carry load</TD>
|
|
<TD ALIGN=RIGHT>37</TD>
|
|
<TD> </TD>
|
|
<TD> </TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number with other load</TD>
|
|
<TD ALIGN=RIGHT>5</TD>
|
|
<TD> </TD>
|
|
<TD> </TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of occupied Slices</TD>
|
|
<TD ALIGN=RIGHT>4,589</TD>
|
|
<TD ALIGN=RIGHT>6,822</TD>
|
|
<TD ALIGN=RIGHT>67%</TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of LUT Flip Flop pairs used</TD>
|
|
<TD ALIGN=RIGHT>13,843</TD>
|
|
<TD> </TD>
|
|
<TD> </TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number with an unused Flip Flop</TD>
|
|
<TD ALIGN=RIGHT>3,765</TD>
|
|
<TD ALIGN=RIGHT>13,843</TD>
|
|
<TD ALIGN=RIGHT>27%</TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number with an unused LUT</TD>
|
|
<TD ALIGN=RIGHT>2,903</TD>
|
|
<TD ALIGN=RIGHT>13,843</TD>
|
|
<TD ALIGN=RIGHT>20%</TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number of fully used LUT-FF pairs</TD>
|
|
<TD ALIGN=RIGHT>7,175</TD>
|
|
<TD ALIGN=RIGHT>13,843</TD>
|
|
<TD ALIGN=RIGHT>51%</TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number of unique control sets</TD>
|
|
<TD ALIGN=RIGHT>697</TD>
|
|
<TD> </TD>
|
|
<TD> </TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number of slice register sites lost<BR> to control set restrictions</TD>
|
|
<TD ALIGN=RIGHT>2,541</TD>
|
|
<TD ALIGN=RIGHT>54,576</TD>
|
|
<TD ALIGN=RIGHT>4%</TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of bonded <A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\system_map.xrpt?&DataKey=IOBProperties'>IOBs</A></TD>
|
|
<TD ALIGN=RIGHT>87</TD>
|
|
<TD ALIGN=RIGHT>296</TD>
|
|
<TD ALIGN=RIGHT>29%</TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number of LOCed IOBs</TD>
|
|
<TD ALIGN=RIGHT>87</TD>
|
|
<TD ALIGN=RIGHT>87</TD>
|
|
<TD ALIGN=RIGHT>100%</TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT> IOB Flip Flops</TD>
|
|
<TD ALIGN=RIGHT>27</TD>
|
|
<TD> </TD>
|
|
<TD> </TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of RAMB16BWERs</TD>
|
|
<TD ALIGN=RIGHT>12</TD>
|
|
<TD ALIGN=RIGHT>116</TD>
|
|
<TD ALIGN=RIGHT>10%</TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of RAMB8BWERs</TD>
|
|
<TD ALIGN=RIGHT>4</TD>
|
|
<TD ALIGN=RIGHT>232</TD>
|
|
<TD ALIGN=RIGHT>1%</TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of BUFIO2/BUFIO2_2CLKs</TD>
|
|
<TD ALIGN=RIGHT>3</TD>
|
|
<TD ALIGN=RIGHT>32</TD>
|
|
<TD ALIGN=RIGHT>9%</TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as BUFIO2s</TD>
|
|
<TD ALIGN=RIGHT>3</TD>
|
|
<TD> </TD>
|
|
<TD> </TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as BUFIO2_2CLKs</TD>
|
|
<TD ALIGN=RIGHT>0</TD>
|
|
<TD> </TD>
|
|
<TD> </TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of BUFIO2FB/BUFIO2FB_2CLKs</TD>
|
|
<TD ALIGN=RIGHT>0</TD>
|
|
<TD ALIGN=RIGHT>32</TD>
|
|
<TD ALIGN=RIGHT>0%</TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of BUFG/BUFGMUXs</TD>
|
|
<TD ALIGN=RIGHT>6</TD>
|
|
<TD ALIGN=RIGHT>16</TD>
|
|
<TD ALIGN=RIGHT>37%</TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as BUFGs</TD>
|
|
<TD ALIGN=RIGHT>5</TD>
|
|
<TD> </TD>
|
|
<TD> </TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as BUFGMUX</TD>
|
|
<TD ALIGN=RIGHT>1</TD>
|
|
<TD> </TD>
|
|
<TD> </TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of DCM/DCM_CLKGENs</TD>
|
|
<TD ALIGN=RIGHT>0</TD>
|
|
<TD ALIGN=RIGHT>8</TD>
|
|
<TD ALIGN=RIGHT>0%</TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of ILOGIC2/ISERDES2s</TD>
|
|
<TD ALIGN=RIGHT>12</TD>
|
|
<TD ALIGN=RIGHT>376</TD>
|
|
<TD ALIGN=RIGHT>3%</TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as ILOGIC2s</TD>
|
|
<TD ALIGN=RIGHT>12</TD>
|
|
<TD> </TD>
|
|
<TD> </TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as ISERDES2s</TD>
|
|
<TD ALIGN=RIGHT>0</TD>
|
|
<TD> </TD>
|
|
<TD> </TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of IODELAY2/IODRP2/IODRP2_MCBs</TD>
|
|
<TD ALIGN=RIGHT>34</TD>
|
|
<TD ALIGN=RIGHT>376</TD>
|
|
<TD ALIGN=RIGHT>9%</TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as IODELAY2s</TD>
|
|
<TD ALIGN=RIGHT>10</TD>
|
|
<TD> </TD>
|
|
<TD> </TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as IODRP2s</TD>
|
|
<TD ALIGN=RIGHT>2</TD>
|
|
<TD> </TD>
|
|
<TD> </TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as IODRP2_MCBs</TD>
|
|
<TD ALIGN=RIGHT>22</TD>
|
|
<TD> </TD>
|
|
<TD> </TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of OLOGIC2/OSERDES2s</TD>
|
|
<TD ALIGN=RIGHT>60</TD>
|
|
<TD ALIGN=RIGHT>376</TD>
|
|
<TD ALIGN=RIGHT>15%</TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as OLOGIC2s</TD>
|
|
<TD ALIGN=RIGHT>14</TD>
|
|
<TD> </TD>
|
|
<TD> </TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT> Number used as OSERDES2s</TD>
|
|
<TD ALIGN=RIGHT>46</TD>
|
|
<TD> </TD>
|
|
<TD> </TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of BSCANs</TD>
|
|
<TD ALIGN=RIGHT>1</TD>
|
|
<TD ALIGN=RIGHT>4</TD>
|
|
<TD ALIGN=RIGHT>25%</TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of BUFHs</TD>
|
|
<TD ALIGN=RIGHT>0</TD>
|
|
<TD ALIGN=RIGHT>256</TD>
|
|
<TD ALIGN=RIGHT>0%</TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of BUFPLLs</TD>
|
|
<TD ALIGN=RIGHT>0</TD>
|
|
<TD ALIGN=RIGHT>8</TD>
|
|
<TD ALIGN=RIGHT>0%</TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of BUFPLL_MCBs</TD>
|
|
<TD ALIGN=RIGHT>1</TD>
|
|
<TD ALIGN=RIGHT>4</TD>
|
|
<TD ALIGN=RIGHT>25%</TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of DSP48A1s</TD>
|
|
<TD ALIGN=RIGHT>3</TD>
|
|
<TD ALIGN=RIGHT>58</TD>
|
|
<TD ALIGN=RIGHT>5%</TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of GTPA1_DUALs</TD>
|
|
<TD ALIGN=RIGHT>0</TD>
|
|
<TD ALIGN=RIGHT>2</TD>
|
|
<TD ALIGN=RIGHT>0%</TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of ICAPs</TD>
|
|
<TD ALIGN=RIGHT>0</TD>
|
|
<TD ALIGN=RIGHT>1</TD>
|
|
<TD ALIGN=RIGHT>0%</TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of MCBs</TD>
|
|
<TD ALIGN=RIGHT>1</TD>
|
|
<TD ALIGN=RIGHT>2</TD>
|
|
<TD ALIGN=RIGHT>50%</TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of PCIE_A1s</TD>
|
|
<TD ALIGN=RIGHT>0</TD>
|
|
<TD ALIGN=RIGHT>1</TD>
|
|
<TD ALIGN=RIGHT>0%</TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of PCILOGICSEs</TD>
|
|
<TD ALIGN=RIGHT>0</TD>
|
|
<TD ALIGN=RIGHT>2</TD>
|
|
<TD ALIGN=RIGHT>0%</TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of PLL_ADVs</TD>
|
|
<TD ALIGN=RIGHT>2</TD>
|
|
<TD ALIGN=RIGHT>4</TD>
|
|
<TD ALIGN=RIGHT>50%</TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of PMVs</TD>
|
|
<TD ALIGN=RIGHT>0</TD>
|
|
<TD ALIGN=RIGHT>1</TD>
|
|
<TD ALIGN=RIGHT>0%</TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of STARTUPs</TD>
|
|
<TD ALIGN=RIGHT>0</TD>
|
|
<TD ALIGN=RIGHT>1</TD>
|
|
<TD ALIGN=RIGHT>0%</TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of SUSPEND_SYNCs</TD>
|
|
<TD ALIGN=RIGHT>0</TD>
|
|
<TD ALIGN=RIGHT>1</TD>
|
|
<TD ALIGN=RIGHT>0%</TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Average Fanout of Non-Clock Nets</TD>
|
|
<TD ALIGN=RIGHT>3.89</TD>
|
|
<TD> </TD>
|
|
<TD> </TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TR>
|
|
</TABLE>
|
|
|
|
|
|
|
|
<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
|
|
<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='4'><B>Performance Summary</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=PerformanceSummary"><B>[-]</B></a></TD></TR>
|
|
<TR ALIGN=LEFT>
|
|
<TD BGCOLOR='#FFFF99'><B>Final Timing Score:</B></TD>
|
|
<TD>0 (Setup: 0, Hold: 0, Component Switching Limit: 0)</TD>
|
|
<TD BGCOLOR='#FFFF99'><B>Pinout Data:</B></TD>
|
|
<TD COLSPAN='2'><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\system_par.xrpt?&DataKey=PinoutData'>Pinout Report</A></TD>
|
|
</TR>
|
|
<TR ALIGN=LEFT>
|
|
<TD BGCOLOR='#FFFF99'><B>Routing Results:</B></TD><TD>
|
|
<A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\system.unroutes'>All Signals Completely Routed</A></TD>
|
|
<TD BGCOLOR='#FFFF99'><B>Clock Data:</B></TD>
|
|
<TD COLSPAN='2'><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\system_par.xrpt?&DataKey=ClocksData'>Clock Report</A></TD>
|
|
</TR>
|
|
<TR ALIGN=LEFT>
|
|
<TD BGCOLOR='#FFFF99'><B>Timing Constraints:</B></TD>
|
|
<TD>
|
|
<A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\system.ptwx?&DataKey=ConstraintsData'>All Constraints Met</A></TD>
|
|
<TD BGCOLOR='#FFFF99'><B> </B></TD>
|
|
<TD COLSPAN='2'> </TD>
|
|
</TABLE>
|
|
|
|
|
|
|
|
<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
|
|
<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='6'><B>Detailed Reports</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=DetailedReports"><B>[-]</B></a></TD></TR>
|
|
<TR BGCOLOR='#FFFF99'><TD><B>Report Name</B></TD><TD><B>Status</B></TD><TD><B>Generated</B></TD>
|
|
<TD ALIGN=LEFT><B>Errors</B></TD><TD ALIGN=LEFT><B>Warnings</B></TD><TD ALIGN=LEFT COLSPAN='2'><B>Infos</B></TD></TR>
|
|
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\system.bld'>Translation Report</A></TD><TD>Current</TD><TD>Sat 27. Aug 12:19:05 2011</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\_xmsgs/ngdbuild.xmsgs?&DataKey=Warning'>87 Warnings (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\_xmsgs/ngdbuild.xmsgs?&DataKey=Info'>13 Infos (8 new)</A></TD></TR>
|
|
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\system_map.mrp'>Map Report</A></TD><TD>Current</TD><TD>Sat 27. Aug 12:28:13 2011</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\_xmsgs/map.xmsgs?&DataKey=Warning'>50 Warnings (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\_xmsgs/map.xmsgs?&DataKey=Info'>1134 Infos (0 new)</A></TD></TR>
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<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\system.par'>Place and Route Report</A></TD><TD>Current</TD><TD>Sat 27. Aug 12:31:43 2011</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\_xmsgs/par.xmsgs?&DataKey=Warning'>51 Warnings (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\_xmsgs/par.xmsgs?&DataKey=Info'>3 Infos (0 new)</A></TD></TR>
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<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\system.twr'>Post-PAR Static Timing Report</A></TD><TD>Current</TD><TD>Sat 27. Aug 12:32:50 2011</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\_xmsgs/trce.xmsgs?&DataKey=Warning'>3 Warnings (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\_xmsgs/trce.xmsgs?&DataKey=Info'>3 Infos (0 new)</A></TD></TR>
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<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\system.bgn'>Bitgen Report</A></TD><TD>Current</TD><TD>Sat 27. Aug 12:34:09 2011</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\_xmsgs/bitgen.xmsgs?&DataKey=Warning'>47 Warnings (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR>
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</TABLE>
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<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
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<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='3'><B>Secondary Reports</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=SecondaryReports"><B>[-]</B></a></TD></TR>
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<TR BGCOLOR='#FFFF99'><TD><B>Report Name</B></TD><TD><B>Status</B></TD><TD COLSPAN='2'><B>Generated</B></TD></TR>
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<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject\implementation\webtalk.log'>WebTalk Log File</A></TD><TD>Current</TD><TD COLSPAN='2'>Sat 27. Aug 12:34:09 2011</TD></TR>
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</TABLE>
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<br><center><b>Date Generated:</b> 08/27/2011 - 12:37:46</center>
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