Fix race in POSIX port vPortEndScheduler (#1262)

* Fix race in POSIX port `vPortEndScheduler`

The `vPortEndScheduler` checks whether it's a FreeRTOS thread after signalling the scheduler thread to stop. This creates a race between the check and the destruction of the thread key. By moving the signal to the scheduler thread after the check, the race is prevented.

* Code review suggestions

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>

.github/.cSpellWords.txt

@@ -23,6 +23,7 @@ AIRCR
 ALMIEN
 ALMV
 ANDC
+andi
 ANDCCR
 APIC
 APROCFREQ
@@ -47,6 +48,7 @@ bcpc
 BCPC
 beevt
 BEEVT
+beqz
 BERR
 bfextu
 Biagioni
@@ -54,11 +56,13 @@ bics
 BISR
 BODIEN
 BODSTS
+brealid
 BRGR
 brhi
 brne
 bswtrg
 BSWTRG
+Bytesto
 CANEN
 CANRX
 CANTX
@@ -73,6 +77,7 @@ CCNT
 CCNTR
 CCPN
 CCPR
+CCRH
 CDTY
 CDTYR
 CFBS
@@ -84,21 +89,26 @@ CHSR
 CICR
 CISR
 CKDIV
+CKDIVMD
 CKEY
 CKGR
 CKLO
 CKPS
 CLDIV
+CLEARINTENA
 CLKA
 CLKB
+CLKDIS
 CLKEN
 clki
 CLKI
 CLKP
 CLKS
+CLKSOURCE
 CLKSTA
 CLRB
 CLRF
+clrm
 CLRPSW
 CMCNT
 CMCON
@@ -120,6 +130,8 @@ CODR
 comms
 COMPA
 CONFG
+coreid
+coremqtt
 CORTUS
 coverity
 Coverity
@@ -143,6 +155,7 @@ CPRE
 cpsid
 cpsie
 CPSR
+CPUCLK
 CPUID
 CRCB
 crflash
@@ -152,11 +165,14 @@ crhook
 croutine
 CRTV
 CSAAT
+CSDK
 csrr
 csrs
 csrw
 CTCR
 ctest
+CTPC
+CTPSW
 CTRLA
 CTSIC
 CUPD
@@ -174,11 +190,15 @@ DATNB
 DATRDY
 DBGU
 DCDIC
+DCMOCK
 DCMR
 Dconfig
 DCOUNT
 decf
 decfsz
+decihours
+Decihours
+DECIHOURS
 DECNT
 DFPU
 DFREERTOS
@@ -216,6 +236,7 @@ DTREN
 DTXD
 DUNITY
 DVAR
+Dxxx
 EABI
 ecall
 ECIT
@@ -226,6 +247,7 @@ EEVT
 eevtedg
 EEVTEDG
 EFRHD
+EIIC
 EINT
 EIPC
 EIPSW
@@ -278,6 +300,7 @@ FADD
 FCMD
 fcolor
 FCSE
+fcsr
 fdiagnostics
 fdiv
 FDIV
@@ -299,6 +322,7 @@ FNTR
 FOSC
 FPCCR
 FPCSR
+FPEPC
 FPSW
 FPUL
 FRDY
@@ -311,6 +335,7 @@ FSR
 fwait
 GCACC
 GCTRL
+getpacketid
 getvect
 GIEH
 GIEL
@@ -326,6 +351,7 @@ GPTA
 HCLK
 Hitach
 HRESP
+HTCFG
 HWHSH
 HWORD
 HWRD
@@ -341,6 +367,7 @@ ICCR
 ICCRPR
 ICCRX
 ICERST
+ICIPI
 ICSR
 IDCR
 IECR
@@ -360,6 +387,7 @@ INTTM
 IODEFINE
 IORLW
 IPEN
+IPIR
 IPLB
 ipsr
 IPSR
@@ -368,9 +396,10 @@ IRET
 IRXFCS
 ISRAM
 ISRR
-ISR's
 ISRS
+ISR's
 ISRTICK
+isystem
 ITIF
 ITMC
 ITMK
@@ -423,6 +452,7 @@ MAINRDY
 MAIR
 Mang
 Mbits
+mbranch
 mcause
 MCFR
 MCKA
@@ -513,6 +543,7 @@ MVTACHI
 MVTACLO
 MVTC
 MVTIPL
+mypy
 NCFGR
 NCPHA
 NEBP
@@ -522,6 +553,9 @@ NIOSII
 NIRQ
 NOGIC
 noheap
+nondet
+Nondet
+NONDET
 nostdint
 NPCS
 NRSTL
@@ -532,6 +566,10 @@ NTRST
 NVIC
 ODAT
 ODSR
+OINC
+OIWBNOWA
+OIWBWA
+OIWTNOWA
 OPMOD
 optimisations
 OPTIMISED
@@ -543,6 +581,7 @@ OSCEN
 OSCOFF
 OSCOUNT
 OSMC
+OSTM
 outpw
 OVLY
 OVRE
@@ -552,6 +591,8 @@ OWATCOM
 OWDR
 OWER
 OWSR
+pacbti
+PACBTI
 PAGEN
 PCDR
 PCER
@@ -563,6 +604,7 @@ PCLKSEL
 PCSR
 PCXI
 PDSR
+PEID
 PEIE
 PENDSV
 PENDSVCLEAR
@@ -613,6 +655,7 @@ PREB
 PRIA
 Prioritised
 PRIS
+PRIVDEFENA
 PROCDLY
 PRODH
 PRODL
@@ -635,7 +678,11 @@ PUSHNE
 PUSHW
 pushx
 PWMC
+pylint
+pytest
+pyyaml
 RAMPZ
+randomisation
 RASR
 Rationalised
 Raynald
@@ -690,6 +737,7 @@ Rsvd
 RTAR
 RTCEN
 RTCSC
+RTICTL
 RTIE
 RTIF
 RTIFRC
@@ -713,6 +761,7 @@ RXRSM
 RXSETUP
 RXSUSP
 RXSYN
+RXTDIS
 RXTEN
 RXUBR
 SBYCR
@@ -726,6 +775,7 @@ SECU
 SENDA
 SETB
 SETEN
+SETINTENA
 SETPSW
 SETR
 setvect
@@ -736,6 +786,7 @@ SHPR
 SHTIM
 SIFIVE
 sinclude
+slli
 SODR
 SOFTIRQ
 SPCK
@@ -771,7 +822,18 @@ SWINTR
 SWRST
 SWTRG
 synchronise
+SYNCM
+syncm
 SYSC
+sysclk
+Sysclk
+SysClk
+SYSClk
+SYSCLK
+sysclock
+Sysclock
+SysClock
+SYSCLOCK
 TACCR
 TACCTL
 TACLR
@@ -847,10 +909,23 @@ TXTEN
 TXUBR
 TXVC
 TXVDIS
+UBTI
 UDCP
+UNACKED
 uncrustify
+UNDADD
+unpadded
+Unpadded
+UNPADDED
+unprotect
+Unprotect
+Unprotected
 UNRE
+UNSUB
+UNSUBACK
+unsubscriptions
 unsuspended
+UPAC
 URAD
 URAT
 URSTEN
@@ -863,14 +938,18 @@ USRIO
 utest
 utilises
 utilising
+vcsr
 VDDCORE
 vect
+Vect
 VECT
 VECTACTIVE
+VECTKEY
 visualisation
 vldmdbeq
 vldmia
 vldmiaeq
+vlenb
 VMSRNE
 vpop
 VPOPNE
@@ -878,6 +957,7 @@ vpush
 VPUSHNE
 VRPM
 Vrtc
+vsetvl
 vstmdbeq
 vstmiaeq
 VTOR

.github/CODEOWNERS

@@ -4,7 +4,7 @@
 # the repo. Unless a later match takes precedence,
 # @global-owner1 and @global-owner2 will be requested for
 # review when someone opens a pull request.
-*      @FreeRTOS/pr-bar-raiser
+*      @FreeRTOS/pr-bar-raisers
 
 # Order is important; the last matching pattern takes the most
 # precedence. When someone opens a pull request that only

.github/allowed_urls.txt

@@ -0,0 +1,3 @@
+https://www.renesas.com/us/en/document/mah/rh850f1k-group-users-manual-hardware?r=1170166
+https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rh850-automotive-mcus
+https://www.renesas.com/us/en/software-tool/c-compiler-package-rh850-family#downloads

.github/scripts/kernel_checker.py

@@ -1,7 +1,7 @@
 #!/usr/bin/env python3
 #/*
 # * FreeRTOS Kernel <DEVELOPMENT BRANCH>
-# * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+# * Copyright (C) 2024 Amazon.com, Inc. or its affiliates. All Rights Reserved.
 # *
 # * SPDX-License-Identifier: MIT
 # *
@@ -28,6 +28,7 @@
 # */
 
 import os
+import re
 from common.header_checker import HeaderChecker
 
 #--------------------------------------------------------------------------------------------------
@@ -37,7 +38,8 @@ KERNEL_IGNORED_FILES = [
     'FreeRTOS-openocd.c',
     'Makefile',
     '.DS_Store',
-    'cspell.config.yaml'
+    'cspell.config.yaml',
+    '.clang-format'
 ]
 
 KERNEL_IGNORED_EXTENSIONS = [
@@ -105,10 +107,19 @@ KERNEL_THIRD_PARTY_PATTERNS = [
     r'.*portable/GCC/AVR32_UC3/.*',
 ]
 
+KERNEL_ARM_COLLAB_FILES_PATTERNS = [
+    r'.*portable/ARMv8M/*',
+    r'.*portable/.*/ARM_CM23*',
+    r'.*portable/.*/ARM_CM33*',
+    r'.*portable/.*/ARM_CM35*',
+    r'.*portable/.*/ARM_CM55*',
+    r'.*portable/.*/ARM_CM85*',
+]
+
 KERNEL_HEADER = [
     '/*\n',
     ' * FreeRTOS Kernel <DEVELOPMENT BRANCH>\n',
-    ' * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\n',
+    ' * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.\n',
     ' *\n',
     ' * SPDX-License-Identifier: MIT\n',
     ' *\n',
@@ -135,18 +146,95 @@ KERNEL_HEADER = [
     ' */\n',
 ]
 
+
+FREERTOS_COPYRIGHT_REGEX = r"^(;|#)?( *(\/\*|\*|#|\/\/))? Copyright \(C\) 20\d\d Amazon.com, Inc. or its affiliates. All Rights Reserved\.( \*\/)?$"
+
+FREERTOS_ARM_COLLAB_COPYRIGHT_REGEX = r"(^(;|#)?( *(\/\*|\*|#|\/\/))? Copyright \(C\) 20\d\d Amazon.com, Inc. or its affiliates. All Rights Reserved\.( \*\/)?$)|" + \
+                                      r"(^(;|#)?( *(\/\*|\*|#|\/\/))? Copyright 20\d\d Arm Limited and/or its affiliates( \*\/)?$)|" + \
+                                      r"(^(;|#)?( *(\/\*|\*|#|\/\/))? <open-source-office@arm.com>( \*\/)?$)"
+
+
+class KernelHeaderChecker(HeaderChecker):
+    def __init__(
+        self,
+        header,
+        padding=1000,
+        ignored_files=None,
+        ignored_ext=None,
+        ignored_patterns=None,
+        py_ext=None,
+        asm_ext=None,
+        third_party_patterns=None,
+        copyright_regex = None
+    ):
+        super().__init__(header, padding, ignored_files, ignored_ext, ignored_patterns,
+                         py_ext, asm_ext, third_party_patterns, copyright_regex)
+
+        self.armCollabRegex = re.compile(FREERTOS_ARM_COLLAB_COPYRIGHT_REGEX)
+
+        self.armCollabFilesPatternList = []
+        for pattern in KERNEL_ARM_COLLAB_FILES_PATTERNS:
+            self.armCollabFilesPatternList.append(re.compile(pattern))
+
+    def isArmCollabFile(self, path):
+        for pattern in self.armCollabFilesPatternList:
+            if pattern.match(path):
+                return True
+        return False
+
+    def checkArmCollabFile(self, path):
+        isValid = False
+        file_ext = os.path.splitext(path)[-1]
+
+        with open(path, encoding="utf-8", errors="ignore") as file:
+            chunk = file.read(len("".join(self.header)) + self.padding)
+            lines = [("%s\n" % line) for line in chunk.strip().splitlines()][
+                : len(self.header) + 2
+            ]
+            if (len(lines) > 0) and (lines[0].find("#!") == 0):
+                lines.remove(lines[0])
+
+        # Split lines in sections.
+        headers = dict()
+        headers["text"] = []
+        headers["copyright"] = []
+        headers["spdx"] = []
+        for line in lines:
+            if self.armCollabRegex.match(line):
+                headers["copyright"].append(line)
+            elif "SPDX-License-Identifier:" in line:
+                headers["spdx"].append(line)
+            else:
+                headers["text"].append(line)
+
+        text_equal = self.isValidHeaderSection(file_ext, "text", headers["text"])
+        spdx_equal = self.isValidHeaderSection(file_ext, "spdx", headers["spdx"])
+
+        if text_equal and spdx_equal and len(headers["copyright"]) == 3:
+            isValid = True
+
+        return isValid
+
+    def customCheck(self, path):
+        isValid = False
+        if self.isArmCollabFile(path):
+            isValid = self.checkArmCollabFile(path)
+        return isValid
+
+
 def main():
     parser = HeaderChecker.configArgParser()
     args   = parser.parse_args()
 
     # Configure the checks then run
-    checker = HeaderChecker(KERNEL_HEADER,
-                            ignored_files=KERNEL_IGNORED_FILES,
-                            ignored_ext=KERNEL_IGNORED_EXTENSIONS,
-                            ignored_patterns=KERNEL_IGNORED_PATTERNS,
-                            third_party_patterns=KERNEL_THIRD_PARTY_PATTERNS,
-                            py_ext=KERNEL_PY_EXTENSIONS,
-                            asm_ext=KERNEL_ASM_EXTENSIONS)
+    checker = KernelHeaderChecker(KERNEL_HEADER,
+                                  copyright_regex=FREERTOS_COPYRIGHT_REGEX,
+                                  ignored_files=KERNEL_IGNORED_FILES,
+                                  ignored_ext=KERNEL_IGNORED_EXTENSIONS,
+                                  ignored_patterns=KERNEL_IGNORED_PATTERNS,
+                                  third_party_patterns=KERNEL_THIRD_PARTY_PATTERNS,
+                                  py_ext=KERNEL_PY_EXTENSIONS,
+                                  asm_ext=KERNEL_ASM_EXTENSIONS)
     checker.ignoreFile(os.path.split(__file__)[-1])
 
     rc = checker.processArgs(args)

.github/scripts/manifest_updater.py

@@ -11,7 +11,7 @@ def update_manifest_file(new_version_number):
         for line in f:
             line = line.strip()
             if line.startswith('version'):
-                updated_lines.append(f'version: "v{new_version_number}"\n')
+                updated_lines.append(f'version: "V{new_version_number}"\n')
             else:
                 updated_lines.append(f'{line}\n')
 

.github/third_party_tools.md

@@ -0,0 +1,14 @@
+Note that these tools are provided by different vendors and not by the FreeRTOS
+team.
+
+## Tracing Tools
+| Tool | Website | Getting Started |
+|------|---------|-----------------|
+| Tracelyzer | [Link](https://percepio.com/tracealyzer/freertostrace/) | [Link](https://percepio.com/getstarted/latest/html/freertos.html) |
+| SystemView | [Link](https://www.segger.com/products/development-tools/systemview/) | [Link](https://wiki.segger.com/FreeRTOS_with_SystemView) |
+
+## Static Code Analysis Tools
+| Tool | Website | Getting Started |
+|------|---------|-----------------|
+| Code Sonar | [Link](https://codesecure.com/our-products/codesonar/) | [Link](https://github.com/CodeSecure-SE/FreeRTOS-Kernel/blob/main/examples/codesonar/README.md) |
+| Coverity | [Link](https://www.blackduck.com/static-analysis-tools-sast/coverity.html) | [Link](../examples/coverity/README.md) |

.github/workflows/auto-release.yml

@@ -31,50 +31,62 @@ jobs:
 
       # Currently FreeRTOS/.github/scripts houses the release script. Download it for upcoming usage
       - name: Checkout FreeRTOS Release Tools
-        uses: actions/checkout@v3
+        uses: actions/checkout@v4.1.1
         with:
           repository: FreeRTOS/FreeRTOS
           path: tools
 
       # Simpler git auth if we use checkout action and forward the repo to release script
       - name: Checkout FreeRTOS Kernel
-        uses: actions/checkout@v3
+        uses: actions/checkout@v4.1.1
         with:
           path: local_kernel
           fetch-depth: 0
 
       - name: Configure git identity
+        env:
+          ACTOR: ${{ github.actor }}
         run: |
-          git config --global user.name ${{ github.actor }}
-          git config --global user.email ${{ github.actor }}@users.noreply.github.com
+          git config --global user.name "$ACTOR"
+          git config --global user.email "$ACTOR"@users.noreply.github.com
 
       - name: create a new branch that references commit id
+        env:
+          VERSION_NUMBER: ${{ github.event.inputs.version_number }}
+          COMMIT_ID: ${{ github.event.inputs.commit_id }}
         working-directory: ./local_kernel
         run: |
-          git checkout -b ${{ github.event.inputs.version_number }} ${{ github.event.inputs.commit_id }}
+          git checkout -b "$VERSION_NUMBER" "$COMMIT_ID"
           echo "COMMIT_SHA_1=$(git rev-parse HEAD)" >> $GITHUB_ENV
 
       - name: Update source files with version info
+        env:
+          VERSION_NUMBER: ${{ github.event.inputs.version_number }}
+          MAIN_BR_VERSION_NUMBER: ${{ github.event.inputs.main_br_version }}
+          COMMIT_SHA_1: ${{ env.COMMIT_SHA_1 }}
+          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
         run: |
           # Install deps and run
           pip install -r ./tools/.github/scripts/release-requirements.txt
-          ./tools/.github/scripts/update_src_version.py FreeRTOS --kernel-repo-path=local_kernel --kernel-commit=${{ env.COMMIT_SHA_1 }} --new-kernel-version=${{ github.event.inputs.version_number }} --new-kernel-main-br-version=${{ github.event.inputs.main_br_version }}
+          ./tools/.github/scripts/update_src_version.py FreeRTOS --kernel-repo-path=local_kernel --kernel-commit="$COMMIT_SHA_1" --new-kernel-version="$VERSION_NUMBER" --new-kernel-main-br-version="$MAIN_BR_VERSION_NUMBER"
           exit $?
-        env:
-            GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
 
       - name : Update version number in manifest.yml
+        env:
+          VERSION_NUMBER: ${{ github.event.inputs.version_number }}
         working-directory: ./local_kernel
         run: |
-          ./.github/scripts/manifest_updater.py -v ${{ github.event.inputs.version_number }}
+          ./.github/scripts/manifest_updater.py -v "$VERSION_NUMBER"
           exit $?
 
       - name : Commit version number change in manifest.yml
+        env:
+          VERSION_NUMBER: ${{ github.event.inputs.version_number }}
         working-directory: ./local_kernel
         run: |
           git add .
           git commit -m '[AUTO][RELEASE]: Update version number in manifest.yml'
-          git push -u origin ${{ github.event.inputs.version_number }}
+          git push -u origin "$VERSION_NUMBER"
 
       - name: Generate SBOM
         uses: FreeRTOS/CI-CD-Github-Actions/sbom-generator@main
@@ -83,24 +95,32 @@ jobs:
           source_path: ./
 
       - name: commit SBOM file
+        env:
+          VERSION_NUMBER: ${{ github.event.inputs.version_number }}
         working-directory: ./local_kernel
         run: |
           git add .
           git commit -m '[AUTO][RELEASE]: Update SBOM'
-          git push -u origin ${{ github.event.inputs.version_number }}
+          git push -u origin "$VERSION_NUMBER"
           echo "COMMIT_SHA_2=$(git rev-parse HEAD)" >> $GITHUB_ENV
 
       - name: Release
+        env:
+          VERSION_NUMBER: ${{ github.event.inputs.version_number }}
+          MAIN_BR_VERSION_NUMBER: ${{ github.event.inputs.main_br_version }}
+          COMMIT_SHA_2: ${{ env.COMMIT_SHA_2 }}
+          REPO_OWNER: ${{ github.repository_owner }}
+          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
         run: |
           # Install deps and run
           pip install -r ./tools/.github/scripts/release-requirements.txt
-          ./tools/.github/scripts/release.py ${{ github.repository_owner }} --kernel-repo-path=local_kernel --kernel-commit=${{ env.COMMIT_SHA_2 }} --new-kernel-version=${{ github.event.inputs.version_number }} --new-kernel-main-br-version=${{ github.event.inputs.main_br_version }}
+          ./tools/.github/scripts/release.py "$REPO_OWNER" --kernel-repo-path=local_kernel --kernel-commit="$COMMIT_SHA_2" --new-kernel-version="$VERSION_NUMBER" --new-kernel-main-br-version="$MAIN_BR_VERSION_NUMBER"
           exit $?
-        env:
-            GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
 
       - name: Cleanup
+        env:
+          VERSION_NUMBER: ${{ github.event.inputs.version_number }}
         working-directory: ./local_kernel
         run: |
           # Delete the branch created for Tag by SBOM generator
-          git push -u origin --delete ${{ github.event.inputs.version_number }}
+          git push -u origin --delete "$VERSION_NUMBER"

.github/workflows/ci.yml

@@ -9,7 +9,7 @@ jobs:
   formatting:
     runs-on: ubuntu-20.04
     steps:
-      - uses: actions/checkout@v3
+      - uses: actions/checkout@v4.1.1
       - name: Check Formatting of FreeRTOS-Kernel Files
         uses: FreeRTOS/CI-CD-Github-Actions/formatting@main
         with:
@@ -19,7 +19,7 @@ jobs:
       runs-on: ubuntu-latest
       steps:
         - name: Clone This Repo
-          uses: actions/checkout@v3
+          uses: actions/checkout@v4.1.1
         - name: Run spellings check
           uses: FreeRTOS/CI-CD-Github-Actions/spellings@main
           with:
@@ -30,14 +30,16 @@ jobs:
     runs-on: ubuntu-latest
     steps:
       - name: Clone This Repo
-        uses: actions/checkout@v3
+        uses: actions/checkout@v4.1.1
       - name: Link Verification
         uses: FreeRTOS/CI-CD-Github-Actions/link-verifier@main
+        with:
+          allowlist-file: '.github/allowed_urls.txt'
 
   verify-manifest:
     runs-on: ubuntu-latest
     steps:
-      - uses: actions/checkout@v3
+      - uses: actions/checkout@v4.1.1
         with:
           submodules: true
           fetch-depth: 0

.github/workflows/coverity_scan.yml

@@ -19,7 +19,7 @@ jobs:
     runs-on: ubuntu-latest
     steps:
       - name: Checkout the Repository
-        uses: actions/checkout@v3
+        uses: actions/checkout@v4.1.1
 
       - env:
           stepName: Install Build Essentials
@@ -86,3 +86,42 @@ jobs:
           echo "::endgroup::"
           echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }} "
           echo "${COV_SCAN_UPLOAD_STATUS}" | grep -q -e 'Build successfully submitted' || echo >&2 "Error submitting build for analysis: ${COV_SCAN_UPLOAD_STATUS}"
+
+      - env:
+            stepName: Coverity Build for SMP FreeRTOS
+            COVERITY_TOKEN: ${{ secrets.COVERITY_SCAN_TOKEN }}
+            COVERITY_EMAIL: ${{ secrets.COVERITY_SCAN_EMAIL }}
+        shell: bash
+        run: |
+            # ${{ env.stepName }}
+            echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
+  
+            export PATH="$PATH:${{env.cov_scan_path}}"
+            cmake -S ./examples/cmake_example/ -B build -DFREERTOS_SMP_EXAMPLE=1
+            cd build
+            cov-build --dir cov-int make -j
+            # Move the report out of the build directory
+            tar czvf ../gcc_freertos_kernel_smp_sample_build.tgz cov-int
+  
+            echo "::endgroup::"
+            echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }} "
+
+      - env:
+            stepName: Upload FreeRTOS SMP Coverity Report for Scan
+            COVERITY_TOKEN: ${{ secrets.COVERITY_SCAN_TOKEN }}
+            COVERITY_EMAIL: ${{ secrets.COVERITY_SCAN_EMAIL }}
+        shell: bash
+        run: |
+            # ${{ env.stepName }}
+            echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
+  
+            COV_SCAN_UPLOAD_STATUS=$(curl --form token=${COVERITY_TOKEN} \
+              --form email=${COVERITY_EMAIL} \
+              --form file=@gcc_freertos_kernel_smp_sample_build.tgz \
+              --form version="Mainline" \
+              --form description="FreeRTOS Kernel SMP Commit Scan" \
+              https://scan.coverity.com/builds?project=FreeRTOS-Kernel)
+  
+            echo "::endgroup::"
+            echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }} "
+            echo "${COV_SCAN_UPLOAD_STATUS}" | grep -q -e 'Build successfully submitted' || echo >&2 "Error submitting build for analysis: ${COV_SCAN_UPLOAD_STATUS}"

.github/workflows/formatting.yml

@@ -19,7 +19,7 @@ jobs:
     runs-on: ubuntu-20.04
     steps:
     - name: Apply Formatting Fix
-      id: check-formatting  
+      id: check-formatting
       uses: FreeRTOS/CI-CD-Github-Actions/formatting-bot@main
       with:
         exclude-dirs: portable

.github/workflows/git-secrets.yml

@@ -7,11 +7,11 @@ jobs:
   git-secrets:
     runs-on: ubuntu-latest
     steps:
-      - uses: actions/checkout@v3
+      - uses: actions/checkout@v4.1.1
         with:
           submodules: recursive
       - name: Checkout awslabs/git-secrets
-        uses: actions/checkout@v3
+        uses: actions/checkout@v4.1.1
         with:
           repository: awslabs/git-secrets
           ref: master

.github/workflows/kernel-checks.yml

@@ -15,7 +15,7 @@ jobs:
 
       # There is shared code, hosted by FreeRTOS/FreeRTOS, with deps needed by header checker
       - name: Checkout FreeRTOS Tools
-        uses: actions/checkout@v3
+        uses: actions/checkout@v4.1.1
         with:
           repository: FreeRTOS/FreeRTOS
           sparse-checkout: '.github'
@@ -24,7 +24,7 @@ jobs:
 
       # Checkout user pull request changes
       - name: Checkout Pull Request
-        uses: actions/checkout@v3
+        uses: actions/checkout@v4.1.1
         with:
           path: inspect
 

.github/workflows/kernel-demos.yml

@@ -1,13 +1,20 @@
 name: FreeRTOS-Kernel Demos
 on: [push, pull_request]
 
+env:
+  # The bash escape character is \033
+  bashPass:   \033[32;1mPASSED -
+  bashInfo:   \033[33;1mINFO -
+  bashFail:   \033[31;1mFAILED -
+  bashEnd:    \033[0m
+
 jobs:
   WIN32-MSVC:
     name: WIN32 MSVC
     runs-on: windows-latest
     steps:
       - name: Checkout the FreeRTOS/FreeRTOS Repository
-        uses: actions/checkout@v3
+        uses: actions/checkout@v4.1.1
         with:
           ref: main
           repository: FreeRTOS/FreeRTOS
@@ -16,7 +23,7 @@ jobs:
 
       # Checkout user pull request changes
       - name: Checkout Pull Request
-        uses: actions/checkout@v3
+        uses: actions/checkout@v4.1.1
         with:
           path: ./FreeRTOS/Source
 
@@ -36,7 +43,7 @@ jobs:
     runs-on: windows-latest
     steps:
       - name: Checkout the FreeRTOS/FreeRTOS Repository
-        uses: actions/checkout@v3
+        uses: actions/checkout@v4.1.1
         with:
           ref: main
           repository: FreeRTOS/FreeRTOS
@@ -45,7 +52,7 @@ jobs:
 
       # Checkout user pull request changes
       - name: Checkout Pull Request
-        uses: actions/checkout@v3
+        uses: actions/checkout@v4.1.1
         with:
           path: ./FreeRTOS/Source
 
@@ -58,10 +65,16 @@ jobs:
 
   POSIX-GCC:
     name: Native GCC
-    runs-on: ubuntu-latest
+    strategy:
+      fail-fast: false
+      matrix:
+        os:
+          - macos-latest
+          - ubuntu-latest
+    runs-on: ${{ matrix.os }}
     steps:
       - name: Checkout the FreeRTOS/FreeRTOS Repository
-        uses: actions/checkout@v3
+        uses: actions/checkout@v4.1.1
         with:
           ref: main
           repository: FreeRTOS/FreeRTOS
@@ -70,12 +83,13 @@ jobs:
 
       # Checkout user pull request changes
       - name: Checkout Pull Request
-        uses: actions/checkout@v3
+        uses: actions/checkout@v4.1.1
         with:
           path: ./FreeRTOS/Source
 
       - name: Install GCC
         shell: bash
+        if: matrix.os == 'ubuntu-latest'
         run: |
           sudo apt-get -y update
           sudo apt-get -y install build-essential
@@ -96,7 +110,7 @@ jobs:
     steps:
       # Checkout user pull request changes
       - name: Checkout Repository
-        uses: actions/checkout@v3
+        uses: actions/checkout@v4.1.1
 
       - name: Install GCC
         shell: bash
@@ -123,7 +137,7 @@ jobs:
     runs-on: ubuntu-latest
     steps:
       - name: Checkout the FreeRTOS/FreeRTOS Repository
-        uses: actions/checkout@v3
+        uses: actions/checkout@v4.1.1
         with:
           ref: main
           repository: FreeRTOS/FreeRTOS
@@ -132,49 +146,139 @@ jobs:
 
       # Checkout user pull request changes
       - name: Checkout Pull Request
-        uses: actions/checkout@v3
+        uses: actions/checkout@v4.1.1
         with:
           path: ./FreeRTOS/Source
 
-      - name: Install MSP430 Toolchain
+      - env:
+          stepName: Install MSP430 Toolchain
         shell: bash
         run: |
-          sudo apt-get -y update
-          sudo apt-get -y install gcc-msp430 build-essential
+          # ${{ env.stepName }}
+          echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
+          curl -L -O https://dr-download.ti.com/software-development/ide-configuration-compiler-or-debugger/MD-LlCjWuAbzH/9.3.1.2/msp430-gcc-full-linux-x64-installer-9.3.1.2.7z
+          sudo apt update -y
+          sudo apt install -y p7zip-full
+          7z x ./msp430-gcc-full-linux-x64-installer-9.3.1.2.7z
+          chmod +x ./msp430-gcc-full-linux-x64-installer-9.3.1.2.run
+          sudo ./msp430-gcc-full-linux-x64-installer-9.3.1.2.run --prefix /usr/bin/msp430-gcc --mode unattended
+          echo "::endgroup::"
+          echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }}"
 
       - name: Build msp430_GCC Demo
         shell: bash
         working-directory: FreeRTOS/Demo/msp430_GCC
-        run: make -j
+        run: make -j CC=/usr/bin/msp430-gcc/bin/msp430-elf-gcc OPT="-Os -I/usr/bin/msp430-gcc/include -L/usr/bin/msp430-gcc/include"
+
+  MicroBlaze-GCC:
+    name: GCC MicroBlaze Toolchain
+    runs-on: ubuntu-latest
+    steps:
+      - name: Checkout the FreeRTOS/FreeRTOS Repository
+        uses: actions/checkout@v4.1.1
+        with:
+          ref: main
+          repository: FreeRTOS/FreeRTOS
+          fetch-depth: 1
+
+      - env:
+          stepName: Fetch Community-Supported-Demos Submodule
+        shell: bash
+        run: |
+          # ${{ env.stepName }}
+          echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
+          git submodule update --checkout --init --depth 1 FreeRTOS/Demo/ThirdParty/Community-Supported-Demos
+          # This repository contains the microblaze_instructions.h header file
+          git clone https://github.com/Xilinx/embeddedsw.git --branch xilinx_v2023.1
+          echo "::endgroup::"
+          echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }}"
+
+      # Checkout user pull request changes
+      - name: Checkout Pull Request
+        uses: actions/checkout@v4.1.1
+        with:
+          path: ./FreeRTOS/Source
+
+      - env:
+          stepName: Install Dependancies
+        shell: bash
+        run: |
+          # ${{ env.stepName }}
+          echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
+          sudo apt update -y
+          sudo apt upgrade -y
+          sudo apt install -y build-essential m4 debhelper bison texinfo dejagnu flex
+          sudo apt install -y autogen gawk libgmp-dev libmpc-dev libmpfr-dev
+          sudo apt install -y patchutils sharutils zlib1g-dev autoconf2.64
+
+          # Download the mb-gcc toolchain from github
+          curl -L -O https://github.com/mdednev/mb-gcc/releases/download/2021-0623%2B2/binutils-microblaze_2.35-2021-0623+1_amd64.deb;
+          curl -L -O https://github.com/mdednev/mb-gcc/releases/download/2021-0623%2B2/gcc-microblaze_10.2.0-2021-0623+2_amd64.deb;
+          curl -L -O https://github.com/mdednev/mb-gcc/releases/download/2021-0623%2B2/libnewlib-microblaze-dev_3.3.0-2021-0623+3_all.deb;
+          curl -L -O https://github.com/mdednev/mb-gcc/releases/download/2021-0623%2B2/libnewlib-microblaze-doc_3.3.0-2021-0623+3_all.deb;
+          curl -L -O https://github.com/mdednev/mb-gcc/releases/download/2021-0623%2B2/libnewlib-microblaze_3.3.0-2021-0623+3_all.deb;
+          curl -L -O https://github.com/mdednev/mb-gcc/releases/download/2021-0623%2B2/newlib-source_3.3.0-2021-0623+3_all.deb;
+
+          # Install the packages for the toolchain
+          sudo apt install -y ./binutils-microblaze*.deb;
+          sudo apt install -y ./gcc-microblaze*.deb;
+          sudo apt install -y ./libnewlib-microblaze-dev*.deb;
+          sudo apt install -y ./libnewlib-microblaze-doc*.deb;
+          sudo apt install -y ./libnewlib-microblaze*.deb;
+          sudo apt install -y ./newlib-source*.deb;
+
+          # Validate that the toolchain is in the path and can be called
+          which mb-gcc
+          mb-gcc --version
+
+          echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }}"
+
+      - env:
+          stepName: Compile Microblaze Port
+        shell: bash
+        run: |
+          # ${{ env.stepName }}
+          echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
+          # Compile MicroBlazeV9 Port files to validate they build
+          mb-gcc -mcpu=v9.5 -c \
+            FreeRTOS/Source/portable/GCC/MicroBlazeV9/port.c \
+            FreeRTOS/Source/portable/GCC/MicroBlazeV9/portasm.S \
+            FreeRTOS/Source/portable/GCC/MicroBlazeV9/port_exceptions.c \
+            FreeRTOS/Source/tasks.c \
+            FreeRTOS/Source/list.c \
+            -I embeddedsw/lib/bsp/standalone/src/microblaze \
+            -I FreeRTOS/Source/portable/GCC/MicroBlazeV9/ \
+            -I FreeRTOS/Source/include \
+            -I FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src \
+            -I FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/BSP/microblaze_0/libsrc/standalone_v5_4/src \
+            -I FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/BSP/microblaze_0/include \
+            -I FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/BSP/microblaze_0/libsrc/intc_v3_5/src
+          echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }}"
+
 
   ARM-GCC:
     name: GNU ARM Toolchain
     runs-on: ubuntu-latest
     steps:
       - name: Checkout the FreeRTOS/FreeRTOS Repository
-        uses: actions/checkout@v3
+        uses: actions/checkout@v4.1.1
         with:
           ref: main
           repository: FreeRTOS/FreeRTOS
           fetch-depth: 1
 
-      - name: Fetch Community-Supported-Demos Submodule
+      - env:
+          stepName: Fetch Dependencies
         shell: bash
         run: |
-          # Fetch Community-Supported-Demos Submodule
-          echo "::group::Fetch Community-Supported-Demos Submodule"
-          git submodule update --checkout --init --depth 1 FreeRTOS/Demo/ThirdParty/Community-Supported-Demos
-          echo "::engdroup::"
-          if [ "$?" = "0" ]; then
-            echo -e "\033[32;3mCloned the Community-Supported-Demos\033[0m"
-          else
-            echo -e "\033[32;31mCommunity-Supported-Demos Clone Failed...\033[0m"
-            exit 1
-          fi
+          # ${{ env.stepName }}
+          echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
+          git submodule update --checkout --init --depth 1 FreeRTOS/Demo/ThirdParty/Community-Supported-Demos FreeRTOS-Plus/Source/FreeRTOS-Plus-Trace
+          echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }}"
 
       # Checkout user pull request changes
       - name: Checkout Pull Request
-        uses: actions/checkout@v3
+        uses: actions/checkout@v4.1.1
         with:
           path: ./FreeRTOS/Source
 
@@ -189,6 +293,16 @@ jobs:
         working-directory: FreeRTOS/Demo/CORTEX_MPU_M3_MPS2_QEMU_GCC
         run: make -j
 
+      - name: Build CORTEX_MPU_R4F_TI_RM46_HERCULES_GCC Demo
+        shell: bash
+        working-directory: FreeRTOS/Demo/CORTEX_MPU_R4F_TI_RM46_HERCULES_GCC
+        run: cmake -S . -B build && make -j -C build all
+
+      - name: Build CORTEX_MPU_R5F_TI_RM57_HERCULES_GCC Demo
+        shell: bash
+        working-directory: FreeRTOS/Demo/CORTEX_MPU_R5F_TI_RM57_HERCULES_GCC
+        run: cmake -S . -B build && make -j -C build all
+
       - name: Build CORTEX_LM3S102_GCC Demo
         shell: bash
         working-directory: FreeRTOS/Demo/CORTEX_LM3S102_GCC

.github/workflows/unit-tests.yml

@@ -6,7 +6,7 @@ jobs:
     runs-on: ubuntu-20.04
     steps:
     - name: Checkout Parent Repository
-      uses: actions/checkout@v3
+      uses: actions/checkout@v4.1.1
       with:
         ref: main
         repository: FreeRTOS/FreeRTOS
@@ -15,7 +15,7 @@ jobs:
 
     # Checkout user pull request changes
     - name: Checkout Pull Request
-      uses: actions/checkout@v3
+      uses: actions/checkout@v4.1.1
       with:
         path: ./FreeRTOS/Source
 
@@ -45,12 +45,12 @@ jobs:
         fail_ci_if_error: false
         verbose: false
     - name: Archive code coverage data
-      uses: actions/upload-artifact@v2
+      uses: actions/upload-artifact@v4
       with:
         name: coverage-data
         path: FreeRTOS/Test/CMock/build/cmock_test*
     - name: Archive code coverage html report
-      uses: actions/upload-artifact@v2
+      uses: actions/upload-artifact@v4
       with:
         name: coverage-report
         path: FreeRTOS/Test/CMock/build/coverage

CMakeLists.txt

@@ -85,6 +85,7 @@ if(NOT FREERTOS_PORT)
         " GCC_ARM_CM85_NTZ_NONSECURE       - Compiler: GCC           Target: ARM Cortex-M85 non-trustzone non-secure\n"
         " GCC_ARM_CM85_TFM                 - Compiler: GCC           Target: ARM Cortex-M85 non-secure for TF-M\n"
         " GCC_ARM_CR5                      - Compiler: GCC           Target: ARM Cortex-R5\n"
+        " GCC_ARM_CRX_MPU                  - Compiler: GCC           Target: ARM Cortex-Rx with MPU\n"
         " GCC_ARM_CRX_NOGIC                - Compiler: GCC           Target: ARM Cortex-Rx no GIC\n"
         " GCC_ARM7_AT91FR40008             - Compiler: GCC           Target: ARM7 Atmel AT91R40008\n"
         " GCC_ARM7_AT91SAM7S               - Compiler: GCC           Target: ARM7 Atmel AT91SAM7S\n"
@@ -137,15 +138,18 @@ if(NOT FREERTOS_PORT)
         " IAR_ARM_CM33_NONSECURE           - Compiler: IAR           Target: ARM Cortex-M33 non-secure\n"
         " IAR_ARM_CM33_SECURE              - Compiler: IAR           Target: ARM Cortex-M33 secure\n"
         " IAR_ARM_CM33_NTZ_NONSECURE       - Compiler: IAR           Target: ARM Cortex-M33 non-trustzone non-secure\n"
+        " IAR_ARM_CM33_TFM                 - Compiler: IAR           Target: ARM Cortex-M33 non-secure for TF-M\n"
         " IAR_ARM_CM35P_NONSECURE          - Compiler: IAR           Target: ARM Cortex-M35P non-secure\n"
         " IAR_ARM_CM35P_SECURE             - Compiler: IAR           Target: ARM Cortex-M35P secure\n"
         " IAR_ARM_CM35P_NTZ_NONSECURE      - Compiler: IAR           Target: ARM Cortex-M35P non-trustzone non-secure\n"
         " IAR_ARM_CM55_NONSECURE           - Compiler: IAR           Target: ARM Cortex-M55 non-secure\n"
         " IAR_ARM_CM55_SECURE              - Compiler: IAR           Target: ARM Cortex-M55 secure\n"
         " IAR_ARM_CM55_NTZ_NONSECURE       - Compiler: IAR           Target: ARM Cortex-M55 non-trustzone non-secure\n"
+        " IAR_ARM_CM55_TFM                 - Compiler: IAR           Target: ARM Cortex-M55 non-secure for TF-M\n"
         " IAR_ARM_CM85_NONSECURE           - Compiler: IAR           Target: ARM Cortex-M85 non-secure\n"
         " IAR_ARM_CM85_SECURE              - Compiler: IAR           Target: ARM Cortex-M85 secure\n"
         " IAR_ARM_CM85_NTZ_NONSECURE       - Compiler: IAR           Target: ARM Cortex-M85 non-trustzone non-secure\n"
+        " IAR_ARM_CM85_TFM                 - Compiler: IAR           Target: ARM Cortex-M85 non-secure for TF-M\n"
         " IAR_ARM_CRX_NOGIC                - Compiler: IAR           Target: ARM Cortex-Rx no GIC\n"
         " IAR_ATMEGA323                    - Compiler: IAR           Target: ATMega323\n"
         " IAR_ATMEL_SAM7S64                - Compiler: IAR           Target: Atmel SAM7S64\n"
@@ -217,16 +221,17 @@ elseif((FREERTOS_PORT STREQUAL "A_CUSTOM_PORT") AND (NOT TARGET freertos_kernel_
     "    port.c\n"
     "    portmacro.h\n"
     " Where FreeRTOSCustomPort/CMakeLists.txt is a modified version of:\n"
-    "   add_library(freertos_kernel_port STATIC)\n"
+    "   add_library(freertos_kernel_port OBJECT)\n"
     "   target_sources(freertos_kernel_port\n"
     "     PRIVATE\n"
     "       port.c\n"
     "       portmacro.h)\n"
-    "   target_include_directories(freertos_kernel_port\n"
-    "     PUBLIC\n"
+    "   add_library(freertos_kernel_port_headers INTERFACE)\n"
+    "     target_include_directories(freertos_kernel_port_headers INTERFACE \n"
     "      .)\n"
     "   target_link_libraries(freertos_kernel_port\n"
     "     PRIVATE\n"
+    "       freertos_kernel_port_headers\n"
     "       freertos_kernel_include)")
 endif()
 
@@ -257,8 +262,11 @@ endif()
 
 target_link_libraries(freertos_kernel
     PUBLIC
-        freertos_kernel_port
         freertos_kernel_include
+        freertos_kernel_port_headers
+    PRIVATE
+        freertos_kernel_port
+
 )
 
 ########################################################################

History.txt

@@ -1,5 +1,217 @@
 Documentation and download available at https://www.FreeRTOS.org/
 
+Changes between FreeRTOS V11.1.0 and FreeRTOS V11.2.0 released March 04, 2025
+
+    + Add CC-RH port for Renesas F1Kx devices. We thank @TrongNguyenR for their
+      contribution.
+    + Add Pointer Authentication (PAC) and Branch Target Identification (BTI)
+      support to the ARMv8-M ports. We thank @AhmedIsmail02 for their
+      contribution.
+    + Add Floating Point Unit (FPU) support to the ARM_AARCH64 port. We thank
+      @StefanBalt for their contribution.
+    + Add FPU Safe Application IRQ Handler suport to the ARM_AARCH64_SRE port.
+      We thank @GhMarwen for their contribution.
+    + Add Privileged eXecute Never MPU attribute support to the ARMv8-M ports.
+      We thank @AhmedIsmail02 for their contribution.
+    + Update XMOS xcore.ai port to be compatible with FreeRTOS Kernel version
+      11. We thank @ACascarino for their contribution.
+    + ARM_CRx_No_GIC port updates:
+      - Remove inline assembly and move assembly code to separate portASM.S
+        file.
+      - Add support for Floating Point Unit (FPU).
+      - Add support to allow the application writer to handle SVC calls raised
+        from the application code.
+      - Add support for vApplicationFPUSafeIRQHandler.
+    + POSIX port updates:
+      - Set PTHREAD_MUTEX_ROBUST attribute on the mutex to prevent application
+        hangs when a thread dies while holding a mutex.
+      - Avoid calling pthread_sigmask on non-FreeROS threads when
+        vPortEndScheduler is called from a non-FreeRTOS thread. We thank
+        @johnboiles for their contribution.
+      - Remove unnecessary call to pthread_attr_setstacksize. We thank
+        @hollinsky for their contribution.
+      - Add an assert to catch if vPortYield is called from a non-FreeRTOS
+        thread. We thank @johnboiles for their contribution.
+      - Fix Posix port compilation on FreeBSD. We thank @tymmej for their
+        contribution.
+    + Update the Xtensa port and move it to the Partner-Supported-Ports
+      repository. We thank @ianstcdns for their contribution.
+    + Add vPortGenerateSimulatedInterruptFromWindowsThread API in the MSVC-MingW
+      port to enable native windows thread to synchronize with FreeRTOS task
+      through simulated interrupt.
+    + Update Windows port to use Waitable Timer instead of Sleep to improve tick
+      accuracy. We thank @bknicholls and @leegeth for their contribution.
+    + Update the value of queueQUEUE_TYPE_SET to a unique value (5) to allow
+      tracers to differentiate between queues and queue sets. We thank @schilkp
+      for their contribution.
+    + Add traceSTARTING_SCHEDULER tracing hook to enable tracers to run code on
+      startup. We thank @schilkp for their contribution.
+    + Define vApplicationGetTimerTaskMemory only when configUSE_TIMERS is set to
+      1. We thank @HazardyKnusperkeks for their contribution.
+    + Reset xNextTaskUnblockTime in task notify FromISR APIs to allow the core
+      to enter sleep mode at the earliest possible time when using tickless
+      idle.
+    + Optimize xTaskIncrementTick for SMP by removing xYieldRequiredForCore. We
+      thank @cymizer for their contribution.
+    + Update the SMP scheduler to re-select a core to yield when the core
+      affinity of a ready task is changed.
+    + Update xEventGroupSetBits to read the event bits value to be returned to
+      the caller while the scheduler is suspended. This fixes dereference after
+      the event group is deleted by higher priority task. We thank @skotopes for
+      their contribution.
+    + Optimize certain getter APIs by removing unnecessary calls to
+      task{ENTER|EXIT}_CRITICAL() when the data access is atomic. We thank
+      @GuilhermeGiacomoSimoes for their contribution.
+    + Optimize xTaskNotifyWait and ulTaskNotifyTake APIs to suspend the
+      scheduler only if the task is not already notified, and the caller is
+      willing to wait for the notification. We thank @jefftenney for
+      their contribution.
+    + Fix error checking of prvCreateIdleTasks. We thank @kakkoko for their
+      contribution.
+    + Update SMP lock macros and critical nesting macros to pass core ID as an
+      argument. This reduces the number of accesses to a peripheral register to
+      query core ID. We thank @felixvanoost for their contribution.
+    + Add stack pointer bounds check when configCHECK_FOR_STACK_OVERFLOW is set
+      to 2 to improve reliability of stack overflow detection. We thank
+      @jiladahe1997 for their contribution.
+    + Update run-time stats to include time elapsed since the last context
+      switch for the currently running task.
+    + Add xQueueCreateSetStatic API for static creation of Queue Sets. We thank
+      @kzorer for their contribution.
+    + Update the traceMALLOC() macro to pass the actual size of the allocated
+      block for secure_heap, heap_2, heap_4 and heap_5. We thank @DazzlingOkami
+      for their contribution.
+    + Update heap_1 to use heapADD_WILL_OVERFLOW macro to improve readability.
+      We thank @wdfk-prog for their contribution.
+    + Add pointer protection to the pxNextFreeBlock member of the allocated
+      block's metadata in heap_4 and heap_5 when configENABLE_HEAP_PROTECTOR is
+      set to 1. We thank @Saiiijchan for their contribution.
+    + Allow the application writer to override pointer validation for heap_5
+      when configENABLE_HEAP_PROTECTOR is used. We thank @Saiiijchan for their
+      contribution.
+    + Add xPortResetHeapMinimumEverFreeHeapSize to heap_4.c and heap_5.c.
+      We thank @TomasGalbickaNXP for their contribution.
+    + Add NULL check in the event_create function in the POSIX port. We thank
+      @laroche for their contribution.
+    + Use _GNU_SOURCE macro instead of __USE_GNU in the Posix port. We thank
+      @maxiaogood for their contribution.
+    + Use the new __ARM_FP macro instead of the deprectred __VFP_FP__ macro in
+      GCC/ARM_CM7, GCC/ARM_CM4_MPU, and GCC/ARM_CM4F ports. We thank @haydenridd
+      for their contribution.
+    + Add portMEMORY_BARRIER definition to the Xtensa port. We thank @superroc
+      for their contribution.
+    + Move the hardware include msp430.h to port.c from portmacro.h. We thank
+      @mayl for their contribution.
+    + Update ARM assembly syntax for Cortex-M ports. We thank @laroche for their
+      contribution.
+    + Update the Windows port to records a pending yield in
+      vPortCloseRunningThread to ensure that the next tick interrupt schedules
+      the next task regardless of the value of configUSE_PREEMPTION.
+    + Fix the context switch issue in the RL78 port. We thank @KeitaKashima for
+      their contribution.
+    + Fix compilation issue in ARM CM0 port when using Keil MDK. We thank
+      @TomasGalbickaNXP for their contribution.
+    + Fix IA32 port compilation when configUSE_COMMON_INTERRUPT_ENTRY_POINT is
+      set to 0. We thank @Ryzee119 for their contribution.
+    + Store configMTIMECMP_BASE_ADDRESS in a 64-bit integer for the RISC-V port.
+      We thank @vishwamartur for their contribution.
+    + Fix nested interrupt handling and optimize FPU related context switching
+      for the F1Kx port. We thank @TrongNguyenR for their contribution.
+    + Update the RP2040 port to add support for Raspberry Pi Pico SDK 2.0.0.
+      We thank @kilograham for their contribution.
+    + Fix the return value of portYIELD_FROM_ISR macro for the MSVC-MingW port.
+      We thank @wwhheerree for their contribution.
+    + Optimize vApplicationFPUSafeIRQHandler for the Coretex-A9 port by
+      removing the unnecessarily preserved callee saved registers. We thank
+      @Saiiijchan for their contribution.
+    + Fix the context array size for MPU ports to ensure the saved context
+      location falls within the reserved context area rather than overlapping
+      with the next MPU_SETTINGS structure member.
+    + Update CMake files for RP2040 port to fetch the port from the
+      Community-Supported-Ports repo. We thank @kilograham for their
+      contribution.
+    + Fix CMake file for the GCC ARM_CM0 port to include MPU files. We thank
+      @0mhu for their contribution.
+    + Add an example of human readable table generated by vTaskListTasks() in
+      the function documentation. We thank @wwhheerree for their contribution.
+
+Changes between FreeRTOS V11.0.1 and FreeRTOS V11.1.0 released April 22, 2024
+
+    + Add ARMv7-R port with Memory Protection Unit (MPU) support.
+    + Add Memory Protection Unit (MPU) support to the Cortex-M0 port.
+    + Add stream batching buffer. A stream batching buffer differs from a stream
+      buffer when a task reads from a non-empty buffer:
+      - The task reading from a non-empty stream buffer returns immediately
+        regardless of the amount of data in the buffer.
+      - The task reading from a non-empty steam batching buffer blocks until the
+        amount of data in the buffer exceeds the trigger level or the block time
+        expires.
+      We thank @cperkulator for their contribution.
+    + Add the ability to change task notification index for stream buffers. We
+      thank @glemco for their contribution.
+    + Add xStreamBufferResetFromISR and xMessageBufferResetFromISR APIs to reset
+      stream buffer and message buffer from an Interrupt Service Routine (ISR).
+      We thank @HagaiMoshe for their contribution.
+    + Update all the FreeRTOS APIs to use configSTACK_DEPTH_TYPE for stack type.
+      We thank @feilipu for their contribution.
+    + Update vTaskEndScheduler to delete the timer and idle tasks,
+      once the scheduler is stopped.
+    + Make xTaskGetCurrentTaskHandleForCore() available to the single core
+      scheduler. We thank @Dazza0 for their contribution.
+    + Update uxTaskGetSystemState to not use the pxIndex member of the List_t
+      structure while iterating ready tasks list. The reason is that pxIndex
+      member must only used to select next ready task to run. We thank
+      @gemarcano for their inputs.
+    + Add a config option to the FreeRTOS SMP Kernel to set the default core
+      affinity mask for tasks created without an affinity mask. We thank @go2sh
+      for their contribution.
+    + Add configUSE_EVENT_GROUPS and configUSE_STREAM_BUFFERS configuration
+      constants to control the inclusion of event group and stream buffer
+      functionalities.
+    + Code changes to comply with MISRA C 2012.
+    + Add 64-bit support to the FreeRTOS Windows Simulator port. We thank @watsk
+      and @josesimoes for their contributions.
+    + Add support for 64-bit Microblaze processor to the MicroblazeV9 port. We
+      thank @mubinsyed for their contribution.
+    + Add support for MSP430 Embedded Application Binary Interface (EABI) to
+      the MSP430F449 port to make it work with both MSP430 GCC and MSPGCC
+      compilers. We thank @Forty-Bot for their contribution.
+    + Update xPortIsAuthorizedToAccessBuffer() on FreeRTOS ports with MPU
+      support to grant an unprivileged task access to all the memory before the
+      scheduler is started.
+    + Update the POSIX port to pass the FreeRTOS task name to pthread for
+      readable output in debuggers. We thank @Mixaill for their contribution.
+    + Update the POSIX port to ignore the user specified stack memory and only
+      pass the stack size to the pthread API to avoid errors caused when stack size
+      is smaller than the minimum. We thank @cmorgnaBE for their
+      contribution.
+    + Update the POSIX port to use a timer thread for tick interrupts instead of
+      POSIX timers to address issues with signal handling in non-FreeRTOS
+      pthreads. We thank @cmorgnaBE for their contribution.
+    + Update ARM_TFM port to support TF-Mv2.0.0 release of trusted-firmware-m.
+      We thanks @urutva for their contribution.
+    + Remove redundant constant pools in ARMv8 ports. We thank @urutva for their
+      contribution.
+    + Add APIs to reset the internal state of kernel modules. These APIs are
+      primarily intended to be used in the testing frameworks that restart the
+      scheduler.
+    + Use kernel provided implementations of vApplicationGetIdleTaskMemory() and
+      vApplicationGetTimerTaskMemory() in the RP2040 port. We thank @dpslwk for
+      their contribution.
+    + Fix atomic enter/exit critical section macro definitions in atomic.h for
+      ports that support nested interrupts. We thank @sebunger for their
+      contribution.
+    + Fix compiler warnings in the MSP430F449 port when compiled with the
+      MSP430 GCC compiler. We thank @Forty-Bot for their contribution.
+    + Update the scheduler suspension usage in ulTaskGenericNotifyTake and
+      xTaskGenericNotifyWait() to enhance code readability. We thank @Dazza0 for
+      their contribution.
+    + Add support for latest version of MPU wrappers( mpu_wrappers_v2) in CMake.
+      We thank @IsaacDynamo for their contribution.
+    + Update CMake support to create only one static library containing both the
+      kernel common code and the kernel port code. We thank @barnatahmed for
+      their contribution.
+
 Changes between FreeRTOS V11.0.0 and FreeRTOS V11.0.1 released December 21, 2023
 
     + Updated the SBOM file.
@@ -451,7 +663,7 @@ Changes between FreeRTOS V10.4.3 and FreeRTOS V10.4.4 released May 28 2021
 	  in more files.
 	+ Other minor updates include adding additional configASSERT() checks and
 	  correcting and improving code comments.
-	+ Go look at the smp branch to see the progress towards the Symetric
+	+ Go look at the smp branch to see the progress towards the Symmetric
 	  Multiprocessing Kernel. https://github.com/FreeRTOS/FreeRTOS-Kernel/tree/smp
 
 Changes between FreeRTOS V10.4.2 and FreeRTOS V10.4.3 released December 14 2020
@@ -1938,7 +2150,7 @@ Changes between V6.1.0 and V6.1.1 released January 14 2011
 	  Embedded Workbench.
 	+ Added a new port for the MSP430X core using the IAR Embedded Workbench.
 	+ Updated all the RX62N demo projects that target the Renesas Demonstration
-	  Kit (RDK) to take into account the revered LED wiring on later hardware
+	  Kit (RDK) to take into account the reversed LED wiring on later hardware
 	  revisions, and the new J-Link debug interface DLL.
 	+ Updated all the RX62N demo projects so the IO page served by the example
 	  embedded web server works with all web browsers.
@@ -3097,7 +3309,7 @@ Changes between V1.2.3 and V1.2.4
 	  xSerialPortInitMinimal() and the function xPortInit() has been renamed
 	  to xSerialPortInit().
 	+ The function sSerialPutChar() has been renamed cSerialPutChar() and
-	  the function return type chaned to portCHAR.
+	  the function return type changed to portCHAR.
 	+ The integer and flop tasks now include calls to tskYIELD(), allowing
 	  them to be used with the cooperative scheduler.
 	+ All the demo applications now use the integer and comtest tasks when the
@@ -3231,7 +3443,7 @@ Changes between V1.01 and V1.2.0
 	  ports to allocate a different maximum number of priorities.
 	+ By default the trace facility is off, previously USE_TRACE_FACILITY
 	  was defined.
-	+ comtest.c now uses a psuedo random delay between sends.  This allows for
+	+ comtest.c now uses a pseudo random delay between sends.  This allows for
 	  better testing as the interrupts do not arrive at regular intervals.
 	+ Minor change to the Flashlite serial port driver.  The driver is written
 	  to demonstrate the scheduler and is not written to be efficient.

MISRA.md

@@ -2,11 +2,11 @@
 
 FreeRTOS-Kernel conforms to [MISRA C:2012](https://www.misra.org.uk/misra-c)
 guidelines, with the deviations listed below. Compliance is checked with
-Coverity static analysis. Since the FreeRTOS kernel is designed for
-small-embedded devices, it needs to have a very small memory footprint and
-has to be efficient. To achieve that and to increase the performance, it
-deviates from some MISRA rules. The specific deviations, suppressed inline,
-are listed below.
+Coverity static analysis version 2023.6.1. Since the FreeRTOS kernel is
+designed for small-embedded devices, it needs to have a very small memory
+footprint and has to be efficient. To achieve that and to increase the
+performance, it deviates from some MISRA rules. The specific deviations,
+suppressed inline, are listed below.
 
 Additionally, [MISRA configuration file](examples/coverity/coverity_misra.config)
 contains project wide deviations.
@@ -18,6 +18,14 @@ with ( Assuming rule 8.4 violation; with justification in point 1 ):
 grep 'MISRA Ref 8.4.1' . -rI
 ```
 
+#### Dir 4.7
+MISRA C:2012 Dir 4.7: If a function returns error information, then that error
+information shall be tested.
+
+_Ref 4.7.1_
+ - `taskENTER_CRITICAL_FROM_ISR` returns the interrupt mask and not any error
+    information. Therefore, there is no need test the return value.
+
 #### Rule 8.4
 
 MISRA C:2012 Rule 8.4: A compatible declaration shall be visible when an
@@ -107,6 +115,25 @@ _Ref 11.5.5_
    because data storage buffers are implemented as uint8_t arrays for the
    ease of sizing, alignment and access.
 
+#### Rule 14.3
+
+MISRA C-2012 Rule 14.3: Controlling expressions shall not be invariant.
+
+_Ref 14.3_
+ - The `configMAX_TASK_NAME_LEN` , `taskRESERVED_TASK_NAME_LENGTH` and `SIZE_MAX`
+   are evaluated to constants at compile time and may vary based on the build
+   configuration.
+
+#### Rule 18.1
+
+MISRA C-2012 Rule 18.1: A pointer resulting from arithmetic on a pointer operand
+shall address an element of the same array as that pointer operand.
+
+_Ref 18.1_
+ - Array access remains within bounds since either the null terminator in
+   the IDLE task name will break the loop, or the loop will break normally
+   if the array size is smaller than the IDLE task name length.
+
 #### Rule 21.6
 
 MISRA C-2012 Rule 21.6: The Standard Library input/output functions shall not

README.md

@@ -14,16 +14,22 @@ application projects.  That way you will have the correct FreeRTOS source files
 included, and the correct include paths configured. Once a demo application is
 building and executing you can remove the demo application files, and start to
 add in your own application source files.  See the
-[FreeRTOS Kernel Quick Start Guide](https://www.FreeRTOS.org/FreeRTOS-quick-start-guide.html)
+[FreeRTOS Kernel Quick Start Guide](https://www.freertos.org/Documentation/01-FreeRTOS-quick-start/01-Beginners-guide/02-Quick-start-guide)
 for detailed instructions and other useful links.
 
 Additionally, for FreeRTOS kernel feature information refer to the
-[Developer Documentation](https://www.FreeRTOS.org/features.html),
-and [API Reference](https://www.FreeRTOS.org/a00106.html).
+[Developer Documentation](https://www.freertos.org/Documentation/02-Kernel/02-Kernel-features/00-Developer-docs),
+and [API Reference](https://www.freertos.org/Documentation/02-Kernel/04-API-references/01-Task-creation/00-TaskHandle).
 
 Also for contributing and creating a Pull Request please refer to
 [the instructions here](.github/CONTRIBUTING.md#contributing-via-pull-request).
 
+**FreeRTOS-Kernel V11.1.0
+[source code](https://github.com/FreeRTOS/FreeRTOS-Kernel/tree/V11.1.0) is part
+of the
+[FreeRTOS 202406.00 LTS](https://github.com/FreeRTOS/FreeRTOS-LTS/tree/202406-LTS)
+release.**
+
 ### Getting help
 
 If you have any questions or need assistance troubleshooting your FreeRTOS project,
@@ -180,3 +186,7 @@ then sort the list, which can be done by running the bash command:
 Note that only the FreeRTOS-Kernel Source Files, [include](include),
 [portable/MemMang](portable/MemMang), and [portable/Common](portable/Common)
 files are checked for proper spelling, and formatting at this time.
+
+## Third Party Tools
+Visit [this link](.github/third_party_tools.md) for detailed information about
+third-party tools with FreeRTOS support.

croutine.c

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -30,7 +30,7 @@
 #include "task.h"
 #include "croutine.h"
 
-/* Remove the whole file is co-routines are not being used. */
+/* Remove the whole file if co-routines are not being used. */
 #if ( configUSE_CO_ROUTINES != 0 )
 
 /*
@@ -52,8 +52,10 @@
 
 /* Other file private variables. --------------------------------*/
     CRCB_t * pxCurrentCoRoutine = NULL;
-    static UBaseType_t uxTopCoRoutineReadyPriority = 0;
-    static TickType_t xCoRoutineTickCount = 0, xLastTickCount = 0, xPassedTicks = 0;
+    static UBaseType_t uxTopCoRoutineReadyPriority = ( UBaseType_t ) 0U;
+    static TickType_t xCoRoutineTickCount = ( TickType_t ) 0U;
+    static TickType_t xLastTickCount = ( TickType_t ) 0U;
+    static TickType_t xPassedTicks = ( TickType_t ) 0U;
 
 /* The initial state of the co-routine when it is created. */
     #define corINITIAL_STATE    ( 0 )
@@ -378,5 +380,26 @@
 
         return xReturn;
     }
+/*-----------------------------------------------------------*/
+
+/*
+ * Reset state in this file. This state is normally initialized at start up.
+ * This function must be called by the application before restarting the
+ * scheduler.
+ */
+    void vCoRoutineResetState( void )
+    {
+        /* Lists for ready and blocked co-routines. */
+        pxDelayedCoRoutineList = NULL;
+        pxOverflowDelayedCoRoutineList = NULL;
+
+        /* Other file private variables. */
+        pxCurrentCoRoutine = NULL;
+        uxTopCoRoutineReadyPriority = ( UBaseType_t ) 0U;
+        xCoRoutineTickCount = ( TickType_t ) 0U;
+        xLastTickCount = ( TickType_t ) 0U;
+        xPassedTicks = ( TickType_t ) 0U;
+    }
+/*-----------------------------------------------------------*/
 
 #endif /* configUSE_CO_ROUTINES == 0 */

examples/README.md

@@ -0,0 +1,17 @@
+# README for FreeRTOS-Kernel/examples
+
+The easiest way to use FreeRTOS is to start with one of the pre-configured demo application projects.
+See [FreeRTOS/FreeRTOS/Demo](https://github.com/FreeRTOS/FreeRTOS/tree/main/FreeRTOS/Demo) to find a list of pre-configured demos on multiple platforms which demonstrate the working of the FreeRTOS-Kernel.
+This directory aims to further facilitate the beginners in building their first FreeRTOS project.
+
+
+## Directory Structure:
+
+* The [cmake_example](./cmake_example) directory contains a minimal FreeRTOS example project, which uses the configuration file in the template_configuration directory listed below. This will provide you with a starting point for building your applications using FreeRTOS-Kernel.
+* The [coverity](./coverity) directory contains a project to run [Synopsys Coverity](https://www.synopsys.com/software-integrity/static-analysis-tools-sast/coverity.html) for checking MISRA compliance. This directory contains further readme files and links to documentation.
+* The [template_configuration](./template_configuration) directory contains a sample configuration file FreeRTOSConfig.h which helps you in preparing your application configuration
+
+
+## Additional examples
+
+Additional examples of the kernel being used in real life applications in tandem with many other libraries (i.e. FreeRTOS+TCP, coreMQTT, coreHTTP etc.) can be found [here](https://github.com/FreeRTOS/FreeRTOS/tree/main/FreeRTOS-Plus/Demo).

examples/cmake_example/CMakeLists.txt

@@ -1,5 +1,4 @@
 cmake_minimum_required(VERSION 3.15)
-
 project(example)
 
 set(FREERTOS_KERNEL_PATH "../../")
@@ -71,3 +70,5 @@ add_executable(${PROJECT_NAME}
 )
 
 target_link_libraries(${PROJECT_NAME} freertos_kernel freertos_config)
+
+set_property(TARGET freertos_kernel PROPERTY C_STANDARD 90)

examples/cmake_example/main.c

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -30,7 +30,7 @@
  * This is a simple main that will start the FreeRTOS-Kernel and run a periodic task
  * that only delays if compiled with the template port, this project will do nothing.
  * For more information on getting started please look here:
- * https://freertos.org/FreeRTOS-quick-start-guide.html
+ * https://www.freertos.org/Documentation/01-FreeRTOS-quick-start/01-Beginners-guide/02-Quick-start-guide
  */
 
 /* FreeRTOS includes. */
@@ -43,7 +43,13 @@
 /* Standard includes. */
 #include <stdio.h>
 
-void exampleTask( void * parameters )
+/*-----------------------------------------------------------*/
+
+static void exampleTask( void * parameters ) __attribute__( ( noreturn ) );
+
+/*-----------------------------------------------------------*/
+
+static void exampleTask( void * parameters )
 {
     /* Unused parameters. */
     ( void ) parameters;
@@ -56,20 +62,20 @@ void exampleTask( void * parameters )
 }
 /*-----------------------------------------------------------*/
 
-void main( void )
+int main( void )
 {
     static StaticTask_t exampleTaskTCB;
     static StackType_t exampleTaskStack[ configMINIMAL_STACK_SIZE ];
 
-    printf( "Example FreeRTOS Project\n" );
+    ( void ) printf( "Example FreeRTOS Project\n" );
 
-    xTaskCreateStatic( exampleTask,
-                       "example",
-                       configMINIMAL_STACK_SIZE,
-                       NULL,
-                       configMAX_PRIORITIES - 1,
-                       &( exampleTaskStack[ 0 ] ),
-                       &( exampleTaskTCB ) );
+    ( void ) xTaskCreateStatic( exampleTask,
+                                "example",
+                                configMINIMAL_STACK_SIZE,
+                                NULL,
+                                configMAX_PRIORITIES - 1U,
+                                &( exampleTaskStack[ 0 ] ),
+                                &( exampleTaskTCB ) );
 
     /* Start the scheduler. */
     vTaskStartScheduler();
@@ -78,15 +84,21 @@ void main( void )
     {
         /* Should not reach here. */
     }
+
+    return 0;
 }
 /*-----------------------------------------------------------*/
 
-void vApplicationStackOverflowHook( TaskHandle_t xTask,
-                                    char * pcTaskName )
-{
-    /* Check pcTaskName for the name of the offending task,
-     * or pxCurrentTCB if pcTaskName has itself been corrupted. */
-    ( void ) xTask;
-    ( void ) pcTaskName;
-}
+#if ( configCHECK_FOR_STACK_OVERFLOW > 0 )
+
+    void vApplicationStackOverflowHook( TaskHandle_t xTask,
+                                        char * pcTaskName )
+    {
+        /* Check pcTaskName for the name of the offending task,
+         * or pxCurrentTCB if pcTaskName has itself been corrupted. */
+        ( void ) xTask;
+        ( void ) pcTaskName;
+    }
+
+#endif /* #if ( configCHECK_FOR_STACK_OVERFLOW > 0 ) */
 /*-----------------------------------------------------------*/

examples/coverity/CMakeLists.txt

@@ -2,8 +2,9 @@ cmake_minimum_required(VERSION 3.15)
 
 project(coverity)
 
-set(FREERTOS_KERNEL_PATH "../../")
-FILE(GLOB FREERTOS_KERNEL_SOURCE ${FREERTOS_KERNEL_PATH}*.c)
+set(FREERTOS_KERNEL_PATH "../..")
+FILE(GLOB FREERTOS_KERNEL_SOURCE ${FREERTOS_KERNEL_PATH}/*.c)
+FILE(GLOB FREERTOS_PORT_CODE ${FREERTOS_KERNEL_PATH}/portable/template/*.c)
 
 # Coverity incorrectly infers the type of pdTRUE and pdFALSE as boolean because
 # of their names. This generates multiple false positive warnings about type
@@ -12,8 +13,8 @@ FILE(GLOB FREERTOS_KERNEL_SOURCE ${FREERTOS_KERNEL_PATH}*.c)
 # fixes the issue of incorrectly inferring the type of pdTRUE and pdFALSE as
 # boolean.
 add_custom_target(fix_source ALL
-                  COMMAND sed -i -b -e 's/pdFALSE/pdFAIL/g' -e 's/pdTRUE/pdPASS/g' ${FREERTOS_KERNEL_SOURCE}
-                  DEPENDS ${FREERTOS_KERNEL_SOURCE})
+                  COMMAND sed -i -b -e 's/pdFALSE/pdFAIL/g' -e 's/pdTRUE/pdPASS/g' ${FREERTOS_KERNEL_SOURCE} ${FREERTOS_PORT_CODE}
+                  DEPENDS ${FREERTOS_KERNEL_SOURCE} ${FREERTOS_PORT_CODE})
 
 # Add the freertos_config for FreeRTOS-Kernel.
 add_library(freertos_config INTERFACE)
@@ -22,6 +23,12 @@ target_include_directories(freertos_config
                            INTERFACE
                            ./)
 
+if (DEFINED FREERTOS_SMP_EXAMPLE AND FREERTOS_SMP_EXAMPLE STREQUAL "1")
+    message(STATUS "Build FreeRTOS SMP example")
+    # Adding the following configurations to build SMP template port
+    add_compile_options( -DconfigNUMBER_OF_CORES=2 -DconfigUSE_PASSIVE_IDLE_HOOK=0 )
+endif()
+
 # Select the heap. Values between 1-5 will pick a heap.
 set(FREERTOS_HEAP "3" CACHE STRING "" FORCE)
 

examples/coverity/FreeRTOSConfig.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -118,7 +118,6 @@
 #define INCLUDE_uxTaskPriorityGet              1
 #define INCLUDE_vTaskDelete                    1
 #define INCLUDE_vTaskSuspend                   1
-#define INCLUDE_xResumeFromISR                 1
 #define INCLUDE_vTaskDelayUntil                1
 #define INCLUDE_vTaskDelay                     1
 #define INCLUDE_xTaskGetSchedulerState         1
@@ -126,7 +125,6 @@
 #define INCLUDE_uxTaskGetStackHighWaterMark    1
 #define INCLUDE_xTaskGetIdleTaskHandle         1
 #define INCLUDE_eTaskGetState                  1
-#define INCLUDE_xEventGroupSetBitFromISR       1
 #define INCLUDE_xTimerPendFunctionCall         1
 #define INCLUDE_xTaskAbortDelay                1
 #define INCLUDE_xTaskGetHandle                 1

examples/coverity/README.md

@@ -1,10 +1,10 @@
 # MISRA Compliance for FreeRTOS-Kernel
 FreeRTOS-Kernel is MISRA C:2012 compliant. This directory contains a project to
-run [Synopsys Coverity](https://www.synopsys.com/software-integrity/security-testing/static-analysis-sast.html)
+run [Synopsys Coverity](https://www.blackduck.com/static-analysis-tools-sast/coverity.html)
 for checking MISRA compliance.
 
 > **Note**
-Coverity version 2022.6.1 incorrectly infers the type of `pdTRUE` and `pdFALSE`
+Coverity version 2023.6.1 incorrectly infers the type of `pdTRUE` and `pdFALSE`
 as boolean because of their names, resulting in multiple false positive warnings
 about type mismatch. We replace `pdTRUE` with `pdPASS` and `pdFALSE` with
 `pdFAIL` to avoid these false positive warnings. This workaround will not be
@@ -17,7 +17,7 @@ files.
 
 ## Getting Started
 ### Prerequisites
-Coverity can be run on any platform mentioned [here](https://sig-docs.synopsys.com/polaris/topics/c_coverity-compatible-platforms.html).
+Coverity can be run on any platform mentioned [here](https://documentation.blackduck.com/bundle/coverity-docs/page/deploy-install-guide/topics/supported_platforms_for_coverity_analysis.html).
 The following are the prerequisites to generate coverity report:
 
 1. CMake version > 3.13.0 (You can check whether you have this by typing `cmake --version`).
@@ -34,21 +34,27 @@ commands in a terminal:
   cov-configure --force --compiler cc --comptype gcc
   ~~~
 2. Create the build files using CMake in a `build` directory:
+
+Single core FreeRTOS:
   ~~~
   cmake -B build -S examples/coverity
   ~~~
+
+SMP FreeRTOS:
+  ~~~
+  cmake -B build -S examples/coverity -DFREERTOS_SMP_EXAMPLE=1
+  ~~~
 3. Build the (pseudo) application:
   ~~~
   cd build/
-  cov-build --emit-complementary-info --dir cov-out make
+  cov-build --emit-complementary-info --dir cov-out make coverity
   ~~~
 4. Go to the Coverity output directory (`cov-out`) and begin Coverity static
    analysis:
   ~~~
-  cd cov-out/
   cov-analyze --dir ./cov-out \
     --coding-standard-config ../examples/coverity/coverity_misra.config \
-    --tu-pattern "file('.*/FreeRTOS/Source/[A-Za-z_]*\.c')
+    --tu-pattern "file('[A-Za-z_]+\.c') && ( ! file('main.c') ) && ( ! file('port.c') )"
   ~~~
 5. Generate the HTML report:
   ~~~

examples/coverity/coverity_misra.config

@@ -1,97 +1,95 @@
-// MISRA C-2012 Rules
-
 {
-    version : "2.0",
-    standard : "c2012",
-    title: "Coverity MISRA Configuration",
-    deviations : [
-        // Disable the following rules.
+    "version" : "2.0",
+    "standard" : "c2012",
+    "title": "Coverity MISRA Configuration",
+    "deviations" : [
         {
-            deviation: "Rule 3.1",
-            reason: "We post HTTP links in code comments which contain // inside comments blocks."
+            "deviation": "Rule 1.2",
+            "reason": "Allow use of __attribute__ for necessary functions placement in specific memory regions."
         },
         {
-            deviation: "Rule 14.4",
-            reason: "do while( 0 ) pattern is used in macros to prevent extra semi-colon."
-        },
-
-        // Disable the following advisory rules and directives.
-        {
-            deviation: "Directive 4.4",
-            reason: "Code snippet is used in comment to help explanation."
+            "deviation": "Rule 3.1",
+            "reason": "We post HTTP links in code comments which contain // inside comments blocks."
         },
         {
-            deviation: "Directive 4.5",
-            reason: "Allow names that MISRA considers ambiguous."
+            "deviation": "Rule 14.4",
+            "reason": "do while( 0 ) pattern is used in macros to prevent extra semi-colon."
         },
         {
-            deviation: "Directive 4.6",
-            reason: "Allow port to use primitive type with typedefs."
+            "deviation": "Directive 4.4",
+            "reason": "Code snippet is used in comment to help explanation."
         },
         {
-            deviation: "Directive 4.8",
-            reason: "HeapRegion_t and HeapStats_t are used only in heap files but declared in portable.h which is included in multiple source files. As a result, these definitions appear in multiple source files where they are not used."
+            "deviation": "Directive 4.5",
+            "reason": "Allow names that MISRA considers ambiguous."
         },
         {
-            deviation: "Directive 4.9",
-            reason: "FreeRTOS-Kernel is optimised to work on small micro-controllers. To achieve that, function-like macros are used."
+            "deviation": "Directive 4.6",
+            "reason": "Allow port to use primitive type with typedefs."
         },
         {
-            deviation: "Rule 2.3",
-            reason: "FreeRTOS defines types which is used in application."
+            "deviation": "Directive 4.8",
+            "reason": "HeapRegion_t and HeapStats_t are used only in heap files but declared in portable.h which is included in multiple source files. As a result, these definitions appear in multiple source files where they are not used."
         },
         {
-            deviation: "Rule 2.4",
-            reason: "Allow to define unused tag."
+            "deviation": "Directive 4.9",
+            "reason": "FreeRTOS-Kernel is optimised to work on small micro-controllers. To achieve that, function-like macros are used."
         },
         {
-            deviation: "Rule 2.5",
-            reason: "Allow to define unused macro."
+            "deviation": "Rule 2.3",
+            "reason": "FreeRTOS defines types which is used in application."
         },
         {
-            deviation: "Rule 5.9",
-            reason: "Allow to define identifier with the same name in structure and global variable."
+            "deviation": "Rule 2.4",
+            "reason": "Allow to define unused tag."
         },
         {
-            deviation: "Rule 8.7",
-            reason: "API functions are not used by the library outside of the files they are defined; however, they must be externally visible in order to be used by an application."
+            "deviation": "Rule 2.5",
+            "reason": "Allow to define unused macro."
         },
         {
-            deviation: "Rule 8.9",
-            reason: "Allow to object to be defined in wider scope for debug purpose."
+            "deviation": "Rule 5.9",
+            "reason": "Allow to define identifier with the same name in structure and global variable."
         },
         {
-            deviation: "Rule 8.13",
-            reason: "Allow to not to use const-qualified type for callback function."
+            "deviation": "Rule 8.7",
+            "reason": "API functions are not used by the library outside of the files they are defined; however, they must be externally visible in order to be used by an application."
         },
         {
-            deviation: "Rule 11.4",
-            reason: "Allow to convert between a pointer to object and an interger type for stack alignment."
+            "deviation": "Rule 8.9",
+            "reason": "Allow to object to be defined in wider scope for debug purpose."
         },
         {
-            deviation: "Rule 15.4",
-            reason: "Allow to use multiple break statements in a loop."
+            "deviation": "Rule 8.13",
+            "reason": "Allow to not to use const-qualified type for callback function."
         },
         {
-            deviation: "Rule 15.5",
-            reason: "Allow to use multiple points of exit."
+            "deviation": "Rule 11.4",
+            "reason": "Allow to convert between a pointer to object and an interger type for stack alignment."
         },
         {
-            deviation: "Rule 17.8",
-            reason: "Allow to update the parameters of a function."
+            "deviation": "Rule 15.4",
+            "reason": "Allow to use multiple break statements in a loop."
         },
         {
-            deviation: "Rule 18.4",
-            reason: "Allow to use pointer arithmetic."
+            "deviation": "Rule 15.5",
+            "reason": "Allow to use multiple points of exit."
         },
         {
-            deviation: "Rule 19.2",
-            reason: "Allow to use union."
+            "deviation": "Rule 17.8",
+            "reason": "Allow to update the parameters of a function."
         },
         {
-            deviation: "Rule 20.5",
-            reason: "Allow to use #undef for MPU wrappers."
+            "deviation": "Rule 18.4",
+            "reason": "Allow to use pointer arithmetic."
+        },
+        {
+            "deviation": "Rule 19.2",
+            "reason": "Allow to use union."
+        },
+        {
+            "deviation": "Rule 20.5",
+            "reason": "Allow to use #undef for MPU wrappers."
         }
     ]
 }
-

examples/template_configuration/FreeRTOSConfig.h

@@ -1,25 +1,26 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
- * Permission is hereby granted, free of charge, to any person obtaining a copy of
- * this software and associated documentation files (the "Software"), to deal in
- * the Software without restriction, including without limitation the rights to
- * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
- * the Software, and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
  *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
  *
  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
- * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
  *
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
@@ -47,10 +48,11 @@
 /******************************************************************************/
 
 /* In most cases, configCPU_CLOCK_HZ must be set to the frequency of the clock
- * that drives the peripheral used to generate the kernels periodic tick interrupt.
- * The default value is set to 20MHz and matches the QEMU demo settings.  Your
- * application will certainly need a different value so set this correctly.
- * This is very often, but not always, equal to the main system clock frequency. */
+ * that drives the peripheral used to generate the kernels periodic tick
+ * interrupt. The default value is set to 20MHz and matches the QEMU demo
+ * settings.  Your application will certainly need a different value so set this
+ * correctly. This is very often, but not always, equal to the main system clock
+ * frequency. */
 #define configCPU_CLOCK_HZ    ( ( unsigned long ) 20000000 )
 
 /* configSYSTICK_CLOCK_HZ is an optional parameter for ARM Cortex-M ports only.
@@ -59,11 +61,11 @@
  * Cortex-M SysTick timer. Most Cortex-M MCUs run the SysTick timer at the same
  * frequency as the MCU itself - when that is the case configSYSTICK_CLOCK_HZ is
  * not needed and should be left undefined. If the SysTick timer is clocked at a
- * different frequency to the MCU core then set configCPU_CLOCK_HZ to the MCU clock
- * frequency, as normal, and configSYSTICK_CLOCK_HZ to the SysTick clock
+ * different frequency to the MCU core then set configCPU_CLOCK_HZ to the MCU
+ * clock frequency, as normal, and configSYSTICK_CLOCK_HZ to the SysTick clock
  * frequency.  Not used if left undefined.
- * The default value is undefined (commented out).  If you need this value bring it
- * back and set it to a suitable value. */
+ * The default value is undefined (commented out).  If you need this value bring
+ * it back and set it to a suitable value. */
 
 /*
  #define configSYSTICK_CLOCK_HZ                  [Platform specific]
@@ -90,28 +92,29 @@
 #define configUSE_TIME_SLICING                     0
 
 /* Set configUSE_PORT_OPTIMISED_TASK_SELECTION to 1 to select the next task to
- * run using an algorithm optimised to the instruction set of the target hardware -
- * normally using a count leading zeros assembly instruction.  Set to 0 to select
- * the next task to run using a generic C algorithm that works for all FreeRTOS
- * ports.  Not all FreeRTOS ports have this option.  Defaults to 0 if left
- * undefined. */
+ * run using an algorithm optimised to the instruction set of the target
+ * hardware - normally using a count leading zeros assembly instruction.  Set to
+ * 0 to select the next task to run using a generic C algorithm that works for
+ * all FreeRTOS ports.  Not all FreeRTOS ports have this option.  Defaults to 0
+ * if left undefined. */
 #define configUSE_PORT_OPTIMISED_TASK_SELECTION    0
 
 /* Set configUSE_TICKLESS_IDLE to 1 to use the low power tickless mode.  Set to
  * 0 to keep the tick interrupt running at all times.  Not all FreeRTOS ports
- * support tickless mode. See https://www.freertos.org/low-power-tickless-rtos.html
- * Defaults to 0 if left undefined. */
+ * support tickless mode. See
+ * https://www.freertos.org/low-power-tickless-rtos.html Defaults to 0 if left
+ * undefined. */
 #define configUSE_TICKLESS_IDLE                    0
 
 /* configMAX_PRIORITIES Sets the number of available task priorities.  Tasks can
- * be assigned priorities of 0 to (configMAX_PRIORITIES - 1).  Zero is the lowest
- * priority. */
+ * be assigned priorities of 0 to (configMAX_PRIORITIES - 1).  Zero is the
+ * lowest priority. */
 #define configMAX_PRIORITIES                       5
 
 /* configMINIMAL_STACK_SIZE defines the size of the stack used by the Idle task
- * (in words, not in bytes!).  The kernel does not use this constant for any other
- * purpose.  Demo applications use the constant to make the demos somewhat portable
- * across hardware architectures. */
+ * (in words, not in bytes!).  The kernel does not use this constant for any
+ * other purpose.  Demo applications use the constant to make the demos somewhat
+ * portable across hardware architectures. */
 #define configMINIMAL_STACK_SIZE                   128
 
 /* configMAX_TASK_NAME_LEN sets the maximum length (in characters) of a task's
@@ -122,7 +125,8 @@
  * has executed since the RTOS kernel was started.
  * The tick count is held in a variable of type TickType_t.
  *
- * configTICK_TYPE_WIDTH_IN_BITS controls the type (and therefore bit-width) of TickType_t:
+ * configTICK_TYPE_WIDTH_IN_BITS controls the type (and therefore bit-width) of
+ * TickType_t:
  *
  * Defining configTICK_TYPE_WIDTH_IN_BITS as TICK_TYPE_WIDTH_16_BITS causes
  * TickType_t to be defined (typedef'ed) as an unsigned 16-bit type.
@@ -135,15 +139,15 @@
 #define configTICK_TYPE_WIDTH_IN_BITS              TICK_TYPE_WIDTH_64_BITS
 
 /* Set configIDLE_SHOULD_YIELD to 1 to have the Idle task yield to an
- * application task if there is an Idle priority (priority 0) application task that
- * can run.  Set to 0 to have the Idle task use all of its timeslice.  Default to 1
- * if left undefined. */
+ * application task if there is an Idle priority (priority 0) application task
+ * that can run.  Set to 0 to have the Idle task use all of its timeslice.
+ * Default to 1 if left undefined. */
 #define configIDLE_SHOULD_YIELD                    1
 
 /* Each task has an array of task notifications.
- * configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the array.
- * See https://www.freertos.org/RTOS-task-notifications.html  Defaults to 1 if
- * left undefined. */
+ * configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the
+ * array. See https://www.freertos.org/RTOS-task-notifications.html  Defaults to
+ * 1 if left undefined. */
 #define configTASK_NOTIFICATION_ARRAY_ENTRIES      1
 
 /* configQUEUE_REGISTRY_SIZE sets the maximum number of queues and semaphores
@@ -152,21 +156,22 @@
 #define configQUEUE_REGISTRY_SIZE                  0
 
 /* Set configENABLE_BACKWARD_COMPATIBILITY to 1 to map function names and
- * datatypes from old version of FreeRTOS to their latest equivalent.  Defaults to
- * 1 if left undefined. */
+ * datatypes from old version of FreeRTOS to their latest equivalent.  Defaults
+ * to 1 if left undefined. */
 #define configENABLE_BACKWARD_COMPATIBILITY        0
 
 /* Each task has its own array of pointers that can be used as thread local
- * storage.  configNUM_THREAD_LOCAL_STORAGE_POINTERS set the number of indexes in
- * the array.  See https://www.freertos.org/thread-local-storage-pointers.html
- * Defaults to 0 if left undefined. */
+ * storage.  configNUM_THREAD_LOCAL_STORAGE_POINTERS set the number of indexes
+ * in the array.  See
+ * https://www.freertos.org/thread-local-storage-pointers.html Defaults to 0 if
+ * left undefined. */
 #define configNUM_THREAD_LOCAL_STORAGE_POINTERS    0
 
 /* When configUSE_MINI_LIST_ITEM is set to 0, MiniListItem_t and ListItem_t are
- * both the same. When configUSE_MINI_LIST_ITEM is set to 1, MiniListItem_t contains
- * 3 fewer fields than ListItem_t which saves some RAM at the cost of violating
- * strict aliasing rules which some compilers depend on for optimization. Defaults
- * to 1 if left undefined. */
+ * both the same. When configUSE_MINI_LIST_ITEM is set to 1, MiniListItem_t
+ * contains 3 fewer fields than ListItem_t which saves some RAM at the cost of
+ * violating strict aliasing rules which some compilers depend on for
+ * optimization. Defaults to 1 if left undefined. */
 #define configUSE_MINI_LIST_ITEM                   1
 
 /* Sets the type used by the parameter to xTaskCreate() that specifies the stack
@@ -176,22 +181,22 @@
 #define configSTACK_DEPTH_TYPE                     size_t
 
 /* configMESSAGE_BUFFER_LENGTH_TYPE sets the type used to store the length of
- * each message written to a FreeRTOS message buffer (the length is also written to
- * the message buffer.  Defaults to size_t if left undefined - but that may waste
- * space if messages never go above a length that could be held in a uint8_t. */
+ * each message written to a FreeRTOS message buffer (the length is also written
+ * to the message buffer.  Defaults to size_t if left undefined - but that may
+ * waste space if messages never go above a length that could be held in a
+ * uint8_t. */
 #define configMESSAGE_BUFFER_LENGTH_TYPE           size_t
 
-/* If configHEAP_CLEAR_MEMORY_ON_FREE is set to 1, then blocks of memory allocated
- * using pvPortMalloc() will be cleared (i.e. set to zero) when freed using
- * vPortFree(). Defaults to 0 if left undefined. */
+/* If configHEAP_CLEAR_MEMORY_ON_FREE is set to 1, then blocks of memory
+ * allocated using pvPortMalloc() will be cleared (i.e. set to zero) when freed
+ * using vPortFree(). Defaults to 0 if left undefined. */
 #define configHEAP_CLEAR_MEMORY_ON_FREE            1
 
-/* vTaskList and vTaskGetRunTimeStats APIs take a buffer as a parameter and assume
- * that the length of the buffer is configSTATS_BUFFER_MAX_LENGTH. Defaults to
- * 0xFFFF if left undefined.
- * New applications are recommended to use vTaskListTasks and
- * vTaskGetRunTimeStatistics APIs instead and supply the length of the buffer
- * explicitly to avoid memory corruption. */
+/* vTaskList and vTaskGetRunTimeStats APIs take a buffer as a parameter and
+ * assume that the length of the buffer is configSTATS_BUFFER_MAX_LENGTH.
+ * Defaults to 0xFFFF if left undefined. New applications are recommended to use
+ * vTaskListTasks and vTaskGetRunTimeStatistics APIs instead and supply the
+ * length of the buffer explicitly to avoid memory corruption. */
 #define configSTATS_BUFFER_MAX_LENGTH              0xFFFF
 
 /* Set configUSE_NEWLIB_REENTRANT to 1 to have a newlib reent structure
@@ -199,11 +204,11 @@
  * Default to 0 if left undefined.
  *
  * Note Newlib support has been included by popular demand, but is not used or
- * tested by the FreeRTOS maintainers themselves. FreeRTOS is not responsible for
- * resulting newlib operation. User must be familiar with newlib and must provide
- * system-wide implementations of the necessary stubs. Note that (at the time of
- * writing) the current newlib design implements a system-wide malloc() that must
- * be provided with locks. */
+ * tested by the FreeRTOS maintainers themselves. FreeRTOS is not responsible
+ * for resulting newlib operation. User must be familiar with newlib and must
+ * provide system-wide implementations of the necessary stubs. Note that (at the
+ * time of writing) the current newlib design implements a system-wide malloc()
+ * that must be provided with locks. */
 #define configUSE_NEWLIB_REENTRANT                 0
 
 /******************************************************************************/
@@ -220,22 +225,45 @@
 /* configTIMER_TASK_PRIORITY sets the priority used by the timer task.  Only
  * used if configUSE_TIMERS is set to 1.  The timer task is a standard FreeRTOS
  * task, so its priority is set like any other task.  See
- * https://www.freertos.org/RTOS-software-timer-service-daemon-task.html  Only used
- * if configUSE_TIMERS is set to 1. */
+ * https://www.freertos.org/RTOS-software-timer-service-daemon-task.html  Only
+ * used if configUSE_TIMERS is set to 1. */
 #define configTIMER_TASK_PRIORITY       ( configMAX_PRIORITIES - 1 )
 
 /* configTIMER_TASK_STACK_DEPTH sets the size of the stack allocated to the
  * timer task (in words, not in bytes!).  The timer task is a standard FreeRTOS
- * task.  See https://www.freertos.org/RTOS-software-timer-service-daemon-task.html
- * Only used if configUSE_TIMERS is set to 1. */
+ * task.  See
+ * https://www.freertos.org/RTOS-software-timer-service-daemon-task.html Only
+ * used if configUSE_TIMERS is set to 1. */
 #define configTIMER_TASK_STACK_DEPTH    configMINIMAL_STACK_SIZE
 
 /* configTIMER_QUEUE_LENGTH sets the length of the queue (the number of discrete
  * items the queue can hold) used to send commands to the timer task.  See
- * https://www.freertos.org/RTOS-software-timer-service-daemon-task.html  Only used
- * if configUSE_TIMERS is set to 1. */
+ * https://www.freertos.org/RTOS-software-timer-service-daemon-task.html  Only
+ * used if configUSE_TIMERS is set to 1. */
 #define configTIMER_QUEUE_LENGTH        10
 
+/******************************************************************************/
+/* Event Group related definitions. *******************************************/
+/******************************************************************************/
+
+/* Set configUSE_EVENT_GROUPS to 1 to include event group functionality in the
+ * build. Set to 0 to exclude event group functionality from the build. The
+ * FreeRTOS/source/event_groups.c source file must be included in the build if
+ * configUSE_EVENT_GROUPS is set to 1. Defaults to 1 if left undefined. */
+
+#define configUSE_EVENT_GROUPS    1
+
+/******************************************************************************/
+/* Stream Buffer related definitions. *****************************************/
+/******************************************************************************/
+
+/* Set configUSE_STREAM_BUFFERS to 1 to include stream buffer functionality in
+ * the build. Set to 0 to exclude event group functionality from the build. The
+ * FreeRTOS/source/stream_buffer.c source file must be included in the build if
+ * configUSE_STREAM_BUFFERS is set to 1. Defaults to 1 if left undefined. */
+
+#define configUSE_STREAM_BUFFERS    1
+
 /******************************************************************************/
 /* Memory allocation related definitions. *************************************/
 /******************************************************************************/
@@ -248,21 +276,22 @@
 #define configSUPPORT_STATIC_ALLOCATION              1
 
 /* Set configSUPPORT_DYNAMIC_ALLOCATION to 1 to include FreeRTOS API functions
- * that create FreeRTOS objects (tasks, queues, etc.) using dynamically allocated
- * memory in the build.  Set to 0 to exclude the ability to create dynamically
- * allocated objects from the build.  Defaults to 1 if left undefined.  See
+ * that create FreeRTOS objects (tasks, queues, etc.) using dynamically
+ * allocated memory in the build.  Set to 0 to exclude the ability to create
+ * dynamically allocated objects from the build.  Defaults to 1 if left
+ * undefined.  See
  * https://www.freertos.org/Static_Vs_Dynamic_Memory_Allocation.html. */
 #define configSUPPORT_DYNAMIC_ALLOCATION             1
 
 /* Sets the total size of the FreeRTOS heap, in bytes, when heap_1.c, heap_2.c
- * or heap_4.c are included in the build.  This value is defaulted to 4096 bytes but
- * it must be tailored to each application.  Note the heap will appear in the .bss
- * section.  See https://www.freertos.org/a00111.html. */
+ * or heap_4.c are included in the build.  This value is defaulted to 4096 bytes
+ * but it must be tailored to each application.  Note the heap will appear in
+ * the .bss section.  See https://www.freertos.org/a00111.html. */
 #define configTOTAL_HEAP_SIZE                        4096
 
 /* Set configAPPLICATION_ALLOCATED_HEAP to 1 to have the application allocate
- * the array used as the FreeRTOS heap.  Set to 0 to have the linker allocate the
- * array used as the FreeRTOS heap.  Defaults to 0 if left undefined. */
+ * the array used as the FreeRTOS heap.  Set to 0 to have the linker allocate
+ * the array used as the FreeRTOS heap.  Defaults to 0 if left undefined. */
 #define configAPPLICATION_ALLOCATED_HEAP             0
 
 /* Set configSTACK_ALLOCATION_FROM_SEPARATE_HEAP to 1 to have task stacks
@@ -273,9 +302,9 @@
  * Defaults to 0 if left undefined. */
 #define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP    0
 
-/* Set configENABLE_HEAP_PROTECTOR to 1 to enable bounds checking and obfuscation
- * to internal heap block pointers in heap_4.c and heap_5.c to help catch pointer
- * corruptions. Defaults to 0 if left undefined. */
+/* Set configENABLE_HEAP_PROTECTOR to 1 to enable bounds checking and
+ * obfuscation to internal heap block pointers in heap_4.c and heap_5.c to help
+ * catch pointer corruptions. Defaults to 0 if left undefined. */
 #define configENABLE_HEAP_PROTECTOR                  0
 
 /******************************************************************************/
@@ -283,18 +312,17 @@
 /******************************************************************************/
 
 /* configKERNEL_INTERRUPT_PRIORITY sets the priority of the tick and context
- * switch performing interrupts.  The default value is set to the highest interrupt
- * priority (0).  Not supported by all FreeRTOS ports.  See
- * https://www.freertos.org/RTOS-Cortex-M3-M4.html for information specific to ARM
- * Cortex-M devices. */
+ * switch performing interrupts.  Not supported by all FreeRTOS ports.  See
+ * https://www.freertos.org/RTOS-Cortex-M3-M4.html for information specific to
+ * ARM Cortex-M devices. */
 #define configKERNEL_INTERRUPT_PRIORITY          0
 
 /* configMAX_SYSCALL_INTERRUPT_PRIORITY sets the interrupt priority above which
- * FreeRTOS API calls must not be made.  Interrupts above this priority are never
- * disabled, so never delayed by RTOS activity.  The default value is set to the
- * highest interrupt priority (0).  Not supported by all FreeRTOS ports.
- * See https://www.freertos.org/RTOS-Cortex-M3-M4.html for information specific to
- * ARM Cortex-M devices. */
+ * FreeRTOS API calls must not be made.  Interrupts above this priority are
+ * never disabled, so never delayed by RTOS activity.  The default value is set
+ * to the highest interrupt priority (0).  Not supported by all FreeRTOS ports.
+ * See https://www.freertos.org/RTOS-Cortex-M3-M4.html for information specific
+ * to ARM Cortex-M devices. */
 #define configMAX_SYSCALL_INTERRUPT_PRIORITY     0
 
 /* Another name for configMAX_SYSCALL_INTERRUPT_PRIORITY - the name used depends
@@ -306,9 +334,9 @@
 /******************************************************************************/
 
 /* Set the following configUSE_* constants to 1 to include the named hook
- * functionality in the build.  Set to 0 to exclude the hook functionality from the
- * build.  The application writer is responsible for providing the hook function
- * for any set to 1.  See https://www.freertos.org/a00016.html. */
+ * functionality in the build.  Set to 0 to exclude the hook functionality from
+ * the build.  The application writer is responsible for providing the hook
+ * function for any set to 1.  See https://www.freertos.org/a00016.html. */
 #define configUSE_IDLE_HOOK                   0
 #define configUSE_TICK_HOOK                   0
 #define configUSE_MALLOC_FAILED_HOOK          0
@@ -325,14 +353,15 @@
 /* Set configCHECK_FOR_STACK_OVERFLOW to 1 or 2 for FreeRTOS to check for a
  * stack overflow at the time of a context switch.  Set to 0 to not look for a
  * stack overflow.  If configCHECK_FOR_STACK_OVERFLOW is 1 then the check only
- * looks for the stack pointer being out of bounds when a task's context is saved
- * to its stack - this is fast but somewhat ineffective.  If
- * configCHECK_FOR_STACK_OVERFLOW is 2 then the check looks for a pattern written
- * to the end of a task's stack having been overwritten.  This is slower, but will
- * catch most (but not all) stack overflows.  The application writer must provide
- * the stack overflow callback when configCHECK_FOR_STACK_OVERFLOW is set to 1.
- * See https://www.freertos.org/Stacks-and-stack-overflow-checking.html  Defaults
- * to 0 if left undefined. */
+ * looks for the stack pointer being out of bounds when a task's context is
+ * saved to its stack - this is fast but somewhat ineffective.  If
+ * configCHECK_FOR_STACK_OVERFLOW is 2 then the check looks for a pattern
+ * written to the end of a task's stack having been overwritten.  This is
+ * slower, but will catch most (but not all) stack overflows.  The application
+ * writer must provide the stack overflow callback when
+ * configCHECK_FOR_STACK_OVERFLOW is set to 1. See
+ * https://www.freertos.org/Stacks-and-stack-overflow-checking.html  Defaults to
+ * 0 if left undefined. */
 #define configCHECK_FOR_STACK_OVERFLOW        2
 
 /******************************************************************************/
@@ -341,8 +370,9 @@
 
 /* Set configGENERATE_RUN_TIME_STATS to 1 to have FreeRTOS collect data on the
  * processing time used by each task.  Set to 0 to not collect the data.  The
- * application writer needs to provide a clock source if set to 1.  Defaults to 0
- * if left undefined.  See https://www.freertos.org/rtos-run-time-stats.html. */
+ * application writer needs to provide a clock source if set to 1.  Defaults to
+ * 0 if left undefined.  See https://www.freertos.org/rtos-run-time-stats.html.
+ */
 #define configGENERATE_RUN_TIME_STATS           0
 
 /* Set configUSE_TRACE_FACILITY to include additional task structure members
@@ -364,8 +394,8 @@
 
 /* Set configUSE_CO_ROUTINES to 1 to include co-routine functionality in the
  * build, or 0 to omit co-routine functionality from the build. To include
- * co-routines, croutine.c must be included in the project. Defaults to 0 if left
- * undefined. */
+ * co-routines, croutine.c must be included in the project. Defaults to 0 if
+ * left undefined. */
 #define configUSE_CO_ROUTINES              0
 
 /* configMAX_CO_ROUTINE_PRIORITIES defines the number of priorities available
@@ -382,9 +412,9 @@
  * at all (i.e. comment out or delete the definitions) to completely remove
  * assertions.  configASSERT() can be defined to anything you want, for example
  * you can call a function if an assert fails that passes the filename and line
- * number of the failing assert (for example, "vAssertCalled( __FILE__, __LINE__ )"
- * or it can simple disable interrupts and sit in a loop to halt all execution
- * on the failing line for viewing in a debugger. */
+ * number of the failing assert (for example, "vAssertCalled( __FILE__, __LINE__
+ * )" or it can simple disable interrupts and sit in a loop to halt all
+ * execution on the failing line for viewing in a debugger. */
 #define configASSERT( x )         \
     if( ( x ) == 0 )              \
     {                             \
@@ -399,9 +429,10 @@
 
 /* If configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS is set to 1 then
  * the application writer can provide functions that execute in privileged mode.
- * See: https://www.freertos.org/a00110.html#configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS
- * Defaults to 0 if left undefined.  Only used by the FreeRTOS Cortex-M MPU ports,
- * not the standard ARMv7-M Cortex-M port. */
+ * See:
+ * https://www.freertos.org/a00110.html#configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS
+ * Defaults to 0 if left undefined.  Only used by the FreeRTOS Cortex-M MPU
+ * ports, not the standard ARMv7-M Cortex-M port. */
 #define configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS    0
 
 /* Set configTOTAL_MPU_REGIONS to the number of MPU regions implemented on your
@@ -411,28 +442,28 @@
 #define configTOTAL_MPU_REGIONS                                   8
 
 /* configTEX_S_C_B_FLASH allows application writers to override the default
- * values for the for TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits for
- * the MPU region covering Flash.  Defaults to 0x07UL (which means TEX=000, S=1,
- * C=1, B=1) if left undefined.  Only used by the FreeRTOS Cortex-M MPU ports, not
- * the standard ARMv7-M Cortex-M port. */
+ * values for the for TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits
+ * for the MPU region covering Flash.  Defaults to 0x07UL (which means TEX=000,
+ * S=1, C=1, B=1) if left undefined.  Only used by the FreeRTOS Cortex-M MPU
+ * ports, not the standard ARMv7-M Cortex-M port. */
 #define configTEX_S_C_B_FLASH                                     0x07UL
 
 /* configTEX_S_C_B_SRAM allows application writers to override the default
- * values for the for TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits for
- * the MPU region covering RAM. Defaults to 0x07UL (which means TEX=000, S=1, C=1,
- * B=1) if left undefined.  Only used by the FreeRTOS Cortex-M MPU ports, not
- * the standard ARMv7-M Cortex-M port. */
+ * values for the for TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits
+ * for the MPU region covering RAM. Defaults to 0x07UL (which means TEX=000,
+ * S=1, C=1, B=1) if left undefined.  Only used by the FreeRTOS Cortex-M MPU
+ * ports, not the standard ARMv7-M Cortex-M port. */
 #define configTEX_S_C_B_SRAM                                      0x07UL
 
 /* Set configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY to 0 to prevent any privilege
  * escalations originating from outside of the kernel code itself.  Set to 1 to
  * allow application tasks to raise privilege.  Defaults to 1 if left undefined.
- * Only used by the FreeRTOS Cortex-M MPU ports, not the standard ARMv7-M Cortex-M
- * port. */
+ * Only used by the FreeRTOS Cortex-M MPU ports, not the standard ARMv7-M
+ * Cortex-M port. */
 #define configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY               1
 
 /* Set configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS to 1 to allow unprivileged
- * tasks enter critical sections (effectively mask interrupts).  Set to 0 to
+ * tasks enter critical sections (effectively mask interrupts). Set to 0 to
  * prevent unprivileged tasks entering critical sections.  Defaults to 1 if left
  * undefined.  Only used by the FreeRTOS Cortex-M MPU ports, not the standard
  * ARMv7-M Cortex-M port. */
@@ -472,8 +503,8 @@
 /* SMP( Symmetric MultiProcessing ) Specific Configuration definitions. *******/
 /******************************************************************************/
 
-/* Set configNUMBER_OF_CORES to the number of available processor cores. Defaults
- * to 1 if left undefined. */
+/* Set configNUMBER_OF_CORES to the number of available processor cores.
+ * Defaults to 1 if left undefined. */
 
 /*
  #define configNUMBER_OF_CORES                     [Num of available cores]
@@ -490,12 +521,22 @@
 
 /* When using SMP (i.e. configNUMBER_OF_CORES is greater than one), set
  * configUSE_CORE_AFFINITY to 1 to enable core affinity feature. When core
- * affinity feature is enabled, the vTaskCoreAffinitySet and vTaskCoreAffinityGet
- * APIs can be used to set and retrieve which cores a task can run on. If
- * configUSE_CORE_AFFINITY is set to 0 then the FreeRTOS scheduler is free to
- * run any task on any available core. */
+ * affinity feature is enabled, the vTaskCoreAffinitySet and
+ * vTaskCoreAffinityGet APIs can be used to set and retrieve which cores a task
+ * can run on. If configUSE_CORE_AFFINITY is set to 0 then the FreeRTOS
+ * scheduler is free to run any task on any available core. */
 #define configUSE_CORE_AFFINITY                   0
 
+/* When using SMP with core affinity feature enabled, set
+ * configTASK_DEFAULT_CORE_AFFINITY to change the default core affinity mask for
+ * tasks created without an affinity mask specified. Setting the define to 1
+ * would make such tasks run on core 0 and setting it to (1 <<
+ * portGET_CORE_ID()) would make such tasks run on the current core. This config
+ * value is useful, if swapping tasks between cores is not supported (e.g.
+ * Tricore) or if legacy code should be controlled. Defaults to tskNO_AFFINITY
+ * if left undefined. */
+#define configTASK_DEFAULT_CORE_AFFINITY          tskNO_AFFINITY
+
 /* When using SMP (i.e. configNUMBER_OF_CORES is greater than one), if
  * configUSE_TASK_PREEMPTION_DISABLE is set to 1, individual tasks can be set to
  * either pre-emptive or co-operative mode using the vTaskPreemptionDisable and
@@ -504,8 +545,8 @@
 
 /* When using SMP (i.e. configNUMBER_OF_CORES is greater than one), set
  * configUSE_PASSIVE_IDLE_HOOK to 1 to allow the application writer to use
- * the passive idle task hook to add background functionality without the overhead
- * of a separate task. Defaults to 0 if left undefined. */
+ * the passive idle task hook to add background functionality without the
+ * overhead of a separate task. Defaults to 0 if left undefined. */
 #define configUSE_PASSIVE_IDLE_HOOK               0
 
 /* When using SMP (i.e. configNUMBER_OF_CORES is greater than one),
@@ -514,23 +555,77 @@
  * tskNO_AFFINITY if left undefined. */
 #define configTIMER_SERVICE_TASK_CORE_AFFINITY    tskNO_AFFINITY
 
-
 /******************************************************************************/
 /* ARMv8-M secure side port related definitions. ******************************/
 /******************************************************************************/
 
 /* secureconfigMAX_SECURE_CONTEXTS define the maximum number of tasks that can
- *  call into the secure side of an ARMv8-M chip.  Not used by any other ports. */
+ *  call into the secure side of an ARMv8-M chip.  Not used by any other ports.
+ */
 #define secureconfigMAX_SECURE_CONTEXTS        5
 
 /* Defines the kernel provided implementation of
  * vApplicationGetIdleTaskMemory() and vApplicationGetTimerTaskMemory()
- * to provide the memory that is used by the Idle task and Timer task respectively.
- * The application can provide it's own implementation of
+ * to provide the memory that is used by the Idle task and Timer task
+ * respectively. The application can provide it's own implementation of
  * vApplicationGetIdleTaskMemory() and vApplicationGetTimerTaskMemory() by
  * setting configKERNEL_PROVIDED_STATIC_MEMORY to 0 or leaving it undefined. */
 #define configKERNEL_PROVIDED_STATIC_MEMORY    1
 
+/******************************************************************************/
+/* ARMv8-M port Specific Configuration definitions. ***************************/
+/******************************************************************************/
+
+/* Set configENABLE_TRUSTZONE to 1 when running FreeRTOS on the non-secure side
+ * to enable the TrustZone support in FreeRTOS ARMv8-M ports which allows the
+ * non-secure FreeRTOS tasks to call the (non-secure callable) functions
+ * exported from secure side. */
+#define configENABLE_TRUSTZONE            1
+
+/* If the application writer does not want to use TrustZone, but the hardware
+ * does not support disabling TrustZone then the entire application (including
+ * the FreeRTOS scheduler) can run on the secure side without ever branching to
+ * the non-secure side. To do that, in addition to setting
+ * configENABLE_TRUSTZONE to 0, also set configRUN_FREERTOS_SECURE_ONLY to 1. */
+#define configRUN_FREERTOS_SECURE_ONLY    1
+
+/* Set configENABLE_MPU to 1 to enable the Memory Protection Unit (MPU), or 0
+ * to leave the Memory Protection Unit disabled. */
+#define configENABLE_MPU                  1
+
+/* Set configENABLE_FPU to 1 to enable the Floating Point Unit (FPU), or 0
+ * to leave the Floating Point Unit disabled. */
+#define configENABLE_FPU                  1
+
+/* Set configENABLE_MVE to 1 to enable the M-Profile Vector Extension (MVE)
+ * support, or 0 to leave the MVE support disabled. This option is only
+ * applicable to Cortex-M55 and Cortex-M85 ports as M-Profile Vector Extension
+ * (MVE) is available only on these architectures. configENABLE_MVE must be left
+ * undefined, or defined to 0 for the Cortex-M23,Cortex-M33 and Cortex-M35P
+ * ports. */
+#define configENABLE_MVE                  1
+
+/******************************************************************************/
+/* ARMv7-M and ARMv8-M port Specific Configuration definitions. ***************/
+/******************************************************************************/
+
+/* Set configCHECK_HANDLER_INSTALLATION to 1 to enable additional asserts to
+ * verify that the application has correctly installed FreeRTOS interrupt
+ * handlers.
+ *
+ * An application can install FreeRTOS interrupt handlers in one of the
+ * following ways:
+ *   1. Direct Routing  -  Install the functions vPortSVCHandler and
+ * xPortPendSVHandler for SVC call and PendSV interrupts respectively.
+ *   2. Indirect Routing - Install separate handlers for SVC call and PendSV
+ *                         interrupts and route program control from those
+ * handlers to vPortSVCHandler and xPortPendSVHandler functions. The
+ * applications that use Indirect Routing must set
+ * configCHECK_HANDLER_INSTALLATION to 0.
+ *
+ * Defaults to 1 if left undefined. */
+#define configCHECK_HANDLER_INSTALLATION    1
+
 /******************************************************************************/
 /* Definitions that include or exclude functionality. *************************/
 /******************************************************************************/
@@ -544,14 +639,17 @@
 #define configUSE_QUEUE_SETS                   0
 #define configUSE_APPLICATION_TASK_TAG         0
 
-/* Set the following INCLUDE_* constants to 1 to incldue the named API function,
+/* USE_POSIX_ERRNO enables the task global FreeRTOS_errno variable which will
+ * contain the most recent error for that task. */
+#define configUSE_POSIX_ERRNO                  0
+
+/* Set the following INCLUDE_* constants to 1 to include the named API function,
  * or 0 to exclude the named API function.  Most linkers will remove unused
  * functions even when the constant is 1. */
 #define INCLUDE_vTaskPrioritySet               1
 #define INCLUDE_uxTaskPriorityGet              1
 #define INCLUDE_vTaskDelete                    1
 #define INCLUDE_vTaskSuspend                   1
-#define INCLUDE_xResumeFromISR                 1
 #define INCLUDE_vTaskDelayUntil                1
 #define INCLUDE_vTaskDelay                     1
 #define INCLUDE_xTaskGetSchedulerState         1
@@ -559,7 +657,6 @@
 #define INCLUDE_uxTaskGetStackHighWaterMark    0
 #define INCLUDE_xTaskGetIdleTaskHandle         0
 #define INCLUDE_eTaskGetState                  0
-#define INCLUDE_xEventGroupSetBitFromISR       1
 #define INCLUDE_xTimerPendFunctionCall         0
 #define INCLUDE_xTaskAbortDelay                0
 #define INCLUDE_xTaskGetHandle                 0

include/FreeRTOS.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -49,12 +49,6 @@
  */
 #include <stdint.h> /* READ COMMENT ABOVE. */
 
-/* *INDENT-OFF* */
-#ifdef __cplusplus
-    extern "C" {
-#endif
-/* *INDENT-ON* */
-
 /* Acceptable values for configTICK_TYPE_WIDTH_IN_BITS. */
 #define TICK_TYPE_WIDTH_16_BITS    0
 #define TICK_TYPE_WIDTH_32_BITS    1
@@ -96,6 +90,17 @@
     #define configNUMBER_OF_CORES    1
 #endif
 
+#ifndef configUSE_MALLOC_FAILED_HOOK
+    #define configUSE_MALLOC_FAILED_HOOK    0
+#endif
+
+#ifndef configASSERT
+    #define configASSERT( x )
+    #define configASSERT_DEFINED    0
+#else
+    #define configASSERT_DEFINED    1
+#endif
+
 /* Basic FreeRTOS definitions. */
 #include "projdefs.h"
 
@@ -125,6 +130,12 @@
 
 #endif /* if ( configUSE_PICOLIBC_TLS == 1 ) */
 
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    extern "C" {
+#endif
+/* *INDENT-ON* */
+
 #ifndef configUSE_C_RUNTIME_TLS_SUPPORT
     #define configUSE_C_RUNTIME_TLS_SUPPORT    0
 #endif
@@ -294,10 +305,6 @@
     #endif
 #endif
 
-#ifndef configUSE_DAEMON_TASK_STARTUP_HOOK
-    #define configUSE_DAEMON_TASK_STARTUP_HOOK    0
-#endif
-
 #ifndef configUSE_APPLICATION_TASK_TAG
     #define configUSE_APPLICATION_TASK_TAG    0
 #endif
@@ -318,6 +325,24 @@
     #define configUSE_TIMERS    0
 #endif
 
+#ifndef configUSE_EVENT_GROUPS
+    #define configUSE_EVENT_GROUPS    1
+#endif
+
+#ifndef configUSE_STREAM_BUFFERS
+    #define configUSE_STREAM_BUFFERS    1
+#endif
+
+#ifndef configUSE_DAEMON_TASK_STARTUP_HOOK
+    #define configUSE_DAEMON_TASK_STARTUP_HOOK    0
+#endif
+
+#if ( configUSE_DAEMON_TASK_STARTUP_HOOK != 0 )
+    #if ( configUSE_TIMERS == 0 )
+        #error configUSE_DAEMON_TASK_STARTUP_HOOK is set, but the daemon task is not created because configUSE_TIMERS is 0.
+    #endif
+#endif
+
 #ifndef configUSE_COUNTING_SEMAPHORES
     #define configUSE_COUNTING_SEMAPHORES    0
 #endif
@@ -346,13 +371,6 @@
     #error configMAX_TASK_NAME_LEN must be set to a minimum of 1 in FreeRTOSConfig.h
 #endif
 
-#ifndef configASSERT
-    #define configASSERT( x )
-    #define configASSERT_DEFINED    0
-#else
-    #define configASSERT_DEFINED    1
-#endif
-
 /* configPRECONDITION should be defined as configASSERT.
  * The CBMC proofs need a way to track assumptions and assertions.
  * A configPRECONDITION statement should express an implicit invariant or
@@ -427,7 +445,7 @@
 #ifndef portRELEASE_TASK_LOCK
 
     #if ( configNUMBER_OF_CORES == 1 )
-        #define portRELEASE_TASK_LOCK()
+        #define portRELEASE_TASK_LOCK( xCoreID )
     #else
         #error portRELEASE_TASK_LOCK is required in SMP
     #endif
@@ -437,7 +455,7 @@
 #ifndef portGET_TASK_LOCK
 
     #if ( configNUMBER_OF_CORES == 1 )
-        #define portGET_TASK_LOCK()
+        #define portGET_TASK_LOCK( xCoreID )
     #else
         #error portGET_TASK_LOCK is required in SMP
     #endif
@@ -447,7 +465,7 @@
 #ifndef portRELEASE_ISR_LOCK
 
     #if ( configNUMBER_OF_CORES == 1 )
-        #define portRELEASE_ISR_LOCK()
+        #define portRELEASE_ISR_LOCK( xCoreID )
     #else
         #error portRELEASE_ISR_LOCK is required in SMP
     #endif
@@ -457,7 +475,7 @@
 #ifndef portGET_ISR_LOCK
 
     #if ( configNUMBER_OF_CORES == 1 )
-        #define portGET_ISR_LOCK()
+        #define portGET_ISR_LOCK( xCoreID )
     #else
         #error portGET_ISR_LOCK is required in SMP
     #endif
@@ -484,6 +502,12 @@
     #define configUSE_CORE_AFFINITY    0
 #endif /* configUSE_CORE_AFFINITY */
 
+#if ( ( configNUMBER_OF_CORES > 1 ) && ( configUSE_CORE_AFFINITY == 1 ) )
+    #ifndef configTASK_DEFAULT_CORE_AFFINITY
+        #define configTASK_DEFAULT_CORE_AFFINITY    tskNO_AFFINITY
+    #endif
+#endif
+
 #ifndef configUSE_PASSIVE_IDLE_HOOK
     #define configUSE_PASSIVE_IDLE_HOOK    0
 #endif /* configUSE_PASSIVE_IDLE_HOOK */
@@ -509,12 +533,36 @@
 
 #endif /* configUSE_TIMERS */
 
+#ifndef portHAS_NESTED_INTERRUPTS
+    #if defined( portSET_INTERRUPT_MASK_FROM_ISR ) && defined( portCLEAR_INTERRUPT_MASK_FROM_ISR )
+        #define portHAS_NESTED_INTERRUPTS    1
+    #else
+        #define portHAS_NESTED_INTERRUPTS    0
+    #endif
+#endif
+
 #ifndef portSET_INTERRUPT_MASK_FROM_ISR
-    #define portSET_INTERRUPT_MASK_FROM_ISR()    0
+    #if ( portHAS_NESTED_INTERRUPTS == 1 )
+        #error portSET_INTERRUPT_MASK_FROM_ISR must be defined for ports that support nested interrupts (i.e. portHAS_NESTED_INTERRUPTS is set to 1)
+    #else
+        #define portSET_INTERRUPT_MASK_FROM_ISR()    0
+    #endif
+#else
+    #if ( portHAS_NESTED_INTERRUPTS == 0 )
+        #error portSET_INTERRUPT_MASK_FROM_ISR must not be defined for ports that do not support nested interrupts (i.e. portHAS_NESTED_INTERRUPTS is set to 0)
+    #endif
 #endif
 
 #ifndef portCLEAR_INTERRUPT_MASK_FROM_ISR
-    #define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusValue )    ( void ) ( uxSavedStatusValue )
+    #if ( portHAS_NESTED_INTERRUPTS == 1 )
+        #error portCLEAR_INTERRUPT_MASK_FROM_ISR must be defined for ports that support nested interrupts  (i.e. portHAS_NESTED_INTERRUPTS is set to 1)
+    #else
+        #define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusValue )    ( void ) ( uxSavedStatusValue )
+    #endif
+#else
+    #if ( portHAS_NESTED_INTERRUPTS == 0 )
+        #error portCLEAR_INTERRUPT_MASK_FROM_ISR must not be defined for ports that do not support nested interrupts (i.e. portHAS_NESTED_INTERRUPTS is set to 0)
+    #endif
 #endif
 
 #ifndef portCLEAN_UP_TCB
@@ -573,6 +621,13 @@
     #define traceTASK_SWITCHED_IN()
 #endif
 
+#ifndef traceSTARTING_SCHEDULER
+
+/* Called after all idle tasks and timer task (if enabled) have been created
+ * successfully, just before the scheduler is started. */
+    #define traceSTARTING_SCHEDULER( xIdleTaskHandles )
+#endif
+
 #ifndef traceINCREASE_TICK_COUNT
 
 /* Called before stepping the tick count after waking from tickless idle
@@ -934,15 +989,15 @@
 #endif
 
 #ifndef traceSTREAM_BUFFER_CREATE_FAILED
-    #define traceSTREAM_BUFFER_CREATE_FAILED( xIsMessageBuffer )
+    #define traceSTREAM_BUFFER_CREATE_FAILED( xStreamBufferType )
 #endif
 
 #ifndef traceSTREAM_BUFFER_CREATE_STATIC_FAILED
-    #define traceSTREAM_BUFFER_CREATE_STATIC_FAILED( xReturn, xIsMessageBuffer )
+    #define traceSTREAM_BUFFER_CREATE_STATIC_FAILED( xReturn, xStreamBufferType )
 #endif
 
 #ifndef traceSTREAM_BUFFER_CREATE
-    #define traceSTREAM_BUFFER_CREATE( pxStreamBuffer, xIsMessageBuffer )
+    #define traceSTREAM_BUFFER_CREATE( pxStreamBuffer, xStreamBufferType )
 #endif
 
 #ifndef traceSTREAM_BUFFER_DELETE
@@ -953,6 +1008,10 @@
     #define traceSTREAM_BUFFER_RESET( xStreamBuffer )
 #endif
 
+#ifndef traceSTREAM_BUFFER_RESET_FROM_ISR
+    #define traceSTREAM_BUFFER_RESET_FROM_ISR( xStreamBuffer )
+#endif
+
 #ifndef traceBLOCKING_ON_STREAM_BUFFER_SEND
     #define traceBLOCKING_ON_STREAM_BUFFER_SEND( xStreamBuffer )
 #endif
@@ -1425,6 +1484,14 @@
     #define traceRETURN_xQueueCreateSet( pxQueue )
 #endif
 
+#ifndef traceENTER_xQueueCreateSetStatic
+    #define traceENTER_xQueueCreateSetStatic( uxEventQueueLength )
+#endif
+
+#ifndef traceRETURN_xQueueCreateSetStatic
+    #define traceRETURN_xQueueCreateSetStatic( pxQueue )
+#endif
+
 #ifndef traceENTER_xQueueAddToSet
     #define traceENTER_xQueueAddToSet( xQueueOrSemaphore, xQueueSet )
 #endif
@@ -1618,7 +1685,7 @@
 #endif
 
 #ifndef traceENTER_xTaskCreateStatic
-    #define traceENTER_xTaskCreateStatic( pxTaskCode, pcName, ulStackDepth, pvParameters, uxPriority, puxStackBuffer, pxTaskBuffer )
+    #define traceENTER_xTaskCreateStatic( pxTaskCode, pcName, uxStackDepth, pvParameters, uxPriority, puxStackBuffer, pxTaskBuffer )
 #endif
 
 #ifndef traceRETURN_xTaskCreateStatic
@@ -1626,7 +1693,7 @@
 #endif
 
 #ifndef traceENTER_xTaskCreateStaticAffinitySet
-    #define traceENTER_xTaskCreateStaticAffinitySet( pxTaskCode, pcName, ulStackDepth, pvParameters, uxPriority, puxStackBuffer, pxTaskBuffer, uxCoreAffinityMask )
+    #define traceENTER_xTaskCreateStaticAffinitySet( pxTaskCode, pcName, uxStackDepth, pvParameters, uxPriority, puxStackBuffer, pxTaskBuffer, uxCoreAffinityMask )
 #endif
 
 #ifndef traceRETURN_xTaskCreateStaticAffinitySet
@@ -1666,7 +1733,7 @@
 #endif
 
 #ifndef traceENTER_xTaskCreate
-    #define traceENTER_xTaskCreate( pxTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask )
+    #define traceENTER_xTaskCreate( pxTaskCode, pcName, uxStackDepth, pvParameters, uxPriority, pxCreatedTask )
 #endif
 
 #ifndef traceRETURN_xTaskCreate
@@ -1674,7 +1741,7 @@
 #endif
 
 #ifndef traceENTER_xTaskCreateAffinitySet
-    #define traceENTER_xTaskCreateAffinitySet( pxTaskCode, pcName, usStackDepth, pvParameters, uxPriority, uxCoreAffinityMask, pxCreatedTask )
+    #define traceENTER_xTaskCreateAffinitySet( pxTaskCode, pcName, uxStackDepth, pvParameters, uxPriority, uxCoreAffinityMask, pxCreatedTask )
 #endif
 
 #ifndef traceRETURN_xTaskCreateAffinitySet
@@ -2350,7 +2417,7 @@
 #endif
 
 #ifndef traceENTER_xStreamBufferGenericCreate
-    #define traceENTER_xStreamBufferGenericCreate( xBufferSizeBytes, xTriggerLevelBytes, xIsMessageBuffer, pxSendCompletedCallback, pxReceiveCompletedCallback )
+    #define traceENTER_xStreamBufferGenericCreate( xBufferSizeBytes, xTriggerLevelBytes, xStreamBufferType, pxSendCompletedCallback, pxReceiveCompletedCallback )
 #endif
 
 #ifndef traceRETURN_xStreamBufferGenericCreate
@@ -2358,7 +2425,7 @@
 #endif
 
 #ifndef traceENTER_xStreamBufferGenericCreateStatic
-    #define traceENTER_xStreamBufferGenericCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, xIsMessageBuffer, pucStreamBufferStorageArea, pxStaticStreamBuffer, pxSendCompletedCallback, pxReceiveCompletedCallback )
+    #define traceENTER_xStreamBufferGenericCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, xStreamBufferType, pucStreamBufferStorageArea, pxStaticStreamBuffer, pxSendCompletedCallback, pxReceiveCompletedCallback )
 #endif
 
 #ifndef traceRETURN_xStreamBufferGenericCreateStatic
@@ -2389,6 +2456,14 @@
     #define traceRETURN_xStreamBufferReset( xReturn )
 #endif
 
+#ifndef traceENTER_xStreamBufferResetFromISR
+    #define traceENTER_xStreamBufferResetFromISR( xStreamBuffer )
+#endif
+
+#ifndef traceRETURN_xStreamBufferResetFromISR
+    #define traceRETURN_xStreamBufferResetFromISR( xReturn )
+#endif
+
 #ifndef traceENTER_xStreamBufferSetTriggerLevel
     #define traceENTER_xStreamBufferSetTriggerLevel( xStreamBuffer, xTriggerLevel )
 #endif
@@ -2485,6 +2560,22 @@
     #define traceRETURN_xStreamBufferReceiveCompletedFromISR( xReturn )
 #endif
 
+#ifndef traceENTER_uxStreamBufferGetStreamBufferNotificationIndex
+    #define traceENTER_uxStreamBufferGetStreamBufferNotificationIndex( xStreamBuffer )
+#endif
+
+#ifndef traceRETURN_uxStreamBufferGetStreamBufferNotificationIndex
+    #define traceRETURN_uxStreamBufferGetStreamBufferNotificationIndex( uxNotificationIndex )
+#endif
+
+#ifndef traceENTER_vStreamBufferSetStreamBufferNotificationIndex
+    #define traceENTER_vStreamBufferSetStreamBufferNotificationIndex( xStreamBuffer, uxNotificationIndex )
+#endif
+
+#ifndef traceRETURN_vStreamBufferSetStreamBufferNotificationIndex
+    #define traceRETURN_vStreamBufferSetStreamBufferNotificationIndex()
+#endif
+
 #ifndef traceENTER_uxStreamBufferGetStreamBufferNumber
     #define traceENTER_uxStreamBufferGetStreamBufferNumber( xStreamBuffer )
 #endif
@@ -2603,10 +2694,6 @@
     #define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS()
 #endif
 
-#ifndef configUSE_MALLOC_FAILED_HOOK
-    #define configUSE_MALLOC_FAILED_HOOK    0
-#endif
-
 #ifndef portPRIVILEGE_BIT
     #define portPRIVILEGE_BIT    ( ( UBaseType_t ) 0x00 )
 #endif
@@ -2759,9 +2846,9 @@
 
 #ifndef configSTACK_DEPTH_TYPE
 
-/* Defaults to uint16_t for backward compatibility, but can be overridden
- * in FreeRTOSConfig.h if uint16_t is too restrictive. */
-    #define configSTACK_DEPTH_TYPE    uint16_t
+/* Defaults to StackType_t for backward compatibility, but can be overridden
+ * in FreeRTOSConfig.h if StackType_t is too restrictive. */
+    #define configSTACK_DEPTH_TYPE    StackType_t
 #endif
 
 #ifndef configRUN_TIME_COUNTER_TYPE
@@ -2953,6 +3040,16 @@
     #define configCONTROL_INFINITE_LOOP()
 #endif
 
+/* Set configENABLE_PAC and/or configENABLE_BTI to 1 to enable PAC and/or BTI
+ * support and 0 to disable them. These are currently used in ARMv8.1-M ports. */
+#ifndef configENABLE_PAC
+    #define configENABLE_PAC    0
+#endif
+
+#ifndef configENABLE_BTI
+    #define configENABLE_BTI    0
+#endif
+
 /* Sometimes the FreeRTOSConfig.h settings only allow a task to be created using
  * dynamically allocated RAM, in which case when any task is deleted it is known
  * that both the task's stack and TCB need to be freed.  Sometimes the
@@ -3247,6 +3344,7 @@ typedef struct xSTATIC_STREAM_BUFFER
     #if ( configUSE_SB_COMPLETED_CALLBACK == 1 )
         void * pvDummy5[ 2 ];
     #endif
+    UBaseType_t uxDummy6;
 } StaticStreamBuffer_t;
 
 /* Message buffers are built on stream buffers. */

include/StackMacros.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *

include/atomic.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -33,6 +33,14 @@
  * This file implements atomic functions by disabling interrupts globally.
  * Implementations with architecture specific atomic instructions can be
  * provided under each compiler directory.
+ *
+ * The atomic interface can be used in FreeRTOS tasks on all FreeRTOS ports. It
+ * can also be used in Interrupt Service Routines (ISRs) on FreeRTOS ports that
+ * support nested interrupts (i.e. portHAS_NESTED_INTERRUPTS is set to 1). The
+ * atomic interface must not be used in ISRs on FreeRTOS ports that do not
+ * support nested interrupts (i.e. portHAS_NESTED_INTERRUPTS is set to 0)
+ * because ISRs on these ports cannot be interrupted and therefore, do not need
+ * atomics in ISRs.
  */
 
 #ifndef ATOMIC_H
@@ -59,7 +67,7 @@
  * ATOMIC_ENTER_CRITICAL().
  *
  */
-#if defined( portSET_INTERRUPT_MASK_FROM_ISR )
+#if ( portHAS_NESTED_INTERRUPTS == 1 )
 
 /* Nested interrupt scheme is supported in this port. */
     #define ATOMIC_ENTER_CRITICAL() \

include/croutine.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -746,6 +746,13 @@ void vCoRoutineAddToDelayedList( TickType_t xTicksToDelay,
  */
 BaseType_t xCoRoutineRemoveFromEventList( const List_t * pxEventList );
 
+
+/*
+ * This function resets the internal state of the coroutine module. It must be
+ * called by the application before restarting the scheduler.
+ */
+void vCoRoutineResetState( void ) PRIVILEGED_FUNCTION;
+
 /* *INDENT-OFF* */
 #ifdef __cplusplus
     }

include/deprecated_definitions.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *

include/event_groups.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -45,15 +45,15 @@
     #define eventWAIT_FOR_ALL_BITS           ( ( uint16_t ) 0x0400U )
     #define eventEVENT_BITS_CONTROL_BYTES    ( ( uint16_t ) 0xff00U )
 #elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS )
-    #define eventCLEAR_EVENTS_ON_EXIT_BIT    ( ( uint32_t ) 0x01000000UL )
-    #define eventUNBLOCKED_DUE_TO_BIT_SET    ( ( uint32_t ) 0x02000000UL )
-    #define eventWAIT_FOR_ALL_BITS           ( ( uint32_t ) 0x04000000UL )
-    #define eventEVENT_BITS_CONTROL_BYTES    ( ( uint32_t ) 0xff000000UL )
+    #define eventCLEAR_EVENTS_ON_EXIT_BIT    ( ( uint32_t ) 0x01000000U )
+    #define eventUNBLOCKED_DUE_TO_BIT_SET    ( ( uint32_t ) 0x02000000U )
+    #define eventWAIT_FOR_ALL_BITS           ( ( uint32_t ) 0x04000000U )
+    #define eventEVENT_BITS_CONTROL_BYTES    ( ( uint32_t ) 0xff000000U )
 #elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_64_BITS )
-    #define eventCLEAR_EVENTS_ON_EXIT_BIT    ( ( uint64_t ) 0x0100000000000000ULL )
-    #define eventUNBLOCKED_DUE_TO_BIT_SET    ( ( uint64_t ) 0x0200000000000000ULL )
-    #define eventWAIT_FOR_ALL_BITS           ( ( uint64_t ) 0x0400000000000000ULL )
-    #define eventEVENT_BITS_CONTROL_BYTES    ( ( uint64_t ) 0xff00000000000000ULL )
+    #define eventCLEAR_EVENTS_ON_EXIT_BIT    ( ( uint64_t ) 0x0100000000000000U )
+    #define eventUNBLOCKED_DUE_TO_BIT_SET    ( ( uint64_t ) 0x0200000000000000U )
+    #define eventWAIT_FOR_ALL_BITS           ( ( uint64_t ) 0x0400000000000000U )
+    #define eventEVENT_BITS_CONTROL_BYTES    ( ( uint64_t ) 0xff00000000000000U )
 #endif /* if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS ) */
 
 /* *INDENT-OFF* */
@@ -139,6 +139,9 @@ typedef TickType_t               EventBits_t;
  * each event group has 56 usable bits (bit 0 to bit 53). The EventBits_t type
  * is used to store event bits within an event group.
  *
+ * The configUSE_EVENT_GROUPS configuration constant must be set to 1 for xEventGroupCreate()
+ * to be available.
+ *
  * @return If the event group was created then a handle to the event group is
  * returned.  If there was insufficient FreeRTOS heap available to create the
  * event group then NULL is returned.  See https://www.FreeRTOS.org/a00111.html
@@ -196,6 +199,9 @@ typedef TickType_t               EventBits_t;
  * each event group has 56 usable bits (bit 0 to bit 53).  The EventBits_t type
  * is used to store event bits within an event group.
  *
+ * The configUSE_EVENT_GROUPS configuration constant must be set to 1 for xEventGroupCreateStatic()
+ * to be available.
+ *
  * @param pxEventGroupBuffer pxEventGroupBuffer must point to a variable of type
  * StaticEventGroup_t, which will be then be used to hold the event group's data
  * structures, removing the need for the memory to be allocated dynamically.
@@ -238,6 +244,9 @@ typedef TickType_t               EventBits_t;
  *
  * This function cannot be called from an interrupt.
  *
+ * The configUSE_EVENT_GROUPS configuration constant must be set to 1 for xEventGroupWaitBits()
+ * to be available.
+ *
  * @param xEventGroup The event group in which the bits are being tested.  The
  * event group must have previously been created using a call to
  * xEventGroupCreate().
@@ -331,6 +340,9 @@ EventBits_t xEventGroupWaitBits( EventGroupHandle_t xEventGroup,
  * Clear bits within an event group.  This function cannot be called from an
  * interrupt.
  *
+ * The configUSE_EVENT_GROUPS configuration constant must be set to 1 for xEventGroupClearBits()
+ * to be available.
+ *
  * @param xEventGroup The event group in which the bits are to be cleared.
  *
  * @param uxBitsToClear A bitwise value that indicates the bit or bits to clear
@@ -461,6 +473,9 @@ EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup,
  * Setting bits in an event group will automatically unblock tasks that are
  * blocked waiting for the bits.
  *
+ * The configUSE_EVENT_GROUPS configuration constant must be set to 1 for xEventGroupSetBits()
+ * to be available.
+ *
  * @param xEventGroup The event group in which the bits are to be set.
  *
  * @param uxBitsToSet A bitwise value that indicates the bit or bits to set.
@@ -468,14 +483,11 @@ EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup,
  * and bit 0 set uxBitsToSet to 0x09.
  *
  * @return The value of the event group at the time the call to
- * xEventGroupSetBits() returns.  There are two reasons why the returned value
- * might have the bits specified by the uxBitsToSet parameter cleared.  First,
- * if setting a bit results in a task that was waiting for the bit leaving the
- * blocked state then it is possible the bit will be cleared automatically
- * (see the xClearBitOnExit parameter of xEventGroupWaitBits()).  Second, any
- * unblocked (or otherwise Ready state) task that has a priority above that of
- * the task that called xEventGroupSetBits() will execute and may change the
- * event group value before the call to xEventGroupSetBits() returns.
+ * xEventGroupSetBits() returns.  Returned value might have the bits specified
+ * by the uxBitsToSet parameter cleared if setting a bit results in a task
+ * that was waiting for the bit leaving the blocked state then it is possible
+ * the bit will be cleared automatically (see the xClearBitOnExit parameter
+ * of xEventGroupWaitBits()).
  *
  * Example usage:
  * @code{c}
@@ -625,6 +637,9 @@ EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup,
  * this case all the bits specified by uxBitsToWait will be automatically
  * cleared before the function returns.
  *
+ * The configUSE_EVENT_GROUPS configuration constant must be set to 1 for xEventGroupSync()
+ * to be available.
+ *
  * @param xEventGroup The event group in which the bits are being tested.  The
  * event group must have previously been created using a call to
  * xEventGroupCreate().
@@ -743,6 +758,9 @@ EventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup,
  * Returns the current value of the bits in an event group.  This function
  * cannot be used from an interrupt.
  *
+ * The configUSE_EVENT_GROUPS configuration constant must be set to 1 for xEventGroupGetBits()
+ * to be available.
+ *
  * @param xEventGroup The event group being queried.
  *
  * @return The event group bits at the time xEventGroupGetBits() was called.
@@ -760,6 +778,9 @@ EventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup,
  *
  * A version of xEventGroupGetBits() that can be called from an ISR.
  *
+ * The configUSE_EVENT_GROUPS configuration constant must be set to 1 for xEventGroupGetBitsFromISR()
+ * to be available.
+ *
  * @param xEventGroup The event group being queried.
  *
  * @return The event group bits at the time xEventGroupGetBitsFromISR() was called.
@@ -779,6 +800,9 @@ EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup ) PRIVILEG
  * xEventGroupCreate().  Tasks that are blocked on the event group will be
  * unblocked and obtain 0 as the event group's value.
  *
+ * The configUSE_EVENT_GROUPS configuration constant must be set to 1 for vEventGroupDelete()
+ * to be available.
+ *
  * @param xEventGroup The event group being deleted.
  */
 void vEventGroupDelete( EventGroupHandle_t xEventGroup ) PRIVILEGED_FUNCTION;
@@ -793,6 +817,9 @@ void vEventGroupDelete( EventGroupHandle_t xEventGroup ) PRIVILEGED_FUNCTION;
  * Retrieve a pointer to a statically created event groups's data structure
  * buffer. It is the same buffer that is supplied at the time of creation.
  *
+ * The configUSE_EVENT_GROUPS configuration constant must be set to 1 for xEventGroupGetStaticBuffer()
+ * to be available.
+ *
  * @param xEventGroup The event group for which to retrieve the buffer.
  *
  * @param ppxEventGroupBuffer Used to return a pointer to the event groups's

include/list.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -172,7 +172,7 @@ typedef struct xLIST_ITEM ListItem_t;
 typedef struct xLIST
 {
     listFIRST_LIST_INTEGRITY_CHECK_VALUE      /**< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
-    volatile UBaseType_t uxNumberOfItems;
+    configLIST_VOLATILE UBaseType_t uxNumberOfItems;
     ListItem_t * configLIST_VOLATILE pxIndex; /**< Used to walk through the list.  Points to the last item returned by a call to listGET_OWNER_OF_NEXT_ENTRY (). */
     MiniListItem_t xListEnd;                  /**< List item that contains the maximum possible item value meaning it is always at the end of the list and is therefore used as a marker. */
     listSECOND_LIST_INTEGRITY_CHECK_VALUE     /**< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
@@ -282,7 +282,8 @@ typedef struct xLIST
  * \page listGET_OWNER_OF_NEXT_ENTRY listGET_OWNER_OF_NEXT_ENTRY
  * \ingroup LinkedList
  */
-#define listGET_OWNER_OF_NEXT_ENTRY( pxTCB, pxList )                                           \
+#if ( configNUMBER_OF_CORES == 1 )
+    #define listGET_OWNER_OF_NEXT_ENTRY( pxTCB, pxList )                                       \
     do {                                                                                       \
         List_t * const pxConstList = ( pxList );                                               \
         /* Increment the index to the next item and return the item, ensuring */               \
@@ -294,6 +295,13 @@ typedef struct xLIST
         }                                                                                      \
         ( pxTCB ) = ( pxConstList )->pxIndex->pvOwner;                                         \
     } while( 0 )
+#else /* #if ( configNUMBER_OF_CORES == 1 ) */
+
+/* This function is not required in SMP. FreeRTOS SMP scheduler doesn't use
+ * pxIndex and it should always point to the xListEnd. Not defining this macro
+ * here to prevent updating pxIndex.
+ */
+#endif /* #if ( configNUMBER_OF_CORES == 1 ) */
 
 /*
  * Version of uxListRemove() that does not return a value.  Provided as a slight
@@ -314,19 +322,19 @@ typedef struct xLIST
 #define listREMOVE_ITEM( pxItemToRemove ) \
     do {                                  \
         /* The list item knows which list it is in.  Obtain the list from the list \
-         * item. */                                                              \
-        List_t * const pxList = ( pxItemToRemove )->pxContainer;                 \
-                                                                                 \
-        ( pxItemToRemove )->pxNext->pxPrevious = ( pxItemToRemove )->pxPrevious; \
-        ( pxItemToRemove )->pxPrevious->pxNext = ( pxItemToRemove )->pxNext;     \
-        /* Make sure the index is left pointing to a valid item. */              \
-        if( pxList->pxIndex == ( pxItemToRemove ) )                              \
-        {                                                                        \
-            pxList->pxIndex = ( pxItemToRemove )->pxPrevious;                    \
-        }                                                                        \
-                                                                                 \
-        ( pxItemToRemove )->pxContainer = NULL;                                  \
-        ( pxList->uxNumberOfItems )--;                                           \
+         * item. */                                                                                 \
+        List_t * const pxList = ( pxItemToRemove )->pxContainer;                                    \
+                                                                                                    \
+        ( pxItemToRemove )->pxNext->pxPrevious = ( pxItemToRemove )->pxPrevious;                    \
+        ( pxItemToRemove )->pxPrevious->pxNext = ( pxItemToRemove )->pxNext;                        \
+        /* Make sure the index is left pointing to a valid item. */                                 \
+        if( pxList->pxIndex == ( pxItemToRemove ) )                                                 \
+        {                                                                                           \
+            pxList->pxIndex = ( pxItemToRemove )->pxPrevious;                                       \
+        }                                                                                           \
+                                                                                                    \
+        ( pxItemToRemove )->pxContainer = NULL;                                                     \
+        ( ( pxList )->uxNumberOfItems ) = ( UBaseType_t ) ( ( ( pxList )->uxNumberOfItems ) - 1U ); \
     } while( 0 )
 
 /*
@@ -363,17 +371,17 @@ typedef struct xLIST
                                                                                 \
         /* Insert a new list item into ( pxList ), but rather than sort the list, \
          * makes the new list item the last item to be removed by a call to \
-         * listGET_OWNER_OF_NEXT_ENTRY(). */                 \
-        ( pxNewListItem )->pxNext = pxIndex;                 \
-        ( pxNewListItem )->pxPrevious = pxIndex->pxPrevious; \
-                                                             \
-        pxIndex->pxPrevious->pxNext = ( pxNewListItem );     \
-        pxIndex->pxPrevious = ( pxNewListItem );             \
-                                                             \
-        /* Remember which list the item is in. */            \
-        ( pxNewListItem )->pxContainer = ( pxList );         \
-                                                             \
-        ( ( pxList )->uxNumberOfItems )++;                   \
+         * listGET_OWNER_OF_NEXT_ENTRY(). */                                                        \
+        ( pxNewListItem )->pxNext = pxIndex;                                                        \
+        ( pxNewListItem )->pxPrevious = pxIndex->pxPrevious;                                        \
+                                                                                                    \
+        pxIndex->pxPrevious->pxNext = ( pxNewListItem );                                            \
+        pxIndex->pxPrevious = ( pxNewListItem );                                                    \
+                                                                                                    \
+        /* Remember which list the item is in. */                                                   \
+        ( pxNewListItem )->pxContainer = ( pxList );                                                \
+                                                                                                    \
+        ( ( pxList )->uxNumberOfItems ) = ( UBaseType_t ) ( ( ( pxList )->uxNumberOfItems ) + 1U ); \
     } while( 0 )
 
 /*

include/message_buffer.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -43,12 +43,12 @@
  * writer and reader to be different tasks or interrupts, but, unlike other
  * FreeRTOS objects, it is not safe to have multiple different writers or
  * multiple different readers.  If there are to be multiple different writers
- * then the application writer must place each call to a writing API function
- * (such as xMessageBufferSend()) inside a critical section and set the send
- * block time to 0.  Likewise, if there are to be multiple different readers
- * then the application writer must place each call to a reading API function
- * (such as xMessageBufferRead()) inside a critical section and set the receive
- * timeout to 0.
+ * then the application writer must serialize calls to writing API functions
+ * (such as xStreamBufferSend()).  Likewise, if there are to be multiple
+ * different readers then the application writer must serialize calls to reading
+ * API functions (such as xStreamBufferReceive()).  One way to achieve such
+ * serialization in single core or SMP kernel is to place each API call inside a
+ * critical section and use a block time of 0.
  *
  * Message buffers hold variable length messages.  To enable that, when a
  * message is written to the message buffer an additional sizeof( size_t ) bytes
@@ -100,6 +100,8 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
  *
  * configSUPPORT_DYNAMIC_ALLOCATION must be set to 1 or left undefined in
  * FreeRTOSConfig.h for xMessageBufferCreate() to be available.
+ * configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
+ * xMessageBufferCreate() to be available.
  *
  * @param xBufferSizeBytes The total number of bytes (not messages) the message
  * buffer will be able to hold at any one time.  When a message is written to
@@ -156,11 +158,11 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
  * \ingroup MessageBufferManagement
  */
 #define xMessageBufferCreate( xBufferSizeBytes ) \
-    xStreamBufferGenericCreate( ( xBufferSizeBytes ), ( size_t ) 0, pdTRUE, NULL, NULL )
+    xStreamBufferGenericCreate( ( xBufferSizeBytes ), ( size_t ) 0, sbTYPE_MESSAGE_BUFFER, NULL, NULL )
 
 #if ( configUSE_SB_COMPLETED_CALLBACK == 1 )
     #define xMessageBufferCreateWithCallback( xBufferSizeBytes, pxSendCompletedCallback, pxReceiveCompletedCallback ) \
-    xStreamBufferGenericCreate( ( xBufferSizeBytes ), ( size_t ) 0, pdTRUE, ( pxSendCompletedCallback ), ( pxReceiveCompletedCallback ) )
+    xStreamBufferGenericCreate( ( xBufferSizeBytes ), ( size_t ) 0, sbTYPE_MESSAGE_BUFFER, ( pxSendCompletedCallback ), ( pxReceiveCompletedCallback ) )
 #endif
 
 /**
@@ -168,12 +170,15 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
  *
  * @code{c}
  * MessageBufferHandle_t xMessageBufferCreateStatic( size_t xBufferSizeBytes,
- *                                                uint8_t *pucMessageBufferStorageArea,
- *                                                StaticMessageBuffer_t *pxStaticMessageBuffer );
+ *                                                   uint8_t *pucMessageBufferStorageArea,
+ *                                                   StaticMessageBuffer_t *pxStaticMessageBuffer );
  * @endcode
  * Creates a new message buffer using statically allocated memory.  See
  * xMessageBufferCreate() for a version that uses dynamically allocated memory.
  *
+ * configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
+ * xMessageBufferCreateStatic() to be available.
+ *
  * @param xBufferSizeBytes The size, in bytes, of the buffer pointed to by the
  * pucMessageBufferStorageArea parameter.  When a message is written to the
  * message buffer an additional sizeof( size_t ) bytes are also written to store
@@ -238,11 +243,11 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
  * \ingroup MessageBufferManagement
  */
 #define xMessageBufferCreateStatic( xBufferSizeBytes, pucMessageBufferStorageArea, pxStaticMessageBuffer ) \
-    xStreamBufferGenericCreateStatic( ( xBufferSizeBytes ), 0, pdTRUE, ( pucMessageBufferStorageArea ), ( pxStaticMessageBuffer ), NULL, NULL )
+    xStreamBufferGenericCreateStatic( ( xBufferSizeBytes ), 0, sbTYPE_MESSAGE_BUFFER, ( pucMessageBufferStorageArea ), ( pxStaticMessageBuffer ), NULL, NULL )
 
 #if ( configUSE_SB_COMPLETED_CALLBACK == 1 )
     #define xMessageBufferCreateStaticWithCallback( xBufferSizeBytes, pucMessageBufferStorageArea, pxStaticMessageBuffer, pxSendCompletedCallback, pxReceiveCompletedCallback ) \
-    xStreamBufferGenericCreateStatic( ( xBufferSizeBytes ), 0, pdTRUE, ( pucMessageBufferStorageArea ), ( pxStaticMessageBuffer ), ( pxSendCompletedCallback ), ( pxReceiveCompletedCallback ) )
+    xStreamBufferGenericCreateStatic( ( xBufferSizeBytes ), 0, sbTYPE_MESSAGE_BUFFER, ( pucMessageBufferStorageArea ), ( pxStaticMessageBuffer ), ( pxSendCompletedCallback ), ( pxReceiveCompletedCallback ) )
 #endif
 
 /**
@@ -258,6 +263,9 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
  * buffer and storage area buffer. These are the same buffers that are supplied
  * at the time of creation.
  *
+ * configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
+ * xMessageBufferGetStaticBuffers() to be available.
+ *
  * @param xMessageBuffer The message buffer for which to retrieve the buffers.
  *
  * @param ppucMessageBufferStorageArea Used to return a pointer to the
@@ -281,9 +289,9 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
  *
  * @code{c}
  * size_t xMessageBufferSend( MessageBufferHandle_t xMessageBuffer,
- *                         const void *pvTxData,
- *                         size_t xDataLengthBytes,
- *                         TickType_t xTicksToWait );
+ *                            const void *pvTxData,
+ *                            size_t xDataLengthBytes,
+ *                            TickType_t xTicksToWait );
  * @endcode
  *
  * Sends a discrete message to the message buffer.  The message can be any
@@ -298,17 +306,20 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
  * writer and reader to be different tasks or interrupts, but, unlike other
  * FreeRTOS objects, it is not safe to have multiple different writers or
  * multiple different readers.  If there are to be multiple different writers
- * then the application writer must place each call to a writing API function
- * (such as xMessageBufferSend()) inside a critical section and set the send
- * block time to 0.  Likewise, if there are to be multiple different readers
- * then the application writer must place each call to a reading API function
- * (such as xMessageBufferRead()) inside a critical section and set the receive
- * block time to 0.
+ * then the application writer must serialize calls to writing API functions
+ * (such as xStreamBufferSend()).  Likewise, if there are to be multiple
+ * different readers then the application writer must serialize calls to reading
+ * API functions (such as xStreamBufferReceive()).  One way to achieve such
+ * serialization in single core or SMP kernel is to place each API call inside a
+ * critical section and use a block time of 0.
  *
  * Use xMessageBufferSend() to write to a message buffer from a task.  Use
  * xMessageBufferSendFromISR() to write to a message buffer from an interrupt
  * service routine (ISR).
  *
+ * configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
+ * xMessageBufferSend() to be available.
+ *
  * @param xMessageBuffer The handle of the message buffer to which a message is
  * being sent.
  *
@@ -381,9 +392,9 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
  *
  * @code{c}
  * size_t xMessageBufferSendFromISR( MessageBufferHandle_t xMessageBuffer,
- *                                const void *pvTxData,
- *                                size_t xDataLengthBytes,
- *                                BaseType_t *pxHigherPriorityTaskWoken );
+ *                                   const void *pvTxData,
+ *                                   size_t xDataLengthBytes,
+ *                                   BaseType_t *pxHigherPriorityTaskWoken );
  * @endcode
  *
  * Interrupt safe version of the API function that sends a discrete message to
@@ -398,17 +409,20 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
  * writer and reader to be different tasks or interrupts, but, unlike other
  * FreeRTOS objects, it is not safe to have multiple different writers or
  * multiple different readers.  If there are to be multiple different writers
- * then the application writer must place each call to a writing API function
- * (such as xMessageBufferSend()) inside a critical section and set the send
- * block time to 0.  Likewise, if there are to be multiple different readers
- * then the application writer must place each call to a reading API function
- * (such as xMessageBufferRead()) inside a critical section and set the receive
- * block time to 0.
+ * then the application writer must serialize calls to writing API functions
+ * (such as xStreamBufferSend()).  Likewise, if there are to be multiple
+ * different readers then the application writer must serialize calls to reading
+ * API functions (such as xStreamBufferReceive()).  One way to achieve such
+ * serialization in single core or SMP kernel is to place each API call inside a
+ * critical section and use a block time of 0.
  *
  * Use xMessageBufferSend() to write to a message buffer from a task.  Use
  * xMessageBufferSendFromISR() to write to a message buffer from an interrupt
  * service routine (ISR).
  *
+ * configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
+ * xMessageBufferSendFromISR() to be available.
+ *
  * @param xMessageBuffer The handle of the message buffer to which a message is
  * being sent.
  *
@@ -486,9 +500,9 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
  *
  * @code{c}
  * size_t xMessageBufferReceive( MessageBufferHandle_t xMessageBuffer,
- *                            void *pvRxData,
- *                            size_t xBufferLengthBytes,
- *                            TickType_t xTicksToWait );
+ *                               void *pvRxData,
+ *                               size_t xBufferLengthBytes,
+ *                               TickType_t xTicksToWait );
  * @endcode
  *
  * Receives a discrete message from a message buffer.  Messages can be of
@@ -502,17 +516,20 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
  * writer and reader to be different tasks or interrupts, but, unlike other
  * FreeRTOS objects, it is not safe to have multiple different writers or
  * multiple different readers.  If there are to be multiple different writers
- * then the application writer must place each call to a writing API function
- * (such as xMessageBufferSend()) inside a critical section and set the send
- * block time to 0.  Likewise, if there are to be multiple different readers
- * then the application writer must place each call to a reading API function
- * (such as xMessageBufferRead()) inside a critical section and set the receive
- * block time to 0.
+ * then the application writer must serialize calls to writing API functions
+ * (such as xStreamBufferSend()).  Likewise, if there are to be multiple
+ * different readers then the application writer must serialize calls to reading
+ * API functions (such as xStreamBufferReceive()).  One way to achieve such
+ * serialization in single core or SMP kernel is to place each API call inside a
+ * critical section and use a block time of 0.
  *
  * Use xMessageBufferReceive() to read from a message buffer from a task.  Use
  * xMessageBufferReceiveFromISR() to read from a message buffer from an
  * interrupt service routine (ISR).
  *
+ * configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
+ * xMessageBufferReceive() to be available.
+ *
  * @param xMessageBuffer The handle of the message buffer from which a message
  * is being received.
  *
@@ -576,9 +593,9 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
  *
  * @code{c}
  * size_t xMessageBufferReceiveFromISR( MessageBufferHandle_t xMessageBuffer,
- *                                   void *pvRxData,
- *                                   size_t xBufferLengthBytes,
- *                                   BaseType_t *pxHigherPriorityTaskWoken );
+ *                                      void *pvRxData,
+ *                                      size_t xBufferLengthBytes,
+ *                                      BaseType_t *pxHigherPriorityTaskWoken );
  * @endcode
  *
  * An interrupt safe version of the API function that receives a discrete
@@ -593,17 +610,20 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
  * writer and reader to be different tasks or interrupts, but, unlike other
  * FreeRTOS objects, it is not safe to have multiple different writers or
  * multiple different readers.  If there are to be multiple different writers
- * then the application writer must place each call to a writing API function
- * (such as xMessageBufferSend()) inside a critical section and set the send
- * block time to 0.  Likewise, if there are to be multiple different readers
- * then the application writer must place each call to a reading API function
- * (such as xMessageBufferRead()) inside a critical section and set the receive
- * block time to 0.
+ * then the application writer must serialize calls to writing API functions
+ * (such as xStreamBufferSend()).  Likewise, if there are to be multiple
+ * different readers then the application writer must serialize calls to reading
+ * API functions (such as xStreamBufferReceive()).  One way to achieve such
+ * serialization in single core or SMP kernel is to place each API call inside a
+ * critical section and use a block time of 0.
  *
  * Use xMessageBufferReceive() to read from a message buffer from a task.  Use
  * xMessageBufferReceiveFromISR() to read from a message buffer from an
  * interrupt service routine (ISR).
  *
+ * configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
+ * xMessageBufferReceiveFromISR() to be available.
+ *
  * @param xMessageBuffer The handle of the message buffer from which a message
  * is being received.
  *
@@ -687,6 +707,9 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
  * A message buffer handle must not be used after the message buffer has been
  * deleted.
  *
+ * configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
+ * vMessageBufferDelete() to be available.
+ *
  * @param xMessageBuffer The handle of the message buffer to be deleted.
  *
  */
@@ -703,6 +726,9 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
  * cannot accept any more messages, of any size, until space is made available
  * by a message being removed from the message buffer.
  *
+ * configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
+ * xMessageBufferIsFull() to be available.
+ *
  * @param xMessageBuffer The handle of the message buffer being queried.
  *
  * @return If the message buffer referenced by xMessageBuffer is full then
@@ -719,6 +745,9 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
  *
  * Tests to see if a message buffer is empty (does not contain any messages).
  *
+ * configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
+ * xMessageBufferIsEmpty() to be available.
+ *
  * @param xMessageBuffer The handle of the message buffer being queried.
  *
  * @return If the message buffer referenced by xMessageBuffer is empty then
@@ -739,6 +768,13 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
  *
  * A message buffer can only be reset if there are no tasks blocked on it.
  *
+ * Use xMessageBufferReset() to reset a message buffer from a task.
+ * Use xMessageBufferResetFromISR() to reset a message buffer from an
+ * interrupt service routine (ISR).
+ *
+ * configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
+ * xMessageBufferReset() to be available.
+ *
  * @param xMessageBuffer The handle of the message buffer being reset.
  *
  * @return If the message buffer was reset then pdPASS is returned.  If the
@@ -753,6 +789,38 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
     xStreamBufferReset( xMessageBuffer )
 
 
+/**
+ * message_buffer.h
+ * @code{c}
+ * BaseType_t xMessageBufferResetFromISR( MessageBufferHandle_t xMessageBuffer );
+ * @endcode
+ *
+ * An interrupt safe version of the API function that resets the message buffer.
+ * Resets a message buffer to its initial empty state, discarding any message it
+ * contained.
+ *
+ * A message buffer can only be reset if there are no tasks blocked on it.
+ *
+ * Use xMessageBufferReset() to reset a message buffer from a task.
+ * Use xMessageBufferResetFromISR() to reset a message buffer from an
+ * interrupt service routine (ISR).
+ *
+ * configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
+ * xMessageBufferResetFromISR() to be available.
+ *
+ * @param xMessageBuffer The handle of the message buffer being reset.
+ *
+ * @return If the message buffer was reset then pdPASS is returned.  If the
+ * message buffer could not be reset because either there was a task blocked on
+ * the message queue to wait for space to become available, or to wait for a
+ * a message to be available, then pdFAIL is returned.
+ *
+ * \defgroup xMessageBufferResetFromISR xMessageBufferResetFromISR
+ * \ingroup MessageBufferManagement
+ */
+#define xMessageBufferResetFromISR( xMessageBuffer ) \
+    xStreamBufferResetFromISR( xMessageBuffer )
+
 /**
  * message_buffer.h
  * @code{c}
@@ -760,6 +828,9 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
  * @endcode
  * Returns the number of bytes of free space in the message buffer.
  *
+ * configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
+ * xMessageBufferSpaceAvailable() to be available.
+ *
  * @param xMessageBuffer The handle of the message buffer being queried.
  *
  * @return The number of bytes that can be written to the message buffer before
@@ -786,6 +857,9 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
  * Useful if xMessageBufferReceive() returned 0 because the size of the buffer
  * passed into xMessageBufferReceive() was too small to hold the next message.
  *
+ * configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
+ * xMessageBufferNextLengthBytes() to be available.
+ *
  * @param xMessageBuffer The handle of the message buffer being queried.
  *
  * @return The length (in bytes) of the next message in the message buffer, or 0
@@ -795,7 +869,7 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
  * \ingroup MessageBufferManagement
  */
 #define xMessageBufferNextLengthBytes( xMessageBuffer ) \
-    xStreamBufferNextMessageLengthBytes( xMessageBuffer ) PRIVILEGED_FUNCTION;
+    xStreamBufferNextMessageLengthBytes( xMessageBuffer )
 
 /**
  * message_buffer.h
@@ -817,6 +891,9 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
  * See the example implemented in FreeRTOS/Demo/Minimal/MessageBufferAMP.c for
  * additional information.
  *
+ * configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
+ * xMessageBufferSendCompletedFromISR() to be available.
+ *
  * @param xMessageBuffer The handle of the stream buffer to which data was
  * written.
  *
@@ -858,6 +935,9 @@ typedef StreamBufferHandle_t MessageBufferHandle_t;
  * See the example implemented in FreeRTOS/Demo/Minimal/MessageBufferAMP.c for
  * additional information.
  *
+ * configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
+ * xMessageBufferReceiveCompletedFromISR() to be available.
+ *
  * @param xMessageBuffer The handle of the stream buffer from which data was
  * read.
  *

include/mpu_prototypes.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -136,25 +136,59 @@ BaseType_t MPU_xTaskGetSchedulerState( void ) FREERTOS_SYSTEM_CALL;
 /* Privileged only wrappers for Task APIs. These are needed so that
  * the application can use opaque handles maintained in mpu_wrappers.c
  * with all the APIs. */
-BaseType_t MPU_xTaskCreate( TaskFunction_t pxTaskCode,
-                            const char * const pcName,
-                            const uint16_t usStackDepth,
-                            void * const pvParameters,
-                            UBaseType_t uxPriority,
-                            TaskHandle_t * const pxCreatedTask ) PRIVILEGED_FUNCTION;
-TaskHandle_t MPU_xTaskCreateStatic( TaskFunction_t pxTaskCode,
-                                    const char * const pcName,
-                                    const uint32_t ulStackDepth,
-                                    void * const pvParameters,
-                                    UBaseType_t uxPriority,
-                                    StackType_t * const puxStackBuffer,
-                                    StaticTask_t * const pxTaskBuffer ) PRIVILEGED_FUNCTION;
-void MPU_vTaskDelete( TaskHandle_t xTaskToDelete ) PRIVILEGED_FUNCTION;
-void MPU_vTaskPrioritySet( TaskHandle_t xTask,
-                           UBaseType_t uxNewPriority ) PRIVILEGED_FUNCTION;
-TaskHandle_t MPU_xTaskGetHandle( const char * pcNameToQuery ) PRIVILEGED_FUNCTION;
-BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask,
-                                             void * pvParameter ) PRIVILEGED_FUNCTION;
+#if ( configUSE_MPU_WRAPPERS_V1 == 1 )
+
+    BaseType_t MPU_xTaskCreate( TaskFunction_t pxTaskCode,
+                                const char * const pcName,
+                                const configSTACK_DEPTH_TYPE uxStackDepth,
+                                void * const pvParameters,
+                                UBaseType_t uxPriority,
+                                TaskHandle_t * const pxCreatedTask ) FREERTOS_SYSTEM_CALL;
+    TaskHandle_t MPU_xTaskCreateStatic( TaskFunction_t pxTaskCode,
+                                        const char * const pcName,
+                                        const configSTACK_DEPTH_TYPE uxStackDepth,
+                                        void * const pvParameters,
+                                        UBaseType_t uxPriority,
+                                        StackType_t * const puxStackBuffer,
+                                        StaticTask_t * const pxTaskBuffer ) FREERTOS_SYSTEM_CALL;
+    void MPU_vTaskDelete( TaskHandle_t xTaskToDelete ) FREERTOS_SYSTEM_CALL;
+    void MPU_vTaskPrioritySet( TaskHandle_t xTask,
+                               UBaseType_t uxNewPriority ) FREERTOS_SYSTEM_CALL;
+    TaskHandle_t MPU_xTaskGetHandle( const char * pcNameToQuery ) FREERTOS_SYSTEM_CALL;
+    BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask,
+                                                 void * pvParameter ) FREERTOS_SYSTEM_CALL;
+    void MPU_vTaskGetRunTimeStatistics( char * pcWriteBuffer,
+                                        size_t uxBufferLength ) FREERTOS_SYSTEM_CALL;
+    void MPU_vTaskListTasks( char * pcWriteBuffer,
+                             size_t uxBufferLength ) FREERTOS_SYSTEM_CALL;
+    void MPU_vTaskSuspendAll( void ) FREERTOS_SYSTEM_CALL;
+    BaseType_t MPU_xTaskCatchUpTicks( TickType_t xTicksToCatchUp ) FREERTOS_SYSTEM_CALL;
+    BaseType_t MPU_xTaskResumeAll( void ) FREERTOS_SYSTEM_CALL;
+
+#else /* #if ( configUSE_MPU_WRAPPERS_V1 == 1 ) */
+
+    BaseType_t MPU_xTaskCreate( TaskFunction_t pxTaskCode,
+                                const char * const pcName,
+                                const configSTACK_DEPTH_TYPE uxStackDepth,
+                                void * const pvParameters,
+                                UBaseType_t uxPriority,
+                                TaskHandle_t * const pxCreatedTask ) PRIVILEGED_FUNCTION;
+    TaskHandle_t MPU_xTaskCreateStatic( TaskFunction_t pxTaskCode,
+                                        const char * const pcName,
+                                        const configSTACK_DEPTH_TYPE uxStackDepth,
+                                        void * const pvParameters,
+                                        UBaseType_t uxPriority,
+                                        StackType_t * const puxStackBuffer,
+                                        StaticTask_t * const pxTaskBuffer ) PRIVILEGED_FUNCTION;
+    void MPU_vTaskDelete( TaskHandle_t xTaskToDelete ) PRIVILEGED_FUNCTION;
+    void MPU_vTaskPrioritySet( TaskHandle_t xTask,
+                               UBaseType_t uxNewPriority ) PRIVILEGED_FUNCTION;
+    TaskHandle_t MPU_xTaskGetHandle( const char * pcNameToQuery ) PRIVILEGED_FUNCTION;
+    BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask,
+                                                 void * pvParameter ) PRIVILEGED_FUNCTION;
+
+#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 1 ) */
+
 char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) PRIVILEGED_FUNCTION;
 BaseType_t MPU_xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition,
                                       TaskHandle_t * pxCreatedTask ) PRIVILEGED_FUNCTION;
@@ -215,28 +249,64 @@ uint8_t MPU_ucQueueGetQueueType( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
 /* Privileged only wrappers for Queue APIs. These are needed so that
  * the application can use opaque handles maintained in mpu_wrappers.c
  * with all the APIs. */
-void MPU_vQueueDelete( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
-QueueHandle_t MPU_xQueueCreateMutex( const uint8_t ucQueueType ) PRIVILEGED_FUNCTION;
-QueueHandle_t MPU_xQueueCreateMutexStatic( const uint8_t ucQueueType,
-                                           StaticQueue_t * pxStaticQueue ) PRIVILEGED_FUNCTION;
-QueueHandle_t MPU_xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount,
-                                                 const UBaseType_t uxInitialCount ) PRIVILEGED_FUNCTION;
-QueueHandle_t MPU_xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount,
-                                                       const UBaseType_t uxInitialCount,
-                                                       StaticQueue_t * pxStaticQueue ) PRIVILEGED_FUNCTION;
-QueueHandle_t MPU_xQueueGenericCreate( const UBaseType_t uxQueueLength,
-                                       const UBaseType_t uxItemSize,
-                                       const uint8_t ucQueueType ) PRIVILEGED_FUNCTION;
-QueueHandle_t MPU_xQueueGenericCreateStatic( const UBaseType_t uxQueueLength,
-                                             const UBaseType_t uxItemSize,
-                                             uint8_t * pucQueueStorage,
-                                             StaticQueue_t * pxStaticQueue,
-                                             const uint8_t ucQueueType ) PRIVILEGED_FUNCTION;
-QueueSetHandle_t MPU_xQueueCreateSet( const UBaseType_t uxEventQueueLength ) PRIVILEGED_FUNCTION;
-BaseType_t MPU_xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore,
-                                    QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION;
-BaseType_t MPU_xQueueGenericReset( QueueHandle_t xQueue,
-                                   BaseType_t xNewQueue ) PRIVILEGED_FUNCTION;
+#if ( configUSE_MPU_WRAPPERS_V1 == 1 )
+
+    void MPU_vQueueDelete( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
+    QueueHandle_t MPU_xQueueCreateMutex( const uint8_t ucQueueType ) FREERTOS_SYSTEM_CALL;
+    QueueHandle_t MPU_xQueueCreateMutexStatic( const uint8_t ucQueueType,
+                                               StaticQueue_t * pxStaticQueue ) FREERTOS_SYSTEM_CALL;
+    QueueHandle_t MPU_xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount,
+                                                     const UBaseType_t uxInitialCount ) FREERTOS_SYSTEM_CALL;
+    QueueHandle_t MPU_xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount,
+                                                           const UBaseType_t uxInitialCount,
+                                                           StaticQueue_t * pxStaticQueue ) FREERTOS_SYSTEM_CALL;
+    QueueHandle_t MPU_xQueueGenericCreate( const UBaseType_t uxQueueLength,
+                                           const UBaseType_t uxItemSize,
+                                           const uint8_t ucQueueType ) FREERTOS_SYSTEM_CALL;
+    QueueHandle_t MPU_xQueueGenericCreateStatic( const UBaseType_t uxQueueLength,
+                                                 const UBaseType_t uxItemSize,
+                                                 uint8_t * pucQueueStorage,
+                                                 StaticQueue_t * pxStaticQueue,
+                                                 const uint8_t ucQueueType ) FREERTOS_SYSTEM_CALL;
+    QueueSetHandle_t MPU_xQueueCreateSet( const UBaseType_t uxEventQueueLength ) FREERTOS_SYSTEM_CALL;
+    QueueSetHandle_t MPU_xQueueCreateSetStatic( const UBaseType_t uxEventQueueLength,
+                                                uint8_t * pucQueueStorage,
+                                                StaticQueue_t * pxStaticQueue ) FREERTOS_SYSTEM_CALL;
+    BaseType_t MPU_xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore,
+                                        QueueSetHandle_t xQueueSet ) FREERTOS_SYSTEM_CALL;
+    BaseType_t MPU_xQueueGenericReset( QueueHandle_t xQueue,
+                                       BaseType_t xNewQueue ) FREERTOS_SYSTEM_CALL;
+
+#else /* #if ( configUSE_MPU_WRAPPERS_V1 == 1 ) */
+
+    void MPU_vQueueDelete( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
+    QueueHandle_t MPU_xQueueCreateMutex( const uint8_t ucQueueType ) PRIVILEGED_FUNCTION;
+    QueueHandle_t MPU_xQueueCreateMutexStatic( const uint8_t ucQueueType,
+                                               StaticQueue_t * pxStaticQueue ) PRIVILEGED_FUNCTION;
+    QueueHandle_t MPU_xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount,
+                                                     const UBaseType_t uxInitialCount ) PRIVILEGED_FUNCTION;
+    QueueHandle_t MPU_xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount,
+                                                           const UBaseType_t uxInitialCount,
+                                                           StaticQueue_t * pxStaticQueue ) PRIVILEGED_FUNCTION;
+    QueueHandle_t MPU_xQueueGenericCreate( const UBaseType_t uxQueueLength,
+                                           const UBaseType_t uxItemSize,
+                                           const uint8_t ucQueueType ) PRIVILEGED_FUNCTION;
+    QueueHandle_t MPU_xQueueGenericCreateStatic( const UBaseType_t uxQueueLength,
+                                                 const UBaseType_t uxItemSize,
+                                                 uint8_t * pucQueueStorage,
+                                                 StaticQueue_t * pxStaticQueue,
+                                                 const uint8_t ucQueueType ) PRIVILEGED_FUNCTION;
+    QueueSetHandle_t MPU_xQueueCreateSet( const UBaseType_t uxEventQueueLength ) PRIVILEGED_FUNCTION;
+    QueueSetHandle_t MPU_xQueueCreateSetStatic( const UBaseType_t uxEventQueueLength,
+                                                uint8_t * pucQueueStorage,
+                                                StaticQueue_t * pxStaticQueue ) PRIVILEGED_FUNCTION;
+    BaseType_t MPU_xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore,
+                                        QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION;
+    BaseType_t MPU_xQueueGenericReset( QueueHandle_t xQueue,
+                                       BaseType_t xNewQueue ) PRIVILEGED_FUNCTION;
+
+#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 1 ) */
+
 BaseType_t MPU_xQueueGenericGetStaticBuffers( QueueHandle_t xQueue,
                                               uint8_t ** ppucQueueStorage,
                                               StaticQueue_t ** ppxStaticQueue ) PRIVILEGED_FUNCTION;
@@ -271,7 +341,7 @@ BaseType_t MPU_xTimerGenericCommandFromTask( TimerHandle_t xTimer,
 BaseType_t MPU_xTimerGenericCommandFromTaskEntry( const xTimerGenericCommandFromTaskParams_t * pxParams ) FREERTOS_SYSTEM_CALL;
 const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
 void MPU_vTimerSetReloadMode( TimerHandle_t xTimer,
-                              const BaseType_t uxAutoReload ) FREERTOS_SYSTEM_CALL;
+                              const BaseType_t xAutoReload ) FREERTOS_SYSTEM_CALL;
 BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
 UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
 TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
@@ -282,12 +352,12 @@ TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
  * with all the APIs. */
 TimerHandle_t MPU_xTimerCreate( const char * const pcTimerName,
                                 const TickType_t xTimerPeriodInTicks,
-                                const UBaseType_t uxAutoReload,
+                                const BaseType_t xAutoReload,
                                 void * const pvTimerID,
                                 TimerCallbackFunction_t pxCallbackFunction ) PRIVILEGED_FUNCTION;
 TimerHandle_t MPU_xTimerCreateStatic( const char * const pcTimerName,
                                       const TickType_t xTimerPeriodInTicks,
-                                      const UBaseType_t uxAutoReload,
+                                      const BaseType_t xAutoReload,
                                       void * const pvTimerID,
                                       TimerCallbackFunction_t pxCallbackFunction,
                                       StaticTimer_t * pxTimerBuffer ) PRIVILEGED_FUNCTION;
@@ -318,14 +388,25 @@ EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup,
     UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) FREERTOS_SYSTEM_CALL;
     void MPU_vEventGroupSetNumber( void * xEventGroup,
                                    UBaseType_t uxEventGroupNumber ) FREERTOS_SYSTEM_CALL;
-#endif /* ( configUSE_TRACE_FACILITY == 1 )*/
+#endif /* #if ( configUSE_TRACE_FACILITY == 1 ) */
 
 /* Privileged only wrappers for Event Group APIs. These are needed so that
  * the application can use opaque handles maintained in mpu_wrappers.c
  * with all the APIs. */
-EventGroupHandle_t MPU_xEventGroupCreate( void ) PRIVILEGED_FUNCTION;
-EventGroupHandle_t MPU_xEventGroupCreateStatic( StaticEventGroup_t * pxEventGroupBuffer ) PRIVILEGED_FUNCTION;
-void MPU_vEventGroupDelete( EventGroupHandle_t xEventGroup ) PRIVILEGED_FUNCTION;
+#if ( configUSE_MPU_WRAPPERS_V1 == 1 )
+
+    EventGroupHandle_t MPU_xEventGroupCreate( void ) FREERTOS_SYSTEM_CALL;
+    EventGroupHandle_t MPU_xEventGroupCreateStatic( StaticEventGroup_t * pxEventGroupBuffer ) FREERTOS_SYSTEM_CALL;
+    void MPU_vEventGroupDelete( EventGroupHandle_t xEventGroup ) FREERTOS_SYSTEM_CALL;
+
+#else /* #if ( configUSE_MPU_WRAPPERS_V1 == 1 ) */
+
+    EventGroupHandle_t MPU_xEventGroupCreate( void ) PRIVILEGED_FUNCTION;
+    EventGroupHandle_t MPU_xEventGroupCreateStatic( StaticEventGroup_t * pxEventGroupBuffer ) PRIVILEGED_FUNCTION;
+    void MPU_vEventGroupDelete( EventGroupHandle_t xEventGroup ) PRIVILEGED_FUNCTION;
+
+#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 1 ) */
+
 BaseType_t MPU_xEventGroupGetStaticBuffer( EventGroupHandle_t xEventGroup,
                                            StaticEventGroup_t ** ppxEventGroupBuffer ) PRIVILEGED_FUNCTION;
 BaseType_t MPU_xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup,
@@ -355,20 +436,42 @@ size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuff
 /* Privileged only wrappers for Stream Buffer APIs. These are needed so that
  * the application can use opaque handles maintained in mpu_wrappers.c
  * with all the APIs. */
-StreamBufferHandle_t MPU_xStreamBufferGenericCreate( size_t xBufferSizeBytes,
-                                                     size_t xTriggerLevelBytes,
-                                                     BaseType_t xIsMessageBuffer,
-                                                     StreamBufferCallbackFunction_t pxSendCompletedCallback,
-                                                     StreamBufferCallbackFunction_t pxReceiveCompletedCallback ) PRIVILEGED_FUNCTION;
-StreamBufferHandle_t MPU_xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes,
-                                                           size_t xTriggerLevelBytes,
-                                                           BaseType_t xIsMessageBuffer,
-                                                           uint8_t * const pucStreamBufferStorageArea,
-                                                           StaticStreamBuffer_t * const pxStaticStreamBuffer,
-                                                           StreamBufferCallbackFunction_t pxSendCompletedCallback,
-                                                           StreamBufferCallbackFunction_t pxReceiveCompletedCallback ) PRIVILEGED_FUNCTION;
-void MPU_vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
-BaseType_t MPU_xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
+#if ( configUSE_MPU_WRAPPERS_V1 == 1 )
+
+    StreamBufferHandle_t MPU_xStreamBufferGenericCreate( size_t xBufferSizeBytes,
+                                                         size_t xTriggerLevelBytes,
+                                                         BaseType_t xStreamBufferType,
+                                                         StreamBufferCallbackFunction_t pxSendCompletedCallback,
+                                                         StreamBufferCallbackFunction_t pxReceiveCompletedCallback ) FREERTOS_SYSTEM_CALL;
+    StreamBufferHandle_t MPU_xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes,
+                                                               size_t xTriggerLevelBytes,
+                                                               BaseType_t xStreamBufferType,
+                                                               uint8_t * const pucStreamBufferStorageArea,
+                                                               StaticStreamBuffer_t * const pxStaticStreamBuffer,
+                                                               StreamBufferCallbackFunction_t pxSendCompletedCallback,
+                                                               StreamBufferCallbackFunction_t pxReceiveCompletedCallback ) FREERTOS_SYSTEM_CALL;
+    void MPU_vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
+    BaseType_t MPU_xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
+
+#else /* #if ( configUSE_MPU_WRAPPERS_V1 == 1 ) */
+
+    StreamBufferHandle_t MPU_xStreamBufferGenericCreate( size_t xBufferSizeBytes,
+                                                         size_t xTriggerLevelBytes,
+                                                         BaseType_t xStreamBufferType,
+                                                         StreamBufferCallbackFunction_t pxSendCompletedCallback,
+                                                         StreamBufferCallbackFunction_t pxReceiveCompletedCallback ) PRIVILEGED_FUNCTION;
+    StreamBufferHandle_t MPU_xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes,
+                                                               size_t xTriggerLevelBytes,
+                                                               BaseType_t xStreamBufferType,
+                                                               uint8_t * const pucStreamBufferStorageArea,
+                                                               StaticStreamBuffer_t * const pxStaticStreamBuffer,
+                                                               StreamBufferCallbackFunction_t pxSendCompletedCallback,
+                                                               StreamBufferCallbackFunction_t pxReceiveCompletedCallback ) PRIVILEGED_FUNCTION;
+    void MPU_vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
+    BaseType_t MPU_xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
+
+#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 1 ) */
+
 BaseType_t MPU_xStreamBufferGetStaticBuffers( StreamBufferHandle_t xStreamBuffers,
                                               uint8_t * ppucStreamBufferStorageArea,
                                               StaticStreamBuffer_t * ppxStaticStreamBuffer ) PRIVILEGED_FUNCTION;
@@ -384,5 +487,6 @@ BaseType_t MPU_xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBu
                                                   BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
 BaseType_t MPU_xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuffer,
                                                      BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+BaseType_t MPU_xStreamBufferResetFromISR( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
 
 #endif /* MPU_PROTOTYPES_H */

include/mpu_syscall_numbers.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *

include/mpu_wrappers.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -85,6 +85,18 @@
 /* Privileged only wrappers for Task APIs. These are needed so that
  * the application can use opaque handles maintained in mpu_wrappers.c
  * with all the APIs. */
+        #if ( configUSE_MPU_WRAPPERS_V1 == 1 )
+
+/* These are not needed in v2 because they do not take a task
+ * handle and therefore, no lookup is needed. Needed in v1 because
+ * these are available as system calls in v1. */
+            #define vTaskGetRunTimeStatistics            MPU_vTaskGetRunTimeStatistics
+            #define vTaskListTasks                       MPU_vTaskListTasks
+            #define vTaskSuspendAll                      MPU_vTaskSuspendAll
+            #define xTaskCatchUpTicks                    MPU_xTaskCatchUpTicks
+            #define xTaskResumeAll                       MPU_xTaskResumeAll
+        #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 1 ) */
+
         #define xTaskCreate                              MPU_xTaskCreate
         #define xTaskCreateStatic                        MPU_xTaskCreateStatic
         #define vTaskDelete                              MPU_vTaskDelete
@@ -138,6 +150,7 @@
         #define xQueueGenericCreateStatic              MPU_xQueueGenericCreateStatic
         #define xQueueGenericReset                     MPU_xQueueGenericReset
         #define xQueueCreateSet                        MPU_xQueueCreateSet
+        #define xQueueCreateSetStatic                  MPU_xQueueCreateSetStatic
         #define xQueueRemoveFromSet                    MPU_xQueueRemoveFromSet
 
         #if ( configUSE_MPU_WRAPPERS_V1 == 0 )
@@ -165,11 +178,14 @@
         #define xTimerGetPeriod                   MPU_xTimerGetPeriod
         #define xTimerGetExpiryTime               MPU_xTimerGetExpiryTime
 
+        #if ( configUSE_MPU_WRAPPERS_V1 == 0 )
+            #define xTimerGetReloadMode           MPU_xTimerGetReloadMode
+        #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
+
 /* Privileged only wrappers for Timer APIs. These are needed so that
  * the application can use opaque handles maintained in mpu_wrappers.c
  * with all the APIs. */
         #if ( configUSE_MPU_WRAPPERS_V1 == 0 )
-            #define xTimerGetReloadMode            MPU_xTimerGetReloadMode
             #define xTimerCreate                   MPU_xTimerCreate
             #define xTimerCreateStatic             MPU_xTimerCreateStatic
             #define xTimerGetStaticBuffer          MPU_xTimerGetStaticBuffer
@@ -227,16 +243,9 @@
             #define xStreamBufferReceiveFromISR             MPU_xStreamBufferReceiveFromISR
             #define xStreamBufferSendCompletedFromISR       MPU_xStreamBufferSendCompletedFromISR
             #define xStreamBufferReceiveCompletedFromISR    MPU_xStreamBufferReceiveCompletedFromISR
+            #define xStreamBufferResetFromISR               MPU_xStreamBufferResetFromISR
         #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
 
-/* Remove the privileged function macro, but keep the PRIVILEGED_DATA
- * macro so applications can place data in privileged access sections
- * (useful when using statically allocated objects). */
-        #define PRIVILEGED_FUNCTION
-        #define PRIVILEGED_DATA    __attribute__( ( section( "privileged_data" ) ) )
-        #define FREERTOS_SYSTEM_CALL
-
-
         #if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
 
             #define vGrantAccessToTask( xTask, xTaskToGrantAccess )                        vGrantAccessToKernelObject( ( xTask ), ( int32_t ) ( xTaskToGrantAccess ) )
@@ -265,15 +274,12 @@
 
         #endif /* #if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */
 
-    #else /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */
-
-/* Ensure API functions go in the privileged execution section. */
-        #define PRIVILEGED_FUNCTION     __attribute__( ( section( "privileged_functions" ) ) )
-        #define PRIVILEGED_DATA         __attribute__( ( section( "privileged_data" ) ) )
-        #define FREERTOS_SYSTEM_CALL    __attribute__( ( section( "freertos_system_calls" ) ) )
-
     #endif /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */
 
+    #define PRIVILEGED_FUNCTION     __attribute__( ( section( "privileged_functions" ) ) )
+    #define PRIVILEGED_DATA         __attribute__( ( section( "privileged_data" ) ) )
+    #define FREERTOS_SYSTEM_CALL    __attribute__( ( section( "freertos_system_calls" ) ) )
+
 #else /* portUSING_MPU_WRAPPERS */
 
     #define PRIVILEGED_FUNCTION

include/newlib-freertos.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *

include/picolibc-freertos.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *

include/portable.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -85,19 +85,31 @@
     #define portARCH_NAME    NULL
 #endif
 
+#ifndef portBASE_TYPE_ENTER_CRITICAL
+    #define portBASE_TYPE_ENTER_CRITICAL()    taskENTER_CRITICAL()
+#endif
+
+#ifndef portBASE_TYPE_EXIT_CRITICAL
+    #define portBASE_TYPE_EXIT_CRITICAL()    taskEXIT_CRITICAL()
+#endif
+
+#ifndef configSTACK_DEPTH_TYPE
+    #define configSTACK_DEPTH_TYPE    StackType_t
+#endif
+
 #ifndef configSTACK_ALLOCATION_FROM_SEPARATE_HEAP
     /* Defaults to 0 for backward compatibility. */
     #define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP    0
 #endif
 
+#include "mpu_wrappers.h"
+
 /* *INDENT-OFF* */
 #ifdef __cplusplus
     extern "C" {
 #endif
 /* *INDENT-ON* */
 
-#include "mpu_wrappers.h"
-
 /*
  * Setup the stack of a new task so it is ready to be placed under the
  * scheduler control.  The registers have to be placed on the stack in
@@ -174,13 +186,14 @@ void vPortGetHeapStats( HeapStats_t * pxHeapStats );
 /*
  * Map to the memory management routines required for the port.
  */
-void * pvPortMalloc( size_t xSize ) PRIVILEGED_FUNCTION;
+void * pvPortMalloc( size_t xWantedSize ) PRIVILEGED_FUNCTION;
 void * pvPortCalloc( size_t xNum,
                      size_t xSize ) PRIVILEGED_FUNCTION;
 void vPortFree( void * pv ) PRIVILEGED_FUNCTION;
 void vPortInitialiseBlocks( void ) PRIVILEGED_FUNCTION;
 size_t xPortGetFreeHeapSize( void ) PRIVILEGED_FUNCTION;
 size_t xPortGetMinimumEverFreeHeapSize( void ) PRIVILEGED_FUNCTION;
+void xPortResetHeapMinimumEverFreeHeapSize( void ) PRIVILEGED_FUNCTION;
 
 #if ( configSTACK_ALLOCATION_FROM_SEPARATE_HEAP == 1 )
     void * pvPortMallocStack( size_t xSize ) PRIVILEGED_FUNCTION;
@@ -190,6 +203,12 @@ size_t xPortGetMinimumEverFreeHeapSize( void ) PRIVILEGED_FUNCTION;
     #define vPortFreeStack       vPortFree
 #endif
 
+/*
+ * This function resets the internal state of the heap module. It must be called
+ * by the application before restarting the scheduler.
+ */
+void vPortHeapResetState( void ) PRIVILEGED_FUNCTION;
+
 #if ( configUSE_MALLOC_FAILED_HOOK == 1 )
 
 /**
@@ -228,7 +247,7 @@ void vPortEndScheduler( void ) PRIVILEGED_FUNCTION;
     void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
                                     const struct xMEMORY_REGION * const xRegions,
                                     StackType_t * pxBottomOfStack,
-                                    uint32_t ulStackDepth ) PRIVILEGED_FUNCTION;
+                                    configSTACK_DEPTH_TYPE uxStackDepth ) PRIVILEGED_FUNCTION;
 #endif
 
 /**

include/projdefs.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *

include/queue.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -34,14 +34,14 @@
     #error "include FreeRTOS.h" must appear in source files before "include queue.h"
 #endif
 
+#include "task.h"
+
 /* *INDENT-OFF* */
 #ifdef __cplusplus
     extern "C" {
 #endif
 /* *INDENT-ON* */
 
-#include "task.h"
-
 /**
  * Type by which queues are referenced.  For example, a call to xQueueCreate()
  * returns an QueueHandle_t variable that can then be used as a parameter to
@@ -71,11 +71,11 @@ typedef struct QueueDefinition   * QueueSetMemberHandle_t;
 
 /* For internal use only.  These definitions *must* match those in queue.c. */
 #define queueQUEUE_TYPE_BASE                  ( ( uint8_t ) 0U )
-#define queueQUEUE_TYPE_SET                   ( ( uint8_t ) 0U )
 #define queueQUEUE_TYPE_MUTEX                 ( ( uint8_t ) 1U )
 #define queueQUEUE_TYPE_COUNTING_SEMAPHORE    ( ( uint8_t ) 2U )
 #define queueQUEUE_TYPE_BINARY_SEMAPHORE      ( ( uint8_t ) 3U )
 #define queueQUEUE_TYPE_RECURSIVE_MUTEX       ( ( uint8_t ) 4U )
+#define queueQUEUE_TYPE_SET                   ( ( uint8_t ) 5U )
 
 /**
  * queue. h
@@ -109,7 +109,7 @@ typedef struct QueueDefinition   * QueueSetMemberHandle_t;
  * the same size.
  *
  * @return If the queue is successfully create then a handle to the newly
- * created queue is returned.  If the queue cannot be created then 0 is
+ * created queue is returned.  If the queue cannot be created then NULL is
  * returned.
  *
  * Example usage:
@@ -126,7 +126,7 @@ typedef struct QueueDefinition   * QueueSetMemberHandle_t;
  *
  *  // Create a queue capable of containing 10 uint32_t values.
  *  xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );
- *  if( xQueue1 == 0 )
+ *  if( xQueue1 == NULL )
  *  {
  *      // Queue was not created and must not be used.
  *  }
@@ -134,7 +134,7 @@ typedef struct QueueDefinition   * QueueSetMemberHandle_t;
  *  // Create a queue capable of containing 10 pointers to AMessage structures.
  *  // These should be passed by pointer as they contain a lot of data.
  *  xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
- *  if( xQueue2 == 0 )
+ *  if( xQueue2 == NULL )
  *  {
  *      // Queue was not created and must not be used.
  *  }
@@ -292,7 +292,7 @@ typedef struct QueueDefinition   * QueueSetMemberHandle_t;
  * queue is full.  The time is defined in tick periods so the constant
  * portTICK_PERIOD_MS should be used to convert to real time if this is required.
  *
- * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL.
+ * @return pdPASS if the item was successfully posted, otherwise errQUEUE_FULL.
  *
  * Example usage:
  * @code{c}
@@ -302,7 +302,7 @@ typedef struct QueueDefinition   * QueueSetMemberHandle_t;
  *  char ucData[ 20 ];
  * } xMessage;
  *
- * uint32_t ulVar = 10UL;
+ * uint32_t ulVar = 10U;
  *
  * void vATask( void *pvParameters )
  * {
@@ -375,7 +375,7 @@ typedef struct QueueDefinition   * QueueSetMemberHandle_t;
  * is full.  The  time is defined in tick periods so the constant
  * portTICK_PERIOD_MS should be used to convert to real time if this is required.
  *
- * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL.
+ * @return pdPASS if the item was successfully posted, otherwise errQUEUE_FULL.
  *
  * Example usage:
  * @code{c}
@@ -385,7 +385,7 @@ typedef struct QueueDefinition   * QueueSetMemberHandle_t;
  *  char ucData[ 20 ];
  * } xMessage;
  *
- * uint32_t ulVar = 10UL;
+ * uint32_t ulVar = 10U;
  *
  * void vATask( void *pvParameters )
  * {
@@ -460,7 +460,7 @@ typedef struct QueueDefinition   * QueueSetMemberHandle_t;
  * queue is full.  The time is defined in tick periods so the constant
  * portTICK_PERIOD_MS should be used to convert to real time if this is required.
  *
- * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL.
+ * @return pdPASS if the item was successfully posted, otherwise errQUEUE_FULL.
  *
  * Example usage:
  * @code{c}
@@ -470,7 +470,7 @@ typedef struct QueueDefinition   * QueueSetMemberHandle_t;
  *  char ucData[ 20 ];
  * } xMessage;
  *
- * uint32_t ulVar = 10UL;
+ * uint32_t ulVar = 10U;
  *
  * void vATask( void *pvParameters )
  * {
@@ -633,7 +633,7 @@ typedef struct QueueDefinition   * QueueSetMemberHandle_t;
  * item at the back of the queue, or queueSEND_TO_FRONT to place the item
  * at the front of the queue (for high priority messages).
  *
- * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL.
+ * @return pdPASS if the item was successfully posted, otherwise errQUEUE_FULL.
  *
  * Example usage:
  * @code{c}
@@ -643,7 +643,7 @@ typedef struct QueueDefinition   * QueueSetMemberHandle_t;
  *  char ucData[ 20 ];
  * } xMessage;
  *
- * uint32_t ulVar = 10UL;
+ * uint32_t ulVar = 10U;
  *
  * void vATask( void *pvParameters )
  * {
@@ -723,8 +723,8 @@ BaseType_t xQueueGenericSend( QueueHandle_t xQueue,
  * xQueuePeek() will return immediately if xTicksToWait is 0 and the queue
  * is empty.
  *
- * @return pdTRUE if an item was successfully received from the queue,
- * otherwise pdFALSE.
+ * @return pdPASS if an item was successfully received from the queue,
+ * otherwise errQUEUE_EMPTY.
  *
  * Example usage:
  * @code{c}
@@ -811,8 +811,8 @@ BaseType_t xQueuePeek( QueueHandle_t xQueue,
  * @param pvBuffer Pointer to the buffer into which the received item will
  * be copied.
  *
- * @return pdTRUE if an item was successfully received from the queue,
- * otherwise pdFALSE.
+ * @return pdPASS if an item was successfully received from the queue,
+ * otherwise pdFAIL.
  *
  * \defgroup xQueuePeekFromISR xQueuePeekFromISR
  * \ingroup QueueManagement
@@ -852,8 +852,8 @@ BaseType_t xQueuePeekFromISR( QueueHandle_t xQueue,
  * constant portTICK_PERIOD_MS should be used to convert to real time if this is
  * required.
  *
- * @return pdTRUE if an item was successfully received from the queue,
- * otherwise pdFALSE.
+ * @return pdPASS if an item was successfully received from the queue,
+ * otherwise errQUEUE_EMPTY.
  *
  * Example usage:
  * @code{c}
@@ -998,7 +998,7 @@ void vQueueDelete( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
  * running task.  If xQueueSendToFrontFromISR() sets this value to pdTRUE then
  * a context switch should be requested before the interrupt is exited.
  *
- * @return pdTRUE if the data was successfully sent to the queue, otherwise
+ * @return pdPASS if the data was successfully sent to the queue, otherwise
  * errQUEUE_FULL.
  *
  * Example usage for buffered IO (where the ISR can obtain more than one value
@@ -1070,7 +1070,7 @@ void vQueueDelete( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
  * running task.  If xQueueSendToBackFromISR() sets this value to pdTRUE then
  * a context switch should be requested before the interrupt is exited.
  *
- * @return pdTRUE if the data was successfully sent to the queue, otherwise
+ * @return pdPASS if the data was successfully sent to the queue, otherwise
  * errQUEUE_FULL.
  *
  * Example usage for buffered IO (where the ISR can obtain more than one value
@@ -1235,7 +1235,7 @@ void vQueueDelete( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
  * running task.  If xQueueSendFromISR() sets this value to pdTRUE then
  * a context switch should be requested before the interrupt is exited.
  *
- * @return pdTRUE if the data was successfully sent to the queue, otherwise
+ * @return pdPASS if the data was successfully sent to the queue, otherwise
  * errQUEUE_FULL.
  *
  * Example usage for buffered IO (where the ISR can obtain more than one value
@@ -1318,7 +1318,7 @@ void vQueueDelete( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
  * item at the back of the queue, or queueSEND_TO_FRONT to place the item
  * at the front of the queue (for high priority messages).
  *
- * @return pdTRUE if the data was successfully sent to the queue, otherwise
+ * @return pdPASS if the data was successfully sent to the queue, otherwise
  * errQUEUE_FULL.
  *
  * Example usage for buffered IO (where the ISR can obtain more than one value
@@ -1389,8 +1389,8 @@ BaseType_t xQueueGiveFromISR( QueueHandle_t xQueue,
  * to unblock *pxTaskWoken will get set to pdTRUE, otherwise *pxTaskWoken will
  * remain unchanged.
  *
- * @return pdTRUE if an item was successfully received from the queue,
- * otherwise pdFALSE.
+ * @return pdPASS if an item was successfully received from the queue,
+ * otherwise pdFAIL.
  *
  * Example usage:
  * @code{c}
@@ -1522,8 +1522,8 @@ BaseType_t xQueueSemaphoreTake( QueueHandle_t xQueue,
 #endif
 
 /*
- * For internal use only.  Use xSemaphoreTakeMutexRecursive() or
- * xSemaphoreGiveMutexRecursive() instead of calling these functions directly.
+ * For internal use only.  Use xSemaphoreTakeRecursive() or
+ * xSemaphoreGiveRecursive() instead of calling these functions directly.
  */
 BaseType_t xQueueTakeMutexRecursive( QueueHandle_t xMutex,
                                      TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
@@ -1638,14 +1638,14 @@ BaseType_t xQueueGiveMutexRecursive( QueueHandle_t xMutex ) PRIVILEGED_FUNCTION;
  * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this
  * function.
  *
- * A queue set must be explicitly created using a call to xQueueCreateSet()
- * before it can be used.  Once created, standard FreeRTOS queues and semaphores
- * can be added to the set using calls to xQueueAddToSet().
- * xQueueSelectFromSet() is then used to determine which, if any, of the queues
- * or semaphores contained in the set is in a state where a queue read or
- * semaphore take operation would be successful.
+ * A queue set must be explicitly created using a call to xQueueCreateSet() or
+ * xQueueCreateSetStatic() before it can be used.  Once created, standard
+ * FreeRTOS queues and semaphores can be added to the set using calls to
+ * xQueueAddToSet().  xQueueSelectFromSet() is then used to determine which, if
+ * any, of the queues or semaphores contained in the set is in a state where a
+ * queue read or semaphore take operation would be successful.
  *
- * Note 1:  See the documentation on https://www.FreeRTOS.org/RTOS-queue-sets.html
+ * Note 1:  See the documentation on https://www.freertos.org/Documentation/02-Kernel/04-API-references/07-Queue-sets/00-RTOS-queue-sets
  * for reasons why queue sets are very rarely needed in practice as there are
  * simpler methods of blocking on multiple objects.
  *
@@ -1683,9 +1683,69 @@ BaseType_t xQueueGiveMutexRecursive( QueueHandle_t xMutex ) PRIVILEGED_FUNCTION;
     QueueSetHandle_t xQueueCreateSet( const UBaseType_t uxEventQueueLength ) PRIVILEGED_FUNCTION;
 #endif
 
+/*
+ * Queue sets provide a mechanism to allow a task to block (pend) on a read
+ * operation from multiple queues or semaphores simultaneously.
+ *
+ * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this
+ * function.
+ *
+ * A queue set must be explicitly created using a call to xQueueCreateSet()
+ * or xQueueCreateSetStatic() before it can be used.  Once created, standard
+ * FreeRTOS queues and semaphores can be added to the set using calls to
+ * xQueueAddToSet().  xQueueSelectFromSet() is then used to determine which, if
+ * any, of the queues or semaphores contained in the set is in a state where a
+ * queue read or semaphore take operation would be successful.
+ *
+ * Note 1:  See the documentation on https://www.freertos.org/Documentation/02-Kernel/04-API-references/07-Queue-sets/00-RTOS-queue-sets
+ * for reasons why queue sets are very rarely needed in practice as there are
+ * simpler methods of blocking on multiple objects.
+ *
+ * Note 2:  Blocking on a queue set that contains a mutex will not cause the
+ * mutex holder to inherit the priority of the blocked task.
+ *
+ * Note 3:  An additional 4 bytes of RAM is required for each space in a every
+ * queue added to a queue set.  Therefore counting semaphores that have a high
+ * maximum count value should not be added to a queue set.
+ *
+ * Note 4:  A receive (in the case of a queue) or take (in the case of a
+ * semaphore) operation must not be performed on a member of a queue set unless
+ * a call to xQueueSelectFromSet() has first returned a handle to that set member.
+ *
+ * @param uxEventQueueLength Queue sets store events that occur on
+ * the queues and semaphores contained in the set.  uxEventQueueLength specifies
+ * the maximum number of events that can be queued at once.  To be absolutely
+ * certain that events are not lost uxEventQueueLength should be set to the
+ * total sum of the length of the queues added to the set, where binary
+ * semaphores and mutexes have a length of 1, and counting semaphores have a
+ * length set by their maximum count value.  Examples:
+ *  + If a queue set is to hold a queue of length 5, another queue of length 12,
+ *    and a binary semaphore, then uxEventQueueLength should be set to
+ *    (5 + 12 + 1), or 18.
+ *  + If a queue set is to hold three binary semaphores then uxEventQueueLength
+ *    should be set to (1 + 1 + 1 ), or 3.
+ *  + If a queue set is to hold a counting semaphore that has a maximum count of
+ *    5, and a counting semaphore that has a maximum count of 3, then
+ *    uxEventQueueLength should be set to (5 + 3), or 8.
+ *
+ * @param pucQueueStorage pucQueueStorage must point to a uint8_t array that is
+ * at least large enough to hold uxEventQueueLength events.
+ *
+ * @param pxQueueBuffer Must point to a variable of type StaticQueue_t, which
+ * will be used to hold the queue's data structure.
+ *
+ * @return If the queue set is created successfully then a handle to the created
+ * queue set is returned.  If pxQueueBuffer is NULL then NULL is returned.
+ */
+#if ( ( configUSE_QUEUE_SETS == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
+    QueueSetHandle_t xQueueCreateSetStatic( const UBaseType_t uxEventQueueLength,
+                                            uint8_t * pucQueueStorage,
+                                            StaticQueue_t * pxStaticQueue ) PRIVILEGED_FUNCTION;
+#endif
+
 /*
  * Adds a queue or semaphore to a queue set that was previously created by a
- * call to xQueueCreateSet().
+ * call to xQueueCreateSet() or xQueueCreateSetStatic().
  *
  * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this
  * function.
@@ -1742,7 +1802,7 @@ BaseType_t xQueueGiveMutexRecursive( QueueHandle_t xMutex ) PRIVILEGED_FUNCTION;
  * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this
  * function.
  *
- * Note 1:  See the documentation on https://www.FreeRTOS.org/RTOS-queue-sets.html
+ * Note 1:  See the documentation on https://www.freertos.org/Documentation/02-Kernel/04-API-references/07-Queue-sets/00-RTOS-queue-sets
  * for reasons why queue sets are very rarely needed in practice as there are
  * simpler methods of blocking on multiple objects.
  *

include/semphr.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *

include/stack_macros.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -53,11 +53,23 @@
     #define portSTACK_LIMIT_PADDING    0
 #endif
 
-#if ( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH < 0 ) )
+/* Stack overflow check is not straight forward to implement for MPU ports
+ * because of the following reasons:
+ * 1. The context is stored in TCB and as a result, pxTopOfStack member points
+ *    to the context location in TCB.
+ * 2. System calls are executed on a separate privileged only stack.
+ *
+ * It is still okay because an MPU region is used to protect task stack which
+ * means task stack overflow will trigger an MPU fault for unprivileged tasks.
+ * Additionally, architectures with hardware stack overflow checking support
+ * (such as Armv8-M) will trigger a fault when a task's stack overflows.
+ */
+#if ( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH < 0 ) && ( portUSING_MPU_WRAPPERS != 1 ) )
 
 /* Only the current stack state is to be checked. */
     #define taskCHECK_FOR_STACK_OVERFLOW()                                                      \
-    do {                                                                                        \
+    do                                                                                          \
+    {                                                                                           \
         /* Is the currently saved stack pointer within the stack limit? */                      \
         if( pxCurrentTCB->pxTopOfStack <= pxCurrentTCB->pxStack + portSTACK_LIMIT_PADDING )     \
         {                                                                                       \
@@ -69,12 +81,12 @@
 #endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */
 /*-----------------------------------------------------------*/
 
-#if ( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH > 0 ) )
+#if ( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH > 0 ) && ( portUSING_MPU_WRAPPERS != 1 ) )
 
 /* Only the current stack state is to be checked. */
     #define taskCHECK_FOR_STACK_OVERFLOW()                                                       \
-    do {                                                                                         \
-                                                                                                 \
+    do                                                                                           \
+    {                                                                                            \
         /* Is the currently saved stack pointer within the stack limit? */                       \
         if( pxCurrentTCB->pxTopOfStack >= pxCurrentTCB->pxEndOfStack - portSTACK_LIMIT_PADDING ) \
         {                                                                                        \
@@ -86,30 +98,33 @@
 #endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */
 /*-----------------------------------------------------------*/
 
-#if ( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH < 0 ) )
+#if ( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH < 0 ) && ( portUSING_MPU_WRAPPERS != 1 ) )
 
-    #define taskCHECK_FOR_STACK_OVERFLOW()                                                      \
-    do {                                                                                        \
-        const uint32_t * const pulStack = ( uint32_t * ) pxCurrentTCB->pxStack;                 \
-        const uint32_t ulCheckValue = ( uint32_t ) 0xa5a5a5a5U;                                 \
-                                                                                                \
-        if( ( pulStack[ 0 ] != ulCheckValue ) ||                                                \
-            ( pulStack[ 1 ] != ulCheckValue ) ||                                                \
-            ( pulStack[ 2 ] != ulCheckValue ) ||                                                \
-            ( pulStack[ 3 ] != ulCheckValue ) )                                                 \
-        {                                                                                       \
-            char * pcOverflowTaskName = pxCurrentTCB->pcTaskName;                               \
-            vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pcOverflowTaskName ); \
-        }                                                                                       \
+    #define taskCHECK_FOR_STACK_OVERFLOW()                                                       \
+    do                                                                                           \
+    {                                                                                            \
+        const uint32_t * const pulStack = ( uint32_t * ) pxCurrentTCB->pxStack;                  \
+        const uint32_t ulCheckValue = ( uint32_t ) 0xa5a5a5a5U;                                  \
+                                                                                                 \
+        if( ( pxCurrentTCB->pxTopOfStack <= pxCurrentTCB->pxStack + portSTACK_LIMIT_PADDING ) || \
+            ( pulStack[ 0 ] != ulCheckValue ) ||                                                 \
+            ( pulStack[ 1 ] != ulCheckValue ) ||                                                 \
+            ( pulStack[ 2 ] != ulCheckValue ) ||                                                 \
+            ( pulStack[ 3 ] != ulCheckValue ) )                                                  \
+        {                                                                                        \
+            char * pcOverflowTaskName = pxCurrentTCB->pcTaskName;                                \
+            vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pcOverflowTaskName );  \
+        }                                                                                        \
     } while( 0 )
 
 #endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */
 /*-----------------------------------------------------------*/
 
-#if ( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH > 0 ) )
+#if ( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH > 0 ) && ( portUSING_MPU_WRAPPERS != 1 ) )
 
     #define taskCHECK_FOR_STACK_OVERFLOW()                                                                                                \
-    do {                                                                                                                                  \
+    do                                                                                                                                    \
+    {                                                                                                                                     \
         int8_t * pcEndOfStack = ( int8_t * ) pxCurrentTCB->pxEndOfStack;                                                                  \
         static const uint8_t ucExpectedStackBytes[] = { tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,   \
                                                         tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,   \
@@ -117,11 +132,10 @@
                                                         tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,   \
                                                         tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE }; \
                                                                                                                                           \
-                                                                                                                                          \
         pcEndOfStack -= sizeof( ucExpectedStackBytes );                                                                                   \
                                                                                                                                           \
-        /* Has the extremity of the task stack ever been written over? */                                                                 \
-        if( memcmp( ( void * ) pcEndOfStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 )                     \
+        if( ( pxCurrentTCB->pxTopOfStack >= pxCurrentTCB->pxEndOfStack - portSTACK_LIMIT_PADDING ) ||                                     \
+            ( memcmp( ( void * ) pcEndOfStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 ) )                 \
         {                                                                                                                                 \
             char * pcOverflowTaskName = pxCurrentTCB->pcTaskName;                                                                         \
             vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pcOverflowTaskName );                                           \

include/stdint.readme

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *

include/stream_buffer.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -40,12 +40,12 @@
  * writer and reader to be different tasks or interrupts, but, unlike other
  * FreeRTOS objects, it is not safe to have multiple different writers or
  * multiple different readers.  If there are to be multiple different writers
- * then the application writer must place each call to a writing API function
- * (such as xStreamBufferSend()) inside a critical section and set the send
- * block time to 0.  Likewise, if there are to be multiple different readers
- * then the application writer must place each call to a reading API function
- * (such as xStreamBufferReceive()) inside a critical section section and set the
- * receive block time to 0.
+ * then the application writer must serialize calls to writing API functions
+ * (such as xStreamBufferSend()).  Likewise, if there are to be multiple
+ * different readers then the application writer must serialize calls to reading
+ * API functions (such as xStreamBufferReceive()).  One way to achieve such
+ * serialization in single core or SMP kernel is to place each API call inside a
+ * critical section and use a block time of 0.
  *
  */
 
@@ -62,6 +62,13 @@
 #endif
 /* *INDENT-ON* */
 
+/**
+ * Type of stream buffer. For internal use only.
+ */
+#define sbTYPE_STREAM_BUFFER             ( ( BaseType_t ) 0 )
+#define sbTYPE_MESSAGE_BUFFER            ( ( BaseType_t ) 1 )
+#define sbTYPE_STREAM_BATCHING_BUFFER    ( ( BaseType_t ) 2 )
+
 /**
  * Type by which stream buffers are referenced.  For example, a call to
  * xStreamBufferCreate() returns an StreamBufferHandle_t variable that can
@@ -91,6 +98,8 @@ typedef void (* StreamBufferCallbackFunction_t)( StreamBufferHandle_t xStreamBuf
  *
  * configSUPPORT_DYNAMIC_ALLOCATION must be set to 1 or left undefined in
  * FreeRTOSConfig.h for xStreamBufferCreate() to be available.
+ * configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
+ * xStreamBufferCreate() to be available.
  *
  * @param xBufferSizeBytes The total number of bytes the stream buffer will be
  * able to hold at any one time.
@@ -155,11 +164,11 @@ typedef void (* StreamBufferCallbackFunction_t)( StreamBufferHandle_t xStreamBuf
  */
 
 #define xStreamBufferCreate( xBufferSizeBytes, xTriggerLevelBytes ) \
-    xStreamBufferGenericCreate( ( xBufferSizeBytes ), ( xTriggerLevelBytes ), pdFALSE, NULL, NULL )
+    xStreamBufferGenericCreate( ( xBufferSizeBytes ), ( xTriggerLevelBytes ), sbTYPE_STREAM_BUFFER, NULL, NULL )
 
 #if ( configUSE_SB_COMPLETED_CALLBACK == 1 )
     #define xStreamBufferCreateWithCallback( xBufferSizeBytes, xTriggerLevelBytes, pxSendCompletedCallback, pxReceiveCompletedCallback ) \
-    xStreamBufferGenericCreate( ( xBufferSizeBytes ), ( xTriggerLevelBytes ), pdFALSE, ( pxSendCompletedCallback ), ( pxReceiveCompletedCallback ) )
+    xStreamBufferGenericCreate( ( xBufferSizeBytes ), ( xTriggerLevelBytes ), sbTYPE_STREAM_BUFFER, ( pxSendCompletedCallback ), ( pxReceiveCompletedCallback ) )
 #endif
 
 /**
@@ -167,15 +176,17 @@ typedef void (* StreamBufferCallbackFunction_t)( StreamBufferHandle_t xStreamBuf
  *
  * @code{c}
  * StreamBufferHandle_t xStreamBufferCreateStatic( size_t xBufferSizeBytes,
- *                                              size_t xTriggerLevelBytes,
- *                                              uint8_t *pucStreamBufferStorageArea,
- *                                              StaticStreamBuffer_t *pxStaticStreamBuffer );
+ *                                                 size_t xTriggerLevelBytes,
+ *                                                 uint8_t *pucStreamBufferStorageArea,
+ *                                                 StaticStreamBuffer_t *pxStaticStreamBuffer );
  * @endcode
  * Creates a new stream buffer using statically allocated memory.  See
  * xStreamBufferCreate() for a version that uses dynamically allocated memory.
  *
  * configSUPPORT_STATIC_ALLOCATION must be set to 1 in FreeRTOSConfig.h for
- * xStreamBufferCreateStatic() to be available.
+ * xStreamBufferCreateStatic() to be available. configUSE_STREAM_BUFFERS must be
+ * set to 1 in for FreeRTOSConfig.h for xStreamBufferCreateStatic() to be
+ * available.
  *
  * @param xBufferSizeBytes The size, in bytes, of the buffer pointed to by the
  * pucStreamBufferStorageArea parameter.
@@ -253,11 +264,199 @@ typedef void (* StreamBufferCallbackFunction_t)( StreamBufferHandle_t xStreamBuf
  */
 
 #define xStreamBufferCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, pucStreamBufferStorageArea, pxStaticStreamBuffer ) \
-    xStreamBufferGenericCreateStatic( ( xBufferSizeBytes ), ( xTriggerLevelBytes ), pdFALSE, ( pucStreamBufferStorageArea ), ( pxStaticStreamBuffer ), NULL, NULL )
+    xStreamBufferGenericCreateStatic( ( xBufferSizeBytes ), ( xTriggerLevelBytes ), sbTYPE_STREAM_BUFFER, ( pucStreamBufferStorageArea ), ( pxStaticStreamBuffer ), NULL, NULL )
 
 #if ( configUSE_SB_COMPLETED_CALLBACK == 1 )
     #define xStreamBufferCreateStaticWithCallback( xBufferSizeBytes, xTriggerLevelBytes, pucStreamBufferStorageArea, pxStaticStreamBuffer, pxSendCompletedCallback, pxReceiveCompletedCallback ) \
-    xStreamBufferGenericCreateStatic( ( xBufferSizeBytes ), ( xTriggerLevelBytes ), pdFALSE, ( pucStreamBufferStorageArea ), ( pxStaticStreamBuffer ), ( pxSendCompletedCallback ), ( pxReceiveCompletedCallback ) )
+    xStreamBufferGenericCreateStatic( ( xBufferSizeBytes ), ( xTriggerLevelBytes ), sbTYPE_STREAM_BUFFER, ( pucStreamBufferStorageArea ), ( pxStaticStreamBuffer ), ( pxSendCompletedCallback ), ( pxReceiveCompletedCallback ) )
+#endif
+
+/**
+ * stream_buffer.h
+ *
+ * @code{c}
+ * StreamBufferHandle_t xStreamBatchingBufferCreate( size_t xBufferSizeBytes, size_t xTriggerLevelBytes );
+ * @endcode
+ *
+ * Creates a new stream batching buffer using dynamically allocated memory.  See
+ * xStreamBatchingBufferCreateStatic() for a version that uses statically
+ * allocated memory (memory that is allocated at compile time).
+ *
+ * configSUPPORT_DYNAMIC_ALLOCATION must be set to 1 or left undefined in
+ * FreeRTOSConfig.h for xStreamBatchingBufferCreate() to be available.
+ * configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
+ * xStreamBatchingBufferCreate() to be available.
+ *
+ * The difference between a stream buffer and a stream batching buffer is when
+ * a task performs read on a non-empty buffer:
+ * - The task reading from a non-empty stream buffer returns immediately
+ *   regardless of the amount of data in the buffer.
+ * - The task reading from a non-empty steam batching buffer blocks until the
+ *   amount of data in the buffer exceeds the trigger level or the block time
+ *   expires.
+ *
+ * @param xBufferSizeBytes The total number of bytes the stream batching buffer
+ * will be able to hold at any one time.
+ *
+ * @param xTriggerLevelBytes The number of bytes that must be in the stream
+ * batching buffer to unblock a task calling xStreamBufferReceive before the
+ * block time expires.
+ *
+ * @param pxSendCompletedCallback Callback invoked when number of bytes at least
+ * equal to trigger level is sent to the stream batching buffer. If the
+ * parameter is NULL, it will use the default implementation provided by
+ * sbSEND_COMPLETED macro. To enable the callback, configUSE_SB_COMPLETED_CALLBACK
+ * must be set to 1 in FreeRTOSConfig.h.
+ *
+ * @param pxReceiveCompletedCallback Callback invoked when more than zero bytes
+ * are read from a stream batching buffer. If the parameter is NULL, it will use
+ * the default implementation provided by sbRECEIVE_COMPLETED macro. To enable
+ * the callback, configUSE_SB_COMPLETED_CALLBACK must be set to 1 in
+ * FreeRTOSConfig.h.
+ *
+ * @return If NULL is returned, then the stream batching buffer cannot be created
+ * because there is insufficient heap memory available for FreeRTOS to allocate
+ * the stream batching buffer data structures and storage area.  A non-NULL value
+ * being returned indicates that the stream batching buffer has been created
+ * successfully - the returned value should be stored as the handle to the
+ * created stream batching buffer.
+ *
+ * Example use:
+ * @code{c}
+ *
+ * void vAFunction( void )
+ * {
+ * StreamBufferHandle_t xStreamBatchingBuffer;
+ * const size_t xStreamBufferSizeBytes = 100, xTriggerLevel = 10;
+ *
+ *  // Create a stream batching buffer that can hold 100 bytes.  The memory used
+ *  // to hold both the stream batching buffer structure and the data in the stream
+ *  // batching buffer is allocated dynamically.
+ *  xStreamBatchingBuffer = xStreamBatchingBufferCreate( xStreamBufferSizeBytes, xTriggerLevel );
+ *
+ *  if( xStreamBatchingBuffer == NULL )
+ *  {
+ *      // There was not enough heap memory space available to create the
+ *      // stream batching buffer.
+ *  }
+ *  else
+ *  {
+ *      // The stream batching buffer was created successfully and can now be used.
+ *  }
+ * }
+ * @endcode
+ * \defgroup xStreamBatchingBufferCreate xStreamBatchingBufferCreate
+ * \ingroup StreamBatchingBufferManagement
+ */
+
+#define xStreamBatchingBufferCreate( xBufferSizeBytes, xTriggerLevelBytes ) \
+    xStreamBufferGenericCreate( ( xBufferSizeBytes ), ( xTriggerLevelBytes ), sbTYPE_STREAM_BATCHING_BUFFER, NULL, NULL )
+
+#if ( configUSE_SB_COMPLETED_CALLBACK == 1 )
+    #define xStreamBatchingBufferCreateWithCallback( xBufferSizeBytes, xTriggerLevelBytes, pxSendCompletedCallback, pxReceiveCompletedCallback ) \
+    xStreamBufferGenericCreate( ( xBufferSizeBytes ), ( xTriggerLevelBytes ), sbTYPE_STREAM_BATCHING_BUFFER, ( pxSendCompletedCallback ), ( pxReceiveCompletedCallback ) )
+#endif
+
+/**
+ * stream_buffer.h
+ *
+ * @code{c}
+ * StreamBufferHandle_t xStreamBatchingBufferCreateStatic( size_t xBufferSizeBytes,
+ *                                                         size_t xTriggerLevelBytes,
+ *                                                         uint8_t *pucStreamBufferStorageArea,
+ *                                                         StaticStreamBuffer_t *pxStaticStreamBuffer );
+ * @endcode
+ * Creates a new stream batching buffer using statically allocated memory.  See
+ * xStreamBatchingBufferCreate() for a version that uses dynamically allocated
+ * memory.
+ *
+ * configSUPPORT_STATIC_ALLOCATION must be set to 1 in FreeRTOSConfig.h for
+ * xStreamBatchingBufferCreateStatic() to be available. configUSE_STREAM_BUFFERS
+ * must be set to 1 in for FreeRTOSConfig.h for xStreamBatchingBufferCreateStatic()
+ * to be available.
+ *
+ * The difference between a stream buffer and a stream batching buffer is when
+ * a task performs read on a non-empty buffer:
+ * - The task reading from a non-empty stream buffer returns immediately
+ *   regardless of the amount of data in the buffer.
+ * - The task reading from a non-empty steam batching buffer blocks until the
+ *   amount of data in the buffer exceeds the trigger level or the block time
+ *   expires.
+ *
+ * @param xBufferSizeBytes The size, in bytes, of the buffer pointed to by the
+ * pucStreamBufferStorageArea parameter.
+ *
+ * @param xTriggerLevelBytes The number of bytes that must be in the stream
+ * batching buffer to unblock a task calling xStreamBufferReceive before the
+ * block time expires.
+ *
+ * @param pucStreamBufferStorageArea Must point to a uint8_t array that is at
+ * least xBufferSizeBytes big.  This is the array to which streams are
+ * copied when they are written to the stream batching buffer.
+ *
+ * @param pxStaticStreamBuffer Must point to a variable of type
+ * StaticStreamBuffer_t, which will be used to hold the stream batching buffer's
+ * data structure.
+ *
+ * @param pxSendCompletedCallback Callback invoked when number of bytes at least
+ * equal to trigger level is sent to the stream batching buffer. If the parameter
+ * is NULL, it will use the default implementation provided by sbSEND_COMPLETED
+ * macro. To enable the callback, configUSE_SB_COMPLETED_CALLBACK must be set to
+ * 1 in FreeRTOSConfig.h.
+ *
+ * @param pxReceiveCompletedCallback Callback invoked when more than zero bytes
+ * are read from a stream batching buffer. If the parameter is NULL, it will use
+ * the default implementation provided by sbRECEIVE_COMPLETED macro. To enable
+ * the callback, configUSE_SB_COMPLETED_CALLBACK must be set to 1 in
+ * FreeRTOSConfig.h.
+ *
+ * @return If the stream batching buffer is created successfully then a handle
+ * to the created stream batching buffer is returned. If either pucStreamBufferStorageArea
+ * or pxStaticstreamBuffer are NULL then NULL is returned.
+ *
+ * Example use:
+ * @code{c}
+ *
+ * // Used to dimension the array used to hold the streams.  The available space
+ * // will actually be one less than this, so 999.
+ * #define STORAGE_SIZE_BYTES 1000
+ *
+ * // Defines the memory that will actually hold the streams within the stream
+ * // batching buffer.
+ * static uint8_t ucStorageBuffer[ STORAGE_SIZE_BYTES ];
+ *
+ * // The variable used to hold the stream batching buffer structure.
+ * StaticStreamBuffer_t xStreamBufferStruct;
+ *
+ * void MyFunction( void )
+ * {
+ * StreamBufferHandle_t xStreamBatchingBuffer;
+ * const size_t xTriggerLevel = 1;
+ *
+ *  xStreamBatchingBuffer = xStreamBatchingBufferCreateStatic( sizeof( ucStorageBuffer ),
+ *                                                             xTriggerLevel,
+ *                                                             ucStorageBuffer,
+ *                                                             &xStreamBufferStruct );
+ *
+ *  // As neither the pucStreamBufferStorageArea or pxStaticStreamBuffer
+ *  // parameters were NULL, xStreamBatchingBuffer will not be NULL, and can be
+ *  // used to reference the created stream batching buffer in other stream
+ *  // buffer API calls.
+ *
+ *  // Other code that uses the stream batching buffer can go here.
+ * }
+ *
+ * @endcode
+ * \defgroup xStreamBatchingBufferCreateStatic xStreamBatchingBufferCreateStatic
+ * \ingroup StreamBatchingBufferManagement
+ */
+
+#define xStreamBatchingBufferCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, pucStreamBufferStorageArea, pxStaticStreamBuffer ) \
+    xStreamBufferGenericCreateStatic( ( xBufferSizeBytes ), ( xTriggerLevelBytes ), sbTYPE_STREAM_BATCHING_BUFFER, ( pucStreamBufferStorageArea ), ( pxStaticStreamBuffer ), NULL, NULL )
+
+#if ( configUSE_SB_COMPLETED_CALLBACK == 1 )
+    #define xStreamBatchingBufferCreateStaticWithCallback( xBufferSizeBytes, xTriggerLevelBytes, pucStreamBufferStorageArea, pxStaticStreamBuffer, pxSendCompletedCallback, pxReceiveCompletedCallback ) \
+    xStreamBufferGenericCreateStatic( ( xBufferSizeBytes ), ( xTriggerLevelBytes ), sbTYPE_STREAM_BATCHING_BUFFER, ( pucStreamBufferStorageArea ), ( pxStaticStreamBuffer ), ( pxSendCompletedCallback ), ( pxReceiveCompletedCallback ) )
 #endif
 
 /**
@@ -273,6 +472,9 @@ typedef void (* StreamBufferCallbackFunction_t)( StreamBufferHandle_t xStreamBuf
  * buffer and storage area buffer. These are the same buffers that are supplied
  * at the time of creation.
  *
+ * configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
+ * xStreamBufferGetStaticBuffers() to be available.
+ *
  * @param xStreamBuffer The stream buffer for which to retrieve the buffers.
  *
  * @param ppucStreamBufferStorageArea Used to return a pointer to the stream
@@ -297,9 +499,9 @@ typedef void (* StreamBufferCallbackFunction_t)( StreamBufferHandle_t xStreamBuf
  *
  * @code{c}
  * size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
- *                        const void *pvTxData,
- *                        size_t xDataLengthBytes,
- *                        TickType_t xTicksToWait );
+ *                           const void *pvTxData,
+ *                           size_t xDataLengthBytes,
+ *                           TickType_t xTicksToWait );
  * @endcode
  *
  * Sends bytes to a stream buffer.  The bytes are copied into the stream buffer.
@@ -312,17 +514,20 @@ typedef void (* StreamBufferCallbackFunction_t)( StreamBufferHandle_t xStreamBuf
  * writer and reader to be different tasks or interrupts, but, unlike other
  * FreeRTOS objects, it is not safe to have multiple different writers or
  * multiple different readers.  If there are to be multiple different writers
- * then the application writer must place each call to a writing API function
- * (such as xStreamBufferSend()) inside a critical section and set the send
- * block time to 0.  Likewise, if there are to be multiple different readers
- * then the application writer must place each call to a reading API function
- * (such as xStreamBufferReceive()) inside a critical section and set the receive
- * block time to 0.
+ * then the application writer must serialize calls to writing API functions
+ * (such as xStreamBufferSend()).  Likewise, if there are to be multiple
+ * different readers then the application writer must serialize calls to reading
+ * API functions (such as xStreamBufferReceive()).  One way to achieve such
+ * serialization in single core or SMP kernel is to place each API call inside a
+ * critical section and use a block time of 0.
  *
  * Use xStreamBufferSend() to write to a stream buffer from a task.  Use
  * xStreamBufferSendFromISR() to write to a stream buffer from an interrupt
  * service routine (ISR).
  *
+ * configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
+ * xStreamBufferSend() to be available.
+ *
  * @param xStreamBuffer The handle of the stream buffer to which a stream is
  * being sent.
  *
@@ -394,9 +599,9 @@ size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
  *
  * @code{c}
  * size_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer,
- *                               const void *pvTxData,
- *                               size_t xDataLengthBytes,
- *                               BaseType_t *pxHigherPriorityTaskWoken );
+ *                                  const void *pvTxData,
+ *                                  size_t xDataLengthBytes,
+ *                                  BaseType_t *pxHigherPriorityTaskWoken );
  * @endcode
  *
  * Interrupt safe version of the API function that sends a stream of bytes to
@@ -410,17 +615,20 @@ size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
  * writer and reader to be different tasks or interrupts, but, unlike other
  * FreeRTOS objects, it is not safe to have multiple different writers or
  * multiple different readers.  If there are to be multiple different writers
- * then the application writer must place each call to a writing API function
- * (such as xStreamBufferSend()) inside a critical section and set the send
- * block time to 0.  Likewise, if there are to be multiple different readers
- * then the application writer must place each call to a reading API function
- * (such as xStreamBufferReceive()) inside a critical section and set the receive
- * block time to 0.
+ * then the application writer must serialize calls to writing API functions
+ * (such as xStreamBufferSend()).  Likewise, if there are to be multiple
+ * different readers then the application writer must serialize calls to reading
+ * API functions (such as xStreamBufferReceive()).  One way to achieve such
+ * serialization in single core or SMP kernel is to place each API call inside a
+ * critical section and use a block time of 0.
  *
  * Use xStreamBufferSend() to write to a stream buffer from a task.  Use
  * xStreamBufferSendFromISR() to write to a stream buffer from an interrupt
  * service routine (ISR).
  *
+ * configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
+ * xStreamBufferSendFromISR() to be available.
+ *
  * @param xStreamBuffer The handle of the stream buffer to which a stream is
  * being sent.
  *
@@ -495,9 +703,9 @@ size_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer,
  *
  * @code{c}
  * size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
- *                           void *pvRxData,
- *                           size_t xBufferLengthBytes,
- *                           TickType_t xTicksToWait );
+ *                              void *pvRxData,
+ *                              size_t xBufferLengthBytes,
+ *                              TickType_t xTicksToWait );
  * @endcode
  *
  * Receives bytes from a stream buffer.
@@ -510,17 +718,20 @@ size_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer,
  * writer and reader to be different tasks or interrupts, but, unlike other
  * FreeRTOS objects, it is not safe to have multiple different writers or
  * multiple different readers.  If there are to be multiple different writers
- * then the application writer must place each call to a writing API function
- * (such as xStreamBufferSend()) inside a critical section and set the send
- * block time to 0.  Likewise, if there are to be multiple different readers
- * then the application writer must place each call to a reading API function
- * (such as xStreamBufferReceive()) inside a critical section and set the receive
- * block time to 0.
+ * then the application writer must serialize calls to writing API functions
+ * (such as xStreamBufferSend()).  Likewise, if there are to be multiple
+ * different readers then the application writer must serialize calls to reading
+ * API functions (such as xStreamBufferReceive()).  One way to achieve such
+ * serialization in single core or SMP kernel is to place each API call inside a
+ * critical section and use a block time of 0.
  *
  * Use xStreamBufferReceive() to read from a stream buffer from a task.  Use
  * xStreamBufferReceiveFromISR() to read from a stream buffer from an
  * interrupt service routine (ISR).
  *
+ * configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
+ * xStreamBufferReceive() to be available.
+ *
  * @param xStreamBuffer The handle of the stream buffer from which bytes are to
  * be received.
  *
@@ -584,9 +795,9 @@ size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
  *
  * @code{c}
  * size_t xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer,
- *                                  void *pvRxData,
- *                                  size_t xBufferLengthBytes,
- *                                  BaseType_t *pxHigherPriorityTaskWoken );
+ *                                     void *pvRxData,
+ *                                     size_t xBufferLengthBytes,
+ *                                     BaseType_t *pxHigherPriorityTaskWoken );
  * @endcode
  *
  * An interrupt safe version of the API function that receives bytes from a
@@ -596,6 +807,9 @@ size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
  * Use xStreamBufferReceiveFromISR() to read bytes from a stream buffer from an
  * interrupt service routine (ISR).
  *
+ * configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
+ * xStreamBufferReceiveFromISR() to be available.
+ *
  * @param xStreamBuffer The handle of the stream buffer from which a stream
  * is being received.
  *
@@ -680,6 +894,9 @@ size_t xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer,
  * A stream buffer handle must not be used after the stream buffer has been
  * deleted.
  *
+ * configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
+ * vStreamBufferDelete() to be available.
+ *
  * @param xStreamBuffer The handle of the stream buffer to be deleted.
  *
  * \defgroup vStreamBufferDelete vStreamBufferDelete
@@ -697,6 +914,9 @@ void vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTI
  * Queries a stream buffer to see if it is full.  A stream buffer is full if it
  * does not have any free space, and therefore cannot accept any more data.
  *
+ * configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
+ * xStreamBufferIsFull() to be available.
+ *
  * @param xStreamBuffer The handle of the stream buffer being queried.
  *
  * @return If the stream buffer is full then pdTRUE is returned.  Otherwise
@@ -717,6 +937,9 @@ BaseType_t xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_
  * Queries a stream buffer to see if it is empty.  A stream buffer is empty if
  * it does not contain any data.
  *
+ * configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
+ * xStreamBufferIsEmpty() to be available.
+ *
  * @param xStreamBuffer The handle of the stream buffer being queried.
  *
  * @return If the stream buffer is empty then pdTRUE is returned.  Otherwise
@@ -739,6 +962,13 @@ BaseType_t xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED
  * are no tasks blocked waiting to either send to or receive from the stream
  * buffer.
  *
+ * Use xStreamBufferReset() to reset a stream buffer from a task.
+ * Use xStreamBufferResetFromISR() to reset a stream buffer from an
+ * interrupt service routine (ISR).
+ *
+ * configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
+ * xStreamBufferReset() to be available.
+ *
  * @param xStreamBuffer The handle of the stream buffer being reset.
  *
  * @return If the stream buffer is reset then pdPASS is returned.  If there was
@@ -750,6 +980,38 @@ BaseType_t xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED
  */
 BaseType_t xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
 
+/**
+ * stream_buffer.h
+ *
+ * @code{c}
+ * BaseType_t xStreamBufferResetFromISR( StreamBufferHandle_t xStreamBuffer );
+ * @endcode
+ *
+ * An interrupt safe version of the API function that resets the stream buffer.
+ *
+ * Resets a stream buffer to its initial, empty, state.  Any data that was in
+ * the stream buffer is discarded.  A stream buffer can only be reset if there
+ * are no tasks blocked waiting to either send to or receive from the stream
+ * buffer.
+ *
+ * Use xStreamBufferReset() to reset a stream buffer from a task.
+ * Use xStreamBufferResetFromISR() to reset a stream buffer from an
+ * interrupt service routine (ISR).
+ *
+ * configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
+ * xStreamBufferResetFromISR() to be available.
+ *
+ * @param xStreamBuffer The handle of the stream buffer being reset.
+ *
+ * @return If the stream buffer is reset then pdPASS is returned.  If there was
+ * a task blocked waiting to send to or read from the stream buffer then the
+ * stream buffer is not reset and pdFAIL is returned.
+ *
+ * \defgroup xStreamBufferResetFromISR xStreamBufferResetFromISR
+ * \ingroup StreamBufferManagement
+ */
+BaseType_t xStreamBufferResetFromISR( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
+
 /**
  * stream_buffer.h
  *
@@ -761,6 +1023,9 @@ BaseType_t xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_F
  * equal to the amount of data that can be sent to the stream buffer before it
  * is full.
  *
+ * configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
+ * xStreamBufferSpacesAvailable() to be available.
+ *
  * @param xStreamBuffer The handle of the stream buffer being queried.
  *
  * @return The number of bytes that can be written to the stream buffer before
@@ -782,6 +1047,9 @@ size_t xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) PRIVIL
  * the number of bytes that can be read from the stream buffer before the stream
  * buffer would be empty.
  *
+ * configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
+ * xStreamBufferBytesAvailable() to be available.
+ *
  * @param xStreamBuffer The handle of the stream buffer being queried.
  *
  * @return The number of bytes that can be read from the stream buffer before
@@ -816,6 +1084,9 @@ size_t xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) PRIVILE
  * A trigger level is set when the stream buffer is created, and can be modified
  * using xStreamBufferSetTriggerLevel().
  *
+ * configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
+ * xStreamBufferSetTriggerLevel() to be available.
+ *
  * @param xStreamBuffer The handle of the stream buffer being updated.
  *
  * @param xTriggerLevel The new trigger level for the stream buffer.
@@ -850,6 +1121,9 @@ BaseType_t xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer,
  * See the example implemented in FreeRTOS/Demo/Minimal/MessageBufferAMP.c for
  * additional information.
  *
+ * configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
+ * xStreamBufferSendCompletedFromISR() to be available.
+ *
  * @param xStreamBuffer The handle of the stream buffer to which data was
  * written.
  *
@@ -891,6 +1165,9 @@ BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer
  * See the example implemented in FreeRTOS/Demo/Minimal/MessageBufferAMP.c for
  * additional information.
  *
+ * configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
+ * xStreamBufferReceiveCompletedFromISR() to be available.
+ *
  * @param xStreamBuffer The handle of the stream buffer from which data was
  * read.
  *
@@ -911,17 +1188,74 @@ BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer
 BaseType_t xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuffer,
                                                  BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
 
+/**
+ * stream_buffer.h
+ *
+ * @code{c}
+ * UBaseType_t uxStreamBufferGetStreamBufferNotificationIndex( StreamBufferHandle_t xStreamBuffer );
+ * @endcode
+ *
+ * Get the task notification index used for the supplied stream buffer which can
+ * be set using vStreamBufferSetStreamBufferNotificationIndex. If the task
+ * notification index for the stream buffer is not changed using
+ * vStreamBufferSetStreamBufferNotificationIndex, this function returns the
+ * default value (tskDEFAULT_INDEX_TO_NOTIFY).
+ *
+ * configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
+ * uxStreamBufferGetStreamBufferNotificationIndex() to be available.
+ *
+ * @param xStreamBuffer The handle of the stream buffer for which the task
+ * notification index is retrieved.
+ *
+ * @return The task notification index for the stream buffer.
+ *
+ * \defgroup uxStreamBufferGetStreamBufferNotificationIndex uxStreamBufferGetStreamBufferNotificationIndex
+ * \ingroup StreamBufferManagement
+ */
+UBaseType_t uxStreamBufferGetStreamBufferNotificationIndex( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
+
+/**
+ * stream_buffer.h
+ *
+ * @code{c}
+ * void vStreamBufferSetStreamBufferNotificationIndex ( StreamBuffer_t xStreamBuffer, UBaseType_t uxNotificationIndex );
+ * @endcode
+ *
+ * Set the task notification index used for the supplied stream buffer.
+ * Successive calls to stream buffer APIs (like xStreamBufferSend or
+ * xStreamBufferReceive) for this stream buffer will use this new index for
+ * their task notifications.
+ *
+ * If this function is not called, the default index (tskDEFAULT_INDEX_TO_NOTIFY)
+ * is used for task notifications. It is recommended to call this function
+ * before attempting to send or receive data from the stream buffer to avoid
+ * inconsistencies.
+ *
+ * configUSE_STREAM_BUFFERS must be set to 1 in for FreeRTOSConfig.h for
+ * vStreamBufferSetStreamBufferNotificationIndex() to be available.
+ *
+ * @param xStreamBuffer The handle of the stream buffer for which the task
+ * notification index is set.
+ *
+ * @param uxNotificationIndex The task notification index to set.
+ *
+ * \defgroup vStreamBufferSetStreamBufferNotificationIndex vStreamBufferSetStreamBufferNotificationIndex
+ * \ingroup StreamBufferManagement
+ */
+void vStreamBufferSetStreamBufferNotificationIndex( StreamBufferHandle_t xStreamBuffer,
+                                                    UBaseType_t uxNotificationIndex ) PRIVILEGED_FUNCTION;
+
 /* Functions below here are not part of the public API. */
 StreamBufferHandle_t xStreamBufferGenericCreate( size_t xBufferSizeBytes,
                                                  size_t xTriggerLevelBytes,
-                                                 BaseType_t xIsMessageBuffer,
+                                                 BaseType_t xStreamBufferType,
                                                  StreamBufferCallbackFunction_t pxSendCompletedCallback,
                                                  StreamBufferCallbackFunction_t pxReceiveCompletedCallback ) PRIVILEGED_FUNCTION;
 
 #if ( configSUPPORT_STATIC_ALLOCATION == 1 )
     StreamBufferHandle_t xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes,
                                                            size_t xTriggerLevelBytes,
-                                                           BaseType_t xIsMessageBuffer,
+                                                           BaseType_t xStreamBufferType,
                                                            uint8_t * const pucStreamBufferStorageArea,
                                                            StaticStreamBuffer_t * const pxStaticStreamBuffer,
                                                            StreamBufferCallbackFunction_t pxSendCompletedCallback,

include/task.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -53,30 +53,33 @@
  * The tskKERNEL_VERSION_MAJOR, tskKERNEL_VERSION_MINOR, tskKERNEL_VERSION_BUILD
  * values will reflect the last released version number.
  */
-#define tskKERNEL_VERSION_NUMBER       "V10.4.4+"
-#define tskKERNEL_VERSION_MAJOR        10
-#define tskKERNEL_VERSION_MINOR        4
-#define tskKERNEL_VERSION_BUILD        4
+#define tskKERNEL_VERSION_NUMBER                      "V11.1.0+"
+#define tskKERNEL_VERSION_MAJOR                       11
+#define tskKERNEL_VERSION_MINOR                       1
+#define tskKERNEL_VERSION_BUILD                       0
 
 /* MPU region parameters passed in ulParameters
  * of MemoryRegion_t struct. */
-#define tskMPU_REGION_READ_ONLY        ( 1UL << 0UL )
-#define tskMPU_REGION_READ_WRITE       ( 1UL << 1UL )
-#define tskMPU_REGION_EXECUTE_NEVER    ( 1UL << 2UL )
-#define tskMPU_REGION_NORMAL_MEMORY    ( 1UL << 3UL )
-#define tskMPU_REGION_DEVICE_MEMORY    ( 1UL << 4UL )
+#define tskMPU_REGION_READ_ONLY                       ( 1U << 0U )
+#define tskMPU_REGION_READ_WRITE                      ( 1U << 1U )
+#define tskMPU_REGION_EXECUTE_NEVER                   ( 1U << 2U )
+#define tskMPU_REGION_NORMAL_MEMORY                   ( 1U << 3U )
+#define tskMPU_REGION_DEVICE_MEMORY                   ( 1U << 4U )
+#if defined( portARMV8M_MINOR_VERSION ) && ( portARMV8M_MINOR_VERSION >= 1 )
+    #define tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER    ( 1U << 5U )
+#endif /* portARMV8M_MINOR_VERSION >= 1 */
 
 /* MPU region permissions stored in MPU settings to
  * authorize access requests. */
-#define tskMPU_READ_PERMISSION         ( 1UL << 0UL )
-#define tskMPU_WRITE_PERMISSION        ( 1UL << 1UL )
+#define tskMPU_READ_PERMISSION        ( 1U << 0U )
+#define tskMPU_WRITE_PERMISSION       ( 1U << 1U )
 
 /* The direct to task notification feature used to have only a single notification
  * per task.  Now there is an array of notifications per task that is dimensioned by
  * configTASK_NOTIFICATION_ARRAY_ENTRIES.  For backward compatibility, any use of the
  * original direct to task notification defaults to using the first index in the
  * array. */
-#define tskDEFAULT_INDEX_TO_NOTIFY     ( 0 )
+#define tskDEFAULT_INDEX_TO_NOTIFY    ( 0 )
 
 /**
  * task. h
@@ -161,7 +164,7 @@ typedef struct xTASK_STATUS
 {
     TaskHandle_t xHandle;                         /* The handle of the task to which the rest of the information in the structure relates. */
     const char * pcTaskName;                      /* A pointer to the task's name.  This value will be invalid if the task was deleted since the structure was populated! */
-    UBaseType_t xTaskNumber;                      /* A number unique to the task. */
+    UBaseType_t xTaskNumber;                      /* A number unique to the task. Note that this is not the task number that may be modified using vTaskSetTaskNumber() and uxTaskGetTaskNumber(), but a separate TCB-specific and unique identifier automatically assigned on task generation. */
     eTaskState eCurrentState;                     /* The state in which the task existed when the structure was populated. */
     UBaseType_t uxCurrentPriority;                /* The priority at which the task was running (may be inherited) when the structure was populated. */
     UBaseType_t uxBasePriority;                   /* The priority to which the task will return if the task's current priority has been inherited to avoid unbounded priority inversion when obtaining a mutex.  Only valid if configUSE_MUTEXES is defined as 1 in FreeRTOSConfig.h. */
@@ -180,9 +183,10 @@ typedef struct xTASK_STATUS
 /* Possible return values for eTaskConfirmSleepModeStatus(). */
 typedef enum
 {
-    eAbortSleep = 0,           /* A task has been made ready or a context switch pended since portSUPPRESS_TICKS_AND_SLEEP() was called - abort entering a sleep mode. */
-    eStandardSleep,            /* Enter a sleep mode that will not last any longer than the expected idle time. */
+    eAbortSleep = 0, /* A task has been made ready or a context switch pended since portSUPPRESS_TICKS_AND_SLEEP() was called - abort entering a sleep mode. */
+    eStandardSleep   /* Enter a sleep mode that will not last any longer than the expected idle time. */
     #if ( INCLUDE_vTaskSuspend == 1 )
+        ,
         eNoTasksWaitingTimeout /* No tasks are waiting for a timeout so it is safe to enter a sleep mode that can only be exited by an external interrupt. */
     #endif /* INCLUDE_vTaskSuspend */
 } eSleepModeStatus;
@@ -288,8 +292,8 @@ typedef enum
  * @code{c}
  * BaseType_t xTaskCreate(
  *                            TaskFunction_t pxTaskCode,
- *                            const char *pcName,
- *                            configSTACK_DEPTH_TYPE usStackDepth,
+ *                            const char * const pcName,
+ *                            const configSTACK_DEPTH_TYPE uxStackDepth,
  *                            void *pvParameters,
  *                            UBaseType_t uxPriority,
  *                            TaskHandle_t *pxCreatedTask
@@ -323,9 +327,9 @@ typedef enum
  * facilitate debugging.  Max length defined by configMAX_TASK_NAME_LEN - default
  * is 16.
  *
- * @param usStackDepth The size of the task stack specified as the number of
+ * @param uxStackDepth The size of the task stack specified as the number of
  * variables the stack can hold - not the number of bytes.  For example, if
- * the stack is 16 bits wide and usStackDepth is defined as 100, 200 bytes
+ * the stack is 16 bits wide and uxStackDepth is defined as 100, 200 bytes
  * will be allocated for stack storage.
  *
  * @param pvParameters Pointer that will be used as the parameter for the task
@@ -380,7 +384,7 @@ typedef enum
 #if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
     BaseType_t xTaskCreate( TaskFunction_t pxTaskCode,
                             const char * const pcName,
-                            const configSTACK_DEPTH_TYPE usStackDepth,
+                            const configSTACK_DEPTH_TYPE uxStackDepth,
                             void * const pvParameters,
                             UBaseType_t uxPriority,
                             TaskHandle_t * const pxCreatedTask ) PRIVILEGED_FUNCTION;
@@ -389,7 +393,7 @@ typedef enum
 #if ( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configNUMBER_OF_CORES > 1 ) && ( configUSE_CORE_AFFINITY == 1 ) )
     BaseType_t xTaskCreateAffinitySet( TaskFunction_t pxTaskCode,
                                        const char * const pcName,
-                                       const configSTACK_DEPTH_TYPE usStackDepth,
+                                       const configSTACK_DEPTH_TYPE uxStackDepth,
                                        void * const pvParameters,
                                        UBaseType_t uxPriority,
                                        UBaseType_t uxCoreAffinityMask,
@@ -400,8 +404,8 @@ typedef enum
  * task. h
  * @code{c}
  * TaskHandle_t xTaskCreateStatic( TaskFunction_t pxTaskCode,
- *                               const char *pcName,
- *                               uint32_t ulStackDepth,
+ *                               const char * const pcName,
+ *                               const configSTACK_DEPTH_TYPE uxStackDepth,
  *                               void *pvParameters,
  *                               UBaseType_t uxPriority,
  *                               StackType_t *puxStackBuffer,
@@ -427,9 +431,9 @@ typedef enum
  * facilitate debugging.  The maximum length of the string is defined by
  * configMAX_TASK_NAME_LEN in FreeRTOSConfig.h.
  *
- * @param ulStackDepth The size of the task stack specified as the number of
+ * @param uxStackDepth The size of the task stack specified as the number of
  * variables the stack can hold - not the number of bytes.  For example, if
- * the stack is 32-bits wide and ulStackDepth is defined as 100 then 400 bytes
+ * the stack is 32-bits wide and uxStackDepth is defined as 100 then 400 bytes
  * will be allocated for stack storage.
  *
  * @param pvParameters Pointer that will be used as the parameter for the task
@@ -438,7 +442,7 @@ typedef enum
  * @param uxPriority The priority at which the task will run.
  *
  * @param puxStackBuffer Must point to a StackType_t array that has at least
- * ulStackDepth indexes - the array will then be used as the task's stack,
+ * uxStackDepth indexes - the array will then be used as the task's stack,
  * removing the need for the stack to be allocated dynamically.
  *
  * @param pxTaskBuffer Must point to a variable of type StaticTask_t, which will
@@ -472,7 +476,7 @@ typedef enum
  *  {
  *      // The parameter value is expected to be 1 as 1 is passed in the
  *      // pvParameters value in the call to xTaskCreateStatic().
- *      configASSERT( ( uint32_t ) pvParameters == 1UL );
+ *      configASSERT( ( uint32_t ) pvParameters == 1U );
  *
  *      for( ;; )
  *      {
@@ -507,7 +511,7 @@ typedef enum
 #if ( configSUPPORT_STATIC_ALLOCATION == 1 )
     TaskHandle_t xTaskCreateStatic( TaskFunction_t pxTaskCode,
                                     const char * const pcName,
-                                    const uint32_t ulStackDepth,
+                                    const configSTACK_DEPTH_TYPE uxStackDepth,
                                     void * const pvParameters,
                                     UBaseType_t uxPriority,
                                     StackType_t * const puxStackBuffer,
@@ -517,7 +521,7 @@ typedef enum
 #if ( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configNUMBER_OF_CORES > 1 ) && ( configUSE_CORE_AFFINITY == 1 ) )
     TaskHandle_t xTaskCreateStaticAffinitySet( TaskFunction_t pxTaskCode,
                                                const char * const pcName,
-                                               const uint32_t ulStackDepth,
+                                               const configSTACK_DEPTH_TYPE uxStackDepth,
                                                void * const pvParameters,
                                                UBaseType_t uxPriority,
                                                StackType_t * const puxStackBuffer,
@@ -561,9 +565,9 @@ typedef enum
  * {
  *  vATask,     // pvTaskCode - the function that implements the task.
  *  "ATask",    // pcName - just a text name for the task to assist debugging.
- *  100,        // usStackDepth - the stack size DEFINED IN WORDS.
+ *  100,        // uxStackDepth - the stack size DEFINED IN WORDS.
  *  NULL,       // pvParameters - passed into the task function as the function parameters.
- *  ( 1UL | portPRIVILEGE_BIT ),// uxPriority - task priority, set the portPRIVILEGE_BIT if the task should run in a privileged state.
+ *  ( 1U | portPRIVILEGE_BIT ),// uxPriority - task priority, set the portPRIVILEGE_BIT if the task should run in a privileged state.
  *  cStackBuffer,// puxStackBuffer - the buffer to be used as the task stack.
  *
  *  // xRegions - Allocate up to three separate memory regions for access by
@@ -655,9 +659,9 @@ typedef enum
  * {
  *  vATask,     // pvTaskCode - the function that implements the task.
  *  "ATask",    // pcName - just a text name for the task to assist debugging.
- *  100,        // usStackDepth - the stack size DEFINED IN WORDS.
+ *  100,        // uxStackDepth - the stack size DEFINED IN WORDS.
  *  NULL,       // pvParameters - passed into the task function as the function parameters.
- *  ( 1UL | portPRIVILEGE_BIT ),// uxPriority - task priority, set the portPRIVILEGE_BIT if the task should run in a privileged state.
+ *  ( 1U | portPRIVILEGE_BIT ),// uxPriority - task priority, set the portPRIVILEGE_BIT if the task should run in a privileged state.
  *  cStackBuffer,// puxStackBuffer - the buffer to be used as the task stack.
  *
  *  // xRegions - Allocate up to three separate memory regions for access by
@@ -1987,7 +1991,7 @@ char * pcTaskGetName( TaskHandle_t xTaskToQuery ) PRIVILEGED_FUNCTION;
 /**
  * task.h
  * @code{c}
- * void vApplicationGetIdleTaskMemory( StaticTask_t ** ppxIdleTaskTCBBuffer, StackType_t ** ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize )
+ * void vApplicationGetIdleTaskMemory( StaticTask_t ** ppxIdleTaskTCBBuffer, StackType_t ** ppxIdleTaskStackBuffer, configSTACK_DEPTH_TYPE * puxIdleTaskStackSize )
  * @endcode
  *
  * This function is used to provide a statically allocated block of memory to FreeRTOS to hold the Idle Task TCB.  This function is required when
@@ -1995,16 +1999,16 @@ char * pcTaskGetName( TaskHandle_t xTaskToQuery ) PRIVILEGED_FUNCTION;
  *
  * @param ppxIdleTaskTCBBuffer A handle to a statically allocated TCB buffer
  * @param ppxIdleTaskStackBuffer A handle to a statically allocated Stack buffer for the idle task
- * @param pulIdleTaskStackSize A pointer to the number of elements that will fit in the allocated stack buffer
+ * @param puxIdleTaskStackSize A pointer to the number of elements that will fit in the allocated stack buffer
  */
     void vApplicationGetIdleTaskMemory( StaticTask_t ** ppxIdleTaskTCBBuffer,
                                         StackType_t ** ppxIdleTaskStackBuffer,
-                                        uint32_t * pulIdleTaskStackSize );
+                                        configSTACK_DEPTH_TYPE * puxIdleTaskStackSize );
 
 /**
  * task.h
  * @code{c}
- * void vApplicationGetPassiveIdleTaskMemory( StaticTask_t ** ppxIdleTaskTCBBuffer, StackType_t ** ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize, BaseType_t xCoreID )
+ * void vApplicationGetPassiveIdleTaskMemory( StaticTask_t ** ppxIdleTaskTCBBuffer, StackType_t ** ppxIdleTaskStackBuffer, configSTACK_DEPTH_TYPE * puxIdleTaskStackSize, BaseType_t xCoreID )
  * @endcode
  *
  * This function is used to provide a statically allocated block of memory to FreeRTOS to hold the Idle Tasks TCB.  This function is required when
@@ -2022,13 +2026,13 @@ char * pcTaskGetName( TaskHandle_t xTaskToQuery ) PRIVILEGED_FUNCTION;
  *
  * @param ppxIdleTaskTCBBuffer A handle to a statically allocated TCB buffer
  * @param ppxIdleTaskStackBuffer A handle to a statically allocated Stack buffer for the idle task
- * @param pulIdleTaskStackSize A pointer to the number of elements that will fit in the allocated stack buffer
+ * @param puxIdleTaskStackSize A pointer to the number of elements that will fit in the allocated stack buffer
  * @param xPassiveIdleTaskIndex The passive idle task index of the idle task buffer
  */
     #if ( configNUMBER_OF_CORES > 1 )
         void vApplicationGetPassiveIdleTaskMemory( StaticTask_t ** ppxIdleTaskTCBBuffer,
                                                    StackType_t ** ppxIdleTaskStackBuffer,
-                                                   uint32_t * pulIdleTaskStackSize,
+                                                   configSTACK_DEPTH_TYPE * puxIdleTaskStackSize,
                                                    BaseType_t xPassiveIdleTaskIndex );
     #endif /* #if ( configNUMBER_OF_CORES > 1 ) */
 #endif /* if ( configSUPPORT_STATIC_ALLOCATION == 1 ) */
@@ -2138,7 +2142,7 @@ char * pcTaskGetName( TaskHandle_t xTaskToQuery ) PRIVILEGED_FUNCTION;
  *          uxArraySize = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, &ulTotalRunTime );
  *
  *          // For percentage calculations.
- *          ulTotalRunTime /= 100UL;
+ *          ulTotalRunTime /= 100U;
  *
  *          // Avoid divide by zero errors.
  *          if( ulTotalRunTime > 0 )
@@ -2152,7 +2156,7 @@ char * pcTaskGetName( TaskHandle_t xTaskToQuery ) PRIVILEGED_FUNCTION;
  *                  // ulTotalRunTimeDiv100 has already been divided by 100.
  *                  ulStatsAsPercentage = pxTaskStatusArray[ x ].ulRunTimeCounter / ulTotalRunTime;
  *
- *                  if( ulStatsAsPercentage > 0UL )
+ *                  if( ulStatsAsPercentage > 0U )
  *                  {
  *                      sprintf( pcWriteBuffer, "%s\t\t%lu\t\t%lu%%\r\n", pxTaskStatusArray[ x ].pcTaskName, pxTaskStatusArray[ x ].ulRunTimeCounter, ulStatsAsPercentage );
  *                  }
@@ -2195,8 +2199,8 @@ char * pcTaskGetName( TaskHandle_t xTaskToQuery ) PRIVILEGED_FUNCTION;
  * Lists all the current tasks, along with their current state and stack
  * usage high water mark.
  *
- * Tasks are reported as blocked ('B'), ready ('R'), deleted ('D') or
- * suspended ('S').
+ * Tasks are reported as running ('X'), blocked ('B'), ready ('R'), deleted ('D')
+ * or suspended ('S').
  *
  * PLEASE NOTE:
  *
@@ -2204,8 +2208,16 @@ char * pcTaskGetName( TaskHandle_t xTaskToQuery ) PRIVILEGED_FUNCTION;
  * demo applications.  Do not consider it to be part of the scheduler.
  *
  * vTaskListTasks() calls uxTaskGetSystemState(), then formats part of the
- * uxTaskGetSystemState() output into a human readable table that displays task:
- * names, states, priority, stack usage and task number.
+ * uxTaskGetSystemState() output into a human readable table that displays task
+ * information in the following format:
+ * Task Name, Task State, Task Priority, Task Stack High Watermak, Task Number.
+ *
+ * The following is a sample output:
+ * Task A       X       2           67           2
+ * Task B       R       1           67           3
+ * IDLE         R       0           67           5
+ * Tmr Svc      B       6           137          6
+ *
  * Stack usage specified as the number of unused StackType_t words stack can hold
  * on top of stack - not the number of bytes.
  *
@@ -2256,8 +2268,8 @@ char * pcTaskGetName( TaskHandle_t xTaskToQuery ) PRIVILEGED_FUNCTION;
  * Lists all the current tasks, along with their current state and stack
  * usage high water mark.
  *
- * Tasks are reported as blocked ('B'), ready ('R'), deleted ('D') or
- * suspended ('S').
+ * Tasks are reported as running ('X'), blocked ('B'), ready ('R'), deleted ('D')
+ * or suspended ('S').
  *
  * PLEASE NOTE:
  *
@@ -2265,8 +2277,16 @@ char * pcTaskGetName( TaskHandle_t xTaskToQuery ) PRIVILEGED_FUNCTION;
  * demo applications.  Do not consider it to be part of the scheduler.
  *
  * vTaskList() calls uxTaskGetSystemState(), then formats part of the
- * uxTaskGetSystemState() output into a human readable table that displays task:
- * names, states, priority, stack usage and task number.
+ * uxTaskGetSystemState() output into a human readable table that displays task
+ * information in the following format:
+ * Task Name, Task State, Task Priority, Task Stack High Watermak, Task Number.
+ *
+ * The following is a sample output:
+ * Task A       X       2           67           2
+ * Task B       R       1           67           3
+ * IDLE         R       0           67           5
+ * Tmr Svc      B       6           137          6
+ *
  * Stack usage specified as the number of unused StackType_t words stack can hold
  * on top of stack - not the number of bytes.
  *
@@ -2289,7 +2309,7 @@ char * pcTaskGetName( TaskHandle_t xTaskToQuery ) PRIVILEGED_FUNCTION;
  * \defgroup vTaskList vTaskList
  * \ingroup TaskUtils
  */
-#define vTaskList( pcWriteBuffer )    vTaskListTasks( pcWriteBuffer, configSTATS_BUFFER_MAX_LENGTH )
+#define vTaskList( pcWriteBuffer )    vTaskListTasks( ( pcWriteBuffer ), configSTATS_BUFFER_MAX_LENGTH )
 
 /**
  * task. h
@@ -2368,7 +2388,7 @@ char * pcTaskGetName( TaskHandle_t xTaskToQuery ) PRIVILEGED_FUNCTION;
  *
  * WARN: This function assumes that the pcWriteBuffer is of length
  * configSTATS_BUFFER_MAX_LENGTH. This function is there only for
- * backward compatiblity. New applications are recommended to use
+ * backward compatibility. New applications are recommended to use
  * vTaskGetRunTimeStatistics and supply the length of the pcWriteBuffer
  * explicitly.
  *
@@ -2412,7 +2432,7 @@ char * pcTaskGetName( TaskHandle_t xTaskToQuery ) PRIVILEGED_FUNCTION;
  * \defgroup vTaskGetRunTimeStats vTaskGetRunTimeStats
  * \ingroup TaskUtils
  */
-#define vTaskGetRunTimeStats( pcWriteBuffer )    vTaskGetRunTimeStatistics( pcWriteBuffer, configSTATS_BUFFER_MAX_LENGTH )
+#define vTaskGetRunTimeStats( pcWriteBuffer )    vTaskGetRunTimeStatistics( ( pcWriteBuffer ), configSTATS_BUFFER_MAX_LENGTH )
 
 /**
  * task. h
@@ -2862,7 +2882,7 @@ BaseType_t xTaskGenericNotifyFromISR( TaskHandle_t xTaskToNotify,
  * will be cleared in the calling task's notification value before the task
  * checks to see if any notifications are pending, and optionally blocks if no
  * notifications are pending.  Setting ulBitsToClearOnEntry to ULONG_MAX (if
- * limits.h is included) or 0xffffffffUL (if limits.h is not included) will have
+ * limits.h is included) or 0xffffffffU (if limits.h is not included) will have
  * the effect of resetting the task's notification value to 0.  Setting
  * ulBitsToClearOnEntry to 0 will leave the task's notification value unchanged.
  *
@@ -3438,6 +3458,20 @@ BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut,
  */
 BaseType_t xTaskCatchUpTicks( TickType_t xTicksToCatchUp ) PRIVILEGED_FUNCTION;
 
+/**
+ * task.h
+ * @code{c}
+ * void vTaskResetState( void );
+ * @endcode
+ *
+ * This function resets the internal state of the task. It must be called by the
+ * application before restarting the scheduler.
+ *
+ * \defgroup vTaskResetState vTaskResetState
+ * \ingroup SchedulerControl
+ */
+void vTaskResetState( void ) PRIVILEGED_FUNCTION;
+
 
 /*-----------------------------------------------------------
 * SCHEDULER INTERNALS AVAILABLE FOR PORTING PURPOSES
@@ -3574,9 +3608,7 @@ TaskHandle_t xTaskGetCurrentTaskHandle( void ) PRIVILEGED_FUNCTION;
 /*
  * Return the handle of the task running on specified core.
  */
-#if ( configNUMBER_OF_CORES > 1 )
-    TaskHandle_t xTaskGetCurrentTaskHandleForCore( BaseType_t xCoreID ) PRIVILEGED_FUNCTION;
-#endif
+TaskHandle_t xTaskGetCurrentTaskHandleForCore( BaseType_t xCoreID ) PRIVILEGED_FUNCTION;
 
 /*
  * Shortcut used by the queue implementation to prevent unnecessary call to

include/timers.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -737,14 +737,18 @@ TaskHandle_t xTimerGetTimerDaemonTaskHandle( void ) PRIVILEGED_FUNCTION;
  * // The key press event handler.
  * void vKeyPressEventHandler( char cKey )
  * {
- *     // Ensure the LCD back-light is on, then reset the timer that is
- *     // responsible for turning the back-light off after 5 seconds of
- *     // key inactivity.  Wait 10 ticks for the command to be successfully sent
- *     // if it cannot be sent immediately.
- *     vSetBacklightState( BACKLIGHT_ON );
- *     if( xTimerReset( xBacklightTimer, 100 ) != pdPASS )
+ *     // Reset the timer that is responsible for turning the back-light off after
+ *     // 5 seconds of key inactivity. Wait 10 ticks for the command to be
+ *     // successfully sent if it cannot be sent immediately.
+ *     if( xTimerReset( xBacklightTimer, 10 ) == pdPASS )
  *     {
- *         // The reset command was not executed successfully.  Take appropriate
+ *        // Turn on the LCD back-light. It will be turned off in the
+ *        // vBacklightTimerCallback after 5 seconds of key inactivity.
+ *        vSetBacklightState( BACKLIGHT_ON );
+ *      }
+ *     else
+ *     {
+ *         // The reset command was not executed successfully. Take appropriate
  *         // action here.
  *     }
  *
@@ -753,16 +757,15 @@ TaskHandle_t xTimerGetTimerDaemonTaskHandle( void ) PRIVILEGED_FUNCTION;
  *
  * void main( void )
  * {
- * int32_t x;
  *
  *     // Create then start the one-shot timer that is responsible for turning
  *     // the back-light off if no keys are pressed within a 5 second period.
  *     xBacklightTimer = xTimerCreate( "BacklightTimer",           // Just a text name, not used by the kernel.
- *                                     ( 5000 / portTICK_PERIOD_MS), // The timer period in ticks.
+ *                                     pdMS_TO_TICKS( 5000 ),      // The timer period in ticks.
  *                                     pdFALSE,                    // The timer is a one-shot timer.
  *                                     0,                          // The id is not used by the callback so can take any value.
  *                                     vBacklightTimerCallback     // The callback function that switches the LCD back-light off.
- *                                   );
+ *                                    );
  *
  *     if( xBacklightTimer == NULL )
  *     {
@@ -1384,7 +1387,7 @@ BaseType_t xTimerGenericCommandFromISR( TimerHandle_t xTimer,
 /**
  * task.h
  * @code{c}
- * void vApplicationGetTimerTaskMemory( StaticTask_t ** ppxTimerTaskTCBBuffer, StackType_t ** ppxTimerTaskStackBuffer, uint32_t *pulTimerTaskStackSize )
+ * void vApplicationGetTimerTaskMemory( StaticTask_t ** ppxTimerTaskTCBBuffer, StackType_t ** ppxTimerTaskStackBuffer, configSTACK_DEPTH_TYPE * puxTimerTaskStackSize )
  * @endcode
  *
  * This function is used to provide a statically allocated block of memory to FreeRTOS to hold the Timer Task TCB.  This function is required when
@@ -1392,11 +1395,11 @@ BaseType_t xTimerGenericCommandFromISR( TimerHandle_t xTimer,
  *
  * @param ppxTimerTaskTCBBuffer   A handle to a statically allocated TCB buffer
  * @param ppxTimerTaskStackBuffer A handle to a statically allocated Stack buffer for the idle task
- * @param pulTimerTaskStackSize   A pointer to the number of elements that will fit in the allocated stack buffer
+ * @param puxTimerTaskStackSize   A pointer to the number of elements that will fit in the allocated stack buffer
  */
     void vApplicationGetTimerTaskMemory( StaticTask_t ** ppxTimerTaskTCBBuffer,
                                          StackType_t ** ppxTimerTaskStackBuffer,
-                                         uint32_t * pulTimerTaskStackSize );
+                                         configSTACK_DEPTH_TYPE * puxTimerTaskStackSize );
 
 #endif
 
@@ -1417,6 +1420,12 @@ BaseType_t xTimerGenericCommandFromISR( TimerHandle_t xTimer,
 
 #endif
 
+/*
+ * This function resets the internal state of the timer module. It must be called
+ * by the application before restarting the scheduler.
+ */
+void vTimerResetState( void ) PRIVILEGED_FUNCTION;
+
 /* *INDENT-OFF* */
 #ifdef __cplusplus
     }

list.c

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -130,7 +130,7 @@ void vListInsertEnd( List_t * const pxList,
     /* Remember which list the item is in. */
     pxNewListItem->pxContainer = pxList;
 
-    ( pxList->uxNumberOfItems )++;
+    ( pxList->uxNumberOfItems ) = ( UBaseType_t ) ( pxList->uxNumberOfItems + 1U );
 
     traceRETURN_vListInsertEnd();
 }
@@ -166,7 +166,7 @@ void vListInsert( List_t * const pxList,
     {
         /* *** NOTE ***********************************************************
         *  If you find your application is crashing here then likely causes are
-        *  listed below.  In addition see https://www.FreeRTOS.org/FAQHelp.html for
+        *  listed below.  In addition see https://www.freertos.org/Why-FreeRTOS/FAQs for
         *  more tips, and ensure configASSERT() is defined!
         *  https://www.FreeRTOS.org/a00110.html#configASSERT
         *
@@ -192,7 +192,9 @@ void vListInsert( List_t * const pxList,
         for( pxIterator = ( ListItem_t * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext )
         {
             /* There is nothing to do here, just iterating to the wanted
-             * insertion position. */
+             * insertion position.
+             * IF YOU FIND YOUR CODE STUCK HERE, SEE THE NOTE JUST ABOVE.
+             */
         }
     }
 
@@ -205,12 +207,13 @@ void vListInsert( List_t * const pxList,
      * item later. */
     pxNewListItem->pxContainer = pxList;
 
-    ( pxList->uxNumberOfItems )++;
+    ( pxList->uxNumberOfItems ) = ( UBaseType_t ) ( pxList->uxNumberOfItems + 1U );
 
     traceRETURN_vListInsert();
 }
 /*-----------------------------------------------------------*/
 
+
 UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove )
 {
     /* The list item knows which list it is in.  Obtain the list from the list
@@ -219,8 +222,6 @@ UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove )
 
     traceENTER_uxListRemove( pxItemToRemove );
 
-
-
     pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious;
     pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext;
 
@@ -238,7 +239,7 @@ UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove )
     }
 
     pxItemToRemove->pxContainer = NULL;
-    ( pxList->uxNumberOfItems )--;
+    ( pxList->uxNumberOfItems ) = ( UBaseType_t ) ( pxList->uxNumberOfItems - 1U );
 
     traceRETURN_uxListRemove( pxList->uxNumberOfItems );
 

manifest.yml

@@ -1,4 +1,4 @@
 name : "FreeRTOS-Kernel"
-version: "v10.5.1"
+version: "V11.0.1+"
 description: "FreeRTOS Kernel."
 license: "MIT"

portable/ARMv8M/copy_files.py

@@ -1,6 +1,6 @@
 #/*
 # * FreeRTOS Kernel <DEVELOPMENT BRANCH>
-# * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+# * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
 # *
 # * SPDX-License-Identifier: MIT
 # *

portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -56,11 +56,11 @@
             " .syntax unified                                 \n"
             "                                                 \n"
             " program_mpu_first_task:                         \n"
-            "    ldr r3, pxCurrentTCBConst2                   \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "    ldr r3, =pxCurrentTCB                        \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
             "    ldr r0, [r3]                                 \n" /* r0 = pxCurrentTCB.*/
             "                                                 \n"
             "    dmb                                          \n" /* Complete outstanding transfers before disabling MPU. */
-            "    ldr r1, xMPUCTRLConst2                       \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "    ldr r1, =0xe000ed94                          \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
             "    ldr r2, [r1]                                 \n" /* Read the value of MPU_CTRL. */
             "    movs r3, #1                                  \n" /* r3 = 1. */
             "    bics r2, r3                                  \n" /* r2 = r2 & ~r3 i.e. Clear the bit 0 in r2. */
@@ -68,34 +68,34 @@
             "                                                 \n"
             "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
             "    ldr r1, [r0]                                 \n" /* r1 = *r0 i.e. r1 = MAIR0. */
-            "    ldr r2, xMAIR0Const2                         \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
+            "    ldr r2, =0xe000edc0                          \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
             "    str r1, [r2]                                 \n" /* Program MAIR0. */
             "                                                 \n"
             "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
-            "    ldr r1, xRNRConst2                           \n" /* r1 = 0xe000ed98 [Location of RNR]. */
+            "    ldr r1, =0xe000ed98                          \n" /* r1 = 0xe000ed98 [Location of RNR]. */
             "                                                 \n"
             "    movs r3, #4                                  \n" /* r3 = 4. */
             "    str r3, [r1]                                 \n" /* Program RNR = 4. */
             "    ldmia r0!, {r4-r5}                           \n" /* Read first set of RBAR/RLAR registers from TCB. */
-            "    ldr r2, xRBARConst2                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "    ldr r2, =0xe000ed9c                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
             "    stmia r2!, {r4-r5}                           \n" /* Write first set of RBAR/RLAR registers. */
             "    movs r3, #5                                  \n" /* r3 = 5. */
             "    str r3, [r1]                                 \n" /* Program RNR = 5. */
             "    ldmia r0!, {r4-r5}                           \n" /* Read second set of RBAR/RLAR registers from TCB. */
-            "    ldr r2, xRBARConst2                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "    ldr r2, =0xe000ed9c                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
             "    stmia r2!, {r4-r5}                           \n" /* Write second set of RBAR/RLAR registers. */
             "    movs r3, #6                                  \n" /* r3 = 6. */
             "    str r3, [r1]                                 \n" /* Program RNR = 6. */
             "    ldmia r0!, {r4-r5}                           \n" /* Read third set of RBAR/RLAR registers from TCB. */
-            "    ldr r2, xRBARConst2                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "    ldr r2, =0xe000ed9c                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
             "    stmia r2!, {r4-r5}                           \n" /* Write third set of RBAR/RLAR registers. */
             "    movs r3, #7                                  \n" /* r3 = 6. */
             "    str r3, [r1]                                 \n" /* Program RNR = 7. */
             "    ldmia r0!, {r4-r5}                           \n" /* Read fourth set of RBAR/RLAR registers from TCB. */
-            "    ldr r2, xRBARConst2                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "    ldr r2, =0xe000ed9c                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
             "    stmia r2!, {r4-r5}                           \n" /* Write fourth set of RBAR/RLAR registers. */
             "                                                 \n"
-            "   ldr r1, xMPUCTRLConst2                        \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "   ldr r1, =0xe000ed94                           \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
             "   ldr r2, [r1]                                  \n" /* Read the value of MPU_CTRL. */
             "   movs r3, #1                                   \n" /* r3 = 1. */
             "   orrs r2, r3                                   \n" /* r2 = r2 | r3 i.e. Set the bit 0 in r2. */
@@ -103,7 +103,7 @@
             "   dsb                                           \n" /* Force memory writes before continuing. */
             "                                                 \n"
             " restore_context_first_task:                     \n"
-            "    ldr r3, pxCurrentTCBConst2                   \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "    ldr r3, =pxCurrentTCB                        \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
             "    ldr r1, [r3]                                 \n" /* r1 = pxCurrentTCB.*/
             "    ldr r2, [r1]                                 \n" /* r2 = Location of saved context in TCB. */
             "                                                 \n"
@@ -114,7 +114,7 @@
             "    msr psp, r3                                  \n"
             "    msr control, r5                              \n"
             "    mov lr, r6                                   \n"
-            "    ldr r4, xSecureContextConst2                 \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
+            "    ldr r4, =xSecureContext                      \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
             "    str r0, [r4]                                 \n" /* Restore xSecureContext. */
             "                                                 \n"
             " restore_general_regs_first_task:                \n"
@@ -136,14 +136,6 @@
             " restore_context_done_first_task:                \n"
             "    str r2, [r1]                                 \n" /* Save the location where the context should be saved next as the first member of TCB. */
             "    bx lr                                        \n"
-            "                                                 \n"
-            " .align 4                                        \n"
-            " pxCurrentTCBConst2: .word pxCurrentTCB          \n"
-            " xSecureContextConst2: .word xSecureContext      \n"
-            " xMPUCTRLConst2: .word 0xe000ed94                \n"
-            " xMAIR0Const2: .word 0xe000edc0                  \n"
-            " xRNRConst2: .word 0xe000ed98                    \n"
-            " xRBARConst2: .word 0xe000ed9c                   \n"
         );
     }
 
@@ -155,12 +147,12 @@
         (
             "   .syntax unified                                 \n"
             "                                                   \n"
-            "   ldr  r2, pxCurrentTCBConst2                     \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "   ldr  r2, =pxCurrentTCB                          \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
             "   ldr  r3, [r2]                                   \n" /* Read pxCurrentTCB. */
             "   ldr  r0, [r3]                                   \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
             "                                                   \n"
             "   ldm  r0!, {r1-r3}                               \n" /* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */
-            "   ldr  r4, xSecureContextConst2                   \n"
+            "   ldr  r4, =xSecureContext                        \n"
             "   str  r1, [r4]                                   \n" /* Set xSecureContext to this task's value for the same. */
             "   movs r1, #2                                     \n" /* r1 = 2. */
             "   msr  CONTROL, r1                                \n" /* Switch to use PSP in the thread mode. */
@@ -168,10 +160,6 @@
             "   msr  psp, r0                                    \n" /* This is now the new top of stack to use in the task. */
             "   isb                                             \n"
             "   bx   r3                                         \n" /* Finally, branch to EXC_RETURN. */
-            "                                                   \n"
-            "   .align 4                                        \n"
-            "pxCurrentTCBConst2: .word pxCurrentTCB             \n"
-            "xSecureContextConst2: .word xSecureContext         \n"
         );
     }
 
@@ -193,8 +181,6 @@ BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
         " running_privileged:                               \n"
         "   movs r0, #1                                     \n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
         "   bx lr                                           \n" /* Return. */
-        "                                                   \n"
-        "   .align 4                                        \n"
         ::: "r0", "r1", "memory"
     );
 }
@@ -238,7 +224,7 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
     (
         "   .syntax unified                                 \n"
         "                                                   \n"
-        "   ldr r0, xVTORConst                              \n" /* Use the NVIC offset register to locate the stack. */
+        "   ldr r0, =0xe000ed08                             \n" /* Use the NVIC offset register to locate the stack. */
         "   ldr r0, [r0]                                    \n" /* Read the VTOR register which gives the address of vector table. */
         "   ldr r0, [r0]                                    \n" /* The first entry in vector table is stack pointer. */
         "   msr msp, r0                                     \n" /* Set the MSP back to the start of the stack. */
@@ -247,9 +233,6 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
         "   isb                                             \n"
         "   svc %0                                          \n" /* System call to start the first task. */
         "   nop                                             \n"
-        "                                                   \n"
-        "   .align 4                                        \n"
-        "xVTORConst: .word 0xe000ed08                       \n"
         ::"i" ( portSVC_START_SCHEDULER ) : "memory"
     );
 }
@@ -292,9 +275,9 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
             " .extern SecureContext_SaveContext               \n"
             " .extern SecureContext_LoadContext               \n"
             "                                                 \n"
-            " ldr r3, xSecureContextConst                     \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
+            " ldr r3, =xSecureContext                         \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
             " ldr r0, [r3]                                    \n" /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
-            " ldr r3, pxCurrentTCBConst                       \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            " ldr r3, =pxCurrentTCB                           \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
             " ldr r1, [r3]                                    \n" /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later.*/
             " ldr r2, [r1]                                    \n" /* r2 = Location in TCB where the context should be saved. */
             "                                                 \n"
@@ -337,11 +320,11 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
             "    cpsie i                                      \n"
             "                                                 \n"
             " program_mpu:                                    \n"
-            "    ldr r3, pxCurrentTCBConst                    \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "    ldr r3, =pxCurrentTCB                        \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
             "    ldr r0, [r3]                                 \n" /* r0 = pxCurrentTCB.*/
             "                                                 \n"
             "    dmb                                          \n" /* Complete outstanding transfers before disabling MPU. */
-            "    ldr r1, xMPUCTRLConst                        \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "    ldr r1, =0xe000ed94                          \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
             "    ldr r2, [r1]                                 \n" /* Read the value of MPU_CTRL. */
             "    movs r3, #1                                  \n" /* r3 = 1. */
             "    bics r2, r3                                  \n" /* r2 = r2 & ~r3 i.e. Clear the bit 0 in r2. */
@@ -349,34 +332,34 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
             "                                                 \n"
             "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
             "    ldr r1, [r0]                                 \n" /* r1 = *r0 i.e. r1 = MAIR0. */
-            "    ldr r2, xMAIR0Const                          \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
+            "    ldr r2, =0xe000edc0                          \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
             "    str r1, [r2]                                 \n" /* Program MAIR0. */
             "                                                 \n"
             "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
-            "    ldr r1, xRNRConst                            \n" /* r1 = 0xe000ed98 [Location of RNR]. */
+            "    ldr r1, =0xe000ed98                          \n" /* r1 = 0xe000ed98 [Location of RNR]. */
             "                                                 \n"
             "    movs r3, #4                                  \n" /* r3 = 4. */
             "    str r3, [r1]                                 \n" /* Program RNR = 4. */
             "    ldmia r0!, {r4-r5}                           \n" /* Read first set of RBAR/RLAR registers from TCB. */
-            "    ldr r2, xRBARConst                           \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "    ldr r2, =0xe000ed9c                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
             "    stmia r2!, {r4-r5}                           \n" /* Write first set of RBAR/RLAR registers. */
             "    movs r3, #5                                  \n" /* r3 = 5. */
             "    str r3, [r1]                                 \n" /* Program RNR = 5. */
             "    ldmia r0!, {r4-r5}                           \n" /* Read second set of RBAR/RLAR registers from TCB. */
-            "    ldr r2, xRBARConst                           \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "    ldr r2, =0xe000ed9c                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
             "    stmia r2!, {r4-r5}                           \n" /* Write second set of RBAR/RLAR registers. */
             "    movs r3, #6                                  \n" /* r3 = 6. */
             "    str r3, [r1]                                 \n" /* Program RNR = 6. */
             "    ldmia r0!, {r4-r5}                           \n" /* Read third set of RBAR/RLAR registers from TCB. */
-            "    ldr r2, xRBARConst                           \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "    ldr r2, =0xe000ed9c                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
             "    stmia r2!, {r4-r5}                           \n" /* Write third set of RBAR/RLAR registers. */
             "    movs r3, #7                                  \n" /* r3 = 6. */
             "    str r3, [r1]                                 \n" /* Program RNR = 7. */
             "    ldmia r0!, {r4-r5}                           \n" /* Read fourth set of RBAR/RLAR registers from TCB. */
-            "    ldr r2, xRBARConst                           \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "    ldr r2, =0xe000ed9c                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
             "    stmia r2!, {r4-r5}                           \n" /* Write fourth set of RBAR/RLAR registers. */
             "                                                 \n"
-            "    ldr r1, xMPUCTRLConst                        \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "    ldr r1, =0xe000ed94                          \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
             "    ldr r2, [r1]                                 \n" /* Read the value of MPU_CTRL. */
             "    movs r3, #1                                  \n" /* r3 = 1. */
             "    orrs r2, r3                                  \n" /* r2 = r2 | r3 i.e. Set the bit 0 in r2. */
@@ -384,7 +367,7 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
             "    dsb                                          \n" /* Force memory writes before continuing. */
             "                                                 \n"
             " restore_context:                                \n"
-            "    ldr r3, pxCurrentTCBConst                    \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "    ldr r3, =pxCurrentTCB                        \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
             "    ldr r1, [r3]                                 \n" /* r1 = pxCurrentTCB.*/
             "    ldr r2, [r1]                                 \n" /* r2 = Location of saved context in TCB. */
             "                                                 \n"
@@ -395,7 +378,7 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
             "    msr psp, r3                                  \n"
             "    msr control, r5                              \n"
             "    mov lr, r6                                   \n"
-            "    ldr r4, xSecureContextConst                  \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
+            "    ldr r4, =xSecureContext                      \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
             "    str r0, [r4]                                 \n" /* Restore xSecureContext. */
             "    cbz r0, restore_ns_context                   \n" /* No secure context to restore. */
             "                                                 \n"
@@ -429,14 +412,6 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
             " restore_context_done:                           \n"
             "    str r2, [r1]                                 \n" /* Save the location where the context should be saved next as the first member of TCB. */
             "    bx lr                                        \n"
-            "                                                 \n"
-            " .align 4                                        \n"
-            " pxCurrentTCBConst: .word pxCurrentTCB           \n"
-            " xSecureContextConst: .word xSecureContext       \n"
-            " xMPUCTRLConst: .word 0xe000ed94                 \n"
-            " xMAIR0Const: .word 0xe000edc0                   \n"
-            " xRNRConst: .word 0xe000ed98                     \n"
-            " xRBARConst: .word 0xe000ed9c                    \n"
         );
     }
 
@@ -450,9 +425,9 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
             "   .extern SecureContext_SaveContext               \n"
             "   .extern SecureContext_LoadContext               \n"
             "                                                   \n"
-            "   ldr r3, xSecureContextConst                     \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
+            "   ldr r3, =xSecureContext                         \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
             "   ldr r0, [r3]                                    \n" /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
-            "   ldr r3, pxCurrentTCBConst                       \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "   ldr r3, =pxCurrentTCB                           \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
             "   ldr r1, [r3]                                    \n" /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later.*/
             "   mrs r2, psp                                     \n" /* Read PSP in r2. */
             "                                                   \n"
@@ -463,7 +438,7 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
             "   mov lr, r3                                      \n" /* LR = r3. */
             "   lsls r1, r3, #25                                \n" /* r1 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
             "   bpl save_ns_context                             \n" /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
-            "   ldr r3, pxCurrentTCBConst                       \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "   ldr r3, =pxCurrentTCB                           \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
             "   ldr r1, [r3]                                    \n" /* Read pxCurrentTCB. */
             "   subs r2, r2, #12                                \n" /* Make space for xSecureContext, PSPLIM and LR on the stack. */
             "   str r2, [r1]                                    \n" /* Save the new top of stack in TCB. */
@@ -473,7 +448,7 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
             "   b select_next_task                              \n"
             "                                                   \n"
             " save_ns_context:                                  \n"
-            "   ldr r3, pxCurrentTCBConst                       \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "   ldr r3, =pxCurrentTCB                           \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
             "   ldr r1, [r3]                                    \n" /* Read pxCurrentTCB. */
             "   subs r2, r2, #44                                \n" /* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */
             "   str r2, [r1]                                    \n" /* Save the new top of stack in TCB. */
@@ -491,16 +466,16 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
             "   bl vTaskSwitchContext                           \n"
             "   cpsie i                                         \n"
             "                                                   \n"
-            "   ldr r3, pxCurrentTCBConst                       \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "   ldr r3, =pxCurrentTCB                           \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
             "   ldr r1, [r3]                                    \n" /* Read pxCurrentTCB. */
             "   ldr r2, [r1]                                    \n" /* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */
             "                                                   \n"
             "   ldmia r2!, {r0, r1, r4}                         \n" /* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */
             "   mov lr, r4                                      \n" /* LR = r4. */
-            "   ldr r3, xSecureContextConst                     \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
+            "   ldr r3, =xSecureContext                         \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
             "   str r0, [r3]                                    \n" /* Restore the task's xSecureContext. */
             "   cbz r0, restore_ns_context                      \n" /* If there is no secure context for the task, restore the non-secure context. */
-            "   ldr r3, pxCurrentTCBConst                       \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "   ldr r3, =pxCurrentTCB                           \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
             "   ldr r1, [r3]                                    \n" /* Read pxCurrentTCB. */
             "   push {r2, r4}                                   \n"
             "   bl SecureContext_LoadContext                    \n" /* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
@@ -522,10 +497,6 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
             "   subs r2, r2, #32                                \n" /* Go back to the low registers. */
             "   ldmia r2!, {r4-r7}                              \n" /* Restore the low registers that are not automatically restored. */
             "   bx lr                                           \n"
-            "                                                   \n"
-            "   .align 4                                        \n"
-            "pxCurrentTCBConst: .word pxCurrentTCB              \n"
-            "xSecureContextConst: .word xSecureContext          \n"
         );
     }
 
@@ -588,15 +559,12 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
             "   tst r0, r1                                      \n"
             "   beq stacking_used_msp                           \n"
             "   mrs r0, psp                                     \n"
-            "   ldr r2, svchandler_address_const                \n"
+            "   ldr r2, =vPortSVCHandler_C                      \n"
             "   bx r2                                           \n"
             " stacking_used_msp:                                \n"
             "   mrs r0, msp                                     \n"
-            "   ldr r2, svchandler_address_const                \n"
+            "   ldr r2, =vPortSVCHandler_C                      \n"
             "   bx r2                                           \n"
-            "                                                   \n"
-            "   .align 4                                        \n"
-            "svchandler_address_const: .word vPortSVCHandler_C  \n"
         );
     }
 

portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -50,6 +50,7 @@
  */
 #define portARCH_NAME                    "Cortex-M23"
 #define portHAS_ARMV8M_MAIN_EXTENSION    0
+#define portARMV8M_MINOR_VERSION         0
 #define portDONT_DISCARD                 __attribute__( ( used ) )
 /*-----------------------------------------------------------*/
 
@@ -60,6 +61,12 @@
 #if ( configTOTAL_MPU_REGIONS == 16 )
     #error 16 MPU regions are not yet supported for this port.
 #endif
+
+#ifndef configENABLE_MVE
+    #define configENABLE_MVE    0
+#elif ( configENABLE_MVE != 0 )
+    #error configENABLE_MVE must be left undefined, or defined to 0 for the Cortex-M23.
+#endif
 /*-----------------------------------------------------------*/
 
 /**

portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -56,11 +56,11 @@
             " .syntax unified                                 \n"
             "                                                 \n"
             " program_mpu_first_task:                         \n"
-            "    ldr r3, pxCurrentTCBConst2                   \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "    ldr r3, =pxCurrentTCB                        \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
             "    ldr r0, [r3]                                 \n" /* r0 = pxCurrentTCB.*/
             "                                                 \n"
             "    dmb                                          \n" /* Complete outstanding transfers before disabling MPU. */
-            "    ldr r1, xMPUCTRLConst2                       \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "    ldr r1, =0xe000ed94                          \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
             "    ldr r2, [r1]                                 \n" /* Read the value of MPU_CTRL. */
             "    movs r3, #1                                  \n" /* r3 = 1. */
             "    bics r2, r3                                  \n" /* r2 = r2 & ~r3 i.e. Clear the bit 0 in r2. */
@@ -68,34 +68,34 @@
             "                                                 \n"
             "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
             "    ldr r1, [r0]                                 \n" /* r1 = *r0 i.e. r1 = MAIR0. */
-            "    ldr r2, xMAIR0Const2                         \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
+            "    ldr r2, =0xe000edc0                          \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
             "    str r1, [r2]                                 \n" /* Program MAIR0. */
             "                                                 \n"
             "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
-            "    ldr r1, xRNRConst2                           \n" /* r1 = 0xe000ed98 [Location of RNR]. */
+            "    ldr r1, =0xe000ed98                          \n" /* r1 = 0xe000ed98 [Location of RNR]. */
             "                                                 \n"
             "    movs r3, #4                                  \n" /* r3 = 4. */
             "    str r3, [r1]                                 \n" /* Program RNR = 4. */
             "    ldmia r0!, {r4-r5}                           \n" /* Read first set of RBAR/RLAR registers from TCB. */
-            "    ldr r2, xRBARConst2                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "    ldr r2, =0xe000ed9c                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
             "    stmia r2!, {r4-r5}                           \n" /* Write first set of RBAR/RLAR registers. */
             "    movs r3, #5                                  \n" /* r3 = 5. */
             "    str r3, [r1]                                 \n" /* Program RNR = 5. */
             "    ldmia r0!, {r4-r5}                           \n" /* Read second set of RBAR/RLAR registers from TCB. */
-            "    ldr r2, xRBARConst2                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "    ldr r2, =0xe000ed9c                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
             "    stmia r2!, {r4-r5}                           \n" /* Write second set of RBAR/RLAR registers. */
             "    movs r3, #6                                  \n" /* r3 = 6. */
             "    str r3, [r1]                                 \n" /* Program RNR = 6. */
             "    ldmia r0!, {r4-r5}                           \n" /* Read third set of RBAR/RLAR registers from TCB. */
-            "    ldr r2, xRBARConst2                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "    ldr r2, =0xe000ed9c                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
             "    stmia r2!, {r4-r5}                           \n" /* Write third set of RBAR/RLAR registers. */
             "    movs r3, #7                                  \n" /* r3 = 6. */
             "    str r3, [r1]                                 \n" /* Program RNR = 7. */
             "    ldmia r0!, {r4-r5}                           \n" /* Read fourth set of RBAR/RLAR registers from TCB. */
-            "    ldr r2, xRBARConst2                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "    ldr r2, =0xe000ed9c                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
             "    stmia r2!, {r4-r5}                           \n" /* Write fourth set of RBAR/RLAR registers. */
             "                                                 \n"
-            "    ldr r1, xMPUCTRLConst2                       \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "    ldr r1, =0xe000ed94                          \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
             "    ldr r2, [r1]                                 \n" /* Read the value of MPU_CTRL. */
             "    movs r3, #1                                  \n" /* r3 = 1. */
             "    orrs r2, r3                                  \n" /* r2 = r2 | r3 i.e. Set the bit 0 in r2. */
@@ -103,7 +103,7 @@
             "    dsb                                          \n" /* Force memory writes before continuing. */
             "                                                 \n"
             " restore_context_first_task:                     \n"
-            "    ldr r2, pxCurrentTCBConst2                   \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "    ldr r2, =pxCurrentTCB                        \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
             "    ldr r0, [r2]                                 \n" /* r0 = pxCurrentTCB.*/
             "    ldr r1, [r0]                                 \n" /* r1 = Location of saved context in TCB. */
             "                                                 \n"
@@ -137,13 +137,6 @@
             " restore_context_done_first_task:                \n"
             "    str r1, [r0]                                 \n" /* Save the location where the context should be saved next as the first member of TCB. */
             "    bx lr                                        \n"
-            "                                                 \n"
-            " .align 4                                        \n"
-            " pxCurrentTCBConst2: .word pxCurrentTCB          \n"
-            " xMPUCTRLConst2: .word 0xe000ed94                \n"
-            " xMAIR0Const2: .word 0xe000edc0                  \n"
-            " xRNRConst2: .word 0xe000ed98                    \n"
-            " xRBARConst2: .word 0xe000ed9c                   \n"
         );
     }
 
@@ -155,7 +148,7 @@
         (
             "   .syntax unified                                 \n"
             "                                                   \n"
-            "   ldr  r2, pxCurrentTCBConst2                     \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "   ldr  r2, =pxCurrentTCB                          \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
             "   ldr  r1, [r2]                                   \n" /* Read pxCurrentTCB. */
             "   ldr  r0, [r1]                                   \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
             "                                                   \n"
@@ -169,9 +162,6 @@
             "   msr  psp, r0                                    \n" /* This is now the new top of stack to use in the task. */
             "   isb                                             \n"
             "   bx   r2                                         \n" /* Finally, branch to EXC_RETURN. */
-            "                                                   \n"
-            "   .align 4                                        \n"
-            "pxCurrentTCBConst2: .word pxCurrentTCB             \n"
         );
     }
 
@@ -193,8 +183,6 @@ BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
         " running_privileged:                               \n"
         "   movs r0, #1                                     \n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
         "   bx lr                                           \n" /* Return. */
-        "                                                   \n"
-        "   .align 4                                        \n"
         ::: "r0", "r1", "memory"
     );
 }
@@ -238,7 +226,7 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
     (
         "   .syntax unified                                 \n"
         "                                                   \n"
-        "   ldr r0, xVTORConst                              \n" /* Use the NVIC offset register to locate the stack. */
+        "   ldr r0, =0xe000ed08                             \n" /* Use the NVIC offset register to locate the stack. */
         "   ldr r0, [r0]                                    \n" /* Read the VTOR register which gives the address of vector table. */
         "   ldr r0, [r0]                                    \n" /* The first entry in vector table is stack pointer. */
         "   msr msp, r0                                     \n" /* Set the MSP back to the start of the stack. */
@@ -247,9 +235,6 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
         "   isb                                             \n"
         "   svc %0                                          \n" /* System call to start the first task. */
         "   nop                                             \n"
-        "                                                   \n"
-        "   .align 4                                        \n"
-        "xVTORConst: .word 0xe000ed08                       \n"
         ::"i" ( portSVC_START_SCHEDULER ) : "memory"
     );
 }
@@ -290,7 +275,7 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
         (
             " .syntax unified                                 \n"
             "                                                 \n"
-            " ldr r2, pxCurrentTCBConst                       \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            " ldr r2, =pxCurrentTCB                           \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
             " ldr r0, [r2]                                    \n" /* r0 = pxCurrentTCB. */
             " ldr r1, [r0]                                    \n" /* r1 = Location in TCB where the context should be saved. */
             " mrs r2, psp                                     \n" /* r2 = PSP. */
@@ -325,11 +310,11 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
             "    cpsie i                                      \n"
             "                                                 \n"
             " program_mpu:                                    \n"
-            "    ldr r3, pxCurrentTCBConst                    \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "    ldr r3, =pxCurrentTCB                        \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
             "    ldr r0, [r3]                                 \n" /* r0 = pxCurrentTCB.*/
             "                                                 \n"
             "    dmb                                          \n" /* Complete outstanding transfers before disabling MPU. */
-            "    ldr r1, xMPUCTRLConst                        \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "    ldr r1, =0xe000ed94                          \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
             "    ldr r2, [r1]                                 \n" /* Read the value of MPU_CTRL. */
             "    movs r3, #1                                  \n" /* r3 = 1. */
             "    bics r2, r3                                  \n" /* r2 = r2 & ~r3 i.e. Clear the bit 0 in r2. */
@@ -337,34 +322,34 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
             "                                                 \n"
             "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
             "    ldr r1, [r0]                                 \n" /* r1 = *r0 i.e. r1 = MAIR0. */
-            "    ldr r2, xMAIR0Const                          \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
+            "    ldr r2, =0xe000edc0                          \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
             "    str r1, [r2]                                 \n" /* Program MAIR0. */
             "                                                 \n"
             "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
-            "    ldr r1, xRNRConst                            \n" /* r1 = 0xe000ed98 [Location of RNR]. */
+            "    ldr r1, =0xe000ed98                          \n" /* r1 = 0xe000ed98 [Location of RNR]. */
             "                                                 \n"
             "    movs r3, #4                                  \n" /* r3 = 4. */
             "    str r3, [r1]                                 \n" /* Program RNR = 4. */
             "    ldmia r0!, {r4-r5}                           \n" /* Read first set of RBAR/RLAR registers from TCB. */
-            "    ldr r2, xRBARConst                           \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "    ldr r2, =0xe000ed9c                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
             "    stmia r2!, {r4-r5}                           \n" /* Write first set of RBAR/RLAR registers. */
             "    movs r3, #5                                  \n" /* r3 = 5. */
             "    str r3, [r1]                                 \n" /* Program RNR = 5. */
             "    ldmia r0!, {r4-r5}                           \n" /* Read second set of RBAR/RLAR registers from TCB. */
-            "    ldr r2, xRBARConst                           \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "    ldr r2, =0xe000ed9c                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
             "    stmia r2!, {r4-r5}                           \n" /* Write second set of RBAR/RLAR registers. */
             "    movs r3, #6                                  \n" /* r3 = 6. */
             "    str r3, [r1]                                 \n" /* Program RNR = 6. */
             "    ldmia r0!, {r4-r5}                           \n" /* Read third set of RBAR/RLAR registers from TCB. */
-            "    ldr r2, xRBARConst                           \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "    ldr r2, =0xe000ed9c                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
             "    stmia r2!, {r4-r5}                           \n" /* Write third set of RBAR/RLAR registers. */
             "    movs r3, #7                                  \n" /* r3 = 6. */
             "    str r3, [r1]                                 \n" /* Program RNR = 7. */
             "    ldmia r0!, {r4-r5}                           \n" /* Read fourth set of RBAR/RLAR registers from TCB. */
-            "    ldr r2, xRBARConst                           \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "    ldr r2, =0xe000ed9c                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
             "    stmia r2!, {r4-r5}                           \n" /* Write fourth set of RBAR/RLAR registers. */
             "                                                 \n"
-            "    ldr r1, xMPUCTRLConst                        \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "    ldr r1, =0xe000ed94                          \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
             "    ldr r2, [r1]                                 \n" /* Read the value of MPU_CTRL. */
             "    movs r3, #1                                  \n" /* r3 = 1. */
             "    orrs r2, r3                                  \n" /* r2 = r2 | r3 i.e. Set the bit 0 in r2. */
@@ -372,7 +357,7 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
             "    dsb                                          \n" /* Force memory writes before continuing. */
             "                                                 \n"
             " restore_context:                                \n"
-            "    ldr r2, pxCurrentTCBConst                    \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "    ldr r2, =pxCurrentTCB                        \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
             "    ldr r0, [r2]                                 \n" /* r0 = pxCurrentTCB.*/
             "    ldr r1, [r0]                                 \n" /* r1 = Location of saved context in TCB. */
             "                                                 \n"
@@ -406,13 +391,6 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
             " restore_context_done:                           \n"
             "    str r1, [r0]                                 \n" /* Save the location where the context should be saved next as the first member of TCB. */
             "    bx lr                                        \n"
-            "                                                 \n"
-            " .align 4                                        \n"
-            " pxCurrentTCBConst: .word pxCurrentTCB           \n"
-            " xMPUCTRLConst: .word 0xe000ed94                 \n"
-            " xMAIR0Const: .word 0xe000edc0                   \n"
-            " xRNRConst: .word 0xe000ed98                     \n"
-            " xRBARConst: .word 0xe000ed9c                    \n"
         );
     }
 
@@ -425,7 +403,7 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
             "   .syntax unified                                 \n"
             "                                                   \n"
             "   mrs r0, psp                                     \n" /* Read PSP in r0. */
-            "   ldr r2, pxCurrentTCBConst                       \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "   ldr r2, =pxCurrentTCB                           \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
             "   ldr r1, [r2]                                    \n" /* Read pxCurrentTCB. */
             "   subs r0, r0, #40                                \n" /* Make space for PSPLIM, LR and the remaining registers on the stack. */
             "   str r0, [r1]                                    \n" /* Save the new top of stack in TCB. */
@@ -446,7 +424,7 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
             "   bl vTaskSwitchContext                           \n"
             "   cpsie i                                         \n"
             "                                                   \n"
-            "   ldr r2, pxCurrentTCBConst                       \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "   ldr r2, =pxCurrentTCB                           \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
             "   ldr r1, [r2]                                    \n" /* Read pxCurrentTCB. */
             "   ldr r0, [r1]                                    \n" /* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */
             "                                                   \n"
@@ -463,9 +441,6 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
                 "   msr psplim, r2                              \n" /* Restore the PSPLIM register value for the task. */
             #endif
             "   bx r3                                           \n"
-            "                                                   \n"
-            "   .align 4                                        \n"
-            "pxCurrentTCBConst: .word pxCurrentTCB              \n"
         );
     }
 
@@ -528,15 +503,12 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
             "   tst r0, r1                                      \n"
             "   beq stacking_used_msp                           \n"
             "   mrs r0, psp                                     \n"
-            "   ldr r2, svchandler_address_const                \n"
+            "   ldr r2, =vPortSVCHandler_C                      \n"
             "   bx r2                                           \n"
             " stacking_used_msp:                                \n"
             "   mrs r0, msp                                     \n"
-            "   ldr r2, svchandler_address_const                \n"
+            "   ldr r2, =vPortSVCHandler_C                      \n"
             "   bx r2                                           \n"
-            "                                                   \n"
-            "   .align 4                                        \n"
-            "svchandler_address_const: .word vPortSVCHandler_C  \n"
         );
     }
 

portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -50,6 +50,7 @@
  */
 #define portARCH_NAME                    "Cortex-M23"
 #define portHAS_ARMV8M_MAIN_EXTENSION    0
+#define portARMV8M_MINOR_VERSION         0
 #define portDONT_DISCARD                 __attribute__( ( used ) )
 /*-----------------------------------------------------------*/
 
@@ -60,6 +61,12 @@
 #if ( configTOTAL_MPU_REGIONS == 16 )
     #error 16 MPU regions are not yet supported for this port.
 #endif
+
+#ifndef configENABLE_MVE
+    #define configENABLE_MVE    0
+#elif ( configENABLE_MVE != 0 )
+    #error configENABLE_MVE must be left undefined, or defined to 0 for the Cortex-M23.
+#endif
 /*-----------------------------------------------------------*/
 
 /**

portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c

@@ -1,6 +1,8 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
+ * Copyright 2024 Arm Limited and/or its affiliates
+ * <open-source-office@arm.com>
  *
  * SPDX-License-Identifier: MIT
  *
@@ -52,57 +54,65 @@
             " .syntax unified                                 \n"
             "                                                 \n"
             " program_mpu_first_task:                         \n"
-            "    ldr r3, pxCurrentTCBConst2                   \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "    ldr r3, =pxCurrentTCB                        \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
             "    ldr r0, [r3]                                 \n" /* r0 = pxCurrentTCB. */
             "                                                 \n"
             "    dmb                                          \n" /* Complete outstanding transfers before disabling MPU. */
-            "    ldr r1, xMPUCTRLConst2                       \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "    ldr r1, =0xe000ed94                          \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
             "    ldr r2, [r1]                                 \n" /* Read the value of MPU_CTRL. */
             "    bic r2, #1                                   \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */
             "    str r2, [r1]                                 \n" /* Disable MPU. */
             "                                                 \n"
             "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
             "    ldr r1, [r0]                                 \n" /* r1 = *r0 i.e. r1 = MAIR0. */
-            "    ldr r2, xMAIR0Const2                         \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
+            "    ldr r2, =0xe000edc0                          \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
             "    str r1, [r2]                                 \n" /* Program MAIR0. */
             "                                                 \n"
             "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
-            "    ldr r1, xRNRConst2                           \n" /* r1 = 0xe000ed98 [Location of RNR]. */
-            "    ldr r2, xRBARConst2                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "    ldr r1, =0xe000ed98                          \n" /* r1 = 0xe000ed98 [Location of RNR]. */
+            "    ldr r2, =0xe000ed9c                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
             "                                                 \n"
             "    movs r3, #4                                  \n" /* r3 = 4. */
             "    str r3, [r1]                                 \n" /* Program RNR = 4. */
             "    ldmia r0!, {r4-r11}                          \n" /* Read 4 set of RBAR/RLAR registers from TCB. */
             "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
             "                                                 \n"
-            #if ( configTOTAL_MPU_REGIONS == 16 )
-                "    movs r3, #8                                  \n" /* r3 = 8. */
-                "    str r3, [r1]                                 \n" /* Program RNR = 8. */
-                "    ldmia r0!, {r4-r11}                          \n" /* Read 4 set of RBAR/RLAR registers from TCB. */
-                "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
-                "    movs r3, #12                                 \n" /* r3 = 12. */
-                "    str r3, [r1]                                 \n" /* Program RNR = 12. */
-                "    ldmia r0!, {r4-r11}                          \n" /* Read 4 set of RBAR/RLAR registers from TCB. */
-                "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
-            #endif /* configTOTAL_MPU_REGIONS == 16 */
+        #if ( configTOTAL_MPU_REGIONS == 16 )
+            "    movs r3, #8                                  \n" /* r3 = 8. */
+            "    str r3, [r1]                                 \n" /* Program RNR = 8. */
+            "    ldmia r0!, {r4-r11}                          \n" /* Read 4 set of RBAR/RLAR registers from TCB. */
+            "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
+            "    movs r3, #12                                 \n" /* r3 = 12. */
+            "    str r3, [r1]                                 \n" /* Program RNR = 12. */
+            "    ldmia r0!, {r4-r11}                          \n" /* Read 4 set of RBAR/RLAR registers from TCB. */
+            "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
+        #endif /* configTOTAL_MPU_REGIONS == 16 */
             "                                                 \n"
-            "    ldr r1, xMPUCTRLConst2                       \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "    ldr r1, =0xe000ed94                          \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
             "    ldr r2, [r1]                                 \n" /* Read the value of MPU_CTRL. */
             "    orr r2, #1                                   \n" /* r2 = r1 | 1 i.e. Set the bit 0 in r2. */
             "    str r2, [r1]                                 \n" /* Enable MPU. */
             "    dsb                                          \n" /* Force memory writes before continuing. */
             "                                                 \n"
             " restore_context_first_task:                     \n"
-            "    ldr r3, pxCurrentTCBConst2                   \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "    ldr r3, =pxCurrentTCB                        \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
             "    ldr r1, [r3]                                 \n" /* r1 = pxCurrentTCB.*/
             "    ldr r2, [r1]                                 \n" /* r2 = Location of saved context in TCB. */
             "                                                 \n"
             " restore_special_regs_first_task:                \n"
+        #if ( configENABLE_PAC == 1 )
+            "   ldmdb r2!, {r3-r6}                            \n" /* Read task's dedicated PAC key from the task's context. */
+            "   msr  PAC_KEY_P_0, r3                          \n" /* Write the task's dedicated PAC key to the PAC key registers. */
+            "   msr  PAC_KEY_P_1, r4                          \n"
+            "   msr  PAC_KEY_P_2, r5                          \n"
+            "   msr  PAC_KEY_P_3, r6                          \n"
+            "   clrm {r3-r6}                                  \n" /* Clear r3-r6. */
+        #endif /* configENABLE_PAC */
             "    ldmdb r2!, {r0, r3-r5, lr}                   \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */
             "    msr psp, r3                                  \n"
             "    msr psplim, r4                               \n"
             "    msr control, r5                              \n"
-            "    ldr r4, xSecureContextConst2                 \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
+            "    ldr r4, =xSecureContext                      \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
             "    str r0, [r4]                                 \n" /* Restore xSecureContext. */
             "                                                 \n"
             " restore_general_regs_first_task:                \n"
@@ -115,14 +125,6 @@
             "    mov r0, #0                                   \n"
             "    msr basepri, r0                              \n" /* Ensure that interrupts are enabled when the first task starts. */
             "    bx lr                                        \n"
-            "                                                 \n"
-            " .align 4                                        \n"
-            " pxCurrentTCBConst2: .word pxCurrentTCB          \n"
-            " xSecureContextConst2: .word xSecureContext      \n"
-            " xMPUCTRLConst2: .word 0xe000ed94                \n"
-            " xMAIR0Const2: .word 0xe000edc0                  \n"
-            " xRNRConst2: .word 0xe000ed98                    \n"
-            " xRBARConst2: .word 0xe000ed9c                   \n"
         );
     }
 
@@ -134,25 +136,32 @@
         (
             "   .syntax unified                                 \n"
             "                                                   \n"
-            "   ldr  r2, pxCurrentTCBConst2                     \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "   ldr  r2, =pxCurrentTCB                          \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
             "   ldr  r3, [r2]                                   \n" /* Read pxCurrentTCB. */
             "   ldr  r0, [r3]                                   \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
             "                                                   \n"
+        #if ( configENABLE_PAC == 1 )
+            "   ldmia r0!, {r1-r4}                              \n" /* Read task's dedicated PAC key from stack. */
+            "   msr  PAC_KEY_P_3, r1                            \n" /* Write the task's dedicated PAC key to the PAC key registers. */
+            "   msr  PAC_KEY_P_2, r2                            \n"
+            "   msr  PAC_KEY_P_1, r3                            \n"
+            "   msr  PAC_KEY_P_0, r4                            \n"
+            "   clrm {r1-r4}                                    \n" /* Clear r1-r4. */
+        #endif /* configENABLE_PAC */
+            "                                                   \n"
             "   ldm  r0!, {r1-r3}                               \n" /* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */
-            "   ldr  r4, xSecureContextConst2                   \n"
+            "   ldr  r4, =xSecureContext                        \n"
             "   str  r1, [r4]                                   \n" /* Set xSecureContext to this task's value for the same. */
             "   msr  psplim, r2                                 \n" /* Set this task's PSPLIM value. */
-            "   movs r1, #2                                     \n" /* r1 = 2. */
-            "   msr  CONTROL, r1                                \n" /* Switch to use PSP in the thread mode. */
+            "   mrs  r1, control                                \n" /* Obtain current control register value. */
+            "   orrs r1, r1, #2                                 \n" /* r1 = r1 | 0x2 - Set the second bit to use the program stack pointer (PSP). */
+            "   msr control, r1                                 \n" /* Write back the new control register value. */
             "   adds r0, #32                                    \n" /* Discard everything up to r0. */
             "   msr  psp, r0                                    \n" /* This is now the new top of stack to use in the task. */
             "   isb                                             \n"
             "   mov  r0, #0                                     \n"
             "   msr  basepri, r0                                \n" /* Ensure that interrupts are enabled when the first task starts. */
             "   bx   r3                                         \n" /* Finally, branch to EXC_RETURN. */
-            "   .align 4                                        \n"
-            "pxCurrentTCBConst2: .word pxCurrentTCB             \n"
-            "xSecureContextConst2: .word xSecureContext         \n"
         );
     }
 
@@ -171,8 +180,6 @@ BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
         "   movne r0, #0                                    \n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
         "   moveq r0, #1                                    \n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
         "   bx lr                                           \n" /* Return. */
-        "                                                   \n"
-        "   .align 4                                        \n"
         ::: "r0", "memory"
     );
 }
@@ -214,7 +221,7 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
     (
         "   .syntax unified                                 \n"
         "                                                   \n"
-        "   ldr r0, xVTORConst                              \n" /* Use the NVIC offset register to locate the stack. */
+        "   ldr r0, =0xe000ed08                             \n" /* Use the NVIC offset register to locate the stack. */
         "   ldr r0, [r0]                                    \n" /* Read the VTOR register which gives the address of vector table. */
         "   ldr r0, [r0]                                    \n" /* The first entry in vector table is stack pointer. */
         "   msr msp, r0                                     \n" /* Set the MSP back to the start of the stack. */
@@ -224,9 +231,6 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
         "   isb                                             \n"
         "   svc %0                                          \n" /* System call to start the first task. */
         "   nop                                             \n"
-        "                                                   \n"
-        "   .align 4                                        \n"
-        "xVTORConst: .word 0xe000ed08                       \n"
         ::"i" ( portSVC_START_SCHEDULER ) : "memory"
     );
 }
@@ -240,7 +244,7 @@ uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCT
         "                                                   \n"
         "   mrs r0, basepri                                 \n" /* r0 = basepri. Return original basepri value. */
         "   mov r1, %0                                      \n" /* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */
-        "   msr basepri, r1                                 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
+        "   msr basepri, r1                                 \n" /* Disable interrupts up to configMAX_SYSCALL_INTERRUPT_PRIORITY. */
         "   dsb                                             \n"
         "   isb                                             \n"
         "   bx lr                                           \n" /* Return. */
@@ -274,9 +278,9 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
             " .extern SecureContext_SaveContext               \n"
             " .extern SecureContext_LoadContext               \n"
             "                                                 \n"
-            " ldr r3, xSecureContextConst                     \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
+            " ldr r3, =xSecureContext                         \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
             " ldr r0, [r3]                                    \n" /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
-            " ldr r3, pxCurrentTCBConst                       \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            " ldr r3, =pxCurrentTCB                           \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
             " ldr r1, [r3]                                    \n" /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */
             " ldr r2, [r1]                                    \n" /* r2 = Location in TCB where the context should be saved. */
             "                                                 \n"
@@ -293,17 +297,15 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
             "                                                 \n"
             " save_general_regs:                              \n"
             "    mrs r3, psp                                  \n"
-            "                                                 \n"
-            #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
-                "    add r3, r3, #0x20                            \n" /* Move r3 to location where s0 is saved. */
-                "    tst lr, #0x10                                \n"
-                "    ittt eq                                      \n"
-                "    vstmiaeq r2!, {s16-s31}                      \n" /* Store s16-s31. */
-                "    vldmiaeq r3, {s0-s16}                        \n" /* Copy hardware saved FP context into s0-s16. */
-                "    vstmiaeq r2!, {s0-s16}                       \n" /* Store hardware saved FP context. */
-                "    sub r3, r3, #0x20                            \n" /* Set r3 back to the location of hardware saved context. */
-            #endif /* configENABLE_FPU || configENABLE_MVE */
-            "                                                 \n"
+        #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
+            "    add r3, r3, #0x20                            \n" /* Move r3 to location where s0 is saved. */
+            "    tst lr, #0x10                                \n"
+            "    ittt eq                                      \n"
+            "    vstmiaeq r2!, {s16-s31}                      \n" /* Store s16-s31. */
+            "    vldmiaeq r3, {s0-s16}                        \n" /* Copy hardware saved FP context into s0-s16. */
+            "    vstmiaeq r2!, {s0-s16}                       \n" /* Store hardware saved FP context. */
+            "    sub r3, r3, #0x20                            \n" /* Set r3 back to the location of hardware saved context. */
+        #endif /* configENABLE_FPU || configENABLE_MVE */
             "    stmia r2!, {r4-r11}                          \n" /* Store r4-r11. */
             "    ldmia r3, {r4-r11}                           \n" /* Copy the hardware saved context into r4-r11. */
             "    stmia r2!, {r4-r11}                          \n" /* Store the hardware saved context. */
@@ -313,11 +315,19 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
             "    mrs r4, psplim                               \n" /* r4 = PSPLIM. */
             "    mrs r5, control                              \n" /* r5 = CONTROL. */
             "    stmia r2!, {r0, r3-r5, lr}                   \n" /* Store xSecureContext, original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */
-            "    str r2, [r1]                                 \n" /* Save the location from where the context should be restored as the first member of TCB. */
+        #if ( configENABLE_PAC == 1 )
+            "   mrs  r3, PAC_KEY_P_0                          \n" /* Read task's dedicated PAC key from the PAC key registers. */
+            "   mrs  r4, PAC_KEY_P_1                          \n"
+            "   mrs  r5, PAC_KEY_P_2                          \n"
+            "   mrs  r6, PAC_KEY_P_3                          \n"
+            "   stmia r2!, {r3-r6}                            \n" /* Store the task's dedicated PAC key on the task's context. */
+            "   clrm {r3-r6}                                  \n" /* Clear r3-r6. */
+        #endif /* configENABLE_PAC */
+            "    str r2, [r1]                                 \n"      /* Save the location from where the context should be restored as the first member of TCB. */
             "                                                 \n"
             " select_next_task:                               \n"
             "    mov r0, %0                                   \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */
-            "    msr basepri, r0                              \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
+            "    msr basepri, r0                              \n" /* Disable interrupts up to configMAX_SYSCALL_INTERRUPT_PRIORITY. */
             "    dsb                                          \n"
             "    isb                                          \n"
             "    bl vTaskSwitchContext                        \n"
@@ -325,57 +335,65 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
             "    msr basepri, r0                              \n" /* Enable interrupts. */
             "                                                 \n"
             " program_mpu:                                    \n"
-            "    ldr r3, pxCurrentTCBConst                    \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "    ldr r3, =pxCurrentTCB                        \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
             "    ldr r0, [r3]                                 \n" /* r0 = pxCurrentTCB.*/
             "                                                 \n"
             "    dmb                                          \n" /* Complete outstanding transfers before disabling MPU. */
-            "    ldr r1, xMPUCTRLConst                        \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "    ldr r1, =0xe000ed94                          \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
             "    ldr r2, [r1]                                 \n" /* Read the value of MPU_CTRL. */
             "    bic r2, #1                                   \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */
             "    str r2, [r1]                                 \n" /* Disable MPU. */
             "                                                 \n"
             "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
             "    ldr r1, [r0]                                 \n" /* r1 = *r0 i.e. r1 = MAIR0. */
-            "    ldr r2, xMAIR0Const                          \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
+            "    ldr r2, =0xe000edc0                          \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
             "    str r1, [r2]                                 \n" /* Program MAIR0. */
             "                                                 \n"
             "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
-            "    ldr r1, xRNRConst                            \n" /* r1 = 0xe000ed98 [Location of RNR]. */
-            "    ldr r2, xRBARConst                           \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "    ldr r1, =0xe000ed98                          \n" /* r1 = 0xe000ed98 [Location of RNR]. */
+            "    ldr r2, =0xe000ed9c                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
             "                                                 \n"
             "    movs r3, #4                                  \n" /* r3 = 4. */
             "    str r3, [r1]                                 \n" /* Program RNR = 4. */
             "    ldmia r0!, {r4-r11}                          \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
             "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
             "                                                 \n"
-            #if ( configTOTAL_MPU_REGIONS == 16 )
-                "    movs r3, #8                                  \n" /* r3 = 8. */
-                "    str r3, [r1]                                 \n" /* Program RNR = 8. */
-                "    ldmia r0!, {r4-r11}                          \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
-                "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
-                "    movs r3, #12                                 \n" /* r3 = 12. */
-                "    str r3, [r1]                                 \n" /* Program RNR = 12. */
-                "    ldmia r0!, {r4-r11}                          \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
-                "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
-            #endif /* configTOTAL_MPU_REGIONS == 16 */
+        #if ( configTOTAL_MPU_REGIONS == 16 )
+            "    movs r3, #8                                  \n" /* r3 = 8. */
+            "    str r3, [r1]                                 \n" /* Program RNR = 8. */
+            "    ldmia r0!, {r4-r11}                          \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
+            "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
+            "    movs r3, #12                                 \n" /* r3 = 12. */
+            "    str r3, [r1]                                 \n" /* Program RNR = 12. */
+            "    ldmia r0!, {r4-r11}                          \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
+            "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
+        #endif /* configTOTAL_MPU_REGIONS == 16 */
             "                                                 \n"
-            "   ldr r1, xMPUCTRLConst                         \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "   ldr r1, =0xe000ed94                           \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
             "   ldr r2, [r1]                                  \n" /* Read the value of MPU_CTRL. */
             "   orr r2, #1                                    \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */
             "   str r2, [r1]                                  \n" /* Enable MPU. */
             "   dsb                                           \n" /* Force memory writes before continuing. */
             "                                                 \n"
             " restore_context:                                \n"
-            "    ldr r3, pxCurrentTCBConst                    \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "    ldr r3, =pxCurrentTCB                        \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
             "    ldr r1, [r3]                                 \n" /* r1 = pxCurrentTCB.*/
             "    ldr r2, [r1]                                 \n" /* r2 = Location of saved context in TCB. */
             "                                                 \n"
             " restore_special_regs:                           \n"
+        #if ( configENABLE_PAC == 1 )
+            "   ldmdb r2!, {r3-r6}                            \n" /* Read task's dedicated PAC key from the task's context. */
+            "   msr  PAC_KEY_P_0, r3                          \n" /* Write the task's dedicated PAC key to the PAC key registers. */
+            "   msr  PAC_KEY_P_1, r4                          \n"
+            "   msr  PAC_KEY_P_2, r5                          \n"
+            "   msr  PAC_KEY_P_3, r6                          \n"
+            "   clrm {r3-r6}                                  \n" /* Clear r3-r6. */
+        #endif /* configENABLE_PAC */
             "    ldmdb r2!, {r0, r3-r5, lr}                   \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */
             "    msr psp, r3                                  \n"
             "    msr psplim, r4                               \n"
             "    msr control, r5                              \n"
-            "    ldr r4, xSecureContextConst                  \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
+            "    ldr r4, =xSecureContext                      \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
             "    str r0, [r4]                                 \n" /* Restore xSecureContext. */
             "    cbz r0, restore_ns_context                   \n" /* No secure context to restore. */
             "                                                 \n"
@@ -393,25 +411,17 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
             "    ldmdb r2!, {r4-r11}                          \n" /* r4-r11 contain hardware saved context. */
             "    stmia r3!, {r4-r11}                          \n" /* Copy the hardware saved context on the task stack. */
             "    ldmdb r2!, {r4-r11}                          \n" /* r4-r11 restored. */
-            #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
-                "    tst lr, #0x10                                \n"
-                "    ittt eq                                      \n"
-                "    vldmdbeq r2!, {s0-s16}                       \n" /* s0-s16 contain hardware saved FP context. */
-                "    vstmiaeq r3!, {s0-s16}                       \n" /* Copy hardware saved FP context on the task stack. */
-                "    vldmdbeq r2!, {s16-s31}                      \n" /* Restore s16-s31. */
-            #endif /* configENABLE_FPU || configENABLE_MVE */
+        #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
+            "    tst lr, #0x10                                \n"
+            "    ittt eq                                      \n"
+            "    vldmdbeq r2!, {s0-s16}                       \n" /* s0-s16 contain hardware saved FP context. */
+            "    vstmiaeq r3!, {s0-s16}                       \n" /* Copy hardware saved FP context on the task stack. */
+            "    vldmdbeq r2!, {s16-s31}                      \n" /* Restore s16-s31. */
+        #endif /* configENABLE_FPU || configENABLE_MVE */
             "                                                 \n"
             " restore_context_done:                           \n"
             "    str r2, [r1]                                 \n" /* Save the location where the context should be saved next as the first member of TCB. */
             "    bx lr                                        \n"
-            "                                                 \n"
-            " .align 4                                        \n"
-            " pxCurrentTCBConst: .word pxCurrentTCB           \n"
-            " xSecureContextConst: .word xSecureContext       \n"
-            " xMPUCTRLConst: .word 0xe000ed94                 \n"
-            " xMAIR0Const: .word 0xe000edc0                   \n"
-            " xRNRConst: .word 0xe000ed98                     \n"
-            " xRBARConst: .word 0xe000ed9c                    \n"
             ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
         );
     }
@@ -422,93 +432,99 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
     {
         __asm volatile
         (
-            "   .syntax unified                                 \n"
-            "   .extern SecureContext_SaveContext               \n"
-            "   .extern SecureContext_LoadContext               \n"
-            "                                                   \n"
-            "   ldr r3, xSecureContextConst                     \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
-            "   ldr r0, [r3]                                    \n" /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
-            "   ldr r3, pxCurrentTCBConst                       \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-            "   ldr r1, [r3]                                    \n" /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */
-            "   mrs r2, psp                                     \n" /* Read PSP in r2. */
-            "                                                   \n"
-            "   cbz r0, save_ns_context                         \n" /* No secure context to save. */
-            "   push {r0-r2, r14}                               \n"
-            "   bl SecureContext_SaveContext                    \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
-            "   pop {r0-r3}                                     \n" /* LR is now in r3. */
-            "   mov lr, r3                                      \n" /* LR = r3. */
-            "   lsls r1, r3, #25                                \n" /* r1 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
-            "   bpl save_ns_context                             \n" /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
-            "                                                   \n"
-            "   ldr r3, pxCurrentTCBConst                       \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-            "   ldr r1, [r3]                                    \n" /* Read pxCurrentTCB.*/
-            "   subs r2, r2, #12                                \n" /* Make space for xSecureContext, PSPLIM and LR on the stack. */
-            "   str r2, [r1]                                    \n" /* Save the new top of stack in TCB. */
-            "   mrs r1, psplim                                  \n" /* r1 = PSPLIM. */
-            "   mov r3, lr                                      \n" /* r3 = LR/EXC_RETURN. */
-            "   stmia r2!, {r0, r1, r3}                         \n" /* Store xSecureContext, PSPLIM and LR on the stack. */
-            "   b select_next_task                              \n"
-            "                                                   \n"
-            " save_ns_context:                                  \n"
-            "   ldr r3, pxCurrentTCBConst                       \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-            "   ldr r1, [r3]                                    \n" /* Read pxCurrentTCB. */
-            #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
-                "   tst lr, #0x10                               \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */
-                "   it eq                                       \n"
-                "   vstmdbeq r2!, {s16-s31}                     \n" /* Store the additional FP context registers which are not saved automatically. */
-            #endif /* configENABLE_FPU || configENABLE_MVE */
-            "   subs r2, r2, #44                                \n" /* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */
-            "   str r2, [r1]                                    \n" /* Save the new top of stack in TCB. */
-            "   adds r2, r2, #12                                \n" /* r2 = r2 + 12. */
-            "   stm r2, {r4-r11}                                \n" /* Store the registers that are not saved automatically. */
-            "   mrs r1, psplim                                  \n" /* r1 = PSPLIM. */
-            "   mov r3, lr                                      \n" /* r3 = LR/EXC_RETURN. */
-            "   subs r2, r2, #12                                \n" /* r2 = r2 - 12. */
-            "   stmia r2!, {r0, r1, r3}                         \n" /* Store xSecureContext, PSPLIM and LR on the stack. */
-            "                                                   \n"
-            " select_next_task:                                 \n"
-            "   mov r0, %0                                      \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */
-            "   msr basepri, r0                                 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
-            "   dsb                                             \n"
-            "   isb                                             \n"
-            "   bl vTaskSwitchContext                           \n"
-            "   mov r0, #0                                      \n" /* r0 = 0. */
-            "   msr basepri, r0                                 \n" /* Enable interrupts. */
-            "                                                   \n"
-            "   ldr r3, pxCurrentTCBConst                       \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-            "   ldr r1, [r3]                                    \n" /* Read pxCurrentTCB. */
-            "   ldr r2, [r1]                                    \n" /* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */
-            "                                                   \n"
-            "   ldmia r2!, {r0, r1, r4}                         \n" /* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */
-            "   msr psplim, r1                                  \n" /* Restore the PSPLIM register value for the task. */
-            "   mov lr, r4                                      \n" /* LR = r4. */
-            "   ldr r3, xSecureContextConst                     \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
-            "   str r0, [r3]                                    \n" /* Restore the task's xSecureContext. */
-            "   cbz r0, restore_ns_context                      \n" /* If there is no secure context for the task, restore the non-secure context. */
-            "   ldr r3, pxCurrentTCBConst                       \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-            "   ldr r1, [r3]                                    \n" /* Read pxCurrentTCB. */
-            "   push {r2, r4}                                   \n"
-            "   bl SecureContext_LoadContext                    \n" /* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
-            "   pop {r2, r4}                                    \n"
-            "   mov lr, r4                                      \n" /* LR = r4. */
-            "   lsls r1, r4, #25                                \n" /* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
-            "   bpl restore_ns_context                          \n" /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
-            "   msr psp, r2                                     \n" /* Remember the new top of stack for the task. */
-            "   bx lr                                           \n"
-            "                                                   \n"
-            " restore_ns_context:                               \n"
-            "   ldmia r2!, {r4-r11}                             \n" /* Restore the registers that are not automatically restored. */
-            #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
-                "   tst lr, #0x10                               \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */
-                "   it eq                                       \n"
-                "   vldmiaeq r2!, {s16-s31}                     \n" /* Restore the additional FP context registers which are not restored automatically. */
-            #endif /* configENABLE_FPU || configENABLE_MVE */
-            "   msr psp, r2                                     \n" /* Remember the new top of stack for the task. */
-            "   bx lr                                           \n"
-            "                                                   \n"
-            "   .align 4                                        \n"
-            "pxCurrentTCBConst: .word pxCurrentTCB              \n"
-            "xSecureContextConst: .word xSecureContext          \n"
+            " .syntax unified                                 \n"
+            " .extern SecureContext_SaveContext               \n"
+            " .extern SecureContext_LoadContext               \n"
+            "                                                 \n"
+            " ldr r3, =xSecureContext                         \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
+            " ldr r0, [r3]                                    \n" /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
+            " ldr r3, =pxCurrentTCB                           \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            " ldr r1, [r3]                                    \n" /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */
+            " mrs r2, psp                                     \n" /* Read PSP in r2. */
+            "                                                 \n"
+            " cbz r0, save_ns_context                         \n" /* No secure context to save. */
+            " save_s_context:                                 \n"
+            "    push {r0-r2, lr}                             \n"
+            "    bl SecureContext_SaveContext                 \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
+            "    pop {r0-r2, lr}                              \n"
+            "                                                 \n"
+            " save_ns_context:                                \n"
+            "    mov r3, lr                                   \n" /* r3 = LR (EXC_RETURN). */
+            "    lsls r3, r3, #25                             \n" /* r3 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
+            "    bmi save_special_regs                        \n" /* If r3 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used. */
+            "                                                 \n"
+            " save_general_regs:                              \n"
+        #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
+            "    tst lr, #0x10                                \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */
+            "    it eq                                        \n"
+            "    vstmdbeq r2!, {s16-s31}                      \n" /* Store the additional FP context registers which are not saved automatically. */
+        #endif /* configENABLE_FPU || configENABLE_MVE */
+            "   stmdb r2!, {r4-r11}                           \n" /* Store the registers that are not saved automatically. */
+            "                                                 \n"
+            " save_special_regs:                              \n"
+            "    mrs r3, psplim                               \n" /* r3 = PSPLIM. */
+            "    stmdb r2!, {r0, r3, lr}                      \n" /* Store xSecureContext, PSPLIM and LR on the stack. */
+        #if ( configENABLE_PAC == 1 )
+            "    mrs  r3, PAC_KEY_P_3                         \n" /* Read task's dedicated PAC key from the PAC key registers. */
+            "    mrs  r4, PAC_KEY_P_2                         \n"
+            "    mrs  r5, PAC_KEY_P_1                         \n"
+            "    mrs  r6, PAC_KEY_P_0                         \n"
+            "    stmdb r2!, {r3-r6}                           \n" /* Store the task's dedicated PAC key on the stack. */
+            "    clrm {r3-r6}                                 \n" /* Clear r3-r6. */
+        #endif /* configENABLE_PAC */
+            "                                                 \n"
+            " str r2, [r1]                                    \n" /* Save the new top of stack in TCB. */
+            "                                                 \n"
+            " select_next_task:                               \n"
+            "    mov r0, %0                                   \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */
+            "    msr basepri, r0                              \n" /* Disable interrupts up to configMAX_SYSCALL_INTERRUPT_PRIORITY. */
+            "    dsb                                          \n"
+            "    isb                                          \n"
+            "    bl vTaskSwitchContext                        \n"
+            "    mov r0, #0                                   \n" /* r0 = 0. */
+            "    msr basepri, r0                              \n" /* Enable interrupts. */
+            "                                                 \n"
+            " restore_context:                                \n"
+            "    ldr r3, =pxCurrentTCB                        \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "    ldr r1, [r3]                                 \n" /* Read pxCurrentTCB. */
+            "    ldr r2, [r1]                                 \n" /* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */
+            "                                                 \n"
+            " restore_special_regs:                           \n"
+        #if ( configENABLE_PAC == 1 )
+            "    ldmia r2!, {r3-r6}                           \n" /* Read task's dedicated PAC key from stack. */
+            "    msr  PAC_KEY_P_3, r3                         \n" /* Write the task's dedicated PAC key to the PAC key registers. */
+            "    msr  PAC_KEY_P_2, r4                         \n"
+            "    msr  PAC_KEY_P_1, r5                         \n"
+            "    msr  PAC_KEY_P_0, r6                         \n"
+            "    clrm {r3-r6}                                 \n" /* Clear r3-r6. */
+        #endif /* configENABLE_PAC */
+            "    ldmia r2!, {r0, r3, lr}                      \n" /* Read from stack - r0 = xSecureContext, r3 = PSPLIM and LR restored. */
+            "    msr psplim, r3                               \n" /* Restore the PSPLIM register value for the task. */
+            "    ldr r3, =xSecureContext                      \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
+            "    str r0, [r3]                                 \n" /* Restore the task's xSecureContext. */
+            "    cbz r0, restore_ns_context                   \n" /* If there is no secure context for the task, restore the non-secure context. */
+            "                                                 \n"
+            " restore_s_context:                              \n"
+            "    push {r1-r3, lr}                             \n"
+            "    bl SecureContext_LoadContext                 \n" /* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
+            "    pop {r1-r3, lr}                              \n"
+            "                                                 \n"
+            " restore_ns_context:                             \n"
+            "    mov r0, lr                                   \n" /* r0 = LR (EXC_RETURN). */
+            "    lsls r0, r0, #25                             \n" /* r0 = r0 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
+            "    bmi restore_context_done                     \n" /* r0 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */
+            "                                                 \n"
+            " restore_general_regs:                           \n"
+            "    ldmia r2!, {r4-r11}                          \n" /* Restore the registers that are not automatically restored. */
+        #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
+            "   tst lr, #0x10                                 \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */
+            "   it eq                                         \n"
+            "   vldmiaeq r2!, {s16-s31}                       \n" /* Restore the additional FP context registers which are not restored automatically. */
+        #endif /* configENABLE_FPU || configENABLE_MVE */
+            "                                                 \n"
+            " restore_context_done:                           \n"
+            "    msr psp, r2                                  \n" /* Remember the new top of stack for the task. */
+            "    bx lr                                        \n"
             ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
         );
     }
@@ -566,11 +582,8 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
             "   ite eq                                          \n"
             "   mrseq r0, msp                                   \n"
             "   mrsne r0, psp                                   \n"
-            "   ldr r1, svchandler_address_const                \n"
+            "   ldr r1, =vPortSVCHandler_C                      \n"
             "   bx r1                                           \n"
-            "                                                   \n"
-            "   .align 4                                        \n"
-            "svchandler_address_const: .word vPortSVCHandler_C  \n"
         );
     }
 

portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -50,6 +50,7 @@
  */
 #define portARCH_NAME                    "Cortex-M33"
 #define portHAS_ARMV8M_MAIN_EXTENSION    1
+#define portARMV8M_MINOR_VERSION         0
 #define portDONT_DISCARD                 __attribute__( ( used ) )
 /*-----------------------------------------------------------*/
 
@@ -57,6 +58,13 @@
 #include "portmacrocommon.h"
 /*-----------------------------------------------------------*/
 
+#ifndef configENABLE_MVE
+    #define configENABLE_MVE    0
+#elif ( configENABLE_MVE != 0 )
+    #error configENABLE_MVE must be left undefined, or defined to 0 for the Cortex-M33.
+#endif
+/*-----------------------------------------------------------*/
+
 /**
  * @brief Critical section management.
  */

portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c

@@ -1,6 +1,8 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
+ * Copyright 2024 Arm Limited and/or its affiliates
+ * <open-source-office@arm.com>
  *
  * SPDX-License-Identifier: MIT
  *
@@ -52,52 +54,60 @@
             " .syntax unified                                 \n"
             "                                                 \n"
             " program_mpu_first_task:                         \n"
-            "    ldr r2, pxCurrentTCBConst2                   \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "    ldr r2, =pxCurrentTCB                        \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
             "    ldr r0, [r2]                                 \n" /* r0 = pxCurrentTCB. */
             "                                                 \n"
             "    dmb                                          \n" /* Complete outstanding transfers before disabling MPU. */
-            "    ldr r1, xMPUCTRLConst2                       \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "    ldr r1, =0xe000ed94                          \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
             "    ldr r2, [r1]                                 \n" /* Read the value of MPU_CTRL. */
             "    bic r2, #1                                   \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */
             "    str r2, [r1]                                 \n" /* Disable MPU. */
             "                                                 \n"
             "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
             "    ldr r1, [r0]                                 \n" /* r1 = *r0 i.e. r1 = MAIR0. */
-            "    ldr r2, xMAIR0Const2                         \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
+            "    ldr r2, =0xe000edc0                          \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
             "    str r1, [r2]                                 \n" /* Program MAIR0. */
             "                                                 \n"
             "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
-            "    ldr r1, xRNRConst2                           \n" /* r1 = 0xe000ed98 [Location of RNR]. */
-            "    ldr r2, xRBARConst2                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "    ldr r1, =0xe000ed98                          \n" /* r1 = 0xe000ed98 [Location of RNR]. */
+            "    ldr r2, =0xe000ed9c                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
             "                                                 \n"
             "    movs r3, #4                                  \n" /* r3 = 4. */
             "    str r3, [r1]                                 \n" /* Program RNR = 4. */
             "    ldmia r0!, {r4-r11}                          \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
             "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
             "                                                 \n"
-            #if ( configTOTAL_MPU_REGIONS == 16 )
-                "    movs r3, #8                                  \n" /* r3 = 8. */
-                "    str r3, [r1]                                 \n" /* Program RNR = 8. */
-                "    ldmia r0!, {r4-r11}                          \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
-                "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
-                "    movs r3, #12                                 \n" /* r3 = 12. */
-                "    str r3, [r1]                                 \n" /* Program RNR = 12. */
-                "    ldmia r0!, {r4-r11}                          \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
-                "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
-            #endif /* configTOTAL_MPU_REGIONS == 16 */
+        #if ( configTOTAL_MPU_REGIONS == 16 )
+            "    movs r3, #8                                  \n" /* r3 = 8. */
+            "    str r3, [r1]                                 \n" /* Program RNR = 8. */
+            "    ldmia r0!, {r4-r11}                          \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
+            "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
+            "    movs r3, #12                                 \n" /* r3 = 12. */
+            "    str r3, [r1]                                 \n" /* Program RNR = 12. */
+            "    ldmia r0!, {r4-r11}                          \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
+            "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
+        #endif /* configTOTAL_MPU_REGIONS == 16 */
             "                                                 \n"
-            "   ldr r1, xMPUCTRLConst2                        \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "   ldr r1, =0xe000ed94                           \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
             "   ldr r2, [r1]                                  \n" /* Read the value of MPU_CTRL. */
             "   orr r2, #1                                    \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */
             "   str r2, [r1]                                  \n" /* Enable MPU. */
             "   dsb                                           \n" /* Force memory writes before continuing. */
             "                                                 \n"
             " restore_context_first_task:                     \n"
-            "    ldr r2, pxCurrentTCBConst2                   \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "    ldr r2, =pxCurrentTCB                        \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
             "    ldr r0, [r2]                                 \n" /* r0 = pxCurrentTCB.*/
             "    ldr r1, [r0]                                 \n" /* r1 = Location of saved context in TCB. */
             "                                                 \n"
             " restore_special_regs_first_task:                \n"
+        #if ( configENABLE_PAC == 1 )
+            "   ldmdb r1!, {r2-r5}                            \n" /* Read task's dedicated PAC key from the task's context. */
+            "   msr  PAC_KEY_P_0, r2                          \n" /* Write the task's dedicated PAC key to the PAC key registers. */
+            "   msr  PAC_KEY_P_1, r3                          \n"
+            "   msr  PAC_KEY_P_2, r4                          \n"
+            "   msr  PAC_KEY_P_3, r5                          \n"
+            "   clrm {r2-r5}                                  \n" /* Clear r2-r5. */
+        #endif /* configENABLE_PAC */
             "    ldmdb r1!, {r2-r4, lr}                       \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */
             "    msr psp, r2                                  \n"
             "    msr psplim, r3                               \n"
@@ -113,13 +123,6 @@
             "    mov r0, #0                                   \n"
             "    msr basepri, r0                              \n" /* Ensure that interrupts are enabled when the first task starts. */
             "    bx lr                                        \n"
-            "                                                 \n"
-            " .align 4                                        \n"
-            " pxCurrentTCBConst2: .word pxCurrentTCB          \n"
-            " xMPUCTRLConst2: .word 0xe000ed94                \n"
-            " xMAIR0Const2: .word 0xe000edc0                  \n"
-            " xRNRConst2: .word 0xe000ed98                    \n"
-            " xRBARConst2: .word 0xe000ed9c                   \n"
         );
     }
 
@@ -131,23 +134,30 @@
         (
             "   .syntax unified                                 \n"
             "                                                   \n"
-            "   ldr  r2, pxCurrentTCBConst2                     \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "   ldr  r2, =pxCurrentTCB                          \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
             "   ldr  r1, [r2]                                   \n" /* Read pxCurrentTCB. */
             "   ldr  r0, [r1]                                   \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
             "                                                   \n"
+        #if ( configENABLE_PAC == 1 )
+            "   ldmia r0!, {r1-r4}                              \n" /* Read task's dedicated PAC key from stack. */
+            "   msr  PAC_KEY_P_3, r1                            \n" /* Write the task's dedicated PAC key to the PAC key registers. */
+            "   msr  PAC_KEY_P_2, r2                            \n"
+            "   msr  PAC_KEY_P_1, r3                            \n"
+            "   msr  PAC_KEY_P_0, r4                            \n"
+            "   clrm {r1-r4}                                    \n" /* Clear r1-r4. */
+        #endif /* configENABLE_PAC */
+            "                                                   \n"
             "   ldm  r0!, {r1-r2}                               \n" /* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */
             "   msr  psplim, r1                                 \n" /* Set this task's PSPLIM value. */
-            "   movs r1, #2                                     \n" /* r1 = 2. */
-            "   msr  CONTROL, r1                                \n" /* Switch to use PSP in the thread mode. */
+            "   mrs  r1, control                                \n" /* Obtain current control register value. */
+            "   orrs r1, r1, #2                                 \n" /* r1 = r1 | 0x2 - Set the second bit to use the program stack pointer (PSP). */
+            "   msr control, r1                                 \n" /* Write back the new control register value. */
             "   adds r0, #32                                    \n" /* Discard everything up to r0. */
             "   msr  psp, r0                                    \n" /* This is now the new top of stack to use in the task. */
             "   isb                                             \n"
             "   mov  r0, #0                                     \n"
             "   msr  basepri, r0                                \n" /* Ensure that interrupts are enabled when the first task starts. */
             "   bx   r2                                         \n" /* Finally, branch to EXC_RETURN. */
-            "                                                   \n"
-            "   .align 4                                        \n"
-            "pxCurrentTCBConst2: .word pxCurrentTCB             \n"
         );
     }
 
@@ -166,8 +176,6 @@ BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
         "   movne r0, #0                                    \n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
         "   moveq r0, #1                                    \n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
         "   bx lr                                           \n" /* Return. */
-        "                                                   \n"
-        "   .align 4                                        \n"
         ::: "r0", "memory"
     );
 }
@@ -209,7 +217,7 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
     (
         "   .syntax unified                                 \n"
         "                                                   \n"
-        "   ldr r0, xVTORConst                              \n" /* Use the NVIC offset register to locate the stack. */
+        "   ldr r0, =0xe000ed08                             \n" /* Use the NVIC offset register to locate the stack. */
         "   ldr r0, [r0]                                    \n" /* Read the VTOR register which gives the address of vector table. */
         "   ldr r0, [r0]                                    \n" /* The first entry in vector table is stack pointer. */
         "   msr msp, r0                                     \n" /* Set the MSP back to the start of the stack. */
@@ -219,9 +227,6 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
         "   isb                                             \n"
         "   svc %0                                          \n" /* System call to start the first task. */
         "   nop                                             \n"
-        "                                                   \n"
-        "   .align 4                                        \n"
-        "xVTORConst: .word 0xe000ed08                       \n"
         ::"i" ( portSVC_START_SCHEDULER ) : "memory"
     );
 }
@@ -235,7 +240,7 @@ uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCT
         "                                                   \n"
         "   mrs r0, basepri                                 \n" /* r0 = basepri. Return original basepri value. */
         "   mov r1, %0                                      \n" /* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */
-        "   msr basepri, r1                                 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
+        "   msr basepri, r1                                 \n" /* Disable interrupts up to configMAX_SYSCALL_INTERRUPT_PRIORITY. */
         "   dsb                                             \n"
         "   isb                                             \n"
         "   bx lr                                           \n" /* Return. */
@@ -267,22 +272,21 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
         (
             " .syntax unified                                 \n"
             "                                                 \n"
-            " ldr r2, pxCurrentTCBConst                       \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            " ldr r2, =pxCurrentTCB                           \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
             " ldr r0, [r2]                                    \n" /* r0 = pxCurrentTCB. */
             " ldr r1, [r0]                                    \n" /* r1 = Location in TCB where the context should be saved. */
             " mrs r2, psp                                     \n" /* r2 = PSP. */
             "                                                 \n"
             " save_general_regs:                              \n"
-            #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
-                "    add r2, r2, #0x20                            \n" /* Move r2 to location where s0 is saved. */
-                "    tst lr, #0x10                                \n"
-                "    ittt eq                                      \n"
-                "    vstmiaeq r1!, {s16-s31}                      \n" /* Store s16-s31. */
-                "    vldmiaeq r2, {s0-s16}                        \n" /* Copy hardware saved FP context into s0-s16. */
-                "    vstmiaeq r1!, {s0-s16}                       \n" /* Store hardware saved FP context. */
-                "    sub r2, r2, #0x20                            \n" /* Set r2 back to the location of hardware saved context. */
-            #endif /* configENABLE_FPU || configENABLE_MVE */
-            "                                                 \n"
+        #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
+            "    add r2, r2, #0x20                            \n" /* Move r2 to location where s0 is saved. */
+            "    tst lr, #0x10                                \n"
+            "    ittt eq                                      \n"
+            "    vstmiaeq r1!, {s16-s31}                      \n" /* Store s16-s31. */
+            "    vldmiaeq r2, {s0-s16}                        \n" /* Copy hardware saved FP context into s0-s16. */
+            "    vstmiaeq r1!, {s0-s16}                       \n" /* Store hardware saved FP context. */
+            "    sub r2, r2, #0x20                            \n" /* Set r2 back to the location of hardware saved context. */
+        #endif /* configENABLE_FPU || configENABLE_MVE */
             "    stmia r1!, {r4-r11}                          \n" /* Store r4-r11. */
             "    ldmia r2, {r4-r11}                           \n" /* Copy the hardware saved context into r4-r11. */
             "    stmia r1!, {r4-r11}                          \n" /* Store the hardware saved context. */
@@ -291,11 +295,19 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
             "    mrs r3, psplim                               \n" /* r3 = PSPLIM. */
             "    mrs r4, control                              \n" /* r4 = CONTROL. */
             "    stmia r1!, {r2-r4, lr}                       \n" /* Store original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */
+        #if ( configENABLE_PAC == 1 )
+            "   mrs  r2, PAC_KEY_P_0                          \n" /* Read task's dedicated PAC key from the PAC key registers. */
+            "   mrs  r3, PAC_KEY_P_1                          \n"
+            "   mrs  r4, PAC_KEY_P_2                          \n"
+            "   mrs  r5, PAC_KEY_P_3                          \n"
+            "   stmia r1!, {r2-r5}                            \n" /* Store the task's dedicated PAC key on the task's context. */
+            "   clrm {r2-r5}                                  \n" /* Clear r2-r5. */
+        #endif /* configENABLE_PAC */
             "    str r1, [r0]                                 \n" /* Save the location from where the context should be restored as the first member of TCB. */
             "                                                 \n"
             " select_next_task:                               \n"
             "    mov r0, %0                                   \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */
-            "    msr basepri, r0                              \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
+            "    msr basepri, r0                              \n" /* Disable interrupts up to configMAX_SYSCALL_INTERRUPT_PRIORITY. */
             "    dsb                                          \n"
             "    isb                                          \n"
             "    bl vTaskSwitchContext                        \n"
@@ -303,52 +315,60 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
             "    msr basepri, r0                              \n" /* Enable interrupts. */
             "                                                 \n"
             " program_mpu:                                    \n"
-            "    ldr r2, pxCurrentTCBConst                    \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "    ldr r2, =pxCurrentTCB                        \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
             "    ldr r0, [r2]                                 \n" /* r0 = pxCurrentTCB. */
             "                                                 \n"
             "    dmb                                          \n" /* Complete outstanding transfers before disabling MPU. */
-            "    ldr r1, xMPUCTRLConst                        \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "    ldr r1, =0xe000ed94                          \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
             "    ldr r2, [r1]                                 \n" /* Read the value of MPU_CTRL. */
             "    bic r2, #1                                   \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */
             "    str r2, [r1]                                 \n" /* Disable MPU. */
             "                                                 \n"
             "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
             "    ldr r1, [r0]                                 \n" /* r1 = *r0 i.e. r1 = MAIR0. */
-            "    ldr r2, xMAIR0Const                          \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
+            "    ldr r2, =0xe000edc0                          \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
             "    str r1, [r2]                                 \n" /* Program MAIR0. */
             "                                                 \n"
             "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
-            "    ldr r1, xRNRConst                            \n" /* r1 = 0xe000ed98 [Location of RNR]. */
-            "    ldr r2, xRBARConst                           \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "    ldr r1, =0xe000ed98                          \n" /* r1 = 0xe000ed98 [Location of RNR]. */
+            "    ldr r2, =0xe000ed9c                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
             "                                                 \n"
             "    movs r3, #4                                  \n" /* r3 = 4. */
             "    str r3, [r1]                                 \n" /* Program RNR = 4. */
             "    ldmia r0!, {r4-r11}                          \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
             "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
             "                                                 \n"
-            #if ( configTOTAL_MPU_REGIONS == 16 )
-                "    movs r3, #8                                  \n" /* r3 = 8. */
-                "    str r3, [r1]                                 \n" /* Program RNR = 8. */
-                "    ldmia r0!, {r4-r11}                          \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
-                "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
-                "    movs r3, #12                                 \n" /* r3 = 12. */
-                "    str r3, [r1]                                 \n" /* Program RNR = 12. */
-                "    ldmia r0!, {r4-r11}                          \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
-                "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
-            #endif /* configTOTAL_MPU_REGIONS == 16 */
+        #if ( configTOTAL_MPU_REGIONS == 16 )
+            "    movs r3, #8                                  \n" /* r3 = 8. */
+            "    str r3, [r1]                                 \n" /* Program RNR = 8. */
+            "    ldmia r0!, {r4-r11}                          \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
+            "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
+            "    movs r3, #12                                 \n" /* r3 = 12. */
+            "    str r3, [r1]                                 \n" /* Program RNR = 12. */
+            "    ldmia r0!, {r4-r11}                          \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
+            "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
+        #endif /* configTOTAL_MPU_REGIONS == 16 */
             "                                                 \n"
-            "   ldr r1, xMPUCTRLConst                         \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "   ldr r1, =0xe000ed94                           \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
             "   ldr r2, [r1]                                  \n" /* Read the value of MPU_CTRL. */
             "   orr r2, #1                                    \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */
             "   str r2, [r1]                                  \n" /* Enable MPU. */
             "   dsb                                           \n" /* Force memory writes before continuing. */
             "                                                 \n"
             " restore_context:                                \n"
-            "    ldr r2, pxCurrentTCBConst                    \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "    ldr r2, =pxCurrentTCB                        \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
             "    ldr r0, [r2]                                 \n" /* r0 = pxCurrentTCB.*/
             "    ldr r1, [r0]                                 \n" /* r1 = Location of saved context in TCB. */
             "                                                 \n"
             " restore_special_regs:                           \n"
+        #if ( configENABLE_PAC == 1 )
+            "   ldmdb r1!, {r2-r5}                            \n" /* Read task's dedicated PAC key from the task's context. */
+            "   msr  PAC_KEY_P_0, r2                          \n" /* Write the task's dedicated PAC key to the PAC key registers. */
+            "   msr  PAC_KEY_P_1, r3                          \n"
+            "   msr  PAC_KEY_P_2, r4                          \n"
+            "   msr  PAC_KEY_P_3, r5                          \n"
+            "   clrm {r2-r5}                                  \n" /* Clear r2-r5. */
+        #endif /* configENABLE_PAC */
             "    ldmdb r1!, {r2-r4, lr}                       \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */
             "    msr psp, r2                                  \n"
             "    msr psplim, r3                               \n"
@@ -358,24 +378,17 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
             "    ldmdb r1!, {r4-r11}                          \n" /* r4-r11 contain hardware saved context. */
             "    stmia r2!, {r4-r11}                          \n" /* Copy the hardware saved context on the task stack. */
             "    ldmdb r1!, {r4-r11}                          \n" /* r4-r11 restored. */
-            #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
-                "    tst lr, #0x10                                \n"
-                "    ittt eq                                      \n"
-                "    vldmdbeq r1!, {s0-s16}                       \n" /* s0-s16 contain hardware saved FP context. */
-                "    vstmiaeq r2!, {s0-s16}                       \n" /* Copy hardware saved FP context on the task stack. */
-                "    vldmdbeq r1!, {s16-s31}                      \n" /* Restore s16-s31. */
-            #endif /* configENABLE_FPU || configENABLE_MVE */
+        #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
+            "    tst lr, #0x10                                \n"
+            "    ittt eq                                      \n"
+            "    vldmdbeq r1!, {s0-s16}                       \n" /* s0-s16 contain hardware saved FP context. */
+            "    vstmiaeq r2!, {s0-s16}                       \n" /* Copy hardware saved FP context on the task stack. */
+            "    vldmdbeq r1!, {s16-s31}                      \n" /* Restore s16-s31. */
+        #endif /* configENABLE_FPU || configENABLE_MVE */
             "                                                 \n"
             " restore_context_done:                           \n"
             "    str r1, [r0]                                 \n" /* Save the location where the context should be saved next as the first member of TCB. */
             "    bx lr                                        \n"
-            "                                                 \n"
-            " .align 4                                        \n"
-            " pxCurrentTCBConst: .word pxCurrentTCB           \n"
-            " xMPUCTRLConst: .word 0xe000ed94                 \n"
-            " xMAIR0Const: .word 0xe000edc0                   \n"
-            " xRNRConst: .word 0xe000ed98                     \n"
-            " xRBARConst: .word 0xe000ed9c                    \n"
             ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
         );
     }
@@ -390,46 +403,61 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
             "                                                   \n"
             "   mrs r0, psp                                     \n" /* Read PSP in r0. */
             "                                                   \n"
-            #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
-                "   tst lr, #0x10                                   \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */
-                "   it eq                                           \n"
-                "   vstmdbeq r0!, {s16-s31}                         \n" /* Store the additional FP context registers which are not saved automatically. */
-            #endif /* configENABLE_FPU || configENABLE_MVE */
+        #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
+            "   tst lr, #0x10                                   \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */
+            "   it eq                                           \n"
+            "   vstmdbeq r0!, {s16-s31}                         \n" /* Store the additional FP context registers which are not saved automatically. */
+        #endif /* configENABLE_FPU || configENABLE_MVE */
             "                                                   \n"
             "   mrs r2, psplim                                  \n" /* r2 = PSPLIM. */
             "   mov r3, lr                                      \n" /* r3 = LR/EXC_RETURN. */
             "   stmdb r0!, {r2-r11}                             \n" /* Store on the stack - PSPLIM, LR and registers that are not automatically saved. */
             "                                                   \n"
-            "   ldr r2, pxCurrentTCBConst                       \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        #if ( configENABLE_PAC == 1 )
+            "   mrs  r1, PAC_KEY_P_3                            \n" /* Read task's dedicated PAC key from the PAC key registers. */
+            "   mrs  r2, PAC_KEY_P_2                            \n"
+            "   mrs  r3, PAC_KEY_P_1                            \n"
+            "   mrs  r4, PAC_KEY_P_0                            \n"
+            "   stmdb r0!, {r1-r4}                              \n" /* Store the task's dedicated PAC key on the stack. */
+            "   clrm {r1-r4}                                    \n" /* Clear r1-r4. */
+        #endif /* configENABLE_PAC */
+            "                                                   \n"
+            "   ldr r2, =pxCurrentTCB                           \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
             "   ldr r1, [r2]                                    \n" /* Read pxCurrentTCB. */
             "   str r0, [r1]                                    \n" /* Save the new top of stack in TCB. */
             "                                                   \n"
             "   mov r0, %0                                      \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */
-            "   msr basepri, r0                                 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
+            "   msr basepri, r0                                 \n" /* Disable interrupts up to configMAX_SYSCALL_INTERRUPT_PRIORITY. */
             "   dsb                                             \n"
             "   isb                                             \n"
             "   bl vTaskSwitchContext                           \n"
             "   mov r0, #0                                      \n" /* r0 = 0. */
             "   msr basepri, r0                                 \n" /* Enable interrupts. */
             "                                                   \n"
-            "   ldr r2, pxCurrentTCBConst                       \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "   ldr r2, =pxCurrentTCB                           \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
             "   ldr r1, [r2]                                    \n" /* Read pxCurrentTCB. */
             "   ldr r0, [r1]                                    \n" /* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */
             "                                                   \n"
+        #if ( configENABLE_PAC == 1 )
+            "   ldmia r0!, {r2-r5}                              \n" /* Read task's dedicated PAC key from stack. */
+            "   msr  PAC_KEY_P_3, r2                            \n" /* Write the task's dedicated PAC key to the PAC key registers. */
+            "   msr  PAC_KEY_P_2, r3                            \n"
+            "   msr  PAC_KEY_P_1, r4                            \n"
+            "   msr  PAC_KEY_P_0, r5                            \n"
+            "   clrm {r2-r5}                                    \n" /* Clear r2-r5. */
+        #endif /* configENABLE_PAC */
+            "                                                   \n"
             "   ldmia r0!, {r2-r11}                             \n" /* Read from stack - r2 = PSPLIM, r3 = LR and r4-r11 restored. */
             "                                                   \n"
-            #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
-                "   tst r3, #0x10                                   \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */
-                "   it eq                                           \n"
-                "   vldmiaeq r0!, {s16-s31}                         \n" /* Restore the additional FP context registers which are not restored automatically. */
-            #endif /* configENABLE_FPU || configENABLE_MVE */
+        #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
+            "   tst r3, #0x10                                   \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */
+            "   it eq                                           \n"
+            "   vldmiaeq r0!, {s16-s31}                         \n" /* Restore the additional FP context registers which are not restored automatically. */
+        #endif /* configENABLE_FPU || configENABLE_MVE */
             "                                                   \n"
             "   msr psplim, r2                                  \n" /* Restore the PSPLIM register value for the task. */
             "   msr psp, r0                                     \n" /* Remember the new top of stack for the task. */
             "   bx r3                                           \n"
-            "                                                   \n"
-            "   .align 4                                        \n"
-            "pxCurrentTCBConst: .word pxCurrentTCB              \n"
             ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
         );
     }
@@ -487,11 +515,8 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
             "   ite eq                                          \n"
             "   mrseq r0, msp                                   \n"
             "   mrsne r0, psp                                   \n"
-            "   ldr r1, svchandler_address_const                \n"
+            "   ldr r1, =vPortSVCHandler_C                      \n"
             "   bx r1                                           \n"
-            "                                                   \n"
-            "   .align 4                                        \n"
-            "svchandler_address_const: .word vPortSVCHandler_C  \n"
         );
     }
 

portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -50,6 +50,7 @@
  */
 #define portARCH_NAME                    "Cortex-M33"
 #define portHAS_ARMV8M_MAIN_EXTENSION    1
+#define portARMV8M_MINOR_VERSION         0
 #define portDONT_DISCARD                 __attribute__( ( used ) )
 /*-----------------------------------------------------------*/
 
@@ -57,6 +58,13 @@
 #include "portmacrocommon.h"
 /*-----------------------------------------------------------*/
 
+#ifndef configENABLE_MVE
+    #define configENABLE_MVE    0
+#elif ( configENABLE_MVE != 0 )
+    #error configENABLE_MVE must be left undefined, or defined to 0 for the Cortex-M33.
+#endif
+/*-----------------------------------------------------------*/
+
 /**
  * @brief Critical section management.
  */

portable/ARMv8M/non_secure/portable/GCC/ARM_CM35P/portmacro.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -50,6 +50,7 @@
  */
 #define portARCH_NAME                    "Cortex-M35P"
 #define portHAS_ARMV8M_MAIN_EXTENSION    1
+#define portARMV8M_MINOR_VERSION         0
 #define portDONT_DISCARD                 __attribute__( ( used ) )
 /*-----------------------------------------------------------*/
 
@@ -57,6 +58,13 @@
 #include "portmacrocommon.h"
 /*-----------------------------------------------------------*/
 
+#ifndef configENABLE_MVE
+    #define configENABLE_MVE    0
+#elif ( configENABLE_MVE != 0 )
+    #error configENABLE_MVE must be left undefined, or defined to 0 for the Cortex-M35.
+#endif
+/*-----------------------------------------------------------*/
+
 /**
  * @brief Critical section management.
  */

portable/ARMv8M/non_secure/portable/GCC/ARM_CM55/portmacro.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -55,6 +55,7 @@
  */
 #define portARCH_NAME                    "Cortex-M55"
 #define portHAS_ARMV8M_MAIN_EXTENSION    1
+#define portARMV8M_MINOR_VERSION         1
 #define portDONT_DISCARD                 __attribute__( ( used ) )
 /*-----------------------------------------------------------*/
 

portable/ARMv8M/non_secure/portable/GCC/ARM_CM85/portmacro.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -55,6 +55,7 @@
  */
 #define portARCH_NAME                    "Cortex-M85"
 #define portHAS_ARMV8M_MAIN_EXTENSION    1
+#define portARMV8M_MINOR_VERSION         1
 #define portDONT_DISCARD                 __attribute__( ( used ) )
 /*-----------------------------------------------------------*/
 

portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/mpu_wrappers_v2_asm.S

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -48,12 +48,11 @@ MPU_xTaskDelayUntil:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xTaskDelayUntil_Unpriv
     MPU_xTaskDelayUntil_Priv:
-        pop {r0, r1}
         b MPU_xTaskDelayUntilImpl
     MPU_xTaskDelayUntil_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xTaskDelayUntil
 /*-----------------------------------------------------------*/
 
@@ -63,12 +62,11 @@ MPU_xTaskAbortDelay:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xTaskAbortDelay_Unpriv
     MPU_xTaskAbortDelay_Priv:
-        pop {r0, r1}
         b MPU_xTaskAbortDelayImpl
     MPU_xTaskAbortDelay_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xTaskAbortDelay
 /*-----------------------------------------------------------*/
 
@@ -78,12 +76,11 @@ MPU_vTaskDelay:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_vTaskDelay_Unpriv
     MPU_vTaskDelay_Priv:
-        pop {r0, r1}
         b MPU_vTaskDelayImpl
     MPU_vTaskDelay_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_vTaskDelay
 /*-----------------------------------------------------------*/
 
@@ -93,12 +90,11 @@ MPU_uxTaskPriorityGet:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_uxTaskPriorityGet_Unpriv
     MPU_uxTaskPriorityGet_Priv:
-        pop {r0, r1}
         b MPU_uxTaskPriorityGetImpl
     MPU_uxTaskPriorityGet_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_uxTaskPriorityGet
 /*-----------------------------------------------------------*/
 
@@ -108,12 +104,11 @@ MPU_eTaskGetState:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_eTaskGetState_Unpriv
     MPU_eTaskGetState_Priv:
-        pop {r0, r1}
         b MPU_eTaskGetStateImpl
     MPU_eTaskGetState_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_eTaskGetState
 /*-----------------------------------------------------------*/
 
@@ -123,12 +118,11 @@ MPU_vTaskGetInfo:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_vTaskGetInfo_Unpriv
     MPU_vTaskGetInfo_Priv:
-        pop {r0, r1}
         b MPU_vTaskGetInfoImpl
     MPU_vTaskGetInfo_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_vTaskGetInfo
 /*-----------------------------------------------------------*/
 
@@ -138,12 +132,11 @@ MPU_xTaskGetIdleTaskHandle:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xTaskGetIdleTaskHandle_Unpriv
     MPU_xTaskGetIdleTaskHandle_Priv:
-        pop {r0, r1}
         b MPU_xTaskGetIdleTaskHandleImpl
     MPU_xTaskGetIdleTaskHandle_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xTaskGetIdleTaskHandle
 /*-----------------------------------------------------------*/
 
@@ -153,12 +146,11 @@ MPU_vTaskSuspend:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_vTaskSuspend_Unpriv
     MPU_vTaskSuspend_Priv:
-        pop {r0, r1}
         b MPU_vTaskSuspendImpl
     MPU_vTaskSuspend_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_vTaskSuspend
 /*-----------------------------------------------------------*/
 
@@ -168,12 +160,11 @@ MPU_vTaskResume:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_vTaskResume_Unpriv
     MPU_vTaskResume_Priv:
-        pop {r0, r1}
         b MPU_vTaskResumeImpl
     MPU_vTaskResume_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_vTaskResume
 /*-----------------------------------------------------------*/
 
@@ -183,12 +174,11 @@ MPU_xTaskGetTickCount:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xTaskGetTickCount_Unpriv
     MPU_xTaskGetTickCount_Priv:
-        pop {r0, r1}
         b MPU_xTaskGetTickCountImpl
     MPU_xTaskGetTickCount_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xTaskGetTickCount
 /*-----------------------------------------------------------*/
 
@@ -198,12 +188,11 @@ MPU_uxTaskGetNumberOfTasks:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_uxTaskGetNumberOfTasks_Unpriv
     MPU_uxTaskGetNumberOfTasks_Priv:
-        pop {r0, r1}
         b MPU_uxTaskGetNumberOfTasksImpl
     MPU_uxTaskGetNumberOfTasks_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_uxTaskGetNumberOfTasks
 /*-----------------------------------------------------------*/
 
@@ -213,12 +202,11 @@ MPU_ulTaskGetRunTimeCounter:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_ulTaskGetRunTimeCounter_Unpriv
     MPU_ulTaskGetRunTimeCounter_Priv:
-        pop {r0, r1}
         b MPU_ulTaskGetRunTimeCounterImpl
     MPU_ulTaskGetRunTimeCounter_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_ulTaskGetRunTimeCounter
 /*-----------------------------------------------------------*/
 
@@ -228,12 +216,11 @@ MPU_ulTaskGetRunTimePercent:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_ulTaskGetRunTimePercent_Unpriv
     MPU_ulTaskGetRunTimePercent_Priv:
-        pop {r0, r1}
         b MPU_ulTaskGetRunTimePercentImpl
     MPU_ulTaskGetRunTimePercent_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_ulTaskGetRunTimePercent
 /*-----------------------------------------------------------*/
 
@@ -243,12 +230,11 @@ MPU_ulTaskGetIdleRunTimePercent:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_ulTaskGetIdleRunTimePercent_Unpriv
     MPU_ulTaskGetIdleRunTimePercent_Priv:
-        pop {r0, r1}
         b MPU_ulTaskGetIdleRunTimePercentImpl
     MPU_ulTaskGetIdleRunTimePercent_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_ulTaskGetIdleRunTimePercent
 /*-----------------------------------------------------------*/
 
@@ -258,12 +244,11 @@ MPU_ulTaskGetIdleRunTimeCounter:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_ulTaskGetIdleRunTimeCounter_Unpriv
     MPU_ulTaskGetIdleRunTimeCounter_Priv:
-        pop {r0, r1}
         b MPU_ulTaskGetIdleRunTimeCounterImpl
     MPU_ulTaskGetIdleRunTimeCounter_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_ulTaskGetIdleRunTimeCounter
 /*-----------------------------------------------------------*/
 
@@ -273,12 +258,11 @@ MPU_vTaskSetApplicationTaskTag:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_vTaskSetApplicationTaskTag_Unpriv
     MPU_vTaskSetApplicationTaskTag_Priv:
-        pop {r0, r1}
         b MPU_vTaskSetApplicationTaskTagImpl
     MPU_vTaskSetApplicationTaskTag_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_vTaskSetApplicationTaskTag
 /*-----------------------------------------------------------*/
 
@@ -288,12 +272,11 @@ MPU_xTaskGetApplicationTaskTag:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xTaskGetApplicationTaskTag_Unpriv
     MPU_xTaskGetApplicationTaskTag_Priv:
-        pop {r0, r1}
         b MPU_xTaskGetApplicationTaskTagImpl
     MPU_xTaskGetApplicationTaskTag_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xTaskGetApplicationTaskTag
 /*-----------------------------------------------------------*/
 
@@ -303,12 +286,11 @@ MPU_vTaskSetThreadLocalStoragePointer:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_vTaskSetThreadLocalStoragePointer_Unpriv
     MPU_vTaskSetThreadLocalStoragePointer_Priv:
-        pop {r0, r1}
         b MPU_vTaskSetThreadLocalStoragePointerImpl
     MPU_vTaskSetThreadLocalStoragePointer_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_vTaskSetThreadLocalStoragePointer
 /*-----------------------------------------------------------*/
 
@@ -318,12 +300,11 @@ MPU_pvTaskGetThreadLocalStoragePointer:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_pvTaskGetThreadLocalStoragePointer_Unpriv
     MPU_pvTaskGetThreadLocalStoragePointer_Priv:
-        pop {r0, r1}
         b MPU_pvTaskGetThreadLocalStoragePointerImpl
     MPU_pvTaskGetThreadLocalStoragePointer_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer
 /*-----------------------------------------------------------*/
 
@@ -333,12 +314,11 @@ MPU_uxTaskGetSystemState:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_uxTaskGetSystemState_Unpriv
     MPU_uxTaskGetSystemState_Priv:
-        pop {r0, r1}
         b MPU_uxTaskGetSystemStateImpl
     MPU_uxTaskGetSystemState_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_uxTaskGetSystemState
 /*-----------------------------------------------------------*/
 
@@ -348,12 +328,11 @@ MPU_uxTaskGetStackHighWaterMark:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_uxTaskGetStackHighWaterMark_Unpriv
     MPU_uxTaskGetStackHighWaterMark_Priv:
-        pop {r0, r1}
         b MPU_uxTaskGetStackHighWaterMarkImpl
     MPU_uxTaskGetStackHighWaterMark_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark
 /*-----------------------------------------------------------*/
 
@@ -363,12 +342,11 @@ MPU_uxTaskGetStackHighWaterMark2:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_uxTaskGetStackHighWaterMark2_Unpriv
     MPU_uxTaskGetStackHighWaterMark2_Priv:
-        pop {r0, r1}
         b MPU_uxTaskGetStackHighWaterMark2Impl
     MPU_uxTaskGetStackHighWaterMark2_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark2
 /*-----------------------------------------------------------*/
 
@@ -378,12 +356,11 @@ MPU_xTaskGetCurrentTaskHandle:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xTaskGetCurrentTaskHandle_Unpriv
     MPU_xTaskGetCurrentTaskHandle_Priv:
-        pop {r0, r1}
         b MPU_xTaskGetCurrentTaskHandleImpl
     MPU_xTaskGetCurrentTaskHandle_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xTaskGetCurrentTaskHandle
 /*-----------------------------------------------------------*/
 
@@ -393,12 +370,11 @@ MPU_xTaskGetSchedulerState:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xTaskGetSchedulerState_Unpriv
     MPU_xTaskGetSchedulerState_Priv:
-        pop {r0, r1}
         b MPU_xTaskGetSchedulerStateImpl
     MPU_xTaskGetSchedulerState_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xTaskGetSchedulerState
 /*-----------------------------------------------------------*/
 
@@ -408,12 +384,11 @@ MPU_vTaskSetTimeOutState:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_vTaskSetTimeOutState_Unpriv
     MPU_vTaskSetTimeOutState_Priv:
-        pop {r0, r1}
         b MPU_vTaskSetTimeOutStateImpl
     MPU_vTaskSetTimeOutState_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_vTaskSetTimeOutState
 /*-----------------------------------------------------------*/
 
@@ -423,12 +398,11 @@ MPU_xTaskCheckForTimeOut:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xTaskCheckForTimeOut_Unpriv
     MPU_xTaskCheckForTimeOut_Priv:
-        pop {r0, r1}
         b MPU_xTaskCheckForTimeOutImpl
     MPU_xTaskCheckForTimeOut_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xTaskCheckForTimeOut
 /*-----------------------------------------------------------*/
 
@@ -438,12 +412,11 @@ MPU_xTaskGenericNotifyEntry:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xTaskGenericNotify_Unpriv
     MPU_xTaskGenericNotify_Priv:
-        pop {r0, r1}
         b MPU_xTaskGenericNotifyImpl
     MPU_xTaskGenericNotify_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xTaskGenericNotify
 /*-----------------------------------------------------------*/
 
@@ -453,12 +426,11 @@ MPU_xTaskGenericNotifyWaitEntry:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xTaskGenericNotifyWait_Unpriv
     MPU_xTaskGenericNotifyWait_Priv:
-        pop {r0, r1}
         b MPU_xTaskGenericNotifyWaitImpl
     MPU_xTaskGenericNotifyWait_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xTaskGenericNotifyWait
 /*-----------------------------------------------------------*/
 
@@ -468,12 +440,11 @@ MPU_ulTaskGenericNotifyTake:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_ulTaskGenericNotifyTake_Unpriv
     MPU_ulTaskGenericNotifyTake_Priv:
-        pop {r0, r1}
         b MPU_ulTaskGenericNotifyTakeImpl
     MPU_ulTaskGenericNotifyTake_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_ulTaskGenericNotifyTake
 /*-----------------------------------------------------------*/
 
@@ -483,12 +454,11 @@ MPU_xTaskGenericNotifyStateClear:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xTaskGenericNotifyStateClear_Unpriv
     MPU_xTaskGenericNotifyStateClear_Priv:
-        pop {r0, r1}
         b MPU_xTaskGenericNotifyStateClearImpl
     MPU_xTaskGenericNotifyStateClear_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xTaskGenericNotifyStateClear
 /*-----------------------------------------------------------*/
 
@@ -498,12 +468,11 @@ MPU_ulTaskGenericNotifyValueClear:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_ulTaskGenericNotifyValueClear_Unpriv
     MPU_ulTaskGenericNotifyValueClear_Priv:
-        pop {r0, r1}
         b MPU_ulTaskGenericNotifyValueClearImpl
     MPU_ulTaskGenericNotifyValueClear_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_ulTaskGenericNotifyValueClear
 /*-----------------------------------------------------------*/
 
@@ -513,12 +482,11 @@ MPU_xQueueGenericSend:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xQueueGenericSend_Unpriv
     MPU_xQueueGenericSend_Priv:
-        pop {r0, r1}
         b MPU_xQueueGenericSendImpl
     MPU_xQueueGenericSend_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xQueueGenericSend
 /*-----------------------------------------------------------*/
 
@@ -528,12 +496,11 @@ MPU_uxQueueMessagesWaiting:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_uxQueueMessagesWaiting_Unpriv
     MPU_uxQueueMessagesWaiting_Priv:
-        pop {r0, r1}
         b MPU_uxQueueMessagesWaitingImpl
     MPU_uxQueueMessagesWaiting_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_uxQueueMessagesWaiting
 /*-----------------------------------------------------------*/
 
@@ -543,12 +510,11 @@ MPU_uxQueueSpacesAvailable:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_uxQueueSpacesAvailable_Unpriv
     MPU_uxQueueSpacesAvailable_Priv:
-        pop {r0, r1}
         b MPU_uxQueueSpacesAvailableImpl
     MPU_uxQueueSpacesAvailable_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_uxQueueSpacesAvailable
 /*-----------------------------------------------------------*/
 
@@ -558,12 +524,11 @@ MPU_xQueueReceive:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xQueueReceive_Unpriv
     MPU_xQueueReceive_Priv:
-        pop {r0, r1}
         b MPU_xQueueReceiveImpl
     MPU_xQueueReceive_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xQueueReceive
 /*-----------------------------------------------------------*/
 
@@ -573,12 +538,11 @@ MPU_xQueuePeek:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xQueuePeek_Unpriv
     MPU_xQueuePeek_Priv:
-        pop {r0, r1}
         b MPU_xQueuePeekImpl
     MPU_xQueuePeek_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xQueuePeek
 /*-----------------------------------------------------------*/
 
@@ -588,12 +552,11 @@ MPU_xQueueSemaphoreTake:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xQueueSemaphoreTake_Unpriv
     MPU_xQueueSemaphoreTake_Priv:
-        pop {r0, r1}
         b MPU_xQueueSemaphoreTakeImpl
     MPU_xQueueSemaphoreTake_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xQueueSemaphoreTake
 /*-----------------------------------------------------------*/
 
@@ -603,12 +566,11 @@ MPU_xQueueGetMutexHolder:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xQueueGetMutexHolder_Unpriv
     MPU_xQueueGetMutexHolder_Priv:
-        pop {r0, r1}
         b MPU_xQueueGetMutexHolderImpl
     MPU_xQueueGetMutexHolder_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xQueueGetMutexHolder
 /*-----------------------------------------------------------*/
 
@@ -618,12 +580,11 @@ MPU_xQueueTakeMutexRecursive:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xQueueTakeMutexRecursive_Unpriv
     MPU_xQueueTakeMutexRecursive_Priv:
-        pop {r0, r1}
         b MPU_xQueueTakeMutexRecursiveImpl
     MPU_xQueueTakeMutexRecursive_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xQueueTakeMutexRecursive
 /*-----------------------------------------------------------*/
 
@@ -633,12 +594,11 @@ MPU_xQueueGiveMutexRecursive:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xQueueGiveMutexRecursive_Unpriv
     MPU_xQueueGiveMutexRecursive_Priv:
-        pop {r0, r1}
         b MPU_xQueueGiveMutexRecursiveImpl
     MPU_xQueueGiveMutexRecursive_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xQueueGiveMutexRecursive
 /*-----------------------------------------------------------*/
 
@@ -648,12 +608,11 @@ MPU_xQueueSelectFromSet:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xQueueSelectFromSet_Unpriv
     MPU_xQueueSelectFromSet_Priv:
-        pop {r0, r1}
         b MPU_xQueueSelectFromSetImpl
     MPU_xQueueSelectFromSet_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xQueueSelectFromSet
 /*-----------------------------------------------------------*/
 
@@ -663,12 +622,11 @@ MPU_xQueueAddToSet:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xQueueAddToSet_Unpriv
     MPU_xQueueAddToSet_Priv:
-        pop {r0, r1}
         b MPU_xQueueAddToSetImpl
     MPU_xQueueAddToSet_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xQueueAddToSet
 /*-----------------------------------------------------------*/
 
@@ -678,12 +636,11 @@ MPU_vQueueAddToRegistry:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_vQueueAddToRegistry_Unpriv
     MPU_vQueueAddToRegistry_Priv:
-        pop {r0, r1}
         b MPU_vQueueAddToRegistryImpl
     MPU_vQueueAddToRegistry_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_vQueueAddToRegistry
 /*-----------------------------------------------------------*/
 
@@ -693,12 +650,11 @@ MPU_vQueueUnregisterQueue:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_vQueueUnregisterQueue_Unpriv
     MPU_vQueueUnregisterQueue_Priv:
-        pop {r0, r1}
         b MPU_vQueueUnregisterQueueImpl
     MPU_vQueueUnregisterQueue_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_vQueueUnregisterQueue
 /*-----------------------------------------------------------*/
 
@@ -708,12 +664,11 @@ MPU_pcQueueGetName:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_pcQueueGetName_Unpriv
     MPU_pcQueueGetName_Priv:
-        pop {r0, r1}
         b MPU_pcQueueGetNameImpl
     MPU_pcQueueGetName_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_pcQueueGetName
 /*-----------------------------------------------------------*/
 
@@ -723,12 +678,11 @@ MPU_pvTimerGetTimerID:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_pvTimerGetTimerID_Unpriv
     MPU_pvTimerGetTimerID_Priv:
-        pop {r0, r1}
         b MPU_pvTimerGetTimerIDImpl
     MPU_pvTimerGetTimerID_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_pvTimerGetTimerID
 /*-----------------------------------------------------------*/
 
@@ -738,12 +692,11 @@ MPU_vTimerSetTimerID:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_vTimerSetTimerID_Unpriv
     MPU_vTimerSetTimerID_Priv:
-        pop {r0, r1}
         b MPU_vTimerSetTimerIDImpl
     MPU_vTimerSetTimerID_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_vTimerSetTimerID
 /*-----------------------------------------------------------*/
 
@@ -753,12 +706,11 @@ MPU_xTimerIsTimerActive:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xTimerIsTimerActive_Unpriv
     MPU_xTimerIsTimerActive_Priv:
-        pop {r0, r1}
         b MPU_xTimerIsTimerActiveImpl
     MPU_xTimerIsTimerActive_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xTimerIsTimerActive
 /*-----------------------------------------------------------*/
 
@@ -768,12 +720,11 @@ MPU_xTimerGetTimerDaemonTaskHandle:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xTimerGetTimerDaemonTaskHandle_Unpriv
     MPU_xTimerGetTimerDaemonTaskHandle_Priv:
-        pop {r0, r1}
         b MPU_xTimerGetTimerDaemonTaskHandleImpl
     MPU_xTimerGetTimerDaemonTaskHandle_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle
 /*-----------------------------------------------------------*/
 
@@ -783,12 +734,11 @@ MPU_xTimerGenericCommandFromTaskEntry:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xTimerGenericCommandFromTask_Unpriv
     MPU_xTimerGenericCommandFromTask_Priv:
-        pop {r0, r1}
         b MPU_xTimerGenericCommandFromTaskImpl
     MPU_xTimerGenericCommandFromTask_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xTimerGenericCommandFromTask
 /*-----------------------------------------------------------*/
 
@@ -798,12 +748,11 @@ MPU_pcTimerGetName:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_pcTimerGetName_Unpriv
     MPU_pcTimerGetName_Priv:
-        pop {r0, r1}
         b MPU_pcTimerGetNameImpl
     MPU_pcTimerGetName_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_pcTimerGetName
 /*-----------------------------------------------------------*/
 
@@ -813,12 +762,11 @@ MPU_vTimerSetReloadMode:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_vTimerSetReloadMode_Unpriv
     MPU_vTimerSetReloadMode_Priv:
-        pop {r0, r1}
         b MPU_vTimerSetReloadModeImpl
     MPU_vTimerSetReloadMode_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_vTimerSetReloadMode
 /*-----------------------------------------------------------*/
 
@@ -828,12 +776,11 @@ MPU_xTimerGetReloadMode:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xTimerGetReloadMode_Unpriv
     MPU_xTimerGetReloadMode_Priv:
-        pop {r0, r1}
         b MPU_xTimerGetReloadModeImpl
     MPU_xTimerGetReloadMode_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xTimerGetReloadMode
 /*-----------------------------------------------------------*/
 
@@ -843,12 +790,11 @@ MPU_uxTimerGetReloadMode:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_uxTimerGetReloadMode_Unpriv
     MPU_uxTimerGetReloadMode_Priv:
-        pop {r0, r1}
         b MPU_uxTimerGetReloadModeImpl
     MPU_uxTimerGetReloadMode_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_uxTimerGetReloadMode
 /*-----------------------------------------------------------*/
 
@@ -858,12 +804,11 @@ MPU_xTimerGetPeriod:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xTimerGetPeriod_Unpriv
     MPU_xTimerGetPeriod_Priv:
-        pop {r0, r1}
         b MPU_xTimerGetPeriodImpl
     MPU_xTimerGetPeriod_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xTimerGetPeriod
 /*-----------------------------------------------------------*/
 
@@ -873,12 +818,11 @@ MPU_xTimerGetExpiryTime:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xTimerGetExpiryTime_Unpriv
     MPU_xTimerGetExpiryTime_Priv:
-        pop {r0, r1}
         b MPU_xTimerGetExpiryTimeImpl
     MPU_xTimerGetExpiryTime_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xTimerGetExpiryTime
 /*-----------------------------------------------------------*/
 
@@ -888,12 +832,11 @@ MPU_xEventGroupWaitBitsEntry:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xEventGroupWaitBits_Unpriv
     MPU_xEventGroupWaitBits_Priv:
-        pop {r0, r1}
         b MPU_xEventGroupWaitBitsImpl
     MPU_xEventGroupWaitBits_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xEventGroupWaitBits
 /*-----------------------------------------------------------*/
 
@@ -903,12 +846,11 @@ MPU_xEventGroupClearBits:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xEventGroupClearBits_Unpriv
     MPU_xEventGroupClearBits_Priv:
-        pop {r0, r1}
         b MPU_xEventGroupClearBitsImpl
     MPU_xEventGroupClearBits_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xEventGroupClearBits
 /*-----------------------------------------------------------*/
 
@@ -918,12 +860,11 @@ MPU_xEventGroupSetBits:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xEventGroupSetBits_Unpriv
     MPU_xEventGroupSetBits_Priv:
-        pop {r0, r1}
         b MPU_xEventGroupSetBitsImpl
     MPU_xEventGroupSetBits_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xEventGroupSetBits
 /*-----------------------------------------------------------*/
 
@@ -933,12 +874,11 @@ MPU_xEventGroupSync:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xEventGroupSync_Unpriv
     MPU_xEventGroupSync_Priv:
-        pop {r0, r1}
         b MPU_xEventGroupSyncImpl
     MPU_xEventGroupSync_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xEventGroupSync
 /*-----------------------------------------------------------*/
 
@@ -948,12 +888,11 @@ MPU_uxEventGroupGetNumber:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_uxEventGroupGetNumber_Unpriv
     MPU_uxEventGroupGetNumber_Priv:
-        pop {r0, r1}
         b MPU_uxEventGroupGetNumberImpl
     MPU_uxEventGroupGetNumber_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_uxEventGroupGetNumber
 /*-----------------------------------------------------------*/
 
@@ -963,12 +902,11 @@ MPU_vEventGroupSetNumber:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_vEventGroupSetNumber_Unpriv
     MPU_vEventGroupSetNumber_Priv:
-        pop {r0, r1}
         b MPU_vEventGroupSetNumberImpl
     MPU_vEventGroupSetNumber_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_vEventGroupSetNumber
 /*-----------------------------------------------------------*/
 
@@ -978,12 +916,11 @@ MPU_xStreamBufferSend:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xStreamBufferSend_Unpriv
     MPU_xStreamBufferSend_Priv:
-        pop {r0, r1}
         b MPU_xStreamBufferSendImpl
     MPU_xStreamBufferSend_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xStreamBufferSend
 /*-----------------------------------------------------------*/
 
@@ -993,12 +930,11 @@ MPU_xStreamBufferReceive:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xStreamBufferReceive_Unpriv
     MPU_xStreamBufferReceive_Priv:
-        pop {r0, r1}
         b MPU_xStreamBufferReceiveImpl
     MPU_xStreamBufferReceive_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xStreamBufferReceive
 /*-----------------------------------------------------------*/
 
@@ -1008,12 +944,11 @@ MPU_xStreamBufferIsFull:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xStreamBufferIsFull_Unpriv
     MPU_xStreamBufferIsFull_Priv:
-        pop {r0, r1}
         b MPU_xStreamBufferIsFullImpl
     MPU_xStreamBufferIsFull_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xStreamBufferIsFull
 /*-----------------------------------------------------------*/
 
@@ -1023,12 +958,11 @@ MPU_xStreamBufferIsEmpty:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xStreamBufferIsEmpty_Unpriv
     MPU_xStreamBufferIsEmpty_Priv:
-        pop {r0, r1}
         b MPU_xStreamBufferIsEmptyImpl
     MPU_xStreamBufferIsEmpty_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xStreamBufferIsEmpty
 /*-----------------------------------------------------------*/
 
@@ -1038,12 +972,11 @@ MPU_xStreamBufferSpacesAvailable:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xStreamBufferSpacesAvailable_Unpriv
     MPU_xStreamBufferSpacesAvailable_Priv:
-        pop {r0, r1}
         b MPU_xStreamBufferSpacesAvailableImpl
     MPU_xStreamBufferSpacesAvailable_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xStreamBufferSpacesAvailable
 /*-----------------------------------------------------------*/
 
@@ -1053,12 +986,11 @@ MPU_xStreamBufferBytesAvailable:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xStreamBufferBytesAvailable_Unpriv
     MPU_xStreamBufferBytesAvailable_Priv:
-        pop {r0, r1}
         b MPU_xStreamBufferBytesAvailableImpl
     MPU_xStreamBufferBytesAvailable_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xStreamBufferBytesAvailable
 /*-----------------------------------------------------------*/
 
@@ -1068,12 +1000,11 @@ MPU_xStreamBufferSetTriggerLevel:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xStreamBufferSetTriggerLevel_Unpriv
     MPU_xStreamBufferSetTriggerLevel_Priv:
-        pop {r0, r1}
         b MPU_xStreamBufferSetTriggerLevelImpl
     MPU_xStreamBufferSetTriggerLevel_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xStreamBufferSetTriggerLevel
 /*-----------------------------------------------------------*/
 
@@ -1083,12 +1014,11 @@ MPU_xStreamBufferNextMessageLengthBytes:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xStreamBufferNextMessageLengthBytes_Unpriv
     MPU_xStreamBufferNextMessageLengthBytes_Priv:
-        pop {r0, r1}
         b MPU_xStreamBufferNextMessageLengthBytesImpl
     MPU_xStreamBufferNextMessageLengthBytes_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xStreamBufferNextMessageLengthBytes
 /*-----------------------------------------------------------*/
 

portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *

portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -50,6 +50,7 @@
  */
 #define portARCH_NAME                    "Cortex-M23"
 #define portHAS_ARMV8M_MAIN_EXTENSION    0
+#define portARMV8M_MINOR_VERSION         0
 #define portDONT_DISCARD                 __root
 /*-----------------------------------------------------------*/
 
@@ -60,6 +61,12 @@
 #if ( configTOTAL_MPU_REGIONS == 16 )
     #error 16 MPU regions are not yet supported for this port.
 #endif
+
+#ifndef configENABLE_MVE
+    #define configENABLE_MVE    0
+#elif ( configENABLE_MVE != 0 )
+    #error configENABLE_MVE must be left undefined, or defined to 0 for the Cortex-M23.
+#endif
 /*-----------------------------------------------------------*/
 
 /**

portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/mpu_wrappers_v2_asm.S

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -48,12 +48,11 @@ MPU_xTaskDelayUntil:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xTaskDelayUntil_Unpriv
     MPU_xTaskDelayUntil_Priv:
-        pop {r0, r1}
         b MPU_xTaskDelayUntilImpl
     MPU_xTaskDelayUntil_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xTaskDelayUntil
 /*-----------------------------------------------------------*/
 
@@ -63,12 +62,11 @@ MPU_xTaskAbortDelay:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xTaskAbortDelay_Unpriv
     MPU_xTaskAbortDelay_Priv:
-        pop {r0, r1}
         b MPU_xTaskAbortDelayImpl
     MPU_xTaskAbortDelay_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xTaskAbortDelay
 /*-----------------------------------------------------------*/
 
@@ -78,12 +76,11 @@ MPU_vTaskDelay:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_vTaskDelay_Unpriv
     MPU_vTaskDelay_Priv:
-        pop {r0, r1}
         b MPU_vTaskDelayImpl
     MPU_vTaskDelay_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_vTaskDelay
 /*-----------------------------------------------------------*/
 
@@ -93,12 +90,11 @@ MPU_uxTaskPriorityGet:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_uxTaskPriorityGet_Unpriv
     MPU_uxTaskPriorityGet_Priv:
-        pop {r0, r1}
         b MPU_uxTaskPriorityGetImpl
     MPU_uxTaskPriorityGet_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_uxTaskPriorityGet
 /*-----------------------------------------------------------*/
 
@@ -108,12 +104,11 @@ MPU_eTaskGetState:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_eTaskGetState_Unpriv
     MPU_eTaskGetState_Priv:
-        pop {r0, r1}
         b MPU_eTaskGetStateImpl
     MPU_eTaskGetState_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_eTaskGetState
 /*-----------------------------------------------------------*/
 
@@ -123,12 +118,11 @@ MPU_vTaskGetInfo:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_vTaskGetInfo_Unpriv
     MPU_vTaskGetInfo_Priv:
-        pop {r0, r1}
         b MPU_vTaskGetInfoImpl
     MPU_vTaskGetInfo_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_vTaskGetInfo
 /*-----------------------------------------------------------*/
 
@@ -138,12 +132,11 @@ MPU_xTaskGetIdleTaskHandle:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xTaskGetIdleTaskHandle_Unpriv
     MPU_xTaskGetIdleTaskHandle_Priv:
-        pop {r0, r1}
         b MPU_xTaskGetIdleTaskHandleImpl
     MPU_xTaskGetIdleTaskHandle_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xTaskGetIdleTaskHandle
 /*-----------------------------------------------------------*/
 
@@ -153,12 +146,11 @@ MPU_vTaskSuspend:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_vTaskSuspend_Unpriv
     MPU_vTaskSuspend_Priv:
-        pop {r0, r1}
         b MPU_vTaskSuspendImpl
     MPU_vTaskSuspend_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_vTaskSuspend
 /*-----------------------------------------------------------*/
 
@@ -168,12 +160,11 @@ MPU_vTaskResume:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_vTaskResume_Unpriv
     MPU_vTaskResume_Priv:
-        pop {r0, r1}
         b MPU_vTaskResumeImpl
     MPU_vTaskResume_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_vTaskResume
 /*-----------------------------------------------------------*/
 
@@ -183,12 +174,11 @@ MPU_xTaskGetTickCount:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xTaskGetTickCount_Unpriv
     MPU_xTaskGetTickCount_Priv:
-        pop {r0, r1}
         b MPU_xTaskGetTickCountImpl
     MPU_xTaskGetTickCount_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xTaskGetTickCount
 /*-----------------------------------------------------------*/
 
@@ -198,12 +188,11 @@ MPU_uxTaskGetNumberOfTasks:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_uxTaskGetNumberOfTasks_Unpriv
     MPU_uxTaskGetNumberOfTasks_Priv:
-        pop {r0, r1}
         b MPU_uxTaskGetNumberOfTasksImpl
     MPU_uxTaskGetNumberOfTasks_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_uxTaskGetNumberOfTasks
 /*-----------------------------------------------------------*/
 
@@ -213,12 +202,11 @@ MPU_ulTaskGetRunTimeCounter:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_ulTaskGetRunTimeCounter_Unpriv
     MPU_ulTaskGetRunTimeCounter_Priv:
-        pop {r0, r1}
         b MPU_ulTaskGetRunTimeCounterImpl
     MPU_ulTaskGetRunTimeCounter_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_ulTaskGetRunTimeCounter
 /*-----------------------------------------------------------*/
 
@@ -228,12 +216,11 @@ MPU_ulTaskGetRunTimePercent:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_ulTaskGetRunTimePercent_Unpriv
     MPU_ulTaskGetRunTimePercent_Priv:
-        pop {r0, r1}
         b MPU_ulTaskGetRunTimePercentImpl
     MPU_ulTaskGetRunTimePercent_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_ulTaskGetRunTimePercent
 /*-----------------------------------------------------------*/
 
@@ -243,12 +230,11 @@ MPU_ulTaskGetIdleRunTimePercent:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_ulTaskGetIdleRunTimePercent_Unpriv
     MPU_ulTaskGetIdleRunTimePercent_Priv:
-        pop {r0, r1}
         b MPU_ulTaskGetIdleRunTimePercentImpl
     MPU_ulTaskGetIdleRunTimePercent_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_ulTaskGetIdleRunTimePercent
 /*-----------------------------------------------------------*/
 
@@ -258,12 +244,11 @@ MPU_ulTaskGetIdleRunTimeCounter:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_ulTaskGetIdleRunTimeCounter_Unpriv
     MPU_ulTaskGetIdleRunTimeCounter_Priv:
-        pop {r0, r1}
         b MPU_ulTaskGetIdleRunTimeCounterImpl
     MPU_ulTaskGetIdleRunTimeCounter_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_ulTaskGetIdleRunTimeCounter
 /*-----------------------------------------------------------*/
 
@@ -273,12 +258,11 @@ MPU_vTaskSetApplicationTaskTag:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_vTaskSetApplicationTaskTag_Unpriv
     MPU_vTaskSetApplicationTaskTag_Priv:
-        pop {r0, r1}
         b MPU_vTaskSetApplicationTaskTagImpl
     MPU_vTaskSetApplicationTaskTag_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_vTaskSetApplicationTaskTag
 /*-----------------------------------------------------------*/
 
@@ -288,12 +272,11 @@ MPU_xTaskGetApplicationTaskTag:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xTaskGetApplicationTaskTag_Unpriv
     MPU_xTaskGetApplicationTaskTag_Priv:
-        pop {r0, r1}
         b MPU_xTaskGetApplicationTaskTagImpl
     MPU_xTaskGetApplicationTaskTag_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xTaskGetApplicationTaskTag
 /*-----------------------------------------------------------*/
 
@@ -303,12 +286,11 @@ MPU_vTaskSetThreadLocalStoragePointer:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_vTaskSetThreadLocalStoragePointer_Unpriv
     MPU_vTaskSetThreadLocalStoragePointer_Priv:
-        pop {r0, r1}
         b MPU_vTaskSetThreadLocalStoragePointerImpl
     MPU_vTaskSetThreadLocalStoragePointer_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_vTaskSetThreadLocalStoragePointer
 /*-----------------------------------------------------------*/
 
@@ -318,12 +300,11 @@ MPU_pvTaskGetThreadLocalStoragePointer:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_pvTaskGetThreadLocalStoragePointer_Unpriv
     MPU_pvTaskGetThreadLocalStoragePointer_Priv:
-        pop {r0, r1}
         b MPU_pvTaskGetThreadLocalStoragePointerImpl
     MPU_pvTaskGetThreadLocalStoragePointer_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer
 /*-----------------------------------------------------------*/
 
@@ -333,12 +314,11 @@ MPU_uxTaskGetSystemState:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_uxTaskGetSystemState_Unpriv
     MPU_uxTaskGetSystemState_Priv:
-        pop {r0, r1}
         b MPU_uxTaskGetSystemStateImpl
     MPU_uxTaskGetSystemState_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_uxTaskGetSystemState
 /*-----------------------------------------------------------*/
 
@@ -348,12 +328,11 @@ MPU_uxTaskGetStackHighWaterMark:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_uxTaskGetStackHighWaterMark_Unpriv
     MPU_uxTaskGetStackHighWaterMark_Priv:
-        pop {r0, r1}
         b MPU_uxTaskGetStackHighWaterMarkImpl
     MPU_uxTaskGetStackHighWaterMark_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark
 /*-----------------------------------------------------------*/
 
@@ -363,12 +342,11 @@ MPU_uxTaskGetStackHighWaterMark2:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_uxTaskGetStackHighWaterMark2_Unpriv
     MPU_uxTaskGetStackHighWaterMark2_Priv:
-        pop {r0, r1}
         b MPU_uxTaskGetStackHighWaterMark2Impl
     MPU_uxTaskGetStackHighWaterMark2_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark2
 /*-----------------------------------------------------------*/
 
@@ -378,12 +356,11 @@ MPU_xTaskGetCurrentTaskHandle:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xTaskGetCurrentTaskHandle_Unpriv
     MPU_xTaskGetCurrentTaskHandle_Priv:
-        pop {r0, r1}
         b MPU_xTaskGetCurrentTaskHandleImpl
     MPU_xTaskGetCurrentTaskHandle_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xTaskGetCurrentTaskHandle
 /*-----------------------------------------------------------*/
 
@@ -393,12 +370,11 @@ MPU_xTaskGetSchedulerState:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xTaskGetSchedulerState_Unpriv
     MPU_xTaskGetSchedulerState_Priv:
-        pop {r0, r1}
         b MPU_xTaskGetSchedulerStateImpl
     MPU_xTaskGetSchedulerState_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xTaskGetSchedulerState
 /*-----------------------------------------------------------*/
 
@@ -408,12 +384,11 @@ MPU_vTaskSetTimeOutState:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_vTaskSetTimeOutState_Unpriv
     MPU_vTaskSetTimeOutState_Priv:
-        pop {r0, r1}
         b MPU_vTaskSetTimeOutStateImpl
     MPU_vTaskSetTimeOutState_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_vTaskSetTimeOutState
 /*-----------------------------------------------------------*/
 
@@ -423,12 +398,11 @@ MPU_xTaskCheckForTimeOut:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xTaskCheckForTimeOut_Unpriv
     MPU_xTaskCheckForTimeOut_Priv:
-        pop {r0, r1}
         b MPU_xTaskCheckForTimeOutImpl
     MPU_xTaskCheckForTimeOut_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xTaskCheckForTimeOut
 /*-----------------------------------------------------------*/
 
@@ -438,12 +412,11 @@ MPU_xTaskGenericNotifyEntry:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xTaskGenericNotify_Unpriv
     MPU_xTaskGenericNotify_Priv:
-        pop {r0, r1}
         b MPU_xTaskGenericNotifyImpl
     MPU_xTaskGenericNotify_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xTaskGenericNotify
 /*-----------------------------------------------------------*/
 
@@ -453,12 +426,11 @@ MPU_xTaskGenericNotifyWaitEntry:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xTaskGenericNotifyWait_Unpriv
     MPU_xTaskGenericNotifyWait_Priv:
-        pop {r0, r1}
         b MPU_xTaskGenericNotifyWaitImpl
     MPU_xTaskGenericNotifyWait_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xTaskGenericNotifyWait
 /*-----------------------------------------------------------*/
 
@@ -468,12 +440,11 @@ MPU_ulTaskGenericNotifyTake:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_ulTaskGenericNotifyTake_Unpriv
     MPU_ulTaskGenericNotifyTake_Priv:
-        pop {r0, r1}
         b MPU_ulTaskGenericNotifyTakeImpl
     MPU_ulTaskGenericNotifyTake_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_ulTaskGenericNotifyTake
 /*-----------------------------------------------------------*/
 
@@ -483,12 +454,11 @@ MPU_xTaskGenericNotifyStateClear:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xTaskGenericNotifyStateClear_Unpriv
     MPU_xTaskGenericNotifyStateClear_Priv:
-        pop {r0, r1}
         b MPU_xTaskGenericNotifyStateClearImpl
     MPU_xTaskGenericNotifyStateClear_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xTaskGenericNotifyStateClear
 /*-----------------------------------------------------------*/
 
@@ -498,12 +468,11 @@ MPU_ulTaskGenericNotifyValueClear:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_ulTaskGenericNotifyValueClear_Unpriv
     MPU_ulTaskGenericNotifyValueClear_Priv:
-        pop {r0, r1}
         b MPU_ulTaskGenericNotifyValueClearImpl
     MPU_ulTaskGenericNotifyValueClear_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_ulTaskGenericNotifyValueClear
 /*-----------------------------------------------------------*/
 
@@ -513,12 +482,11 @@ MPU_xQueueGenericSend:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xQueueGenericSend_Unpriv
     MPU_xQueueGenericSend_Priv:
-        pop {r0, r1}
         b MPU_xQueueGenericSendImpl
     MPU_xQueueGenericSend_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xQueueGenericSend
 /*-----------------------------------------------------------*/
 
@@ -528,12 +496,11 @@ MPU_uxQueueMessagesWaiting:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_uxQueueMessagesWaiting_Unpriv
     MPU_uxQueueMessagesWaiting_Priv:
-        pop {r0, r1}
         b MPU_uxQueueMessagesWaitingImpl
     MPU_uxQueueMessagesWaiting_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_uxQueueMessagesWaiting
 /*-----------------------------------------------------------*/
 
@@ -543,12 +510,11 @@ MPU_uxQueueSpacesAvailable:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_uxQueueSpacesAvailable_Unpriv
     MPU_uxQueueSpacesAvailable_Priv:
-        pop {r0, r1}
         b MPU_uxQueueSpacesAvailableImpl
     MPU_uxQueueSpacesAvailable_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_uxQueueSpacesAvailable
 /*-----------------------------------------------------------*/
 
@@ -558,12 +524,11 @@ MPU_xQueueReceive:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xQueueReceive_Unpriv
     MPU_xQueueReceive_Priv:
-        pop {r0, r1}
         b MPU_xQueueReceiveImpl
     MPU_xQueueReceive_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xQueueReceive
 /*-----------------------------------------------------------*/
 
@@ -573,12 +538,11 @@ MPU_xQueuePeek:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xQueuePeek_Unpriv
     MPU_xQueuePeek_Priv:
-        pop {r0, r1}
         b MPU_xQueuePeekImpl
     MPU_xQueuePeek_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xQueuePeek
 /*-----------------------------------------------------------*/
 
@@ -588,12 +552,11 @@ MPU_xQueueSemaphoreTake:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xQueueSemaphoreTake_Unpriv
     MPU_xQueueSemaphoreTake_Priv:
-        pop {r0, r1}
         b MPU_xQueueSemaphoreTakeImpl
     MPU_xQueueSemaphoreTake_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xQueueSemaphoreTake
 /*-----------------------------------------------------------*/
 
@@ -603,12 +566,11 @@ MPU_xQueueGetMutexHolder:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xQueueGetMutexHolder_Unpriv
     MPU_xQueueGetMutexHolder_Priv:
-        pop {r0, r1}
         b MPU_xQueueGetMutexHolderImpl
     MPU_xQueueGetMutexHolder_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xQueueGetMutexHolder
 /*-----------------------------------------------------------*/
 
@@ -618,12 +580,11 @@ MPU_xQueueTakeMutexRecursive:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xQueueTakeMutexRecursive_Unpriv
     MPU_xQueueTakeMutexRecursive_Priv:
-        pop {r0, r1}
         b MPU_xQueueTakeMutexRecursiveImpl
     MPU_xQueueTakeMutexRecursive_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xQueueTakeMutexRecursive
 /*-----------------------------------------------------------*/
 
@@ -633,12 +594,11 @@ MPU_xQueueGiveMutexRecursive:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xQueueGiveMutexRecursive_Unpriv
     MPU_xQueueGiveMutexRecursive_Priv:
-        pop {r0, r1}
         b MPU_xQueueGiveMutexRecursiveImpl
     MPU_xQueueGiveMutexRecursive_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xQueueGiveMutexRecursive
 /*-----------------------------------------------------------*/
 
@@ -648,12 +608,11 @@ MPU_xQueueSelectFromSet:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xQueueSelectFromSet_Unpriv
     MPU_xQueueSelectFromSet_Priv:
-        pop {r0, r1}
         b MPU_xQueueSelectFromSetImpl
     MPU_xQueueSelectFromSet_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xQueueSelectFromSet
 /*-----------------------------------------------------------*/
 
@@ -663,12 +622,11 @@ MPU_xQueueAddToSet:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xQueueAddToSet_Unpriv
     MPU_xQueueAddToSet_Priv:
-        pop {r0, r1}
         b MPU_xQueueAddToSetImpl
     MPU_xQueueAddToSet_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xQueueAddToSet
 /*-----------------------------------------------------------*/
 
@@ -678,12 +636,11 @@ MPU_vQueueAddToRegistry:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_vQueueAddToRegistry_Unpriv
     MPU_vQueueAddToRegistry_Priv:
-        pop {r0, r1}
         b MPU_vQueueAddToRegistryImpl
     MPU_vQueueAddToRegistry_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_vQueueAddToRegistry
 /*-----------------------------------------------------------*/
 
@@ -693,12 +650,11 @@ MPU_vQueueUnregisterQueue:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_vQueueUnregisterQueue_Unpriv
     MPU_vQueueUnregisterQueue_Priv:
-        pop {r0, r1}
         b MPU_vQueueUnregisterQueueImpl
     MPU_vQueueUnregisterQueue_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_vQueueUnregisterQueue
 /*-----------------------------------------------------------*/
 
@@ -708,12 +664,11 @@ MPU_pcQueueGetName:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_pcQueueGetName_Unpriv
     MPU_pcQueueGetName_Priv:
-        pop {r0, r1}
         b MPU_pcQueueGetNameImpl
     MPU_pcQueueGetName_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_pcQueueGetName
 /*-----------------------------------------------------------*/
 
@@ -723,12 +678,11 @@ MPU_pvTimerGetTimerID:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_pvTimerGetTimerID_Unpriv
     MPU_pvTimerGetTimerID_Priv:
-        pop {r0, r1}
         b MPU_pvTimerGetTimerIDImpl
     MPU_pvTimerGetTimerID_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_pvTimerGetTimerID
 /*-----------------------------------------------------------*/
 
@@ -738,12 +692,11 @@ MPU_vTimerSetTimerID:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_vTimerSetTimerID_Unpriv
     MPU_vTimerSetTimerID_Priv:
-        pop {r0, r1}
         b MPU_vTimerSetTimerIDImpl
     MPU_vTimerSetTimerID_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_vTimerSetTimerID
 /*-----------------------------------------------------------*/
 
@@ -753,12 +706,11 @@ MPU_xTimerIsTimerActive:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xTimerIsTimerActive_Unpriv
     MPU_xTimerIsTimerActive_Priv:
-        pop {r0, r1}
         b MPU_xTimerIsTimerActiveImpl
     MPU_xTimerIsTimerActive_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xTimerIsTimerActive
 /*-----------------------------------------------------------*/
 
@@ -768,12 +720,11 @@ MPU_xTimerGetTimerDaemonTaskHandle:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xTimerGetTimerDaemonTaskHandle_Unpriv
     MPU_xTimerGetTimerDaemonTaskHandle_Priv:
-        pop {r0, r1}
         b MPU_xTimerGetTimerDaemonTaskHandleImpl
     MPU_xTimerGetTimerDaemonTaskHandle_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle
 /*-----------------------------------------------------------*/
 
@@ -783,12 +734,11 @@ MPU_xTimerGenericCommandFromTaskEntry:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xTimerGenericCommandFromTask_Unpriv
     MPU_xTimerGenericCommandFromTask_Priv:
-        pop {r0, r1}
         b MPU_xTimerGenericCommandFromTaskImpl
     MPU_xTimerGenericCommandFromTask_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xTimerGenericCommandFromTask
 /*-----------------------------------------------------------*/
 
@@ -798,12 +748,11 @@ MPU_pcTimerGetName:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_pcTimerGetName_Unpriv
     MPU_pcTimerGetName_Priv:
-        pop {r0, r1}
         b MPU_pcTimerGetNameImpl
     MPU_pcTimerGetName_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_pcTimerGetName
 /*-----------------------------------------------------------*/
 
@@ -813,12 +762,11 @@ MPU_vTimerSetReloadMode:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_vTimerSetReloadMode_Unpriv
     MPU_vTimerSetReloadMode_Priv:
-        pop {r0, r1}
         b MPU_vTimerSetReloadModeImpl
     MPU_vTimerSetReloadMode_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_vTimerSetReloadMode
 /*-----------------------------------------------------------*/
 
@@ -828,12 +776,11 @@ MPU_xTimerGetReloadMode:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xTimerGetReloadMode_Unpriv
     MPU_xTimerGetReloadMode_Priv:
-        pop {r0, r1}
         b MPU_xTimerGetReloadModeImpl
     MPU_xTimerGetReloadMode_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xTimerGetReloadMode
 /*-----------------------------------------------------------*/
 
@@ -843,12 +790,11 @@ MPU_uxTimerGetReloadMode:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_uxTimerGetReloadMode_Unpriv
     MPU_uxTimerGetReloadMode_Priv:
-        pop {r0, r1}
         b MPU_uxTimerGetReloadModeImpl
     MPU_uxTimerGetReloadMode_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_uxTimerGetReloadMode
 /*-----------------------------------------------------------*/
 
@@ -858,12 +804,11 @@ MPU_xTimerGetPeriod:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xTimerGetPeriod_Unpriv
     MPU_xTimerGetPeriod_Priv:
-        pop {r0, r1}
         b MPU_xTimerGetPeriodImpl
     MPU_xTimerGetPeriod_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xTimerGetPeriod
 /*-----------------------------------------------------------*/
 
@@ -873,12 +818,11 @@ MPU_xTimerGetExpiryTime:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xTimerGetExpiryTime_Unpriv
     MPU_xTimerGetExpiryTime_Priv:
-        pop {r0, r1}
         b MPU_xTimerGetExpiryTimeImpl
     MPU_xTimerGetExpiryTime_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xTimerGetExpiryTime
 /*-----------------------------------------------------------*/
 
@@ -888,12 +832,11 @@ MPU_xEventGroupWaitBitsEntry:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xEventGroupWaitBits_Unpriv
     MPU_xEventGroupWaitBits_Priv:
-        pop {r0, r1}
         b MPU_xEventGroupWaitBitsImpl
     MPU_xEventGroupWaitBits_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xEventGroupWaitBits
 /*-----------------------------------------------------------*/
 
@@ -903,12 +846,11 @@ MPU_xEventGroupClearBits:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xEventGroupClearBits_Unpriv
     MPU_xEventGroupClearBits_Priv:
-        pop {r0, r1}
         b MPU_xEventGroupClearBitsImpl
     MPU_xEventGroupClearBits_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xEventGroupClearBits
 /*-----------------------------------------------------------*/
 
@@ -918,12 +860,11 @@ MPU_xEventGroupSetBits:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xEventGroupSetBits_Unpriv
     MPU_xEventGroupSetBits_Priv:
-        pop {r0, r1}
         b MPU_xEventGroupSetBitsImpl
     MPU_xEventGroupSetBits_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xEventGroupSetBits
 /*-----------------------------------------------------------*/
 
@@ -933,12 +874,11 @@ MPU_xEventGroupSync:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xEventGroupSync_Unpriv
     MPU_xEventGroupSync_Priv:
-        pop {r0, r1}
         b MPU_xEventGroupSyncImpl
     MPU_xEventGroupSync_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xEventGroupSync
 /*-----------------------------------------------------------*/
 
@@ -948,12 +888,11 @@ MPU_uxEventGroupGetNumber:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_uxEventGroupGetNumber_Unpriv
     MPU_uxEventGroupGetNumber_Priv:
-        pop {r0, r1}
         b MPU_uxEventGroupGetNumberImpl
     MPU_uxEventGroupGetNumber_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_uxEventGroupGetNumber
 /*-----------------------------------------------------------*/
 
@@ -963,12 +902,11 @@ MPU_vEventGroupSetNumber:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_vEventGroupSetNumber_Unpriv
     MPU_vEventGroupSetNumber_Priv:
-        pop {r0, r1}
         b MPU_vEventGroupSetNumberImpl
     MPU_vEventGroupSetNumber_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_vEventGroupSetNumber
 /*-----------------------------------------------------------*/
 
@@ -978,12 +916,11 @@ MPU_xStreamBufferSend:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xStreamBufferSend_Unpriv
     MPU_xStreamBufferSend_Priv:
-        pop {r0, r1}
         b MPU_xStreamBufferSendImpl
     MPU_xStreamBufferSend_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xStreamBufferSend
 /*-----------------------------------------------------------*/
 
@@ -993,12 +930,11 @@ MPU_xStreamBufferReceive:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xStreamBufferReceive_Unpriv
     MPU_xStreamBufferReceive_Priv:
-        pop {r0, r1}
         b MPU_xStreamBufferReceiveImpl
     MPU_xStreamBufferReceive_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xStreamBufferReceive
 /*-----------------------------------------------------------*/
 
@@ -1008,12 +944,11 @@ MPU_xStreamBufferIsFull:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xStreamBufferIsFull_Unpriv
     MPU_xStreamBufferIsFull_Priv:
-        pop {r0, r1}
         b MPU_xStreamBufferIsFullImpl
     MPU_xStreamBufferIsFull_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xStreamBufferIsFull
 /*-----------------------------------------------------------*/
 
@@ -1023,12 +958,11 @@ MPU_xStreamBufferIsEmpty:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xStreamBufferIsEmpty_Unpriv
     MPU_xStreamBufferIsEmpty_Priv:
-        pop {r0, r1}
         b MPU_xStreamBufferIsEmptyImpl
     MPU_xStreamBufferIsEmpty_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xStreamBufferIsEmpty
 /*-----------------------------------------------------------*/
 
@@ -1038,12 +972,11 @@ MPU_xStreamBufferSpacesAvailable:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xStreamBufferSpacesAvailable_Unpriv
     MPU_xStreamBufferSpacesAvailable_Priv:
-        pop {r0, r1}
         b MPU_xStreamBufferSpacesAvailableImpl
     MPU_xStreamBufferSpacesAvailable_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xStreamBufferSpacesAvailable
 /*-----------------------------------------------------------*/
 
@@ -1053,12 +986,11 @@ MPU_xStreamBufferBytesAvailable:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xStreamBufferBytesAvailable_Unpriv
     MPU_xStreamBufferBytesAvailable_Priv:
-        pop {r0, r1}
         b MPU_xStreamBufferBytesAvailableImpl
     MPU_xStreamBufferBytesAvailable_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xStreamBufferBytesAvailable
 /*-----------------------------------------------------------*/
 
@@ -1068,12 +1000,11 @@ MPU_xStreamBufferSetTriggerLevel:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xStreamBufferSetTriggerLevel_Unpriv
     MPU_xStreamBufferSetTriggerLevel_Priv:
-        pop {r0, r1}
         b MPU_xStreamBufferSetTriggerLevelImpl
     MPU_xStreamBufferSetTriggerLevel_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xStreamBufferSetTriggerLevel
 /*-----------------------------------------------------------*/
 
@@ -1083,12 +1014,11 @@ MPU_xStreamBufferNextMessageLengthBytes:
     mrs r0, control
     movs r1, #1
     tst r0, r1
+    pop {r0, r1}
     bne MPU_xStreamBufferNextMessageLengthBytes_Unpriv
     MPU_xStreamBufferNextMessageLengthBytes_Priv:
-        pop {r0, r1}
         b MPU_xStreamBufferNextMessageLengthBytesImpl
     MPU_xStreamBufferNextMessageLengthBytes_Unpriv:
-        pop {r0, r1}
         svc #SYSTEM_CALL_xStreamBufferNextMessageLengthBytes
 /*-----------------------------------------------------------*/
 

portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *

portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -50,6 +50,7 @@
  */
 #define portARCH_NAME                    "Cortex-M23"
 #define portHAS_ARMV8M_MAIN_EXTENSION    0
+#define portARMV8M_MINOR_VERSION         0
 #define portDONT_DISCARD                 __root
 /*-----------------------------------------------------------*/
 
@@ -60,6 +61,12 @@
 #if ( configTOTAL_MPU_REGIONS == 16 )
     #error 16 MPU regions are not yet supported for this port.
 #endif
+
+#ifndef configENABLE_MVE
+    #define configENABLE_MVE    0
+#elif ( configENABLE_MVE != 0 )
+    #error configENABLE_MVE must be left undefined, or defined to 0 for the Cortex-M23.
+#endif
 /*-----------------------------------------------------------*/
 
 /**

portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/mpu_wrappers_v2_asm.S

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -47,12 +47,11 @@ MPU_xTaskDelayUntil:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xTaskDelayUntil_Unpriv
     MPU_xTaskDelayUntil_Priv:
-        pop {r0}
         b MPU_xTaskDelayUntilImpl
     MPU_xTaskDelayUntil_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xTaskDelayUntil
 /*-----------------------------------------------------------*/
 
@@ -61,12 +60,11 @@ MPU_xTaskAbortDelay:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xTaskAbortDelay_Unpriv
     MPU_xTaskAbortDelay_Priv:
-        pop {r0}
         b MPU_xTaskAbortDelayImpl
     MPU_xTaskAbortDelay_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xTaskAbortDelay
 /*-----------------------------------------------------------*/
 
@@ -75,12 +73,11 @@ MPU_vTaskDelay:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_vTaskDelay_Unpriv
     MPU_vTaskDelay_Priv:
-        pop {r0}
         b MPU_vTaskDelayImpl
     MPU_vTaskDelay_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_vTaskDelay
 /*-----------------------------------------------------------*/
 
@@ -89,12 +86,11 @@ MPU_uxTaskPriorityGet:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_uxTaskPriorityGet_Unpriv
     MPU_uxTaskPriorityGet_Priv:
-        pop {r0}
         b MPU_uxTaskPriorityGetImpl
     MPU_uxTaskPriorityGet_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_uxTaskPriorityGet
 /*-----------------------------------------------------------*/
 
@@ -103,12 +99,11 @@ MPU_eTaskGetState:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_eTaskGetState_Unpriv
     MPU_eTaskGetState_Priv:
-        pop {r0}
         b MPU_eTaskGetStateImpl
     MPU_eTaskGetState_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_eTaskGetState
 /*-----------------------------------------------------------*/
 
@@ -117,12 +112,11 @@ MPU_vTaskGetInfo:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_vTaskGetInfo_Unpriv
     MPU_vTaskGetInfo_Priv:
-        pop {r0}
         b MPU_vTaskGetInfoImpl
     MPU_vTaskGetInfo_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_vTaskGetInfo
 /*-----------------------------------------------------------*/
 
@@ -131,12 +125,11 @@ MPU_xTaskGetIdleTaskHandle:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xTaskGetIdleTaskHandle_Unpriv
     MPU_xTaskGetIdleTaskHandle_Priv:
-        pop {r0}
         b MPU_xTaskGetIdleTaskHandleImpl
     MPU_xTaskGetIdleTaskHandle_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xTaskGetIdleTaskHandle
 /*-----------------------------------------------------------*/
 
@@ -145,12 +138,11 @@ MPU_vTaskSuspend:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_vTaskSuspend_Unpriv
     MPU_vTaskSuspend_Priv:
-        pop {r0}
         b MPU_vTaskSuspendImpl
     MPU_vTaskSuspend_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_vTaskSuspend
 /*-----------------------------------------------------------*/
 
@@ -159,12 +151,11 @@ MPU_vTaskResume:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_vTaskResume_Unpriv
     MPU_vTaskResume_Priv:
-        pop {r0}
         b MPU_vTaskResumeImpl
     MPU_vTaskResume_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_vTaskResume
 /*-----------------------------------------------------------*/
 
@@ -173,12 +164,11 @@ MPU_xTaskGetTickCount:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xTaskGetTickCount_Unpriv
     MPU_xTaskGetTickCount_Priv:
-        pop {r0}
         b MPU_xTaskGetTickCountImpl
     MPU_xTaskGetTickCount_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xTaskGetTickCount
 /*-----------------------------------------------------------*/
 
@@ -187,12 +177,11 @@ MPU_uxTaskGetNumberOfTasks:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_uxTaskGetNumberOfTasks_Unpriv
     MPU_uxTaskGetNumberOfTasks_Priv:
-        pop {r0}
         b MPU_uxTaskGetNumberOfTasksImpl
     MPU_uxTaskGetNumberOfTasks_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_uxTaskGetNumberOfTasks
 /*-----------------------------------------------------------*/
 
@@ -201,12 +190,11 @@ MPU_ulTaskGetRunTimeCounter:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_ulTaskGetRunTimeCounter_Unpriv
     MPU_ulTaskGetRunTimeCounter_Priv:
-        pop {r0}
         b MPU_ulTaskGetRunTimeCounterImpl
     MPU_ulTaskGetRunTimeCounter_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_ulTaskGetRunTimeCounter
 /*-----------------------------------------------------------*/
 
@@ -215,12 +203,11 @@ MPU_ulTaskGetRunTimePercent:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_ulTaskGetRunTimePercent_Unpriv
     MPU_ulTaskGetRunTimePercent_Priv:
-        pop {r0}
         b MPU_ulTaskGetRunTimePercentImpl
     MPU_ulTaskGetRunTimePercent_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_ulTaskGetRunTimePercent
 /*-----------------------------------------------------------*/
 
@@ -229,12 +216,11 @@ MPU_ulTaskGetIdleRunTimePercent:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_ulTaskGetIdleRunTimePercent_Unpriv
     MPU_ulTaskGetIdleRunTimePercent_Priv:
-        pop {r0}
         b MPU_ulTaskGetIdleRunTimePercentImpl
     MPU_ulTaskGetIdleRunTimePercent_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_ulTaskGetIdleRunTimePercent
 /*-----------------------------------------------------------*/
 
@@ -243,12 +229,11 @@ MPU_ulTaskGetIdleRunTimeCounter:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_ulTaskGetIdleRunTimeCounter_Unpriv
     MPU_ulTaskGetIdleRunTimeCounter_Priv:
-        pop {r0}
         b MPU_ulTaskGetIdleRunTimeCounterImpl
     MPU_ulTaskGetIdleRunTimeCounter_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_ulTaskGetIdleRunTimeCounter
 /*-----------------------------------------------------------*/
 
@@ -257,12 +242,11 @@ MPU_vTaskSetApplicationTaskTag:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_vTaskSetApplicationTaskTag_Unpriv
     MPU_vTaskSetApplicationTaskTag_Priv:
-        pop {r0}
         b MPU_vTaskSetApplicationTaskTagImpl
     MPU_vTaskSetApplicationTaskTag_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_vTaskSetApplicationTaskTag
 /*-----------------------------------------------------------*/
 
@@ -271,12 +255,11 @@ MPU_xTaskGetApplicationTaskTag:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xTaskGetApplicationTaskTag_Unpriv
     MPU_xTaskGetApplicationTaskTag_Priv:
-        pop {r0}
         b MPU_xTaskGetApplicationTaskTagImpl
     MPU_xTaskGetApplicationTaskTag_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xTaskGetApplicationTaskTag
 /*-----------------------------------------------------------*/
 
@@ -285,12 +268,11 @@ MPU_vTaskSetThreadLocalStoragePointer:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_vTaskSetThreadLocalStoragePointer_Unpriv
     MPU_vTaskSetThreadLocalStoragePointer_Priv:
-        pop {r0}
         b MPU_vTaskSetThreadLocalStoragePointerImpl
     MPU_vTaskSetThreadLocalStoragePointer_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_vTaskSetThreadLocalStoragePointer
 /*-----------------------------------------------------------*/
 
@@ -299,12 +281,11 @@ MPU_pvTaskGetThreadLocalStoragePointer:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_pvTaskGetThreadLocalStoragePointer_Unpriv
     MPU_pvTaskGetThreadLocalStoragePointer_Priv:
-        pop {r0}
         b MPU_pvTaskGetThreadLocalStoragePointerImpl
     MPU_pvTaskGetThreadLocalStoragePointer_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer
 /*-----------------------------------------------------------*/
 
@@ -313,12 +294,11 @@ MPU_uxTaskGetSystemState:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_uxTaskGetSystemState_Unpriv
     MPU_uxTaskGetSystemState_Priv:
-        pop {r0}
         b MPU_uxTaskGetSystemStateImpl
     MPU_uxTaskGetSystemState_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_uxTaskGetSystemState
 /*-----------------------------------------------------------*/
 
@@ -327,12 +307,11 @@ MPU_uxTaskGetStackHighWaterMark:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_uxTaskGetStackHighWaterMark_Unpriv
     MPU_uxTaskGetStackHighWaterMark_Priv:
-        pop {r0}
         b MPU_uxTaskGetStackHighWaterMarkImpl
     MPU_uxTaskGetStackHighWaterMark_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark
 /*-----------------------------------------------------------*/
 
@@ -341,12 +320,11 @@ MPU_uxTaskGetStackHighWaterMark2:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_uxTaskGetStackHighWaterMark2_Unpriv
     MPU_uxTaskGetStackHighWaterMark2_Priv:
-        pop {r0}
         b MPU_uxTaskGetStackHighWaterMark2Impl
     MPU_uxTaskGetStackHighWaterMark2_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark2
 /*-----------------------------------------------------------*/
 
@@ -355,12 +333,11 @@ MPU_xTaskGetCurrentTaskHandle:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xTaskGetCurrentTaskHandle_Unpriv
     MPU_xTaskGetCurrentTaskHandle_Priv:
-        pop {r0}
         b MPU_xTaskGetCurrentTaskHandleImpl
     MPU_xTaskGetCurrentTaskHandle_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xTaskGetCurrentTaskHandle
 /*-----------------------------------------------------------*/
 
@@ -369,12 +346,11 @@ MPU_xTaskGetSchedulerState:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xTaskGetSchedulerState_Unpriv
     MPU_xTaskGetSchedulerState_Priv:
-        pop {r0}
         b MPU_xTaskGetSchedulerStateImpl
     MPU_xTaskGetSchedulerState_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xTaskGetSchedulerState
 /*-----------------------------------------------------------*/
 
@@ -383,12 +359,11 @@ MPU_vTaskSetTimeOutState:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_vTaskSetTimeOutState_Unpriv
     MPU_vTaskSetTimeOutState_Priv:
-        pop {r0}
         b MPU_vTaskSetTimeOutStateImpl
     MPU_vTaskSetTimeOutState_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_vTaskSetTimeOutState
 /*-----------------------------------------------------------*/
 
@@ -397,12 +372,11 @@ MPU_xTaskCheckForTimeOut:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xTaskCheckForTimeOut_Unpriv
     MPU_xTaskCheckForTimeOut_Priv:
-        pop {r0}
         b MPU_xTaskCheckForTimeOutImpl
     MPU_xTaskCheckForTimeOut_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xTaskCheckForTimeOut
 /*-----------------------------------------------------------*/
 
@@ -411,12 +385,11 @@ MPU_xTaskGenericNotifyEntry:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xTaskGenericNotify_Unpriv
     MPU_xTaskGenericNotify_Priv:
-        pop {r0}
         b MPU_xTaskGenericNotifyImpl
     MPU_xTaskGenericNotify_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xTaskGenericNotify
 /*-----------------------------------------------------------*/
 
@@ -425,12 +398,11 @@ MPU_xTaskGenericNotifyWaitEntry:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xTaskGenericNotifyWait_Unpriv
     MPU_xTaskGenericNotifyWait_Priv:
-        pop {r0}
         b MPU_xTaskGenericNotifyWaitImpl
     MPU_xTaskGenericNotifyWait_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xTaskGenericNotifyWait
 /*-----------------------------------------------------------*/
 
@@ -439,12 +411,11 @@ MPU_ulTaskGenericNotifyTake:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_ulTaskGenericNotifyTake_Unpriv
     MPU_ulTaskGenericNotifyTake_Priv:
-        pop {r0}
         b MPU_ulTaskGenericNotifyTakeImpl
     MPU_ulTaskGenericNotifyTake_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_ulTaskGenericNotifyTake
 /*-----------------------------------------------------------*/
 
@@ -453,12 +424,11 @@ MPU_xTaskGenericNotifyStateClear:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xTaskGenericNotifyStateClear_Unpriv
     MPU_xTaskGenericNotifyStateClear_Priv:
-        pop {r0}
         b MPU_xTaskGenericNotifyStateClearImpl
     MPU_xTaskGenericNotifyStateClear_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xTaskGenericNotifyStateClear
 /*-----------------------------------------------------------*/
 
@@ -467,12 +437,11 @@ MPU_ulTaskGenericNotifyValueClear:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_ulTaskGenericNotifyValueClear_Unpriv
     MPU_ulTaskGenericNotifyValueClear_Priv:
-        pop {r0}
         b MPU_ulTaskGenericNotifyValueClearImpl
     MPU_ulTaskGenericNotifyValueClear_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_ulTaskGenericNotifyValueClear
 /*-----------------------------------------------------------*/
 
@@ -481,12 +450,11 @@ MPU_xQueueGenericSend:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xQueueGenericSend_Unpriv
     MPU_xQueueGenericSend_Priv:
-        pop {r0}
         b MPU_xQueueGenericSendImpl
     MPU_xQueueGenericSend_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xQueueGenericSend
 /*-----------------------------------------------------------*/
 
@@ -495,12 +463,11 @@ MPU_uxQueueMessagesWaiting:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_uxQueueMessagesWaiting_Unpriv
     MPU_uxQueueMessagesWaiting_Priv:
-        pop {r0}
         b MPU_uxQueueMessagesWaitingImpl
     MPU_uxQueueMessagesWaiting_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_uxQueueMessagesWaiting
 /*-----------------------------------------------------------*/
 
@@ -509,12 +476,11 @@ MPU_uxQueueSpacesAvailable:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_uxQueueSpacesAvailable_Unpriv
     MPU_uxQueueSpacesAvailable_Priv:
-        pop {r0}
         b MPU_uxQueueSpacesAvailableImpl
     MPU_uxQueueSpacesAvailable_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_uxQueueSpacesAvailable
 /*-----------------------------------------------------------*/
 
@@ -523,12 +489,11 @@ MPU_xQueueReceive:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xQueueReceive_Unpriv
     MPU_xQueueReceive_Priv:
-        pop {r0}
         b MPU_xQueueReceiveImpl
     MPU_xQueueReceive_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xQueueReceive
 /*-----------------------------------------------------------*/
 
@@ -537,12 +502,11 @@ MPU_xQueuePeek:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xQueuePeek_Unpriv
     MPU_xQueuePeek_Priv:
-        pop {r0}
         b MPU_xQueuePeekImpl
     MPU_xQueuePeek_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xQueuePeek
 /*-----------------------------------------------------------*/
 
@@ -551,12 +515,11 @@ MPU_xQueueSemaphoreTake:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xQueueSemaphoreTake_Unpriv
     MPU_xQueueSemaphoreTake_Priv:
-        pop {r0}
         b MPU_xQueueSemaphoreTakeImpl
     MPU_xQueueSemaphoreTake_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xQueueSemaphoreTake
 /*-----------------------------------------------------------*/
 
@@ -565,12 +528,11 @@ MPU_xQueueGetMutexHolder:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xQueueGetMutexHolder_Unpriv
     MPU_xQueueGetMutexHolder_Priv:
-        pop {r0}
         b MPU_xQueueGetMutexHolderImpl
     MPU_xQueueGetMutexHolder_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xQueueGetMutexHolder
 /*-----------------------------------------------------------*/
 
@@ -579,12 +541,11 @@ MPU_xQueueTakeMutexRecursive:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xQueueTakeMutexRecursive_Unpriv
     MPU_xQueueTakeMutexRecursive_Priv:
-        pop {r0}
         b MPU_xQueueTakeMutexRecursiveImpl
     MPU_xQueueTakeMutexRecursive_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xQueueTakeMutexRecursive
 /*-----------------------------------------------------------*/
 
@@ -593,12 +554,11 @@ MPU_xQueueGiveMutexRecursive:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xQueueGiveMutexRecursive_Unpriv
     MPU_xQueueGiveMutexRecursive_Priv:
-        pop {r0}
         b MPU_xQueueGiveMutexRecursiveImpl
     MPU_xQueueGiveMutexRecursive_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xQueueGiveMutexRecursive
 /*-----------------------------------------------------------*/
 
@@ -607,12 +567,11 @@ MPU_xQueueSelectFromSet:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xQueueSelectFromSet_Unpriv
     MPU_xQueueSelectFromSet_Priv:
-        pop {r0}
         b MPU_xQueueSelectFromSetImpl
     MPU_xQueueSelectFromSet_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xQueueSelectFromSet
 /*-----------------------------------------------------------*/
 
@@ -621,12 +580,11 @@ MPU_xQueueAddToSet:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xQueueAddToSet_Unpriv
     MPU_xQueueAddToSet_Priv:
-        pop {r0}
         b MPU_xQueueAddToSetImpl
     MPU_xQueueAddToSet_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xQueueAddToSet
 /*-----------------------------------------------------------*/
 
@@ -635,12 +593,11 @@ MPU_vQueueAddToRegistry:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_vQueueAddToRegistry_Unpriv
     MPU_vQueueAddToRegistry_Priv:
-        pop {r0}
         b MPU_vQueueAddToRegistryImpl
     MPU_vQueueAddToRegistry_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_vQueueAddToRegistry
 /*-----------------------------------------------------------*/
 
@@ -649,12 +606,11 @@ MPU_vQueueUnregisterQueue:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_vQueueUnregisterQueue_Unpriv
     MPU_vQueueUnregisterQueue_Priv:
-        pop {r0}
         b MPU_vQueueUnregisterQueueImpl
     MPU_vQueueUnregisterQueue_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_vQueueUnregisterQueue
 /*-----------------------------------------------------------*/
 
@@ -663,12 +619,11 @@ MPU_pcQueueGetName:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_pcQueueGetName_Unpriv
     MPU_pcQueueGetName_Priv:
-        pop {r0}
         b MPU_pcQueueGetNameImpl
     MPU_pcQueueGetName_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_pcQueueGetName
 /*-----------------------------------------------------------*/
 
@@ -677,12 +632,11 @@ MPU_pvTimerGetTimerID:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_pvTimerGetTimerID_Unpriv
     MPU_pvTimerGetTimerID_Priv:
-        pop {r0}
         b MPU_pvTimerGetTimerIDImpl
     MPU_pvTimerGetTimerID_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_pvTimerGetTimerID
 /*-----------------------------------------------------------*/
 
@@ -691,12 +645,11 @@ MPU_vTimerSetTimerID:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_vTimerSetTimerID_Unpriv
     MPU_vTimerSetTimerID_Priv:
-        pop {r0}
         b MPU_vTimerSetTimerIDImpl
     MPU_vTimerSetTimerID_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_vTimerSetTimerID
 /*-----------------------------------------------------------*/
 
@@ -705,12 +658,11 @@ MPU_xTimerIsTimerActive:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xTimerIsTimerActive_Unpriv
     MPU_xTimerIsTimerActive_Priv:
-        pop {r0}
         b MPU_xTimerIsTimerActiveImpl
     MPU_xTimerIsTimerActive_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xTimerIsTimerActive
 /*-----------------------------------------------------------*/
 
@@ -719,12 +671,11 @@ MPU_xTimerGetTimerDaemonTaskHandle:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xTimerGetTimerDaemonTaskHandle_Unpriv
     MPU_xTimerGetTimerDaemonTaskHandle_Priv:
-        pop {r0}
         b MPU_xTimerGetTimerDaemonTaskHandleImpl
     MPU_xTimerGetTimerDaemonTaskHandle_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle
 /*-----------------------------------------------------------*/
 
@@ -733,12 +684,11 @@ MPU_xTimerGenericCommandFromTaskEntry:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xTimerGenericCommandFromTask_Unpriv
     MPU_xTimerGenericCommandFromTask_Priv:
-        pop {r0}
         b MPU_xTimerGenericCommandFromTaskImpl
     MPU_xTimerGenericCommandFromTask_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xTimerGenericCommandFromTask
 /*-----------------------------------------------------------*/
 
@@ -747,12 +697,11 @@ MPU_pcTimerGetName:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_pcTimerGetName_Unpriv
     MPU_pcTimerGetName_Priv:
-        pop {r0}
         b MPU_pcTimerGetNameImpl
     MPU_pcTimerGetName_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_pcTimerGetName
 /*-----------------------------------------------------------*/
 
@@ -761,12 +710,11 @@ MPU_vTimerSetReloadMode:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_vTimerSetReloadMode_Unpriv
     MPU_vTimerSetReloadMode_Priv:
-        pop {r0}
         b MPU_vTimerSetReloadModeImpl
     MPU_vTimerSetReloadMode_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_vTimerSetReloadMode
 /*-----------------------------------------------------------*/
 
@@ -775,12 +723,11 @@ MPU_xTimerGetReloadMode:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xTimerGetReloadMode_Unpriv
     MPU_xTimerGetReloadMode_Priv:
-        pop {r0}
         b MPU_xTimerGetReloadModeImpl
     MPU_xTimerGetReloadMode_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xTimerGetReloadMode
 /*-----------------------------------------------------------*/
 
@@ -789,12 +736,11 @@ MPU_uxTimerGetReloadMode:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_uxTimerGetReloadMode_Unpriv
     MPU_uxTimerGetReloadMode_Priv:
-        pop {r0}
         b MPU_uxTimerGetReloadModeImpl
     MPU_uxTimerGetReloadMode_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_uxTimerGetReloadMode
 /*-----------------------------------------------------------*/
 
@@ -803,12 +749,11 @@ MPU_xTimerGetPeriod:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xTimerGetPeriod_Unpriv
     MPU_xTimerGetPeriod_Priv:
-        pop {r0}
         b MPU_xTimerGetPeriodImpl
     MPU_xTimerGetPeriod_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xTimerGetPeriod
 /*-----------------------------------------------------------*/
 
@@ -817,12 +762,11 @@ MPU_xTimerGetExpiryTime:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xTimerGetExpiryTime_Unpriv
     MPU_xTimerGetExpiryTime_Priv:
-        pop {r0}
         b MPU_xTimerGetExpiryTimeImpl
     MPU_xTimerGetExpiryTime_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xTimerGetExpiryTime
 /*-----------------------------------------------------------*/
 
@@ -831,12 +775,11 @@ MPU_xEventGroupWaitBitsEntry:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xEventGroupWaitBits_Unpriv
     MPU_xEventGroupWaitBits_Priv:
-        pop {r0}
         b MPU_xEventGroupWaitBitsImpl
     MPU_xEventGroupWaitBits_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xEventGroupWaitBits
 /*-----------------------------------------------------------*/
 
@@ -845,12 +788,11 @@ MPU_xEventGroupClearBits:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xEventGroupClearBits_Unpriv
     MPU_xEventGroupClearBits_Priv:
-        pop {r0}
         b MPU_xEventGroupClearBitsImpl
     MPU_xEventGroupClearBits_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xEventGroupClearBits
 /*-----------------------------------------------------------*/
 
@@ -859,12 +801,11 @@ MPU_xEventGroupSetBits:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xEventGroupSetBits_Unpriv
     MPU_xEventGroupSetBits_Priv:
-        pop {r0}
         b MPU_xEventGroupSetBitsImpl
     MPU_xEventGroupSetBits_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xEventGroupSetBits
 /*-----------------------------------------------------------*/
 
@@ -873,12 +814,11 @@ MPU_xEventGroupSync:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xEventGroupSync_Unpriv
     MPU_xEventGroupSync_Priv:
-        pop {r0}
         b MPU_xEventGroupSyncImpl
     MPU_xEventGroupSync_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xEventGroupSync
 /*-----------------------------------------------------------*/
 
@@ -887,12 +827,11 @@ MPU_uxEventGroupGetNumber:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_uxEventGroupGetNumber_Unpriv
     MPU_uxEventGroupGetNumber_Priv:
-        pop {r0}
         b MPU_uxEventGroupGetNumberImpl
     MPU_uxEventGroupGetNumber_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_uxEventGroupGetNumber
 /*-----------------------------------------------------------*/
 
@@ -901,12 +840,11 @@ MPU_vEventGroupSetNumber:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_vEventGroupSetNumber_Unpriv
     MPU_vEventGroupSetNumber_Priv:
-        pop {r0}
         b MPU_vEventGroupSetNumberImpl
     MPU_vEventGroupSetNumber_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_vEventGroupSetNumber
 /*-----------------------------------------------------------*/
 
@@ -915,12 +853,11 @@ MPU_xStreamBufferSend:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xStreamBufferSend_Unpriv
     MPU_xStreamBufferSend_Priv:
-        pop {r0}
         b MPU_xStreamBufferSendImpl
     MPU_xStreamBufferSend_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xStreamBufferSend
 /*-----------------------------------------------------------*/
 
@@ -929,12 +866,11 @@ MPU_xStreamBufferReceive:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xStreamBufferReceive_Unpriv
     MPU_xStreamBufferReceive_Priv:
-        pop {r0}
         b MPU_xStreamBufferReceiveImpl
     MPU_xStreamBufferReceive_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xStreamBufferReceive
 /*-----------------------------------------------------------*/
 
@@ -943,12 +879,11 @@ MPU_xStreamBufferIsFull:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xStreamBufferIsFull_Unpriv
     MPU_xStreamBufferIsFull_Priv:
-        pop {r0}
         b MPU_xStreamBufferIsFullImpl
     MPU_xStreamBufferIsFull_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xStreamBufferIsFull
 /*-----------------------------------------------------------*/
 
@@ -957,12 +892,11 @@ MPU_xStreamBufferIsEmpty:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xStreamBufferIsEmpty_Unpriv
     MPU_xStreamBufferIsEmpty_Priv:
-        pop {r0}
         b MPU_xStreamBufferIsEmptyImpl
     MPU_xStreamBufferIsEmpty_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xStreamBufferIsEmpty
 /*-----------------------------------------------------------*/
 
@@ -971,12 +905,11 @@ MPU_xStreamBufferSpacesAvailable:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xStreamBufferSpacesAvailable_Unpriv
     MPU_xStreamBufferSpacesAvailable_Priv:
-        pop {r0}
         b MPU_xStreamBufferSpacesAvailableImpl
     MPU_xStreamBufferSpacesAvailable_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xStreamBufferSpacesAvailable
 /*-----------------------------------------------------------*/
 
@@ -985,12 +918,11 @@ MPU_xStreamBufferBytesAvailable:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xStreamBufferBytesAvailable_Unpriv
     MPU_xStreamBufferBytesAvailable_Priv:
-        pop {r0}
         b MPU_xStreamBufferBytesAvailableImpl
     MPU_xStreamBufferBytesAvailable_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xStreamBufferBytesAvailable
 /*-----------------------------------------------------------*/
 
@@ -999,12 +931,11 @@ MPU_xStreamBufferSetTriggerLevel:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xStreamBufferSetTriggerLevel_Unpriv
     MPU_xStreamBufferSetTriggerLevel_Priv:
-        pop {r0}
         b MPU_xStreamBufferSetTriggerLevelImpl
     MPU_xStreamBufferSetTriggerLevel_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xStreamBufferSetTriggerLevel
 /*-----------------------------------------------------------*/
 
@@ -1013,12 +944,11 @@ MPU_xStreamBufferNextMessageLengthBytes:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xStreamBufferNextMessageLengthBytes_Unpriv
     MPU_xStreamBufferNextMessageLengthBytes_Priv:
-        pop {r0}
         b MPU_xStreamBufferNextMessageLengthBytesImpl
     MPU_xStreamBufferNextMessageLengthBytes_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xStreamBufferNextMessageLengthBytes
 /*-----------------------------------------------------------*/
 

portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s

@@ -1,6 +1,8 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
+ * Copyright 2024 Arm Limited and/or its affiliates
+ * <open-source-office@arm.com>
  *
  * SPDX-License-Identifier: MIT
  *
@@ -150,6 +152,14 @@ vRestoreContextOfFirstTask:
         ldr r2, [r1]                        /* r2 = Location of saved context in TCB. */
 
     restore_special_regs_first_task:
+    #if ( configENABLE_PAC == 1 )
+        ldmdb r2!, {r3-r6}                  /* Read task's dedicated PAC key from the task's context. */
+        msr  PAC_KEY_P_0, r3                /* Write the task's dedicated PAC key to the PAC key registers. */
+        msr  PAC_KEY_P_1, r4
+        msr  PAC_KEY_P_2, r5
+        msr  PAC_KEY_P_3, r6
+        clrm {r3-r6}                        /* Clear r3-r6. */
+    #endif /* configENABLE_PAC */
         ldmdb r2!, {r0, r3-r5, lr}          /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */
         msr psp, r3
         msr psplim, r4
@@ -175,12 +185,22 @@ vRestoreContextOfFirstTask:
     ldr  r3, [r2]                           /* Read pxCurrentTCB. */
     ldr  r0, [r3]                           /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
 
+#if ( configENABLE_PAC == 1 )
+    ldmia r0!, {r1-r4}                      /* Read task's dedicated PAC key from stack. */
+    msr  PAC_KEY_P_3, r1                    /* Write the task's dedicated PAC key to the PAC key registers. */
+    msr  PAC_KEY_P_2, r2
+    msr  PAC_KEY_P_1, r3
+    msr  PAC_KEY_P_0, r4
+    clrm {r1-r4}                            /* Clear r1-r4.  */
+#endif /* configENABLE_PAC */
+
     ldm  r0!, {r1-r3}                       /* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */
     ldr  r4, =xSecureContext
     str  r1, [r4]                           /* Set xSecureContext to this task's value for the same. */
     msr  psplim, r2                         /* Set this task's PSPLIM value. */
-    movs r1, #2                             /* r1 = 2. */
-    msr  CONTROL, r1                        /* Switch to use PSP in the thread mode. */
+    mrs  r1, control                        /* Obtain current control register value. */
+    orrs r1, r1, #2                         /* r1 = r1 | 0x2 - Set the second bit to use the program stack pointe (PSP). */
+    msr control, r1                         /* Write back the new control register value. */
     adds r0, #32                            /* Discard everything up to r0. */
     msr  psp, r0                            /* This is now the new top of stack to use in the task. */
     isb
@@ -213,7 +233,7 @@ vStartFirstTask:
 ulSetInterruptMask:
     mrs r0, basepri                         /* r0 = basepri. Return original basepri value. */
     mov r1, #configMAX_SYSCALL_INTERRUPT_PRIORITY
-    msr basepri, r1                         /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
+    msr basepri, r1                         /* Disable interrupts up to configMAX_SYSCALL_INTERRUPT_PRIORITY. */
     dsb
     isb
     bx lr                                   /* Return. */
@@ -268,11 +288,20 @@ PendSV_Handler:
         mrs r4, psplim                      /* r4 = PSPLIM. */
         mrs r5, control                     /* r5 = CONTROL. */
         stmia r2!, {r0, r3-r5, lr}          /* Store xSecureContext, original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */
-        str r2, [r1]                        /* Save the location from where the context should be restored as the first member of TCB. */
+    #if ( configENABLE_PAC == 1 )
+        mrs  r3, PAC_KEY_P_0                /* Read task's dedicated PAC key from the PAC key registers. */
+        mrs  r4, PAC_KEY_P_1
+        mrs  r5, PAC_KEY_P_2
+        mrs  r6, PAC_KEY_P_3
+        stmia r2!, {r3-r6}                  /* Store the task's dedicated PAC key on the task's context. */
+        clrm {r3-r6}                        /* Clear r3-r6. */
+    #endif /* configENABLE_PAC */
+
+    str r2, [r1]                            /* Save the location from where the context should be restored as the first member of TCB. */
 
     select_next_task:
         mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
-        msr basepri, r0                     /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
+        msr basepri, r0                     /* Disable interrupts up to configMAX_SYSCALL_INTERRUPT_PRIORITY. */
         dsb
         isb
         bl vTaskSwitchContext
@@ -326,6 +355,14 @@ PendSV_Handler:
         ldr r2, [r1]                        /* r2 = Location of saved context in TCB. */
 
     restore_special_regs:
+    #if ( configENABLE_PAC == 1 )
+        ldmdb r2!, {r3-r6}                  /* Read task's dedicated PAC key from the task's context. */
+        msr  PAC_KEY_P_0, r3                /* Write the task's dedicated PAC key to the PAC key registers. */
+        msr  PAC_KEY_P_1, r4
+        msr  PAC_KEY_P_2, r5
+        msr  PAC_KEY_P_3, r6
+        clrm {r3-r6}                        /* Clear r3-r6. */
+    #endif /* configENABLE_PAC */
         ldmdb r2!, {r0, r3-r5, lr}          /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */
         msr psp, r3
         msr psplim, r4
@@ -371,76 +408,86 @@ PendSV_Handler:
     mrs r2, psp                             /* Read PSP in r2. */
 
     cbz r0, save_ns_context                 /* No secure context to save. */
-    push {r0-r2, r14}
-    bl SecureContext_SaveContext            /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
-    pop {r0-r3}                             /* LR is now in r3. */
-    mov lr, r3                              /* LR = r3. */
-    lsls r1, r3, #25                        /* r1 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
-    bpl save_ns_context                     /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
-
-    ldr r3, =pxCurrentTCB                   /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-    ldr r1, [r3]                            /* Read pxCurrentTCB. */
-    subs r2, r2, #12                        /* Make space for xSecureContext, PSPLIM and LR on the stack. */
-    str r2, [r1]                            /* Save the new top of stack in TCB. */
-    mrs r1, psplim                          /* r1 = PSPLIM. */
-    mov r3, lr                              /* r3 = LR/EXC_RETURN. */
-    stmia r2!, {r0, r1, r3}                 /* Store xSecureContext, PSPLIM and LR on the stack. */
-    b select_next_task
+    save_s_context:
+        push {r0-r2, lr}
+        bl SecureContext_SaveContext       /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
+        pop {r0-r2, lr}
 
     save_ns_context:
-        ldr r3, =pxCurrentTCB               /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-        ldr r1, [r3]                        /* Read pxCurrentTCB. */
+        mov r3, lr                          /* r3 = LR. */
+        lsls r3, r3, #25                    /* r3 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
+        bmi save_special_regs               /* If r3 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used. */
+
+    save_general_regs:
     #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
         tst lr, #0x10                       /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */
         it eq
         vstmdbeq r2!, {s16-s31}             /* Store the additional FP context registers which are not saved automatically. */
     #endif /* configENABLE_FPU || configENABLE_MVE */
-        subs r2, r2, #44                    /* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */
-        str r2, [r1]                        /* Save the new top of stack in TCB. */
-        adds r2, r2, #12                    /* r2 = r2 + 12. */
-        stm r2, {r4-r11}                    /* Store the registers that are not saved automatically. */
-        mrs r1, psplim                      /* r1 = PSPLIM. */
-        mov r3, lr                          /* r3 = LR/EXC_RETURN. */
-        subs r2, r2, #12                    /* r2 = r2 - 12. */
-        stmia r2!, {r0, r1, r3}             /* Store xSecureContext, PSPLIM and LR on the stack. */
+        stmdb r2!, {r4-r11}                 /* Store the registers that are not saved automatically. */
+
+    save_special_regs:
+        mrs r3, psplim                      /* r3 = PSPLIM. */
+        stmdb r2!, {r0, r3, lr}             /* Store xSecureContext, PSPLIM and LR on the stack. */
+    #if ( configENABLE_PAC == 1 )
+        mrs  r3, PAC_KEY_P_3                /* Read task's dedicated PAC key from the PAC key registers. */
+        mrs  r4, PAC_KEY_P_2
+        mrs  r5, PAC_KEY_P_1
+        mrs  r6, PAC_KEY_P_0
+        stmdb r2!, {r3-r6}                  /* Store the task's dedicated PAC key on the stack. */
+        clrm {r3-r6}                        /* Clear r3-r6. */
+    #endif /* configENABLE_PAC */
+
+    str r2, [r1]                            /* Save the new top of stack in TCB. */
 
     select_next_task:
         mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
-        msr basepri, r0                     /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
+        msr basepri, r0                     /* Disable interrupts up to configMAX_SYSCALL_INTERRUPT_PRIORITY. */
         dsb
         isb
         bl vTaskSwitchContext
         mov r0, #0                          /* r0 = 0. */
         msr basepri, r0                     /* Enable interrupts. */
 
+    restore_context:
         ldr r3, =pxCurrentTCB               /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
         ldr r1, [r3]                        /* Read pxCurrentTCB. */
         ldr r2, [r1]                        /* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */
 
-        ldmia r2!, {r0, r1, r4}             /* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */
-        msr psplim, r1                      /* Restore the PSPLIM register value for the task. */
-        mov lr, r4                          /* LR = r4. */
+    restore_special_regs:
+    #if ( configENABLE_PAC == 1 )
+        ldmia r2!, {r3-r6}                  /* Read task's dedicated PAC key from stack. */
+        msr  PAC_KEY_P_3, r3                /* Write the task's dedicated PAC key to the PAC key registers. */
+        msr  PAC_KEY_P_2, r4
+        msr  PAC_KEY_P_1, r5
+        msr  PAC_KEY_P_0, r6
+        clrm {r3-r6}                        /* Clear r3-r6. */
+    #endif /* configENABLE_PAC */
+        ldmia r2!, {r0, r3, lr}             http://files.iar.com/ftp/pub/box/bxarm-9.60.3.deb/* Read from stack - r0 = xSecureContext, r3 = PSPLIM and LR restored. */
+        msr psplim, r3                      /* Restore the PSPLIM register value for the task. */
         ldr r3, =xSecureContext             /* Read the location of xSecureContext i.e. &( xSecureContext ). */
         str r0, [r3]                        /* Restore the task's xSecureContext. */
         cbz r0, restore_ns_context          /* If there is no secure context for the task, restore the non-secure context. */
-        ldr r3, =pxCurrentTCB               /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-        ldr r1, [r3]                        /* Read pxCurrentTCB. */
-        push {r2, r4}
+
+    restore_s_context:
+        push {r1-r3, lr}
         bl SecureContext_LoadContext        /* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
-        pop {r2, r4}
-        mov lr, r4                          /* LR = r4. */
-        lsls r1, r4, #25                    /* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
-        bpl restore_ns_context              /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
-        msr psp, r2                         /* Remember the new top of stack for the task. */
-        bx lr
+        pop {r1-r3, lr}
 
     restore_ns_context:
+        mov r0, lr                          /* r0 = LR (EXC_RETURN). */
+        lsls r0, r0, #25                    /* r0 = r0 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
+        bmi restore_context_done            /* r0 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */
+
+    restore_general_regs:
         ldmia r2!, {r4-r11}                 /* Restore the registers that are not automatically restored. */
     #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
         tst lr, #0x10                       /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */
         it eq
         vldmiaeq r2!, {s16-s31}             /* Restore the additional FP context registers which are not restored automatically. */
     #endif /* configENABLE_FPU || configENABLE_MVE */
+
+    restore_context_done:
         msr psp, r2                         /* Remember the new top of stack for the task. */
         bx lr
 

portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -50,18 +50,21 @@
  */
 #define portARCH_NAME                    "Cortex-M33"
 #define portHAS_ARMV8M_MAIN_EXTENSION    1
+#define portARMV8M_MINOR_VERSION         0
 #define portDONT_DISCARD                 __root
 /*-----------------------------------------------------------*/
 
-#if ( configTOTAL_MPU_REGIONS == 16 )
-    #error 16 MPU regions are not yet supported for this port.
-#endif
-/*-----------------------------------------------------------*/
-
 /* ARMv8-M common port configurations. */
 #include "portmacrocommon.h"
 /*-----------------------------------------------------------*/
 
+#ifndef configENABLE_MVE
+    #define configENABLE_MVE    0
+#elif ( configENABLE_MVE != 0 )
+    #error configENABLE_MVE must be left undefined, or defined to 0 for the Cortex-M33.
+#endif
+/*-----------------------------------------------------------*/
+
 /**
  * @brief Critical section management.
  */

portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/mpu_wrappers_v2_asm.S

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -47,12 +47,11 @@ MPU_xTaskDelayUntil:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xTaskDelayUntil_Unpriv
     MPU_xTaskDelayUntil_Priv:
-        pop {r0}
         b MPU_xTaskDelayUntilImpl
     MPU_xTaskDelayUntil_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xTaskDelayUntil
 /*-----------------------------------------------------------*/
 
@@ -61,12 +60,11 @@ MPU_xTaskAbortDelay:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xTaskAbortDelay_Unpriv
     MPU_xTaskAbortDelay_Priv:
-        pop {r0}
         b MPU_xTaskAbortDelayImpl
     MPU_xTaskAbortDelay_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xTaskAbortDelay
 /*-----------------------------------------------------------*/
 
@@ -75,12 +73,11 @@ MPU_vTaskDelay:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_vTaskDelay_Unpriv
     MPU_vTaskDelay_Priv:
-        pop {r0}
         b MPU_vTaskDelayImpl
     MPU_vTaskDelay_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_vTaskDelay
 /*-----------------------------------------------------------*/
 
@@ -89,12 +86,11 @@ MPU_uxTaskPriorityGet:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_uxTaskPriorityGet_Unpriv
     MPU_uxTaskPriorityGet_Priv:
-        pop {r0}
         b MPU_uxTaskPriorityGetImpl
     MPU_uxTaskPriorityGet_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_uxTaskPriorityGet
 /*-----------------------------------------------------------*/
 
@@ -103,12 +99,11 @@ MPU_eTaskGetState:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_eTaskGetState_Unpriv
     MPU_eTaskGetState_Priv:
-        pop {r0}
         b MPU_eTaskGetStateImpl
     MPU_eTaskGetState_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_eTaskGetState
 /*-----------------------------------------------------------*/
 
@@ -117,12 +112,11 @@ MPU_vTaskGetInfo:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_vTaskGetInfo_Unpriv
     MPU_vTaskGetInfo_Priv:
-        pop {r0}
         b MPU_vTaskGetInfoImpl
     MPU_vTaskGetInfo_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_vTaskGetInfo
 /*-----------------------------------------------------------*/
 
@@ -131,12 +125,11 @@ MPU_xTaskGetIdleTaskHandle:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xTaskGetIdleTaskHandle_Unpriv
     MPU_xTaskGetIdleTaskHandle_Priv:
-        pop {r0}
         b MPU_xTaskGetIdleTaskHandleImpl
     MPU_xTaskGetIdleTaskHandle_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xTaskGetIdleTaskHandle
 /*-----------------------------------------------------------*/
 
@@ -145,12 +138,11 @@ MPU_vTaskSuspend:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_vTaskSuspend_Unpriv
     MPU_vTaskSuspend_Priv:
-        pop {r0}
         b MPU_vTaskSuspendImpl
     MPU_vTaskSuspend_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_vTaskSuspend
 /*-----------------------------------------------------------*/
 
@@ -159,12 +151,11 @@ MPU_vTaskResume:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_vTaskResume_Unpriv
     MPU_vTaskResume_Priv:
-        pop {r0}
         b MPU_vTaskResumeImpl
     MPU_vTaskResume_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_vTaskResume
 /*-----------------------------------------------------------*/
 
@@ -173,12 +164,11 @@ MPU_xTaskGetTickCount:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xTaskGetTickCount_Unpriv
     MPU_xTaskGetTickCount_Priv:
-        pop {r0}
         b MPU_xTaskGetTickCountImpl
     MPU_xTaskGetTickCount_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xTaskGetTickCount
 /*-----------------------------------------------------------*/
 
@@ -187,12 +177,11 @@ MPU_uxTaskGetNumberOfTasks:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_uxTaskGetNumberOfTasks_Unpriv
     MPU_uxTaskGetNumberOfTasks_Priv:
-        pop {r0}
         b MPU_uxTaskGetNumberOfTasksImpl
     MPU_uxTaskGetNumberOfTasks_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_uxTaskGetNumberOfTasks
 /*-----------------------------------------------------------*/
 
@@ -201,12 +190,11 @@ MPU_ulTaskGetRunTimeCounter:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_ulTaskGetRunTimeCounter_Unpriv
     MPU_ulTaskGetRunTimeCounter_Priv:
-        pop {r0}
         b MPU_ulTaskGetRunTimeCounterImpl
     MPU_ulTaskGetRunTimeCounter_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_ulTaskGetRunTimeCounter
 /*-----------------------------------------------------------*/
 
@@ -215,12 +203,11 @@ MPU_ulTaskGetRunTimePercent:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_ulTaskGetRunTimePercent_Unpriv
     MPU_ulTaskGetRunTimePercent_Priv:
-        pop {r0}
         b MPU_ulTaskGetRunTimePercentImpl
     MPU_ulTaskGetRunTimePercent_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_ulTaskGetRunTimePercent
 /*-----------------------------------------------------------*/
 
@@ -229,12 +216,11 @@ MPU_ulTaskGetIdleRunTimePercent:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_ulTaskGetIdleRunTimePercent_Unpriv
     MPU_ulTaskGetIdleRunTimePercent_Priv:
-        pop {r0}
         b MPU_ulTaskGetIdleRunTimePercentImpl
     MPU_ulTaskGetIdleRunTimePercent_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_ulTaskGetIdleRunTimePercent
 /*-----------------------------------------------------------*/
 
@@ -243,12 +229,11 @@ MPU_ulTaskGetIdleRunTimeCounter:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_ulTaskGetIdleRunTimeCounter_Unpriv
     MPU_ulTaskGetIdleRunTimeCounter_Priv:
-        pop {r0}
         b MPU_ulTaskGetIdleRunTimeCounterImpl
     MPU_ulTaskGetIdleRunTimeCounter_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_ulTaskGetIdleRunTimeCounter
 /*-----------------------------------------------------------*/
 
@@ -257,12 +242,11 @@ MPU_vTaskSetApplicationTaskTag:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_vTaskSetApplicationTaskTag_Unpriv
     MPU_vTaskSetApplicationTaskTag_Priv:
-        pop {r0}
         b MPU_vTaskSetApplicationTaskTagImpl
     MPU_vTaskSetApplicationTaskTag_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_vTaskSetApplicationTaskTag
 /*-----------------------------------------------------------*/
 
@@ -271,12 +255,11 @@ MPU_xTaskGetApplicationTaskTag:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xTaskGetApplicationTaskTag_Unpriv
     MPU_xTaskGetApplicationTaskTag_Priv:
-        pop {r0}
         b MPU_xTaskGetApplicationTaskTagImpl
     MPU_xTaskGetApplicationTaskTag_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xTaskGetApplicationTaskTag
 /*-----------------------------------------------------------*/
 
@@ -285,12 +268,11 @@ MPU_vTaskSetThreadLocalStoragePointer:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_vTaskSetThreadLocalStoragePointer_Unpriv
     MPU_vTaskSetThreadLocalStoragePointer_Priv:
-        pop {r0}
         b MPU_vTaskSetThreadLocalStoragePointerImpl
     MPU_vTaskSetThreadLocalStoragePointer_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_vTaskSetThreadLocalStoragePointer
 /*-----------------------------------------------------------*/
 
@@ -299,12 +281,11 @@ MPU_pvTaskGetThreadLocalStoragePointer:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_pvTaskGetThreadLocalStoragePointer_Unpriv
     MPU_pvTaskGetThreadLocalStoragePointer_Priv:
-        pop {r0}
         b MPU_pvTaskGetThreadLocalStoragePointerImpl
     MPU_pvTaskGetThreadLocalStoragePointer_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer
 /*-----------------------------------------------------------*/
 
@@ -313,12 +294,11 @@ MPU_uxTaskGetSystemState:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_uxTaskGetSystemState_Unpriv
     MPU_uxTaskGetSystemState_Priv:
-        pop {r0}
         b MPU_uxTaskGetSystemStateImpl
     MPU_uxTaskGetSystemState_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_uxTaskGetSystemState
 /*-----------------------------------------------------------*/
 
@@ -327,12 +307,11 @@ MPU_uxTaskGetStackHighWaterMark:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_uxTaskGetStackHighWaterMark_Unpriv
     MPU_uxTaskGetStackHighWaterMark_Priv:
-        pop {r0}
         b MPU_uxTaskGetStackHighWaterMarkImpl
     MPU_uxTaskGetStackHighWaterMark_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark
 /*-----------------------------------------------------------*/
 
@@ -341,12 +320,11 @@ MPU_uxTaskGetStackHighWaterMark2:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_uxTaskGetStackHighWaterMark2_Unpriv
     MPU_uxTaskGetStackHighWaterMark2_Priv:
-        pop {r0}
         b MPU_uxTaskGetStackHighWaterMark2Impl
     MPU_uxTaskGetStackHighWaterMark2_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_uxTaskGetStackHighWaterMark2
 /*-----------------------------------------------------------*/
 
@@ -355,12 +333,11 @@ MPU_xTaskGetCurrentTaskHandle:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xTaskGetCurrentTaskHandle_Unpriv
     MPU_xTaskGetCurrentTaskHandle_Priv:
-        pop {r0}
         b MPU_xTaskGetCurrentTaskHandleImpl
     MPU_xTaskGetCurrentTaskHandle_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xTaskGetCurrentTaskHandle
 /*-----------------------------------------------------------*/
 
@@ -369,12 +346,11 @@ MPU_xTaskGetSchedulerState:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xTaskGetSchedulerState_Unpriv
     MPU_xTaskGetSchedulerState_Priv:
-        pop {r0}
         b MPU_xTaskGetSchedulerStateImpl
     MPU_xTaskGetSchedulerState_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xTaskGetSchedulerState
 /*-----------------------------------------------------------*/
 
@@ -383,12 +359,11 @@ MPU_vTaskSetTimeOutState:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_vTaskSetTimeOutState_Unpriv
     MPU_vTaskSetTimeOutState_Priv:
-        pop {r0}
         b MPU_vTaskSetTimeOutStateImpl
     MPU_vTaskSetTimeOutState_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_vTaskSetTimeOutState
 /*-----------------------------------------------------------*/
 
@@ -397,12 +372,11 @@ MPU_xTaskCheckForTimeOut:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xTaskCheckForTimeOut_Unpriv
     MPU_xTaskCheckForTimeOut_Priv:
-        pop {r0}
         b MPU_xTaskCheckForTimeOutImpl
     MPU_xTaskCheckForTimeOut_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xTaskCheckForTimeOut
 /*-----------------------------------------------------------*/
 
@@ -411,12 +385,11 @@ MPU_xTaskGenericNotifyEntry:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xTaskGenericNotify_Unpriv
     MPU_xTaskGenericNotify_Priv:
-        pop {r0}
         b MPU_xTaskGenericNotifyImpl
     MPU_xTaskGenericNotify_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xTaskGenericNotify
 /*-----------------------------------------------------------*/
 
@@ -425,12 +398,11 @@ MPU_xTaskGenericNotifyWaitEntry:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xTaskGenericNotifyWait_Unpriv
     MPU_xTaskGenericNotifyWait_Priv:
-        pop {r0}
         b MPU_xTaskGenericNotifyWaitImpl
     MPU_xTaskGenericNotifyWait_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xTaskGenericNotifyWait
 /*-----------------------------------------------------------*/
 
@@ -439,12 +411,11 @@ MPU_ulTaskGenericNotifyTake:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_ulTaskGenericNotifyTake_Unpriv
     MPU_ulTaskGenericNotifyTake_Priv:
-        pop {r0}
         b MPU_ulTaskGenericNotifyTakeImpl
     MPU_ulTaskGenericNotifyTake_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_ulTaskGenericNotifyTake
 /*-----------------------------------------------------------*/
 
@@ -453,12 +424,11 @@ MPU_xTaskGenericNotifyStateClear:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xTaskGenericNotifyStateClear_Unpriv
     MPU_xTaskGenericNotifyStateClear_Priv:
-        pop {r0}
         b MPU_xTaskGenericNotifyStateClearImpl
     MPU_xTaskGenericNotifyStateClear_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xTaskGenericNotifyStateClear
 /*-----------------------------------------------------------*/
 
@@ -467,12 +437,11 @@ MPU_ulTaskGenericNotifyValueClear:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_ulTaskGenericNotifyValueClear_Unpriv
     MPU_ulTaskGenericNotifyValueClear_Priv:
-        pop {r0}
         b MPU_ulTaskGenericNotifyValueClearImpl
     MPU_ulTaskGenericNotifyValueClear_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_ulTaskGenericNotifyValueClear
 /*-----------------------------------------------------------*/
 
@@ -481,12 +450,11 @@ MPU_xQueueGenericSend:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xQueueGenericSend_Unpriv
     MPU_xQueueGenericSend_Priv:
-        pop {r0}
         b MPU_xQueueGenericSendImpl
     MPU_xQueueGenericSend_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xQueueGenericSend
 /*-----------------------------------------------------------*/
 
@@ -495,12 +463,11 @@ MPU_uxQueueMessagesWaiting:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_uxQueueMessagesWaiting_Unpriv
     MPU_uxQueueMessagesWaiting_Priv:
-        pop {r0}
         b MPU_uxQueueMessagesWaitingImpl
     MPU_uxQueueMessagesWaiting_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_uxQueueMessagesWaiting
 /*-----------------------------------------------------------*/
 
@@ -509,12 +476,11 @@ MPU_uxQueueSpacesAvailable:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_uxQueueSpacesAvailable_Unpriv
     MPU_uxQueueSpacesAvailable_Priv:
-        pop {r0}
         b MPU_uxQueueSpacesAvailableImpl
     MPU_uxQueueSpacesAvailable_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_uxQueueSpacesAvailable
 /*-----------------------------------------------------------*/
 
@@ -523,12 +489,11 @@ MPU_xQueueReceive:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xQueueReceive_Unpriv
     MPU_xQueueReceive_Priv:
-        pop {r0}
         b MPU_xQueueReceiveImpl
     MPU_xQueueReceive_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xQueueReceive
 /*-----------------------------------------------------------*/
 
@@ -537,12 +502,11 @@ MPU_xQueuePeek:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xQueuePeek_Unpriv
     MPU_xQueuePeek_Priv:
-        pop {r0}
         b MPU_xQueuePeekImpl
     MPU_xQueuePeek_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xQueuePeek
 /*-----------------------------------------------------------*/
 
@@ -551,12 +515,11 @@ MPU_xQueueSemaphoreTake:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xQueueSemaphoreTake_Unpriv
     MPU_xQueueSemaphoreTake_Priv:
-        pop {r0}
         b MPU_xQueueSemaphoreTakeImpl
     MPU_xQueueSemaphoreTake_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xQueueSemaphoreTake
 /*-----------------------------------------------------------*/
 
@@ -565,12 +528,11 @@ MPU_xQueueGetMutexHolder:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xQueueGetMutexHolder_Unpriv
     MPU_xQueueGetMutexHolder_Priv:
-        pop {r0}
         b MPU_xQueueGetMutexHolderImpl
     MPU_xQueueGetMutexHolder_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xQueueGetMutexHolder
 /*-----------------------------------------------------------*/
 
@@ -579,12 +541,11 @@ MPU_xQueueTakeMutexRecursive:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xQueueTakeMutexRecursive_Unpriv
     MPU_xQueueTakeMutexRecursive_Priv:
-        pop {r0}
         b MPU_xQueueTakeMutexRecursiveImpl
     MPU_xQueueTakeMutexRecursive_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xQueueTakeMutexRecursive
 /*-----------------------------------------------------------*/
 
@@ -593,12 +554,11 @@ MPU_xQueueGiveMutexRecursive:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xQueueGiveMutexRecursive_Unpriv
     MPU_xQueueGiveMutexRecursive_Priv:
-        pop {r0}
         b MPU_xQueueGiveMutexRecursiveImpl
     MPU_xQueueGiveMutexRecursive_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xQueueGiveMutexRecursive
 /*-----------------------------------------------------------*/
 
@@ -607,12 +567,11 @@ MPU_xQueueSelectFromSet:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xQueueSelectFromSet_Unpriv
     MPU_xQueueSelectFromSet_Priv:
-        pop {r0}
         b MPU_xQueueSelectFromSetImpl
     MPU_xQueueSelectFromSet_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xQueueSelectFromSet
 /*-----------------------------------------------------------*/
 
@@ -621,12 +580,11 @@ MPU_xQueueAddToSet:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xQueueAddToSet_Unpriv
     MPU_xQueueAddToSet_Priv:
-        pop {r0}
         b MPU_xQueueAddToSetImpl
     MPU_xQueueAddToSet_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xQueueAddToSet
 /*-----------------------------------------------------------*/
 
@@ -635,12 +593,11 @@ MPU_vQueueAddToRegistry:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_vQueueAddToRegistry_Unpriv
     MPU_vQueueAddToRegistry_Priv:
-        pop {r0}
         b MPU_vQueueAddToRegistryImpl
     MPU_vQueueAddToRegistry_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_vQueueAddToRegistry
 /*-----------------------------------------------------------*/
 
@@ -649,12 +606,11 @@ MPU_vQueueUnregisterQueue:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_vQueueUnregisterQueue_Unpriv
     MPU_vQueueUnregisterQueue_Priv:
-        pop {r0}
         b MPU_vQueueUnregisterQueueImpl
     MPU_vQueueUnregisterQueue_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_vQueueUnregisterQueue
 /*-----------------------------------------------------------*/
 
@@ -663,12 +619,11 @@ MPU_pcQueueGetName:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_pcQueueGetName_Unpriv
     MPU_pcQueueGetName_Priv:
-        pop {r0}
         b MPU_pcQueueGetNameImpl
     MPU_pcQueueGetName_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_pcQueueGetName
 /*-----------------------------------------------------------*/
 
@@ -677,12 +632,11 @@ MPU_pvTimerGetTimerID:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_pvTimerGetTimerID_Unpriv
     MPU_pvTimerGetTimerID_Priv:
-        pop {r0}
         b MPU_pvTimerGetTimerIDImpl
     MPU_pvTimerGetTimerID_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_pvTimerGetTimerID
 /*-----------------------------------------------------------*/
 
@@ -691,12 +645,11 @@ MPU_vTimerSetTimerID:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_vTimerSetTimerID_Unpriv
     MPU_vTimerSetTimerID_Priv:
-        pop {r0}
         b MPU_vTimerSetTimerIDImpl
     MPU_vTimerSetTimerID_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_vTimerSetTimerID
 /*-----------------------------------------------------------*/
 
@@ -705,12 +658,11 @@ MPU_xTimerIsTimerActive:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xTimerIsTimerActive_Unpriv
     MPU_xTimerIsTimerActive_Priv:
-        pop {r0}
         b MPU_xTimerIsTimerActiveImpl
     MPU_xTimerIsTimerActive_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xTimerIsTimerActive
 /*-----------------------------------------------------------*/
 
@@ -719,12 +671,11 @@ MPU_xTimerGetTimerDaemonTaskHandle:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xTimerGetTimerDaemonTaskHandle_Unpriv
     MPU_xTimerGetTimerDaemonTaskHandle_Priv:
-        pop {r0}
         b MPU_xTimerGetTimerDaemonTaskHandleImpl
     MPU_xTimerGetTimerDaemonTaskHandle_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle
 /*-----------------------------------------------------------*/
 
@@ -733,12 +684,11 @@ MPU_xTimerGenericCommandFromTaskEntry:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xTimerGenericCommandFromTask_Unpriv
     MPU_xTimerGenericCommandFromTask_Priv:
-        pop {r0}
         b MPU_xTimerGenericCommandFromTaskImpl
     MPU_xTimerGenericCommandFromTask_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xTimerGenericCommandFromTask
 /*-----------------------------------------------------------*/
 
@@ -747,12 +697,11 @@ MPU_pcTimerGetName:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_pcTimerGetName_Unpriv
     MPU_pcTimerGetName_Priv:
-        pop {r0}
         b MPU_pcTimerGetNameImpl
     MPU_pcTimerGetName_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_pcTimerGetName
 /*-----------------------------------------------------------*/
 
@@ -761,12 +710,11 @@ MPU_vTimerSetReloadMode:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_vTimerSetReloadMode_Unpriv
     MPU_vTimerSetReloadMode_Priv:
-        pop {r0}
         b MPU_vTimerSetReloadModeImpl
     MPU_vTimerSetReloadMode_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_vTimerSetReloadMode
 /*-----------------------------------------------------------*/
 
@@ -775,12 +723,11 @@ MPU_xTimerGetReloadMode:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xTimerGetReloadMode_Unpriv
     MPU_xTimerGetReloadMode_Priv:
-        pop {r0}
         b MPU_xTimerGetReloadModeImpl
     MPU_xTimerGetReloadMode_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xTimerGetReloadMode
 /*-----------------------------------------------------------*/
 
@@ -789,12 +736,11 @@ MPU_uxTimerGetReloadMode:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_uxTimerGetReloadMode_Unpriv
     MPU_uxTimerGetReloadMode_Priv:
-        pop {r0}
         b MPU_uxTimerGetReloadModeImpl
     MPU_uxTimerGetReloadMode_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_uxTimerGetReloadMode
 /*-----------------------------------------------------------*/
 
@@ -803,12 +749,11 @@ MPU_xTimerGetPeriod:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xTimerGetPeriod_Unpriv
     MPU_xTimerGetPeriod_Priv:
-        pop {r0}
         b MPU_xTimerGetPeriodImpl
     MPU_xTimerGetPeriod_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xTimerGetPeriod
 /*-----------------------------------------------------------*/
 
@@ -817,12 +762,11 @@ MPU_xTimerGetExpiryTime:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xTimerGetExpiryTime_Unpriv
     MPU_xTimerGetExpiryTime_Priv:
-        pop {r0}
         b MPU_xTimerGetExpiryTimeImpl
     MPU_xTimerGetExpiryTime_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xTimerGetExpiryTime
 /*-----------------------------------------------------------*/
 
@@ -831,12 +775,11 @@ MPU_xEventGroupWaitBitsEntry:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xEventGroupWaitBits_Unpriv
     MPU_xEventGroupWaitBits_Priv:
-        pop {r0}
         b MPU_xEventGroupWaitBitsImpl
     MPU_xEventGroupWaitBits_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xEventGroupWaitBits
 /*-----------------------------------------------------------*/
 
@@ -845,12 +788,11 @@ MPU_xEventGroupClearBits:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xEventGroupClearBits_Unpriv
     MPU_xEventGroupClearBits_Priv:
-        pop {r0}
         b MPU_xEventGroupClearBitsImpl
     MPU_xEventGroupClearBits_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xEventGroupClearBits
 /*-----------------------------------------------------------*/
 
@@ -859,12 +801,11 @@ MPU_xEventGroupSetBits:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xEventGroupSetBits_Unpriv
     MPU_xEventGroupSetBits_Priv:
-        pop {r0}
         b MPU_xEventGroupSetBitsImpl
     MPU_xEventGroupSetBits_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xEventGroupSetBits
 /*-----------------------------------------------------------*/
 
@@ -873,12 +814,11 @@ MPU_xEventGroupSync:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xEventGroupSync_Unpriv
     MPU_xEventGroupSync_Priv:
-        pop {r0}
         b MPU_xEventGroupSyncImpl
     MPU_xEventGroupSync_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xEventGroupSync
 /*-----------------------------------------------------------*/
 
@@ -887,12 +827,11 @@ MPU_uxEventGroupGetNumber:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_uxEventGroupGetNumber_Unpriv
     MPU_uxEventGroupGetNumber_Priv:
-        pop {r0}
         b MPU_uxEventGroupGetNumberImpl
     MPU_uxEventGroupGetNumber_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_uxEventGroupGetNumber
 /*-----------------------------------------------------------*/
 
@@ -901,12 +840,11 @@ MPU_vEventGroupSetNumber:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_vEventGroupSetNumber_Unpriv
     MPU_vEventGroupSetNumber_Priv:
-        pop {r0}
         b MPU_vEventGroupSetNumberImpl
     MPU_vEventGroupSetNumber_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_vEventGroupSetNumber
 /*-----------------------------------------------------------*/
 
@@ -915,12 +853,11 @@ MPU_xStreamBufferSend:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xStreamBufferSend_Unpriv
     MPU_xStreamBufferSend_Priv:
-        pop {r0}
         b MPU_xStreamBufferSendImpl
     MPU_xStreamBufferSend_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xStreamBufferSend
 /*-----------------------------------------------------------*/
 
@@ -929,12 +866,11 @@ MPU_xStreamBufferReceive:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xStreamBufferReceive_Unpriv
     MPU_xStreamBufferReceive_Priv:
-        pop {r0}
         b MPU_xStreamBufferReceiveImpl
     MPU_xStreamBufferReceive_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xStreamBufferReceive
 /*-----------------------------------------------------------*/
 
@@ -943,12 +879,11 @@ MPU_xStreamBufferIsFull:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xStreamBufferIsFull_Unpriv
     MPU_xStreamBufferIsFull_Priv:
-        pop {r0}
         b MPU_xStreamBufferIsFullImpl
     MPU_xStreamBufferIsFull_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xStreamBufferIsFull
 /*-----------------------------------------------------------*/
 
@@ -957,12 +892,11 @@ MPU_xStreamBufferIsEmpty:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xStreamBufferIsEmpty_Unpriv
     MPU_xStreamBufferIsEmpty_Priv:
-        pop {r0}
         b MPU_xStreamBufferIsEmptyImpl
     MPU_xStreamBufferIsEmpty_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xStreamBufferIsEmpty
 /*-----------------------------------------------------------*/
 
@@ -971,12 +905,11 @@ MPU_xStreamBufferSpacesAvailable:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xStreamBufferSpacesAvailable_Unpriv
     MPU_xStreamBufferSpacesAvailable_Priv:
-        pop {r0}
         b MPU_xStreamBufferSpacesAvailableImpl
     MPU_xStreamBufferSpacesAvailable_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xStreamBufferSpacesAvailable
 /*-----------------------------------------------------------*/
 
@@ -985,12 +918,11 @@ MPU_xStreamBufferBytesAvailable:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xStreamBufferBytesAvailable_Unpriv
     MPU_xStreamBufferBytesAvailable_Priv:
-        pop {r0}
         b MPU_xStreamBufferBytesAvailableImpl
     MPU_xStreamBufferBytesAvailable_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xStreamBufferBytesAvailable
 /*-----------------------------------------------------------*/
 
@@ -999,12 +931,11 @@ MPU_xStreamBufferSetTriggerLevel:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xStreamBufferSetTriggerLevel_Unpriv
     MPU_xStreamBufferSetTriggerLevel_Priv:
-        pop {r0}
         b MPU_xStreamBufferSetTriggerLevelImpl
     MPU_xStreamBufferSetTriggerLevel_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xStreamBufferSetTriggerLevel
 /*-----------------------------------------------------------*/
 
@@ -1013,12 +944,11 @@ MPU_xStreamBufferNextMessageLengthBytes:
     push {r0}
     mrs r0, control
     tst r0, #1
+    pop {r0}
     bne MPU_xStreamBufferNextMessageLengthBytes_Unpriv
     MPU_xStreamBufferNextMessageLengthBytes_Priv:
-        pop {r0}
         b MPU_xStreamBufferNextMessageLengthBytesImpl
     MPU_xStreamBufferNextMessageLengthBytes_Unpriv:
-        pop {r0}
         svc #SYSTEM_CALL_xStreamBufferNextMessageLengthBytes
 /*-----------------------------------------------------------*/
 

portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s

@@ -1,6 +1,8 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
+ * Copyright 2024 Arm Limited and/or its affiliates
+ * <open-source-office@arm.com>
  *
  * SPDX-License-Identifier: MIT
  *
@@ -140,6 +142,14 @@ vRestoreContextOfFirstTask:
         ldr r1, [r0]                        /* r1 = Location of saved context in TCB. */
 
     restore_special_regs_first_task:
+    #if ( configENABLE_PAC == 1 )
+        ldmdb r1!, {r2-r5}                  /* Read task's dedicated PAC key from the task's context. */
+        msr  PAC_KEY_P_0, r2                /* Write the task's dedicated PAC key to the PAC key registers. */
+        msr  PAC_KEY_P_1, r3
+        msr  PAC_KEY_P_2, r4
+        msr  PAC_KEY_P_3, r5
+        clrm {r2-r5}                        /* Clear r2-r5. */
+    #endif /* configENABLE_PAC */
         ldmdb r1!, {r2-r4, lr}              /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */
         msr psp, r2
         msr psplim, r3
@@ -163,10 +173,20 @@ vRestoreContextOfFirstTask:
     ldr  r1, [r2]                           /* Read pxCurrentTCB. */
     ldr  r0, [r1]                           /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
 
+#if ( configENABLE_PAC == 1 )
+    ldmia r0!, {r1-r4}                      /* Read task's dedicated PAC key from stack. */
+    msr  PAC_KEY_P_3, r1                    /* Write the task's dedicated PAC key to the PAC key registers. */
+    msr  PAC_KEY_P_2, r2
+    msr  PAC_KEY_P_1, r3
+    msr  PAC_KEY_P_0, r4
+    clrm {r1-r4}                            /* Clear r1-r4. */
+#endif /* configENABLE_PAC */
+
     ldm  r0!, {r1-r2}                       /* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */
     msr  psplim, r1                         /* Set this task's PSPLIM value. */
-    movs r1, #2                             /* r1 = 2. */
-    msr  CONTROL, r1                        /* Switch to use PSP in the thread mode. */
+    mrs  r1, control                        /* Obtain current control register value. */
+    orrs r1, r1, #2                         /* r1 = r1 | 0x2 - Set the second bit to use the program stack pointe (PSP). */
+    msr control, r1                         /* Write back the new control register value. */
     adds r0, #32                            /* Discard everything up to r0. */
     msr  psp, r0                            /* This is now the new top of stack to use in the task. */
     isb
@@ -199,7 +219,7 @@ vStartFirstTask:
 ulSetInterruptMask:
     mrs r0, basepri                         /* r0 = basepri. Return original basepri value. */
     mov r1, #configMAX_SYSCALL_INTERRUPT_PRIORITY
-    msr basepri, r1                         /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
+    msr basepri, r1                         /* Disable interrupts up to configMAX_SYSCALL_INTERRUPT_PRIORITY. */
     dsb
     isb
     bx lr                                   /* Return. */
@@ -230,7 +250,6 @@ PendSV_Handler:
         vstmiaeq r1!, {s0-s16}              /* Store hardware saved FP context. */
         sub r2, r2, #0x20                   /* Set r2 back to the location of hardware saved context. */
     #endif /* configENABLE_FPU || configENABLE_MVE */
-
         stmia r1!, {r4-r11}                 /* Store r4-r11. */
         ldmia r2, {r4-r11}                  /* Copy the hardware saved context into r4-r11. */
         stmia r1!, {r4-r11}                 /* Store the hardware saved context. */
@@ -239,11 +258,20 @@ PendSV_Handler:
         mrs r3, psplim                      /* r3 = PSPLIM. */
         mrs r4, control                     /* r4 = CONTROL. */
         stmia r1!, {r2-r4, lr}              /* Store original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */
+    #if ( configENABLE_PAC == 1 )
+        mrs  r2, PAC_KEY_P_0                /* Read task's dedicated PAC key from the PAC key registers. */
+        mrs  r3, PAC_KEY_P_1
+        mrs  r4, PAC_KEY_P_2
+        mrs  r5, PAC_KEY_P_3
+        stmia r1!, {r2-r5}                  /* Store the task's dedicated PAC key on the task's context. */
+        clrm {r2-r5}                        /* Clear r2-r5. */
+    #endif /* configENABLE_PAC */
+
         str r1, [r0]                        /* Save the location from where the context should be restored as the first member of TCB. */
 
     select_next_task:
         mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
-        msr basepri, r0                     /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
+        msr basepri, r0                     /* Disable interrupts up to configMAX_SYSCALL_INTERRUPT_PRIORITY. */
         dsb
         isb
         bl vTaskSwitchContext
@@ -297,6 +325,14 @@ PendSV_Handler:
         ldr r1, [r0]                        /* r1 = Location of saved context in TCB. */
 
     restore_special_regs:
+    #if ( configENABLE_PAC == 1 )
+        ldmdb r1!, {r2-r5}                  /* Read task's dedicated PAC key from the task's context. */
+        msr  PAC_KEY_P_0, r2                /* Write the task's dedicated PAC key to the PAC key registers. */
+        msr  PAC_KEY_P_1, r3
+        msr  PAC_KEY_P_2, r4
+        msr  PAC_KEY_P_3, r5
+        clrm {r2-r5}                        /* Clear r2-r5. */
+    #endif /* configENABLE_PAC */
         ldmdb r1!, {r2-r4, lr}              /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */
         msr psp, r2
         msr psplim, r3
@@ -332,12 +368,21 @@ PendSV_Handler:
     mov r3, lr                              /* r3 = LR/EXC_RETURN. */
     stmdb r0!, {r2-r11}                     /* Store on the stack - PSPLIM, LR and registers that are not automatically. */
 
+#if ( configENABLE_PAC == 1 )
+    mrs  r1, PAC_KEY_P_3                    /* Read task's dedicated PAC key from the PAC key registers. */
+    mrs  r2, PAC_KEY_P_2
+    mrs  r3, PAC_KEY_P_1
+    mrs  r4, PAC_KEY_P_0
+    stmdb r0!, {r1-r4}                      /* Store the task's dedicated PAC key on the stack. */
+    clrm {r1-r4}                            /* Clear r1-r4. */
+#endif /* configENABLE_PAC */
+
     ldr r2, =pxCurrentTCB                   /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
     ldr r1, [r2]                            /* Read pxCurrentTCB. */
     str r0, [r1]                            /* Save the new top of stack in TCB. */
 
     mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
-    msr basepri, r0                         /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
+    msr basepri, r0                         /* Disable interrupts up to configMAX_SYSCALL_INTERRUPT_PRIORITY. */
     dsb
     isb
     bl vTaskSwitchContext
@@ -348,6 +393,15 @@ PendSV_Handler:
     ldr r1, [r2]                            /* Read pxCurrentTCB. */
     ldr r0, [r1]                            /* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */
 
+#if ( configENABLE_PAC == 1 )
+    ldmia r0!, {r2-r5}                      /* Read task's dedicated PAC key from stack. */
+    msr  PAC_KEY_P_3, r2                    /* Write the task's dedicated PAC key to the PAC key registers. */
+    msr  PAC_KEY_P_2, r3
+    msr  PAC_KEY_P_1, r4
+    msr  PAC_KEY_P_0, r5
+    clrm {r2-r5}                            /* Clear r2-r5. */
+#endif /* configENABLE_PAC */
+
     ldmia r0!, {r2-r11}                     /* Read from stack - r2 = PSPLIM, r3 = LR and r4-r11 restored. */
 
 #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )

portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -50,6 +50,7 @@
  */
 #define portARCH_NAME                    "Cortex-M33"
 #define portHAS_ARMV8M_MAIN_EXTENSION    1
+#define portARMV8M_MINOR_VERSION         0
 #define portDONT_DISCARD                 __root
 /*-----------------------------------------------------------*/
 
@@ -57,8 +58,10 @@
 #include "portmacrocommon.h"
 /*-----------------------------------------------------------*/
 
-#if ( configTOTAL_MPU_REGIONS == 16 )
-    #error 16 MPU regions are not yet supported for this port.
+#ifndef configENABLE_MVE
+    #define configENABLE_MVE    0
+#elif ( configENABLE_MVE != 0 )
+    #error configENABLE_MVE must be left undefined, or defined to 0 for the Cortex-M33.
 #endif
 /*-----------------------------------------------------------*/
 

portable/ARMv8M/non_secure/portable/IAR/ARM_CM35P/portmacro.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -50,6 +50,7 @@
  */
 #define portARCH_NAME                    "Cortex-M35P"
 #define portHAS_ARMV8M_MAIN_EXTENSION    1
+#define portARMV8M_MINOR_VERSION         0
 #define portDONT_DISCARD                 __root
 /*-----------------------------------------------------------*/
 
@@ -57,8 +58,10 @@
 #include "portmacrocommon.h"
 /*-----------------------------------------------------------*/
 
-#if ( configTOTAL_MPU_REGIONS == 16 )
-    #error 16 MPU regions are not yet supported for this port.
+#ifndef configENABLE_MVE
+    #define configENABLE_MVE    0
+#elif ( configENABLE_MVE != 0 )
+    #error configENABLE_MVE must be left undefined, or defined to 0 for the Cortex-M35.
 #endif
 /*-----------------------------------------------------------*/
 

portable/ARMv8M/non_secure/portable/IAR/ARM_CM55/portmacro.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -55,6 +55,7 @@
  */
 #define portARCH_NAME                    "Cortex-M55"
 #define portHAS_ARMV8M_MAIN_EXTENSION    1
+#define portARMV8M_MINOR_VERSION         1
 #define portDONT_DISCARD                 __root
 /*-----------------------------------------------------------*/
 
@@ -62,11 +63,6 @@
 #include "portmacrocommon.h"
 /*-----------------------------------------------------------*/
 
-#if ( configTOTAL_MPU_REGIONS == 16 )
-    #error 16 MPU regions are not yet supported for this port.
-#endif
-/*-----------------------------------------------------------*/
-
 /**
  * @brief Critical section management.
  */

portable/ARMv8M/non_secure/portable/IAR/ARM_CM85/portmacro.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -55,6 +55,7 @@
  */
 #define portARCH_NAME                    "Cortex-M85"
 #define portHAS_ARMV8M_MAIN_EXTENSION    1
+#define portARMV8M_MINOR_VERSION         1
 #define portDONT_DISCARD                 __root
 /*-----------------------------------------------------------*/
 
@@ -62,11 +63,6 @@
 #include "portmacrocommon.h"
 /*-----------------------------------------------------------*/
 
-#if ( configTOTAL_MPU_REGIONS == 16 )
-    #error 16 MPU regions are not yet supported for this port.
-#endif
-/*-----------------------------------------------------------*/
-
 /**
  * @brief Critical section management.
  */

portable/ARMv8M/non_secure/portasm.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -52,7 +52,7 @@ BaseType_t xIsPrivileged( void ) __attribute__( ( naked ) );
  * @brief Raises the privilege level by clearing the bit 0 of the CONTROL
  * register.
  *
- * @note This is a privileged function and should only be called from the kenrel
+ * @note This is a privileged function and should only be called from the kernel
  * code.
  *
  * Bit 0 of the CONTROL register defines the privilege level of Thread Mode.

portable/ARMv8M/non_secure/portmacrocommon.h

@@ -1,6 +1,8 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
+ * Copyright 2024 Arm Limited and/or its affiliates
+ * <open-source-office@arm.com>
  *
  * SPDX-License-Identifier: MIT
  *
@@ -125,6 +127,18 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
     extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
     extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
 #endif /* configENABLE_MPU */
+
+#if ( configENABLE_PAC == 1 )
+
+    /**
+     * @brief Generates 128-bit task's random PAC key.
+     *
+     * @param[out] pulTaskPacKey Pointer to a 4-word (128-bits) array to be
+     *             filled with a 128-bit random number.
+     */
+    void vApplicationGenerateTaskRandomPacKey( uint32_t * pulTaskPacKey );
+
+#endif /* configENABLE_PAC */
 /*-----------------------------------------------------------*/
 
 /**
@@ -137,7 +151,7 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
     #define portPRIVILEGE_BIT         ( 0x0UL )
 #endif /* configENABLE_MPU */
 
-/* MPU settings that can be overriden in FreeRTOSConfig.h. */
+/* MPU settings that can be overridden in FreeRTOSConfig.h. */
 #ifndef configTOTAL_MPU_REGIONS
     /* Define to 8 for backward compatibility. */
     #define configTOTAL_MPU_REGIONS    ( 8UL )
@@ -188,9 +202,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
 
 #if ( configENABLE_MPU == 1 )
 
-/**
- * @brief Settings to define an MPU region.
- */
+    /**
+     * @brief Settings to define an MPU region.
+     */
     typedef struct MPURegionSettings
     {
         uint32_t ulRBAR; /**< RBAR for the region. */
@@ -203,9 +217,9 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
             #error configSYSTEM_CALL_STACK_SIZE must be defined to the desired size of the system call stack in words for using MPU wrappers v2.
         #endif
 
-/**
- * @brief System call stack.
- */
+        /**
+         * @brief System call stack.
+         */
         typedef struct SYSTEM_CALL_STACK_INFO
         {
             uint32_t ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE ];
@@ -218,76 +232,128 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
 
     #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */
 
-/**
- * @brief MPU settings as stored in the TCB.
- */
+    /**
+     * @brief MPU settings as stored in the TCB.
+     */
     #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
 
-        #if ( configENABLE_TRUSTZONE == 1 )
+        #if ( ( configENABLE_TRUSTZONE == 1 ) && ( configENABLE_PAC == 1 ) )
 
-/*
- * +-----------+---------------+----------+-----------------+------------------------------+-----+
- * |  s16-s31  | s0-s15, FPSCR |  r4-r11  | r0-r3, r12, LR, | xSecureContext, PSP, PSPLIM, |     |
- * |           |               |          | PC, xPSR        | CONTROL, EXC_RETURN          |     |
- * +-----------+---------------+----------+-----------------+------------------------------+-----+
- *
- * <-----------><--------------><---------><----------------><-----------------------------><---->
- *      16             16            8               8                     5                   1
- */
+            /*
+             * +-----------+---------------+----------+-----------------+------------------------------+------------+-----+
+             * |  s16-s31  | s0-s15, FPSCR |  r4-r11  | r0-r3, r12, LR, | xSecureContext, PSP, PSPLIM, | TaskPacKey |     |
+             * |           |               |          | PC, xPSR        | CONTROL, EXC_RETURN          |            |     |
+             * +-----------+---------------+----------+-----------------+------------------------------+------------+-----+
+             *
+             * <-----------><--------------><---------><----------------><-----------------------------><-----------><---->
+             *      16             17            8               8                     5                     16         1
+             */
+            #define MAX_CONTEXT_SIZE    71
+
+        #elif ( ( configENABLE_TRUSTZONE == 1 ) && ( configENABLE_PAC == 0 ) )
+
+            /*
+             * +-----------+---------------+----------+-----------------+------------------------------+-----+
+             * |  s16-s31  | s0-s15, FPSCR |  r4-r11  | r0-r3, r12, LR, | xSecureContext, PSP, PSPLIM, |     |
+             * |           |               |          | PC, xPSR        | CONTROL, EXC_RETURN          |     |
+             * +-----------+---------------+----------+-----------------+------------------------------+-----+
+             *
+             * <-----------><--------------><---------><----------------><-----------------------------><---->
+             *      16             17            8               8                     5                   1
+             */
+            #define MAX_CONTEXT_SIZE    55
+
+        #elif ( ( configENABLE_TRUSTZONE == 0 ) && ( configENABLE_PAC == 1 ) )
+
+            /*
+             * +-----------+---------------+----------+-----------------+----------------------+------------+-----+
+             * |  s16-s31  | s0-s15, FPSCR |  r4-r11  | r0-r3, r12, LR, | PSP, PSPLIM, CONTROL | TaskPacKey |     |
+             * |           |               |          | PC, xPSR        | EXC_RETURN           |            |     |
+             * +-----------+---------------+----------+-----------------+----------------------+------------+-----+
+             *
+             * <-----------><--------------><---------><----------------><---------------------><-----------><---->
+             *      16             17            8               8                  4                16         1
+             */
+            #define MAX_CONTEXT_SIZE    70
+
+        #else /* if ( ( configENABLE_TRUSTZONE == 1 ) && ( configENABLE_PAC == 1 ) ) */
+
+            /*
+             * +-----------+---------------+----------+-----------------+----------------------+-----+
+             * |  s16-s31  | s0-s15, FPSCR |  r4-r11  | r0-r3, r12, LR, | PSP, PSPLIM, CONTROL |     |
+             * |           |               |          | PC, xPSR        | EXC_RETURN           |     |
+             * +-----------+---------------+----------+-----------------+----------------------+-----+
+             *
+             * <-----------><--------------><---------><----------------><---------------------><---->
+             *      16             17            8               8                  4              1
+             */
             #define MAX_CONTEXT_SIZE    54
 
-        #else /* #if( configENABLE_TRUSTZONE == 1 ) */
-
-/*
- * +-----------+---------------+----------+-----------------+----------------------+-----+
- * |  s16-s31  | s0-s15, FPSCR |  r4-r11  | r0-r3, r12, LR, | PSP, PSPLIM, CONTROL |     |
- * |           |               |          | PC, xPSR        | EXC_RETURN           |     |
- * +-----------+---------------+----------+-----------------+----------------------+-----+
- *
- * <-----------><--------------><---------><----------------><---------------------><---->
- *      16             16            8               8                  4              1
- */
-            #define MAX_CONTEXT_SIZE    53
-
-        #endif /* #if( configENABLE_TRUSTZONE == 1 ) */
+        #endif /* #if ( ( configENABLE_TRUSTZONE == 1 ) && ( configENABLE_PAC == 1 ) ) */
 
     #else /* #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */
 
-        #if ( configENABLE_TRUSTZONE == 1 )
+        #if ( ( configENABLE_TRUSTZONE == 1 ) && ( configENABLE_PAC == 1 ) )
 
-/*
- * +----------+-----------------+------------------------------+-----+
- * |  r4-r11  | r0-r3, r12, LR, | xSecureContext, PSP, PSPLIM, |     |
- * |          | PC, xPSR        | CONTROL, EXC_RETURN          |     |
- * +----------+-----------------+------------------------------+-----+
- *
- * <---------><----------------><------------------------------><---->
- *     8               8                      5                   1
- */
+            /*
+             * +----------+-----------------+------------------------------+------------+-----+
+             * |  r4-r11  | r0-r3, r12, LR, | xSecureContext, PSP, PSPLIM, | TaskPacKey |     |
+             * |          | PC, xPSR        | CONTROL, EXC_RETURN          |            |     |
+             * +----------+-----------------+------------------------------+------------+-----+
+             *
+             * <---------><----------------><------------------------------><-----------><---->
+             *     8               8                      5                      16         1
+             */
+            #define MAX_CONTEXT_SIZE    38
+
+        #elif ( ( configENABLE_TRUSTZONE == 1 ) && ( configENABLE_PAC == 0 ) )
+
+            /*
+             * +----------+-----------------+------------------------------+-----+
+             * |  r4-r11  | r0-r3, r12, LR, | xSecureContext, PSP, PSPLIM, |     |
+             * |          | PC, xPSR        | CONTROL, EXC_RETURN          |     |
+             * +----------+-----------------+------------------------------+-----+
+             *
+             * <---------><----------------><------------------------------><---->
+             *     8               8                      5                   1
+             */
             #define MAX_CONTEXT_SIZE    22
 
+        #elif ( ( configENABLE_TRUSTZONE == 0 ) && ( configENABLE_PAC == 1 ) )
+
+            /*
+             * +----------+-----------------+----------------------+------------+-----+
+             * |  r4-r11  | r0-r3, r12, LR, | PSP, PSPLIM, CONTROL | TaskPacKey |     |
+             * |          | PC, xPSR        | EXC_RETURN           |            |     |
+             * +----------+-----------------+----------------------+------------+-----+
+             *
+             * <---------><----------------><----------------------><-----------><---->
+             *     8               8                  4                  16         1
+             */
+            #define MAX_CONTEXT_SIZE    37
+
         #else /* #if( configENABLE_TRUSTZONE == 1 ) */
 
-/*
- * +----------+-----------------+----------------------+-----+
- * |  r4-r11  | r0-r3, r12, LR, | PSP, PSPLIM, CONTROL |     |
- * |          | PC, xPSR        | EXC_RETURN           |     |
- * +----------+-----------------+----------------------+-----+
- *
- * <---------><----------------><----------------------><---->
- *     8               8                  4              1
- */
+            /*
+             * +----------+-----------------+----------------------+-----+
+             * |  r4-r11  | r0-r3, r12, LR, | PSP, PSPLIM, CONTROL |     |
+             * |          | PC, xPSR        | EXC_RETURN           |     |
+             * +----------+-----------------+----------------------+-----+
+             *
+             * <---------><----------------><----------------------><---->
+             *     8               8                  4              1
+             */
             #define MAX_CONTEXT_SIZE    21
 
-        #endif /* #if( configENABLE_TRUSTZONE == 1 ) */
+        #endif /* #if ( ( configENABLE_TRUSTZONE == 1 ) && ( configENABLE_PAC == 1 ) ) */
 
     #endif /* #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */
 
-/* Flags used for xMPU_SETTINGS.ulTaskFlags member. */
+    /* Flags used for xMPU_SETTINGS.ulTaskFlags member. */
     #define portSTACK_FRAME_HAS_PADDING_FLAG    ( 1UL << 0UL )
     #define portTASK_IS_PRIVILEGED_FLAG         ( 1UL << 1UL )
 
-/* Size of an Access Control List (ACL) entry in bits. */
+    /* Size of an Access Control List (ACL) entry in bits. */
     #define portACL_ENTRY_SIZE_BITS             ( 32U )
 
     typedef struct MPU_SETTINGS
@@ -312,7 +378,7 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
  * @brief Validate priority of ISRs that are allowed to call FreeRTOS
  * system calls.
  */
-#ifdef configASSERT
+#if ( configASSERT_DEFINED == 1 )
     #if ( portHAS_ARMV8M_MAIN_EXTENSION == 1 )
         void vPortValidateInterruptPriority( void );
         #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID()    vPortValidateInterruptPriority()

portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *

portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *

portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port_asm.s

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *

portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port_asm.s

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *

portable/ARMv8M/secure/context/secure_context.c

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -207,7 +207,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void )
      * securecontextNO_STACK when no secure context is loaded. */
     if( ( ulIPSR != 0 ) && ( pucStackLimit == securecontextNO_STACK ) )
     {
-        /* Ontain a free secure context. */
+        /* Obtain a free secure context. */
         ulSecureContextIndex = ulGetSecureContext( pvTaskHandle );
 
         /* Were we able to get a free context? */

portable/ARMv8M/secure/context/secure_context.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *

portable/ARMv8M/secure/heap/secure_heap.c

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -29,6 +29,9 @@
 /* Standard includes. */
 #include <stdint.h>
 
+/* Configuration includes. */
+#include "FreeRTOSConfig.h"
+
 /* Secure context heap includes. */
 #include "secure_heap.h"
 
@@ -234,7 +237,7 @@ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert )
         pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
     }
 
-    /* If the block being inserted plugged a gab, so was merged with the block
+    /* If the block being inserted plugged a gap, so was merged with the block
      * before and the block after, then it's pxNextFreeBlock pointer will have
      * already been set, and should not be set here as that would make it point
      * to itself. */
@@ -256,6 +259,7 @@ void * pvPortMalloc( size_t xWantedSize )
     BlockLink_t * pxNewBlockLink;
     void * pvReturn = NULL;
     size_t xAdditionalRequiredSize;
+    size_t xAllocatedBlockSize = 0;
 
     /* If this is the first call to malloc then the heap will require
      * initialisation to setup the list of free blocks. */
@@ -374,6 +378,8 @@ void * pvPortMalloc( size_t xWantedSize )
                     mtCOVERAGE_TEST_MARKER();
                 }
 
+                xAllocatedBlockSize = pxBlock->xBlockSize;
+
                 /* The block is being returned - it is allocated and owned by
                  * the application and has no "next" block. */
                 secureheapALLOCATE_BLOCK( pxBlock );
@@ -394,7 +400,10 @@ void * pvPortMalloc( size_t xWantedSize )
         mtCOVERAGE_TEST_MARKER();
     }
 
-    traceMALLOC( pvReturn, xWantedSize );
+    traceMALLOC( pvReturn, xAllocatedBlockSize );
+
+    /* Prevent compiler warnings when trace macros are not used. */
+    ( void ) xAllocatedBlockSize;
 
     #if ( secureconfigUSE_MALLOC_FAILED_HOOK == 1 )
     {

portable/ARMv8M/secure/heap/secure_heap.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *

portable/ARMv8M/secure/init/secure_init.c

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *

portable/ARMv8M/secure/init/secure_init.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *

portable/ARMv8M/secure/macros/secure_port_macros.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *

portable/BCC/16BitDOS/Flsh186/port.c

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *

portable/BCC/16BitDOS/Flsh186/prtmacro.h

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *

portable/BCC/16BitDOS/PC/port.c

@@ -1,6 +1,6 @@
 /*
  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
- * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  *
  * SPDX-License-Identifier: MIT
  *