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31 commits

Author SHA1 Message Date
William Wilgus
a5853b1173 FS#13796 - Add search to text editor plugin
Adds a case-insensitive find function to text_editor

Change-Id: I8d4bc7a65d2659d5f6aec0304e69905bf2ffe0e1
2026-03-07 12:58:04 -05:00
Solomon Peachy
c397746033 Translation updates:
* Slovak (Matej Golian)
  * Spanish (Javier Gutiérrez Gertrúdix)

Change-Id: I4d61779faffac552c21f4bd7d7fb7081919f8d36
2026-03-06 19:31:23 -05:00
Aidan MacDonald
a80911a0ce plugins: clean up IRAM memory region definitions
Check for USE_IRAM to determine if IRAM should be used.
SoCs that don't define USE_IRAM no longer need to define
IRAMSIZE to 0 either.

When IRAM is not used, any symbols bound for IRAM will
be discarded instead of linking them in DRAM. In theory
these symbols shouldn't exist, since nothing should be
placed into IRAM sections to begin with for !USE_IRAM.
If an IRAM section attribute leaks into the plugin/codec
anyway, it should now cause a link time error.

Change-Id: I55c1854cfe8beb5cb09b865336906f9945084b33
2026-03-06 16:26:35 -05:00
Aidan MacDonald
c9172d4ff8 plugins: clean up target DRAM/IRAM mapping defines
Move the definition of DRAMSIZE into the SoC-specific
ifdef block below. This keeps the memory map defines
for a SoC together in one place and as a result it is
much easier to understand.

Change-Id: Ie7293616a3c572b381cfeab3531751562c19a9c4
2026-03-06 16:26:04 -05:00
Solomon Peachy
e8daf314be mrobe500: fix yellow in a24142b234
LCD_FUDGE is now defined in the cpu header, as it's needed for memory
layouts.

Change-Id: I3a91581286cb7765f8217da34c6c87c15e74b399
2026-03-06 16:24:13 -05:00
Aidan MacDonald
a24142b234 firmware: cleanup duplicated DM320 LCD memory defines
Move the rather large block of code that's been copied
in three separate linker scripts into the CPU header.

Change-Id: I9f38e4901fa4ff699f00d97064a9cdaf7cfd6aab
2026-03-06 15:55:35 -05:00
Aidan MacDonald
99dd797169 firmware: cleanup PortalPlayer NOCACHE_BASE defines
Move the definition of NOCACHE_BASE to the CPU headers
instead of having them copy-and-pasted in a few places.

Change-Id: Ibbab27a5a07906d46dbd4dd9065f2238bc885d6b
2026-03-06 14:15:29 -05:00
Solomon Peachy
408f155f53 build: fix red in 7eeb4e4302
STORAGE_WANTS_ALIGN needs to be ignored for simulator builds

Change-Id: I4d788f91d3d1ed81c0621b9adac985ca188d918c
2026-03-06 13:37:27 -05:00
Aidan MacDonald
7eeb4e4302 firmware: refactor CACHEALIGN_BITS/SIZE defines
Mostly motivated by PP needing CACHEALIGN_SIZE in linker
scripts, which can't include system.h, so move these to
cpu.h instead. Also gets rid of the default 32 byte line
size that was used if the target didn't define alignment
itself. RK24xx, DM320, and JZ4740 were missing this but
have been confirmed (from datasheets) to use 32-byte cache
lines.

Add checks to make sure the macros are appropriately
(un)defined based on the HAVE_CPU_CACHE_ALIGN define,
and make sure their values are consistent when they
are defined.

Disable HAVE_CPU_CACHE_ALIGN for hosted targets since it
arguably doesn't matter if there's a cache, if we aren't
responsible for cache maintenance.

A few files in rbcodec use CACHEALIGN_SIZE, but these
can be converted to MEM_ALIGN_SIZE, which is identical
to CACHEALIGN_SIZE if the latter is defined. On other
targets, it aligns to at least sizeof(intptr_t).

Change-Id: If8cf8f6ec327dc3732f4cd5022a858546b9e63d6
2026-03-06 14:49:00 +00:00
Aidan MacDonald
e61bf40542 make: define PLUGIN when preprocessing plugin linker scripts
This matches the behavior of codecs, which define CODEC,
and is needed to get an accurate definition of USE_IRAM
out of config.h.

Change-Id: I84855ba88d01495bb63c609b3e4d67922b908440
2026-03-06 14:49:00 +00:00
Aidan MacDonald
dbfedcd65e stm32h743: rename CPU header to match other platform conventions
Change-Id: Ie7564df983aed460947ebde3bf73f8147d5bc974
2026-03-06 14:01:38 +00:00
Aidan MacDonald
7bf1c79cb5 make: have preprocess2file fail on error
The preprocess2file helper is mainly used to preprocess
linker scripts, but piping the preprocessor output to
'grep' masks the exit code of gcc, so if it fails (eg.
due to an #error directive) then it does not cause the
build to fail like it should.

In this particular case the grep commands don't seem to
be doing anything, since the "-P" option suppresses line
markers, which "grep -v ^$(_hash)" is probably meant to
filter out. The intent behind "grep -v ^$$" is unclear
since the preprocessor doesn't seem to output any line
beginning with '$', but in any event it seems unnecessary.

Change-Id: Ie23f5de1fe1bfb5890c7b2f3c7fa05401931d89f
2026-03-06 13:28:24 +00:00
Aidan MacDonald
676d3b6432 plugins: always include cpu.h in linker script
Change-Id: I5a5dad0c6094735fa3af676667232571bf0efdf3
2026-03-05 21:13:50 +00:00
Aidan MacDonald
f44b6c78e0 misc: respect standard __ASSEMBLER__ define in CPU headers
The JZ47xx and S5L87xx processor families used their own
special defines (__ASSEMBLY__ and ASM respectively) in
their CPU headers to check if they were included from an
assembly source file.

For GCC the standard seems to be __ASSEMBLER__, so check
for that instead and remove the non-standard symbols.
Being more consistent across platforms makes it easier to
include cpu.h from cross-platform files (eg. plugin.lds).

Change-Id: I282930cad34e1a2ff18166f3b4338548b34f4a49
2026-03-05 21:13:50 +00:00
Aidan MacDonald
5a236963e4 misc: get rid of unused LOADADDRESS define in makefiles
Change-Id: I990aaca9b0b8230efba09c87ace2430fbfa29b74
2026-03-05 20:11:07 +00:00
Aidan MacDonald
cf1e3fd5a3 misc: remove leftover pnx0101 support code
Remove now-unused stuff related to the PNX0101 processor,
which was missed during the removal of the IFP-7xx port.

Change-Id: I5ff248b3e83cb67a357743130c3e51ed84a720e5
2026-03-05 15:41:06 +00:00
Aidan MacDonald
58ffe7bc34 plugins: remove default value of DRAMORIG
Change-Id: Ia5efdbef207890682bfd8aa8cacce32d7e79c2b2
2026-03-05 10:31:35 -05:00
Solomon Peachy
d76c9c992c FS#13746: open_plugin_run() doesn't handle "not found" properly
If the specified key wasn't found, we would fall back to trying to launch
a plugin with the LANG_* key.  This will fail, resulting in an error
that spells out the (inappropriate) LANG_* text.

Instead, fail out with a more appropriate error.

Change-Id: I046878f87a2ef2bc994d0b7d037359695a18d392
2026-03-05 08:40:12 -05:00
Solomon Peachy
ba69fb9bbf doom: Rework audio init to properly respect pcm_sink capabilities
Try to use 11KHz if possible, if that's not an option, fall
back to 44KHz which is always available.  Simulators always use
44KHz.

Change-Id: I7547e7c1bddf7ce4634f7fd7bc64d4a5c9b62c29
2026-03-05 07:51:27 -05:00
mojyack
f81126bcf0 plugins: test_sampr: remove hw_freq_sampr usage
Change-Id: Iaf9f7f495364fd87db8e25f4ce147540b370f82b
2026-03-05 07:43:25 -05:00
William Wilgus
086c29267c [bugfix, AS] zxbox keyboard input overflows text variable
int zx_kbd_input(char* text/*, int buflen*/)
is supplied with a single char by all callers
thats fine till we get to here in the decode routine
while (*utf8)

since it just reads till it hits a 0 its probably fine
but Address Sanitizer caught it

make c a char array of 8 bytes to ensure a NULL

Change-Id: Iad3284df34cb7451422fc96ae0bb8e159ee440b0
2026-03-05 01:14:17 -05:00
Solomon Peachy
cef29a1986 fat: fsinfo structure references _clusters_ not sectors
These fields are defined by FAT32 itself, and are specified as 32-bit
values.  So switch them from sector_t to simple uint32_t.

Change-Id: I98afecfbe1f8a1b83fbdd4ec3fea016b8e0b985d
2026-03-04 13:10:46 -05:00
Aidan MacDonald
87f2024631 echoplayer: clock FMC from PLL1Q
Unlinking the FMC from the bus clock should make it
simpler to do CPU frequency scaling later on.

Change-Id: Ia87bbe3dd01ff25ea1520309680017b400471bfe
2026-03-04 10:23:23 -05:00
Aidan MacDonald
b155e2c35a echoplayer: modify LCD timings to disable PLL3 fractional mode
According to the datasheet, the PLL fractional mode is
apparently not supported in the medium VCO range.

The LCD isn't picky about front/back porch settings so
modify these to get a dot clock close to 6 MHz (within
~0.1% error).

Change-Id: I51647534db8c2b261391864db9262a0b04548e6d
2026-03-04 10:23:17 -05:00
Solomon Peachy
fe0c404db1 FS#13810 - Updated Italian Translation (Alessio Lenzi)
Change-Id: I8143e6fcb78dba6d5aabf9bf227862c1e025b6a9
2026-03-04 08:25:37 -05:00
Solomon Peachy
3a99ef21cd build-info: Add a newline before the [status] section
Marginal improvement in readability

Change-Id: Ic962ec2bb9ad09e5151cd4f712a9f5768da282bc
2026-03-04 08:17:12 -05:00
Solomon Peachy
5d1185774c plugins: Remove audio_master_sampr_list from the plugin API
From what I can tell it has _never_ been used.

Change-Id: I08f3860f04add35859e82b8e94abfa9789a45026
2026-03-03 21:31:58 -05:00
mojyack
f343168051 settings_list: apply playback freq changes only when current sink is builtin
Change-Id: I1410b9fef621be31676f10269fdb07d31d827acb
2026-03-03 20:02:52 -05:00
mojyack
38d978a512 plugins: sdl: remove hw_freq_sampr usage
Change-Id: I78311f63f04a68b968a584dd485e795813876fc3
2026-03-03 20:00:46 -05:00
mojyack
f87ff3a9b2 playback: support non-builtin sinks in audio_guess_frequency
Change-Id: I87b1b489ffc5b9ae05c3233bc091cd7be3da406e
2026-03-03 18:19:07 -05:00
mojyack
76d63246c5 playback: do not hardcode pcm sink in audio_set_playback_frequency
make audio_set_playback_frequency() can be used for non-builtin pcm
sinks.

Change-Id: I9d1110f28753e912b84515594a1361cd17fa5e74
2026-03-03 18:17:16 -05:00
75 changed files with 573 additions and 842 deletions

View file

@ -159,7 +159,7 @@ void codec_get_full_path(char *path, const char *codec_root_fn)
CODEC_EXTENSION, codec_root_fn);
}
/* Returns pointer to and size of free codec RAM. Aligns to CACHEALIGN_SIZE. */
/* Returns pointer to and size of free codec RAM. Aligns to MEM_ALIGN_SIZE. */
void *codec_get_buffer_callback(size_t *size)
{
void *buf = &codecbuf[codec_size];
@ -169,7 +169,7 @@ void *codec_get_buffer_callback(size_t *size)
return NULL;
*size = s;
ALIGN_BUFFER(buf, *size, CACHEALIGN_SIZE);
ALIGN_BUFFER(buf, *size, MEM_ALIGN_SIZE);
return buf;
}

View file

@ -24,6 +24,7 @@
# - Lianela Sky
# - Guillermo Garcia Rojas
# - Sergio Delgado
# - Javier Gutiérrez Gertrúdix
<phrase>
id: LANG_SET_BOOL_YES
desc: bool true representation
@ -276,10 +277,10 @@
*: "Balance"
</source>
<dest>
*: "Balance"
*: "~Balance"
</dest>
<voice>
*: "Balance"
*: "~Balance"
</voice>
</phrase>
<phrase>
@ -4673,7 +4674,7 @@
*: "No se puede abrir %s"
</dest>
<voice>
*: "No se puede abrir %s"
*: "No se puede abrir el complemento"
</voice>
</phrase>
<phrase>
@ -4684,10 +4685,10 @@
*: "Failed reading %s"
</source>
<dest>
*: "Error al cargar %s"
*: "Error al leer %s"
</dest>
<voice>
*: "Error al cargar %s"
*: "Error al leer archivo"
</voice>
</phrase>
<phrase>
@ -13003,20 +13004,6 @@
*: "Bit rate promedio"
</voice>
</phrase>
<phrase>
id: LANG_PLAYTIME_ERROR
desc: playing time screen
user: core
<source>
*: "Error while gathering info"
</source>
<dest>
*: "Error al recopilar información"
</dest>
<voice>
*: "Error al recopilar información"
</voice>
</phrase>
<phrase>
id: LANG_PLAYING_TIME
desc: onplay menu
@ -14762,7 +14749,7 @@
user: core
<source>
*: "Press LEFT to cancel."
android,hifietma*,zenvision: "Press BACK to cancel."
android,hifietma*: "Press BACK to cancel."
cowond2,creativezenxfi2,ibassodx50,ibassodx90,mrobe500,ondavx747: "Press POWER to cancel."
ihifi760,ihifi960: "Double tap RETURN to cancel."
ihifi770,ihifi770c,ihifi800: "Press HOME to cancel."
@ -14777,7 +14764,7 @@
</source>
<dest>
*: "Presiona IZQUIERDA para cancelar."
android,hifietma*,zenvision: "Presiona ATRÁS para cancelar."
android,hifietma*: "Presiona ATRÁS para cancelar."
cowond2,creativezenxfi2,ibassodx50,ibassodx90,mrobe500,ondavx747: "Presiona EL BOTÓN DE ENCENDIDO para cancelar."
ihifi760,ihifi960: "Doble toque a VOLVER para cancelar."
ihifi770,ihifi770c,ihifi800: "Presiona INICIO para cancelar."
@ -14792,7 +14779,7 @@
</dest>
<voice>
*: "Presiona IZQUIERDA para cancelar."
android,hifietma*,zenvision: "Presiona ATRÁS para cancelar."
android,hifietma*: "Presiona ATRÁS para cancelar."
cowond2,creativezenxfi2,ibassodx50,ibassodx90,mrobe500,ondavx747: "Presiona EL BOTÓN DE ENCENDIDO para cancelar."
ihifi760,ihifi960: "Doble toque a VOLVER para cancelar."
ihifi770,ihifi770c,ihifi800: "Presiona INICIO para cancelar."
@ -15287,7 +15274,7 @@
</phrase>
<phrase>
id: LANG_VOICED_DATE_FORMAT
desc: format string for how dates will be read back. Y == 4-digit year, A == month name, m == numeric month, d == numeric day. For example, "AdY" will read "January 21 2021"
desc: format string for how dates will be read back. Y == 4-digit year (grouped), y == 4-digit year (numeric), A == month name, m == numeric month, d == numeric day. For example, for 2021-01-05, "AdY" will be voiced as "January 5 twenty twenty-one" and "dmy" will be voiced as "5 1 two thousand twenty one
user: core
<source>
*: "dAY"
@ -15908,20 +15895,6 @@
*: "Navegador Predeterminado"
</voice>
</phrase>
<phrase>
id: LANG_AMAZE_MENU
desc: Amaze game
user: core
<source>
*: "Amaze Main Menu"
</source>
<dest>
*: "Menú Principal Amaze"
</dest>
<voice>
*: "Menú Principal Amaze"
</voice>
</phrase>
<phrase>
id: LANG_SET_MAZE_SIZE
desc: Maze size in Amaze game
@ -16174,34 +16147,6 @@
*: "Ajustes Mik mod"
</voice>
</phrase>
<phrase>
id: LANG_MIKMOD_MENU
desc: mikmod plugin
user: core
<source>
*: "Mikmod Menu"
</source>
<dest>
*: "Menú Mikmod"
</dest>
<voice>
*: "Menú Mik mod"
</voice>
</phrase>
<phrase>
id: LANG_CHESSBOX_MENU
desc: chessbox plugin
user: core
<source>
*: "Chessbox Menu"
</source>
<dest>
*: "Menú Chessbox"
</dest>
<voice>
*: "Menú Chessbox"
</voice>
</phrase>
<phrase>
id: VOICE_INVALID_VOICE_FILE
desc: played if the voice file fails to load
@ -16925,3 +16870,116 @@
*: "Ordenar pistas de reproducción"
</voice>
</phrase>
<phrase>
id: LANG_USB_DAC
desc: in settings_menu
user: core
<source>
*: none
usbdac: "USB-DAC"
</source>
<dest>
*: none
usbdac: "DAC-USB"
</dest>
<voice>
*: none
usbdac: "DAC-USB"
</voice>
</phrase>
<phrase>
id: LANG_WHILE_USB_CHARGE_ONLY
desc: in settings_menu
user: core
<source>
*: none
usbdac: "While In USB Charge-Only Mode"
</source>
<dest>
*: none
usbdac: "Durante modo de solo carga USB"
</dest>
<voice>
*: none
usbdac: "Durante modo de solo carga USB"
</voice>
</phrase>
<phrase>
id: LANG_WHILE_MASS_STORAGE_USB_ONLY
desc: in settings_menu
user: core
<source>
*: none
usbdac: "While In USB Mass-Storage Mode"
</source>
<dest>
*: none
usbdac: "Durante modo de almacenamiento masivo USB"
</dest>
<voice>
*: none
usbdac: "Durante modo de almacenamiento masivo USB"
</voice>
</phrase>
<phrase>
id: LANG_USB_DAC_ACTIVE
desc: for splash
user: core
<source>
*: none
usbdac: "USB-DAC Active"
</source>
<dest>
*: none
usbdac: "DAC-USB Activo"
</dest>
<voice>
*: none
usbdac: "DAC-USB Activo"
</voice>
</phrase>
<phrase>
id: LANG_ANNOUNCE_STATUS
desc: announnnce_status plugin
user: core
<source>
*: "Announce Status"
</source>
<dest>
*: "Anuncio de estado"
</dest>
<voice>
*: "Anuncio de estado"
</voice>
</phrase>
<phrase>
id: LANG_USE_LED_INDICATORS
desc: LED indicators setting
user: core
<source>
*: none
general_purpose_led: "Use LED indicators"
</source>
<dest>
*: none
general_purpose_led: "Usar indicadores LED"
</dest>
<voice>
*: none
general_purpose_led: "Usar indicadores LED"
</voice>
</phrase>
<phrase>
id: LANG_KEEP_DIRECTORY
desc: file browser setting
user: core
<source>
*: "Always remember last folder"
</source>
<dest>
*: "Recordar siempre la última carpeta"
</dest>
<voice>
*: "Recordar siempre la última carpeta"
</voice>
</phrase>

View file

@ -14361,7 +14361,7 @@
user: core
<source>
*: "Press LEFT to cancel."
android,hifietma*,zenvision: "Press BACK to cancel."
android,hifietma*: "Press BACK to cancel."
cowond2,creativezenxfi2,ibassodx50,ibassodx90,mrobe500,ondavx747: "Press POWER to cancel."
ihifi760,ihifi960: "Double tap RETURN to cancel."
ihifi770,ihifi770c,ihifi800: "Press HOME to cancel."
@ -14376,7 +14376,7 @@
</source>
<dest>
*: "Premere LEFT per annullare."
android,hifietma*,zenvision: "Premere BACK per annullare."
android,hifietma*: "Premere BACK per annullare."
cowond2,creativezenxfi2,ibassodx50,ibassodx90,mrobe500,ondavx747: "Premere POWER per annullare."
ihifi760,ihifi960: "Premere due volte RETURN per annullare."
ihifi770,ihifi770c,ihifi800: "Premere HOME per annullare."
@ -14391,7 +14391,7 @@
</dest>
<voice>
*: "Premere LEFT per annullare."
android,hifietma*,zenvision: "Premere BACK per annullare."
android,hifietma*: "Premere BACK per annullare."
cowond2,creativezenxfi2,ibassodx50,ibassodx90,mrobe500,ondavx747: "Premere POWER per annullare."
ihifi760,ihifi960: "Premere due volte RETURN per annullare."
ihifi770,ihifi770c,ihifi800: "Premere HOME per annullare."
@ -15195,13 +15195,13 @@
</phrase>
<phrase>
id: LANG_VOICED_DATE_FORMAT
desc: format string for how dates will be read back. Y == 4-digit year, A == month name, m == numeric month, d == numeric day. For example, "AdY" will read "January 21 2021"
desc: format string for how dates will be read back. Y == 4-digit year (grouped), y == 4-digit year (numeric), A == month name, m == numeric month, d == numeric day. For example, for 2021-01-05, "AdY" will be voiced as "January 5 twenty twenty-one" and "dmy" will be voiced as "5 1 two thousand twenty one
user: core
<source>
*: "dAY"
</source>
<dest>
*: "dmY"
*: "dmy"
</dest>
<voice>
*: ""
@ -16960,3 +16960,17 @@
*: "Annuncia Lo Stato"
</voice>
</phrase>
<phrase>
id: LANG_KEEP_DIRECTORY
desc: file browser setting
user: core
<source>
*: "Always remember last folder"
</source>
<dest>
*: "Ricorda sempre l'ultima cartella"
</dest>
<voice>
*: "Ricorda sempre l'ultima cartella"
</voice>
</phrase>

View file

@ -11782,10 +11782,10 @@
*: "One per playlist"
</source>
<dest>
*: "Jedna na playlist"
*: "Jedna na plejlist"
</dest>
<voice>
*: "Jedna na playlist"
*: "Jedna na plejlist"
</voice>
</phrase>
<phrase>
@ -12466,10 +12466,10 @@
*: "Playlist elapsed:"
</source>
<dest>
*: "Playlist prehraté:"
*: "Plejlist uplynulo:"
</dest>
<voice>
*: "Playlist prehraté"
*: "Plejlist uplynulo"
</voice>
</phrase>
<phrase>
@ -12985,10 +12985,10 @@
*: "Track elapsed:"
</source>
<dest>
*: "Stopa prehraté:"
*: "Stopa uplynulo:"
</dest>
<voice>
*: "Stopa prehraté"
*: "Stopa uplynulo"
</voice>
</phrase>
<phrase>
@ -13429,7 +13429,7 @@
*: "Storage (Done / Remaining):"
</source>
<dest>
*: "Miesto: (dokončené / zostaáva)"
*: "Miesto: (dokončené/zostáva)"
</dest>
<voice>
*: "Miesto"
@ -13825,10 +13825,10 @@
*: "Average bitrate:"
</source>
<dest>
*: "Priemerný bitrate:"
*: "Priemerná bitová rýchlosť:"
</dest>
<voice>
*: "Priemerný bitrate"
*: "Priemerná bitová rýchlosť"
</voice>
</phrase>
<phrase>
@ -13867,10 +13867,10 @@
*: "Average track size:"
</source>
<dest>
*: "Priemerná dĺžka stopy:"
*: "Priemerná veľkosť stopy:"
</dest>
<voice>
*: "Priemerná dĺžka stopy"
*: "Priemerná veľkosť stopy"
</voice>
</phrase>
<phrase>
@ -14530,10 +14530,10 @@
*: "Elapsed"
</source>
<dest>
*: "Trvanie"
*: "Uplynulo"
</dest>
<voice>
*: "Trvanie"
*: "Uplynulo"
</voice>
</phrase>
<phrase>
@ -15470,10 +15470,10 @@
*: "Keep Current Track When Replacing Playlist"
</source>
<dest>
*: "Ponechať aktuálnu stopu pri nahradení playlistu"
*: "Ponechať aktuálnu stopu pri nahradení plejlistu"
</dest>
<voice>
*: "Ponechať aktuálnu stopu pri nahradení playlistu"
*: "Ponechať aktuálnu stopu pri nahradení plejlistu"
</voice>
</phrase>
<phrase>

View file

@ -479,6 +479,10 @@ int open_plugin_run(const char *key)
{
int ret = 0;
int opret = open_plugin_load_entry(key);
if (opret == OPEN_PLUGIN_NOT_FOUND) {
splashf(HZ*2, ID2P(LANG_PLUGIN_CANT_OPEN), key ? P2STR((unsigned char *)key) : "");
return ret;
}
struct open_plugin_entry_t *op_entry = open_plugin_get_entry();
if (opret == OPEN_PLUGIN_NEEDS_FLUSHED)
op_update_dat(op_entry, false);

View file

@ -27,6 +27,7 @@
#include "panic.h"
#include "core_alloc.h"
#include "sound.h"
#include "pcm_sink.h"
#include "codecs.h"
#include "codec_thread.h"
#include "voice_thread.h"
@ -4235,29 +4236,13 @@ void audio_set_crossfade(int enable)
#ifdef HAVE_PLAY_FREQ
static unsigned long audio_guess_frequency(struct mp3entry *id3)
{
switch (id3->frequency)
const struct pcm_sink_caps* caps = pcm_sink_caps(pcm_current_sink());
for (size_t i = 0; i < caps->num_samprs; i += 1)
{
#if HAVE_PLAY_FREQ >= 48
case 44100:
return SAMPR_44;
case 48000:
return SAMPR_48;
#endif
#if HAVE_PLAY_FREQ >= 96
case 88200:
return SAMPR_88;
case 96000:
return SAMPR_96;
#endif
#if HAVE_PLAY_FREQ >= 192
case 176400:
return SAMPR_176;
case 192000:
return SAMPR_192;
#endif
default:
return (id3->frequency % 4000) ? SAMPR_44 : SAMPR_48;
if (id3->frequency == caps->samprs[i])
return id3->frequency;
}
return (id3->frequency % 4000) ? SAMPR_44 : SAMPR_48;
}
static bool audio_auto_change_frequency(struct mp3entry *id3, bool play)
@ -4282,27 +4267,16 @@ static bool audio_auto_change_frequency(struct mp3entry *id3, bool play)
void audio_set_playback_frequency(unsigned int sample_rate_hz)
{
/* sample_rate_hz == 0 is "automatic", and also a sentinel */
#if HAVE_PLAY_FREQ >= 192
static const unsigned int play_sampr[] = {SAMPR_44, SAMPR_48, SAMPR_88, SAMPR_96, SAMPR_176, SAMPR_192, 0 };
#elif HAVE_PLAY_FREQ >= 96
static const unsigned int play_sampr[] = {SAMPR_44, SAMPR_48, SAMPR_88, SAMPR_96, 0 };
#elif HAVE_PLAY_FREQ >= 48
static const unsigned int play_sampr[] = {SAMPR_44, SAMPR_48, 0 };
#else
#error "HAVE_PLAY_FREQ < 48 ??"
#endif
const unsigned int *p_sampr = play_sampr;
unsigned int sampr = 0;
while (*p_sampr != 0)
const struct pcm_sink_caps* caps = pcm_sink_caps(pcm_current_sink());
for (size_t i = 0; i < caps->num_samprs; i += 1)
{
if (*p_sampr == sample_rate_hz)
if (caps->samprs[i] == sample_rate_hz)
{
sampr = *p_sampr;
sampr = caps->samprs[i];
break;
}
p_sampr++;
}
if (sampr == 0)

View file

@ -642,7 +642,6 @@ static const struct plugin_api rockbox_api = {
sound_get_pitch,
sound_set_pitch,
#endif
&audio_master_sampr_list[0],
&hw_freq_sampr[0],
pcm_play_lock,
pcm_play_unlock,

View file

@ -179,7 +179,7 @@ int plugin_open(const char *plugin, const char *parameter);
* when this happens please take the opportunity to sort in
* any new functions "waiting" at the end of the list.
*/
#define PLUGIN_API_VERSION 280
#define PLUGIN_API_VERSION 281
/* 239 Marks the removal of ARCHOS HWCODEC and CHARCELL */
@ -741,7 +741,6 @@ struct plugin_api {
int32_t (*sound_get_pitch)(void);
void (*sound_set_pitch)(int32_t pitch);
#endif
const unsigned long *audio_master_sampr_list;
const unsigned long *hw_freq_sampr;
void (*pcm_play_lock)(void);
void (*pcm_play_unlock)(void);

View file

@ -31,7 +31,7 @@ $(CHESSBOX_OBJDIR)/chessbox.rock: $(CHESSBOX_OBJ)
$(CHESSBOX_OBJDIR)/chessbox.refmap: $(CHESSBOX_OBJ)
$(CHESSBOX_OUTLDS): $(PLUGIN_LDS) $(CHESSBOX_OBJDIR)/chessbox.refmap
$(call PRINTS,PP $(@F))$(call preprocess2file,$<,$@,-DOVERLAY_OFFSET=$(shell \
$(call PRINTS,PP $(@F))$(call preprocess2file,$<,$@,-DPLUGIN -DOVERLAY_OFFSET=$(shell \
$(TOOLSDIR)/ovl_offset.pl $(CHESSBOX_OBJDIR)/chessbox.refmap))
$(CHESSBOX_OBJDIR)/chessbox.ovl: $(CHESSBOX_OBJ) $(CHESSBOX_OUTLDS)

View file

@ -51,16 +51,11 @@
#define SAMPLECOUNT 128
#define NUM_CHANNELS 24
// It is 2 for 16bit, and 2 for two channels.
#define BUFMUL 2
#define BUFMUL 2 // 2 channels
#define SAMPLESIZE sizeof(short) // 16-bit
#define MIXBUFFERSIZE (SAMPLECOUNT*BUFMUL)
#ifdef HW_HAVE_11
#define SAMPLERATE SAMPR_11 // 44100 22050 11025
#else
#define SAMPLERATE SAMPR_44 // 44100 22050 11025
#endif
#define SAMPLESIZE 2 // 16bit
static unsigned short samplerate;
// The global mixing buffer.
// Basically, samples from all active internal channels
@ -207,9 +202,9 @@ static void updateSoundParams(int handle, int volume, int seperation, int pitch)
// Patched to shift left *then* divide, to minimize roundoff errors
// as well as to use SAMPLERATE as defined above, not to assume 11025 Hz
if (pitched_sounds)
channelinfo[slot].step = step + (((channelinfo[slot].samplerate<<16)/SAMPLERATE)-65536);
channelinfo[slot].step = step + (((channelinfo[slot].samplerate<<16)/samplerate)-65536);
else
channelinfo[slot].step = ((channelinfo[slot].samplerate<<16)/SAMPLERATE);
channelinfo[slot].step = ((channelinfo[slot].samplerate<<16)/samplerate);
// Separation, that is, orientation/stereo.
// range is: 1 - 256
@ -265,7 +260,7 @@ void I_SetChannels()
// This table provides step widths for pitch parameters.
for (i=-128 ; i<128 ; i++)
steptablemid[i]=2;
// steptablemid[i] = (int)(pow(1.2, ((double)i/(64.0*SAMPLERATE/11025)))*65536.0);
// steptablemid[i] = (int)(pow(1.2, ((double)i/(64.0*samplerate/11025)))*65536.0);
// Generates volume lookup tables
// which also turn the unsigned samples
@ -462,7 +457,7 @@ void get_more(const void** start, size_t* size)
I_UpdateSound(); // Force sound update
*start = mixbuffer;
*size = MIXBUFFERSIZE*sizeof(short);
*size = MIXBUFFERSIZE*SAMPLESIZE;
}
@ -480,10 +475,25 @@ void I_ShutdownSound(void)
rb->mixer_set_frequency(HW_SAMPR_DEFAULT);
}
#if defined(SIMULATOR)
#define PREFERRED_SAMPR SAMPR_44
#else
#define PREFERRED_SAMPR SAMPR_11
#endif
void I_InitSound()
{
int i;
const struct pcm_sink_caps* caps = rb->pcm_current_sink_caps();
for (i = 0 ; i < caps->num_samprs; i++) {
if (caps->samprs[i] == PREFERRED_SAMPR)
break;
}
if (i == caps->num_samprs)
i = SAMPR_44;
samplerate = caps->samprs[i];
// Initialize external data (all sounds) at start, keep static.
printf( "I_InitSound: ");
rb->audio_stop();
@ -493,11 +503,11 @@ void I_InitSound()
rb->audio_set_input_source(AUDIO_SRC_PLAYBACK, SRCF_PLAYBACK);
rb->audio_set_output_source(AUDIO_SRC_PLAYBACK);
#endif
rb->mixer_set_frequency(SAMPLERATE);
rb->mixer_set_frequency(samplerate);
vol_lookup=malloc(128*256*sizeof(int));
mixbuffer=malloc(MIXBUFFERSIZE*sizeof(short));
mixbuffer=malloc(MIXBUFFERSIZE*SAMPLESIZE);
steptable=malloc(256*sizeof(int));
for (i=1 ; i<NUMSFX ; i++)

View file

@ -28,7 +28,7 @@ $(GOBAN_BUILDDIR)/goban.rock: $(GOBAN_OBJ)
$(GOBAN_BUILDDIR)/goban.refmap: $(GOBAN_OBJ)
$(GOBAN_OUTLDS): $(PLUGIN_LDS) $(GOBAN_BUILDDIR)/goban.refmap
$(call PRINTS,PP $(@F))$(call preprocess2file,$<,$@,-DOVERLAY_OFFSET=$(shell \
$(call PRINTS,PP $(@F))$(call preprocess2file,$<,$@,-DPLUGIN -DOVERLAY_OFFSET=$(shell \
$(TOOLSDIR)/ovl_offset.pl $(GOBAN_BUILDDIR)/goban.refmap))
$(GOBAN_BUILDDIR)/goban.ovl: $(GOBAN_OBJ) $(GOBAN_OUTLDS)

View file

@ -50,5 +50,5 @@ $(IMGVBUILDDIR)/%.refmap: $(APPSDIR)/plugin.h $(IMGVSRCDIR)/imageviewer.h $(PLUG
-lgcc $(IMGDECLDFLAGS)
$(IMGVBUILDDIR)/%.link: $(PLUGIN_LDS) $(IMGVBUILDDIR)/%.refmap
$(call PRINTS,PP $(@F))$(call preprocess2file,$<,$@,-DIMGVDECODER_OFFSET=$(shell \
$(call PRINTS,PP $(@F))$(call preprocess2file,$<,$@,-DPLUGIN -DIMGVDECODER_OFFSET=$(shell \
$(TOOLSDIR)/ovl_offset.pl $(IMGVBUILDDIR)/$*.refmap))

View file

@ -65,7 +65,7 @@ $(LUA_BUILDDIR)/%.lua: $(LUA_INCLUDEDIR)/%.lua | $(LUA_BUILDDIR)
$(LUA_BUILDDIR)/lua.refmap: $(LUA_OBJ) $(TLSFLIB)
$(LUA_OUTLDS): $(PLUGIN_LDS) $(LUA_BUILDDIR)/lua.refmap
$(call PRINTS,PP $(@F))$(call preprocess2file,$<,$@,-DOVERLAY_OFFSET=$(shell \
$(call PRINTS,PP $(@F))$(call preprocess2file,$<,$@,-DPLUGIN -DOVERLAY_OFFSET=$(shell \
$(TOOLSDIR)/ovl_offset.pl $(LUA_BUILDDIR)/lua.refmap))
$(LUA_BUILDDIR)/lua.ovl: $(LUA_OBJ) $(TLSFLIB) $(LUA_OUTLDS)

View file

@ -29,7 +29,7 @@ $(PICTUREFLOW_OBJDIR)/pictureflow.rock: $(PICTUREFLOW_OBJ)
$(PICTUREFLOW_OBJDIR)/pictureflow.refmap: $(PICTUREFLOW_OBJ)
$(PICTUREFLOW_OUTLDS): $(PLUGIN_LDS) $(PICTUREFLOW_OBJDIR)/pictureflow.refmap
$(call PRINTS,PP $(@F))$(call preprocess2file,$<,$@,-DOVERLAY_OFFSET=$(shell \
$(call PRINTS,PP $(@F))$(call preprocess2file,$<,$@,-DPLUGIN -DOVERLAY_OFFSET=$(shell \
$(TOOLSDIR)/ovl_offset.pl $(PICTUREFLOW_OBJDIR)/pictureflow.refmap))
$(PICTUREFLOW_OBJDIR)/pictureflow.ovl: $(PICTUREFLOW_OBJ) $(PICTUREFLOW_OUTLDS)

View file

@ -1,4 +1,6 @@
#define __ASSEMBLER__
#include "config.h"
#include "cpu.h"
/* These output formats should be in the config-files */
@ -13,152 +15,79 @@ OUTPUT_FORMAT(elf32-littlemips)
#error Unknown CPU architecture
#endif
#if defined(CPU_PP)
#ifdef CPU_PP502x
#define NOCACHE_BASE 0x10000000
#else
#define NOCACHE_BASE 0x28000000
#endif /* CPU_* */
#define CACHEALIGN_SIZE 16
#endif /* CPU_PP */
#if CONFIG_CPU==IMX31L
/* No fudges! */
#include "imx31l.h"
#define DRAMSIZE ((MEMORYSIZE * 0x100000) - PLUGIN_BUFFER_SIZE \
- CODEC_SIZE - QHARRAY_SIZE - FRAME_SIZE - TTB_SIZE)
#elif CONFIG_CPU==DM320
#ifndef LCD_NATIVE_WIDTH
#define LCD_NATIVE_WIDTH LCD_WIDTH
#endif
#ifndef LCD_NATIVE_HEIGHT
#define LCD_NATIVE_HEIGHT LCD_HEIGHT
#endif
#ifdef MROBE_500
/* Give this 1 meg to allow it to align to the MMU boundary */
#define LCD_FUDGE LCD_NATIVE_WIDTH%32
#define LCD_BUFFER_SIZE ((LCD_NATIVE_WIDTH+LCD_FUDGE)*LCD_NATIVE_HEIGHT*2)
#define LCD_TTB_AREA 0x100000*((LCD_BUFFER_SIZE>>19)+1)
#else
/* must be 16Kb (0x4000) aligned */
#define TTB_SIZE (0x4000)
#define LCD_BUFFER_SIZE (LCD_NATIVE_WIDTH*LCD_NATIVE_HEIGHT*2)
#define LCD_TTB_AREA (TTB_SIZE + LCD_BUFFER_SIZE)
#endif
#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGIN_BUFFER_SIZE - CODEC_SIZE - LCD_TTB_AREA
#elif CONFIG_CPU==S3C2440
#include "cpu.h"
/* must be 16Kb (0x4000) aligned */
#define TTB_SIZE (0x4000)
#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGIN_BUFFER_SIZE - CODEC_SIZE - LCD_BUFFER_SIZE - TTB_SIZE
#elif CONFIG_CPU==TCC7801
#include "cpu.h"
#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGIN_BUFFER_SIZE - CODEC_SIZE - TTB_SIZE
#elif CONFIG_CPU==AS3525 || CONFIG_CPU==AS3525v2
#include "cpu.h"
#define DRAMORIG DRAM_ORIG
#if defined(AMS_LOWMEM) || (CONFIG_CPU == AS3525v2)
#define DRAMSIZE (DRAM_SIZE - PLUGIN_BUFFER_SIZE - TTB_SIZE)
#else
#define DRAMSIZE (DRAM_SIZE - PLUGIN_BUFFER_SIZE - CODEC_SIZE - TTB_SIZE)
#endif
#elif CONFIG_CPU==S5L8702 || CONFIG_CPU==S5L8720
#define ASM
#include "cpu.h"
#define DRAMSIZE (DRAM_SIZE - PLUGIN_BUFFER_SIZE - CODEC_SIZE - TTB_SIZE)
#elif CONFIG_CPU==IMX233
#include "cpu.h"
#define DRAMSIZE (DRAM_SIZE - PLUGIN_BUFFER_SIZE - CODEC_SIZE - FRAME_SIZE - TTB_SIZE)
#elif CONFIG_CPU == JZ4732 || CONFIG_CPU == JZ4760B
/* fake 'iram' region occupies first 16k */
#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGIN_BUFFER_SIZE - CODEC_SIZE - 0x4000
#elif CONFIG_CPU==X1000
#include "cpu.h"
#define DRAMSIZE (X1000_DRAM_SIZE - PLUGIN_BUFFER_SIZE - CODEC_SIZE)
#endif
/* default to full RAM (minus codecs&plugins) unless specified otherwise */
#ifndef DRAMSIZE
#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGIN_BUFFER_SIZE - CODEC_SIZE
#endif
/* MCF5249 have 96KB of IRAM */
#if CONFIG_CPU == MCF5249
#define DRAMORIG 0x31000000
#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGIN_BUFFER_SIZE - CODEC_SIZE
#define IRAMORIG 0x1000c000
#define IRAMSIZE 0xc000
/* MCF5250 have 128KB of IRAM */
#elif CONFIG_CPU == MCF5250
#define DRAMORIG 0x31000000
#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGIN_BUFFER_SIZE - CODEC_SIZE
#define IRAMORIG 0x1000c800
#define IRAMSIZE 0x13800
#elif CONFIG_CPU == PP5022 || CONFIG_CPU == PP5024
/* PP5022/24 have 128KB of IRAM */
#define DRAMORIG 0x00000000
#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGIN_BUFFER_SIZE - CODEC_SIZE
#define IRAMORIG 0x4000c000
#define IRAMSIZE 0x14000
#elif defined(CPU_PP)
/* all other PP's have 96KB of IRAM */
#define DRAMORIG 0x00000000
#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGIN_BUFFER_SIZE - CODEC_SIZE
#define IRAMORIG 0x4000c000
#define IRAMSIZE 0x0c000
#elif CONFIG_CPU == PNX0101
#define DRAMORIG 0xc00000
#define IRAMORIG 0x407000
#define IRAMSIZE 0x9000
#elif CONFIG_CPU == IMX31L || CONFIG_CPU == S3C2440
#elif CONFIG_CPU == IMX31L
#define DRAMORIG 0x0
#define IRAM DRAM
#define IRAMSIZE 0
#define DRAMSIZE ((MEMORYSIZE * 0x100000) - PLUGIN_BUFFER_SIZE \
- CODEC_SIZE - QHARRAY_SIZE - FRAME_SIZE - TTB_SIZE)
#elif CONFIG_CPU == S3C2440
#define DRAMORIG 0x0
#define DRAMSIZE ((MEMORYSIZE * 0x100000) - PLUGIN_BUFFER_SIZE \
- CODEC_SIZE - LCD_BUFFER_SIZE - TTB_SIZE)
#elif CONFIG_CPU==DM320
#define DRAMORIG CONFIG_SDRAM_START
#define IRAM DRAM
#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGIN_BUFFER_SIZE - CODEC_SIZE - LCD_TTB_AREA
/* The bit of IRAM that is available is used in the core */
#define IRAMSIZE 0
#elif defined(CPU_TCC780X)
#elif CONFIG_CPU==TCC7801
#define DRAMORIG 0x20000000
#if CONFIG_CPU==TCC7801
#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGIN_BUFFER_SIZE - CODEC_SIZE - TTB_SIZE
#define IRAMORIG 0x1000c000
#define IRAMSIZE 0xc000
#else
#define IRAM DRAM
#define IRAMSIZE 0
#endif
#elif CONFIG_CPU==AS3525 || CONFIG_CPU==AS3525v2
#if defined(AMS_LOWMEM) || (CONFIG_CPU == AS3525v2)
#define IRAMSIZE 0 /* simulates no IRAM since codec is already entirely in IRAM */
#define CODEC_ORIGIN (IRAM_ORIG + IRAM_SIZE - CODEC_SIZE)
#define PLUGIN_ORIGIN (DRAM_ORIG + DRAMSIZE)
#else
#elif CONFIG_CPU==AS3525 && !defined(AMS_LOWMEM)
#define DRAMORIG DRAM_ORIG
#define DRAMSIZE (DRAM_SIZE - PLUGIN_BUFFER_SIZE - CODEC_SIZE - TTB_SIZE)
#define IRAMORIG (IRAM_ORIG + 0x20000)
#define IRAMSIZE (IRAM_ORIG + IRAM_SIZE - IRAMORIG)
#endif
#elif CONFIG_CPU==AS3525v2 || (CONFIG_CPU == AS3525 && defined(AMS_LOWMEM))
#define DRAMORIG DRAM_ORIG
#define DRAMSIZE (DRAM_SIZE - PLUGIN_BUFFER_SIZE - TTB_SIZE)
/* No IRAM defined, instead IRAM is exclusively used for the entire codec */
#define CODEC_ORIGIN (IRAM_ORIG + IRAM_SIZE - CODEC_SIZE)
#define PLUGIN_ORIGIN (DRAM_ORIG + DRAMSIZE)
#elif CONFIG_CPU==S5L8700
/* S5L8700 have 256KB of IRAM */
#define DRAMORIG 0x08000000
#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGIN_BUFFER_SIZE - CODEC_SIZE
#define IRAMORIG (0x00000000 + (48*1024))
#define IRAMSIZE (208*1024)
#elif CONFIG_CPU==S5L8701
/* S5L8701 have 176KB of IRAM */
#define DRAMORIG 0x08000000
#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGIN_BUFFER_SIZE - CODEC_SIZE
#define IRAMORIG (0x00000000 + (48*1024))
#define IRAMSIZE (128*1024)
@ -166,6 +95,7 @@ OUTPUT_FORMAT(elf32-littlemips)
/* S5L8702 have 256KB of IRAM */
/* IRAM1 (2nd 128KB block) is not used because it is slower than DRAM */
#define DRAMORIG 0x08000000
#define DRAMSIZE (DRAM_SIZE - PLUGIN_BUFFER_SIZE - CODEC_SIZE - TTB_SIZE)
#define IRAMORIG (0x00000000 + (48*1024))
#define IRAMSIZE (80*1024)
@ -173,45 +103,35 @@ OUTPUT_FORMAT(elf32-littlemips)
/* S5L8720 have 192KB of IRAM */
/* TODO: check if IRAM1 is also slow as in S5L8702 above */
#define DRAMORIG 0x08000000
#define DRAMSIZE (DRAM_SIZE - PLUGIN_BUFFER_SIZE - CODEC_SIZE - TTB_SIZE)
#define IRAMORIG (0x00000000 + (56*1024))
#define IRAMSIZE (136*1024)
#elif CONFIG_CPU == JZ4732 || CONFIG_CPU == JZ4760B
/* fake 'iram' region occupies first 16k */
#define DRAMORIG 0x80004000
#define IRAM DRAM
#define IRAMSIZE 0
#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGIN_BUFFER_SIZE - CODEC_SIZE - 0x4000
/* The bit of IRAM that is available is used in the core */
#elif CONFIG_CPU == X1000
#define DRAMORIG X1000_DRAM_BASE
#define IRAM DRAM
#define IRAMSIZE 0
#define DRAMSIZE (X1000_DRAM_SIZE - PLUGIN_BUFFER_SIZE - CODEC_SIZE)
#elif CONFIG_CPU == RK27XX
#define DRAMORIG 0x60000000
#define IRAM DRAM
#define IRAMSIZE 0
#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGIN_BUFFER_SIZE - CODEC_SIZE
#elif CONFIG_CPU == IMX233
#include "cpu.h"
/* The IRAM is too small and already partly used by the core */
#define DRAMORIG CACHED_DRAM_ADDR
#define IRAM DRAM
#define IRAMSIZE 0
#define DRAMSIZE (DRAM_SIZE - PLUGIN_BUFFER_SIZE - CODEC_SIZE - FRAME_SIZE - TTB_SIZE)
#elif CONFIG_CPU == STM32H743
#include "cpu.h"
#define DRAMORIG STM32_SDRAM1_BASE
#define IRAM DRAM
#define IRAMSIZE 0
#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGIN_BUFFER_SIZE - CODEC_SIZE
#else
#define DRAMORIG 0x09000000
#endif
#ifndef NOCACHE_BASE
/* Default to no offset if target doesn't define this */
#define NOCACHE_BASE 0x00000000
# error "DRAM/IRAM memory map not defined!"
#endif
#define PLUGIN_LENGTH PLUGIN_BUFFER_SIZE
@ -239,10 +159,14 @@ OUTPUT_FORMAT(elf32-littlemips)
#define THIS_ORIGIN PLUGIN_ORIGIN
#endif
#if defined(USE_IRAM) && (!defined(IRAMORIG) || !defined(IRAMSIZE))
# error "USE_IRAM is set, but no IRAM region is defined!"
#endif
MEMORY
{
PLUGIN_RAM : ORIGIN = THIS_ORIGIN, LENGTH = THIS_LENGTH
#if defined(IRAMSIZE) && IRAMSIZE != 0
#if defined(USE_IRAM)
PLUGIN_IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
#endif
}
@ -258,9 +182,6 @@ SECTIONS
.text :
{
*(.text*)
#if defined(IRAMSIZE) && IRAMSIZE == 0
*(.icode)
#endif
#ifdef CPU_ARM
*(.glue_7)
*(.glue_7t)
@ -270,20 +191,14 @@ SECTIONS
.rodata :
{
*(.rodata*)
#if defined(IRAMSIZE) && IRAMSIZE == 0
*(.irodata)
#endif
} > PLUGIN_RAM
.data :
{
*(.data*)
#if defined(IRAMSIZE) && IRAMSIZE == 0
*(.idata)
#endif
} > PLUGIN_RAM
#if NOCACHE_BASE != 0
#if defined(NOCACHE_BASE)
/*
* Allocate .ncdata based on the following constraints:
*
@ -301,6 +216,12 @@ SECTIONS
/DISCARD/ :
{
*(.eh_frame)
#if !defined(USE_IRAM)
*(.icode)
*(.irodata)
*(.idata)
*(.ibss)
#endif
#ifdef CPU_MIPS
*(.MIPS.abiflags)
*(.rel.dyn)
@ -312,14 +233,11 @@ SECTIONS
plugin_bss_start = .;
_plugin_bss_start = .;
*(.bss*)
#if defined(IRAMSIZE) && IRAMSIZE == 0
*(.ibss)
#endif
*(COMMON)
. = ALIGN(0x4);
} > PLUGIN_RAM
#if NOCACHE_BASE != 0
#if defined(NOCACHE_BASE)
/*
* .ncbss has the same constraints as the .ncdata section
* above but there is an extra complication: because it is
@ -359,7 +277,7 @@ SECTIONS
plugin_end_addr = .;
} > PLUGIN_RAM
#if defined(IRAMSIZE) && IRAMSIZE != 0
#if defined(USE_IRAM)
.iram IRAMORIG : AT(LOADADDR(.bss))
{
iramstart = .;
@ -400,7 +318,7 @@ SECTIONS
}
}
#if NOCACHE_BASE != 0
#if defined(NOCACHE_BASE)
/* Some asserts to make sure nocache sections appear correctly defined */
ASSERT(LOADADDR(.ncdata) == ADDR(.ncdata) - NOCACHE_BASE, ".ncdata has incorrect LMA/VMA address");
ASSERT(LOADADDR(.ncdata) % CACHEALIGN_SIZE == 0, ".ncdata incorrectly aligned");

View file

@ -95,12 +95,12 @@ $(PLUGINLIB): $(PLUGINLIB_OBJ)
$(PLUGINLINK_LDS): $(PLUGIN_LDS) $(CONFIGFILE)
$(call PRINTS,PP $(@F))
$(shell mkdir -p $(dir $@))
$(call preprocess2file,$<,$@,-DLOADADDRESS=$(LOADADDRESS))
$(call preprocess2file,$<,$@,-DPLUGIN)
$(OVERLAYREF_LDS): $(PLUGIN_LDS)
$(call PRINTS,PP $(@F))
$(shell mkdir -p $(dir $@))
$(call preprocess2file,$<,$@,-DOVERLAY_OFFSET=0)
$(call preprocess2file,$<,$@,-DPLUGIN -DOVERLAY_OFFSET=0)
$(BUILDDIR)/credits.raw credits.raw: $(DOCSDIR)/CREDITS
$(call PRINTS,Create credits.raw)perl $(APPSDIR)/plugins/credits.pl < $< > $(BUILDDIR)/$(@F)

View file

@ -29,7 +29,7 @@ $(ROCKBOY_OBJDIR)/rockboy.rock: $(ROCKBOY_OBJ)
$(ROCKBOY_OBJDIR)/rockboy.refmap: $(ROCKBOY_OBJ)
$(ROCKBOY_OUTLDS): $(PLUGIN_LDS) $(ROCKBOY_OBJDIR)/rockboy.refmap
$(call PRINTS,PP $(@F))$(call preprocess2file,$<,$@,-DOVERLAY_OFFSET=$(shell \
$(call PRINTS,PP $(@F))$(call preprocess2file,$<,$@,-DPLUGIN -DOVERLAY_OFFSET=$(shell \
$(TOOLSDIR)/ovl_offset.pl $(ROCKBOY_OBJDIR)/rockboy.refmap))
$(ROCKBOY_OBJDIR)/rockboy.ovl: $(ROCKBOY_OBJ) $(ROCKBOY_OUTLDS)

View file

@ -70,7 +70,7 @@ $(SDL_OBJDIR)/duke3d.rock: $(SDL_OBJ) $(DUKE3D_OBJ) $(TLSFLIB)
$(SDL_OBJDIR)/duke3d.refmap: $(SDL_OBJ) $(DUKE3D_OBJ) $(TLSFLIB)
$(DUKE3D_OUTLDS): $(PLUGIN_LDS) $(SDL_OBJDIR)/duke3d.refmap
$(call PRINTS,PP $(@F))$(call preprocess2file,$<,$@,-DOVERLAY_OFFSET=$(shell \
$(call PRINTS,PP $(@F))$(call preprocess2file,$<,$@,-DPLUGIN -DOVERLAY_OFFSET=$(shell \
$(TOOLSDIR)/ovl_offset.pl $(SDL_OBJDIR)/duke3d.refmap))
$(SDL_OBJDIR)/duke3d.ovl: $(SDL_OBJ) $(DUKE3D_OBJ) $(TLSFLIB) $(DUKE3D_OUTLDS)
@ -87,7 +87,7 @@ $(SDL_OBJDIR)/wolf3d.rock: $(SDL_OBJ) $(WOLF3D_OBJ) $(TLSFLIB)
$(SDL_OBJDIR)/wolf3d.refmap: $(SDL_OBJ) $(WOLF3D_OBJ) $(TLSFLIB)
$(WOLF3D_OUTLDS): $(PLUGIN_LDS) $(SDL_OBJDIR)/wolf3d.refmap
$(call PRINTS,PP $(@F))$(call preprocess2file,$<,$@,-DOVERLAY_OFFSET=$(shell \
$(call PRINTS,PP $(@F))$(call preprocess2file,$<,$@,-DPLUGIN -DOVERLAY_OFFSET=$(shell \
$(TOOLSDIR)/ovl_offset.pl $(SDL_OBJDIR)/wolf3d.refmap))
$(SDL_OBJDIR)/wolf3d.ovl: $(SDL_OBJ) $(WOLF3D_OBJ) $(TLSFLIB) $(WOLF3D_OUTLDS)
@ -105,7 +105,7 @@ $(SDL_OBJDIR)/quake.rock: $(SDL_OBJ) $(QUAKE_OBJ) $(TLSFLIB)
$(SDL_OBJDIR)/quake.refmap: $(SDL_OBJ) $(QUAKE_OBJ) $(TLSFLIB)
$(QUAKE_OUTLDS): $(PLUGIN_LDS) $(SDL_OBJDIR)/quake.refmap
$(call PRINTS,PP $(@F))$(call preprocess2file,$<,$@,-DOVERLAY_OFFSET=$(shell \
$(call PRINTS,PP $(@F))$(call preprocess2file,$<,$@,-DPLUGIN -DOVERLAY_OFFSET=$(shell \
$(TOOLSDIR)/ovl_offset.pl $(SDL_OBJDIR)/quake.refmap))
$(SDL_OBJDIR)/quake.ovl: $(SDL_OBJ) $(QUAKE_OBJ) $(TLSFLIB) $(QUAKE_OUTLDS)

View file

@ -226,14 +226,16 @@ static void ROCKBOXAUD_CloseAudio(_THIS)
if(this->hidden->rb_buf[i])
SDL_FreeAudioMem(this->hidden->rb_buf[i]);
}
rb->mixer_set_frequency(HW_SAMPR_DEFAULT);
const struct pcm_sink_caps* caps = rb->pcm_current_sink_caps();
rb->mixer_set_frequency(caps->samprs[caps->default_freq]);
}
static bool freq_ok(unsigned int freq)
{
for(int i = 0; i < SAMPR_NUM_FREQ; i++)
const struct pcm_sink_caps* caps = rb->pcm_current_sink_caps();
for(uint16_t i = 0; i < caps->num_samprs; i++)
{
if(rb->hw_freq_sampr[i] == freq)
if(caps->samprs[i] == freq)
return true;
}
return false;

View file

@ -29,8 +29,8 @@
*/
static int hw_freq IDATA_ATTR = HW_FREQ_DEFAULT;
static unsigned long hw_sampr IDATA_ATTR = HW_SAMPR_DEFAULT;
static int hw_freq IDATA_ATTR;
static unsigned long hw_sampr IDATA_ATTR;
static int gen_thread_stack[DEFAULT_STACK_SIZE/sizeof(int)] IBSS_ATTR;
static bool gen_quit IBSS_ATTR;
@ -161,8 +161,11 @@ static void output_clear(void)
/* Called to switch samplerate on the fly */
static void set_frequency(int index)
{
/* FIXME: pcm sink may have been switched */
const struct pcm_sink_caps* caps = rb->pcm_current_sink_caps();
hw_freq = index;
hw_sampr = rb->hw_freq_sampr[index];
hw_sampr = caps->samprs[index];
output_clear();
update_gen_step();
@ -188,23 +191,21 @@ static const char *format_volume(char *buf, size_t len, int value,
static void play_tone(bool volume_set)
{
static struct opt_items names[HW_NUM_FREQ] =
/* generate frequency list */
static struct opt_items names[SAMPR_NUM_FREQ];
static char label_storage[SAMPR_NUM_FREQ][8 + 1]; /* at most 8 bytes: "???.?kHz" */
const struct pcm_sink_caps* caps = rb->pcm_current_sink_caps();
for(size_t i = 0; i < caps->num_samprs; i += 1)
{
HW_HAVE_192_([HW_FREQ_192] = { "192kHz", -1 },)
HW_HAVE_176_([HW_FREQ_176] = { "176.4kHz", -1 },)
HW_HAVE_96_([HW_FREQ_96] = { "96kHz", -1 },)
HW_HAVE_88_([HW_FREQ_88] = { "88.2kHz", -1 },)
HW_HAVE_64_([HW_FREQ_64] = { "64kHz", -1 },)
HW_HAVE_48_([HW_FREQ_48] = { "48kHz", -1 },)
HW_HAVE_44_([HW_FREQ_44] = { "44.1kHz", -1 },)
HW_HAVE_32_([HW_FREQ_32] = { "32kHz", -1 },)
HW_HAVE_24_([HW_FREQ_24] = { "24kHz", -1 },)
HW_HAVE_22_([HW_FREQ_22] = { "22.05kHz", -1 },)
HW_HAVE_16_([HW_FREQ_16] = { "16kHz", -1 },)
HW_HAVE_12_([HW_FREQ_12] = { "12kHz", -1 },)
HW_HAVE_11_([HW_FREQ_11] = { "11.025kHz", -1 },)
HW_HAVE_8_( [HW_FREQ_8 ] = { "8kHz", -1 },)
};
uint16_t val = caps->samprs[i] / 100;
rb->snprintf(label_storage[i], 8 + 1, "%d.%dkHz", val / 10, val % 10);
names[i].string = label_storage[i];
names[i].voice_id = -1;
}
hw_freq = caps->default_freq;
hw_sampr = caps->samprs[hw_freq];
int freq = hw_freq;
@ -219,7 +220,7 @@ static void play_tone(bool volume_set)
rb->cpu_boost(true);
#endif
rb->mixer_set_frequency(rb->hw_freq_sampr[freq]);
rb->mixer_set_frequency(hw_sampr);
#if INPUT_SRC_CAPS != 0
/* Recordable targets can play back from other sources */
@ -251,7 +252,7 @@ static void play_tone(bool volume_set)
#endif /* HAVE_VOLUME_IN_LIST */
{
rb->set_option("Sample Rate", &freq, RB_INT, names,
HW_NUM_FREQ, set_frequency);
caps->num_samprs, set_frequency);
(void)volume_set;
}

View file

@ -21,6 +21,15 @@
#include "plugin.h"
#include "lib/playback_control.h"
#if defined(DEBUG) || defined(SIMULATOR)
#define logf(...) rb->debugf(__VA_ARGS__); rb->debugf("\n")
#elif defined(ROCKBOX_HAS_LOGF)
#define logf rb->logf
#else
#define logf(...) do { } while(0)
#endif
#define MAX_LINE_LEN 2048
@ -37,6 +46,7 @@ static char copy_buffer[MAX_LINE_LEN];
static char filename[MAX_PATH];
static char eol[3];
static bool newfile;
static struct gui_synclist lists;
#define ACTION_INSERT 0
#define ACTION_GET 1
@ -44,19 +54,14 @@ static bool newfile;
#define ACTION_UPDATE 3
#define ACTION_CONCAT 4
static char* _do_action(int action, char* str, int line);
#ifndef HAVE_ADJUSTABLE_CPU_FREQ
#define do_action _do_action
#else
static char* do_action(int action, char* str, int line)
static void cpuboost(int onoff)
{
char *r;
rb->cpu_boost(1);
r = _do_action(action,str,line);
rb->cpu_boost(0);
return r;
}
#ifdef HAVE_ADJUSTABLE_CPU_FREQ
rb->cpu_boost((onoff == 1) ? true : false);
#else
(void)onoff;
#endif
}
static char* _do_action(int action, char* str, int line)
{
@ -120,6 +125,16 @@ static char* _do_action(int action, char* str, int line)
last_char_index = c;
return &buffer[c];
}
static char* do_action(int action, char* str, int line)
{
char *r;
cpuboost(1);
r = _do_action(action,str,line);
cpuboost(0);
return r;
}
static const char* list_get_name_cb(int selected_item, void* data,
char* buf, size_t buf_len)
{
@ -189,16 +204,14 @@ static bool save_changes(int overwrite)
}
rb->lcd_clear_display();
#ifdef HAVE_ADJUSTABLE_CPU_FREQ
rb->cpu_boost(1);
#endif
cpuboost(1);
for (i=0;i<line_count;i++)
{
rb->fdprintf(fd,"%s%s", do_action(ACTION_GET, 0, i), eol);
}
#ifdef HAVE_ADJUSTABLE_CPU_FREQ
rb->cpu_boost(0);
#endif
cpuboost(0);
rb->close(fd);
if (newfile || !overwrite)
@ -226,6 +239,7 @@ static int do_item_menu(int cur_sel)
{
int ret = MENU_RET_NO_UPDATE;
MENUITEM_STRINGLIST(menu, "Line Options", NULL,
"Find",
"Cut/Delete", "Copy",
"Insert Above", "Insert Below",
"Concat To Above",
@ -233,18 +247,60 @@ static int do_item_menu(int cur_sel)
switch (rb->do_menu(&menu, NULL, NULL, false))
{
case 0: /* cut */
case 0: /* find*/
{
static char find_str[32] = "";
if (rb->kbd_input(find_str, sizeof(find_str), NULL) != 0)
break;
unsigned long last_tick;
int i = rb->gui_synclist_get_sel_pos(&lists) + 1;
rb->gui_synclist_draw(&lists);
rb->splash_progress_set_delay(HZ / 2); /* wait 1/2 sec before progress */
last_tick = *(rb->current_tick) + HZ/4;
cpuboost(1);
for(; i < line_count; i++)
{
char *t = _do_action(ACTION_GET, 0, i);
//logf("find '%s' ln %d %s\n", find_str, i, t);
if (TIME_AFTER(*(rb->current_tick), last_tick + HZ/4))
{
rb->splash_progress(i, line_count - i,
"%s (%s)", rb->str(LANG_SEARCH), rb->str(LANG_OFF_ABORT));
if (rb->action_userabort(TIMEOUT_NOBLOCK))
break;
last_tick = *(rb->current_tick);
}
if (rb->strcasestr(t, find_str) != NULL)
{
logf("found '%s' @ ln %d\n'%s'\n", find_str, i, t);
break;
}
}
cpuboost(0);
if (i >= line_count)
rb->splash(HZ * 2, ID2P(LANG_FAILED));
else
rb->gui_synclist_select_item(&lists, i);
break;
}
case 1: /* cut */
rb->strlcpy(copy_buffer, do_action(ACTION_GET, 0, cur_sel),
MAX_LINE_LEN);
do_action(ACTION_REMOVE, 0, cur_sel);
ret = MENU_RET_UPDATE;
break;
case 1: /* copy */
case 2: /* copy */
rb->strlcpy(copy_buffer, do_action(ACTION_GET, 0, cur_sel),
MAX_LINE_LEN);
ret = MENU_RET_NO_UPDATE;
break;
case 2: /* insert above */
case 3: /* insert above */
if (!rb->kbd_input(copy_buffer,MAX_LINE_LEN, NULL))
{
do_action(ACTION_INSERT,copy_buffer,cur_sel);
@ -252,7 +308,7 @@ static int do_item_menu(int cur_sel)
ret = MENU_RET_UPDATE;
}
break;
case 3: /* insert below */
case 4: /* insert below */
if (!rb->kbd_input(copy_buffer,MAX_LINE_LEN, NULL))
{
do_action(ACTION_INSERT,copy_buffer,cur_sel+1);
@ -260,17 +316,17 @@ static int do_item_menu(int cur_sel)
ret = MENU_RET_UPDATE;
}
break;
case 4: /* cat to above */
case 5: /* cat to above */
if (cur_sel>0)
{
do_action(ACTION_CONCAT,0,cur_sel);
ret = MENU_RET_UPDATE;
}
break;
case 5: /* save */
case 6: /* save */
ret = MENU_RET_SAVE;
break;
case 6: /* playback menu */
case 7: /* playback menu */
if (!audio_buf)
playback_control(NULL);
else
@ -320,7 +376,6 @@ enum plugin_status plugin_start(const void* parameter)
{
int fd;
struct gui_synclist lists;
bool exit = false;
int button;
bool changed = false;
@ -336,9 +391,9 @@ enum plugin_status plugin_start(const void* parameter)
#endif
buffer = rb->plugin_get_buffer(&buffer_size);
#ifdef HAVE_ADJUSTABLE_CPU_FREQ
rb->cpu_boost(1);
#endif
cpuboost(1);
if (parameter)
{
#ifdef HAVE_LCD_COLOR
@ -382,9 +437,9 @@ enum plugin_status plugin_start(const void* parameter)
newfile = true;
}
#ifdef HAVE_ADJUSTABLE_CPU_FREQ
rb->cpu_boost(0);
#endif
cpuboost(0);
/* now dump it in the list */
setup_lists(&lists,0);
rb->lcd_update();

View file

@ -133,7 +133,7 @@ int spcf_read_conf_file(const char *filename)
/* set keys */
static void set_keys(void){
char c;
char c[8] = {0};
int selected=0;
int result;
int menu_quit=0;
@ -151,31 +151,31 @@ static void set_keys(void){
case 0:
if (!zx_kbd_input((char*) &c))
{
settings.keymap[0]=c;
settings.keymap[0]=c[0];
}
break;
case 1:
if (!zx_kbd_input((char*) &c))
{
settings.keymap[1]=c;
settings.keymap[1]=c[0];
}
break;
case 2:
if (!zx_kbd_input((char*) &c))
{
settings.keymap[2]=c;
settings.keymap[2]=c[0];
}
break;
case 3:
if (!zx_kbd_input((char*) &c))
{
settings.keymap[3]=c;
settings.keymap[3]=c[0];
}
break;
case 4:
if (!zx_kbd_input((char*) &c))
{
settings.keymap[4]=c;
settings.keymap[4]=c[0];
}
break;
default:
@ -320,7 +320,7 @@ static bool zxbox_menu(void)
int result;
int menu_quit=0;
int exit=0;
char c;
char c[8] = {0};
MENUITEM_STRINGLIST(menu, "ZXBox", NULL,
"VKeyboard", "Play/Pause Tape",
"Save quick snapshot", "Load quick snapshot",
@ -338,7 +338,7 @@ static bool zxbox_menu(void)
case 0:
if (!zx_kbd_input((char*) &c))
{
press_key(c);
press_key(c[0]);
}
clear_kbd=1;
menu_quit=1;

View file

@ -37,7 +37,7 @@ $(ZXBOX_OBJDIR)/zxbox.rock: $(ZXBOX_OBJ)
$(ZXBOX_OBJDIR)/zxbox.refmap: $(ZXBOX_OBJ)
$(ZXBOX_OUTLDS): $(PLUGIN_LDS) $(ZXBOX_OBJDIR)/zxbox.refmap
$(call PRINTS,PP $(@F))$(call preprocess2file,$<,$@,-DOVERLAY_OFFSET=$(shell \
$(call PRINTS,PP $(@F))$(call preprocess2file,$<,$@,-DPLUGIN -DOVERLAY_OFFSET=$(shell \
$(TOOLSDIR)/ovl_offset.pl $(ZXBOX_OBJDIR)/zxbox.refmap))
$(ZXBOX_OBJDIR)/zxbox.ovl: $(ZXBOX_OBJ) $(ZXBOX_OUTLDS)

View file

@ -31,6 +31,7 @@
#include "button.h"
#include "backlight.h"
#include "sound.h"
#include "pcm_sink.h"
#include "settings.h"
#include "rbpaths.h"
#include "settings_list.h"
@ -758,7 +759,8 @@ static int32_t getlang_freq_unit_0_is_auto(int value, int unit)
static void playback_frequency_callback(int sample_rate_hz)
{
audio_set_playback_frequency(sample_rate_hz);
if (pcm_current_sink() == PCM_SINK_BUILTIN)
audio_set_playback_frequency(sample_rate_hz);
}
#endif /* HAVE_PLAY_FREQ */

View file

@ -23,7 +23,7 @@ EXTRA_SPECIAL_LIBS = $(call a2lnk, $(CORE_LIBS))
$(BOOTLINK): $(BOOTLDS) $(CONFIGFILE)
$(call PRINTS,PP $(@F))
$(call preprocess2file,$<,$@,-DLOADADDRESS=$(LOADADDRESS))
$(call preprocess2file,$<,$@,)
$(BUILDDIR)/bootloader.elf: $$(OBJ) $(FIRMLIB) $(CORE_LIBS) $$(BOOTLINK)
$(call PRINTS,LD $(@F))$(CC) $(GCCOPTS) -Os -nostdlib -o $@ $(OBJ) \

View file

@ -757,6 +757,7 @@ Arin Kim
Ingmar Steen
Lourenço Soares
Yegor Chernyshov
Javier Gutiérrez Gertrúdix
The libmad team
The wavpack team

View file

@ -1545,11 +1545,6 @@ void logf(const char *fmt, ...) ATTRIBUTE_PRINTF(1, 2)
\param fmt
\description
const unsigned long *audio_master_sampr_list
\group sound
\return
\description
const unsigned long *hw_freq_sampr
\group sound
\return

View file

@ -697,8 +697,6 @@ target/arm/ipod/powermgmt-ipod-pcf.c
#if CONFIG_I2C == I2C_PP5024 || CONFIG_I2C == I2C_PP5020 || CONFIG_I2C == I2C_PP5002
target/arm/pp/i2c-pp.c
#elif CONFIG_I2C == I2C_PNX0101
target/arm/pnx0101/i2c-pnx0101.c
#elif CONFIG_I2C == I2C_TCC780X
target/arm/i2c-telechips.c
#elif CONFIG_I2C == I2C_S3C2440
@ -713,12 +711,6 @@ target/arm/rk27xx/i2c-rk27xx.c
target/arm/imx233/i2c-imx233.c
#endif
#if CONFIG_CPU == PNX0101
target/arm/pnx0101/kernel-pnx0101.c
target/arm/pnx0101/system-pnx0101.c
target/arm/pnx0101/timer-pnx0101.c
#endif
#if CONFIG_CPU == IMX233
target/arm/imx233/lcdif-imx233.c
target/arm/imx233/clkctrl-imx233.c
@ -871,8 +863,6 @@ target/arm/pp/audio-pp.c
#endif /* SANSA_E200 */
target/arm/pp/crt0-pp.S
#endif
#elif CONFIG_CPU == PNX0101
target/arm/pnx0101/crt0-pnx0101.S
#elif CONFIG_CPU==DM320
target/arm/tms320dm320/crt0.S
#elif CONFIG_CPU==S3C2440

View file

@ -180,8 +180,8 @@ union raw_dirent
struct fsinfo
{
sector_t freecount; /* last known free cluster count */
sector_t nextfree; /* first cluster to start looking for free
uint32_t freecount; /* last known free cluster count */
uint32_t nextfree; /* first cluster to start looking for free
clusters, or 0xffffffff for no hint */
};
/* fsinfo offsets */
@ -462,7 +462,7 @@ static int bpb_is_sane(struct bpb *fat_bpb)
{
DEBUGF("%s() - Error: FSInfo.Freecount > disk size "
"(0x%04lx)\n", __func__,
(unsigned long)fat_bpb->fsinfo.freecount);
fat_bpb->fsinfo.freecount);
return -4;
}
@ -959,7 +959,7 @@ static int update_fat_entry16(struct bpb *fat_bpb, unsigned long entry,
fat_bpb->fsinfo.freecount++;
}
DEBUGF("%lu free clusters\n", (unsigned long)fat_bpb->fsinfo.freecount);
DEBUGF("%lu free clusters\n", fat_bpb->fsinfo.freecount);
sec[offset] = htole16(val);
dc_dirty_buf(sec);
@ -1116,7 +1116,7 @@ static int update_fat_entry32(struct bpb *fat_bpb, unsigned long entry,
fat_bpb->fsinfo.freecount++;
}
DEBUGF("%lu free clusters\n", (unsigned long)fat_bpb->fsinfo.freecount);
DEBUGF("%lu free clusters\n", fat_bpb->fsinfo.freecount);
/* don't change top 4 bits */
sec[offset] = htole32((curval & 0xf0000000) | (val & 0x0fffffff));
@ -2967,8 +2967,8 @@ int fat_mount(IF_MV(int volume,) IF_MD(int drive,) unsigned long startsector)
if (fat_bpb->fsinfo.freecount == 0xffffffff)
fat_recalc_free(IF_MV(fat_bpb->volume));
DEBUGF("Freecount: %ld\n", (unsigned long)fat_bpb->fsinfo.freecount);
DEBUGF("Nextfree: 0x%lx\n", (unsigned long)fat_bpb->fsinfo.nextfree);
DEBUGF("Freecount: %ld\n", fat_bpb->fsinfo.freecount);
DEBUGF("Nextfree: 0x%lx\n", fat_bpb->fsinfo.nextfree);
DEBUGF("Cluster count: 0x%lx\n", fat_bpb->dataclusters);
DEBUGF("Sectors per cluster: %lu\n", fat_bpb->bpb_secperclus);
DEBUGF("FAT sectors: 0x%lx\n", fat_bpb->fatsize);

View file

@ -21,6 +21,7 @@
#define __AS3525_H__
#define CACHEALIGN_BITS (5)
#define CACHEALIGN_SIZE (32)
#define UART_CHANNELS 1

View file

@ -63,7 +63,6 @@
#define PP5022 5022
#define PP5024 5024
#define PP6100 6100
#define PNX0101 101
#define S3C2440 2440
#define DSC25 25
#define DM320 320
@ -301,7 +300,6 @@ Lyre prototype 1 */
#define I2C_COLDFIRE 3 /* Coldfire style */
#define I2C_PP5002 4 /* PP5002 style */
#define I2C_PP5020 5 /* PP5020 style */
#define I2C_PNX0101 6 /* PNX0101 style */
#define I2C_S3C2440 7
#define I2C_PP5024 8 /* PP5024 style */
#define I2C_IMX31L 9
@ -688,7 +686,7 @@ Lyre prototype 1 */
#endif
/* define for all cpus from ARM7TDMI family (for specific optimisations) */
#if defined(CPU_PP) || (CONFIG_CPU == PNX0101) || (CONFIG_CPU == DSC25)
#if defined(CPU_PP) || (CONFIG_CPU == DSC25)
#define CPU_ARM7TDMI
#endif
@ -1150,7 +1148,6 @@ Lyre prototype 1 */
#if defined(CPU_COLDFIRE) || \
defined(CPU_PP) || \
defined(CPU_S5L87XX) || \
(CONFIG_CPU == PNX0101) || \
(CONFIG_CPU == TCC7801)
# define USE_IRAM

View file

@ -25,63 +25,81 @@
#if CONFIG_CPU == MCF5249
#include "mcf5249.h"
#endif
#if CONFIG_CPU == MCF5250
#elif CONFIG_CPU == MCF5250
#include "mcf5250.h"
#endif
#if (CONFIG_CPU == PP5020) || (CONFIG_CPU == PP5022)
#elif (CONFIG_CPU == PP5020) || (CONFIG_CPU == PP5022)
#include "pp5020.h"
#endif
#if CONFIG_CPU == PP5002
#elif CONFIG_CPU == PP5002
#include "pp5002.h"
#endif
#if CONFIG_CPU == PP5024
#elif CONFIG_CPU == PP5024
#include "pp5024.h"
#endif
#if CONFIG_CPU == PP6100
#elif CONFIG_CPU == PP6100
#include "pp6100.h"
#endif
#if CONFIG_CPU == PNX0101
#include "pnx0101.h"
#endif
#if CONFIG_CPU == S3C2440
#elif CONFIG_CPU == S3C2440
#include "s3c2440.h"
#endif
#if CONFIG_CPU == DM320
#elif CONFIG_CPU == DM320
#include "dm320.h"
#endif
#if CONFIG_CPU == IMX31L
#elif CONFIG_CPU == IMX31L
#include "imx31l.h"
#endif
#ifdef CPU_TCC780X
#elif defined(CPU_TCC780X)
#include "tcc780x.h"
#endif
#ifdef CPU_S5L87XX
#elif defined(CPU_S5L87XX)
#include "s5l87xx.h"
#endif
#if CONFIG_CPU == JZ4732
#elif CONFIG_CPU == JZ4732
#include "jz4740.h"
#endif
#if CONFIG_CPU == JZ4760B
#elif CONFIG_CPU == JZ4760B
#include "jz4760b.h"
#endif
#if CONFIG_CPU == AS3525
#elif CONFIG_CPU == AS3525
#include "as3525.h"
#endif
#if CONFIG_CPU == AS3525v2
#elif CONFIG_CPU == AS3525v2
#include "as3525v2.h"
#endif
#if CONFIG_CPU == IMX233
#elif CONFIG_CPU == IMX233
#include "imx233.h"
#endif
#if CONFIG_CPU == RK27XX
#elif CONFIG_CPU == RK27XX
#include "rk27xx.h"
#endif
#if CONFIG_CPU == X1000
#elif CONFIG_CPU == X1000
#include "x1000.h"
#elif CONFIG_CPU == STM32H743
#include "stm32h743.h"
#endif
#if CONFIG_CPU == STM32H743
#include "cpu-stm32h743.h"
#if (CONFIG_PLATFORM & PLATFORM_NATIVE) && (defined(CPU_ARM) || defined(CPU_MIPS))
# define HAVE_CPU_CACHE_ALIGN
#endif
#if defined(HAVE_CPU_CACHE_ALIGN)
# if !defined(CACHEALIGN_BITS)
# error "CPU header must define CACHEALIGN_BITS"
# elif !defined(CACHEALIGN_SIZE)
# error "CPU header must define CACHEALIGN_SIZE"
# elif CACHEALIGN_SIZE != (1u << CACHEALIGN_BITS)
# error "CACHEALIGN_SIZE and CACHEALIGN_BITS are inconsistent"
# endif
#else
# if defined(CACHEALIGN_BITS) && defined(CACHEALIGN_SIZE)
# error "CACHEALIGN_BITS and CACHEALIGN_SIZE must not be defined for targets with no CPU cache"
# endif
#endif
/*
* Note: NOCACHE_BASE assumes that DRAM is linearly mapped both
* at a lower cached address and an upper uncached address, so
* that you can add NOCACHE_BASE to the cached DRAM address to
* get the corresponding uncached address.
*
* Defining NOCACHE_BASE is only required if you need plugins to
* be able to link data at uncached addresses. If in doubt, you
* don't need this. It's mainly of use for dual-core PortalPlayer
* targets which need to do this for things like mutexes/queues;
* since PP lacks hardware cache coherency, data which is writable
* by more than one core often needs to accessed uncached.
*/
#if defined(NOCACHE_BASE)
# if !defined(HAVE_CPU_CACHE_ALIGN)
# error "NOCACHE_BASE cannot be defined on targets with no CPU cache!"
# elif NOCACHE_BASE == 0
# error "NOCACHE_BASE cannot be 0!"
# endif
#endif
#endif /* __CPU_H */

View file

@ -36,12 +36,37 @@ extern unsigned long _lcdbuf2;
extern unsigned long _ttbstart;
#endif
/* See https://www.heyrick.co.uk/blog/files/datasheets/tms320dm320part1.pdf */
#define CACHEALIGN_BITS 5
#define CACHEALIGN_SIZE 32
#define TTB_BASE_ADDR (_ttbstart) /* End of memory */
#define FRAME ((short *) (&_lcdbuf)) /* Right after TTB */
#ifdef MROBE_500
#define FRAME2 ((short *) (&_lcdbuf2)) /* Right after FRAME */
#endif
#ifndef LCD_NATIVE_WIDTH
#define LCD_NATIVE_WIDTH LCD_WIDTH
#endif
#ifndef LCD_NATIVE_HEIGHT
#define LCD_NATIVE_HEIGHT LCD_HEIGHT
#endif
/* must be 16Kb (0x4000) aligned */
#define TTB_SIZE (0x4000)
#ifdef MROBE_500
/* Give this 1 meg to allow it to align to the MMU boundary */
#define LCD_FUDGE (LCD_NATIVE_WIDTH%32)
#define LCD_BUFFER_SIZE ((LCD_NATIVE_WIDTH+LCD_FUDGE)*LCD_NATIVE_HEIGHT*2)
#define LCD_TTB_AREA (0x100000*((LCD_BUFFER_SIZE>>19)+1))
#else
#define LCD_BUFFER_SIZE (LCD_NATIVE_WIDTH*LCD_NATIVE_HEIGHT*2)
#define LCD_TTB_AREA (TTB_SIZE + LCD_BUFFER_SIZE)
#endif
#define PHY_IO_BASE 0x00030000
#define DM320_REG(addr) (*(volatile unsigned short *)(PHY_IO_BASE + (addr)))
#define PHY_IO_BASE2 0x00060000

View file

@ -40,13 +40,16 @@
#ifndef __JZ4740_H__
#define __JZ4740_H__
#ifndef __ASSEMBLY__
#define CACHEALIGN_BITS (5)
#define CACHEALIGN_SIZE (32)
#ifndef __ASSEMBLER__
#define REG8(addr) (*(volatile unsigned char *)(addr))
#define REG16(addr) (*(volatile unsigned short *)(addr))
#define REG32(addr) (*(volatile unsigned int *)(addr))
#endif /* !ASSEMBLY */
#endif /* !__ASSEMBLER__ */
/*************************************************************************
* Boot ROM Specification
@ -2528,7 +2531,7 @@
// Module Operation Definitions
//
//----------------------------------------------------------------------
#ifndef __ASSEMBLY__
#ifndef __ASSEMBLER__
/***************************************************************************
* GPIO
@ -4975,7 +4978,7 @@ do{ \
}while(0)
#endif /* !__ASSEMBLY__ */
#endif /* !__ASSEMBLER__ */
#ifndef _IPU_H_
@ -4986,7 +4989,7 @@ do{ \
#define IPU_V_BASE 0xB3080000
#define IPU__SIZE 0x00001000
#ifndef __ASSEMBLY__
#ifndef __ASSEMBLER__
struct ipu_module
{
unsigned int reg_ctrl; // 0x0
@ -5023,7 +5026,7 @@ struct Ration2m
float ratio;
int n, m;
};
#endif /* !__ASSEMBLY__ */
#endif /* !__ASSEMBLER__ */
// Register offset
#define REG_CTRL 0x0

View file

@ -37,7 +37,10 @@
#ifndef __JZ4760B_H__
#define __JZ4760B_H__
#if defined(__ASSEMBLY__) || defined(__LANGUAGE_ASSEMBLY)
#define CACHEALIGN_BITS (5)
#define CACHEALIGN_SIZE (32)
#if defined(__ASSEMBLER__)
#ifndef __MIPS_ASSEMBLER
#define __MIPS_ASSEMBLER
#endif

View file

@ -485,7 +485,7 @@
#define CEB_KERNEL 2 /* Count events in kernel mode EXL = ERL = 0 */
#define CEB_EXL 1 /* Count events with EXL = 1, ERL = 0 */
#ifndef __ASSEMBLY__
#ifndef __ASSEMBLER__
#define CAUSE_EXCCODE(x) ((CAUSEF_EXCCODE & (x->cp0_cause)) >> CAUSEB_EXCCODE)
#define CAUSE_EPC(x) (x->cp0_epc + (((x->cp0_cause & CAUSEF_BD) >> CAUSEB_BD) << 2))
@ -959,6 +959,6 @@ __BUILD_SET_C0(config,CP0_CONFIG)
#define set_cp0_cause(x) set_c0_cause(x)
#define set_cp0_config(x) set_c0_config(x)
#endif /* !__ASSEMBLY__ */
#endif /* !__ASSEMBLER__ */
#endif /* _ASM_MIPSREGS_H */

View file

@ -1,268 +0,0 @@
/***************************************************************************
* __________ __ ___.
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
* \/ \/ \/ \/ \/
* $Id$
*
* Copyright (C) 2005 by Tomasz Malesinski
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
* KIND, either express or implied.
*
****************************************************************************/
#ifndef __PNX0101_H__
#define __PNX0101_H__
#define GPIO0_READ (*(volatile unsigned long *)0x80003000)
#define GPIO0_SET (*(volatile unsigned long *)0x80003014)
#define GPIO0_CLR (*(volatile unsigned long *)0x80003018)
#define GPIO1_READ (*(volatile unsigned long *)0x80003040)
#define GPIO1_SET (*(volatile unsigned long *)0x80003054)
#define GPIO1_CLR (*(volatile unsigned long *)0x80003058)
#define GPIO2_READ (*(volatile unsigned long *)0x80003080)
#define GPIO2_SET (*(volatile unsigned long *)0x80003094)
#define GPIO2_CLR (*(volatile unsigned long *)0x80003098)
#define GPIO3_READ (*(volatile unsigned long *)0x800030c0)
#define GPIO3_SET (*(volatile unsigned long *)0x800030d4)
#define GPIO3_CLR (*(volatile unsigned long *)0x800030d8)
#define GPIO4_READ (*(volatile unsigned long *)0x80003100)
#define GPIO4_SET (*(volatile unsigned long *)0x80003114)
#define GPIO4_CLR (*(volatile unsigned long *)0x80003118)
#define GPIO5_READ (*(volatile unsigned long *)0x80003140)
#define GPIO5_SET (*(volatile unsigned long *)0x80003154)
#define GPIO5_CLR (*(volatile unsigned long *)0x80003158)
#define GPIO6_READ (*(volatile unsigned long *)0x80003180)
#define GPIO6_SET (*(volatile unsigned long *)0x80003194)
#define GPIO6_CLR (*(volatile unsigned long *)0x80003198)
#define GPIO7_READ (*(volatile unsigned long *)0x800031c0)
#define GPIO7_SET (*(volatile unsigned long *)0x800031d4)
#define GPIO7_CLR (*(volatile unsigned long *)0x800031d8)
#define LCDREG04 (*(volatile unsigned long *)0x80104004)
#define LCDSTAT (*(volatile unsigned long *)0x80104008)
#define LCDREG10 (*(volatile unsigned long *)0x80104010)
#define LCDCMD (*(volatile unsigned long *)0x80104020)
#define LCDDATA (*(volatile unsigned long *)0x80104030)
#define TIMERR00 (*(volatile unsigned long *)0x80020000)
#define TIMERR08 (*(volatile unsigned long *)0x80020008)
#define TIMERR0C (*(volatile unsigned long *)0x8002000c)
#define ADCCH0 (*(volatile unsigned long *)0x80002400)
#define ADCCH1 (*(volatile unsigned long *)0x80002404)
#define ADCCH2 (*(volatile unsigned long *)0x80002408)
#define ADCCH3 (*(volatile unsigned long *)0x8000240c)
#define ADCCH4 (*(volatile unsigned long *)0x80002410)
#define ADCST (*(volatile unsigned long *)0x80002420)
#define ADCR24 (*(volatile unsigned long *)0x80002424)
#define ADCR28 (*(volatile unsigned long *)0x80002428)
#define DMAINTSTAT (*(volatile unsigned long *)0x80104c04)
#define DMAINTEN (*(volatile unsigned long *)0x80104c08)
#define DMASRC(n) (*(volatile unsigned long *)(0x80104800 + (n) * 0x20))
#define DMADEST(n) (*(volatile unsigned long *)(0x80104804 + (n) * 0x20))
#define DMALEN(n) (*(volatile unsigned long *)(0x80104808 + (n) * 0x20))
#define DMAR0C(n) (*(volatile unsigned long *)(0x8010480c + (n) * 0x20))
#define DMAR10(n) (*(volatile unsigned long *)(0x80104810 + (n) * 0x20))
#define DMAR1C(n) (*(volatile unsigned long *)(0x8010481c + (n) * 0x20))
#define MMUBLOCK(n) (*(volatile unsigned long *)(0x80105018 + (n) * 4))
#define CODECVOL (*(volatile unsigned long *)0x80200398)
#ifndef ASM
/* Clock generation unit */
struct pnx0101_cgu {
unsigned long base_scr[12];
unsigned long base_fs1[12];
unsigned long base_fs2[12];
unsigned long base_ssr[12];
unsigned long clk_pcr[73];
unsigned long clk_psr[73];
unsigned long clk_esr[67];
unsigned long base_bcr[3];
unsigned long base_fdc[18];
};
#define CGU (*(volatile struct pnx0101_cgu *)0x80004000)
#define PNX0101_SEL_STAGE_SYS 0
#define PNX0101_SEL_STAGE_APB0 1
#define PNX0101_SEL_STAGE_APB1 2
#define PNX0101_SEL_STAGE_APB3 3
#define PNX0101_SEL_STAGE_DAIO 9
#define PNX0101_HIPREC_FDC 16
#define PNX0101_FIRST_DIV_SYS 0
#define PNX0101_N_DIV_SYS 7
#define PNX0101_FIRST_DIV_APB0 7
#define PNX0101_N_DIV_APB0 2
#define PNX0101_FIRST_DIV_APB1 9
#define PNX0101_N_DIV_APB1 1
#define PNX0101_FIRST_DIV_APB3 10
#define PNX0101_N_DIV_APB3 1
#define PNX0101_FIRST_DIV_DAIO 12
#define PNX0101_N_DIV_DAIO 6
#define PNX0101_BCR_SYS 0
#define PNX0101_BCR_APB0 1
#define PNX0101_BCR_DAIO 2
#define PNX0101_FIRST_ESR_SYS 0
#define PNX0101_N_ESR_SYS 28
#define PNX0101_FIRST_ESR_APB0 28
#define PNX0101_N_ESR_APB0 9
#define PNX0101_FIRST_ESR_APB1 37
#define PNX0101_N_ESR_APB1 4
#define PNX0101_FIRST_ESR_APB3 41
#define PNX0101_N_ESR_APB3 16
#define PNX0101_FIRST_ESR_DAIO 58
#define PNX0101_N_ESR_DAIO 9
#define PNX0101_ESR_APB1 0x25
#define PNX0101_ESR_T0 0x26
#define PNX0101_ESR_T1 0x27
#define PNX0101_ESR_I2C 0x28
#define PNX0101_CLOCK_APB1 0x25
#define PNX0101_CLOCK_T0 0x26
#define PNX0101_CLOCK_T1 0x27
#define PNX0101_CLOCK_I2C 0x28
#define PNX0101_MAIN_CLOCK_FAST 1
#define PNX0101_MAIN_CLOCK_MAIN_PLL 9
struct pnx0101_pll {
unsigned long hpfin;
unsigned long hpmdec;
unsigned long hpndec;
unsigned long hppdec;
unsigned long hpmode;
unsigned long hpstat;
unsigned long hpack;
unsigned long hpreq;
unsigned long hppad1;
unsigned long hppad2;
unsigned long hppad3;
unsigned long hpselr;
unsigned long hpseli;
unsigned long hpselp;
unsigned long lpfin;
unsigned long lppdn;
unsigned long lpmbyp;
unsigned long lplock;
unsigned long lpdbyp;
unsigned long lpmsel;
unsigned long lppsel;
};
#define PLL (*(volatile struct pnx0101_pll *)0x80004cac)
struct pnx0101_emc {
unsigned long control;
unsigned long status;
};
#define EMC (*(volatile struct pnx0101_emc *)0x80008000)
struct pnx0101_emcstatic {
unsigned long config;
unsigned long waitwen;
unsigned long waitoen;
unsigned long waitrd;
unsigned long waitpage;
unsigned long waitwr;
unsigned long waitturn;
};
#define EMCSTATIC0 (*(volatile struct pnx0101_emcstatic *)0x80008200)
#define EMCSTATIC1 (*(volatile struct pnx0101_emcstatic *)0x80008220)
#define EMCSTATIC2 (*(volatile struct pnx0101_emcstatic *)0x80008240)
/* Timers */
struct pnx0101_timer {
unsigned long load;
unsigned long value;
unsigned long ctrl;
unsigned long clr;
};
#define TIMER0 (*(volatile struct pnx0101_timer *)0x80020000)
#define TIMER1 (*(volatile struct pnx0101_timer *)0x80020400)
/* Interrupt controller */
#define IRQ_TIMER0 5
#define IRQ_TIMER1 6
#define IRQ_DMA 28
#define INTPRIOMASK ((volatile unsigned long *)0x80300000)
#define INTVECTOR ((volatile unsigned long *)0x80300100)
#define INTPENDING (*(volatile unsigned long *)0x80300200)
#define INTFEATURES (*(volatile unsigned long *)0x80300300)
#define INTREQ ((volatile unsigned long *)0x80300400)
#define INTREQ_WEPRIO 0x10000000
#define INTREQ_WETARGET 0x08000000
#define INTREQ_WEENABLE 0x04000000
#define INTREQ_WEACTVLO 0x02000000
#define INTREQ_ENABLE 0x00010000
/* General purpose DMA */
struct pnx0101_dma_channel {
unsigned long source;
unsigned long dest;
unsigned long length;
unsigned long config;
unsigned long enable;
unsigned long pad1;
unsigned long pad2;
unsigned long count;
};
#define DMACHANNEL ((volatile struct pnx0101_dma_channel *)0x80104800)
struct pnx0101_dma {
unsigned long enable;
unsigned long stat;
unsigned long irqmask;
unsigned long softint;
};
#define DMA (*(volatile struct pnx0101_dma *)0x80104c00)
struct pnx0101_audio {
unsigned long pad1;
unsigned long siocr;
unsigned long pad2;
unsigned long pad3;
unsigned long pad4;
unsigned long pad5;
unsigned long ddacctrl;
unsigned long ddacstat;
unsigned long ddacset;
};
#define AUDIO (*(volatile struct pnx0101_audio *)0x80200380)
#endif /* ASM */
/* Timer frequency */
#define TIMER_FREQ 3000000
#endif

View file

@ -23,9 +23,11 @@
/* Much info gleaned and/or copied from the iPodLinux project. */
#define CACHEALIGN_BITS (4) /* 2^4 = 16 bytes */
#define CACHEALIGN_BITS (4) /* 2^4 = 16 bytes */
#define CACHEALIGN_SIZE (16)
#define DRAM_START 0x28000000
#define NOCACHE_BASE 0x28000000
/* LCD bridge */
#define LCD1_BASE 0xc0001000

View file

@ -23,7 +23,8 @@
/* All info gleaned and/or copied from the iPodLinux project. */
#define CACHEALIGN_BITS (4) /* 2^4 = 16 bytes */
#define CACHEALIGN_BITS (4) /* 2^4 = 16 bytes */
#define CACHEALIGN_SIZE (16)
/* PCM addresses for obtaining buffers will be what DMA is using (physical) */
#define HAVE_PCM_DMA_ADDRESS
@ -37,6 +38,7 @@
/* DRAM starts at 0x10000000, but in Rockbox we remap it to 0x00000000 */
#define DRAM_START 0x10000000
#define NOCACHE_BASE 0x10000000
/* Processor ID */
#define PROCESSOR_ID (*(volatile unsigned long *)(0x60000000))

View file

@ -1,3 +1,7 @@
/* See https://rockchip.fr/Rockchip%20RK27xx%20TRM%20V1.1.pdf */
#define CACHEALIGN_BITS 5
#define CACHEALIGN_SIZE 32
/* ARM part only for now */
#define AHB_SRAM 0x00000000

View file

@ -22,6 +22,7 @@
#define __S3C2440_H__
#define CACHEALIGN_BITS (5)
#define CACHEALIGN_SIZE (32)
#define LCD_BUFFER_SIZE (320*240*2)
#define TTB_SIZE (0x4000)

View file

@ -22,7 +22,7 @@
#ifndef __S5L87XX_H__
#define __S5L87XX_H__
#ifndef ASM
#ifndef __ASSEMBLER__
#include <stdint.h>
#endif
@ -31,9 +31,11 @@
#define VOID_PTR_PTR_T void* volatile*
#if CONFIG_CPU==S5L8700 || CONFIG_CPU==S5L8701
#define CACHEALIGN_BITS (4) /* 2^4 = 16 bytes */
#define CACHEALIGN_BITS (4) /* 2^4 = 16 bytes */
#define CACHEALIGN_SIZE (16)
#elif CONFIG_CPU==S5L8702 || CONFIG_CPU==S5L8720
#define CACHEALIGN_BITS (5) /* 2^5 = 32 bytes */
#define CACHEALIGN_BITS (5) /* 2^5 = 32 bytes */
#define CACHEALIGN_SIZE (32)
#endif
#if CONFIG_CPU==S5L8702 || CONFIG_CPU==S5L8720

View file

@ -25,6 +25,7 @@
#define CACHE_SIZE (16 * 1024)
#define CACHEALIGN_BITS 5
#define CACHEALIGN_SIZE 32
#define DCACHE_SIZE CACHE_SIZE
#define DCACHE_WAYS 0x4

View file

@ -203,7 +203,7 @@ enum {
MAXMEMGUARD
};
#if !defined(SIMULATOR) && !defined(__PCTOOL__)
#if !defined(SIMULATOR) && !defined(__PCTOOL__)
#include "system-target.h"
#elif defined(HAVE_SDL) /* SDL build */
#include "system-sdl.h"
@ -258,17 +258,6 @@ static inline void cpu_boost_unlock(void)
#define DISABLE_INTERRUPTS HIGHEST_IRQ_LEVEL
#endif
/* Define this, if the CPU may take advantage of cache aligment. Is enabled
* for all ARM CPUs. */
#ifdef CPU_ARM
#define HAVE_CPU_CACHE_ALIGN
#define MIN_STACK_ALIGN 8
#endif
#ifdef CPU_MIPS
#define HAVE_CPU_CACHE_ALIGN
#endif
/* Define this if target has support for generating backtraces */
#if defined(CPU_ARM) || \
(defined(CPU_MIPS) && (CONFIG_PLATFORM & PLATFORM_NATIVE))
@ -277,22 +266,13 @@ static inline void cpu_boost_unlock(void)
#endif
#endif
#ifndef MIN_STACK_ALIGN
#define MIN_STACK_ALIGN (sizeof (uintptr_t))
/* ARM ABIs generally require 8-byte stack alignment */
#ifdef CPU_ARM
#define MIN_STACK_ALIGN 8
#endif
/* Calculate CACHEALIGN_SIZE from CACHEALIGN_BITS */
#ifdef CACHEALIGN_SIZE
/* undefine, if defined. always calculate from CACHEALIGN_BITS */
#undef CACHEALIGN_SIZE
#endif
#ifdef CACHEALIGN_BITS
/* CACHEALIGN_SIZE = 2 ^ CACHEALIGN_BITS */
#define CACHEALIGN_SIZE (1u << CACHEALIGN_BITS)
#else
/* FIXME: set to maximum known cache alignment of supported CPUs */
#define CACHEALIGN_BITS 5
#define CACHEALIGN_SIZE 32
#ifndef MIN_STACK_ALIGN
#define MIN_STACK_ALIGN (sizeof (uintptr_t))
#endif
#ifdef HAVE_CPU_CACHE_ALIGN
@ -346,7 +326,7 @@ static inline void cpu_boost_unlock(void)
#define STORAGE_WANTS_ALIGN
#endif
#ifdef STORAGE_WANTS_ALIGN
#if defined(STORAGE_WANTS_ALIGN) && !defined(SIMULATOR)
#define STORAGE_ALIGN_ATTR __attribute__((aligned(CACHEALIGN_SIZE)))
#define STORAGE_ALIGN_DOWN(x) \
((typeof (x))ALIGN_DOWN_P2((uintptr_t)(x), CACHEALIGN_BITS))

View file

@ -22,6 +22,7 @@
#define __TCC780X_H__
#define CACHEALIGN_BITS (5)
#define CACHEALIGN_SIZE (32)
#define TTB_SIZE (0x4000)
/* must be 16Kb (0x4000) aligned */

View file

@ -119,6 +119,7 @@
/* CPU cache parameters */
#define CACHEALIGN_BITS 5
#define CACHEALIGN_SIZE 32
#define CACHE_SIZE (16 * 1024)
#endif /* __X1000_H__ */

View file

@ -18,7 +18,6 @@
* KIND, either express or implied.
*
****************************************************************************/
#define ASM
#include "config.h"
#include "cpu.h"

View file

@ -1,3 +1,6 @@
#define __ASSEMBLER__
#include "cpu.h"
/* Will have been included from app.lds */
ENTRY(start)
@ -14,14 +17,6 @@ STARTUP(target/arm/pp/crt0-pp.o)
#define IRAMORIG 0x40000000
#define IRAMSIZE 0xc000
#ifdef CPU_PP502x
#define NOCACHE_BASE 0x10000000
#else
#define NOCACHE_BASE 0x28000000
#endif
#define CACHEALIGN_SIZE 16
/* End of the audio buffer, where the codec buffer starts */
#define ENDAUDIOADDR (DRAMORIG + DRAMSIZE)

View file

@ -1,3 +1,6 @@
#define __ASSEMBLER__
#include "cpu.h"
/* Will have been included from boot.lds */
ENTRY(start)
OUTPUT_FORMAT(elf32-littlearm)
@ -7,7 +10,6 @@ STARTUP(target/arm/pp/crt0-pp502x-bl-usb.o)
#define DRAMORIG 0x01000000 /* Load at 16 MB */
#define DRAMSIZE 0x00100000 /* 1MB for bootloader */
#define MEMEND (MEMORYSIZE*0x100000) /* From virtual mapping at 0 */
#define NOCACHE_BASE 0x10000000
#ifndef IRAMORIG
#define IRAMORIG 0x40000000
#endif
@ -15,8 +17,6 @@ STARTUP(target/arm/pp/crt0-pp502x-bl-usb.o)
#define FLASHORIG 0x001f0000
#define FLASHSIZE 2M
#define CACHEALIGN_SIZE 16
MEMORY
{
DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE

View file

@ -19,7 +19,6 @@
* KIND, either express or implied.
*
****************************************************************************/
#define ASM
#include "config.h"
#include "cpu.h"

View file

@ -1,4 +1,4 @@
#define ASM
#define __ASSEMBLER__
#include "config.h"
#include "cpu.h"

View file

@ -1,4 +1,4 @@
#define ASM
#define __ASSEMBLER__
#include "config.h"
#include "cpu.h"
#include "crypto-s5l8702.h" /* IM3HDR_SZ */

View file

@ -19,7 +19,6 @@
* KIND, either express or implied.
*
****************************************************************************/
#define ASM
#include "config.h"
#include "cpu.h"

View file

@ -40,7 +40,7 @@
#define SHA1_SZ 20 /* bytes */
#define SIGN_SZ 16
#ifndef ASM
#ifndef __ASSEMBLER__
#define IM3INFO_SZ (sizeof(struct Im3Info))
#define IM3INFOSIGN_SZ (offsetof(struct Im3Info, info_sign))
@ -92,6 +92,6 @@ void im3_sign(uint32_t keyidx, void* data, uint32_t size, void* sign);
void im3_crypt(enum hwkeyaes_direction direction,
struct Im3Info *hinfo, void *fw_addr);
#endif /* ASM */
#endif /* !__ASSEMBLER__ */
#endif /* __CRYPTO_S5L8702_H__ */

View file

@ -50,7 +50,6 @@
#define YUV2RGB_VERSION VERSION_ARMV5TE_WST
#define ASM
#include "config.h"
#include "cpu.h"

View file

@ -27,7 +27,8 @@
#include "regs/stm32h743/rcc.h"
#include "regs/stm32h743/syscfg.h"
#define PLL1Q_FREQ 48000000
#define PLL1Q_FREQ 240000000
#define PLL3R_FREQ 6000000
/* Flag to use VOS0 */
#define STM32H743_USE_VOS0 (CPU_FREQ > 400000000)
@ -44,21 +45,21 @@ INIT_ATTR static void init_pll(void)
/* For simplicity, PLL parameters are hardcoded */
_Static_assert(STM32_HSE_FREQ == 24000000,
"HSE frequency not correct");
_Static_assert(LCD_DOTCLOCK_FREQ == 6199200,
"PLL3 parameters not correct for dot clock");
_Static_assert(PLL1Q_FREQ == 48000000,
_Static_assert(LCD_DOTCLOCK_FREQ <= PLL3R_FREQ,
"PLL3R too slow for LCD");
_Static_assert(PLL1Q_FREQ == 240000000,
"PLL1Q parameters not correct");
/*
* Use HSE/4 input for PLL1
* Use HSE/16 input for PLL3
* Use HSE/12 input for PLL3
* PLL2 reserved for audio; configured in target PCM code
*/
reg_writef(RCC_PLLCKSELR,
PLLSRC_V(HSE),
DIVM1(4),
DIVM2(0),
DIVM3(16));
DIVM3(12));
/* Enable PLL1P, PLL1Q, PLL3R */
reg_writef(RCC_PLLCFGR,
@ -81,17 +82,14 @@ INIT_ATTR static void init_pll(void)
reg_writef(RCC_PLL1DIVR,
DIVN(80 - 1), /* 6 * 80 = 480 MHz */
DIVP(1 - 1), /* 480 / 1 = 480 MHz */
DIVQ(10 - 1), /* 480 / 10 = 48 MHz */
DIVQ(2 - 1), /* 480 / 2 = 240 MHz */
DIVR(1 - 1));
reg_writef(RCC_PLL3FRACR, FRACN(1468));
reg_writef(RCC_PLL3DIVR,
DIVN(161 - 1), /* approx 241.768 MHz */
DIVN(90 - 1), /* 2 * 90 = 180 MHz */
DIVP(1 - 1),
DIVQ(1 - 1),
DIVR(39 - 1)); /* approx 6.1992 MHz */
reg_writef(RCC_PLLCFGR, PLL3FRACEN(1));
DIVR(30 - 1)); /* 180 / 30 = 6 MHz */
reg_writef(RCC_CR, PLL1ON(1), PLL3ON(1));
while (!reg_readf(RCC_CR, PLL1RDY));
@ -191,7 +189,7 @@ const struct stm32_clock sdmmc1_ker_clock = {
};
const struct stm32_clock ltdc_ker_clock = {
.frequency = LCD_DOTCLOCK_FREQ,
.frequency = PLL3R_FREQ,
.en_reg = ITA_RCC_APB3ENR,
.en_bit = BM_RCC_APB3ENR_LTDCEN,
.lpen_reg = ITA_RCC_APB3LPENR,

View file

@ -24,16 +24,16 @@
#include "config.h"
/* Hsync pulse width in units of dot clocks */
#define LCD_HSW 10
#define LCD_HSW 14
/* Hsync back porch in units of dot clocks */
#define LCD_HBP 20
#define LCD_HBP 7
/* Horizontal active width in units of dot clocks */
#define LCD_HAW LCD_WIDTH
/* Hsync front porch in units of dot clocks */
#define LCD_HFP 10
#define LCD_HFP 7
/* Vsync pulse height in units of horizontal lines */
#define LCD_VSH 2

View file

@ -133,7 +133,7 @@ static const struct pingroup_setting pingroups[] = {
INIT_ATTR static void fmc_init(void)
{
/* configure clock */
reg_writef(RCC_D1CCIPR, FMCSEL_V(AHB));
reg_writef(RCC_D1CCIPR, FMCSEL_V(PLL1Q));
/* ungate FMC peripheral */
reg_writef(RCC_AHB3ENR, FMCEN(1));

View file

@ -1,4 +1,6 @@
#define __ASSEMBLER__
#include "config.h"
#include "cpu.h"
ENTRY(_start)
@ -6,34 +8,9 @@ OUTPUT_FORMAT(elf32-littlearm)
OUTPUT_ARCH(arm)
STARTUP(target/arm/tms320dm320/crt0.o)
#ifndef LCD_NATIVE_WIDTH
#define LCD_NATIVE_WIDTH LCD_WIDTH
#endif
#ifndef LCD_NATIVE_HEIGHT
#define LCD_NATIVE_HEIGHT LCD_HEIGHT
#endif
/* must be 16Kb (0x4000) aligned */
#define TTB_SIZE 0x4000
#define DRAMSIZE (MEMORYSIZE * 0x100000)
#define DRAMORIG CONFIG_SDRAM_START
#ifdef MROBE_500
#define LCD_FUDGE LCD_NATIVE_WIDTH%32
#define LCD_BUFFER_SIZE ((LCD_NATIVE_WIDTH+LCD_FUDGE)*LCD_NATIVE_HEIGHT*2)
/* Give this some memory to allow it to align to the MMU boundary.
* Note that since there are two buffers (YUV/RGB) it calculates the approximate
* memory needed in steps of 1 Meg.
*/
#define LCD_TTB_AREA (0x100000*((LCD_BUFFER_SIZE>>19)+1))
#else
#define LCD_BUFFER_SIZE (LCD_NATIVE_WIDTH*LCD_NATIVE_HEIGHT*2)
#define LCD_TTB_AREA (TTB_SIZE + LCD_BUFFER_SIZE)
#endif
/* End of the audio buffer, where the codec buffer starts */
#define ENDAUDIOADDR \
(DRAMORIG + DRAMSIZE - PLUGIN_BUFFER_SIZE - CODEC_SIZE - LCD_TTB_AREA)

View file

@ -1,4 +1,6 @@
#define __ASSEMBLER__
#include "config.h"
#include "cpu.h"
ENTRY(_vectors)
@ -6,36 +8,11 @@ OUTPUT_FORMAT(elf32-littlearm)
OUTPUT_ARCH(arm)
STARTUP(target/arm/tms320dm320/crt0.o)
#ifndef LCD_NATIVE_WIDTH
#define LCD_NATIVE_WIDTH LCD_WIDTH
#endif
#ifndef LCD_NATIVE_HEIGHT
#define LCD_NATIVE_HEIGHT LCD_HEIGHT
#endif
/* must be 16Kb (0x4000) aligned */
#define TTB_SIZE (0x4000)
/* Bootloader only uses/knows about the upper 32 M */
#define DRAMSIZE (MEMORYSIZE * 0x100000 / 2)
#define DRAMORIG CONFIG_SDRAM_START+DRAMSIZE
#ifdef MROBE_500
#define LCD_FUDGE LCD_NATIVE_WIDTH%32
#define LCD_BUFFER_SIZE ((LCD_NATIVE_WIDTH+LCD_FUDGE)*LCD_NATIVE_HEIGHT*2)
/* Give this some memory to allow it to align to the MMU boundary.
* Note that since there are two buffers (YUV/RGB) it calculates the approximate
* memory needed in steps of 1 Meg.
*/
#define LCD_TTB_AREA (0x100000*((LCD_BUFFER_SIZE>>19)+1))
/* End of the audio buffer, where the codec buffer starts */
#define TTB_BEGIN (DRAMORIG + DRAMSIZE - LCD_TTB_AREA)
#else
#define LCD_BUFFER_SIZE (LCD_NATIVE_WIDTH*LCD_NATIVE_HEIGHT*2)
#define LCD_TTB_AREA (TTB_SIZE + LCD_BUFFER_SIZE)
#define LCD_BEGIN (DRAMORIG + DRAMSIZE - LCD_TTB_AREA)
#endif
#define LCD_BEGIN (DRAMORIG + DRAMSIZE - LCD_TTB_AREA)
#define IRAMORIG 0x00000000
#define IRAMSIZE 0x4000
@ -191,7 +168,7 @@ SECTIONS
} > IRAM
#ifdef MROBE_500
.ttbtable TTB_BEGIN (NOLOAD) :
.ttbtable LCD_BEGIN (NOLOAD) :
{
. = ALIGN (0x4000);
_ttbstart = .;

View file

@ -118,17 +118,17 @@ void lcd_enable_composite(bool enable)
{
IO_GIO_BITCLR2 = 0x80;
vidtemp |= 0x2015;
IO_VID_ENC_DCLKCTL = 0x0800;
IO_VID_ENC_DCLKCTL = 0x0800;
IO_VID_ENC_DCLKPTN0 = 0x0001;
}
IO_VID_ENC_VMOD = vidtemp;
}
/* Note this is expecting a screen size of 480x640 or 240x320, other screen
* sizes need to be considered for fudge factors
*/
#define LCD_FUDGE LCD_NATIVE_WIDTH%32
//#define LCD_FUDGE LCD_NATIVE_WIDTH%32
/* LCD init - based on code from ingenient-bsp/bootloader/board/dm320/splash.c
* and code by Catalin Patulea from the M:Robe 500i linux port

View file

@ -1,5 +1,5 @@
#define __ASSEMBLER__
#include "config.h"
#define __ASSEMBLY__
#include "cpu.h"
OUTPUT_FORMAT("elf32-littlemips")

View file

@ -30,7 +30,6 @@
#include "system-mips.h"
#define CACHE_SIZE 16*1024
#define CACHEALIGN_BITS 5
#include "mmu-mips.h"
#define CFG_UART_BASE UART1_BASE /* Base of the UART channel */

View file

@ -35,7 +35,7 @@ static unsigned char* mallocbuf = NULL;
int codec_init(void)
{
/* codec_get_buffer() aligns the resulting point to CACHEALIGN_SIZE. */
/* codec_get_buffer() aligns the resulting point to MEM_ALIGN_SIZE. */
mem_ptr = 0;
mallocbuf = (unsigned char *)ci->codec_get_buffer((size_t *)&bufsize);
@ -67,8 +67,8 @@ void* codec_malloc(size_t size)
x=&mallocbuf[mem_ptr];
/* Keep memory aligned to CACHEALIGN_SIZE. */
mem_ptr += (size + (CACHEALIGN_SIZE-1)) & ~(CACHEALIGN_SIZE-1);
/* Keep memory aligned to MEM_ALIGN_SIZE. */
mem_ptr += MEM_ALIGN_UP(size);
return(x);
}

View file

@ -29,7 +29,7 @@
#include "config.h"
#if (CONFIG_PLATFORM&PLATFORM_HOSTED)
#if !defined(USE_IRAM)
#define ICODE_SECTION_MPA_ARM .text
#define IBSS_SECTION_MPA_ARM .bss
#define ICODE_ATTR_MPA_SYNTH

View file

@ -72,8 +72,8 @@ void iram_malloc_init(void){
void *iram_malloc(size_t size){
void* x;
/* always ensure alignment to CACHEALIGN_SIZE byte */
size = (size + (CACHEALIGN_SIZE-1)) & ~(CACHEALIGN_SIZE-1);
/* align for best performance */
size = MEM_ALIGN_UP(size);
if(size>iram_remain)
return NULL;

View file

@ -117,9 +117,6 @@ size_t strlcpy(char *dst, const char *src, size_t siz);
# define MEM_ALIGN_ATTR
#endif
#ifndef CACHEALIGN_SIZE
# define CACHEALIGN_SIZE 1
#endif
/*
#ifndef HAVE_CLIP_SAMPLE_16
static inline int32_t clip_sample_16(int32_t sample)

View file

@ -428,12 +428,9 @@ static void perform_config(void)
static void *ci_codec_get_buffer(size_t *size)
{
static char buffer[64 * 1024 * 1024];
char *ptr = buffer;
static char buffer[64 * 1024 * 1024] MEM_ALIGN_ATTR;
*size = sizeof(buffer);
if ((intptr_t)ptr & (CACHEALIGN_SIZE - 1))
ptr += CACHEALIGN_SIZE - ((intptr_t)ptr & (CACHEALIGN_SIZE - 1));
return ptr;
return buffer;
}
static void ci_pcmbuf_insert(const void *ch1, const void *ch2, int count)

View file

@ -31,6 +31,8 @@ foreach my $b (&stablebuilds) {
}
}
print "\n";
print "[status]\n";
foreach my $b (&allbuilds) {

1
tools/configure vendored
View file

@ -4909,7 +4909,6 @@ export APPLICATION=${application}
export SIMDIR=\$(ROOTDIR)/uisimulator/sdl
export GCCOPTS=${GCCOPTS}
export TARGET_INC=${TARGET_INC}
export LOADADDRESS=${loadaddress}
export SHARED_LDFLAGS=${SHARED_LDFLAGS}
export SHARED_CFLAGS=${SHARED_CFLAGS}
export LDOPTS=${LDOPTS}

View file

@ -24,8 +24,7 @@ preprocess = $(shell $(CC) $(PPCFLAGS) $(2) -E -P -x c -include config.h $(1) |
grep -v "^$(_hash_)" | grep -v "^ *$$" | \
sed -e 's:^..*:$(dir $(1))&:')
preprocess2file = $(shell $(CC) $(PPCFLAGS) $(3) -E -P -x c -include config.h $(1) | \
grep -v '^$(_hash_)' | grep -v "^$$" > $(2))
preprocess2file = $(SILENT)$(CC) $(PPCFLAGS) $(3) -E -P -x c -include config.h $(1) -o $(2)
asmdefs2file = $(SILENT)$(CC) $(PPCFLAGS) $(3) -S -x c -o - -include config.h $(1) | \
perl -ne 'if(/^_?AD_(\w+):$$/){$$var=$$1}else{/^\W\.(?:word|long)\W(.*)$$/ && $$var && print "\#define $$var $$1\n";$$var=0}' > $(2)

View file

@ -260,11 +260,11 @@ LINKROM := $(BUILDDIR)/rom.link
$(LINKRAM): $(RAMLDS) $(CONFIGFILE)
$(call PRINTS,PP $(@F))
$(call preprocess2file,$<,$@,-DLOADADDRESS=$(LOADADDRESS))
$(call preprocess2file,$<,$@,)
$(LINKROM): $(ROMLDS)
$(call PRINTS,PP $(@F))
$(call preprocess2file,$<,$@,-DLOADADDRESS=$(LOADADDRESS))
$(call preprocess2file,$<,$@,)
# Note: make sure -Wl,--gc-sections comes before -T in the linker options.
# Having the latter first caused crashes on (at least) mini2g.

View file

@ -15,7 +15,7 @@
#ifndef __JZ4760B_H__
#define __JZ4760B_H__
#if defined(__ASSEMBLY__) || defined(__LANGUAGE_ASSEMBLY)
#if defined(__ASSEMBLER__)
#ifndef __MIPS_ASSEMBLER
#define __MIPS_ASSEMBLER
#endif

View file

@ -1,4 +1,4 @@
#define ASM
#define __ASSEMBLER__
#include "config.h"
#include "cpu.h"
#include "mks5lboot.h"

View file

@ -30,7 +30,7 @@
#define BIN_OFFSET (CERT_OFFSET + ((CERT_SIZE + 0x3) & ~ 0x3))
#define MAX_PAYLOAD (DFU_MAXSIZE - BIN_OFFSET)
#ifndef ASM
#ifndef __ASSEMBLER__
#include <stddef.h>
#include <stdint.h>
@ -124,6 +124,6 @@ void ipoddfu_debug(int debug);
#ifdef __cplusplus
};
#endif
#endif /* ASM */
#endif /* __ASSEMBLER__ */
#endif /* __MK6GBOOT_H__ */