Commit graph

12169 commits

Author SHA1 Message Date
Solomon Peachy
daef425c59 pcm_mixer: Get default sample rate from pcm layer.
Change-Id: I6eccb37556e70f23112bbb0e26f4a45ac0930245
2026-03-28 08:16:04 -04:00
Solomon Peachy
759ef2767a pcm: Make pcm_is_ready a per-sink property instead of a global.
All that matters is that the _current_ sink is ready, not all possible
sinks.  When switching sinks we will need to ensure tehy are initialized
before switching over.

Change-Id: I341f7e9dcb4e2add4d0b292b68b69eb08dec0194
2026-03-28 07:09:54 -04:00
Solomon Peachy
ae724ba5f3 as3525: PCM driver init references the sink directly
Change-Id: I42e8f04214790676d6f177669cdeda58fa8e8c28
2026-03-25 10:13:36 -04:00
Aidan MacDonald
da53cc0f14 echoplayer: pcm: increase SAI FIFO buffer depth
Change the SAI FIFO threshold so that it is always
kept topped up at maximum; DMA needs to do single
transfers to the peripheral now. Ignore FEIF errors
since they seem to occur constantly with this setup
(though it's not exactly clear why this happens).

FEIF only indicates that the SAI made a DMA request
while the DMA FIFO is empty, which isn't a fatal error.
The DMA channel will simply service the request when
it is ready.

Keeping the SAI FIFO constantly full increases the
overall timing margin before underrun so losing the
FEIF info isn't a big deal in practice.

Change-Id: I16eb1cbb17039db76938bd86c4921b8060c83556
2026-03-25 07:33:19 -04:00
Solomon Peachy
e923b354a6 FS#13836 - Remove the pcm sink_mutex to unbreak usb_dac mode
The purpose of the mutex is to make it possible to switch pcm sinks
safely, but pcm_play_lock/unlock and pcm_set_frequency need to be
called from IRQ context which is fundamentally incompatible with
our mutex implementation.

The proper path forward will be to promote the counter-based per-sink
lock/unlock implementation to the pcm core, and only allowing sink
switching when the counter is 0.

In the mean time, just remove sink_mutex entirely as the sink switching
code has yet to be committed.

Change-Id: I029459d7ec6ea47c6e2b8fce52d203129a282832
2026-03-21 08:06:20 -04:00
Aidan MacDonald
acd3a5f0ce echoplayer: implement ADC to read battery voltage
Change-Id: I8043e7d2f02c10cb8c9d9ec59b7d216945431481
2026-03-18 12:51:51 +00:00
Vencislav Atanasov
a77c5d2219 3ds: Various fixes, mostly for compiler warnings
- Move all devkitpro includes before the Rockbox ones so that the macros which are both conflicting and unused can be undef'd
- Remove unused result variables
- Exclude an unused function from being compiled for this target
- Fix hex number formatting
- Fix the return value of dummy functions
- Fix macro redefinition in the plugins keypad config
- Remove duplicate button mapping
- Turn off -Wchar-subscripts as it's already handled in Rockbox's ctype.h

Change-Id: I3f5a3d492c585f233277a380feaea5fe877a044f
2026-03-13 10:24:36 -04:00
Vencislav Atanasov
aa834e83aa 3ds: Fix crash on shutdown
It is required to call gfxExit() before exiting the app if gfxInit() was previously called. Otherwise, the GSP thread continues to run after the stack is invalidated. The missing code is already in lcd_shutdown(), but it was never called because HAVE_LCD_SHUTDOWN was not defined for the ctru target.

Change-Id: I8999df6372cd593c5b52478028ad7421b23d5f92
2026-03-11 22:26:44 +02:00
mojyack
e13befb925 pp5020: ata: do not yield in ata_wait_intrq()
Confirmed on iFlash-modded ipodvideo, USB mass storage connections
frequently fail with bus resets during mount on macOS, and trigger
"reset high-speed USB device" errors on Linux during sequential
reads.

The root cause is: storage_read_sectors() calls yield() via
ata_wait_intrq(), which switches to the main thread running
handle_usb_events() loop. This calls send_event(GUI_EVENT_ACTIONUPDATE),
triggering LCD redraw that takes approximately 110ms. This stalls the
ATA DMA completion, causing the USB bulk transfer to time out from the
host's perspective.

This commit removes the yield to prevent the reading thread from being
preempted by the lengthy LCD redraw during DMA completion.

This also improves sequential read throughput from ~13MB/s to ~18MB/s.

Change-Id: Ia552f97aa0169c93c4f21e250d13dc3a626661d4
2026-03-10 18:17:41 -04:00
Aidan MacDonald
9605b453da Fix yellow in c72ffa7a9a ("diacritic: Critical bugfixes")
Change-Id: Ie780cab7e9926165cab1e48319c6743e3b6accb1
2026-03-10 10:14:42 +00:00
Solomon Peachy
a2b754d829 unicode: Support diacritic marks > 0xffff (disabled for now)
* Terminating record of the max unicode codepoint (0x10ffff)
 * Add in Arabic diacritic marks in the 0x10efa..10efff range

This is currently disasbled due to it effectively doubling the
size of our diacritic table. The diacritics added are unlikely
to be seen in practice as they are used only in some formal
Quaranic contexts.  If we identify other diacritic marks above
0xffff, then we can turn this code on.

Change-Id: I50c2eace18c70be6fe7199fccab190e7da401089
2026-03-09 21:57:34 -04:00
Solomon Peachy
c72ffa7a9a diacritic: Critical bugfixes
* When the codepoint > 0xffff, don't overflow past the end
   of our diacritic table (Fixed by William Wilgus)
 * Truncation of the 'info' field causes the RTL flag to be dropped
   (RTL flag is b15 but we truncate it into an 8-bit variable)

Both bugs introduced in a2c10f6189 (September 2025)

Change-Id: Id5425606f2cf91d3b3a81f4b67a97d546de81e41
2026-03-09 21:52:37 -04:00
Aidan MacDonald
add06955a2 firmware: add copyright headers to core_alloc.c/h
These files have been missing copyright headers since
they were added in comit d0b72e2590 ("GSoC/Buflib:
Add buflib memory alocator to the core.").

Thomas Martitz seems to be the original author, which
is documented in the commit metadata and backed up by
emails from the rockbox-dev archive, for example [1].

[1]: https://www.rockbox.org/mail/archive/rockbox-dev-archive-2011-08/0000.shtml

Change-Id: Id1a3abd4975674ffbc6f7e9123ee57d49bcaa38e
2026-03-09 10:26:18 +00:00
Solomon Peachy
e8daf314be mrobe500: fix yellow in a24142b234
LCD_FUDGE is now defined in the cpu header, as it's needed for memory
layouts.

Change-Id: I3a91581286cb7765f8217da34c6c87c15e74b399
2026-03-06 16:24:13 -05:00
Aidan MacDonald
a24142b234 firmware: cleanup duplicated DM320 LCD memory defines
Move the rather large block of code that's been copied
in three separate linker scripts into the CPU header.

Change-Id: I9f38e4901fa4ff699f00d97064a9cdaf7cfd6aab
2026-03-06 15:55:35 -05:00
Aidan MacDonald
99dd797169 firmware: cleanup PortalPlayer NOCACHE_BASE defines
Move the definition of NOCACHE_BASE to the CPU headers
instead of having them copy-and-pasted in a few places.

Change-Id: Ibbab27a5a07906d46dbd4dd9065f2238bc885d6b
2026-03-06 14:15:29 -05:00
Solomon Peachy
408f155f53 build: fix red in 7eeb4e4302
STORAGE_WANTS_ALIGN needs to be ignored for simulator builds

Change-Id: I4d788f91d3d1ed81c0621b9adac985ca188d918c
2026-03-06 13:37:27 -05:00
Aidan MacDonald
7eeb4e4302 firmware: refactor CACHEALIGN_BITS/SIZE defines
Mostly motivated by PP needing CACHEALIGN_SIZE in linker
scripts, which can't include system.h, so move these to
cpu.h instead. Also gets rid of the default 32 byte line
size that was used if the target didn't define alignment
itself. RK24xx, DM320, and JZ4740 were missing this but
have been confirmed (from datasheets) to use 32-byte cache
lines.

Add checks to make sure the macros are appropriately
(un)defined based on the HAVE_CPU_CACHE_ALIGN define,
and make sure their values are consistent when they
are defined.

Disable HAVE_CPU_CACHE_ALIGN for hosted targets since it
arguably doesn't matter if there's a cache, if we aren't
responsible for cache maintenance.

A few files in rbcodec use CACHEALIGN_SIZE, but these
can be converted to MEM_ALIGN_SIZE, which is identical
to CACHEALIGN_SIZE if the latter is defined. On other
targets, it aligns to at least sizeof(intptr_t).

Change-Id: If8cf8f6ec327dc3732f4cd5022a858546b9e63d6
2026-03-06 14:49:00 +00:00
Aidan MacDonald
dbfedcd65e stm32h743: rename CPU header to match other platform conventions
Change-Id: Ie7564df983aed460947ebde3bf73f8147d5bc974
2026-03-06 14:01:38 +00:00
Aidan MacDonald
f44b6c78e0 misc: respect standard __ASSEMBLER__ define in CPU headers
The JZ47xx and S5L87xx processor families used their own
special defines (__ASSEMBLY__ and ASM respectively) in
their CPU headers to check if they were included from an
assembly source file.

For GCC the standard seems to be __ASSEMBLER__, so check
for that instead and remove the non-standard symbols.
Being more consistent across platforms makes it easier to
include cpu.h from cross-platform files (eg. plugin.lds).

Change-Id: I282930cad34e1a2ff18166f3b4338548b34f4a49
2026-03-05 21:13:50 +00:00
Aidan MacDonald
cf1e3fd5a3 misc: remove leftover pnx0101 support code
Remove now-unused stuff related to the PNX0101 processor,
which was missed during the removal of the IFP-7xx port.

Change-Id: I5ff248b3e83cb67a357743130c3e51ed84a720e5
2026-03-05 15:41:06 +00:00
Solomon Peachy
cef29a1986 fat: fsinfo structure references _clusters_ not sectors
These fields are defined by FAT32 itself, and are specified as 32-bit
values.  So switch them from sector_t to simple uint32_t.

Change-Id: I98afecfbe1f8a1b83fbdd4ec3fea016b8e0b985d
2026-03-04 13:10:46 -05:00
Aidan MacDonald
87f2024631 echoplayer: clock FMC from PLL1Q
Unlinking the FMC from the bus clock should make it
simpler to do CPU frequency scaling later on.

Change-Id: Ia87bbe3dd01ff25ea1520309680017b400471bfe
2026-03-04 10:23:23 -05:00
Aidan MacDonald
b155e2c35a echoplayer: modify LCD timings to disable PLL3 fractional mode
According to the datasheet, the PLL fractional mode is
apparently not supported in the medium VCO range.

The LCD isn't picky about front/back porch settings so
modify these to get a dot clock close to 6 MHz (within
~0.1% error).

Change-Id: I51647534db8c2b261391864db9262a0b04548e6d
2026-03-04 10:23:17 -05:00
Solomon Peachy
ea570c5728 pcm: Make more of the low-level PCM API private
* pcm_play_data
 * pcm_play_stop
 * pcm_play_stop_int
 * pcm_is_playing
 * pcm_set_frequency
 * pcm_get_frequency
 * pcm_apply_settings

Now, the only user of these functions are the mixer and recording layers
that provide a higher-level API to plugins and the main [playback]
application.

Outside of the PCM core, pcm_apply_settings() was only used immediately
following a call to mixer_set_frequency(), so the latter function
now always calls the former.

Change-Id: I61c3144dc156b9de9b7963160b525c6d10c6ad4b
2026-03-03 13:09:21 -05:00
Aidan MacDonald
84fa538979 echoplayer: add PCM debug menu
Display DMA error counters and the SAI underrun counter
in the debug menu.

Change-Id: I235bfcb0fa965d87c30deeb300535141eda5f974
2026-03-03 09:24:01 -05:00
Aidan MacDonald
5c1ae51193 echoplayer: implement audio playback
Playback is implemented using a target-specific PCM layer,
using the STM32H7 SAI & DMA registers directly. There are
a number of pop/click issues:

1. Slight click when powering up the amplifiers
2. Click when starting and stopping playback
3. Popping when changing playback frequency
4. Popping when shutting down

It should be possible to eliminate or at least mitigate
(2) to (4) in software, but (1) happens as a result of
powering on the amplifiers while everything is muted so
might be unavoidable.

Change-Id: I398b66596176fb2341beb7deba7bf6f4f3fb82b3
2026-03-03 09:23:23 -05:00
Aidan MacDonald
a1b7e7b134 sdmmc_host: mark tCardInfo initialized at end of card init
This is needed to display card info in the debug menu.

Change-Id: I2e45edd9a9e26834efac48cea892157588c546a7
2026-03-02 17:11:33 -05:00
Solomon Peachy
ebfba622b6 fix yellow in dfa33c246b
(Today I learned that the Cowon D2 is fixed at 44.1KHz)

Change-Id: I8d50c6b81b144e32a79a2728c9cad2ffdc7b03ca
2026-03-01 22:58:33 -05:00
mojyack
dfa33c246b pcm: introduce pcm_sink
move target-specific pcm operations into builtin_pcm_sink.
in subsequent commits, another pcm_sink is added, and it becomes
possible to switch between them.

Change-Id: I8f8b9661e01d6e6472f34224ddc3760856778457
2026-03-02 10:09:11 +09:00
Aidan MacDonald
ad45b2910a echoplayer: disable recording
Though the rev1 hardware is capable of recording from a
headset mic, this feature seems likely to be dropped on
future hardware revisions, and I don't see much point to
implementing it now.

Change-Id: I77e403bdd1ca53f9018835d3c3042dc86ee0f8f3
2026-02-27 20:11:27 +00:00
Aidan MacDonald
df89a47c11 drivers: add TLV320AIC3104 codec driver
Change-Id: Ic8825fc8f057c28316e9f7cb6af3dd34e8200d48
2026-02-26 15:00:13 +00:00
Aidan MacDonald
33cdbf87d7 echoplayer: add echoplayer-specific codec header
Remove the generic TLV320AIC3104 codec header. The codec
is sufficiently complex that a one-size-fits-all driver
isn't really feasible, eg. due to different clocking and
output configurations.

It's easier for targets to have their own audio headers
tailored to their use case than a generic header with
lots of ifdefs.

Change-Id: I63d92d57c28ddd7da7aa3174bd583d8afb1aa56d
2026-02-26 15:00:13 +00:00
Petr Mikhalicin
246bf4af75 backlight: Fix dimmed display doesn't go to sleep
Firmware didn't start sleep countdown if
1. Display was already dimmed
2. Fade out timer was set

You can reproduce this by:
1. Set fade out timer. For example, 500ms
2. Wait till display will be dimmed and go to sleep
3. Switch hold ON or plug headphones

Change-Id: I27ca857aa8db4551bd9caad4815cd73a64bf6185
2026-02-25 13:07:38 -05:00
Aidan MacDonald
55183c0b2a stm32h7: sdmmc: write DCTRL after DTIMER/DLENR for non-data commands
According to RM0433 the DCTRL register needs to be written
after DLENR and DTIMER. This is respected for data transfer
commands but not for non-data commands. Nothing bad seems
to be happening because of this, but it seems wise to rectify
the issue.

Change-Id: I55d8f2c1994bff747e5978847fda57445f001b02
2026-02-24 20:18:22 -05:00
Aidan MacDonald
65bf8d4192 stm32h7: sdmmc: ensure minimum time between CLKCR/CMDR writes
According to RM0433 consecutive writes to the CLKCR and CMDR
registers must be separated by at least 7 AHB clock cycles.

The initialization code didn't respect this and it seemed to
be causing a nasty bug, where the SDMMC bus clock got stuck
at 400 KHz in hardware. Despite the CLKCR register reading
back the correct value, it could not be written with a new
value even in the debugger; resetting the peripheral was the
only way out of this state.

Adding some dummy register reads after any access to CLKCR
should insert the necessary number of wait states. Without
the fix, the SDMMC clock gets stuck about 12% of the time.
With this fix, the clock always initializes correctly.

Change-Id: Iba85b8e1e3c60992ddc42fb4c1e66c37941ed617
2026-02-24 20:18:15 -05:00
Paul Sauro
914760b54e config: USB_CHARGING_FORCE must be enabled for all iPods
If not, these devices will charge very slowly (0.07A) when plugged into a wall plug, and will all discharge slowly when docked & playing music.

Enabling this option (that is already enabled by default on some other devices like erosq and fiio m3k) make them pull between 0.20 and 0.30. They charge faster, just as fast as on Stock OS, and won't discharge when playing music while docked.

Change-Id: I90a59caaca463354772b1869f7333d8efce4f117
2026-02-23 16:11:38 -05:00
Solomon Peachy
022db8214c fix red in 5b5cd252d0: Don't compile ALSA driver for hosted bootloaders
Change-Id: Ied255fb215a2b56ac827f509e949abff5819d3a0
2026-02-23 11:10:20 -05:00
Aidan MacDonald
5b5cd252d0 pcm: improve 32-bit software volume scaling
Replace the factor calculation from pcm-alsa.c, which
is based on signal *power* ratios, with the fp_factor()
calculation that is based on amplitude ratios. Because
power changes with the square of amplitude, this means
1 dB of power equals 2 dB of amplitude.

Rockbox's volume controls are amplitude-based, so the
smallest step size for pcm-alsa was effectively 2 dB.
The fp_factor() method supports 0.1 dB steps and is a
bit more accurate besides, so it's simply superior in
all respects (aside from taking a few more CPU cycles
to calculate the factor).

Change-Id: I34d143c225d8b5e085cde299fc405f83c13314bf
2026-02-23 15:44:42 +00:00
Solomon Peachy
922b5e9a4b vx767: Bring config in line with its siblings
* Single storage device type (SD) that can be hotswapped
 * Fix bootloader build

Change-Id: I494a46ccf0f7f70cfa149a0727977aa421891d6c
2026-02-23 08:32:44 -05:00
Solomon Peachy
e81dd7c709 xduoox3: Disable CONFIG_STORAGE_MULTI
This is only necessary for targets that have more than
one storage *type* (==SD/ATA/NAND).

Change-Id: I004e597440e76252c4ffa0591b7632254c159431
2026-02-23 08:23:47 -05:00
Aidan MacDonald
4af1768795 echoplayer: initialize I2C bus
Change-Id: I159d1a2c97b02b5e7aa61452098b05d9d854dc89
2026-02-23 08:19:35 -05:00
Aidan MacDonald
9c5017ea98 stm32h743: implement I2C controller interface
Change-Id: I1d4af5ba8a42d4d2a6a3b1d50059e699b016431b
2026-02-23 08:19:29 -05:00
Aidan MacDonald
c9d468d924 stm32h7: use nvic_disable_irq_sync for usb interrupt
Change-Id: I583b860f4b1696d4be84b0bf858a8b857d891aea
2026-02-22 20:54:06 -05:00
Aidan MacDonald
02d317a3f4 arm: add nvic_disable_irq_sync()
Disabling an IRQ in the NVIC may not take effect right away;
if the IRQ is being disabled to implement a critical section
it's necessary to follow up with dsb + isb to serialize the
NVIC update. Add a helper function for doing this.

Change-Id: Iaaa238ad39997cc3c6d62867d265cf9e9e0e5c4b
2026-02-22 20:53:53 -05:00
Solomon Peachy
017dd72ff3 plugins: Convert all plugins to using mixer API for playback
pcm_play_data -> mixer_channel_play_data
pcm_set_frequeny -> mixer_set_frequency
pcm_play_stop -> audio_stop at startup / mixer_channel_stop at shutdown
pcm_is_playing -> mixer_channel_status

All of these have been removed from the plugin API.  Updated API docs to
clarify role of audio_stop() vs mixer_channel_stop()

Todo:  get rid of pcm_play_[un]lock().

Change-Id: I8800c131b51f064ee923a4c6e42aa405d33851fc
2026-02-22 08:15:14 -05:00
Aidan MacDonald
f6dfa5144d stm32h743: break out SAI and DMA interrupt handlers
Change-Id: I6a8eba6211eab34915d99000426aacd6ea396769
2026-02-22 12:45:56 +00:00
Aidan MacDonald
0cc6f070dd stm32h743: add DMAMUX registers and request IDs
Change-Id: I3819c6535a224d73cfa98b1d8ba78c6927b55c9e
2026-02-22 12:45:56 +00:00
Aidan MacDonald
90bd32dc38 stm32h743: add DMA1/2 registers
Change-Id: I24487fd7a889ea7ae3627ecf1c800c8edffaea42
2026-02-22 12:45:56 +00:00
Aidan MacDonald
0d7f240d81 stm32h743: add SAI registers
Change-Id: I2d669005372daae537c41df68a32043ff96b8e76
2026-02-22 12:45:56 +00:00