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echoplayer: clock FMC from PLL1Q

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Unlinking the FMC from the bus clock should make it
simpler to do CPU frequency scaling later on.

Change-Id: Ia87bbe3dd01ff25ea1520309680017b400471bfe
This commit is contained in:
Aidan MacDonald 2026-03-02 17:09:06 +00:00 • committed by Solomon Peachy
parent b155e2c35a
commit 87f2024631
2 changed files with 4 additions and 4 deletions
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6
firmware/target/arm/stm32/echoplayer/clock-echoplayer.c
View file

@ -27,7 +27,7 @@
#include "regs/stm32h743/rcc.h"
#include "regs/stm32h743/syscfg.h"
#define PLL1Q_FREQ 48000000
#define PLL1Q_FREQ 240000000
#define PLL3R_FREQ 6000000
/* Flag to use VOS0 */
@ -47,7 +47,7 @@ INIT_ATTR static void init_pll(void)
"HSE frequency not correct");
_Static_assert(LCD_DOTCLOCK_FREQ <= PLL3R_FREQ,
"PLL3R too slow for LCD");
_Static_assert(PLL1Q_FREQ == 48000000,
_Static_assert(PLL1Q_FREQ == 240000000,
"PLL1Q parameters not correct");
/*
@ -82,7 +82,7 @@ INIT_ATTR static void init_pll(void)
reg_writef(RCC_PLL1DIVR,
DIVN(80 - 1), /* 6 * 80 = 480 MHz */
DIVP(1 - 1), /* 480 / 1 = 480 MHz */
DIVQ(10 - 1), /* 480 / 10 = 48 MHz */
DIVQ(2 - 1), /* 480 / 2 = 240 MHz */
DIVR(1 - 1));
reg_writef(RCC_PLL3DIVR,

2
firmware/target/arm/stm32/echoplayer/system-echoplayer.c
View file

@ -133,7 +133,7 @@ static const struct pingroup_setting pingroups[] = {
INIT_ATTR static void fmc_init(void)
{
/* configure clock */
reg_writef(RCC_D1CCIPR, FMCSEL_V(AHB));
reg_writef(RCC_D1CCIPR, FMCSEL_V(PLL1Q));
/* ungate FMC peripheral */
reg_writef(RCC_AHB3ENR, FMCEN(1));