Replace the factor calculation from pcm-alsa.c, which
is based on signal *power* ratios, with the fp_factor()
calculation that is based on amplitude ratios. Because
power changes with the square of amplitude, this means
1 dB of power equals 2 dB of amplitude.
Rockbox's volume controls are amplitude-based, so the
smallest step size for pcm-alsa was effectively 2 dB.
The fp_factor() method supports 0.1 dB steps and is a
bit more accurate besides, so it's simply superior in
all respects (aside from taking a few more CPU cycles
to calculate the factor).
Change-Id: I34d143c225d8b5e085cde299fc405f83c13314bf
Disabling an IRQ in the NVIC may not take effect right away;
if the IRQ is being disabled to implement a critical section
it's necessary to follow up with dsb + isb to serialize the
NVIC update. Add a helper function for doing this.
Change-Id: Iaaa238ad39997cc3c6d62867d265cf9e9e0e5c4b
pcm_play_data -> mixer_channel_play_data
pcm_set_frequeny -> mixer_set_frequency
pcm_play_stop -> audio_stop at startup / mixer_channel_stop at shutdown
pcm_is_playing -> mixer_channel_status
All of these have been removed from the plugin API. Updated API docs to
clarify role of audio_stop() vs mixer_channel_stop()
Todo: get rid of pcm_play_[un]lock().
Change-Id: I8800c131b51f064ee923a4c6e42aa405d33851fc
At low speed there's some occasional corrupted pixels,
most visible on album art and such; this goes away at
medium speed.
Change-Id: Ice4eaec4284023d2d3f5c571b242cb27ebc26da9
The problem with drive strength and things not working reliably
at 50 MHz turned out to be entirely caused by the ESD diodes on
the data/command/clock lines, which have a whopping 200-300 pF
junction capacitance -- 6-10x higher than the 30 pF limit given
by the MMC spec.
After desoldering the diodes the bus seems stable at 50 MHz and
with any drive strength (note MEDIUM is still fast enough even
for 50 MHz, so the drive strength is unchanged).
Change-Id: If9847ee4145f5ed2f7e172cfa89acad0737a897f
* Get rid of the SD_CIM_RESET meta-command and put all
reset/init logic into one place
* Don't double-issue the SD_GO_IDLE_STATE command
* Explicitly set lowest speed upon reset
Change-Id: I5abfe9f64997e39087b8a77d525f90c77733a1a8
It was limited to 48KHz due to insufficient IRAM but at some point in
the last five years or so that must have changed.
Change-Id: Ia893ed5e1f3026158daad77991c3d9cca2fed97c
* Rework logf/DEBUG distinction
* Don't try to init a card that isn't detected
* Inform card that host supports SDUC
* Implement CMD22 (SET_UPPER_ADDR)
* Implement CMD23 (SET_BLOCK_COUNT)
* Disable DMA for transfers under 512 bytes
* Created ACMD+data xfer command path
* Incorrect handling of RESPONSE_R7
* Clean up 4bit stuff, only turn it on after we enable it in the card.
* Clear END_CMD_RES bit _after_ we check the status
* Probe SCR <-- NOT YET WORKING, DISABLED
jz4740 had these additional improvements:
* Restructuring to bring it closer to 4760 driver
* Unified read/write setup code
* IRQ handling and polling improvements
Change-Id: I47379f097af4bf50177499b3d80a6c9c42d48057
Low speed works for 50pF loads up to 12 MHz. LCD signals
fall well within those limits so there's no reason to use
any higher speed.
Change-Id: I6dab899fac316bb02572174ef13a98cccbf4ae66
The semaphore was released after all bytes were read/written
without waiting for the EOT event, which is why the delay at
the end of the transfer needed to be longer than expected.
Change-Id: I6b48fc01cda69564c0ec8f843afd1b0c3a9c5a3c
I have a 1TB SD card that gets filesystem corruption when writing large
amounts of data when using Rockbox in USB storage mode. The card doesn't show
this behaviour when using the original firmware or when using an external SD
card writer.
This is on an Aigo Eros Q device. Same brand 512GB card does not exhibit this
behaviour.
Whether this specific SD card explicitly requires CMD23 or if there's a
problem with the controller's timing of auto-CMD12 in combination with this
card is currently unknown, but implementing it does solve the problem.
This change request implements CMD23 by first probing if SBC is supported by
the SD card and then using it instead of AUTO_CMD12.
Change-Id: Ib2dc8e179b0fab98ca59c348061cb7d5850884dd
The driver didn't handle the busy signal at the end of
some command responses (R1b response type), notably the
CMD12 (STOP_TRANSMISSION) sent after a multiblock write
would time out because DTIMER==0 and leave the DPSM in
an incorrect state for the next command, causing a hang.
Change-Id: I406337a7612f759418a4872979aa2de5aa2244c7
When doing I/O, the interrupt can rarely fire with no
active command and no status bits set. This is probably
because the interrupt is set pending by the NVIC while
the handler is already running, so should be harmless.
Change-Id: I0c2570abe6e3c85ddbfa2ebe0afcf8677b77408f
I'm leaving it enabled because that's clearly the intent
of the bootloader, but at least there's now an easy path to disabling it
if so desired.
Change-Id: I4f4ecc9a453d376f92e411e0544b587fe4b4c864
This way we don't need to stub out a bunch of functionality when we
don't have any actual USB class drivers enabled.
Change-Id: Ia0ecf5be4bb41bebfcd347090959f3204a2aba59
They haven't seen development activity for the better part
of two decades and apparently were never able to even boot
to Rockbox, although the Rockbox bootloader could load the
original firmware.
Change-Id: I5cfa5909c21feaf2825aa685a05e78044b893a13
Allow toggling the system debug state from the debug menu
in Rockbox, or by holding a button combo at boot, so that
an SWD/JTAG debugger can be attached to normal non-debug
builds without too much hassle.
Change-Id: Iee47ef916ade2e5ec1094a63c68e48f1b27b0bbb
While 50 MHz works for low activity and small amounts of
data, there are frequent CRC errors when handling larger
transfers. Increasing drive strength only makes it worse.
Everything seems stable at 25 MHz though.
Change-Id: I3471c490ab63b2302b21ee2fe601519ee5a40ce5
The handful of uses are only doing zero initialization
so don't need to go in the data section, they can go in
bss instead.
Change-Id: I7108ac60867aa20b4429ac0747d00109563bb3bf
Both targets were part of the (presumably dead) Lyre project
and no longer build. The Mini2440 was much more complete than
the Lyre and doesn't seem terribly difficult to fix up to the
point where it at least builds, if someone still cares -- but
given it is a dev board in a box, it's unlikely it ever saw
much use.
Change-Id: I09745379d28db69ea9aaf77f0a62b049884260e1
Some purely mechanical fixes to get the normal build
working. Besides missing symbols all the plugins and
codecs build just fine.
Change-Id: I946ba39096a46be8308450bafd51a0995db8e323
It doesn't seem to have been functional ever and currently
doesn't build; eg. the last commit to the LCD driver added
a syntax error, and there's some duplicate functions between
mmu-armv6.S and system-pp502x.c. Doesn't seem worth the
effort to fix.
Change-Id: I82b5bec3ed9686f28aedbe283818af792b96daf4
These targets haven't seen any changes since 2008-09
have bitrotted to the point they don't compile anymore.
With only internal NAND flash for storage which doesn't
seem to have ever been accessible from Rockbox, they've
never been usable and there's probably not much point
keeping them around any more.
Change-Id: I2fc63da20682b439126672065ae013044cb2d1c4
It looks like the GDB stub only ever worked for the Archos
Recorder and iRiver IFP-7xx, neither of which are in-tree
any more.
Change-Id: If1910675b88b4707d26df9bc095818902af2d25b
PLUGIN_USE_IRAM is almost equivalent to USE_IRAM except
that USE_IRAM might be defined in core, but not plugins.
All remaining uses of PLUGIN_USE_IRAM are inside plugins,
however, so there is no point keeping both defines around.
Change-Id: I6902c85651f3d82b7d19ea32eaa60fc5c19eded7
The section copy loops in crt0.S rely on sections starting
and ending on 4-byte aligned addresses. If the last variable
alloacted in the BSS section isn't a multiple of 4 bytes,
then _bssend can get misaligned and break the copy loop.
This problem was masked by -fcommon since COMMON variables
go at the end of the BSS section, and they were for the most
part a multiple of 4 bytes. The switch to -fno-common broke
the bootloader because with COMMON gone, the last thing in
BSS was a 1-byte variable in led.o. The main binary appears
to have had the correct alignments by sheer luck.
Change-Id: I21ee3653d89d1607a2f458c457f1a51e33c22f05
We were using a definition of 0b100 for "Quad Input / Quad Output" mode
which is marked as "reserved" in the X1000 TRM. The correct value is
0b101.
Somehow this "worked" for some devices but failed for others?
Credit for this discovery+fix goes to forum user ZappBranigan2972
Change-Id: Iedbd2d1b6da55113e266ad8aa51fc9c3130bf2b8
Using a simple memcpy to a separate framebuffer prevents
objectionable levels of flickering caused by scanning out
the main framebuffer while it's modified between updates.
With optimized memcpy, copying the whole framebuffer takes
about 260us at maximum CPU+bus frequency. Using DMA would
likely be a bit faster and more power-efficient, but that
can be left as a future optimization.
Change-Id: Ia6dc36d797cdb7a5f6663078c0ecce661267bedf
This assembly implementation is marginally faster than
the non-size-optimized C version for large copies, but
is around half the code size.
Unaligned loads/stores will be used on platforms that
support it: though slower than aligned accesses, this
is still faster than copying byte-by-byte and has the
advantage of simplicity and small code size.
Change-Id: Ieee73d7557318d510601583f190ef3aa018c9121
Either QSPI is not wired up, or there is some other issue preventing
them from working correctly.
If this doesn't show any more issues then we should be able to produce a
new set of bootloader builds enabling support for the HifiWalker H2 v2.3
variant. We will eventually find out if other OEMs have chosen dfferent
flash parts for their specific ErosQ/K variations.
(Credit for these experiments goes to the forum users
ZappBranigan2972 and gonzyfrigus)
Change-Id: I349f4bbac509010753ac2ad24ad42a234cccdea5
