len0rd/rockbox
1
0
Fork 1
mirror of https://github.com/Rockbox/rockbox.git synced 2026-10-09 23:53:28 -04:00
Code Issues Projects Releases Packages Wiki Activity Actions

rk27xx: restore the missing 0xd5 NAND device code

Browse source 
flash_init() identifies a chip by looking its READ ID device code up in
device_code[] and taking the capacity from device_info[] at the same
index. device_code[] had seven entries and device_info[] eight: 0xd5
(16 Gbit) was dropped when the table was transcribed from the OF. Every
code after the gap picked up the capacity one row up, so a 0xd7
(32 Gbit, 4 GiB) part was sized at 2 GiB.

On a generic rk2705 that halved total_phy_sec to 4194304, and the FTL
looked for its tables in the wrong place and read erased flash. With the
entry restored it reports 8388608, matching the chip and the host-side
dump of the same unit.

The OF's own table, as it appears in its NAND bootloader:

    76 79 f1 da dc d3 d5 d7  00 00 02 00  00 00 04 00 ...

A compile-time check now fails the build if the two tables differ in
length again. Also fixes two register addresses in the same loop that
were missing a digit (0x180E204/0x180E208 for 0x180E8204/0x180E8208);
they are stored for reference only and nothing reads them.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Change-Id: Ia70c249eea2e44ea34aef52d8ae20860b2b5db9d
This commit is contained in:
Marcin Bukat 2026-09-24 00:30:51 +02:00
parent c3356ac35f
commit d8f099f937
1 changed files with 12 additions and 3 deletions
Download patch file Download diff file Expand all files Collapse all files

15
firmware/target/arm/rk27xx/nand-rk27xx.c
View file

@ -58,7 +58,10 @@ enum vendor_t {
ST
};
/* taken from OF */
/* taken from OF - one entry per device_info[] row. The OF's table is
* 76 79 f1 da dc d3 d5 d7; 0xd5 was once missing here, which shifted every
* later code onto the capacity one row up and sized a 4 GiB 0xd7 part as
* 2 GiB. */
const uint8_t device_code[] = {
0x76,
0x79,
@ -66,6 +69,7 @@ const uint8_t device_code[] = {
0xda,
0xdc,
0xd3,
0xd5,
0xd7
};
@ -93,6 +97,11 @@ const uint32_t device_info[] =
0x800000 /* 4G, large page */
};
/* device_code[j] is looked up and device_info[j] used - a length mismatch
* silently mis-sizes every chip after the gap */
extern char device_tables_match[(sizeof(device_code) ==
sizeof(device_info) / sizeof(device_info[0])) ? 1 : -1];
/* State the OF keeps across flash operations.
*
* These were referenced by flash_init() but never transcribed - the block was
@ -183,8 +192,8 @@ void flash_init(void)
* just for reference what OF does
*/
flash_spec[i].cmd = 0x180E8200 + (i<<9);
flash_spec[i].addr = 0x180E204 + (i<<9);
flash_spec[i].data = 0x180E208 + (i<<9);
flash_spec[i].addr = 0x180E8204 + (i<<9);
flash_spec[i].data = 0x180E8208 + (i<<9);
flash_chip_select(i);
FLASH_CMD(i) = CMD_RESET; /* write cmd to flash chip */