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as3525*: revert r25198 and inline memory_init in crt0.S

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We do not need a stack pointer at this step, and we are sure to not use
memory not initialized yet (like bss)

Fixes FS#11114 (tested on Fuze)

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25229 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Rafaël Carré 2010-03-17 05:02:42 +00:00
parent bda2e6d675
commit ab7365610b
2 changed files with 47 additions and 22 deletions
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20
firmware/target/arm/as3525/system-as3525.c
View file

@ -233,26 +233,6 @@ static void sdram_init(void)
MPMC_DYNAMIC_CONFIG_0 |= (1<<19); /* buffer enable */ MPMC_DYNAMIC_CONFIG_0 |= (1<<19); /* buffer enable */
} }
#else /* !BOOTLOADER */
void memory_init(void)
{
ttb_init();
/* map every region to itself, uncached */
map_section(0, 0, 4096, CACHE_NONE);
/* IRAM */
map_section(0, IRAM_ORIG, 1, CACHE_ALL);
map_section(0, UNCACHED_ADDR(IRAM_ORIG), 1, CACHE_NONE);
/* DRAM */
map_section(0x30000000, DRAM_ORIG, MEMORYSIZE, CACHE_ALL);
map_section(0x30000000, UNCACHED_ADDR(DRAM_ORIG), MEMORYSIZE, CACHE_NONE);
/* map 1st mbyte of DRAM at 0x0 to have exception vectors available */
map_section(0x30000000, 0, 1, CACHE_ALL);
enable_mmu();
}
#endif /* BOOTLOADER */ #endif /* BOOTLOADER */
void system_init(void) void system_init(void)

49
firmware/target/arm/crt0.S
View file

@ -58,9 +58,54 @@ newstart:
msr cpsr_c, #0xd3 /* enter supervisor mode, disable IRQ/FIQ */ msr cpsr_c, #0xd3 /* enter supervisor mode, disable IRQ/FIQ */
#if (CONFIG_CPU==AS3525 || CONFIG_CPU==AS3525v2) && !defined(BOOTLOADER) #if (CONFIG_CPU==AS3525 || CONFIG_CPU==AS3525v2) && !defined(BOOTLOADER)
#define CACHE_NONE 0
#define CACHE_ALL 0x0C
#define UNCACHED_ADDR(a) (a + 0x10000000)
/* Setup MMU : has to be done before accessing IRAM ! */ /* Setup MMU : has to be done before accessing IRAM ! */
ldr sp, =stackend
bl memory_init bl ttb_init
mov r0, #0 @ physical address
mov r1, #0 @ virtual address
mov r2, #0x1000 @ size (all memory)
mov r3, #CACHE_NONE
bl map_section
mov r0, #0 @ physical address
mov r1, #IRAM_ORIG @ virtual address
mov r2, #1 @ size : 1MB
mov r3, #CACHE_ALL
bl map_section
mov r0, #0 @ physical address
ldr r1, =UNCACHED_ADDR(IRAM_ORIG) @ virtual address
mov r2, #1 @ size : 1MB
mov r3, #CACHE_NONE
bl map_section
mov r0, #0x30000000 @ physical address
mov r1, #DRAM_ORIG @ virtual address
mov r2, #MEMORYSIZE @ size
mov r3, #CACHE_ALL
bl map_section
mov r0, #0x30000000 @ physical address
mov r1, #UNCACHED_ADDR(DRAM_ORIG) @ virtual address
mov r2, #MEMORYSIZE @ size
mov r3, #CACHE_NONE
bl map_section
/* map 1st mbyte of DRAM at 0x0 to have exception vectors available */
mov r0, #0x30000000 @ physical address
mov r1, #0 @ virtual address
mov r2, #1 @ size
mov r3, #CACHE_ALL
bl map_section
bl enable_mmu
/* Zero out IBSS */ /* Zero out IBSS */
ldr r2, =_iedata ldr r2, =_iedata