mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
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620 lines
23 KiB
ArmAsm
620 lines
23 KiB
ArmAsm
/*
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* FreeRTOS Kernel <DEVELOPMENT BRANCH>
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* Copyright (C) 2024 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
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* this software and associated documentation files (the "Software"), to deal in
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* the Software without restriction, including without limitation the rights to
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* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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* the Software, and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* https://www.FreeRTOS.org
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* https://github.com/FreeRTOS
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*
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*/
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.arm
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.syntax unified
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/* All code in the portASM.S file is intended to be run from a prvileged
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* operating mode, as such mark the entire file as privileged_functions */
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.section privileged_functions
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#define FREERTOS_ASSEMBLY
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#include "portmacro_asm.h"
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#include "mpu_syscall_numbers.h"
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#undef FREERTOS_ASSEMBLY
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/* External FreeRTOS-Kernel Variables */
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.extern pxCurrentTCB
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.extern uxSystemCallImplementations
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.extern ulPortInterruptNesting
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.extern ulPortYieldRequired
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/* External Linker script variables that are needed by the port */
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.extern __privileged_functions_start__
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.extern __privileged_functions_end__
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.extern __privileged_stacks_start__
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.extern __privileged_stacks_end__
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.extern __syscalls_flash_length__
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.extern __syscalls_flash_start__
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.extern __syscalls_flash_end__
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/* External FreeRTOS-Kernel Functions */
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.extern vAssertCalled
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.extern vTaskSwitchContext
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.extern vApplicationIRQHandler
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/* ----------------------------------------------------------------------------------- */
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/* Save the register context of a FreeRTOS Task. */
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.macro portSAVE_CONTEXT
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DSB
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ISB
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/* Push R0 and the Link Register (LR) for scratch register space */
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PUSH { R0, LR }
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/* Load the pointer to the current task's Task Control Block (TCB) */
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LDR LR, =pxCurrentTCB
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/* Load the actual TCB into LR */
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LDR LR, [LR]
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/* Set LR to pxTopOfStack, the address of where to save the task context */
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LDR LR, [LR]
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/* Load the address of ulCriticalNesting */
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LDR R0, =ulCriticalNesting
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/* Load the value of ulCriticalNesting into R0 */
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LDR R0, [R0]
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/* Push the value of ulCriticalNesting into the context, auto-increment the
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* LR by using the ! operator. */
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STM LR!, { R0 }
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#if ( portENABLE_FPU == 1 )
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/* Save the floating point context */
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/* Copy the Floating Point Status and Control Register (FPSRC) */
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FMRX R0, FPSCR
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/* Push the value of FPSCR onto the stack */
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STM LR!, { R0 }
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/* Push the 32 Floating Point Registers (FPRs) onto the stack */
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VSTM LR!, { D0-D15 }
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#endif /* ( portENABLE_FPU == 1 ) */
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/* Restore the saved register */
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POP { R0 }
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/* Save the General Purpose Registers (GPRs). Also save the pre-exception
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* Stack Pointer (SP) and LR. The ^ operator causes this instruction to store
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* the mode selected in the Saved Program Status Register (SPSR) */
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STM LR, { R0-R14 }^
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/* Not allowed to auto-increment with ! when using banked registers */
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ADD LR, LR, #portREGISTER_LENGTH
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/* Pop the pushed LR, which is the pre-exception Program Counter (PC) */
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POP { R0 }
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/* Copy the pre-exception Current Program Status Register (CPSR), which,
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* is banked as the SPSR and save it as part of the task context */
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MRS R1, SPSR
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/* Store the pre-exception CPSR and PC */
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STM LR!, { R0-R1 }
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.endm
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/* ----------------------------------------------------------------------------------- */
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/* Restore the register context of a FreeRTOS Task. */
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.macro portRESTORE_CONTEXT
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/* Load the pointer to the current task's Task Control Block (TCB) */
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LDR LR, =pxCurrentTCB
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/* Load the actual TCB into LR */
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LDR LR, [LR]
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/* Set R1 to the second member of the TCB struct, xMPUSettings */
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ADD R1, LR, #0x4
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/* Set LR to pxTopOfStack, the address to restore the task context from */
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LDR LR, [LR]
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/* Load the first per-task MPU region into R5 */
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MOV R5, #portFIRST_CONFIGURABLE_REGION
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/* When creating a loop label in a macro it has to be a numeric label.
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* for( R5 = portFIRST_CONFIGURABLE_REGION ; R5 <= portNUM_CONFIGURABLE_REGIONS ; R5++ ) */
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123:
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/* Load values of struct MPU_REGION_REGISTERS into R2-R4 */
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LDMIA R1!, { R2-R4 }
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/* Load the values set in xMPU_REGION_REGISTERS
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* R2 Will hold ulRegionSize
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* R3 will hold ulRegionAttribute
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* R4 will hold ulRegionBaseAddress
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* R5 will hold the MPU Region number */
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/* Select the MPU Region using R5 */
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MCR p15, #0, R5, c6, c2, #0
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/* Set the MPU Region Base Address using ulRegionBaseAddress */
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MCR p15, #0, R4, c6, c1, #0
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/* Set the MPU Region Access Attributes using ulRegionAttribute */
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MCR p15, #0, R3, c6, c1, #4
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/* Set the MPU Region Size, and if the region is enabled using ulRegionSize */
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MCR p15, #0, R2, c6, c1, #2
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/* R5++ */
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ADD R5, R5, #1
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/* R5 <= R6 */
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CMP R5, #portNUM_CONFIGURABLE_REGIONS
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/* R5 <= R6, loop again */
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BLE 123b
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/* R5 > portSTACK_REGION, all MPU regions have been restored */
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/* Load the address of the ulCriticalNesting variable into R1 */
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LDR R1, =ulCriticalNesting
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/* Pop the previously saved value of ulCriticalNesting from ulContext */
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LDM LR!, { R2 }
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/* Store the value of ulCriticalNesting into address of ulCriticalNesting */
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STR R2, [R1]
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#if ( portENABLE_FPU == 1 )
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/* Restore Floating Point Context: Restore previous FPSCR from ulContext */
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LDM LR!, { R1 }
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/* Move the saved FPSCR value into the FPSCR */
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VMSR FPSCR, R1
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/* Restore the Floating Point Registers */
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VLDM LR!, { D0-D15 }
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#endif /* portENABLE_FPU*/
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/* Load the value of the CPSR into R0, needed to set the SP and the LR */
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LDR R0, [LR, +#(portREGISTER_LENGTH + 4UL)]
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/* Move the CPSR the into our SPSR */
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MSR SPSR_cxsf, R0
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/* Restore the saved Stack Pointer and Link Register into User Mode */
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LDM LR, { R0-R14 }^
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/* Not allowed to auto-increment with ! when using banked registers */
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ADD LR, LR, #portREGISTER_LENGTH
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/* Load the PC to return from the exception */
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RFE LR
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.endm
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/* ----------------------------------------------------------------------------------- */
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/* Load the context of the first task, starting the FreeRTOS-Scheduler */
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.align 4
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.global vPortStartFirstTask
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.type vPortStartFirstTask, %function
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vPortStartFirstTask:
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/** This function is called from Supervisor Mode to start the FreeRTOS-Kernel.
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* This is done by restoring the context of the first task.
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* Restoring the context of a task will allow interrupts.
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* This allows the FreeRTOS Scheduler Tick to start, and therefore
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* starts the FreeRTOS-Kernel.
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*/
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/* Swap to SVC Mode for context restore */
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CPS #SVC_MODE
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/* Load the context of first task, starting the FreeRTOS-Scheduler */
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portRESTORE_CONTEXT
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/* ----------------------------------------------------------------------------------- */
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/* Handler for Supervisor Calls (SVCs) when using this FreeRTOS Port */
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/* Upon entering here the LR, or R14, will hold the address of the following
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* instruction. This then checks that instruction for the SVC # raised.
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* Checks:
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* 1. SVC is raised from the system call section (i.e. application is
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* not raising SVC directly).
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* 2. pxMpuSettings->xSystemCallStackInfo.pulTaskStack must be NULL as
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* it is non-NULL only during the execution of a system call (i.e.
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* between system call enter and exit).
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* 3. System call is not for a kernel API disabled by the configuration
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* in FreeRTOSConfig.h.
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* 4. We do not need to check that ucSystemCallNumber is within range
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* because the assembly SVC handler checks that before calling
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* this function.
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*/
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.align 4
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.global FreeRTOS_SVC_Handler
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.type FreeRTOS_SVC_Handler, %function
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FreeRTOS_SVC_Handler:
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/* Push R11-R12 for scratch space */
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PUSH { R11-R12 }
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/* ------------------------- Caller Flash Location Check ------------------------- */
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/* The address of the caller will be in the Link Register (LR), it will
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* be the caller's Program Counter (PC). Check this address to ensure the
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* Supervisor call (SVC) was raised from inside the FreRTOS-Kernel. */
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/* Get the starting address for FreeRTOS System Calls */
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LDR R12, =__syscalls_flash_start__
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/* Subtract the start point from the Program Counter of the caller */
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SUB R11, LR, R12
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/* Now check if it is less than the length of the section */
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LDR R12, =__syscalls_flash_length__
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/* Check if an SVC was raised after the end of FreeRTOS System Calls */
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CMP R11, R12
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/* If the SVC was raised from outside FreeRTOS System Calls exit now */
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BGE SVC_Handler_Exit
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/* ---------------------------- Get Caller SVC Number ---------------------------- */
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/* The SPSR will be the CPSR of the calling task, store it in R11 */
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MRS R11, SPSR
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/* Thumb Mode is bit 5 of the CPSR, AND for comparison */
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ANDS R11, R11, #0x20
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/* In Thumb Mode, the instruction 0x2 before holds the SVC numebr */
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LDRHNE R11, [LR, #-0x2]
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/* Not in Thumb Mode, the instruction 0x4 before holds the SVC numebr */
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LDRHEQ R11, [LR, #-0x4]
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/* --------------------------------- SVC Routing --------------------------------- */
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/* Determine if the SVC number is below #NUM_SYSTEM_CALLS */
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CMP R11, #NUM_SYSTEM_CALLS
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/* If it is go to the entry point for FreeRTOS System Calls */
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BLT svcSystemCallEnter
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/* Check if the caller is leaving a FreeRTOS System Call */
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CMP R11, #portSVC_SYSTEM_CALL_EXIT
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BEQ svcSystemCallExit
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/* Check if the caller is requesting to yield */
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CMP R11, #portSVC_YIELD
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BEQ svcPortYield
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/* If one of the above jumps wasn't taken, go straight to the exit */
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SVC_Handler_Exit:
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/** Restore the saved R11 and R12, then return to the caller */
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POP { R11-R12 }
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/* This instruction loads the SPSR into the CPSR, performing the mode swap */
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MOVS PC, LR
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/* Perform a task swap */
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svcPortYield:
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/* Restore the previously saved R11, R12 */
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POP { R11-R12 }
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/* Save the context of the current task and select a new task to run. */
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portSAVE_CONTEXT
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/* Select a new task to swap to */
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BL vTaskSwitchContext
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/* Restore the context of the task selected to execute. */
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portRESTORE_CONTEXT
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/* Reset task stack and link register after a FreeRTOS System Call */
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svcSystemCallExit:
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/* Restore the Task Stack Pointer and Link Register */
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/* Load the address of pxCurrentTCB into R11 */
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LDR R11, =pxCurrentTCB
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/* Load pxCurrentTCB into R11 */
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LDR R11, [R11]
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/* Set R11 to be the location of xSystemCallStackInfo inside the TCB */
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ADD R11, R11, #portSYSTEM_CALL_INFO_OFFSET
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/* Restore the user mode Stack Pointer and Link Register */
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LDMIB R11, { R13-R14 }^
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/* Zero out R12 so we can set ulTaskStackPointer back to NULL */
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AND R12, R12, #0x0
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/* Set pulTaskStackPointer to be 0x0 */
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STR R12, [R11, #0x4]
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/* Set pulLinkRegisterAtSystemCallEntry to be 0x0 */
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STR R12, [R11, #0x8]
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/* Load the ulTaskFlag so we can determine if we're going to lower privilege */
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LDM R11, { R12 }
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/* Check if the task is privileged */
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CMP R12, #portTASK_IS_PRIVILEGED_FLAG
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/* If the task is privileged we can leave now */
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BEQ SVC_Handler_Exit
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/* Otherwise, we need to set the SPSR back to USER mode */
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MRS R12, SPSR
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/* Clear the last 4 bits, which are the MODE bits */
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BIC R12, R12, #0x0F
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/* Move the new value into the SPSR */
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MSR SPSR_cxsf, R12
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/* Jump back */
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B SVC_Handler_Exit
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/* Save task's SP and LR, swap to ulSystemCallStack Buffer, raise privilege */
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svcSystemCallEnter:
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/* Load the base address of the uxSystemCallImplementations[] table into R14 */
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LDR R14, =uxSystemCallImplementations
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/** Shift the value of R11, the SVC number, left by two to get the jump offset
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* Add this offset to R14, which holds the jump table address. This is the address
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* of the SVC that the relevant function is trying to complete.
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* Now when the Link Register is loaded as the Program Counter at the end of this
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* handler, the caller will immediately execute the requested function */
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LDR R14, [R14, R11, lsl #2]
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/* Load the address of pxCurrentTCB into R11 */
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LDR R11, =pxCurrentTCB
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/* Load pxCurrentTCB into R11 */
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LDR R11, [R11]
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/* Set R11 to be the location of xSystemCallStackInfo inside the TCB */
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ADD R11, R11, #portSYSTEM_CALL_INFO_OFFSET
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/* Get the value in the TCB for ulTaskStackPointer */
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LDMIB R11!, { R12 }
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/* Ensure ulTaskStackPointer is null, signifying initial entry */
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TEQ R12, #0x0
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/* Make sure that the function pointer loaded is not NULL */
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CMPEQ R14, #0x0
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/* Hard code the ascii value of the function name and line number to call
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* assert if the ulTaskStackPointer is not null. */
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MOVWEQ R0, #0x706F
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MOVTEQ R0, #0x7274
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MOVEQ R1, #342
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BEQ vAssertCalled
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/* Store the task's SP and LR to xSYSTEM_CALL_STACK_INFO */
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STM R11, { R13-R14 }^
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/* Not allowed to auto-increment with ! when using banked registers */
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ADD R11, R11, 0x8
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/* Load pulSystemCallStackPointer and pulSystemCallLinkRegister now */
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LDM R11, { R13-R14 }^
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/* Swap the SPSR to SYS_MODE for the System Call. Move SPSR into R12 */
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MRS R12, SPSR
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/* Set the MODE bits to SYS_MODE */
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ORR R12, R12, #SYS_MODE
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/* Assign the new value to SPSR */
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MSR SPSR_cxsf, R12
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/* Leave through the SVC Exit */
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B SVC_Handler_Exit
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/* ----------------------------------------------------------------------------------- */
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/* Disable IRQs and increment the critical nesting count */
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.align 4
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.global vPortEnterCritical
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.type vPortEnterCritical, %function
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vPortEnterCritical:
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/* Disable IRQs */
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CPSID I
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/* Save scratch registers */
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PUSH { R0-R1 }
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/* Load address of current critical nesting count */
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LDR R0, =ulCriticalNesting
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/* Load value of current critical nesting count */
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LDR R1, [R0]
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/* Add one to ulCriticalNesting */
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ADD R1, R1, #1
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/* Store the modified ulCriticalNesting back into RAM */
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STR R1, [R0]
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/* Restore pushed registers */
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POP { R0-R1 }
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/* Return to caller */
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BX LR
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/* ----------------------------------------------------------------------------------- */
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/* Disable IRQs */
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.align 4
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.global vPortDisableInterrupts
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.type vPortDisableInterrupts, %function
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vPortDisableInterrupts:
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/* Disable IRQs */
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CPSID I
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/* Return to caller */
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BX LR
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/* ----------------------------------------------------------------------------------- */
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/* Enable IRQs and decrement the critical nesting count */
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.align 4
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.global vPortExitCritical
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.type vPortExitCritical, %function
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vPortExitCritical:
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/* Store two scratch registers and LR for IRQ Mode re-entry */
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PUSH { R0-R1, LR }
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/* Load address of current critical nesting count */
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LDR R0, =ulCriticalNesting
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/* Load value of current critical nesting count */
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LDR R1, [R0]
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/* Check if the count is 0 */
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CMP R1, #0
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/* If ulCriticalNesting is greater than 0, Subtract 1 from it */
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SUBGT R1, R1, #1
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/* Store the modified ulCriticalNesting back into RAM */
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STRGT R1, [R0]
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/* Enable IRQs */
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CPSIE I
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/* Restore Pushed registers */
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POP { R0-R1, LR }
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/* Return to caller */
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BX LR
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/* ----------------------------------------------------------------------------------- */
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/* Enable IRQs */
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.align 4
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.global vPortEnableInterrupts
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.type vPortEnableInterrupts, %function
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vPortEnableInterrupts:
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/* Push LR to account for re-entry in IRQ Mode */
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PUSH { LR }
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/* Enable IRQs */
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CPSIE I
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/* Restore previous LR */
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POP { LR }
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/* Return to caller */
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BX LR
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/* ----------------------------------------------------------------------------------- */
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/** Set MPU Registers using provided values
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* Function: void vMPUSetRegion
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* Inputs: uint32_t ulRegionNumber
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* Inputs: uint32_t ulBaseAddress
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* Inputs: uint32_t ulRegionSize
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* Inputs: uint32_t ulRegionPermissions
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*/
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.align 4
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.global vMPUSetRegion
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.type vMPUSetRegion, %function
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vMPUSetRegion:
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/* Only 15 possible regions, drop all other bits */
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AND R0, R0, #15
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/* Select the MPU Region selected by ulRegionNumber */
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MCR p15, #0, R0, c6, c2, #0
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/* Set the Base Address to be ulBaseAddress */
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MCR p15, #0, R1, c6, c1, #0
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/* Set the Access Attributes to be ulRegionPermissions */
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MCR p15, #0, R3, c6, c1, #4
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/* Set the Size and Enable bits to be ulRegionSize */
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MCR p15, #0, R2, c6, c1, #2
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/* Return to caller */
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BX LR
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/* ----------------------------------------------------------------------------------- */
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/* Set the Enable bit of the MPU Enable Register to 1. */
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.align 4
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.global vMPUEnable
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.type vMPUEnable, %function
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vMPUEnable:
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/* Read the current MPU control register into R0 */
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MRC p15, #0, R0, c1, c0, #0
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/* Set the enable bit to high */
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ORR R0, R0, #0x1
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/* Data sync */
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DSB
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/* Write out previous MPU control register with a high enable bit */
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MCR p15, #0, R0, c1, c0, #0
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/* Instruction sync */
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ISB
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/* Return to caller */
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BX LR
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|
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/* ----------------------------------------------------------------------------------- */
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/* Set the Enable bit of the MPU Enable Register to 0. */
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.align 4
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.global vMPUDisable
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.type vMPUDisable, %function
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vMPUDisable:
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/* Read the MPU enable register values into R0 */
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MRC p15, #0, R0, c1, c0, #0
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/* Perform a bitwise AND of R0 and NOT #1, i.e. clear bit 1 */
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BIC R0, R0, #1
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/* Wait for all pending explicit data accesses to complete */
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DSB
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/* Write out to the MPU Enable Register */
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MCR p15, #0, R0, c1, c0, #0
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/* Flushes the pipeline and prefetch buffer(s) in the processor. */
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/* Ensures all following instructions are fetched from cache or memory. */
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ISB
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/* Return to caller */
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BX LR
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|
|
|
/* ----------------------------------------------------------------------------------- */
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/* Enable the MPU Background Region */
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.align 4
|
|
.global vMPUEnableBackgroundRegion
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.type vMPUEnableBackgroundRegion, %function
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vMPUEnableBackgroundRegion:
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/* Save value in R0 */
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PUSH { R0 }
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/* Read CP15 System Control Register into R0 */
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MRC p15, 0, R0, c1, c0, 0
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/* Set bit 17 so that privileged modes won't trigger unmapped MPU region faults */
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ORR R0, R0, #0x20000
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/* Write the value back out */
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MCR p15, 0, R0, c1, c0, 0
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/* Restore the used register */
|
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POP { R0 }
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|
/* Return to the caller */
|
|
BX LR
|
|
|
|
/* ----------------------------------------------------------------------------------- */
|
|
/* Disable the MPU Background Region */
|
|
.align 4
|
|
.global vMPUDisableBackgroundRegion
|
|
.type vMPUDisableBackgroundRegion, %function
|
|
vMPUDisableBackgroundRegion:
|
|
/* Save value in R0 */
|
|
PUSH { R0 }
|
|
/* Read CP15 System Control Register into R0 */
|
|
MRC p15, 0, R0, c1, c0, 0
|
|
/* Clear bit 17 so that privileged modes won't trigger unmapped MPU region faults */
|
|
BIC R0, R0, #0x20000
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|
/* Write the value back out */
|
|
MCR p15, 0, R0, c1, c0, 0
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|
/* Restore the used register */
|
|
POP { R0 }
|
|
/* Return to the caller */
|
|
BX LR
|
|
|
|
/* ----------------------------------------------------------------------------------- */
|
|
.align 4
|
|
.global FreeRTOS_IRQ_Handler
|
|
.type FreeRTOS_IRQ_Handler, %function
|
|
FreeRTOS_IRQ_Handler:
|
|
/* Disable IRQs */
|
|
CPSID I
|
|
/* Return to the interrupted instruction. */
|
|
SUB LR, LR, #4
|
|
/* Save the return state to the IRQ stack */
|
|
SRSDB SP!, #IRQ_MODE
|
|
/* Push used registers. */
|
|
PUSH { R0-R3, R12 }
|
|
|
|
/* Load &ulPortInterruptNesting into R0 */
|
|
LDR R0, =ulPortInterruptNesting
|
|
/* Load the value of ulPortInterruptNesting into R1 */
|
|
LDR R1, [R0]
|
|
/* R2 = ulPortInterruptNesting + 1 */
|
|
ADD R2, R1, #1
|
|
/* Store the value of ulPortInterruptNesting++ back into the variable */
|
|
STR R2, [R0]
|
|
|
|
/* Save Calling Registers */
|
|
PUSH { R0-R3, LR }
|
|
/* Call the User provided IRQ handler */
|
|
BL vApplicationIRQHandler
|
|
|
|
/* Disable IRQs incase vApplicationIRQHandler enabled them for re-entry */
|
|
CPSID I
|
|
/* Perform a data and instruction buffer flush */
|
|
DSB
|
|
ISB
|
|
|
|
/* Restore the previous registers */
|
|
POP { R0-R3, LR }
|
|
/* R0 holds the address of ulPortInterruptNesting, R1 holds original value */
|
|
STR R1, [R0]
|
|
/* Check if ulPortInterruptNesting is 0 */
|
|
CMP R1, #0
|
|
/* If ulPortInterruptNesting is not zero, unwind the nested interrupt */
|
|
BNE exit_without_switch
|
|
|
|
/* ulPortInterruptNesting is zero, check if ulPortYieldRequired is set */
|
|
LDR R1, =ulPortYieldRequired
|
|
/* Load the value of ulPortYieldRequired */
|
|
LDR R0, [R1]
|
|
/* Check if the value of ulPortYieldRequired is zero */
|
|
CMP R0, #0
|
|
/* If it is non-zero select a new task to run */
|
|
BNE switch_before_exit
|
|
|
|
exit_without_switch:
|
|
/* No context switch. Restore used registers, LR_irq and SPSR before returning. */
|
|
POP { R0-R3, R12 }
|
|
/* Return from exception, load pre-exception PC and CPSR */
|
|
RFE SP!
|
|
|
|
switch_before_exit:
|
|
/* A context swtich is to be performed. Clear the context switch pending flag. */
|
|
MOV R0, #0
|
|
/* Set ulPortYieldRequired back to zero */
|
|
STR R0, [R1]
|
|
|
|
/* Restore used registers, LR_irq and SPSR before saving the context */
|
|
POP { R0-R3, R12 }
|
|
/* Load the pushed SPSR from the stack */
|
|
LDMIB SP!, { LR }
|
|
/* Move it into the SPSR */
|
|
MSR SPSR_cxsf, LR
|
|
/* Load the pushed pre-exception Program Counter into LR_irq */
|
|
LDMDB SP, { LR }
|
|
/* Increment the Stack Pointer an additional 0x4 */
|
|
ADD SP, SP, 0x4
|
|
/* Save the current task's context */
|
|
portSAVE_CONTEXT
|
|
|
|
/* Call the function that selects the new task to execute. */
|
|
BLX vTaskSwitchContext
|
|
|
|
/* Restore the context of the selected task, which will start executing. */
|
|
portRESTORE_CONTEXT
|
|
|
|
.end
|