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FreeRTOS-Kernel/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_IAR
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Kody Stribrny 2f3e5235aa
Expand RV32E demo support, prevent 'ebreak' looping (#883) 
* Expand RV32E demo support, prevent 'ebreak' looping

The RegTest tests are modified in the Qemu and HiFive demos
to support RV32E and its limited set of registers.

'ebreak' call looping is removed in RegTest. This produces
a lot of noise when debugging.

* Correct whitespace

* Remove 'ebreak' instruction calls

The ebreak instruction sets and exception
which leads to jumping around the binary. This
can make debugging difficult.

* Fix whitespace formatting
2023-02-06 21:00:09 -08:00
..
blinky_demo [AUTO][RELEASE]: Bump file header version to "202212.00" 2022-12-10 01:17:30 +00:00
full_demo Expand RV32E demo support, prevent 'ebreak' looping (#883) 2023-02-06 21:00:09 -08:00
.gitignore Update the SiFive HiFive IAR project (#804) 2022-03-11 16:26:31 -08:00
FreeRTOSConfig.h Expand RV32E demo support, prevent 'ebreak' looping (#883) 2023-02-06 21:00:09 -08:00
main.c Expand RV32E demo support, prevent 'ebreak' looping (#883) 2023-02-06 21:00:09 -08:00
README.md Add Vectored Interrupt Support To SiFive RISC-V Demo (#871) 2022-11-09 10:34:04 -08:00
RTOSDemo.ewd Add Vectored Interrupt Support To SiFive RISC-V Demo (#871) 2022-11-09 10:34:04 -08:00
RTOSDemo.ewp Add Vectored Interrupt Support To SiFive RISC-V Demo (#871) 2022-11-09 10:34:04 -08:00
RTOSDemo.eww Renamed RISC-V_RV32_SiFive_HiFive1_IAR directory to RISC-V_RV32_SiFive_HiFive1-RevB_IAR as it targets the RevB hardware. 2020-01-01 22:38:23 +00:00
vector_table.S [AUTO][RELEASE]: Bump file header version to "202212.00" 2022-12-10 01:17:30 +00:00

README.md

RISC-V SiFive HiFive1 Rev B Demo

View https://www.freertos.org/RTOS-RISC-V-FreedomStudio-IAR-HiFive-RevB.html for more information on how to run this demo