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The Cortex-A53 ports are generic and can be used as a starting point for other Armv8-A application processors. Therefore, rename `ARM_CA53_64_BIT` to `Arm_AARCH64` and `ARM_CA53_64_BIT_SRE` to `Arm_AARCH64_SRE`. With this renaming, existing projects that use old port, should migrate to renamed port as follows: * `ARM_CA53_64_BIT` -> `Arm_AARCH64` * `ARM_CA53_64_BIT_SRE` -> `Arm_AARCH64_SRE` Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
24 lines
995 B
Markdown
24 lines
995 B
Markdown
# Armv8-A architecture support
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The Armv8-A architecture introduces the ability to use 64-bit and 32-bit
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Execution states, known as AArch64 and AArch32 respectively. The AArch64
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Execution state supports the A64 instruction set. It holds addresses in 64-bit
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registers and allows instructions in the base instruction set to use 64-bit
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registers for their processing.
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The AArch32 Execution state is a 32-bit Execution state that preserves
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backwards compatibility with the Armv7-A architecture, enhancing that profile
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so that it can support some features included in the AArch64 state. It supports
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the T32 and A32 instruction sets. Follow the
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[link](https://developer.arm.com/Architectures/A-Profile%20Architecture)
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for more information.
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## Arm_AARCH64 port
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This port adds support for Armv8-A architecture AArch64 execution state.
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This port is generic and can be used as a starting point for Armv8-A
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application processors.
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* Arm_AARCH64
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* Memory mapped interace to access Arm GIC registers
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