Richard Barry fb73829148 Ensure eTaskGetState() is brought in automatically if INCLUDE_xTaskAbortDelay is set to 1, as it is a dependency of eTaskGetState(). ... Added the portTASK_FUNCTION_PROTO macros around the timer task, as the macros are already used by the idle task. Add a PDF of the RISC-V documentation into the repo as the web page is not yet live.		2019-02-08 01:18:08 +00:00
..
.settings	Ensure eTaskGetState() is brought in automatically if INCLUDE_xTaskAbortDelay is set to 1, as it is a dependency of eTaskGetState().	2019-02-08 01:18:08 +00:00
blinky_demo	Retarget Softconsole RISC-V demo from IGLOO2 to Renode as it can have more RAM and therefore have more test tasks running.	2018-12-24 17:48:10 +00:00
full_demo	Ensure eTaskGetState() is brought in automatically if INCLUDE_xTaskAbortDelay is set to 1, as it is a dependency of eTaskGetState().	2019-02-08 01:18:08 +00:00
Microsemi_Code	Re-org of RISC-V file structure and naming step 2.	2018-12-30 23:53:47 +00:00
.cproject	Move the 'generic' version of freertos_risc_v_chip_specific_extensions.h back to a sub-directory as having it in the RISC-V port's base directory was causing SoftConsole to pick up the wrong version (for an unknown reason).	2018-12-31 18:19:52 +00:00
.project	Move the 'generic' version of freertos_risc_v_chip_specific_extensions.h back to a sub-directory as having it in the RISC-V port's base directory was causing SoftConsole to pick up the wrong version (for an unknown reason).	2018-12-31 18:19:52 +00:00
FreeRTOSConfig.h	Move the RISC-V pxPortInitialiseStack() implementation to the assembly port file from the C port file so it can have access to the number of chip specific registers it needs to save space for on the stack.	2018-12-30 20:00:43 +00:00
hw_platform.h	Retarget Softconsole RISC-V demo from IGLOO2 to Renode as it can have more RAM and therefore have more test tasks running.	2018-12-24 17:48:10 +00:00
main.c	Retarget Softconsole RISC-V demo from IGLOO2 to Renode as it can have more RAM and therefore have more test tasks running.	2018-12-24 17:48:10 +00:00
microsemi-riscv-renode.ld	Retarget Softconsole RISC-V demo from IGLOO2 to Renode as it can have more RAM and therefore have more test tasks running.	2018-12-24 17:48:10 +00:00
RTOSDemo Debug Renode.launch	Move the RISC-V pxPortInitialiseStack() implementation to the assembly port file from the C port file so it can have access to the number of chip specific registers it needs to save space for on the stack.	2018-12-30 20:00:43 +00:00
RTOSDemo-start-renode-emulator-and-attach.launch	Retarget Softconsole RISC-V demo from IGLOO2 to Renode as it can have more RAM and therefore have more test tasks running.	2018-12-24 17:48:10 +00:00