7 commits

Author	SHA1	Message	Date
Richard Barry	992a3c8c71	Update BSP source files for UltraScale Cortex-A53 and Cortex-R5 and Microblaze to the 2016.4 versions. ... Correct alignment issue in GCC Cortex-R port that was preventing full floating point usage in interrupts (other ports will be updated likewise). Update the UltraScale R5 demo to test the GCC Cortex-A9 port layer modification mentioned on the line above.	2017-01-19 04:11:21 +00:00
Richard Barry	fedb98c5f6	Recreated MicroBlaze example using Vivado 2016.1 - the Microblaze project is still a work in progress - not yet fully functional.	2016-05-10 14:05:22 +00:00
Richard Barry	501be60574	Update the Microblaze hardware design and BSP to the latest IP and tool versions.	2016-05-09 15:55:51 +00:00
Richard Barry	b4c3d91aff	Add FreeRTOS BSP for Xilinx SDK.	2015-08-05 10:21:59 +00:00
Richard Barry	4c847711bd	Common scheduler code: ... - Back out changes that allow mutexes to be given from a semaphore after tests showed issues that would not be fast to fix. Demo projects: - Update the Microblaze Kintex 7 project and BSP to use version 2015.2 of the Xilinx SDK.	2015-08-04 17:36:55 +00:00
Richard Barry	18ff880e75	Add networking option to the Microblaze Kintex demo.	2015-03-13 15:05:09 +00:00
Richard Barry	3012d9b94d	Work-in-progress check in of MicroBlaze Kintex7 demo.	2015-03-10 15:58:19 +00:00