David Chalco
0573fea3ee
Update (.s, .S) kernel version numbers to 10.4.1 ( #283 )
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* version bump to 10.4.1
* update .s file version numbers
* Update FreeRTOS/History.txt
2020-09-18 10:55:01 -07:00
Cobus van Eeden
d5862dbe01
Sync back V10.4.1 ( #282 )
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* Move Kernel submodule pointer to 10.4.1
* Update version number to V10.4.1 (#281 )
2020-09-17 17:16:33 -07:00
David Chalco
89d475e9b1
Update Version number to 10.4.0 ( #237 )
2020-09-10 19:40:24 -07:00
Yuhui.Zheng
589dd9f149
Update version number in readiness for V10.3.0 release. Sync SVN with reviewed release candidate.
2020-02-07 20:14:50 +00:00
Richard Barry
7bea399061
Update libraries and sundry check-ins ready for the V10.3.0 kernel release.
2020-02-06 18:52:35 +00:00
Richard Barry
c0741e36ed
Fix spelling mistakes copied and pasted into a couple of RISC-V demo main.c files.
2019-10-22 16:31:57 +00:00
Richard Barry
f6edf4adf9
Update the RegTest.S file used by several GCC RISC-V demos to ensure correct alignment of constant loads from assembly code.
2019-10-14 00:16:25 +00:00
Richard Barry
96bad0f6c3
Minor bug fix in NTPDemo.c -> use of FREERTOS_INVALID_SOCKET in place of NULL.
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Update trace recorder code to account for uxPendedTicks renaming to xPendedTicks.
2019-09-04 00:13:17 +00:00
Richard Barry
b51529a284
Update version number ready for next release.
2019-05-11 01:47:37 +00:00
Richard Barry
58ba10eee8
Update version number in readiness for V10.2.0 release.
2019-02-17 22:36:16 +00:00
Richard Barry
6844bef74f
Replace the pdf RISC-V documentation with links to the documentation web pages.
2019-02-16 01:15:33 +00:00
Richard Barry
b2b1b09ea5
Fix bug in core_cm3.c atomic macros.
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Rename the portable/GCC/RISC-V-RV32 directory to just RISC-V as also adding support for 64-bit cores.
2019-02-16 01:08:38 +00:00
Richard Barry
fb73829148
Ensure eTaskGetState() is brought in automatically if INCLUDE_xTaskAbortDelay is set to 1, as it is a dependency of eTaskGetState().
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Added the portTASK_FUNCTION_PROTO macros around the timer task, as the macros are already used by the idle task.
Add a PDF of the RISC-V documentation into the repo as the web page is not yet live.
2019-02-08 01:18:08 +00:00
Richard Barry
80df5cd517
Update the pin mux setup on the Vega board demo to enable the LED.
2018-12-31 20:14:34 +00:00
Richard Barry
11d9c440b8
Move the 'generic' version of freertos_risc_v_chip_specific_extensions.h back to a sub-directory as having it in the RISC-V port's base directory was causing SoftConsole to pick up the wrong version (for an unknown reason).
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Add a project for the Vega board's RI5CY core.
2018-12-31 18:19:52 +00:00
