13 commits

Author	SHA1	Message	Date
Richard Barry	2f754d9b0c	Add additional critical section to the default tickless implementations. ... Update version number for maintenance release.	2013-07-24 09:45:17 +00:00
Richard Barry	3cbe0a724d	Update version number.	2013-07-23 10:51:45 +00:00
Richard Barry	7d6758ee1a	Minor updates and change version number for V7.5.0 release.	2013-07-17 18:32:57 +00:00
Richard Barry	a7c47131fa	Remove portALIGNMENT_ASSERT_pxCurrentTCB() macro, which serves no purpose.	2013-06-25 13:39:50 +00:00
Richard Barry	a03b171992	Fix compiler warning in psp_test.c when compiled with ARM compiler. ... Add portYIELD_FROM_ISR() macros to Cortex-M ports. The new macro just calls the exiting portEND_SWITCHING_ISR() macro. Remove code from the MSVC port layer that was left over from a previous implementation and become obsolete.	2013-05-19 09:43:00 +00:00
Richard Barry	96ceae8edd	Update version number ready to release the FAT file system demo.	2013-04-30 21:42:41 +00:00
Richard Barry	f9918345e1	Update version numbers to V7.4.1.	2013-04-18 12:58:17 +00:00
Richard Barry	9a15f50b00	Add memory barrier instructions to Tasking CM4F port.	2013-04-16 15:50:17 +00:00
Richard Barry	a5d0e3f0c1	Prepare for V7.4.0 release.	2013-02-19 18:36:58 +00:00
Richard Barry	f06a945444	Prepare for V7.3.0 release.	2012-10-16 12:17:47 +00:00
Richard Barry	0c7af1c2d3	Put comments in the code that give a reference to people who think that setting BASE_PRI to zero is the wrong thing to to in an ISR.	2012-08-14 13:04:22 +00:00
Richard Barry	e0bab5981a	Prepare for V7.2.0 release.	2012-08-14 12:14:48 +00:00
Richard Barry	f508a5f653	Add FreeRTOS-Plus directory.	2012-08-11 21:34:11 +00:00

Renamed from Source/portable/Tasking/ARM_CM4F/portmacro.h (Browse further)