Commit graph

860 commits

Author SHA1 Message Date
Paul Bartell
4408d7430e Increase minimal stack size config to 2048 words
Accomodates increased usage due to newlib thread local storage
2023-03-30 12:32:55 -07:00
Paul Bartell
63cfc621ed Enable newlib and picolibc thread local storage 2023-03-30 12:32:55 -07:00
Paul Bartell
c6325a02ff Improve vAssertCalled function to include filename / line number info. 2023-03-30 12:32:55 -07:00
Keith Packard
84ad9250da Demo/RISC-V_RV32_QEMU_VIRT_GCC: Add option to build with picolibc
When built with PICOLIBC=1, selects picolibc as the C library, uses
semihosting to display messages and uses picolibc stdio for output.

Signed-off-by: Keith Packard <keithpac@amazon.com>
2023-03-30 12:32:55 -07:00
Keith Packard
bc1a95e9e7 Demo/RISC-V_RV32_QEMU_VIRT_GCC: Add TLS support to linker script
Allocate ROM for initialized thread local storage variables. Allocate
TLS offsets for all thread local storage variables.

Signed-off-by: Keith Packard <keithpac@amazon.com>
2023-03-30 12:32:55 -07:00
Keith Packard
9add6bdf98 Demo/RISC-V_RV32_QEMU_VIRT_GCC: Enable picolibc TLS when needed
When building with Picolibc that has TLS support, enable the relevant
FreeRTOS code.

Signed-off-by: Keith Packard <keithpac@amazon.com>
2023-03-30 12:32:55 -07:00
Keith Packard
56cdd1ad12 Demo/RISC-V_RV32_QEMU_VIRT_GCC: Set -march=rv32imac_zicsr
Need to add _zicsr for more recent Risc-V toolchains which don't add
this extension to the default set anymore.

Signed-off-by: Keith Packard <keithpac@amazon.com>
2023-03-30 12:32:55 -07:00
Keith Packard
827493747f Demo/RISC-V_RV32_QEMU_VIRT_GCC: Enable configUSE_TRACE_FACILITY
I get a build error when this is not set as it (or
configGENERATE_RUN_TIME_STATS) are required when using
configUSE_STATS_FORMATTING_FUNCTIONS

Signed-off-by: Keith Packard <keithpac@amazon.com>
2023-03-30 12:32:55 -07:00
Keith Packard
82e8d335b8 Demo/CORTEX_M3_MPS2_QEMU_GCC: Add option to build with picolibc
When built with PICOLIBC=1, selects picolibc as the C library by
removing the newlib-nano linker flags and adding
--specs=picolibc.specs to the compiler flags. This also selects the
integer-only printf variant provided within picolibc to reduce flash
use by adding -DPICOLIBC_INTEGER_PRINTF_SCANF.

Signed-off-by: Keith Packard <keithpac@amazon.com>
2023-03-30 12:32:55 -07:00
Keith Packard
15826fe5cc Demo/CORTEX_M3_MPS2_QEMU_GCC: Define symbols needed for picolibc sbrk implementation
Picolibc has an internal version of sbrk that uses slightly different
symbol names than the demo provides. Add these in the linker script.

Signed-off-by: Keith Packard <keithpac@amazon.com>
2023-03-30 12:32:55 -07:00
Keith Packard
642c495fcb Demo/CORTEX_M3_MPS2_QEMU_GCC: Add TLS support to linker script
Allocate ROM for initialized thread local storage variables. Allocate
TLS offsets for all thread local storage variables.

Signed-off-by: Keith Packard <keithpac@amazon.com>
2023-03-30 12:32:55 -07:00
Keith Packard
f807222c85 Demo/CORTEX_M3_MPS2_QEMU_GCC: Provide picolibc syscall implementation
Instead of a set of POSIX-compatible APIs as needed by newlib,
picolibc needs a FILE struct allocated that references a function to
output a single character. Picolibc also doesn't need sbrk as it has
its own version

Signed-off-by: Keith Packard <keithpac@amazon.com>
2023-03-30 12:32:55 -07:00
Keith Packard
0ecd0f5188 Demo/CORTEX_M3_MPS2_QEMU_GCC: Enable picolibc TLS when needed
When building with Picolibc that has TLS support, enable the relevant
FreeRTOS code.

Signed-off-by: Keith Packard <keithpac@amazon.com>
2023-03-30 12:32:55 -07:00
Keith Packard
0a1db4b00c Demo/CORTEX_M3_MPS2_QEMU_GCC: Fix use of -ffunction-sections -fdata-sections
For these options to be of any use, they must be passed to the
compiler when building object files and then the --gc-sections flag
must be passed to the linker.

Add -ffunction-sections -fdata-sections to CFLAGS and then add
-Wl,--gc-sections to LDFLAGS.

Signed-off-by: Keith Packard <keithpac@amazon.com>
2023-03-30 12:32:55 -07:00
Keith Packard
68ef270215 Demo/CORTEX_M3_MPS2_QEMU_GCC: Prepare startup.c for use with --gc-sections
Ensure that the handler2_address_const location will be correctly
aligned when compiled to a separate section.

Add the 'used' attribute to isr_vector to ensure it will not be elided
from the output.

Signed-off-by: Keith Packard <keithpac@amazon.com>
2023-03-30 12:32:55 -07:00
Soren Ptak
93a35f87d2
Added two config options to the FreeRTOSConfig file to get the demo running again. Fixed a typo in a file. Added a section to the link file (#940)
Co-authored-by: Soren Ptak <skptak@amazon.com>
2023-03-05 20:43:35 -08:00
Kody Stribrny
2f3e5235aa
Expand RV32E demo support, prevent 'ebreak' looping (#883)
* Expand RV32E demo support, prevent 'ebreak' looping

The RegTest tests are modified in the Qemu and HiFive demos
to support RV32E and its limited set of registers.

'ebreak' call looping is removed in RegTest. This produces
a lot of noise when debugging.

* Correct whitespace

* Remove 'ebreak' instruction calls

The ebreak instruction sets and exception
which leads to jumping around the binary. This
can make debugging difficult.

* Fix whitespace formatting
2023-02-06 21:00:09 -08:00
Paul Bartell
61fed35107 CI: add win32-mingw demo to GithubActions workflow 2022-12-21 13:09:02 -08:00
Paul Bartell
32a3f4e8a1 msp430_GCC: Update makefile for most recent mspgcc 2022-12-21 13:09:02 -08:00
Kody Stribrny
e28f953025
Update AVR_Dx Atmel Demo (#902)
Updates the demo .cproj file to account for new
paths since 3P restructure. Also enables the xTaskGetCurrentTaskHandle
include which is needed for building.

Inspired by - https://forums.freertos.org/t/avr-gcc-warning-extra-tokens-at-end-of-undef-in-porthardware-h/16365/3
2022-12-20 09:03:25 -08:00
Gaurav-Aggarwal-AWS
1e8d541ed4
Fix stack smashing in POSIX Demo (#901)
The tracelyzer code was declaring a local stack variable of type
`uint32_t` and passing it as output parameter to a function which
expected `uint64_t` on a 64-bit platform. This resulted in 4 byte memory
corruption. The problem was that the function signature uses
`TraceUnsignedBaseType_t` type for the output parameter which gets
defined to `uint32_t` on a 32-bit platform and to `uint64_t` on a 64-bit
platform, while the local stack variable was declared as `uint32_t`.
This commit changes the type of local stack variable to
`TraceUnsignedBaseType_t` to match the function parameter type.

Tracelyzer creates a task internally stack size of which is controlled
using TRC_CFG_CTRL_TASK_STACK_SIZE. It was earlier defined to 1024.
The POSIX port requires the stack size to be minimum PTHREAD_STACK_MIN.
The commit updates the TRC_CFG_CTRL_TASK_STACK_SIZE to
PTHREAD_STACK_MIN.

The demo directory contained one extra trcConfig.h and
trcKernelPortConfig.h. This commit deletes those files.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-12-15 19:21:55 +05:30
jasonpcarroll
6f7f9fd9ed [AUTO][RELEASE]: Bump file header version to "202212.00" 2022-12-10 01:17:30 +00:00
jasonpcarroll
a545cb2aee
Fix MingW RTOS demo. (#897)
* Fix MingW RTOS demo.

* Remove unnused variable.

* Fix header check.

* Remove tabs from source files.

* Fix spelling.

* Remove unneeded call to vTraceStop.

* Fix function.

* Fix code coverage project.

* Add Makefile to MinGW demo.

Co-authored-by: Jason Carroll <czjaso@amazon.com>
2022-12-09 15:49:42 -08:00
jasonpcarroll
c8ac06424f
WIN32-MSVC Demo Re-work interrupt handling. (#899)
* Updated Cellular Interface to mainline.

* Re-work keyboard interrupt handling, cleanup deprecated calls to trace library.

* Update lexicon.txt

Co-authored-by: Jason Carroll <czjaso@amazon.com>
2022-12-09 11:25:26 -08:00
Soren Ptak
1fc1e01fb6
FreeRTOS Trace Fixes (#888)
* Updating the FreeRTOS/Demo/Posix_GCC Demo's Trace.dump file Creation
* Updating the FreeRTOS-Plus/Demo/FreeRTOS_Plus_TCP_Echo_Posix Demo's Trace.dump file Creation

Co-authored-by: Soren Ptak <skptak@amazon.com>
2022-12-07 16:01:29 -08:00
jasonpcarroll
228f76cbe3
Fix and improve WIN32-MSVC demo in FreeRTOS/Demo. (#891)
* Fix WIN32-MSVC demo in FreeRTOS/Demo.

* Add comments.

* Fix corechecks

* Re-work trace and keyboard input.

* Remove unneeded line from trcConfig.h

* Fix formatting in trcConfig.h

* Fix heap issues, add FreeRTOS task to simulate keyboard interrupts.

* Update comment on main_blinky.

* Fix spelling.

* Make keyboard input thread block on input.

* Set thread affinity of keyboard input thread to not run on the same core as FreeRTOS.

* Adjust heap regions and total heap size.

* Fix spelling.

Co-authored-by: Jason Carroll <czjaso@amazon.com>
2022-12-07 10:29:12 -08:00
alfred gedeon
db1ac5f63f
Fix IAR GCC buid not to use trace (#895)
* Fix IAR GCC build for Qemu MPS2

* Add removed file

* set trace facility to none
2022-12-06 10:37:23 -08:00
alfred gedeon
101c263371
Fix: Build enable trace facility (#890)
* Fix IAR GCC build for Qemu MPS2

* Add removed file

* Add timer function for runtime stats

* Add lexicon entry
2022-12-05 16:58:26 -08:00
jasonpcarroll
b9f2248c5b [AUTO][RELEASE]: Bump file header version to "202211.00" 2022-12-01 00:34:31 +00:00
Paul Bartell
569c78fd8c
Remove coroutines (#874)
* Remove co-routine centric CORTEX_LM3S102_Rowley demos.

Remove CORTEX_LM3S102_Rowley Demo2 and Demo3.
Update Demo1 to no longer use coroutines.

* Remove co-routines from MB91460_Softune demo

* FreeRTOS_96348hs_SK16FX100PMC: Remove co-routine usage.

Remove co-routine usage from FreeRTOS_96348hs_SK16FX100PMC demo.

* MB96350_Softune_Dice_Kit: Remove co-routine usage

Remove co-routines usage from MB96350_Softune_Dice_Kit demo

* AVR_Dx_IAR: Remove co-routine usage

* AVR_Dx_Atmel_Studio: Remove co-routine usage

* PIC24_MPLAB: Remove autogenerated files and add to .gitignore

* PIC24_MPLAB: Remove co-routine usage from demo

* AVR_ATMega323_IAR: Remove co-routine usage

* ColdFire_MCF52221_CodeWarrior: Remove coroutine usage

* AVR_ATMega4809_MPLAB.X: Remove co-routine usage

* AVR_ATMega4809_IAR: Remove co-routine usage

* AVR_ATMega4809_Atmel_Studio: Remove coroutine usage

* AVR_ATMega323_WinAVR: Remove coroutine usage

* AVR_Dx_MPLAB.X: Remove coroutine usage

* dsPIC_MPLAB: Remove coroutine usage

* CORTEX_LM3S102_GCC: Remove coroutines and coroutine centric demos

* CORTEX_LM3S102_GCC: Update makefile to discard unused symbols

Allows fitting in the limited ram/flash for this part.

* CORTEX_LM3S316_IAR: Remove coroutines

* Demos: Remove references to crflash.c, crhook.c, crflash.h, crhook.h

* Remove coroutine options from FreeRTOSConfig.h files

* Xilinx: Remove backup file generated by revup utility

* Demos: Remove Coroutine related config items and references

* Format CBMC FreeRTOSConfig.h

* Update URL from aws.amazon.com/freertos to github.com/FreeRTOS

* Fix copyright year and license text

* Fix license text in demo files

* Update header check excluded path list

* Add configBENCHMARK to lexicon
2022-11-22 10:29:53 +05:30
Paul Bartell
eb7fd55a49
Remove binary and generated files from Kernel Demos (#876)
* T-HEAD_CB2201_CDK: Remove temporary IDE files

* Remove Ateml Studio temporary / user files

* Remove visual studio .vcxproj.user and .suo files

* Remove png file (from atmel libraries)

* Convert .doc files to .md

* Remove .exe files

* Remove CodeWarrior temporary files

* CORTEX_MB9XXXX_IAR_Keil: Remove .out binary files

* Renesas: Remove autogenerated .nav files

* NiosII_CycloneIII_DBC3C40_GCC: Remove generated hex file

* Update gitignore to exclude unwanted binary or auto-generated files

* Xilinx: Remove temporary / generated files

* PIC32MEC14xx_MPLAB: remove disassembly file
2022-11-19 13:12:38 +05:30
Kody Stribrny
d266eba137
Update RISC-V Qemu Virt GCC Readme + Makefile (#873)
Update Readme instructions  and add troubleshooting
tips for issues seen on Ubuntu and include a description
of where to find various crosstools-ng flags.
2022-11-17 16:55:58 -08:00
Andrea
dc2c031c45
added correct interrupt handler initialization in RISC-V-Qemu-virt_GCC (#864)
* added correct trap_handler initialization in main.c

Co-authored-by: Joseph Julicher <jjulicher@mac.com>
Co-authored-by: Kody Stribrny <kstribrn@amazon.com>
Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com>
2022-11-11 14:57:56 +05:30
Kody Stribrny
54d4eeaa26
Add Vectored Interrupt Support To SiFive RISC-V Demo (#871)
Update SiFive IAR demo to support vectored interrupts. This is a near copy of https://github.com/FreeRTOS/FreeRTOS/pull/797.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-11-09 10:34:04 -08:00
OccupyMars2025
1fc8a8ee42
modify a typo (#869) 2022-11-04 12:02:26 -07:00
Erik Tamlin
c568ba8c44
Percepio Trace Recorder v4.6.0 (#789)
* * Percepio Trace Recorder v4.6.0

* Add space between inclusion of header and comment

* Fix broken posix build - part 1

* Add percepio timer implementation

* Remove delted trace recorder header file

* Fix Networking demo  build

* Fix CLI demo

* Fix visual studio version number

* Fix core header check

* Fix more core checks

* Fix last of core checks

Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com>
Co-authored-by: Alfred Gedeon <alfred2g@hotmail.com>
2022-11-03 13:58:38 -07:00
alfred gedeon
4e0fecaadd
Arm gcc build qemu mps2 Coretex M3 (#861)
* Arm gcc build qemu mps2 Coretex M3

* Fix Path

* Insert compilation error for testing

* Build full dem

* Build MPU M3

* Build check IAR qemu mps2 gcc

* Fix path

* Fix typo
2022-10-20 15:37:52 -07:00
Paul Bartell
07a8701d1b demo: GCC Posix: Clarify toolchain installation steps 2022-10-17 13:28:54 -07:00
arshi016
58e55e2588
Updated configMINIMAL_STACK_SIZE for POSIX demo (#856) 2022-10-10 14:35:45 -07:00
Jeff Tenney
2e772110e3
Add test late timer start (retry #557) (#591)
* Add test for timer start delayed past expiration

This reverts commit 53af0ec62e, which
itself reverted 9c91199016.

* Add warning about vTimerDemoIncludeBacklogTests()

* uncrustify for CI check

* Remove unintentional changes to spacing in comments
2022-08-18 13:54:14 -07:00
RichardBarry
2808e48079
Fix compiler warning in MessageBufferDemo.c (#842)
* prvReceiverTask() in MessageBufferDemo.c declared a variable as a "MessageBufferHandle_t *" instead of just a "MessageBuffer_t".  This came to light when updating the kernel submodule pointer as the underlying datatype changed in the kernel from a void *.

* Remove additional line that was preventing automated uncrustify tests from passing.

Co-authored-by: none <>
2022-08-18 10:41:39 +05:30
e14002270
cee9d5c560
Fix qemu riscv build error and miss debug info in assembly code (#838)
1. add INCLUDE_xTaskGetCurrentTaskHandle for stream_buffer use
2. LDFLAGS add arch and abi info for linker
        for riscv64-unknown-elf multilib, if there is no arch and abi
        info, will link to default lib and have below error
        target emulation `elf32-littleriscv' does not match `elf64-littleriscv'
3. use CFLAGS to replace ASFLAGS when compile assembly code
        because DEBUG flag is added in CFLAGS, if we use ASFLAGS to compile
        assembly code, there is no debug info in assembly code objfile

Signed-off-by: Eric Chan <e14002270@gmail.com>
2022-08-10 15:04:36 +05:30
Gaurav-Aggarwal-AWS
5890286b30
Fix incorrect relative paths in Cmake files (#837)
This was reported here - https://github.com/FreeRTOS/FreeRTOS/issues/812

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-08-08 21:22:35 +05:30
alfred gedeon
cfb32b4f62
Demo: CORTEX M3 MPU MPS2 with QEMU (#813)
* Demo: CORTEX M3 MPU MPS2 with QEMU

* Fix headers

* Update Makefile

Update makefile to point to current directory

* Update Makefile

* Update mps2_m3.ld

* Fix PR comments

* Fix PR Comments

* Fix config value
2022-06-23 11:04:51 -07:00
gilbefan
3a5a8e14fc
VSCode launch configurations (#820)
* CORTEX_MPS2_QEMU_IAR_GCC now has VSCode tasks and launch configurations to build, run, and debug in one button. This should work on all platforms (Linux, MacOS, Windows).

* Posix_GCC Demo now has VSCode task and launch configs to build, run, debug in one button for Linux/MacOS ("lldb Launch").

It also has configuration for Windows through Ubuntu ("gdb launch"), and this will also work for Linux if the user wants to use gdb instead of lldb.

* Integrated terminal settings for Ubuntu and MSYS2 ways to run Posix Demo on Windows.

This allows Posix port demo to be built on either WSL/Ubuntu or MSYS2 on Windows.

These are absolute paths so if the user has installed Ubuntu or MSYS2 elsewhere they will need to change them.

* Improved pattern matching in Run QEMU task. Replaced usage of deprecated ${workspaceRoot} with ${workspaceFolder}.

* Split MSYS2 and Ubuntu WSL configurations

MSYS2 works better with external console, and Ubuntu WSL works with internal console. This is reflected by having two different configurations.

* Delete RTOSDemo.map

Cleanup. (This is file is built but never deleted when make-ing)

* Delete null.d

* Cleanup extranneous vscode workspace

* Documentation for VSCode launch configs

Documentation for how to run this demo on VSCode using launch configs.

* Added documentation for VSCode launch configs

Added documentation for running demo through VSCode using launch configurations.

* Removed unneeded .log files and c_cpp_properties.json in CORTEX_MPS2_QEMU_IAR_GCC/.vscode/

* Deleted unnecessary .log files from POSIX_GCC/.vscode

* Set build task problem matcher to "gcc", deault problem matcher from VSCode.

* Removed unneeded "sh -c -l" command from the default build task in CORTEX_MPS2_QEMU_IAR_GCC.

* "Build QEMU" task problem matcher finds the correct paths to problem files.

* Moved steps to "Prerequisites" section.

* Update Readme.md

Fixed markdown typo.

* Moved items to prerequisites for Posix_GCC demo.

Co-authored-by: Fan <gilbefan@f84d899204e1.ant.amazon.com>
2022-06-07 21:21:52 -07:00
Gaurav-Aggarwal-AWS
f62d4ecd69
Fix build failures in Nuvoton M2351 projects (#818)
* Fix build failures in Nuvoton M2351 projects

These are needed because of recent changes in the port

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-06-02 22:32:59 +05:30
Gaurav-Aggarwal-AWS
ad88de61d0
Add a demo project for NUCLEO-L010RB board (#808)
* Add a demo project for NUCLEO-L010RB board

The board contains a Cortex-M0+ core.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Fix header check

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Fix header check

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-04-08 11:14:17 -07:00
RichardBarry
da3a1371db
Fix mpu simulator demo (#805)
* All for the Demo/Cortex_MPU_Simulator_Keil_GCC GCC demo:
+ Update the linker script so the project builds now the heap is part of the privileged data.
+ Add simulator.ini to setup the simulator memory map when the debugger starts to prevent invalid access errors.
+ Set configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY to 1 in FreeRTOSConfig.h, then fix up resultant build errors.
+ Set configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS to 0 in FreeRTOSConfig.h, then fix up resultant build errors.

* Fix compiler warning in Arm startup file.

* Update comments in the file headers to pass the git checkin tests.

* Update header comments to pass git checkin tests.

* Second attempt to get file header comments correct for the check-in tests.

* Third attempt to get the header comments correct.

* Fix spelling.

* Fix manifest check

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Co-authored-by: none <>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-04-05 10:09:56 +05:30
Felipe Torrezan
fc9396f576
Migrated RL78/IAR port to EWRL78v3+ (#799) 2022-03-24 09:59:45 -07:00
RichardBarry
1509e4f742
Add a hardware definition project for the MicroZed board (#607)
Add a hardware definition project for the MicroZed board to the existing Zynq ZC702 project.
Add a text file that describes how to switch the Zynq project form the ZC702 hardware to the MicroZed hardware.
2022-03-21 15:21:59 -07:00