Richard Barry
a5d0e3f0c1
Prepare for V7.4.0 release.
2013-02-19 18:36:58 +00:00
Richard Barry
902f9e1a58
Update PIC32 demo application to remove reliance on PLIB functions.
...
Update the default low power implementation in all the Cortex-M port layers to add a small critical section.
2013-02-18 16:41:11 +00:00
Richard Barry
ac78adae4b
Added INCLUDE_xSemaphoreGetMutexHolder() default.
...
Changed eTaskStateGet() to eTaskGetState() and added #define to ensure backward compatibility.
Added configEXPECTED_IDLE_TIME_BEFORE_SLEEP definition - was previously hard coded to 2.
Slight change to the default CM3 tickless sleep function to allow the idle time to be set to zero in the pre-sleep processing macro.
Changed stack alignment for the FreeRTOS-MPU port to ensure it didn't trigger the assert() in the generic create function.
2013-01-31 14:18:03 +00:00
Richard Barry
ba686260ca
Make CM3/4 tick configuration a weak function to allow application writers to use an alternative tick source.
2012-10-29 15:56:26 +00:00
Richard Barry
f5c52bdb1d
Re-jig some of the new functions to correctly assign them public or private linkage, and remove some functions that were added in but never used.
2012-10-22 16:40:45 +00:00
Richard Barry
f06a945444
Prepare for V7.3.0 release.
2012-10-16 12:17:47 +00:00
Richard Barry
e03ab659f3
Add tickless idle support in Cortex-M ports.
...
Change CCS R4 directory name.
2012-10-16 07:55:40 +00:00
Richard Barry
0c7af1c2d3
Put comments in the code that give a reference to people who think that setting BASE_PRI to zero is the wrong thing to to in an ISR.
2012-08-14 13:04:22 +00:00
Richard Barry
e0bab5981a
Prepare for V7.2.0 release.
2012-08-14 12:14:48 +00:00
Richard Barry
f508a5f653
Add FreeRTOS-Plus directory.
2012-08-11 21:34:11 +00:00