mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-04-20 05:21:59 -04:00
ac78adae4b
Changed eTaskStateGet() to eTaskGetState() and added #define to ensure backward compatibility. Added configEXPECTED_IDLE_TIME_BEFORE_SLEEP definition - was previously hard coded to 2. Slight change to the default CM3 tickless sleep function to allow the idle time to be set to zero in the pre-sleep processing macro. Changed stack alignment for the FreeRTOS-MPU port to ensure it didn't trigger the assert() in the generic create function.
557 lines
20 KiB
C
557 lines
20 KiB
C
/*
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FreeRTOS V7.3.0 - Copyright (C) 2012 Real Time Engineers Ltd.
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FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
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http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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***************************************************************************
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* *
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* FreeRTOS tutorial books are available in pdf and paperback. *
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* Complete, revised, and edited pdf reference manuals are also *
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* available. *
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* *
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* Purchasing FreeRTOS documentation will not only help you, by *
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* ensuring you get running as quickly as possible and with an *
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* in-depth knowledge of how to use FreeRTOS, it will also help *
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* the FreeRTOS project to continue with its mission of providing *
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* professional grade, cross platform, de facto standard solutions *
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* for microcontrollers - completely free of charge! *
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* *
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* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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* *
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* Thank you for using FreeRTOS, and thank you for your support! *
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* *
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***************************************************************************
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License (version 2) as published by the
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Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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>>>NOTE<<< The modification to the GPL is included to allow you to
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distribute a combined work that includes FreeRTOS without being obliged to
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provide the source code for proprietary components outside of the FreeRTOS
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kernel. FreeRTOS is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details. You should have received a copy of the GNU General Public
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License and the FreeRTOS license exception along with FreeRTOS; if not it
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can be viewed here: http://www.freertos.org/a00114.html and also obtained
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by writing to Richard Barry, contact details for whom are available on the
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FreeRTOS WEB site.
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1 tab == 4 spaces!
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***************************************************************************
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* *
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* Having a problem? Start by reading the FAQ "My application does *
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* not run, what could be wrong?" *
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* *
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* http://www.FreeRTOS.org/FAQHelp.html *
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* *
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***************************************************************************
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http://www.FreeRTOS.org - Documentation, training, latest versions, license
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and contact details.
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http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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including FreeRTOS+Trace - an indispensable productivity tool.
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Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell
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the code with commercial support, indemnification, and middleware, under
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the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also
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provide a safety engineered and independently SIL3 certified version under
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the SafeRTOS brand: http://www.SafeRTOS.com.
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*/
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/*-----------------------------------------------------------
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* Implementation of functions defined in portable.h for the ARM CM4F port.
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*----------------------------------------------------------*/
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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#ifndef __TARGET_FPU_VFP
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#error This port can only be used when the project options are configured to enable hardware floating point support.
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#endif
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#if configMAX_SYSCALL_INTERRUPT_PRIORITY == 0
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#error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
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#endif
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#ifndef configSYSTICK_CLOCK_HZ
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#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
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#endif
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/* The __weak attribute does not work as you might expect with the Keil tools
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so the configOVERRIDE_DEFAULT_TICK_CONFIGURATION constant must be set to 1 if
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the application writer wants to provide their own implementation of
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vPortSetupTimerInterrupt(). Ensure configOVERRIDE_DEFAULT_TICK_CONFIGURATION
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is defined. */
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#ifndef configOVERRIDE_DEFAULT_TICK_CONFIGURATION
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#define configOVERRIDE_DEFAULT_TICK_CONFIGURATION 0
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#endif
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/* Constants required to manipulate the core. Registers first... */
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#define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000e010 ) )
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#define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile unsigned long * ) 0xe000e014 ) )
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#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile unsigned long * ) 0xe000e018 ) )
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#define portNVIC_INT_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000ed04 ) )
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#define portNVIC_SYSPRI2_REG ( * ( ( volatile unsigned long * ) 0xe000ed20 ) )
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/* ...then bits in the registers. */
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#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
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#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
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#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
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#define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
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#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
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#define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL )
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#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
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#define portNVIC_PENDSV_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16 )
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#define portNVIC_SYSTICK_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24 )
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/* Constants required to manipulate the VFP. */
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#define portFPCCR ( ( volatile unsigned long * ) 0xe000ef34 ) /* Floating point context control register. */
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#define portASPEN_AND_LSPEN_BITS ( 0x3UL << 30UL )
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/* Constants required to set up the initial stack. */
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#define portINITIAL_XPSR ( 0x01000000 )
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#define portINITIAL_EXEC_RETURN ( 0xfffffffd )
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/* Each task maintains its own interrupt status in the critical nesting
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variable. */
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static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;
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/*
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* Setup the timer to generate the tick interrupts. The implementation in this
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* file is weak to allow application writers to change the timer used to
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* generate the tick interrupt.
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*/
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void vPortSetupTimerInterrupt( void );
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/*
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* Exception handlers.
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*/
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void xPortPendSVHandler( void );
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void xPortSysTickHandler( void );
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void vPortSVCHandler( void );
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/*
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* Start first task is a separate function so it can be tested in isolation.
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*/
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static void prvStartFirstTask( void );
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/*
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* Functions defined in portasm.s to enable the VFP.
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*/
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static void prvEnableVFP( void );
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/*-----------------------------------------------------------*/
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/*
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* The number of SysTick increments that make up one tick period.
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*/
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#if configUSE_TICKLESS_IDLE == 1
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static unsigned long ulTimerReloadValueForOneTick = 0;
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#endif
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/*
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* The maximum number of tick periods that can be suppressed is limited by the
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* 24 bit resolution of the SysTick timer.
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*/
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#if configUSE_TICKLESS_IDLE == 1
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static unsigned long xMaximumPossibleSuppressedTicks = 0;
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#endif /* configUSE_TICKLESS_IDLE */
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/*
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* Compensate for the CPU cycles that pass while the SysTick is stopped (low
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* power functionality only.
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*/
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#if configUSE_TICKLESS_IDLE == 1
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static unsigned long ulStoppedTimerCompensation = 0;
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#endif /* configUSE_TICKLESS_IDLE */
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/*-----------------------------------------------------------*/
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/*
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* See header file for description.
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*/
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portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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{
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/* Simulate the stack frame as it would be created by a context switch
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interrupt. */
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/* Offset added to account for the way the MCU uses the stack on entry/exit
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of interrupts, and to ensure alignment. */
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pxTopOfStack--;
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*pxTopOfStack = portINITIAL_XPSR; /* xPSR */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */
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pxTopOfStack--;
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*pxTopOfStack = 0; /* LR */
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/* Save code space by skipping register initialisation. */
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pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
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*pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
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/* A save method is being used that requires each task to maintain its
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own exec return value. */
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pxTopOfStack--;
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*pxTopOfStack = portINITIAL_EXEC_RETURN;
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pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
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return pxTopOfStack;
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}
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/*-----------------------------------------------------------*/
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__asm void vPortSVCHandler( void )
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{
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PRESERVE8
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/* Get the location of the current TCB. */
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ldr r3, =pxCurrentTCB
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ldr r1, [r3]
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ldr r0, [r1]
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/* Pop the core registers. */
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ldmia r0!, {r4-r11, r14}
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msr psp, r0
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mov r0, #0
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msr basepri, r0
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bx r14
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}
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/*-----------------------------------------------------------*/
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__asm void prvStartFirstTask( void )
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{
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PRESERVE8
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/* Use the NVIC offset register to locate the stack. */
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ldr r0, =0xE000ED08
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ldr r0, [r0]
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ldr r0, [r0]
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/* Set the msp back to the start of the stack. */
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msr msp, r0
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/* Globally enable interrupts. */
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cpsie i
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/* Call SVC to start the first task. */
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svc 0
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nop
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}
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/*-----------------------------------------------------------*/
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__asm void prvEnableVFP( void )
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{
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PRESERVE8
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/* The FPU enable bits are in the CPACR. */
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ldr.w r0, =0xE000ED88
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ldr r1, [r0]
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/* Enable CP10 and CP11 coprocessors, then save back. */
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orr r1, r1, #( 0xf << 20 )
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str r1, [r0]
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bx r14
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nop
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}
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/*-----------------------------------------------------------*/
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/*
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* See header file for description.
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*/
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portBASE_TYPE xPortStartScheduler( void )
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{
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/* Make PendSV, CallSV and SysTick the same priroity as the kernel. */
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portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
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portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
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/* Start the timer that generates the tick ISR. Interrupts are disabled
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here already. */
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vPortSetupTimerInterrupt();
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/* Initialise the critical nesting count ready for the first task. */
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uxCriticalNesting = 0;
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/* Ensure the VFP is enabled - it should be anyway. */
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prvEnableVFP();
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/* Lazy save always. */
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*( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
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/* Start the first task. */
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prvStartFirstTask();
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/* Should not get here! */
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return 0;
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}
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/*-----------------------------------------------------------*/
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void vPortEndScheduler( void )
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{
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/* It is unlikely that the CM4F port will require this function as there
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is nothing to return to. */
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}
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/*-----------------------------------------------------------*/
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void vPortYieldFromISR( void )
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{
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/* Set a PendSV to request a context switch. */
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portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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}
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/*-----------------------------------------------------------*/
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void vPortEnterCritical( void )
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{
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portDISABLE_INTERRUPTS();
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uxCriticalNesting++;
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}
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/*-----------------------------------------------------------*/
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void vPortExitCritical( void )
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{
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uxCriticalNesting--;
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if( uxCriticalNesting == 0 )
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{
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portENABLE_INTERRUPTS();
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}
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}
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/*-----------------------------------------------------------*/
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__asm void xPortPendSVHandler( void )
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{
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extern uxCriticalNesting;
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extern pxCurrentTCB;
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extern vTaskSwitchContext;
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PRESERVE8
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mrs r0, psp
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/* Get the location of the current TCB. */
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ldr r3, =pxCurrentTCB
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ldr r2, [r3]
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/* Is the task using the FPU context? If so, push high vfp registers. */
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tst r14, #0x10
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it eq
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vstmdbeq r0!, {s16-s31}
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/* Save the core registers. */
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stmdb r0!, {r4-r11, r14}
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/* Save the new top of stack into the first member of the TCB. */
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str r0, [r2]
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stmdb sp!, {r3, r14}
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mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
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msr basepri, r0
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bl vTaskSwitchContext
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mov r0, #0
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msr basepri, r0
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ldmia sp!, {r3, r14}
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/* The first item in pxCurrentTCB is the task top of stack. */
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ldr r1, [r3]
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ldr r0, [r1]
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/* Pop the core registers. */
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ldmia r0!, {r4-r11, r14}
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/* Is the task using the FPU context? If so, pop the high vfp registers
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too. */
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tst r14, #0x10
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it eq
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vldmiaeq r0!, {s16-s31}
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msr psp, r0
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bx r14
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nop
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}
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/*-----------------------------------------------------------*/
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void xPortSysTickHandler( void )
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{
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#if configUSE_PREEMPTION == 1
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{
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/* If using preemption, also force a context switch. */
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portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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}
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#endif
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/* Only reset the systick load register if configUSE_TICKLESS_IDLE is set to
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1. If it is set to 0 tickless idle is not being used. If it is set to a
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value other than 0 or 1 then a timer other than the SysTick is being used
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to generate the tick interrupt. */
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#if configUSE_TICKLESS_IDLE == 1
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portNVIC_SYSTICK_LOAD_REG = ulTimerReloadValueForOneTick;
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#endif
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( void ) portSET_INTERRUPT_MASK_FROM_ISR();
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{
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vTaskIncrementTick();
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}
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portCLEAR_INTERRUPT_MASK_FROM_ISR( 0 );
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}
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/*-----------------------------------------------------------*/
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#if configUSE_TICKLESS_IDLE == 1
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__weak void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime )
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{
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unsigned long ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickIncrements;
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portTickType xModifiableIdleTime;
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/* Make sure the SysTick reload value does not overflow the counter. */
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if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
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{
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xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
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}
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/* Calculate the reload value required to wait xExpectedIdleTime
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tick periods. -1 is used because this code will execute part way
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through one of the tick periods, and the fraction of a tick period is
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accounted for later. */
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ulReloadValue = ( ulTimerReloadValueForOneTick * ( xExpectedIdleTime - 1UL ) );
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if( ulReloadValue > ulStoppedTimerCompensation )
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{
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ulReloadValue -= ulStoppedTimerCompensation;
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}
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/* Stop the SysTick momentarily. The time the SysTick is stopped for
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is accounted for as best it can be, but using the tickless mode will
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inevitably result in some tiny drift of the time maintained by the
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kernel with respect to calendar time. */
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portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT;
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/* If a context switch is pending then abandon the low power entry as
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the context switch might have been pended by an external interrupt that
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requires processing. */
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if( ( portNVIC_INT_CTRL_REG & portNVIC_PENDSVSET_BIT ) != 0 )
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{
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/* Restart SysTick. */
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portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
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}
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else
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{
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/* Adjust the reload value to take into account that the current
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time slice is already partially complete. */
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ulReloadValue += ( portNVIC_SYSTICK_LOAD_REG - ( portNVIC_SYSTICK_LOAD_REG - portNVIC_SYSTICK_CURRENT_VALUE_REG ) );
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portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
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/* Clear the SysTick count flag and set the count value back to
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zero. */
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portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
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/* Restart SysTick. */
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portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
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/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
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set its parameter to 0 to indicate that its implementation contains
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its own wait for interrupt or wait for event instruction, and so wfi
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should not be executed again. However, the original expected idle
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time variable must remain unmodified, so a copy is taken. */
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xModifiableIdleTime = xExpectedIdleTime;
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configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
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if( xModifiableIdleTime > 0 )
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{
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__wfi();
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}
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configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
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/* Stop SysTick. Again, the time the SysTick is stopped for is
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accounted for as best it can be, but using the tickless mode will
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inevitably result in some tiny drift of the time maintained by the
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kernel with respect to calendar time. */
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portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT;
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if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
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{
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/* The tick interrupt has already executed, and the SysTick
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count reloaded with the portNVIC_SYSTICK_LOAD_REG value.
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Reset the portNVIC_SYSTICK_LOAD_REG with whatever remains of
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this tick period. */
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portNVIC_SYSTICK_LOAD_REG = ulTimerReloadValueForOneTick - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
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/* The tick interrupt handler will already have pended the tick
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processing in the kernel. As the pending tick will be
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processed as soon as this function exits, the tick value
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maintained by the tick is stepped forward by one less than the
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time spent waiting. */
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ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
|
|
}
|
|
else
|
|
{
|
|
/* Something other than the tick interrupt ended the sleep.
|
|
Work out how long the sleep lasted. */
|
|
ulCompletedSysTickIncrements = ( xExpectedIdleTime * ulTimerReloadValueForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
|
|
|
/* How many complete tick periods passed while the processor
|
|
was waiting? */
|
|
ulCompleteTickPeriods = ulCompletedSysTickIncrements / ulTimerReloadValueForOneTick;
|
|
|
|
/* The reload value is set to whatever fraction of a single tick
|
|
period remains. */
|
|
portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1 ) * ulTimerReloadValueForOneTick ) - ulCompletedSysTickIncrements;
|
|
}
|
|
|
|
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
|
|
again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
|
|
value. */
|
|
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
|
|
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
|
|
|
vTaskStepTick( ulCompleteTickPeriods );
|
|
}
|
|
}
|
|
|
|
#endif /* #if configUSE_TICKLESS_IDLE */
|
|
|
|
/*-----------------------------------------------------------*/
|
|
|
|
/*
|
|
* Setup the SysTick timer to generate the tick interrupts at the required
|
|
* frequency.
|
|
*/
|
|
#if configOVERRIDE_DEFAULT_TICK_CONFIGURATION == 0
|
|
|
|
void vPortSetupTimerInterrupt( void )
|
|
{
|
|
/* Calculate the constants required to configure the tick interrupt. */
|
|
#if configUSE_TICKLESS_IDLE == 1
|
|
{
|
|
ulTimerReloadValueForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
|
|
xMaximumPossibleSuppressedTicks = 0xffffffUL / ( ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL );
|
|
ulStoppedTimerCompensation = 45UL / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
|
|
}
|
|
#endif /* configUSE_TICKLESS_IDLE */
|
|
|
|
/* Configure SysTick to interrupt at the requested rate. */
|
|
portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;;
|
|
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
|
}
|
|
|
|
#endif /* configOVERRIDE_DEFAULT_TICK_CONFIGURATION */
|
|
/*-----------------------------------------------------------*/
|
|
|
|
__asm unsigned long ulPortSetInterruptMask( void )
|
|
{
|
|
PRESERVE8
|
|
|
|
mrs r0, basepri
|
|
mov r1, #configMAX_SYSCALL_INTERRUPT_PRIORITY
|
|
msr basepri, r1
|
|
bx r14
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
__asm void vPortClearInterruptMask( unsigned long ulNewMask )
|
|
{
|
|
PRESERVE8
|
|
|
|
msr basepri, r0
|
|
bx r14
|
|
}
|