Commit graph

98 commits

Author SHA1 Message Date
Gaurav Aggarwal 0437c8257a [AUTO][RELEASE]: Bump file header version to "10.4.3 LTS Patch 3" 2022-09-16 18:13:25 +00:00
Gaurav Aggarwal da73aa6329 Restrict unpriv task to invoke code with privilege
It was possible for an unprivileged task to invoke any function with
privilege by passing it as a parameter to MPU_xTaskCreate,
MPU_xTaskCreateStatic, MPU_xTimerCreate, MPU_xTimerCreateStatic, or
MPU_xTimerPendFunctionCall.

This commit ensures that MPU_xTaskCreate and MPU_xTaskCreateStatic can
only create unprivileged tasks. It also removes the following APIs:
1. MPU_xTimerCreate
2. MPU_xTimerCreateStatic
3. MPU_xTimerPendFunctionCall

We thank Huazhong University of Science and Technology for reporting
this issue.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-09-16 22:18:35 +05:30
Gaurav Aggarwal 51ea2bfe62 Remove local stack variable form MPU wrappers
It was possible for a third party that had already independently gained
the ability to execute injected code to achieve further privilege
escalation by branching directly inside a FreeRTOS MPU API wrapper
function with a manually crafted stack frame. This commit removes the
local stack variable `xRunningPrivileged` so that a manually crafted
stack frame cannot be used for privilege escalation by branching
directly inside a FreeRTOS MPU API wrapper.

We thank Certibit Consulting, LLC, Huazhong University of Science and
Technology and the SecLab team at Northeastern University for reporting
this issue.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-09-16 22:18:35 +05:30
Gaurav Aggarwal c4ad77f694 Make RAM regions non-executable
This commit makes the privileged RAM and stack regions non-executable.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-09-16 22:18:35 +05:30
Gaurav Aggarwal acd9279fc2 Use highest numbered MPU regions for kernel
ARMv7-M allows overlapping MPU regions. When 2 MPU regions overlap, the
MPU configuration of the higher numbered MPU region is applied. For
example, if a memory area is covered by 2 MPU regions 0 and 1, the
memory permissions for MPU region 1 are applied.

We use 5 MPU regions for kernel code and kernel data protections and
leave the remaining for the application writer. We were using lowest
numbered MPU regions (0-4) for kernel protections and leaving the
remaining for the application writer. The application writer could
configure those higher numbered MPU regions to override kernel
protections.

This commit changes the code to use highest numbered MPU regions for
kernel protections and leave the remaining for the application writer.
This ensures that the application writer cannot override kernel
protections.

We thank the SecLab team at Northeastern University for reporting this
issue.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-09-16 22:18:35 +05:30
Gaurav Aggarwal 5f93abd3b5 [AUTO][RELEASE]: Bump file header version to "10.4.3 LTS Patch 2" 2021-10-06 19:33:51 -07:00
Gaurav Aggarwal ba50511821 Change xPortRaisePrivilege and vPortResetPrivilege to macros
This prevents non-kernel code from calling these functions.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-10-06 19:13:48 -07:00
Gaurav Aggarwal dff28505b7 [AUTO][RELEASE]: Bump file header version to "10.4.3 LTS Patch 1" 2021-08-19 11:22:55 -07:00
Gaurav Aggarwal 8341ffdc61 Fix free secure context for Cortex-M23 ports
Update the branching condition to correctly free secure context when
there is one.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-08-18 17:46:27 -07:00
Gaurav Aggarwal faa92f7df2 Implement secure stack sealing as per ARM's recommendation
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-08-18 17:36:55 -07:00
Gaurav Aggarwal f87404b56f Associate secure context with task handle
The secure side context management code now checks that the secure
context being saved or restored belongs to the task being switched-out
or switched-in respectively.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-08-18 17:31:22 -07:00
Gaurav Aggarwal 66466793d5 Pre-allocate secure-side context structures
This commit improves ARMv8-M security by pre-allocating secure-side task
context structures and changing how tasks reference a secure-side
context structure when calling a secure function. The new configuration
constant secureconfigMAX_SECURE_CONTEXTS sets the number of secure
context structures to pre-allocate. secureconfigMAX_SECURE_CONTEXTS
defaults to 8 if left undefined.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-08-18 16:21:55 -07:00
Cobus van Eeden ec62f69dab [AUTO][RELEASE]: Bump file header version to "10.4.3" 2020-12-14 10:13:39 -08:00
alfred gedeon a48f137896
Posix Port: Comment and remove unused variables (#230)
* Posix Port: Comment and remove unused variables
* Fix header, replace tabs with spaces
2020-12-13 17:33:45 -08:00
Cobus van Eeden c7a9a01c94
Improve heap2 bounds checking (#224)
* Improve heap bounds checking in pvPortMalloc
2020-12-07 10:36:27 -08:00
Gaurav-Aggarwal-AWS b5020cb3d8
Prevent unprivileged task from altering MPU configuration (#227)
This change removes the FreeRTOS System Calls (aka MPU wrappers) for the
following kernel APIs:
- xTaskCreateRestricted
- xTaskCreateRestrictedStatic
- vTaskAllocateMPURegions

A system call allows an unprivileged task to execute a kernel API which
is otherwise accessible to privileged software only. The above 3 APIs
can create a new task with a different MPU configuration or alter the
MPU configuration of an existing task. This an be (mis)used by an
unprivileged task to grant itself access to a region which it does not
have access to.

Removing the system calls for these APIs ensures that an unprivileged
task cannot execute this APIs. If an unprivileged task attempts to
execute any of these API, it will result in a Memory Fault.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-12-07 09:53:22 -08:00
David Chalco 337bca615e [AUTO][RELEASE]: Bump file header version to "10.4.2" 2020-11-10 14:42:58 -08:00
Gaurav-Aggarwal-AWS ebbe2cf854
Ensure interrupts are enabled at first task start (#214)
Critical sections in FreeRTOS are implemented using the following two
functions:

void vPortEnterCritical( void )
{
    portDISABLE_INTERRUPTS();
    uxCriticalNesting++;
}

void vPortExitCritical( void )
{
    uxCriticalNesting--;

    if( uxCriticalNesting == 0 )
    {
        portENABLE_INTERRUPTS();
    }
}

uxCriticalNesting is initialized to a large value at the start and set
to zero when the scheduler is started (xPortStartScheduler). As a
result, before the scheduler is started, a pair of enter/exit critical
section will leave the interrupts disabled because uxCriticalNesting
will not reach zero in the vPortExitCritical function. This is done to
ensure that the interrupts remain disabled from the time first FreeRTOS
API is called to the time when the scheduler is started. The scheduler
starting code is expected to enure that interrupts are enabled before
the first task starts executing.

Cortex-M33 ports were not enabling interrupts before starting the first
task and as a result, the first task was started with interrupts
disabled. This PR fixes the issue by ensuring that interrupts are
enabled before the first task is started.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-11-05 09:26:56 -08:00
filipgeorge 1431b65110
porthardware.h file update for AVR Mega0 and Dx (#212)
* Added guard for ioavr.h include in AVR Dx porthardware.h file.
* Added guard for ioavr.h include in AVR Mega0 porthardware.h file.
2020-10-27 12:26:52 -07:00
Carl Lundin 6a5784598a
Upstream stack masking fix to GCC ports. (#210)
Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
2020-10-27 11:32:09 -07:00
Jon Snow bdb38d85dc
update interrupt vector names for ATMega32 (#196) 2020-10-26 13:31:15 -07:00
magicse7en 82df39764a
Xtensa: fix the coproc_area incorrect issue (#117)
* Xtensa: fix the coproc_area incorrect issue

foss-xtensa/amazon-freertos#2 mentioned a issue:
1.
In function pxPortInitialiseStack(StackType_t *pxTopOfStack....)
p = (uint32_t *)(((uint32_t) pxTopOfStack - XT_CP_SIZE) & ~0xf);

In function prvInitialiseNewTask (file: task.c)
pxTopOfStack = (pxStack + (ulStackDepth - 1)) & (~portBYTE_ALIGNMENT_MASK)

So the co-processor area is at
p = (uint32_t *)(((uint32_t)((pxStack + (ulStackDepth - 1)) & (~portBYTE_ALIGNMENT_MASK)) - XT_CP_SIZE) & ~0xf);

2.
In function vPortStoreTaskMPUSettings( .... , StackType_t pxBottomOfStack ...)
xMPUSettings->coproc_area = (StackType_t)((((uint32_t)(pxBottomOfStack + usStackDepth - 1)) - XT_CP_SIZE) & ~0xf);

pxBottomOfStack = pxStack

=> xMPUSettings->coproc_area = (StackType_t*)((((uint32_t)(pxStack+ ulStackDepth - 1)) - XT_CP_SIZE ) & ~0xf);

The p is coproc_area that should be equal to xMPUSettings->coproc_area.

For example, assume pxStack is 0xa0000000, ulStackDepth is 0x2000,
portBYTE_ALIGNMENT_MASK is 0x7f, XT_CP_SIZE is 0x100.

The p = (uint32_t)(((uint32_t)((pxStack + (ulStackDepth - 1)) & (~portBYTE_ALIGNMENT_MASK)) - XT_CP_SIZE) & ~0xf)
      = 0xa0001e80
The xMPUSettings->coproc_area = (StackType_t)((((uint32_t)(pxStack+ usStackDepth - 1)) - XT_CP_SIZE ) & ~0xf)
                              = 0xa0001ef0
Obviously, the p is not equal to the xMPUSettings->coproc_area, which will cause context switching error.

Signed-off-by: magicse7en <magicse7en@outlook.com>

* Update port.c

Co-authored-by: Carl Lundin <53273776+lundinc2@users.noreply.github.com>
2020-10-26 11:47:21 -07:00
magicse7en b9748e50ea
Xtensa: fix stack overlap coproc_area issue (#118)
In function pxPortInitialiseStack of port.c:
	sp = ( StackType_t * ) ( ( ( UBaseType_t ) ( pxTopOfStack + 1 )  - XT_CP_SIZE - XT_STK_FRMSZ ) & ~0xf );
We assume XT_CP_SIZE is 0xE4, XT_STK_FRMSZ is 0xA0, pxTopOfStack is 0xA0000000, sp is 0x9FFFFE80.
From port.c, we know the frame->a1 as below:
	frame->a1 = ( UBaseType_t ) sp + XT_STK_FRMSZ;  /* physical top of stack frame    */
So frame->a1 is 0x9FFFFF20. Therefore the interrupt stack frame range is 0x9FFFFE80 ~ 0x9FFFFF20.

The coproc_area is: p = ( uint32_t * ) ( ( ( uint32_t ) pxTopOfStack - XT_CP_SIZE ) & ~0xf );
So its value is 0x9FFFFF10. Obviously, the interrupt stack frame overlaps the coproc_area.

Co-authored-by: Carl Lundin <53273776+lundinc2@users.noreply.github.com>
2020-10-26 11:07:32 -07:00
RichardBarry 5fb26de019
Recently vTaskDelayUntil() was updated to xTaskDelayUntil() because the function now returns a value. The PR didn't make the same change in the MPU port, or update the constants required to include the xTaskDelayUntil() function in the build. (#199)
This PR:
Changes the INCLUDE_vTaskDelayUntil compile time constant to INCLUDE_xTaskDelayUntil.
Updates FreeRTOS.h to ensure backward compatibility for projects that already have INCLUDE_vTaskDelayUntil defined.
Updates the MPU prototypes, wrapper and implementation to use the updated xTaskDelayUntil() function.

Tests to be checked into the FreeRTOS/FreeRTOS repository after this PR.
2020-10-11 14:04:49 -07:00
Joseph Julicher 6375d52250
matching the preprocessor conditionals for xTaskGetCurrentTaskHandle() (#197) 2020-10-08 18:44:30 -07:00
Carl Lundin 3d4d17178f
Reintroduce Espressif's IDF v4.2 changes to ESP32 port (#193)
* Renamed old port to ESP_IDF_V3

* Update ESP32 port files to support IDF v4.2.

* Add changes required to support ESP32-S2

Co-authored-by: Shubham Kulkarni <shubham.kulkarni@espressif.com>
2020-10-08 11:03:27 -07:00
Reda Maher 77ad717400
Posix: Fix no task switching issue if a task ended its main function (#184)
* Posix: Fix no task switching issue if a task ended

When the main function of a task exits, no task switching happened.
This is because all the remaining tasks are waiting on the condition
variable. The fix is to trigger a task switch and mark the exiting
task as "Dying" to be suspened and exited properly from the scheduler.

* Posix: Assert and stop if the Task function returned

* Posix: just assert if a task returned from its main function

Co-authored-by: alfred gedeon <alfred2g@hotmail.com>
2020-10-05 18:06:51 -07:00
Reda Maher baeb5af9a4
Posix: Free the allocated memory after deleting a task or ending the scheduler (#181)
* Posix: Free Idle task resources after ending the scheduler

In case of using Posix simulator and ending the scheduler, it does
not free the resources allocated by the idle task. This
causes the memory checkers (Valgrind, Address Sanitizers, ..) to
complain.

* Posix: Free the condition variable memory in the correct place

In case of deleting a task from another task, the deletion happens
immediately and the thread is canceled but the memory allocated by
the task condition variable is not freed. This causes the memory
checkers (Valgrind, Address sanitizers, ..) to complain.

* Posix: End Timer thread and free its resources after ending the scheduler
2020-09-29 14:06:10 -07:00
Gaurav-Aggarwal-AWS 2225bb5620
Fix Stack alignment for Microchip PIC32MX port (#182)
* Fix Stack alignment for Microchip PIC32MX port

The stack of a task was not 8 byte aligned. Adding one more unused space
at the beginning of task stack (before simulated context) ensures that
the stack is 8 byte aligned. The stack (with simulated context) of a
newly created task looks like the following:

                    +------------+
                    | UNUSED     |
                    +------------+
                    | UNUSED     |
                    +------------+
                    | 0xDEADBEEF |
                    +------------+
                    | 0x12345678 |
                ^   +------------+
                |   | CAUSE      | <-- SP After Context Restore
                |   +------------+
                |   | STATUS     |
                |   +------------+
                |   | EPC        |
                |   +------------+
                |   | ra         |
                |   +------------+
                |   | s8         |
                |   +------------+
                |   | t9         |
                |   +------------+
                |   | t8         |
                |   +------------+
                |   | t7         |
                |   +------------+
                |   | t6         |
                |   +------------+
                |   | t5         |
                |   +------------+
                |   | t4         |
                |   +------------+
                |   | t3         |
                |   +------------+
                |   | t2         |
                |   +------------+
                |   | t1         |
                |   +------------+
    Context     |   | t0         |
  (132 bytes)   |   +------------+
                |   | a3         |
                |   +------------+
                |   | a2         |
                |   +------------+
                |   | a1         |
                |   +------------+
                |   | a0         |
                |   +------------+
                |   | v1         |
                |   +------------+
                |   | v0         |
                |   +------------+
                |   | s7         |
                |   +------------+
                |   | s6         |
                |   +------------+
                |   | s5         |
                |   +------------+
                |   | s4         |
                |   +------------+
                |   | s3         |
                |   +------------+
                |   | s2         |
                |   +------------+
                |   | s1         |
                |   +------------+
                |   | s0         |
                |   +------------+
                |   | at         |
                |   +------------+
                |   | HI         |
                |   +------------+
                |   | LO         |
                |   +------------+
                V   |            |
                    +------------+
                    |            | <-- SP After Context Save
                    +------------+

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Update comment

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-09-28 00:16:18 -07:00
NoMaY (a user of Japan.RenesasRulz.com) c3117b4237
Maintenance: Add readme.txt in each Renesas RX folder to show recommended port (#152)
* Maintenance: Add readme.txt in each Renesas RX folder to show recomended port
* Update readme.txt in each Renesas RX folder regarding to Notes *1 and *2 (both are RX100 port)
2020-09-28 00:09:49 -07:00
alfred gedeon d428209d01
Fix some broken/redirected URL (#172)
* Style: fix some broken/redirect links

* Fix: atmel url

* Fix microchip typo

* Fix url links

* Fix shortcut link

* Comment: fix line wrapping

* Style: fix line wrapping to 80 chars

* Add now microchip beside Atmel

* Fix link in History

* Add Now Microchip before Atmel link

* Comment: add *
2020-09-21 15:49:55 -07:00
Cobus van Eeden 385e700953
Update History.txt and fix versioning in asm files (#177) 2020-09-18 08:05:13 -07:00
David Chalco 3604527e3b
Update version number to 10.4.1 (#173) 2020-09-17 15:25:15 -07:00
NoMaY (a user of Japan.RenesasRulz.com) 242808132c
Fix broken #warning message in ARM_CMx_MPU/portmacro.h between 10.3.1 and 10.4.0 (#171) 2020-09-15 01:55:55 -07:00
RichardBarry 85768bb3e0
Sets the version number to 10.4.0 in assembly files. The (#166)
assembly files were missed when the other source files had
their version numbers updated.
2020-09-14 09:49:46 -07:00
David Chalco 5dfab0306b
Update version number to 10.4.0 (#153) 2020-09-10 19:49:34 -07:00
alfred gedeon 16bc35c21c
Fix: Comment - xTaskIncrementTick loop - to adhere to demo requirement (#162)
Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
2020-09-10 14:36:34 -07:00
Joseph Julicher 2f14899ce8
Revert "RISC-V: Add RV32E / FPU support for GCC (#140)" (#163)
This reverts commit 0037a6c574.
2020-09-10 12:46:15 -07:00
Cobus van Eeden cfb51b3db8
Add url link for Linux Simulator documentation (#161) 2020-09-09 14:35:52 -07:00
Emmanuel Puerto 0037a6c574
RISC-V: Add RV32E / FPU support for GCC (#140)
* Change vPortSetupTimerInterrupt in order to have 64bits access on rv64

* Support RV32E - RISC-V architecture (GCC)

Signed-off-by: Emmanuel Puerto <emmanuel.puerto@sifive.com>

* Support FPU - RISC-V architecture (GCC)

Signed-off-by: Emmanuel Puerto <emmanuel.puerto@sifive.com>

* Fix interrupt managment and FPU initialization
2020-09-09 11:06:16 -07:00
sherryzhang 524e78d58b
Introduce Trusted Firmware M support in Kernel on ARM Cortex M33 (#108)
This port adds the support that FreeRTOS applications can call the secure
    services in Trusted Firmware M(TF-M) via PSA Platform Security
    Architecture(PSA) API based on Arm Cortex-M33 platform with GCC compiler.

    More information:
    PSA - https://www.arm.com/why-arm/architecture/platform-security-architecture
    TF-M - https://git.trustedfirmware.org/trusted-firmware-m.git/

Change-Id: I2e771b66e8d75927abc2505a187a16250d504db2
Signed-off-by: Sherry Zhang <sherry.zhang2@arm.com>
2020-09-09 08:15:50 -07:00
YuguoWH 651289ef04
Synopsys ARC v1 Port: add support to Synopsys ARC v1 series cores (#110)
* Synopsys Port: Adding support to Synopsys ARC v1 series cores
ARC v1 cores include ARC605, ARC610d, and ARC710d

Signed-off-by: Yuguo Zou <yuguo.zou@synopsys.com>

* Synopsys ARC v1 port: run uncrustify to fix code style

Signed-off-by: Yuguo Zou <yuguo.zou@synopsys.com>

* Synopsys port: modify license headers, change copyright only

Signed-off-by: Yuguo Zou <yuguo.zou@synopsys.com>
2020-09-08 08:40:17 -07:00
alfred gedeon 35f0b2ab84
Change the Linux Port to use condition variables instead of Signals (#156)
* Posix port with pthread cond instead of signals
* Comment: replace signal with pthread_cond
Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
2020-09-07 09:56:28 -07:00
Ming Yue 82fdc1c3ee
Change the header file name into lower case so it can work on GNU/Linux for MinGW cross-compiling. (#144) 2020-08-28 14:59:30 -07:00
alfred gedeon 148c81a7bc
Revert "Fix: Add Parenthesis around if-statement in macro (#138)" (#148)
This reverts commit 45e97bd246.
2020-08-28 14:19:31 -07:00
Ming Yue 58ffcb1a6d
Revert "Fix race condition when tracing is enabled (#95)" (#149)
This reverts commit 61635d5b8b.
2020-08-28 14:17:29 -07:00
Cobus van Eeden d7fd5a1195
Revert "Fix inaccurate ticks in windows port (#142)" (#143)
This reverts commit d85fd461d9.
2020-08-27 12:06:03 -07:00
Cobus van Eeden d85fd461d9
Fix inaccurate ticks in windows port (#142) 2020-08-27 10:12:51 -07:00
alfred gedeon 45e97bd246
Fix: Add Parenthesis around if-statement in macro (#138)
Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
2020-08-26 10:50:35 -07:00
Ravishankar Bhagavandas 1d8df4752e
Update Renesas GCC compiler ports (#135)
* Add RX200 GCC compiler

Signed-off-by: Dinh Van Nam <vannam.dinh.xt@renesas.com>

* Update GCC compiler for:
 * RX600v2
 * RX600
 * RX100

Signed-off-by: Dinh Van Nam <vannam.dinh.xt@renesas.com>

* Use configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H flag

* Use configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H flag RX100, RX200

Co-authored-by: Dinh Van Nam <vannam.dinh.xt@renesas.com>
2020-08-24 15:32:45 -07:00