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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : ButtonInterrupt.C
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Beantype : ExtInt
** Version : Bean 02.025, Driver 01.06, CPU db: 2.87.276
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 19/05/2005, 19:02
** Abstract :
** This bean "ExtInt" implements an external
** interrupt, its control methods and interrupt/event
** handling procedure.
** The bean uses one pin which generates interrupt on
** selected edge.
** Settings :
** Interrupt name : INT_PortP
** User handling procedure : ButtonInterrupt_OnInterrupt
**
** Used pin :
** ----------------------------------------------------
** Number (on package) | Name
** ----------------------------------------------------
** 4 | PP0_PWM0_KWP0
** ----------------------------------------------------
**
** Port name : P
**
** Bit number (in port) : 0
** Bit mask of the port : 1
**
** Signal edge/level : falling
** Priority : 1
** Pull option : up
** Initial state : Disabled
**
** Edge register : PPSP [605]
** Priority register : HPRIO [31]
** Enable register : PIEP [606]
** Request register : PIFP [607]
**
** Port data register : PTP [600]
** Port control register : DDRP [602]
** Contents :
** Enable - void ButtonInterrupt_Enable(void);
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
/* MODULE ButtonInterrupt. */
#include "ButtonInterrupt.h"
/*Including shared modules, which are used for all project*/
#include "PE_Types.h"
#include "PE_Error.h"
#include "PE_Const.h"
#include "IO_Map.h"
#include "PE_Timer.h"
#include "Events.h"
#include "Cpu.h"
/* Definition of DATA and CODE segments for this bean. User can specify where
these segments will be located on "Build options" tab of the selected CPU bean. */
#pragma DATA_SEG ButtonInterrupt_DATA /* Data section for this module. */
#pragma CODE_SEG ButtonInterrupt_CODE /* Code section for this module. */
/*
** ===================================================================
** Method : ButtonInterrupt_Enable (bean ExtInt)
**
** Description :
** Enable the bean - the external events are accepted.
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
void ButtonInterrupt_Enable(void)
{
PIFP = 1; /* Clear flag */
PIEP_PIEP0 = 1; /* Enable interrupt */
}
/*
** ===================================================================
** Method : ButtonInterrupt_Interrupt (bean ExtInt)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
#pragma CODE_SEG __NEAR_SEG NON_BANKED /* Interrupt section for this module. Placement will be in NON_BANKED area. */
__interrupt void ButtonInterrupt_Interrupt(void)
{
PIFP = 1; /* Clear flag */
ButtonInterrupt_OnInterrupt();
}
#pragma CODE_SEG ButtonInterrupt_CODE /* Code section for this module. */
/* END ButtonInterrupt. */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : ButtonInterrupt.H
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Beantype : ExtInt
** Version : Bean 02.025, Driver 01.06, CPU db: 2.87.276
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 19/05/2005, 19:02
** Abstract :
** This bean "ExtInt" implements an external
** interrupt, its control methods and interrupt/event
** handling procedure.
** The bean uses one pin which generates interrupt on
** selected edge.
** Settings :
** Interrupt name : INT_PortP
** User handling procedure : ButtonInterrupt_OnInterrupt
**
** Used pin :
** ----------------------------------------------------
** Number (on package) | Name
** ----------------------------------------------------
** 4 | PP0_PWM0_KWP0
** ----------------------------------------------------
**
** Port name : P
**
** Bit number (in port) : 0
** Bit mask of the port : 1
**
** Signal edge/level : falling
** Priority : 1
** Pull option : up
** Initial state : Disabled
**
** Edge register : PPSP [605]
** Priority register : HPRIO [31]
** Enable register : PIEP [606]
** Request register : PIFP [607]
**
** Port data register : PTP [600]
** Port control register : DDRP [602]
** Contents :
** Enable - void ButtonInterrupt_Enable(void);
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
#ifndef __ButtonInterrupt_H
#define __ButtonInterrupt_H
/* MODULE ButtonInterrupt. */
/*Including shared modules, which are used in the whole project*/
#include "PE_Types.h"
#include "PE_Error.h"
#include "PE_Const.h"
#include "IO_Map.h"
#include "PE_Timer.h"
#include "Events.h"
#include "Cpu.h"
#pragma CODE_SEG ButtonInterrupt_CODE /* Code section for this module. */
void ButtonInterrupt_Enable(void);
/*
** ===================================================================
** Method : ButtonInterrupt_Enable (bean ExtInt)
**
** Description :
** Enable the bean - the external events are accepted.
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
#pragma CODE_SEG __NEAR_SEG NON_BANKED /* Interrupt section for this module. Placement will be in NON_BANKED area. */
__interrupt void ButtonInterrupt_Interrupt(void);
#pragma CODE_SEG ButtonInterrupt_CODE /* Code section for this module. */
/*
** ===================================================================
** Method : ButtonInterrupt_Interrupt (bean ExtInt)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
#pragma CODE_SEG DEFAULT /* Change code section to DEFAULT. */
/* END ButtonInterrupt. */
#endif /* __ButtonInterrupt_H*/
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : Byte1.C
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Beantype : ByteIO
** Version : Bean 02.019, Driver 01.03, CPU db: 2.87.276
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 10/05/2005, 11:49
** Abstract :
** This bean "ByteIO" implements an one-byte input/output.
** It uses one 8-bit port.
** Note: This bean is set to work in Output direction only.
** Methods of this bean are mostly implemented as a macros
** (if supported by target langauage and compiler).
** Settings :
** Port name : B
**
** Initial direction : Output (direction cannot be changed)
** Initial output value : 0 = 000H
** Initial pull option : off
**
** 8-bit data register : PORTB [1]
** 8-bit control register : DDRB [3]
**
** ----------------------------------------------------
** Bit | Pin | Name
** ----------------------------------------------------
** 0 | 16 | PB0_ADDR0_DATA0
** 1 | 17 | PB1_ADDR1_DATA1
** 2 | 18 | PB2_ADDR2_DATA2
** 3 | 19 | PB3_ADDR3_DATA3
** 4 | 20 | PB4_ADDR4_DATA4
** 5 | 21 | PB5_ADDR5_DATA5
** 6 | 22 | PB6_ADDR6_DATA6
** 7 | 23 | PB7_ADDR7_DATA7
** ----------------------------------------------------
** Contents :
** PutBit - void Byte1_PutBit(byte Bit,bool Val);
** NegBit - void Byte1_NegBit(byte Bit);
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
/* MODULE Byte1. */
#include "Byte1.h"
/*Including shared modules, which are used for all project*/
#include "PE_Types.h"
#include "PE_Error.h"
#include "PE_Const.h"
#include "IO_Map.h"
#include "Cpu.h"
/* Definition of DATA and CODE segments for this bean. User can specify where
these segments will be located on "Build options" tab of the selected CPU bean. */
#pragma DATA_SEG Byte1_DATA /* Data section for this module. */
#pragma CODE_SEG Byte1_CODE /* Code section for this module. */
/*
** ===================================================================
** Method : Byte1_GetMsk (bean ByteIO)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
byte Byte1_Table[8]={ 1, 2, 4, 8, 16, 32, 64, 128 }; /* Table of mask constants */
byte Byte1_GetMsk(byte Value)
{
return((Value<8)?Byte1_Table[Value]:0); /* Return appropriate bit mask */
}
/*
** ===================================================================
** Method : Byte1_PutBit (bean ByteIO)
**
** Description :
** This method writes the new value to the specified bit
** of the output value.
** Parameters :
** NAME - DESCRIPTION
** Bitnum - Number of the bit (0 to 7)
** Val - New value of the bit (FALSE or TRUE)
** FALSE = "0" or "Low", TRUE = "1" or "High"
** Returns : Nothing
** ===================================================================
*/
void Byte1_PutBit(byte BitNum, byte Value)
{
byte Mask=Byte1_GetMsk(BitNum); /* Temporary variable - bit mask */
if (Mask) /* Is bit mask correct? */
if (Value) { /* Is it one to be written? */
PORTB |= Mask; /* Set appropriate bit on port */
}
else { /* Is it zero to be written? */
PORTB &= ~Mask; /* Clear appropriate bit on port */
}
}
/*
** ===================================================================
** Method : Byte1_NegBit (bean ByteIO)
**
** Description :
** This method negates (invertes) the specified bit of the
** output value.
** Parameters :
** NAME - DESCRIPTION
** Bit - Number of the bit to invert (0 to 7)
** Returns : Nothing
** ===================================================================
*/
void Byte1_NegBit(byte BitNum)
{
byte Mask=Byte1_GetMsk(BitNum); /* Temporary variable - bit mask */
if (Mask) { /* Is bit mask correct? */
PORTB ^= Mask; /* Negate appropriate bit on port */
}
}
/* END Byte1. */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : Byte1.H
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Beantype : ByteIO
** Version : Bean 02.019, Driver 01.03, CPU db: 2.87.276
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 10/05/2005, 11:49
** Abstract :
** This bean "ByteIO" implements an one-byte input/output.
** It uses one 8-bit port.
** Note: This bean is set to work in Output direction only.
** Methods of this bean are mostly implemented as a macros
** (if supported by target langauage and compiler).
** Settings :
** Port name : B
**
** Initial direction : Output (direction cannot be changed)
** Initial output value : 0 = 000H
** Initial pull option : off
**
** 8-bit data register : PORTB [1]
** 8-bit control register : DDRB [3]
**
** ----------------------------------------------------
** Bit | Pin | Name
** ----------------------------------------------------
** 0 | 16 | PB0_ADDR0_DATA0
** 1 | 17 | PB1_ADDR1_DATA1
** 2 | 18 | PB2_ADDR2_DATA2
** 3 | 19 | PB3_ADDR3_DATA3
** 4 | 20 | PB4_ADDR4_DATA4
** 5 | 21 | PB5_ADDR5_DATA5
** 6 | 22 | PB6_ADDR6_DATA6
** 7 | 23 | PB7_ADDR7_DATA7
** ----------------------------------------------------
** Contents :
** PutBit - void Byte1_PutBit(byte Bit,bool Val);
** NegBit - void Byte1_NegBit(byte Bit);
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
#ifndef __Byte1_H
#define __Byte1_H
/* MODULE Byte1. */
/*Including shared modules, which are used in the whole project*/
#include "PE_Types.h"
#include "PE_Error.h"
#include "PE_Const.h"
#include "IO_Map.h"
#include "Cpu.h"
#pragma CODE_SEG Byte1_CODE /* Code section for this module. */
/*
** ===================================================================
** Method : Byte1_PutBit (bean ByteIO)
**
** Description :
** This method writes the new value to the specified bit
** of the output value.
** Parameters :
** NAME - DESCRIPTION
** BitNum - Number of the bit (0 to 7)
** Val - New value of the bit (FALSE or TRUE)
** FALSE = "0" or "Low", TRUE = "1" or "High"
** Returns : Nothing
** ===================================================================
*/
void Byte1_PutBit(byte BitNum, byte Value);
/*
** ===================================================================
** Method : Byte1_NegBit (bean ByteIO)
**
** Description :
** This method negates (invertes) the specified bit of the
** output value.
** Parameters :
** NAME - DESCRIPTION
** BitNum - Number of the bit to invert (0 to 7)
** Returns : Nothing
** ===================================================================
*/
void Byte1_NegBit(byte BitNum);
#pragma CODE_SEG DEFAULT /* Change code section to DEFAULT. */
/* END Byte1. */
#endif /* __Byte1_H*/
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : Cpu.C
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Beantype : MC9S12C32_80
** Version : Bean 01.002, Driver 01.09, CPU db: 2.87.276
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 17/05/2005, 18:22
** Abstract :
** This bean "MC9S12C32_80" implements properties, methods,
** and events of the CPU.
** Settings :
**
** Contents :
** EnableInt - void Cpu_EnableInt(void);
** DisableInt - void Cpu_DisableInt(void);
** SetWaitMode - void Cpu_SetWaitMode(void);
** SetStopMode - void Cpu_SetStopMode(void);
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
#include "Cpu.h"
#include "Byte1.h"
#include "TickTimer.h"
#include "ButtonInterrupt.h"
extern void near _EntryPoint(void); /* Startup routine */
extern void near vPortTickInterrupt( void );
extern void near vPortYield( void );
extern void near vButtonPush( void );
typedef void (*near tIsrFunc)(void);
const tIsrFunc _vect[] @0xFF80 = { /* Interrupt table */
Cpu_Interrupt, /* 0 Default (unused) interrupt */
Cpu_Interrupt, /* 1 Default (unused) interrupt */
Cpu_Interrupt, /* 2 Default (unused) interrupt */
Cpu_Interrupt, /* 3 Default (unused) interrupt */
Cpu_Interrupt, /* 4 Default (unused) interrupt */
Cpu_Interrupt, /* 5 Default (unused) interrupt */
Cpu_Interrupt, /* 6 Default (unused) interrupt */
vButtonPush, /* 7 Default (unused) interrupt */
Cpu_Interrupt, /* 8 Default (unused) interrupt */
Cpu_Interrupt, /* 9 Default (unused) interrupt */
Cpu_Interrupt, /* 10 Default (unused) interrupt */
Cpu_Interrupt, /* 11 Default (unused) interrupt */
Cpu_Interrupt, /* 12 Default (unused) interrupt */
Cpu_Interrupt, /* 13 Default (unused) interrupt */
Cpu_Interrupt, /* 14 Default (unused) interrupt */
Cpu_Interrupt, /* 15 Default (unused) interrupt */
Cpu_Interrupt, /* 16 Default (unused) interrupt */
Cpu_Interrupt, /* 17 Default (unused) interrupt */
Cpu_Interrupt, /* 18 Default (unused) interrupt */
Cpu_Interrupt, /* 19 Default (unused) interrupt */
Cpu_Interrupt, /* 20 Default (unused) interrupt */
Cpu_Interrupt, /* 21 Default (unused) interrupt */
Cpu_Interrupt, /* 22 Default (unused) interrupt */
Cpu_Interrupt, /* 23 Default (unused) interrupt */
Cpu_Interrupt, /* 24 Default (unused) interrupt */
Cpu_Interrupt, /* 25 Default (unused) interrupt */
Cpu_Interrupt, /* 26 Default (unused) interrupt */
Cpu_Interrupt, /* 27 Default (unused) interrupt */
Cpu_Interrupt, /* 28 Default (unused) interrupt */
Cpu_Interrupt, /* 29 Default (unused) interrupt */
Cpu_Interrupt, /* 30 Default (unused) interrupt */
Cpu_Interrupt, /* 31 Default (unused) interrupt */
Cpu_Interrupt, /* 32 Default (unused) interrupt */
Cpu_Interrupt, /* 33 Default (unused) interrupt */
Cpu_Interrupt, /* 34 Default (unused) interrupt */
Cpu_Interrupt, /* 35 Default (unused) interrupt */
Cpu_Interrupt, /* 36 Default (unused) interrupt */
Cpu_Interrupt, /* 37 Default (unused) interrupt */
Cpu_Interrupt, /* 38 Default (unused) interrupt */
Cpu_Interrupt, /* 39 Default (unused) interrupt */
Cpu_Interrupt, /* 40 Default (unused) interrupt */
Cpu_Interrupt, /* 41 Default (unused) interrupt */
Cpu_Interrupt, /* 42 Default (unused) interrupt */
Cpu_Interrupt, /* 43 Default (unused) interrupt */
Cpu_Interrupt, /* 44 Default (unused) interrupt */
Cpu_Interrupt, /* 45 Default (unused) interrupt */
Cpu_Interrupt, /* 46 Default (unused) interrupt */
Cpu_Interrupt, /* 47 Default (unused) interrupt */
Cpu_Interrupt, /* 48 Default (unused) interrupt */
Cpu_Interrupt, /* 49 Default (unused) interrupt */
Cpu_Interrupt, /* 50 Default (unused) interrupt */
Cpu_Interrupt, /* 51 Default (unused) interrupt */
Cpu_Interrupt, /* 52 Default (unused) interrupt */
Cpu_Interrupt, /* 53 Default (unused) interrupt */
Cpu_Interrupt, /* 54 Default (unused) interrupt */
vPortTickInterrupt,
Cpu_Interrupt, /* 56 Default (unused) interrupt */
Cpu_Interrupt, /* 57 Default (unused) interrupt */
Cpu_Interrupt, /* 58 Default (unused) interrupt */
vPortYield, /* 59 Default (unused) interrupt */
Cpu_Interrupt, /* 60 Default (unused) interrupt */
Cpu_Interrupt, /* 61 Default (unused) interrupt */
Cpu_Interrupt, /* 62 Default (unused) interrupt */
_EntryPoint /* Reset vector */
};
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : Cpu.C
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Beantype : MC9S12C32_80
** Version : Bean 01.002, Driver 01.09, CPU db: 2.87.276
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 18/06/2005, 18:00
** Abstract :
** This bean "MC9S12C32_80" implements properties, methods,
** and events of the CPU.
** Settings :
**
** Contents :
** EnableInt - void Cpu_EnableInt(void);
** DisableInt - void Cpu_DisableInt(void);
** SetWaitMode - void Cpu_SetWaitMode(void);
** SetStopMode - void Cpu_SetStopMode(void);
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
/* MODULE Cpu. */
#include "Byte1.h"
#include "TickTimer.h"
#include "ButtonInterrupt.h"
#include "PE_Types.h"
#include "PE_Error.h"
#include "PE_Const.h"
#include "IO_Map.h"
#include "PE_Timer.h"
#include "Events.h"
#include "Cpu.h"
#define CGM_DELAY 3071UL
/* Global variables */
volatile byte CCR_reg; /* Current CCR reegister */
byte CpuMode = HIGH_SPEED; /* Current speed mode */
/*
** ===================================================================
** Method : Cpu_Interrupt (bean MC9S12C32_80)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
#pragma CODE_SEG __NEAR_SEG NON_BANKED /* Interrupt section for this module. Placement will be in NON_BANKED area. */
__interrupt void Cpu_Interrupt(void)
{
}
#pragma CODE_SEG DEFAULT /* Change code section to DEFAULT. */
/*
** ===================================================================
** Method : Cpu_DisableInt (bean MC9S12C32_80)
**
** Description :
** Disable maskable interrupts
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
/*
void Cpu_DisableInt(void)
** This method is implemented as macro in the header module. **
*/
/*
** ===================================================================
** Method : Cpu_EnableInt (bean MC9S12C32_80)
**
** Description :
** Enable maskable interrupts
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
/*
void Cpu_EnableInt(void)
** This method is implemented as macro in the header module. **
*/
/*
** ===================================================================
** Method : Cpu_SetStopMode (bean MC9S12C32_80)
**
** Description :
** Set low power mode - Stop mode. For more information
** about the stop mode see documentation of this CPU.
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
/*
void Cpu_SetStopMode(void)
** This method is implemented as macro in the header module. **
*/
/*
** ===================================================================
** Method : Cpu_SetWaitMode (bean MC9S12C32_80)
**
** Description :
** Set low power mode - Wait mode. For more information
** about the wait mode see documentation of this CPU.
** Release from Watch mode: Reset or interrupt
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
/*
void Cpu_SetWaitMode(void)
** This method is implemented as macro in the header module. **
*/
/*
** ===================================================================
** Method : _EntryPoint (bean MC9S12C32_80)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
extern void _Startup(void); /* Forward declaration of external startup function declared in file Start12.c */
#define INITRG_ADR 0x0011 /* Register map position register */
#pragma NO_FRAME
#pragma NO_EXIT
void _EntryPoint(void)
{
/*** ### MC9S12C32_80 "Cpu" init code ... ***/
/*** PE initialization code after reset ***/
/* Initialization of the registers INITRG, INITRM, INITEE is done to protect them to be written accidentally later by the application */
*(byte*)INITRG_ADR = 0; /* Set the register map position */
asm nop; /* nop instruction */
INITRM=8; /* Set the RAM map position */
/* MISC: ??=0,??=0,??=0,??=0,EXSTR1=0,EXSTR0=0,ROMHM=0,ROMON=1 */
MISC=1;
/* System clock initialization */
CLKSEL=0;
CLKSEL_PLLSEL = 0; /* Select clock source from XTAL */
PLLCTL_PLLON = 0; /* Disable the PLL */
SYNR = 23; /* Set the multiplier register */
REFDV = 15; /* Set the divider register */
PLLCTL = 192;
PLLCTL_PLLON = 1; /* Enable the PLL */
while(!CRGFLG_LOCK); /* Wait */
CLKSEL_PLLSEL = 1; /* Select clock source from PLL */
/*** End of PE initialization code after reset ***/
__asm jmp _Startup; /* Jump to C startup code */
}
/*
** ===================================================================
** Method : PE_low_level_init (bean MC9S12C32_80)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
void PE_low_level_init(void)
{
/* Common initialization of the CPU registers */
/* TSCR1: TEN=0,TSWAI=0,TSFRZ=1 */
output( TSCR1, input( TSCR1 ) & ~192 | 32 );
/* TCTL2: OM0=0,OL0=0 */
output( TCTL2, input( TCTL2 ) & ~3 );
/* TCTL1: OM7=0,OL7=0 */
output( TCTL1, input( TCTL1 ) & ~192 );
/* TIE: C0I=0 */
output( TIE, input( TIE ) & ~1 );
/* TTOV: TOV0=0 */
output( TTOV, input( TTOV ) & ~1 );
/* TSCR2: TOI=0,TCRE=1 */
output( TSCR2, input( TSCR2 ) & ~128 | 8 );
/* TIOS: IOS7=1,IOS0=1 */
output( TIOS, input( TIOS ) | 129 );
/* PPSP: PPSP0=0 */
output( PPSP, input( PPSP ) & ~1 );
/* PERP: PERP0=1 */
output( PERP, input( PERP ) | 1 );
/* DDRP: DDRP0=0 */
output( DDRP, input( DDRP ) & ~1 );
/* PWMCTL: PSWAI=0,PFRZ=0 */
output( PWMCTL, input( PWMCTL ) & ~12 );
/* PWMSDN: PWMIF=0,PWMIE=0,PWMRSTRT=0,PWMLVL=0,??=0,PWM7IN=0,PWM7INL=0,PWM7ENA=0 */
output( PWMSDN, 0 );
/* ### MC9S12C32_80 "Cpu" init code ... */
/* ### ByteIO "Byte1" init code ... */
PORTB = 0; /* Prepare value for output */
DDRB = 255; /* Set direction to output */
/* ### TimerInt "TickTimer" init code ... */
TickTimer_Init();
/* ### External interrupt "ButtonInterrupt" init code ... */
PIEP_PIEP0 = 0; /* Disable interrupt */
/* Common peripheral initialization - ENABLE */
/* TSCR1: TEN=1 */
output( TSCR1, input( TSCR1 ) | 128 );
INTCR_IRQEN = 0; /* Disable the IRQ interrupt. IRQ interrupt is enabled after CPU reset by default. */
__DI(); /* Disable interrupts */
}
/* END Cpu. */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : Cpu.H
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Beantype : MC9S12C32_80
** Version : Bean 01.002, Driver 01.09, CPU db: 2.87.276
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 17/05/2005, 08:36
** Abstract :
** This bean "MC9S12C32_80" implements properties, methods,
** and events of the CPU.
** Settings :
**
** Contents :
** EnableInt - void Cpu_EnableInt(void);
** DisableInt - void Cpu_DisableInt(void);
** SetWaitMode - void Cpu_SetWaitMode(void);
** SetStopMode - void Cpu_SetStopMode(void);
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
#ifndef __Cpu
#define __Cpu
/* Active configuration define symbol */
#define PEcfg_80pin 1
/*Include shared modules, which are used for whole project*/
#include "PE_Types.h"
#include "PE_Error.h"
#include "PE_Const.h"
#include "IO_Map.h"
#include "PE_Timer.h"
/* MODULE Cpu. */
/* Global variables */
extern volatile byte CCR_reg; /* Current CCR reegister */
extern byte CpuMode; /* Current speed mode */
#define Cpu_SetStopMode() __asm("STOP") /* Set STOP mode */
/*
** ===================================================================
** Method : Cpu_SetStopMode (bean MC9S12C32_80)
**
** Description :
** Set low power mode - Stop mode. For more information
** about the stop mode see documentation of this CPU.
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
#define Cpu_SetWaitMode() __asm("WAIT") /* Set WAIT mode */
/*
** ===================================================================
** Method : Cpu_SetWaitMode (bean MC9S12C32_80)
**
** Description :
** Set low power mode - Wait mode. For more information
** about the wait mode see documentation of this CPU.
** Release from Watch mode: Reset or interrupt
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
#define Cpu_DisableInt() __DI() /* Disable interrupts */
/*
** ===================================================================
** Method : Cpu_DisableInt (bean MC9S12C32_80)
**
** Description :
** Disable maskable interrupts
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
#define Cpu_EnableInt() __EI() /* Enable interrupts */
/*
** ===================================================================
** Method : Cpu_EnableInt (bean MC9S12C32_80)
**
** Description :
** Enable maskable interrupts
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
#pragma CODE_SEG __NEAR_SEG NON_BANKED /* Interrupt section for this module. Placement will be in NON_BANKED area. */
__interrupt void Cpu_Interrupt(void);
/*
** ===================================================================
** Method : Cpu_Interrupt (bean MC9S12C32_80)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
#pragma CODE_SEG DEFAULT /* Change code section to DEFAULT. */
void PE_low_level_init(void);
/*
** ===================================================================
** Method : PE_low_level_init (bean MC9S12C32_80)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
/* END Cpu. */
#endif /* ifndef __Cpu */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** Filename : Events.C
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Beantype : Events
** Version : Driver 01.01
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 17/05/2005, 08:36
** Abstract :
** This is user's event module.
** Put your event handler code here.
** Settings :
** Contents :
** vTaskTickInterrupt - void vTaskTickInterrupt(void);
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
/* MODULE Events */
/*Including used modules for compilling procedure*/
#include "Cpu.h"
#include "Events.h"
#include "Byte1.h"
#include "TickTimer.h"
#include "ButtonInterrupt.h"
/*Include shared modules, which are used for whole project*/
#include "PE_Types.h"
#include "PE_Error.h"
#include "PE_Const.h"
#include "IO_Map.h"
#include "PE_Timer.h"
/*
** ===================================================================
** Event : vTaskTickInterrupt (module Events)
**
** From bean : TickTimer [TimerInt]
** Description :
** When a timer interrupt occurs this event is called (only
** when the bean is enabled - "Enable" and the events are
** enabled - "EnableEvent").
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
void vTaskTickInterrupt(void)
{
/* Write your code here ... */
}
/*
** ===================================================================
** Event : ButtonInterrupt_OnInterrupt (module Events)
**
** From bean : ButtonInterrupt [ExtInt]
** Description :
** This event is called when the active signal edge/level
** occurs.
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
void ButtonInterrupt_OnInterrupt(void)
{
/* place your ButtonInterrupt interrupt procedure body here */
}
/* END Events */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** Filename : Events.H
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Beantype : Events
** Version : Driver 01.01
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 17/05/2005, 08:36
** Abstract :
** This is user's event module.
** Put your event handler code here.
** Settings :
** Contents :
** vTaskTickInterrupt - void vTaskTickInterrupt(void);
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
#ifndef __Events_H
#define __Events_H
/* MODULE Events */
#include "PE_Types.h"
#include "PE_Error.h"
#include "PE_Const.h"
#include "IO_Map.h"
#include "PE_Timer.h"
void vTaskTickInterrupt(void);
/*
** ===================================================================
** Event : vTaskTickInterrupt (module Events)
**
** From bean : TickTimer [TimerInt]
** Description :
** When a timer interrupt occurs this event is called (only
** when the bean is enabled - "Enable" and the events are
** enabled - "EnableEvent").
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
void ButtonInterrupt_OnInterrupt(void);
/*
** ===================================================================
** Event : ButtonInterrupt_OnInterrupt (module Events)
**
** From bean : ButtonInterrupt [ExtInt]
** Description :
** This event is called when the active signal edge/level
** occurs.
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
/* END Events */
#endif /* __Events_H*/
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : IO_Map.C
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Beantype : IO_Map
** Version : Driver 01.01
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 10/05/2005, 11:11
** Abstract :
** This bean "IO_Map" implements an IO devices mapping.
** Settings :
**
** Contents :
** No public methods
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
/* Based on CPU DB MC9S12C32_80, version 2.87.264 */
#include "PE_types.h"
#include "IO_Map.h"
volatile ARMCOPSTR _ARMCOP; /* CRG COP Timer Arm/Reset Register */
volatile ATDDIENSTR _ATDDIEN; /* ATD Input Enable Mask Register */
volatile ATDSTAT0STR _ATDSTAT0; /* A/D Status Register 0 */
volatile ATDSTAT1STR _ATDSTAT1; /* A/D Status Register 1 */
volatile BDMCCRSTR _BDMCCR; /* BDM CCR Holding Register */
volatile BDMINRSTR _BDMINR; /* BDM Internal Register Position Register */
volatile BDMSTSSTR _BDMSTS; /* BDM Status Register */
volatile BKP0HSTR _BKP0H; /* First Address High Byte Breakpoint Register */
volatile BKP0LSTR _BKP0L; /* First Address Low Byte Breakpoint Register */
volatile BKP0XSTR _BKP0X; /* First Address Memory Expansion Breakpoint Register */
volatile BKP1HSTR _BKP1H; /* Data (Second Address) High Byte Breakpoint Register */
volatile BKP1LSTR _BKP1L; /* Data (Second Address) Low Byte Breakpoint Register */
volatile BKP1XSTR _BKP1X; /* Second Address Memory Expansion Breakpoint Register */
volatile BKPCT0STR _BKPCT0; /* Breakpoint Control Register 0 */
volatile BKPCT1STR _BKPCT1; /* Breakpoint Control Register 1 */
volatile CANBTR0STR _CANBTR0; /* MSCAN Bus Timing Register 0 */
volatile CANBTR1STR _CANBTR1; /* MSCAN Bus Timing Register 1 */
volatile CANCTL0STR _CANCTL0; /* MSCAN Control 0 Register */
volatile CANCTL1STR _CANCTL1; /* MSCAN Control 1 Register */
volatile CANIDACSTR _CANIDAC; /* MSCAN Identifier Acceptance Control Register */
volatile CANIDAR0STR _CANIDAR0; /* MSCAN Identifier Acceptance Register 0 */
volatile CANIDAR1STR _CANIDAR1; /* MSCAN Identifier Acceptance Register 1 */
volatile CANIDAR2STR _CANIDAR2; /* MSCAN Identifier Acceptance Register 2 */
volatile CANIDAR3STR _CANIDAR3; /* MSCAN Identifier Acceptance Register 3 */
volatile CANIDAR4STR _CANIDAR4; /* MSCAN Identifier Acceptance Register 4 */
volatile CANIDAR5STR _CANIDAR5; /* MSCAN Identifier Acceptance Register 5 */
volatile CANIDAR6STR _CANIDAR6; /* MSCAN Identifier Acceptance Register 6 */
volatile CANIDAR7STR _CANIDAR7; /* MSCAN Identifier Acceptance Register 7 */
volatile CANIDMR0STR _CANIDMR0; /* MSCAN Identifier Mask Register 0 */
volatile CANIDMR1STR _CANIDMR1; /* MSCAN Identifier Mask Register 1 */
volatile CANIDMR2STR _CANIDMR2; /* MSCAN Identifier Mask Register 2 */
volatile CANIDMR3STR _CANIDMR3; /* MSCAN Identifier Mask Register 3 */
volatile CANIDMR4STR _CANIDMR4; /* MSCAN Identifier Mask Register 4 */
volatile CANIDMR5STR _CANIDMR5; /* MSCAN Identifier Mask Register 5 */
volatile CANIDMR6STR _CANIDMR6; /* MSCAN Identifier Mask Register 6 */
volatile CANIDMR7STR _CANIDMR7; /* MSCAN Identifier Mask Register 7 */
volatile CANRFLGSTR _CANRFLG; /* MSCAN Receiver Flag Register */
volatile CANRIERSTR _CANRIER; /* MSCAN Receiver Interrupt Enable Register */
volatile CANRXDLRSTR _CANRXDLR; /* MSCAN Receive Data Length Register */
volatile CANRXDSR0STR _CANRXDSR0; /* MSCAN Receive Data Segment Register 0 */
volatile CANRXDSR1STR _CANRXDSR1; /* MSCAN Receive Data Segment Register 1 */
volatile CANRXDSR2STR _CANRXDSR2; /* MSCAN Receive Data Segment Register 2 */
volatile CANRXDSR3STR _CANRXDSR3; /* MSCAN Receive Data Segment Register 3 */
volatile CANRXDSR4STR _CANRXDSR4; /* MSCAN Receive Data Segment Register 4 */
volatile CANRXDSR5STR _CANRXDSR5; /* MSCAN Receive Data Segment Register 5 */
volatile CANRXDSR6STR _CANRXDSR6; /* MSCAN Receive Data Segment Register 6 */
volatile CANRXDSR7STR _CANRXDSR7; /* MSCAN Receive Data Segment Register 7 */
volatile CANRXERRSTR _CANRXERR; /* MSCAN Receive Error Counter Register */
volatile CANRXIDR0STR _CANRXIDR0; /* MSCAN Receive Identifier Register 0 */
volatile CANRXIDR1STR _CANRXIDR1; /* MSCAN Receive Identifier Register 1 */
volatile CANRXIDR2STR _CANRXIDR2; /* MSCAN Receive Identifier Register 2 */
volatile CANRXIDR3STR _CANRXIDR3; /* MSCAN Receive Identifier Register 3 */
volatile CANTAAKSTR _CANTAAK; /* MSCAN Transmitter Message Abort Control */
volatile CANTARQSTR _CANTARQ; /* MSCAN Transmitter Message Abort Request */
volatile CANTBSELSTR _CANTBSEL; /* MSCAN Transmit Buffer Selection */
volatile CANTFLGSTR _CANTFLG; /* MSCAN Transmitter Flag Register */
volatile CANTIERSTR _CANTIER; /* MSCAN Transmitter Interrupt Enable Register */
volatile CANTXDLRSTR _CANTXDLR; /* MSCAN Transmit Data Length Register */
volatile CANTXDSR0STR _CANTXDSR0; /* MSCAN Transmit Data Segment Register 0 */
volatile CANTXDSR1STR _CANTXDSR1; /* MSCAN Transmit Data Segment Register 1 */
volatile CANTXDSR2STR _CANTXDSR2; /* MSCAN Transmit Data Segment Register 2 */
volatile CANTXDSR3STR _CANTXDSR3; /* MSCAN Transmit Data Segment Register 3 */
volatile CANTXDSR4STR _CANTXDSR4; /* MSCAN Transmit Data Segment Register 4 */
volatile CANTXDSR5STR _CANTXDSR5; /* MSCAN Transmit Data Segment Register 5 */
volatile CANTXDSR6STR _CANTXDSR6; /* MSCAN Transmit Data Segment Register 6 */
volatile CANTXDSR7STR _CANTXDSR7; /* MSCAN Transmit Data Segment Register 7 */
volatile CANTXERRSTR _CANTXERR; /* MSCAN Transmit Error Counter Register */
volatile CANTXIDR0STR _CANTXIDR0; /* MSCAN Transmit Identifier Register 0 */
volatile CANTXIDR1STR _CANTXIDR1; /* MSCAN Transmit Identifier Register 1 */
volatile CANTXIDR2STR _CANTXIDR2; /* MSCAN Transmit Identifier Register 2 */
volatile CANTXIDR3STR _CANTXIDR3; /* MSCAN Transmit Identifier Register 3 */
volatile CANTXTBPRSTR _CANTXTBPR; /* MSCAN Transmit Buffer Priority */
volatile CFORCSTR _CFORC; /* Timer Compare Force Register */
volatile CLKSELSTR _CLKSEL; /* CRG Clock Select Register */
volatile COPCTLSTR _COPCTL; /* CRG COP Control Register */
volatile CRGFLGSTR _CRGFLG; /* CRG Flags Register */
volatile CRGINTSTR _CRGINT; /* CRG Interrupt Enable Register */
volatile CTCTLSTR _CTCTL; /* CRG Test Control Register */
volatile CTFLGSTR _CTFLG; /* CRG Test Flags Register */
volatile DDRADSTR _DDRAD; /* Port AD Data Direction Register */
volatile DDRESTR _DDRE; /* Port E Data Direction Register */
volatile DDRJSTR _DDRJ; /* Port J Data Direction Register */
volatile DDRKSTR _DDRK; /* Port K Data Direction Register */
volatile DDRMSTR _DDRM; /* Port M Data Direction Register */
volatile DDRPSTR _DDRP; /* Port P Data Direction Register */
volatile DDRSSTR _DDRS; /* Port S Data Direction Register */
volatile DDRTSTR _DDRT; /* Port T Data Direction Register */
volatile EBICTLSTR _EBICTL; /* External Bus Interface Control */
volatile FCLKDIVSTR _FCLKDIV; /* Flash Clock Divider Register */
volatile FCMDSTR _FCMD; /* Flash Command Buffer and Register */
volatile FCNFGSTR _FCNFG; /* Flash Configuration Register */
volatile FPROTSTR _FPROT; /* Flash Protection Register */
volatile FSECSTR _FSEC; /* Flash Security Register */
volatile FSTATSTR _FSTAT; /* Flash Status Register */
volatile HPRIOSTR _HPRIO; /* Highest Priority I Interrupt */
volatile INITEESTR _INITEE; /* Initialization of Internal EEPROM Position Register */
volatile INITRGSTR _INITRG; /* Initialization of Internal Register Position Register */
volatile INITRMSTR _INITRM; /* Initialization of Internal RAM Position Register */
volatile INTCRSTR _INTCR; /* Interrupt Control Register */
volatile ITCRSTR _ITCR; /* Interrupt Test Control Register */
volatile ITESTSTR _ITEST; /* Interrupt Test Register */
volatile MEMSIZ0STR _MEMSIZ0; /* Memory Size Register Zero */
volatile MEMSIZ1STR _MEMSIZ1; /* Memory Size Register One */
volatile MISCSTR _MISC; /* Miscellaneous Mapping Control Register */
volatile MODESTR _MODE; /* Mode Register */
volatile MODRRSTR _MODRR; /* Module Routing Register */
volatile MTST0STR _MTST0; /* MTST0 */
volatile MTST1STR _MTST1; /* MTST1 */
volatile OC7DSTR _OC7D; /* Output Compare 7 Data Register */
volatile OC7MSTR _OC7M; /* Output Compare 7 Mask Register */
volatile PACTLSTR _PACTL; /* 16-Bit Pulse Accumulator A Control Register */
volatile PAFLGSTR _PAFLG; /* Pulse Accumulator A Flag Register */
volatile PARTIDHSTR _PARTIDH; /* Part ID Register High */
volatile PARTIDLSTR _PARTIDL; /* Part ID Register Low */
volatile PEARSTR _PEAR; /* Port E Assignment Register */
volatile PERADSTR _PERAD; /* Port AD Pull Device Enable Register */
volatile PERJSTR _PERJ; /* Port J Pull Device Enable Register */
volatile PERMSTR _PERM; /* Port M Pull Device Enable Register */
volatile PERPSTR _PERP; /* Port P Pull Device Enable Register */
volatile PERSSTR _PERS; /* Port S Pull Device Enable Register */
volatile PERTSTR _PERT; /* Port T Pull Device Enable Register */
volatile PIEJSTR _PIEJ; /* Port J Interrupt Enable Register */
volatile PIEPSTR _PIEP; /* Port P Interrupt Enable Register */
volatile PIFJSTR _PIFJ; /* Port J Interrupt Flag Register */
volatile PIFPSTR _PIFP; /* Port P Interrupt Flag Register */
volatile PLLCTLSTR _PLLCTL; /* CRG PLL Control Register */
volatile PORTAD0STR _PORTAD0; /* Port AD0 Register */
volatile PORTESTR _PORTE; /* Port E Register */
volatile PORTKSTR _PORTK; /* Port K Data Register */
volatile PPAGESTR _PPAGE; /* Page Index Register */
volatile PPSADSTR _PPSAD; /* Port AD Polarity Select Register */
volatile PPSJSTR _PPSJ; /* PortJP Polarity Select Register */
volatile PPSMSTR _PPSM; /* Port M Polarity Select Register */
volatile PPSPSTR _PPSP; /* Port P Polarity Select Register */
volatile PPSSSTR _PPSS; /* Port S Polarity Select Register */
volatile PPSTSTR _PPST; /* Port T Polarity Select Register */
volatile PTADSTR _PTAD; /* Port AD I/O Register */
volatile PTIADSTR _PTIAD; /* Port AD Input Register */
volatile PTIJSTR _PTIJ; /* Port J Input Register */
volatile PTIMSTR _PTIM; /* Port M Input */
volatile PTIPSTR _PTIP; /* Port P Input */
volatile PTISSTR _PTIS; /* Port S Input */
volatile PTITSTR _PTIT; /* Port T Input */
volatile PTJSTR _PTJ; /* Port J I/O Register */
volatile PTMSTR _PTM; /* Port M I/O Register */
volatile PTPSTR _PTP; /* Port P I/O Register */
volatile PTSSTR _PTS; /* Port S I/O Register */
volatile PTTSTR _PTT; /* Port T I/O Register */
volatile PUCRSTR _PUCR; /* Pull-Up Control Register */
volatile PWMCAESTR _PWMCAE; /* PWM Center Align Enable Register */
volatile PWMCLKSTR _PWMCLK; /* PWM Clock Select Register */
volatile PWMCTLSTR _PWMCTL; /* PWM Control Register */
volatile PWMESTR _PWME; /* PWM Enable Register */
volatile PWMPOLSTR _PWMPOL; /* PWM Polarity Register */
volatile PWMPRCLKSTR _PWMPRCLK; /* PWM Prescale Clock Select Register */
volatile PWMSCLASTR _PWMSCLA; /* PWM Scale A Register */
volatile PWMSCLBSTR _PWMSCLB; /* PWM Scale B Register */
volatile PWMSDNSTR _PWMSDN; /* PWM Shutdown Register */
volatile RDRADSTR _RDRAD; /* Port AD Reduced Drive Register */
volatile RDRIVSTR _RDRIV; /* Reduced Drive of I/O Lines */
volatile RDRJSTR _RDRJ; /* Port J Reduced Drive Register */
volatile RDRMSTR _RDRM; /* Port M Reduced Drive Register */
volatile RDRPSTR _RDRP; /* Port P Reduced Drive Register */
volatile RDRSSTR _RDRS; /* Port S Reduced Drive Register */
volatile RDRTSTR _RDRT; /* Port T Reduced Drive Register */
volatile REFDVSTR _REFDV; /* CRG Reference Divider Register */
volatile RTICTLSTR _RTICTL; /* CRG RTI Control Register */
volatile SCICR1STR _SCICR1; /* SCI Control Register 1 */
volatile SCICR2STR _SCICR2; /* SCI Control Register 2 */
volatile SCIDRHSTR _SCIDRH; /* SCI Data Register High */
volatile SCIDRLSTR _SCIDRL; /* SCI Data Register Low */
volatile SCISR1STR _SCISR1; /* SCI Status Register 1 */
volatile SCISR2STR _SCISR2; /* SCI Status Register 2 */
volatile SPIBRSTR _SPIBR; /* SPI Baud Rate Register */
volatile SPICR1STR _SPICR1; /* SPI Control Register */
volatile SPICR2STR _SPICR2; /* SPI Control Register 2 */
volatile SPIDRSTR _SPIDR; /* SPI Data Register */
volatile SPISRSTR _SPISR; /* SPI Status Register */
volatile SYNRSTR _SYNR; /* CRG Synthesizer Register */
volatile TCTL1STR _TCTL1; /* Timer Control Register 1 */
volatile TCTL2STR _TCTL2; /* Timer Control Register 2 */
volatile TCTL3STR _TCTL3; /* Timer Control Register 3 */
volatile TCTL4STR _TCTL4; /* Timer Control Register 4 */
volatile TFLG1STR _TFLG1; /* Main Timer Interrupt Flag 1 */
volatile TFLG2STR _TFLG2; /* Main Timer Interrupt Flag 2 */
volatile TIESTR _TIE; /* Timer Interrupt Enable Register */
volatile TIOSSTR _TIOS; /* Timer Input Capture/Output Compare Select */
volatile TSCR1STR _TSCR1; /* Timer System Control Register1 */
volatile TSCR2STR _TSCR2; /* Timer System Control Register 2 */
volatile TTOVSTR _TTOV; /* Timer Toggle On Overflow Register */
volatile WOMMSTR _WOMM; /* Port M Wired-Or Mode Register */
volatile WOMSSTR _WOMS; /* Port S Wired-Or Mode Register */
volatile ATDCTL23STR _ATDCTL23; /* ATD Control Register 23 */
volatile ATDCTL45STR _ATDCTL45; /* ATD Control Register 45 */
volatile ATDDR0STR _ATDDR0; /* A/D Conversion Result Register 0 */
volatile ATDDR1STR _ATDDR1; /* A/D Conversion Result Register 1 */
volatile ATDDR2STR _ATDDR2; /* A/D Conversion Result Register 2 */
volatile ATDDR3STR _ATDDR3; /* A/D Conversion Result Register 3 */
volatile ATDDR4STR _ATDDR4; /* A/D Conversion Result Register 4 */
volatile ATDDR5STR _ATDDR5; /* A/D Conversion Result Register 5 */
volatile ATDDR6STR _ATDDR6; /* A/D Conversion Result Register 6 */
volatile ATDDR7STR _ATDDR7; /* A/D Conversion Result Register 7 */
volatile DDRABSTR _DDRAB; /* Port AB Data Direction Register */
volatile PACNTSTR _PACNT; /* Pulse Accumulators Count Register */
volatile PORTABSTR _PORTAB; /* Port AB Register */
volatile PWMCNT01STR _PWMCNT01; /* PWM Channel Counter 01 Register */
volatile PWMCNT23STR _PWMCNT23; /* PWM Channel Counter 23 Register */
volatile PWMCNT45STR _PWMCNT45; /* PWM Channel Counter 45 Register */
volatile PWMDTY01STR _PWMDTY01; /* PWM Channel Duty 01 Register */
volatile PWMDTY23STR _PWMDTY23; /* PWM Channel Duty 23 Register */
volatile PWMDTY45STR _PWMDTY45; /* PWM Channel Duty 45 Register */
volatile PWMPER01STR _PWMPER01; /* PWM Channel Period 01 Register */
volatile PWMPER23STR _PWMPER23; /* PWM Channel Period 23 Register */
volatile PWMPER45STR _PWMPER45; /* PWM Channel Period 45 Register */
volatile SCIBDSTR _SCIBD; /* SCI Baud Rate Register */
volatile TC0STR _TC0; /* Timer Input Capture/Output Compare Register 0 */
volatile TC1STR _TC1; /* Timer Input Capture/Output Compare Register 1 */
volatile TC2STR _TC2; /* Timer Input Capture/Output Compare Register 2 */
volatile TC3STR _TC3; /* Timer Input Capture/Output Compare Register 3 */
volatile TC4STR _TC4; /* Timer Input Capture/Output Compare Register 4 */
volatile TC5STR _TC5; /* Timer Input Capture/Output Compare Register 5 */
volatile TC6STR _TC6; /* Timer Input Capture/Output Compare Register 6 */
volatile TC7STR _TC7; /* Timer Input Capture/Output Compare Register 7 */
volatile TCNTSTR _TCNT; /* Timer Count Register */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/* ================================================================================================================================= **
** ================================================================================================================================= **
** CONFIGURATION FILE FOR PESL LIBRARY **
** ================================================================================================================================= **
** ================================================================================================================================= */
#define _MC9S12A128_112 1
#define _MC9S12A128_80 2
#define _MC9S12A256_112 3
#define _MC9S12A256_80 4
#define _MC9S12A64_112 5
#define _MC9S12A64_80 6
#define _MC9S12C32_48 7
#define _MC9S12C32_52 8
#define _MC9S12C32_80 9
#define _MC9S12D64_112 10
#define _MC9S12D64_80 11
#define _MC9S12DB128_112 12
#define _MC9S12DG128_112 13
#define _MC9S12DG128_80 14
#define _MC9S12DG256_112 15
#define _MC9S12DJ128_112 16
#define _MC9S12DJ128_80 17
#define _MC9S12DJ256_112 18
#define _MC9S12DJ256_80 19
#define _MC9S12DJ64_112 20
#define _MC9S12DJ64_80 21
#define _MC9S12DP256_112 22
#define _MC9S12DT128_112 23
#define _MC9S12DT256_112 24
#define _MC9S12A32_80 25
#define _MC9S12D32_80 26
#define _MC9S12DP512_112 27
#define _MC9S12A512_112 28
#define _MC9S12E128_112 29
#define _MC9S12E128_80 30
#define _MC9S12E64_112 31
/* Selected target MCU */
#define CPUtype _MC9S12C32_80
/* PESL library */
#pragma MESSAGE DISABLE C4000 /* WARNING C4000: Condition is always TRUE */
#pragma MESSAGE DISABLE C4001 /* WARNING C4001: Condition is always FALSE */
#include "PESLlib.h"

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : PE_Const.H
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Beantype : PE_Const
** Version : Driver 01.00
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 10/05/2005, 11:11
** Abstract :
** This bean "PE_Const" contains internal definitions
** of the constants.
** Settings :
** Contents :
** No public methods
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
#ifndef __PE_Const_H
#define __PE_Const_H
/* Constants for detecting running mode */
#define HIGH_SPEED 0 /* High speed */
#define LOW_SPEED 1 /* Low speed */
#define SLOW_SPEED 2 /* Slow speed */
/* Reset cause constants */
#define RSTSRC_POR 1 /* Power-on reset */
#define RSTSRC_PIN 8 /* External reset bit */
#define RSTSRC_COP 4 /* COP reset */
#define RSTSRC_ILOP 2 /* Illegal opcode reset */
#define RSTSRC_ILAD 16 /* Illegal address reset */
#define RSTSRC_LVI 32 /* Low voltage inhibit reset */
#endif /* _PE_Const_H */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : PE_Error.H
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Beantype : PE_Error
** Version : Driver 01.00
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 10/05/2005, 11:11
** Abstract :
** This bean "PE_Error" contains internal definitions
** of the error constants.
** Settings :
** Contents :
** No public methods
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
#ifndef __PE_Error_H
#define __PE_Error_H
#define ERR_OK 0 /* OK */
#define ERR_SPEED 1 /* This device does not work in the active speed mode. */
#define ERR_RANGE 2 /* Parameter out of range. */
#define ERR_VALUE 3 /* Parameter of incorrect value. */
#define ERR_OVERFLOW 4 /* Timer overflow. */
#define ERR_MATH 5 /* Overflow during evaluation. */
#define ERR_ENABLED 6 /* Device is enabled. */
#define ERR_DISABLED 7 /* Device is disabled. */
#define ERR_BUSY 8 /* Device is busy. */
#define ERR_NOTAVAIL 9 /* Requested value or method not available. */
#define ERR_RXEMPTY 10 /* No data in receiver. */
#define ERR_TXFULL 11 /* Transmitter is full. */
#define ERR_BUSOFF 12 /* Bus not available. */
#define ERR_OVERRUN 13 /* Overrun error is detected. */
#define ERR_FRAMING 14 /* Framing error is detected. */
#define ERR_PARITY 15 /* Parity error is detected. */
#define ERR_NOISE 16 /* Noise error is detected. */
#define ERR_IDLE 17 /* Idle error is detectes. */
#define ERR_FAULT 18 /* Fault error is detected. */
#define ERR_BREAK 19 /* Break char is received during communication. */
#define ERR_CRC 20 /* CRC error is detected. */
#define ERR_ARBITR 21 /* A node losts arbitration. This error occurs if two nodes start transmission at the same time. */
#define ERR_PROTECT 22 /* Protection error is detected. */
#endif __PE_Error_H

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : PE_Timer.C
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Beantype : PE_Timer
** Version : Driver 01.00
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 17/05/2005, 08:44
** Abstract :
** This bean "PE_Timer" implements internal methods and definitions
** used by beans working with timers.
** Settings :
** Contents :
** No public methods
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
/* MODULE PE_Timer. */
#include "PE_Timer.h"
/*
** ===================================================================
** Method : PE_Timer_LngHi1 (bean PE_Timer)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
bool PE_Timer_LngHi1(dword High, dword Low, word *Out)
{
if ((High == 0) && ((Low >> 24) == 0))
if ((Low & 0x80) != 0) {
if ((Low >> 8) < 0xFFFF) {
*Out = ((unsigned int)(Low >> 8))+1;
return FALSE;
}
}
else {
*Out = (unsigned int)(Low >> 8);
return FALSE;
}
*Out = (unsigned int)(Low >> 8);
return TRUE;
}
/* END PE_Timer. */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : PE_Timer.H
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Beantype : PE_Timer
** Version : Driver 01.00
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 17/05/2005, 08:44
** Abstract :
** This bean "PE_Timer" implements internal methods and definitions
** used by beans working with timers.
** Settings :
** Contents :
** No public methods
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
#ifndef __PE_Timer
#define __PE_Timer
/*Include shared modules, which are used for whole project*/
#include "PE_types.h"
#include "PE_const.h"
/* MODULE PE_Timer. */
bool PE_Timer_LngHi1(dword Low, dword High, word *Out);
/*
** ===================================================================
** Method : PE_Timer_LngHi1 (bean PE_Timer)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
#endif /* END PE_Timer. */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : PE_Types.H
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Beantype : PE_Types
** Version : Driver 01.04
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 10/05/2005, 11:11
** Abstract :
** This bean "PE_Types" contains internal definitions
** of the types.
** Settings :
** Contents :
** No public methods
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
#ifndef __PE_Types_H
#define __PE_Types_H
#define FALSE 0
#define TRUE 1
/*Types definition*/
typedef unsigned char bool;
typedef unsigned char byte;
typedef unsigned int word;
typedef unsigned long dword;
typedef unsigned long dlong[2];
typedef void (*tIntFunc)(void);
/* Motorola types */
typedef unsigned char VUINT8;
typedef signed char VINT8;
typedef unsigned short int VUINT16;
typedef signed short int VINT16;
typedef unsigned long int VUINT32;
#define in16(var,l,h) var = ((word)(l)) | (((word)(h)) << 8)
#define out16(l,h,val) { l = (byte)val; h = (byte)(val >> 8); }
#define output(P, V) P = (V)
#define input(P) (P)
#define __DI() { asm sei; } /* Disable global interrupts */
#define __EI() { asm cli; } /* Enable global interrupts */
#define EnterCritical() { __asm pshc; __asm sei; __asm movb 1,SP+,CCR_reg; } /* This macro is used by Processor Expert. It saves CCR register and disable global interrupts. */
#define ExitCritical() { __asm movb CCR_reg, 1,-SP; __asm pulc; } /* This macro is used by Processor Expert. It restores CCR register saved in SaveStatusReg(). */
/* obsolete definition for backward compatibility */
#define SaveStatusReg() EnterCritical()
#define RestoreStatusReg() ExitCritical()
typedef struct { /* Black&White Image */
word width; /* Image width */
word height; /* Image height */
byte *pixmap; /* Image pixel bitmap */
word size; /* Image size */
char *name; /* Image name */
} TIMAGE;
typedef TIMAGE* PIMAGE ; /* Pointer to image */
/* 16-bit register (Motorola format - big endian) */
typedef union {
word w;
struct {
byte high,low;
} b;
} TWREG;
#endif /* __PE_Types_H */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** Filename : RTOSDemo.C
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Version : Driver 01.05
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 10/05/2005, 11:11
** Abstract :
** Main module.
** Here is to be placed user's code.
** Settings :
** Contents :
** No public methods
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
/* MODULE RTOSDemo */
/* Including used modules for compilling procedure */
#include "Cpu.h"
#include "Events.h"
#include "Byte1.h"
#include "TickTimer.h"
#include "ButtonInterrupt.h"
/* Include shared modules, which are used for whole project */
#include "PE_Types.h"
#include "PE_Error.h"
#include "PE_Const.h"
#include "IO_Map.h"
extern void vMain( void );
void main(void)
{
/*** Processor Expert internal initialization. DON'T REMOVE THIS CODE!!! ***/
PE_low_level_init();
/*** End of Processor Expert internal initialization. ***/
/*Write your code here*/
/* Just jump to the real main(). */
__asm
{
jmp vMain
}
/*** Processor Expert end of main routine. DON'T MODIFY THIS CODE!!! ***/
for(;;);
/*** Processor Expert end of main routine. DON'T WRITE CODE BELOW!!! ***/
} /*** End of main routine. DO NOT MODIFY THIS TEXT!!! ***/
/* END RTOSDemo */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/*
** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : RTOSDemo.PRM
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 18/06/2005, 18:00
** Abstract :
** This file is used by the linker. It describes files to be linked,
** memory ranges, stack size, etc. For detailed description of the PRM file
** see CodeWarrior documentation. This file is generated by default.
** You can switch off generation by setting the property
** "Generate PRM file = no" on the "Build options" tab in CPU bean and then modify
** this file if needed.
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################
*/
NAMES
END
SECTIONS
/* List of all sections specified on the "Build options" tab */
RAM = READ_WRITE 0x00000800 TO 0x00000FFF;
ROM_C000 = READ_ONLY 0x0000C000 TO 0x0000FF7F;
ROM_4000 = READ_ONLY 0x00004000 TO 0x00007FFF;
END
PLACEMENT
DEFAULT_RAM INTO RAM;
_PRESTART, STARTUP,
ROM_VAR, STRINGS,
NON_BANKED, DEFAULT_ROM, COPY INTO ROM_C000, ROM_4000;
END
INIT _EntryPoint /* The entry point of the application. This function is generated into the CPU module. */
STACKSIZE 0x0030 /* Size of the system stack. Value can be changed on the "Build options" tab */

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : TickTimer.C
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Beantype : TimerInt
** Version : Bean 02.063, Driver 01.05, CPU db: 2.87.276
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 18/06/2005, 17:53
** Abstract :
** This bean "TimerInt" implements a periodic interrupt.
** When the bean and its events are enabled, the "OnInterrupt"
** event is called periodically with the period that you specify.
** TimerInt supports also changing the period in runtime.
** The source of periodic interrupt can be timer compare or reload
** register or timer-overflow interrupt (of free running counter).
** Settings :
** Timer name : TIM (16-bit)
** Compare name : TC0
** Counter shared : No
**
** High-speed CPU mode
** Prescaler : divide-by-4
** Clock : 5999000 Hz
** Initial period/frequency
** Xtal ticks : 16000
** microseconds : 1000
** milliseconds : 1
** seconds (real) : 0.0010000
** Hz : 1000
** kHz : 1
**
** Runtime setting : period/frequency interval (continual setting)
** ticks : 16000 to 160000 ticks
** microseconds : 1000 to 10000 microseconds
** milliseconds : 1 to 10 milliseconds
** seconds (real) : 0.0010000 to 0.0100000 seconds
** Hz : 100 to 1000 Hz
**
** Initialization:
** Timer : Disabled
** Events : Enabled
**
** Timer registers
** Counter : TCNT [68]
** Mode : TIOS [64]
** Run : TSCR1 [70]
** Prescaler : TSCR2 [77]
**
** Compare registers
** Compare : TC0 [80]
**
** Flip-flop registers
** Mode : TCTL2 [73]
** Contents :
** Enable - byte TickTimer_Enable(void);
** SetFreqHz - byte TickTimer_SetFreqHz(word Freq);
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
/* MODULE TickTimer. */
#include "Events.h"
#include "TickTimer.h"
/* Definition of DATA and CODE segments for this bean. User can specify where
these segments will be located on "Build options" tab of the selected CPU bean. */
#pragma DATA_SEG TickTimer_DATA /* Data section for this module. */
#pragma CODE_SEG TickTimer_CODE /* Code section for this module. */
static bool EnUser; /* Enable/Disable device by user */
static word CmpHighVal; /* Compare register value for high speed CPU mode */
/*
** ===================================================================
** Method : SetCV (bean TimerInt)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
static void SetCV(word Val)
{
if (Val == 0) /* If the given value is zero */
Val = 65535; /* then change it to the maximal one */
TC0 = Val; /* Store given value to the compare register */
TC7 = Val; /* Store given value to the modulo register */
}
/*
** ===================================================================
** Method : SetPV (bean TimerInt)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
static void SetPV(byte Val)
{
TSCR2_PR = Val; /* Store given value to the prescaler */
}
/*
** ===================================================================
** Method : HWEnDi (bean TimerInt)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
static void HWEnDi(void)
{
if (EnUser) { /* Enable device? */
TFLG1 = 1; /* Reset interrupt request flag */
TIE_C0I = 1; /* Enable interrupt */
}
else { /* Disable device? */
TIE_C0I = 0; /* Disable interrupt */
}
}
/*
** ===================================================================
** Method : TickTimer_Enable (bean TimerInt)
**
** Description :
** Enable the bean - it starts the timer. Events may be
** generated ("DisableEvent"/"EnableEvent").
** Parameters : None
** Returns :
** --- - Error code, possible codes:
** ERR_OK - OK
** ERR_SPEED - This device does not work in
** the active speed mode
** ===================================================================
*/
byte TickTimer_Enable(void)
{
if (!EnUser) { /* Is the device disabled by user? */
EnUser = TRUE; /* If yes then set the flag "device enabled" */
HWEnDi(); /* Enable the device */
}
return ERR_OK; /* OK */
}
/*
** ===================================================================
** Method : TickTimer_SetFreqHz (bean TimerInt)
**
** Description :
** This method sets the new frequency of the generated
** events. The frequency is expressed in Hz as a 16-bit
** unsigned integer number.
** This method is available only if runtime setting type
** 'from interval' is selected in the Timing dialog box in
** Runtime setting area.
** Parameters :
** NAME - DESCRIPTION
** Freq - Frequency to set [in Hz]
** (100 to 1000 Hz)
** Returns :
** --- - Error code, possible codes:
** ERR_OK - OK
** ERR_SPEED - This device does not work in
** the active speed mode
** ERR_MATH - Overflow during evaluation
** ERR_RANGE - Parameter out of range
** ===================================================================
*/
byte TickTimer_SetFreqHz(word Freq)
{
dlong rtval; /* Result of two 32-bit numbers division */
word rtword; /* Result of 64-bit number division */
if ((Freq > 1000) || (Freq < 100)) /* Is the given value out of range? */
return ERR_RANGE; /* If yes then error */
rtval[1] = 1535744000 / (dword)Freq; /* Divide high speed CPU mode coefficient by the given value */
rtval[0] = 0; /* Convert result to the type dlong */
if (PE_Timer_LngHi1(rtval[0],rtval[1],&rtword)) /* Is the result greater or equal than 65536 ? */
rtword = 65535; /* If yes then use maximal possible value */
CmpHighVal = rtword; /* Store result (compare register value for high speed CPU mode) to the variable CmpHighVal */
SetCV(CmpHighVal); /* Store appropriate value to the compare register according to the selected high speed CPU mode */
return ERR_OK; /* OK */
}
/*
** ===================================================================
** Method : TickTimer_Init (bean TimerInt)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
void TickTimer_Init(void)
{
CmpHighVal = 5999; /* Compare register value for high speed CPU mode */
EnUser = FALSE; /* Disable device */
SetCV(CmpHighVal); /* Store appropriate value to the compare register according to the selected high speed CPU mode */
SetPV(2); /* Set prescaler register according to the selected high speed CPU mode */
HWEnDi(); /* Enable/disable device according to status flags */
}
/*
** ===================================================================
** Method : TickTimer_Interrupt (bean TimerInt)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
#pragma CODE_SEG __NEAR_SEG NON_BANKED /* Interrupt section for this module. Placement will be in NON_BANKED area. */
__interrupt void TickTimer_Interrupt(void)
{
TFLG1 = 1; /* Reset interrupt request flag */
vTaskTickInterrupt(); /* Invoke user event */
}
#pragma CODE_SEG TickTimer_CODE /* Code section for this module. */
/* END TickTimer. */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : TickTimer.H
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Beantype : TimerInt
** Version : Bean 02.063, Driver 01.05, CPU db: 2.87.276
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 18/06/2005, 17:53
** Abstract :
** This bean "TimerInt" implements a periodic interrupt.
** When the bean and its events are enabled, the "OnInterrupt"
** event is called periodically with the period that you specify.
** TimerInt supports also changing the period in runtime.
** The source of periodic interrupt can be timer compare or reload
** register or timer-overflow interrupt (of free running counter).
** Settings :
** Timer name : TIM (16-bit)
** Compare name : TC0
** Counter shared : No
**
** High-speed CPU mode
** Prescaler : divide-by-4
** Clock : 5999000 Hz
** Initial period/frequency
** Xtal ticks : 16000
** microseconds : 1000
** milliseconds : 1
** seconds (real) : 0.0010000
** Hz : 1000
** kHz : 1
**
** Runtime setting : period/frequency interval (continual setting)
** ticks : 16000 to 160000 ticks
** microseconds : 1000 to 10000 microseconds
** milliseconds : 1 to 10 milliseconds
** seconds (real) : 0.0010000 to 0.0100000 seconds
** Hz : 100 to 1000 Hz
**
** Initialization:
** Timer : Disabled
** Events : Enabled
**
** Timer registers
** Counter : TCNT [68]
** Mode : TIOS [64]
** Run : TSCR1 [70]
** Prescaler : TSCR2 [77]
**
** Compare registers
** Compare : TC0 [80]
**
** Flip-flop registers
** Mode : TCTL2 [73]
** Contents :
** Enable - byte TickTimer_Enable(void);
** SetFreqHz - byte TickTimer_SetFreqHz(word Freq);
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
#ifndef __TickTimer
#define __TickTimer
/* MODULE TickTimer. */
#include "Cpu.h"
#pragma CODE_SEG TickTimer_CODE /* Code section for this module. */
#define TickTimer_SFHzMin 100 /* Lower bound of interval for method SetFreqHz */
#define TickTimer_SFHzMax 1000 /* Upper bound of interval for method SetFreqHz */
byte TickTimer_Enable(void);
/*
** ===================================================================
** Method : TickTimer_Enable (bean TimerInt)
**
** Description :
** Enable the bean - it starts the timer. Events may be
** generated ("DisableEvent"/"EnableEvent").
** Parameters : None
** Returns :
** --- - Error code, possible codes:
** ERR_OK - OK
** ERR_SPEED - This device does not work in
** the active speed mode
** ===================================================================
*/
byte TickTimer_SetFreqHz(word Freq);
/*
** ===================================================================
** Method : TickTimer_SetFreqHz (bean TimerInt)
**
** Description :
** This method sets the new frequency of the generated
** events. The frequency is expressed in Hz as a 16-bit
** unsigned integer number.
** This method is available only if runtime setting type
** 'from interval' is selected in the Timing dialog box in
** Runtime setting area.
** Parameters :
** NAME - DESCRIPTION
** Freq - Frequency to set [in Hz]
** (100 to 1000 Hz)
** Returns :
** --- - Error code, possible codes:
** ERR_OK - OK
** ERR_SPEED - This device does not work in
** the active speed mode
** ERR_MATH - Overflow during evaluation
** ERR_RANGE - Parameter out of range
** ===================================================================
*/
#pragma CODE_SEG __NEAR_SEG NON_BANKED /* Interrupt section for this module. Placement will be in NON_BANKED area. */
__interrupt void TickTimer_Interrupt(void);
#pragma CODE_SEG TickTimer_CODE /* Code section for this module. */
/*
** ===================================================================
** Method : TickTimer_Interrupt (bean TimerInt)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
void TickTimer_Init(void);
/*
** ===================================================================
** Method : TickTimer_Init (bean TimerInt)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
#pragma CODE_SEG DEFAULT /* Change code section to DEFAULT. */
/* END TickTimer. */
#endif /* ifndef __TickTimer */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : Cpu.C
** Project : RTOSDemo
** Processor : MC9S12C32CFU
** Beantype : MC9S12C32_80
** Version : Bean 01.002, Driver 01.09, CPU db: 2.87.276
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 17/05/2005, 18:22
** Abstract :
** This bean "MC9S12C32_80" implements properties, methods,
** and events of the CPU.
** Settings :
**
** Contents :
** EnableInt - void Cpu_EnableInt(void);
** DisableInt - void Cpu_DisableInt(void);
** SetWaitMode - void Cpu_SetWaitMode(void);
** SetStopMode - void Cpu_SetStopMode(void);
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
#include "Cpu.h"
#include "Byte1.h"
#include "TickTimer.h"
#include "ButtonInterrupt.h"
extern void near _EntryPoint(void); /* Startup routine */
extern void near vPortTickInterrupt( void );
extern void near vPortYield( void );
extern void near vButtonPush( void );
typedef void (*near tIsrFunc)(void);
const tIsrFunc _vect[] @0xFF80 = { /* Interrupt table */
Cpu_Interrupt, /* 0 Default (unused) interrupt */
Cpu_Interrupt, /* 1 Default (unused) interrupt */
Cpu_Interrupt, /* 2 Default (unused) interrupt */
Cpu_Interrupt, /* 3 Default (unused) interrupt */
Cpu_Interrupt, /* 4 Default (unused) interrupt */
Cpu_Interrupt, /* 5 Default (unused) interrupt */
Cpu_Interrupt, /* 6 Default (unused) interrupt */
vButtonPush, /* 7 Default (unused) interrupt */
Cpu_Interrupt, /* 8 Default (unused) interrupt */
Cpu_Interrupt, /* 9 Default (unused) interrupt */
Cpu_Interrupt, /* 10 Default (unused) interrupt */
Cpu_Interrupt, /* 11 Default (unused) interrupt */
Cpu_Interrupt, /* 12 Default (unused) interrupt */
Cpu_Interrupt, /* 13 Default (unused) interrupt */
Cpu_Interrupt, /* 14 Default (unused) interrupt */
Cpu_Interrupt, /* 15 Default (unused) interrupt */
Cpu_Interrupt, /* 16 Default (unused) interrupt */
Cpu_Interrupt, /* 17 Default (unused) interrupt */
Cpu_Interrupt, /* 18 Default (unused) interrupt */
Cpu_Interrupt, /* 19 Default (unused) interrupt */
Cpu_Interrupt, /* 20 Default (unused) interrupt */
Cpu_Interrupt, /* 21 Default (unused) interrupt */
Cpu_Interrupt, /* 22 Default (unused) interrupt */
Cpu_Interrupt, /* 23 Default (unused) interrupt */
Cpu_Interrupt, /* 24 Default (unused) interrupt */
Cpu_Interrupt, /* 25 Default (unused) interrupt */
Cpu_Interrupt, /* 26 Default (unused) interrupt */
Cpu_Interrupt, /* 27 Default (unused) interrupt */
Cpu_Interrupt, /* 28 Default (unused) interrupt */
Cpu_Interrupt, /* 29 Default (unused) interrupt */
Cpu_Interrupt, /* 30 Default (unused) interrupt */
Cpu_Interrupt, /* 31 Default (unused) interrupt */
Cpu_Interrupt, /* 32 Default (unused) interrupt */
Cpu_Interrupt, /* 33 Default (unused) interrupt */
Cpu_Interrupt, /* 34 Default (unused) interrupt */
Cpu_Interrupt, /* 35 Default (unused) interrupt */
Cpu_Interrupt, /* 36 Default (unused) interrupt */
Cpu_Interrupt, /* 37 Default (unused) interrupt */
Cpu_Interrupt, /* 38 Default (unused) interrupt */
Cpu_Interrupt, /* 39 Default (unused) interrupt */
Cpu_Interrupt, /* 40 Default (unused) interrupt */
Cpu_Interrupt, /* 41 Default (unused) interrupt */
Cpu_Interrupt, /* 42 Default (unused) interrupt */
Cpu_Interrupt, /* 43 Default (unused) interrupt */
Cpu_Interrupt, /* 44 Default (unused) interrupt */
Cpu_Interrupt, /* 45 Default (unused) interrupt */
Cpu_Interrupt, /* 46 Default (unused) interrupt */
Cpu_Interrupt, /* 47 Default (unused) interrupt */
Cpu_Interrupt, /* 48 Default (unused) interrupt */
Cpu_Interrupt, /* 49 Default (unused) interrupt */
Cpu_Interrupt, /* 50 Default (unused) interrupt */
Cpu_Interrupt, /* 51 Default (unused) interrupt */
Cpu_Interrupt, /* 52 Default (unused) interrupt */
Cpu_Interrupt, /* 53 Default (unused) interrupt */
Cpu_Interrupt, /* 54 Default (unused) interrupt */
vPortTickInterrupt,
Cpu_Interrupt, /* 56 Default (unused) interrupt */
Cpu_Interrupt, /* 57 Default (unused) interrupt */
Cpu_Interrupt, /* 58 Default (unused) interrupt */
vPortYield, /* 59 Default (unused) interrupt */
Cpu_Interrupt, /* 60 Default (unused) interrupt */
Cpu_Interrupt, /* 61 Default (unused) interrupt */
Cpu_Interrupt, /* 62 Default (unused) interrupt */
_EntryPoint /* Reset vector */
};
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

20
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OPEN source 0 0 60 39
Source < attributes MARKS off
OPEN assembly 60 0 40 31
Assembly < attributes ADR on,CODE off,ABSADR on,SYMB off,TOPPC 0xF88C
OPEN procedure 0 39 60 17
Procedure < attributes VALUES on,TYPES off
OPEN register 60 31 40 25
Register < attributes FORMAT AUTO,COMPLEMENT None
OPEN memory 60 56 40 22
Memory < attributes FORMAT hex,COMPLEMENT None,WORD 1,ASC on,ADR on,ADDRESS 0x80
OPEN data 0 56 60 22
Data:1 < attributes SCOPE global,COMPLEMENT None,FORMAT Symb,MODE automatic,UPDATERATE 10,NAMEWIDTH 16
OPEN data 0 78 60 22
Data:2 < attributes SCOPE local,COMPLEMENT None,FORMAT Symb,MODE automatic,UPDATERATE 10,NAMEWIDTH 16
OPEN command 60 78 40 22
Command < attributes CACHESIZE 1000
bckcolor 50331647
font 'Courier New' 9 BLACK
AUTOSIZE on
ACTIVATE Data:2 Command Procedure Data:1 Source Register Assembly Memory

23
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=================================================================
This file was generated from Processor Expert 03.33
project "RTOSDemo", 18/06/2005, 18:00
-----------------------------------------------------------------
There is no signal defined in this project.
Hint: Signals may be defined in the Bean Inspector (advanced or expert view)
=================================================================
=================================================================
SIGNAL LIST
-----------------------------------------------------------------
SIGNAL NAME => PIN NAME
-----------------------------------------------------------------
=================================================================
=================================================================
PIN LIST
-----------------------------------------------------------------
PIN NAME => SIGNAL NAME
-----------------------------------------------------------------
=================================================================

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=============================================================================
List of methods in project: RTOSDemo
THIS TEXT DESCRIPTION IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
=============================================================================
Module "Byte1" (bean ByteIO)
Byte1_PutBit -Put the specified value to the specified bit/pin of the Input/Output bean. If direction is [input] saves the
value to a memory or a register, this value will be written to the pin after switching to the output mode -
using [SetDir(TRUE)]. If direction is [output] writes the value to the pin.
Byte1_NegBit -Negate (invert) the specified bit of the Input/Output bean. It is the same as [PutBit(Bit,!GetBit(Bit))].
Module "TickTimer" (bean TimerInt)
TickTimer_Enable -Enable the bean - it starts the timer. Events may be generated ("DisableEvent"/"EnableEvent").
TickTimer_SetFreqHz -This method sets the new frequency of the generated events. The frequency is expressed in [Hz] as a
16-bit unsigned integer number. This method is available only if runtime setting type 'from interval' is
selected in the <Timing dialog box> in Runtime setting area.
Module "ButtonInterrupt" (bean ExtInt)
ButtonInterrupt_Enable -Enable the bean - the external events are accepted.
Module "Cpu" (bean MC9S12C32_80)
Cpu_EnableInt -Enable maskable interrupts
Cpu_DisableInt -Disable maskable interrupts
Cpu_SetWaitMode -Set low power mode - Wait mode.
For more information about the wait mode see documentation of this CPU.
Release from Wait mode: Reset or interrupt
Cpu_SetStopMode -Set low power mode - Stop mode.
For more information about the stop mode see documentation of this CPU.
=============================================================================

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/*
FreeRTOS.org V4.7.1 - Copyright (C) 2003-2008 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
Please ensure to read the configuration and relevant port sections of the
online documentation.
+++ http://www.FreeRTOS.org +++
Documentation, latest information, license and contact details.
+++ http://www.SafeRTOS.com +++
A version that is certified for use in safety critical systems.
+++ http://www.OpenRTOS.com +++
Commercial support, development, porting, licensing and training services.
***************************************************************************
*/
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
#include <hidef.h> /* common defines and macros */
#include "TickTimer.h"
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
*----------------------------------------------------------*/
#define configUSE_PREEMPTION 1
#define configUSE_IDLE_HOOK 1
#define configUSE_TICK_HOOK 0
#define configTICK_RATE_HZ ( ( portTickType ) 1000 )
#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 4 )
#define configMINIMAL_STACK_SIZE ( ( unsigned portSHORT ) 70 )
#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 2048 - 256 ) )
#define configMAX_TASK_NAME_LEN ( 1 )
#define configUSE_TRACE_FACILITY 0
#define configUSE_16_BIT_TICKS 1
#define configIDLE_SHOULD_YIELD 1
/* Co-routine definitions. */
#define configUSE_CO_ROUTINES 0
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
/* This parameter is normally required in order to set the RTOS tick timer.
This port is a bit different in that hardware setup uses the code generated by
the Processor Expert, making this definition obsolete.
#define configCPU_CLOCK_HZ ( ( unsigned portLONG ) 24000000 )
*/
/* Set the following definitions to 1 to include the API function, or zero
to exclude the API function. */
#define INCLUDE_vTaskPrioritySet 1
#define INCLUDE_uxTaskPriorityGet 1
#define INCLUDE_vTaskDelete 0
#define INCLUDE_vTaskCleanUpResources 0
#define INCLUDE_vTaskSuspend 1
#define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelay 1
#endif /* FREERTOS_CONFIG_H */

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/*
FreeRTOS.org V4.7.1 - Copyright (C) 2003-2008 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
Please ensure to read the configuration and relevant port sections of the
online documentation.
+++ http://www.FreeRTOS.org +++
Documentation, latest information, license and contact details.
+++ http://www.SafeRTOS.com +++
A version that is certified for use in safety critical systems.
+++ http://www.OpenRTOS.com +++
Commercial support, development, porting, licensing and training services.
***************************************************************************
*/
/* Scheduler include files. */
#include "FreeRTOS.h"
#include "portable.h"
/* Processor Expert created headers. */
#include "byte1.h"
/* Demo application include files. */
#include "partest.h"
/*-----------------------------------------------------------
* Simple parallel port IO routines.
*-----------------------------------------------------------*/
void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )
{
/* This function is required as it is called from the standard demo
application files. All it does however is call the Processor Expert
created function. */
portENTER_CRITICAL();
Byte1_PutBit( uxLED, !xValue );
portEXIT_CRITICAL();
}
/*-----------------------------------------------------------*/
void vParTestToggleLED( unsigned portBASE_TYPE uxLED )
{
/* This function is required as it is called from the standard demo
application files. All it does however is call the processor Expert
created function. */
portENTER_CRITICAL();
Byte1_NegBit( uxLED );
portEXIT_CRITICAL();
}

368
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;Please do not modify this file!
;The file contains internal information about the Processor Expert project generation
[Options]
ProjectName=RTOSDemo
ProjectDirectory=E:\Dev\FreeRTOS\Demo\HCS12_CodeWarrior_small\
DestEventsDirectory=CODE\
DestDriversSubDirectory=
DestDocumentationDirectory=DOC\
DestCompiledFilesSubDirectory=
DestFpgaSubDirectory=
DestTemporaryDirectory=
[GenFiles]
LinkerFileGenerated=Yes
MakefileGenerated=No
GenSharedModules=5
Line=PE_Types
Line=PE_Error
Line=PE_Const
Line=IO_Map
Line=PE_Timer
ShrdHeaderAge0=850024804
ShrdCodeAge0=-1
ShrdAsemblAge0=-1
ShrdHeaderAge1=850024804
ShrdCodeAge1=-1
ShrdAsemblAge1=-1
ShrdHeaderAge2=850024804
ShrdCodeAge2=-1
ShrdAsemblAge2=-1
ShrdHeaderAge3=850024804
ShrdCodeAge3=850024804
ShrdAsemblAge3=-1
ShrdHeaderAge4=850478475
ShrdCodeAge4=850478475
ShrdAsemblAge4=-1
GenExtraFiles=2
Line=E:\Dev\FreeRTOS\Demo\HCS12_CodeWarrior_small\CODE\Vectors.c
Line=E:\Dev\FreeRTOS\Demo\HCS12_CodeWarrior_small\CODE\PESL.h
XtraAge0=852660312
XtraAge1=850024804
GenExtraFileType1=4
GenExtraFileType0=4
GenEventModules=1
Line=Events
GenMethodsInEvents=0
GenAllModules=10
Line=ButtonInterrupt
Line=Byte1
Line=Cpu
Line=Events
Line=IO_Map
Line=PE_Const
Line=PE_Error
Line=PE_Timer
Line=PE_Types
Line=TickTimer
GenExternModules=0
GenBeanModules=3
Line=ButtonInterrupt
Line=TickTimer
Line=Byte1
SignalListFile=E:\Dev\FreeRTOS\Demo\HCS12_CodeWarrior_small\DOC\RTOSDemo.sig
DestinationCompiler=MetrowerksHC12CC
ProjectModificationStamp=23
[18]
Generated=Yes
GenCompName=Cpu
GenEventModule=Events
HeaderAge=850478231
CodeAge=852660246
AsemblAge=-1
GenNumMethods=10
SetStopMode=Yes
SetWaitMode=Yes
DisableInt=Yes
EnableInt=Yes
GetIntVect=No
SetIntVect=No
GetSpeedMode=No
SetSlowSpeed=No
SetLowSpeed=No
SetHighSpeed=No
GenNumEvents=4
OnClockMonitorFail_Selected=1
OnClockMonitorFail_Name=Cpu_OnClockMonitorFail
OnClockMonitorFail_Priority=interrupts disabled
OnIllegalOpcode_Selected=1
OnIllegalOpcode_Name=Cpu_OnIllegalOpcode
OnIllegalOpcode_Priority=interrupts disabled
OnReset_Selected=1
OnReset_Name=Cpu_OnReset
OnReset_Priority=interrupts disabled
OnSwINT_Selected=1
OnSwINT_Name=Cpu_OnSwINT
OnSwINT_Priority=interrupts disabled
GenSmartUserChangesDetected_Header=No
GenSmartUserChangesDetected_Code=No
GenSmartUserChangesDetected_Asembl=No
[22]
Generated=Yes
GenCompName=Byte1
GenEventModule=Events
HeaderAge=850026034
CodeAge=850026034
AsemblAge=-1
GenNumMethods=9
NegBit=Yes
ClrBit=No
SetBit=No
PutBit=Yes
GetBit=No
PutVal=No
GetVal=No
SetDir=No
GetDir=No
GenNumEvents=0
GenSmartUserChangesDetected_Header=No
GenSmartUserChangesDetected_Code=No
GenSmartUserChangesDetected_Asembl=No
GenMethodPos=5
MethodPos0=PutBit
MethodType=method
ModuleType=Header
LineBeg=65
LineEnd=81
MethodPos1=NegBit
MethodType=method
ModuleType=Header
LineBeg=82
LineEnd=96
MethodPos2=GetMsk
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ModuleType=Code
LineBeg=67
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MethodPos3=PutBit
MethodType=method
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LineBeg=83
LineEnd=110
MethodPos4=NegBit
MethodType=method
ModuleType=Code
LineBeg=111
LineEnd=132
[25]
Generated=Yes
GenCompName=TickTimer
GenEventModule=Events
HeaderAge=852659892
CodeAge=852659892
AsemblAge=-1
GenNumMethods=14
SetFreqMHz=No
SetFreqkHz=No
SetFreqHz=Yes
SetPeriodReal=No
SetPeriodSec=No
SetPeriodMS=No
SetPeriodUS=No
SetPeriodTicks32=No
SetPeriodTicks16=No
SetPeriodMode=No
DisableEvent=No
EnableEvent=No
Disable=No
Enable=Yes
GenNumEvents=3
BeforeNewSpeed_Selected=1
BeforeNewSpeed_Name=TickTimer_BeforeNewSpeed
BeforeNewSpeed_Priority=interrupts disabled
AfterNewSpeed_Selected=1
AfterNewSpeed_Name=TickTimer_AfterNewSpeed
AfterNewSpeed_Priority=interrupts disabled
OnInterrupt_Selected=2
OnInterrupt_Name=vTaskTickInterrupt
OnInterrupt_Priority=same as interrupt
GenSmartUserChangesDetected_Header=No
GenSmartUserChangesDetected_Code=No
GenSmartUserChangesDetected_Asembl=No
GenMethodPos=11
MethodPos0=Enable
MethodType=method
ModuleType=Header
LineBeg=80
LineEnd=96
MethodPos1=SetFreqHz
MethodType=method
ModuleType=Header
LineBeg=97
LineEnd=122
MethodPos2=Interrupt
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ModuleType=Header
LineBeg=123
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MethodPos3=Init
MethodType=internal_method
ModuleType=Header
LineBeg=136
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MethodPos4=SetCV
MethodType=internal_method
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LineBeg=82
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MethodPos5=SetPV
MethodType=internal_method
ModuleType=Code
LineBeg=99
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MethodPos6=HWEnDi
MethodType=internal_method
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MethodPos7=Enable
MethodType=method
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MethodPos8=SetFreqHz
MethodType=method
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ModuleType=Code
LineBeg=197
LineEnd=214
MethodPos10=Interrupt
MethodType=internal_method
ModuleType=Code
LineBeg=215
LineEnd=231
[26]
Generated=Yes
GenCompName=ButtonInterrupt
GenEventModule=Events
HeaderAge=850630744
CodeAge=850630744
AsemblAge=-1
GenNumMethods=4
SetEdge=No
GetVal=No
Disable=No
Enable=Yes
GenNumEvents=1
OnInterrupt_Selected=2
OnInterrupt_Name=ButtonInterrupt_OnInterrupt
OnInterrupt_Priority=same as interrupt
GenSmartUserChangesDetected_Header=No
GenSmartUserChangesDetected_Code=No
GenSmartUserChangesDetected_Asembl=No
GenMethodPos=4
MethodPos0=Enable
MethodType=method
ModuleType=Header
LineBeg=71
LineEnd=82
MethodPos1=Interrupt
MethodType=internal_method
ModuleType=Header
LineBeg=83
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MethodType=method
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LineBeg=73
LineEnd=88
MethodPos3=Interrupt
MethodType=internal_method
ModuleType=Code
LineBeg=89
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[UsedSrcFiles]
SrcFile=Drivers\ByteIO.src=779379247
SrcFile=Drivers\HCS12\ByteIO.drv=786325143
SrcFile=Drivers\Common\Header.h=788035759
SrcFile=Drivers\Common\ByteIOAbstract.Inc=697533609
SrcFile=Drivers\Common\ByteIOSettings.Inc=662077581
SrcFile=Drivers\Common\UsedPins.inc=662077580
SrcFile=Drivers\HCS12\CreateCodeSection.prg=759717537
SrcFile=Drivers\Common\ByteIOPutBit.Inc=662077581
SrcFile=Drivers\Common\GeneralPutBit.inc=724263173
SrcFile=Drivers\Common\GeneralMethod.inc=711812818
SrcFile=Drivers\Common\GeneralParameters.inc=711813750
SrcFile=Drivers\Common\GeneralReturnNothing.inc=711816104
SrcFile=Drivers\Common\GeneralDamage.inc=711813453
SrcFile=Drivers\Common\ByteIONegBit.Inc=662077581
SrcFile=Drivers\Common\GeneralNegBit.inc=724263119
SrcFile=Drivers\Common\Header.End=710308512
SrcFile=Drivers\Common\Header.c=788035759
SrcFile=Drivers\HCS12\CreateDataSection.prg=759780817
SrcFile=Drivers\Common\GeneralInternal.Inc=724263004
SrcFile=Drivers\TimerInt.src=779379233
SrcFile=Drivers\HCS12\TimerInt.drv=790330280
SrcFile=Drivers\Common\TimerIntAbstract.Inc=697533454
SrcFile=Drivers\Common\TimerIntSettings.Inc=662077596
SrcFile=Drivers\Common\TimerIntEnable.Inc=724722488
SrcFile=Drivers\Common\GeneralParametersNone.inc=711813294
SrcFile=Drivers\Common\TimerIntSetFreqHz.Inc=724921137
SrcFile=Drivers\HCS12\CreateIntSection.prg=760697835
SrcFile=Drivers\Common\TimerIntInterrupt.Inc=662077583
SrcFile=Drivers\Common\TimerIntOnInterrupt.Inc=724722488
SrcFile=Drivers\Common\GeneralEvent.inc=711816218
SrcFile=Drivers\Common\GeneralInternalGlobal.Inc=724263104
SrcFile=Drivers\Common\InitReg8.prg=727217490
SrcFile=Drivers\Common\InitReg8Enable.prg=783766675
SrcFile=Drivers\ExtInt.src=779379242
SrcFile=Drivers\HCS12\ExternalInterrupt.drv=786325143
SrcFile=Drivers\Common\ExternalInterruptAbstract.Inc=697533660
SrcFile=Drivers\Common\ExternalInterruptSettings.Inc=662077582
SrcFile=Drivers\Common\UsedPin.inc=662077580
SrcFile=Drivers\Common\ExternalInterruptEnable.Inc=724459205
SrcFile=Drivers\Common\ExternalInterruptOnInterrupt.inc=724459205
SrcFile=Drivers\HCS12\PE_Types.drv=790261986
SrcFile=Drivers\Common\PE_TypesAbstract.Inc=662077595
SrcFile=Drivers\Common\PE_TypesSettings.Inc=662077595
SrcFile=Drivers\HCS12\PE_Error.drv=744839008
SrcFile=Drivers\Common\PE_ErrorAbstract.Inc=662077580
SrcFile=Drivers\Common\ErrorDefinitions.Inc=781282486
SrcFile=Drivers\HCS12\PE_Const.drv=744839020
SrcFile=Drivers\Common\PE_ConstAbstract.Inc=662077595
SrcFile=Drivers\Common\PE_ConstSettings.Inc=662077595
SrcFile=Drivers\HCS12\IO_Map.drv=790392555
SrcFile=Drivers\Common\IO_MapAbstract.Inc=662077601
SrcFile=Drivers\Common\IO_MapSettings.Inc=662077601
SrcFile=Drivers\HCS12\MC9S12C32_80h.prg=788297413
SrcFile=Drivers\HCS12\MC9S12C32_80c.prg=787968924
SrcFile=Drivers\HCS12\PE_Timer.drv=764054261
SrcFile=Drivers\Common\PE_TimerConstants.Inc=662077594
SrcFile=Drivers\Common\PE_TimerMethods.Inc=662077585
SrcFile=Drivers\Common\PE_TimerAbstract.Inc=662077594
SrcFile=Drivers\Common\PE_TimerSettings.Inc=662077581
SrcFile=Drivers\Common\PE_TimerLngHi1.Inc=662077594
SrcFile=Drivers\MC9S12C32_80.src=783110234
SrcFile=Drivers\HCS12\MC9S12.drv=788297552
SrcFile=Drivers\Common\MC9S12Abstract.Inc=786070990
SrcFile=Drivers\Common\MC9S12Settings.Inc=786070990
SrcFile=Drivers\Common\MC9S12SetStopMode.Inc=786070990
SrcFile=Drivers\Common\MC9S12SetWaitMode.Inc=786070990
SrcFile=Drivers\Common\MC9S12DisableInt.Inc=786070990
SrcFile=Drivers\Common\MC9S12EnableInt.Inc=786070990
SrcFile=Drivers\Common\GenReg8InitInfo.prg=754344225
SrcFile=Drivers\Common\GenReg8BitsInitInfo.prg=777356856
SrcFile=Drivers\Common\CommonInitialization.prg=760832797
SrcFile=Drivers\Common\CommonRegInitialization.prg=785882407
SrcFile=Drivers\Common\SetRegBits8.prg=775453568
SrcFile=Drivers\Common\SetReg8.prg=776374479
SrcFile=Drivers\Common\CommonEnabling.prg=783766630
SrcFile=Drivers\Common\CommonRegEnabling.prg=785882407
SrcFile=Drivers\HCS12\PESL.prg=790397020
SrcFile=Drivers\Event.src=779379228
SrcFile=Drivers\HCS12\Evnt.drv=763978411
SrcFile=Drivers\Common\EvntAbstract.Inc=662077596
SrcFile=Drivers\Common\EvntSettings.inc=662077580
SrcFile=Drivers\Common\Header.In1=710699431
SrcFile=Drivers\_PE_ProjectInfo.src=713322570
SrcFile=Drivers\SW\_PE_ProjectInfo.drv=726426382
[_end_]

166
20080212/Demo/HCS12_CodeWarrior_small/RTOSDemo.dsk Normal file
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[Version]
PE_DesktopFileVersion=819
[Desktop]
StartupPrj=E:\Dev\FreeRTOS\Demo\HCS12_CodeWarrior_small\RTOSDemo.pe
[PE_IDE_PlugIn]
[CpuExpert]
[AppPanel]
AllFocusedNode=Cpu:MC9S12C32CFU
ConfigurationsInAllExpanded=Yes
CPUsInAllExpanded=Yes
FPGAsInAllExpanded=No
OperatingSystemInAllExpanded=Yes
BeansInAllExpanded=Yes
TasksInAllExpanded=No
ProgramsInAllExpanded=No
DocumentationInAllExpanded=No
PESLInAllExpanded=No
PESL_moduleInAllExpanded=No
ViewEnabledItemsOnly=No
[CpuPanel]
Status=hiden
WindowState=NORMAL
Rect=[-568|282|617|532]
CpuPanViewMode=Default
[ErrorPanel]
Status=hiden
WindowState=NORMAL
Rect=[4|94|1608|1130]
[ResourceMeter]
Status=hiden
WindowState=NORMAL
Rect=[49|1168|617|178]
[BeanSelector]
Status=Visible
WindowState=NORMAL
Rect=[-4|62|1608|1130]
BF_ForTgtCpuOnly=Yes
BF_LicensedOnly=Yes
[ObjInspector]
Status=Visible
WindowState=MAXIMAL
Rect=[-4|62|1199|1100]
ColWidth01=263
ColWidth02=479
ColWidth11=188
ColWidth12=317
ColWidth21=180
ColWidth22=352
ColWidth31=255
ColWidth32=479
ColWidth41=133
ColWidth42=266
ViewItemLevel=2
[PrphInspector]
Status=hiden
WindowState=NORMAL
Rect=[-466|400|516|411]
ViewMode=PrphUsageReport
SortRegsByAddr=Yes
GroupRegisters=No
Peripheral=
[Editor]
Rect=[-4|0|1199|1100]
FontName=Courier New
FontSize=10
FontBold=No
FontItalic=No
FontScript=1
ToolBar=Yes
ToolBarPosition=top
SyntaxHighlighting=Yes
NoHorizScrollBar=Yes
ShowLineNumbers=No
PreserveCurPosDuringPaste=No
UseTabChar=No
ModulesInOneWindow=Yes
TabSize=8
HintDelay=2
OpenFilesCount=0
SelFile=
SelLine=-1
FileHistory=0
[CpuStructure]
Rect=[0|0|0|0]
[StrListEditor]
WindowWidth=450
WindowHeight=333
[Breakpoints]
WindowVisible=No
Rect=[0|0|0|0]
BreakLine1=0
BreakModule1=
[Watches]
Rect=[0|0|0|0]
WindowVisible=No
WatchCount=0
WatchHistoryCount=0
[Registers]
Rect=[0|0|100|500]
WindowVisible=No
[Dump]
WindowVisible=No
Rect=[0|0|0|0]
Address=0
DataSize=1
DataType=num
HistoryAddrCount=0
[InterruptVectors]
WindowVisible=No
Rect=[0|0|0|0]
[MemoryMap]
Rect=[422|156|355|480]
DisplayOnlyMemories=No
WindowVisible=No
[Browser]
Rect=[0|0|0|0]
WindowVisible=No
[BeanManager]
Rect=[0|0|0|0]
BeanInfoFilter=
DriverFilter=
DriverInfoFilter=
BeanSettingsProjectFilter=
[Options]
AutosaveWithProject=No
AutosaveBeforeTool=No
NumberOfBackupCopies=0
AutoSaveDesktop=Yes
AutoOpenPropEdit=Yes
AutoConnectDevice=Yes
SelectTemplate=No
ShowGenProgress=Yes
AutoShowGeneratedSrc=No
AutoShowEventModules=No
ShowMethodCode=No
GenerateUndo=No
CpuBitmapFileName=Config\PE\CPUbckgr.bmp
CpuBitmapTilled=No
ShowProducerLogo=No
AutoStartApplicationCode=No
ShowSourceLinAfterDbgInit=No
RestoreFilesAfterDebug=No
[_end_]

BIN
20080212/Demo/HCS12_CodeWarrior_small/RTOSDemo.mcp Normal file
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2387
20080212/Demo/HCS12_CodeWarrior_small/RTOSDemo.pe Normal file
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20080212/Demo/HCS12_CodeWarrior_small/RTOSDemo_Data/CWSettingsWindows.stg Normal file
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BIN
20080212/Demo/HCS12_CodeWarrior_small/RTOSDemo_Data/Simulator/TargetDataWindows.tdt Normal file
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20080212/Demo/HCS12_CodeWarrior_small/RTOSDemo_Data/SofTec/TargetDataWindows.tdt Normal file
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20080212/Demo/HCS12_CodeWarrior_small/Simulator.ini Normal file
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[Environment Variables]
GENPATH={Compiler}lib\HC12c\src;{Compiler}lib\HC12c\include;{Compiler}lib\HC12c\lib
LIBPATH={Compiler}lib\HC12c\include
OBJPATH={Project}bin
TEXTPATH={Project}bin
ABSPATH={Project}bin
[HI-WAVE]
Target=sim
Layout=C_layout.hwl
LoadDialogOptions=
CPU=HC12
MainFrame=2,3,-1,-1,-1,-1,243,243,1443,1097
TOOLBAR=57600 57601 32795 0 57635 57634 57637 0 57671 57669 0 32777 32776 32782 32780 32781 32778 0 32806
[Simulator]
CMDFILE0=CMDFILE STARTUP ON ".\cmd\simulator_startup.cmd"
[Simulator HC12]
CMDFILE0=CMDFILE RESET ON ".\cmd\simulator_reset.cmd"
CMDFILE1=CMDFILE PRELOAD ON ".\cmd\simulator_preload.cmd"
CMDFILE2=CMDFILE POSTLOAD ON ".\cmd\simulator_postload.cmd"
CMDFILE3=CMDFILE SETCPU ON ".\cmd\simulator_setcpu.cmd"
HCS12_SUPPORT=1
FCS=MC9S12C32
[Recent Applications File List]
File1=E:\Dev\FreeRTOS\Demo\HCS12_CodeWarrior\bin\Simulator.abs
File2=
File3=
File4=
LoadFlags1=4099
LoadFlags2=0
LoadFlags3=0
LoadFlags4=0
[Recent Layout File List]
File1=C_layout.hwl
File2=
File3=
File4=

50
20080212/Demo/HCS12_CodeWarrior_small/SofTec.ini Normal file
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[Environment Variables]
GENPATH={Compiler}lib\HC12c\src;{Compiler}lib\HC12c\include;{Compiler}lib\HC12c\lib
LIBPATH={Compiler}lib\HC12c\include
OBJPATH={Project}bin
TEXTPATH={Project}bin
ABSPATH={Project}bin
[HI-WAVE]
Target=gdi
Layout=C_layout.hwl
LoadDialogOptions=AUTOERASEANDFLASH
CPU=HC12
MainFrame=2,3,-1,-1,-1,-1,216,216,1416,1070
TOOLBAR=57600 57601 32795 0 57635 57634 57637 0 57671 57669 0 32777 32776 32782 32780 32781 32778 0 32806
[GDI]
COMSETTINGS=SETCOMM DRIVER NOPROTOCOL NOPERIODICAL "SofTec_BDM12.dll"
[SofTec_Microsystems_GdiHCS12]
Hardware=PK-HCS12C32
DeviceName=MC9S12C32
Settings=-
[inDART-HCS12_GDI_SETTINGS]
CMDFILE0=CMDFILE STARTUP ON ".\cmd\SofTec_startup.cmd"
CMDFILE1=CMDFILE RESET ON ".\cmd\SofTec_reset.cmd"
CMDFILE2=CMDFILE PRELOAD ON ".\cmd\SofTec_preload.cmd"
CMDFILE3=CMDFILE POSTLOAD ON ".\cmd\SofTec_postload.cmd"
BNKA_MCUID03E1_BANKWINDOW0=BANKWINDOW PPAGE ON 0x8000..0xBFFF 0x30 2 0x3E
BNKA_MCUID03E1_BANKWINDOW1=BANKWINDOW DPAGE OFF 0x7000..0x7FFF 0x34 256 0x0
BNKA_MCUID03E1_BANKWINDOW2=BANKWINDOW EPAGE OFF 0x400..0x7FF 0x36 256 0x0
DBG_S12_0=DBG GENERAL DISARM_ON PROTECT_OFF ANALYZE_ON STEPATRUN_ON
DBG_S12_1=DBG USER12 0x0 0x0 0x0 0x0
DBG_S12_2=DBG PREDEFINED SELECT 0 END STOP 0x0 DATAMATCH_HIGH NORMAL
[Recent Applications File List]
File1=E:\Dev\FreeRTOS\Demo\HCS12_CodeWarrior\bin\SofTec.abs
File2=
File3=
File4=
LoadFlags1=4099
LoadFlags2=0
LoadFlags3=0
LoadFlags4=0
[Recent Layout File List]
File1=C_layout.hwl
File2=
File3=
File4=

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/*****************************************************
start12.c - standard startup code
The startup code may be optimized to special user requests
----------------------------------------------------
Copyright (c) Metrowerks, Basel, Switzerland
All rights reserved
Do not modify!
Note: ROM libraries are not implemented in this startup code
Note: C++ destructors of global objects are NOT yet supported in the HIWARE Object File Format.
To use this feature, please build your application with the ELF object file format.
*****************************************************/
#include "hidef.h"
#include "start12.h"
/* Macros to control how the startup code handles the COP: */
/* #define _DO_FEED_COP_ : do feed the COP */
/* #define _DO_ENABLE_COP_: do enable the COP */
/* #define _DO_DISABLE_COP_: disable the COP */
/* Without defining any of these, the startup code does NOT handle the COP */
#pragma DATA_SEG __NEAR_SEG STARTUP_DATA /* _startupData can be accessed using 16 bit accesses. This is needed because it contains the stack top, and without stack, far data cannot be accessed */
struct _tagStartup _startupData; /* read-only: */
/* _startupData is allocated in ROM and */
/* initialized by the linker */
#pragma DATA_SEG DEFAULT
#if defined(FAR_DATA)
#include "non_bank.sgm"
/* the init function must be in non banked memory if banked variables are used */
/* because _SET_PAGE is called, which may change any page register. */
#ifdef __cplusplus
extern "C"
#endif
void _SET_PAGE(void); /* the inline assembler needs a prototype */
/* this is a runtime routine with a special */
/* calling convention, dont use it in c code! */
static void Init(void);
static void Fini(void);
#else
#include "default.sgm"
#if defined( __BANKED__) || defined(__LARGE__)
static void __far Init(void);
static void __far Fini(void);
#endif /* defined( __BANKED__) || defined(__LARGE__) */
#endif /* FAR_DATA */
/* define value and bits for Windef Register */
#ifdef HC812A4
#define WINDEF (*(volatile unsigned char*) 0x37)
#if defined( __BANKED__) || defined(__LARGE__) || defined(__PPAGE__)
#define __ENABLE_PPAGE__ 0x40
#else
#define __ENABLE_PPAGE__ 0x0
#endif
#if defined(__DPAGE__)
#define __ENABLE_DPAGE__ 0x80
#else
#define __ENABLE_DPAGE__ 0x0
#endif
#if defined(__EPAGE__)
#define __ENABLE_EPAGE__ 0x20
#else
#define __ENABLE_EPAGE__ 0x0
#endif
#endif /* HC812A4 */
#ifdef _HCS12_SERIALMON
/* for Monitor based software remap the RAM & EEPROM to adhere
to EB386. Edit RAM and EEPROM sections in PRM file to match these. */
#define ___INITRM (*(volatile unsigned char *) 0x0010)
#define ___INITRG (*(volatile unsigned char *) 0x0011)
#define ___INITEE (*(volatile unsigned char *) 0x0012)
#endif
#if defined(_DO_FEED_COP_)
#define __FEED_COP_IN_HLI() } __asm movb #0x55, _COP_RST_ADR; __asm movb #0xAA, _COP_RST_ADR; __asm {
#else
#define __FEED_COP_IN_HLI() /* do nothing */
#endif
#if !defined(FAR_DATA) && (defined( __BANKED__) || defined(__LARGE__))
static void __far Init(void)
#else
static void Init(void)
#endif
{
/* purpose: 1) zero out RAM-areas where data is allocated */
/* 2) copy initialization data from ROM to RAM */
/* 3) call global constructors in C++ */
/* called from: _Startup, LibInits */
__asm {
ZeroOut:
#if defined(__HIWARE_OBJECT_FILE_FORMAT__) && defined(__LARGE__)
LDX _startupData.pZeroOut:1 ; in the large memory model in the HIWARE format, pZeroOut is a 24 bit pointer
#else
LDX _startupData.pZeroOut ; *pZeroOut
#endif
LDY _startupData.nofZeroOuts ; nofZeroOuts
BEQ CopyDown ; if nothing to zero out
NextZeroOut: PSHY ; save nofZeroOuts
#ifdef FAR_DATA
LDAB 1,X+ ; load page of destination address
LDY 2,X+ ; load offset of destination address
__PIC_JSR(_SET_PAGE) ; sets the page in the correct page register
#else /* FAR_DATA */
LDY 2,X+ ; start address and advance *pZeroOut (X = X+4)
#endif /* FAR_DATA */
LDD 2,X+ ; byte count
#ifdef __OPTIMIZE_FOR_SIZE__ /* -os, default */
NextWord: CLR 1,Y+ ; clear memory byte
__FEED_COP_IN_HLI() ; feed the COP if necessary /*lint !e505 !e522 asm code */
DBNE D, NextWord ; dec byte count
#else
LSRD ; /2 and save bit 0 in the carry
PSHX
LDX #0
LoopClrW: STX 2,Y+ ; Word-Clear
__FEED_COP_IN_HLI() ; feed the COP if necessary /*lint !e505 !e522 asm code */
DBNE D, LoopClrW
PULX
BCC LastClr ; handle last byte
CLR 1,Y+
LastClr:
#endif
PULY ; restore nofZeroOuts
DEY ; dec nofZeroOuts
BNE NextZeroOut
CopyDown:
#ifdef __ELF_OBJECT_FILE_FORMAT__
LDX _startupData.toCopyDownBeg ; load address of copy down desc.
#else
LDX _startupData.toCopyDownBeg:2 ; load address of copy down desc.
#endif
NextBlock:
LDD 2,X+ ; size of init-data -> D
BEQ funcInits ; end of copy down desc.
#ifdef FAR_DATA
PSHD ; save counter
LDAB 1,X+ ; load destination page
LDY 2,X+ ; destination address
__PIC_JSR(_SET_PAGE) ; sets the destinations page register
PULD ; restore counter
#else /* FAR_DATA */
LDY 2,X+ ; load destination address
#endif /* FAR_DATA */
#ifdef __OPTIMIZE_FOR_SIZE__ /* -os, default */
Copy: MOVB 1,X+,1,Y+ ; move a byte from ROM to the data area
__FEED_COP_IN_HLI() ; feed the COP if necessary /*lint !e505 !e522 asm code */
DBNE D,Copy ; copy-byte loop
#else
LSRD ; /2 and save bit 0 in the carry
Copy: MOVW 2,X+,2,Y+ ; move a word from ROM to the data area
__FEED_COP_IN_HLI() ; feed the COP if necessary /*lint !e505 !e522 asm code */
DBNE D,Copy ; copy-word loop
BCC NextBlock ; handle last byte?
MOVB 1,X+,1,Y+ ; copy the last byte
#endif
BRA NextBlock
funcInits: ; call of global construtors is only in c++ necessary
#if defined(__cplusplus)
#if defined(__ELF_OBJECT_FILE_FORMAT__)
#if defined( __BANKED__) || defined(__LARGE__)
LDY _startupData.nofInitBodies; load number of cpp.
BEQ done ; if cppcount == 0, goto done
LDX _startupData.initBodies ; load address of first module to initialize
nextInit:
LEAX 3,X ; increment to next init
PSHX ; save address of next function to initialize
PSHY ; save cpp counter
CALL [-3,X] ; use double indirect call to load the page register also
PULY ; restore cpp counter
PULX ; restore actual address
DEY ; decrement cpp counter
BNE nextInit
#else /* defined( __BANKED__) || defined(__LARGE__) */
LDD _startupData.nofInitBodies; load number of cpp.
BEQ done ; if cppcount == 0, goto done
LDX _startupData.initBodies ; load address of first module to initialize
nextInit:
LDY 2,X+ ; load address of first module to initialize
PSHD
PSHX ; save actual address
JSR 0,Y ; call initialization function
PULX ; restore actual address
PULD ; restore cpp counter
DBNE D, nextInit
#endif /* defined( __BANKED__) || defined(__LARGE__) */
#else /* __ELF_OBJECT_FILE_FORMAT__ */
LDX _startupData.mInits ; load address of first module to initialize
#if defined( __BANKED__) || defined(__LARGE__)
nextInit: LDY 3,X+ ; load address of initialization function
BEQ done ; stop when address == 0
; in common environments the offset of a function is never 0, so this test could be avoided
#ifdef __InitFunctionsMayHaveOffset0__
BRCLR -1,X, done, 0xff ; stop when address == 0
#endif /* __InitFunctionsMayHaveOffset0__ */
PSHX ; save address of next function to initialize
CALL [-3,X] ; use double indirect call to load the page register also
#else /* defined( __BANKED__) || defined(__LARGE__) */
nextInit:
LDY 2,X+ ; load address of first module to initialize
BEQ done ; stop when address of function == 0
PSHX ; save actual address
JSR 0,Y ; call initialization function
#endif /* defined( __BANKED__) || defined(__LARGE__) */
PULX ; restore actual address
BRA nextInit
#endif /* __ELF_OBJECT_FILE_FORMAT__ */
done:
#endif /* __cplusplus */
}
}
#if defined( __ELF_OBJECT_FILE_FORMAT__) && defined(__cplusplus )
#if !defined(FAR_DATA) && (defined( __BANKED__) || defined(__LARGE__))
static void __far Fini(void)
#else
static void Fini(void)
#endif
{
/* purpose: 1) call global destructors in C++ */
__asm {
#if defined( __BANKED__) || defined(__LARGE__)
LDY _startupData.nofFiniBodies; load number of cpp.
BEQ done ; if cppcount == 0, goto done
LDX _startupData.finiBodies ; load address of first module to finalize
nextInit2:
LEAX 3,X ; increment to next init
PSHX ; save address of next function to finalize
PSHY ; save cpp counter
CALL [-3,X] ; use double indirect call to load the page register also
PULY ; restore cpp counter
PULX ; restore actual address
DEY ; decrement cpp counter
BNE nextInit2
#else /* defined( __BANKED__) || defined(__LARGE__) */
LDD _startupData.nofFiniBodies; load number of cpp.
BEQ done ; if cppcount == 0, goto done
LDX _startupData.finiBodies ; load address of first module to finalize
nextInit2:
LDY 2,X+ ; load address of first module to finalize
PSHD
PSHX ; save actual address
JSR 0,Y ; call finalize function
PULX ; restore actual address
PULD ; restore cpp counter
DBNE D, nextInit2
#endif /* defined( __BANKED__) || defined(__LARGE__) */
done:;
}
}
#endif
#include "non_bank.sgm"
#pragma MESSAGE DISABLE C12053 /* Stack-pointer change not in debugging-information */
#pragma NO_FRAME
#pragma NO_ENTRY
#pragma NO_EXIT
#ifdef __cplusplus
extern "C"
#endif
/* The function _Startup must be called in order to initialize global variables and to call main */
/* You can adapt this function or call it from your startup code to implement a different startup */
/* functionality. */
/* You should also setup the needed IO registers as WINDEF (HC12A4 only) or the COP registers to run */
/* on hardware */
/* to set the reset vector several ways are possible : */
/* 1. define the function with "interrupt 0" as done below in the first case */
/* 2. add the following line to your prm file : VECTOR ADDRESS 0xfffe _Startup */
/* of course, even more posibilities exists */
/* the reset vector must be set so that the application has a defined entry point */
#define STARTUP_FLAGS_NOT_INIT_SP (1<<1)
#if defined(__SET_RESET_VECTOR__)
void __interrupt 0 _Startup(void) {
#else
void _Startup(void) {
#endif
/* purpose: 1) initialize the stack
2) initialize the RAM, copy down init data etc (Init)
3) call main;
parameters: NONE
called from: _PRESTART-code generated by the Linker
or directly referenced by the reset vector */
for(;;) { /* forever: initialize the program; call the root-procedure */
if (!(_startupData.flags&STARTUP_FLAGS_NOT_INIT_SP)) {
/* initialize the stack pointer */
INIT_SP_FROM_STARTUP_DESC(); /*lint !e522 asm code */ /* HLI macro definition in hidef.h */
}
#ifdef _HCS12_SERIALMON
/* for Monitor based software remap the RAM & EEPROM to adhere
to EB386. Edit RAM and EEPROM sections in PRM file to match these. */
___INITRG = 0x00; /* lock registers block to 0x0000 */
___INITRM = 0x39; /* lock Ram to end at 0x3FFF */
___INITEE = 0x09; /* lock EEPROM block to end at 0x0fff */
#endif
/* Here user defined code could be inserted, the stack could be used */
#if defined(_DO_DISABLE_COP_)
_DISABLE_COP();
#endif
/* Example : Set up WinDef Register to allow Paging */
#ifdef HC812A4 /* HC12 A4 derivative needs WINDEF to configure which pages are available */
#if (__ENABLE_EPAGE__ != 0 || __ENABLE_DPAGE__ != 0 || __ENABLE_PPAGE__ != 0)
WINDEF= __ENABLE_EPAGE__ | __ENABLE_DPAGE__ | __ENABLE_PPAGE__;
#endif
#endif
Init(); /* zero out, copy down, call constructors */
/* Here user defined code could be inserted, all global variables are initilized */
#if defined(_DO_ENABLE_COP_)
_ENABLE_COP(1);
#endif
/* call main() */
(*_startupData.main)();
/* call destructors. Only done when this file is compiled as C++ and for the ELF object file format */
/* the HIWARE object file format does not support this */
#if defined( __ELF_OBJECT_FILE_FORMAT__) && defined(__cplusplus )
Fini();
#endif
} /* end loop forever */
}

843
20080212/Demo/HCS12_CodeWarrior_small/Sources/datapage.c Normal file
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/******************************************************************************
FILE : datapage.c
PURPOSE : paged data access runtime routines
MACHINE : Motorola 68HC12 (Target)
LANGUAGE : ANSI-C
HISTORY : 21.7.96 first version created
******************************************************************************/
/*
According to the -Cp option of the compiler the
__DPAGE__, __PPAGE__ and __EPAGE__ macros are defined.
If none of them is given as argument, then no page accesses should occur and
this runtime routine should not be used !
To be on the save side, the runtime routines are created anyway.
If some of the -Cp options are given an adapted versions which only covers the
needed cases is produced.
*/
/* if no compiler option -Cp is given, it is assumed that all possible are given : */
/* Compile with option -DHCS12 to activate this code */
#if defined(HCS12) || defined(_HCS12) /* HCS12 family has PPAGE register only at 0x30 */
#define PPAGE_ADDR (0x30+REGISTER_BASE)
#ifndef __PPAGE__ /* may be set already by option -CPPPAGE */
#define __PPAGE__
#endif
/* Compile with option -DDG128 to activate this code */
#elif defined DG128 /* HC912DG128 derivative has PPAGE register only at 0xFF */
#define PPAGE_ADDR (0xFF+REGISTER_BASE)
#ifndef __PPAGE__ /* may be set already by option -CPPPAGE */
#define __PPAGE__
#endif
#elif defined(HC812A4)
/* all setting default to A4 already */
#endif
#if !defined(__EPAGE__) && !defined(__PPAGE__) && !defined(__DPAGE__)
/* as default use all page registers */
#define __DPAGE__
#define __EPAGE__
#define __PPAGE__
#endif
/* modify the following defines to your memory configuration */
#define EPAGE_LOW_BOUND 0x400u
#define EPAGE_HIGH_BOUND 0x7ffu
#define DPAGE_LOW_BOUND 0x7000u
#define DPAGE_HIGH_BOUND 0x7fffu
#define PPAGE_LOW_BOUND (DPAGE_HIGH_BOUND+1)
#define PPAGE_HIGH_BOUND 0xBFFFu
#define REGISTER_BASE 0x0u
#ifndef DPAGE_ADDR
#define DPAGE_ADDR (0x34u+REGISTER_BASE)
#endif
#ifndef EPAGE_ADDR
#define EPAGE_ADDR (0x36u+REGISTER_BASE)
#endif
#ifndef PPAGE_ADDR
#define PPAGE_ADDR (0x35u+REGISTER_BASE)
#endif
/*
The following parts about the defines are assumed in the code of _GET_PAGE_REG :
- the memory region controlled by DPAGE is above the area controlled by the EPAGE and
below the area controlled by the PPAGE.
- the lower bound of the PPAGE area is equal to be the higher bound of the DPAGE area + 1
*/
#if EPAGE_LOW_BOUND >= EPAGE_HIGH_BOUND || EPAGE_HIGH_BOUND >= DPAGE_LOW_BOUND || DPAGE_LOW_BOUND >= DPAGE_HIGH_BOUND || DPAGE_HIGH_BOUND >= PPAGE_LOW_BOUND || PPAGE_LOW_BOUND >= PPAGE_HIGH_BOUND
#error /* please adapt _GET_PAGE_REG for this non default page configuration */
#endif
#if DPAGE_HIGH_BOUND+1 != PPAGE_LOW_BOUND
#error /* please adapt _GET_PAGE_REG for this non default page configuration */
#endif
#include "hidef.h"
#include "non_bank.sgm"
#include "runtime.sgm"
/* this module does either control if any access is in the bounds of the specified page or */
/* ,if only one page is specified, just use this page. */
/* This behavior is controlled by the define USE_SEVERAL_PAGES. */
/* If !USE_SEVERAL_PAGES does increase the performance significantly */
/* NOTE : When !USE_SEVERAL_PAGES, the page is also set for accesses outside of the area controlled */
/* by this single page. But this is usually no problem because the page is set again before any other access */
#if !defined(__DPAGE__) && !defined(__EPAGE__) && !defined(__PPAGE__)
/* no page at all is specified */
/* only specifing the right pages will speed up these functions a lot */
#define USE_SEVERAL_PAGES 1
#elif defined(__DPAGE__) && defined(__EPAGE__) || defined(__DPAGE__) && defined(__PPAGE__) || defined(__EPAGE__) && defined(__PPAGE__)
/* more than one page register is used */
#define USE_SEVERAL_PAGES 1
#else
#define USE_SEVERAL_PAGES 0
#if defined(__DPAGE__) /* check which pages are used */
#define PAGE_ADDR PPAGE_ADDR
#elif defined(__EPAGE__)
#define PAGE_ADDR EPAGE_ADDR
#elif defined(__PPAGE__)
#define PAGE_ADDR PPAGE_ADDR
#else /* we dont know which page, decide it at runtime */
#error /* must not happen */
#endif
#endif
#if USE_SEVERAL_PAGES /* only needed for several pages support */
/*--------------------------- _GET_PAGE_REG --------------------------------
Runtime routine to detect the right register depending on the 16 bit offset part
of an address.
This function is only used by the functions below.
Depending on the compiler options -Cp different versions of _GET_PAGE_REG are produced.
Arguments :
- Y : offset part of an address
Result :
if address Y is controlled by a page register :
- X : address of page register if Y is controlled by an page register
- Zero flag cleared
- all other registers remain unchanged
if address Y is not controlled by a page register :
- Zero flag is set
- all registers remain unchanged
--------------------------- _GET_PAGE_REG ----------------------------------*/
#if defined(__DPAGE__)
#ifdef __cplusplus
extern "C"
#endif
#pragma NO_ENTRY
#pragma NO_EXIT
#pragma NO_FRAME
static void NEAR _GET_PAGE_REG(void) { /*lint -esym(528, _GET_PAGE_REG) used in asm code */
asm {
L_DPAGE:
CPY #DPAGE_LOW_BOUND ; test of lower bound of DPAGE
#if defined(__EPAGE__)
BLO L_EPAGE ; EPAGE accesses are possible
#else
BLO L_NOPAGE ; no paged memory below accesses
#endif
CPY #DPAGE_HIGH_BOUND ; test of higher bound DPAGE/lower bound PPAGE
#if defined(__PPAGE__)
BHI L_PPAGE ; EPAGE accesses are possible
#else
BHI L_NOPAGE ; no paged memory above accesses
#endif
FOUND_DPAGE:
LDX #DPAGE_ADDR ; load page register address and clear zero flag
RTS
#if defined(__PPAGE__)
L_PPAGE:
CPY #PPAGE_HIGH_BOUND ; test of higher bound of PPAGE
BHI L_NOPAGE
FOUND_PPAGE:
LDX #PPAGE_ADDR ; load page register address and clear zero flag
RTS
#endif
#if defined(__EPAGE__)
L_EPAGE:
CPY #EPAGE_LOW_BOUND ; test of lower bound of EPAGE
BLO L_NOPAGE
CPY #EPAGE_HIGH_BOUND ; test of higher bound of EPAGE
BHI L_NOPAGE
FOUND_EPAGE:
LDX #EPAGE_ADDR ; load page register address and clear zero flag
RTS
#endif
L_NOPAGE:
ORCC #0x04 ; sets zero flag
RTS
}
}
#else /* !defined(__DPAGE__) */
#if defined( __PPAGE__ )
#ifdef __cplusplus
extern "C"
#endif
#pragma NO_ENTRY
#pragma NO_EXIT
#pragma NO_FRAME
static void NEAR _GET_PAGE_REG(void) { /*lint -esym(528, _GET_PAGE_REG) used in asm code */
asm {
L_PPAGE:
CPY #PPAGE_LOW_BOUND ; test of lower bound of PPAGE
#if defined( __EPAGE__ )
BLO L_EPAGE
#else
BLO L_NOPAGE ; no paged memory below
#endif
CPY #PPAGE_HIGH_BOUND ; test of higher bound PPAGE
BHI L_NOPAGE
FOUND_PPAGE:
LDX #PPAGE_ADDR ; load page register address and clear zero flag
RTS
#if defined( __EPAGE__ )
L_EPAGE:
CPY #EPAGE_LOW_BOUND ; test of lower bound of EPAGE
BLO L_NOPAGE
CPY #EPAGE_HIGH_BOUND ; test of higher bound of EPAGE
BHI L_NOPAGE
FOUND_EPAGE:
LDX #EPAGE_ADDR ; load page register address and clear zero flag
RTS
#endif
L_NOPAGE: ; not in any allowed page area
; its a far access to a non paged variable
ORCC #0x04 ; sets zero flag
RTS
}
}
#else /* !defined(__DPAGE__ ) && !defined( __PPAGE__) */
#if defined(__EPAGE__)
#ifdef __cplusplus
extern "C"
#endif
#pragma NO_ENTRY
#pragma NO_EXIT
#pragma NO_FRAME
static void NEAR _GET_PAGE_REG(void) { /*lint -esym(528, _GET_PAGE_REG) used in asm code */
asm {
L_EPAGE:
CPY #EPAGE_LOW_BOUND ; test of lower bound of EPAGE
BLO L_NOPAGE
CPY #EPAGE_HIGH_BOUND ; test of higher bound of EPAGE
BHI L_NOPAGE
FOUND_EPAGE:
LDX #EPAGE_ADDR ; load page register address and clear zero flag
RTS
L_NOPAGE: ; not in any allowed page area
; its a far access to a non paged variable
ORCC #0x04 ; sets zero flag
RTS
}
}
#endif /* defined(__EPAGE__) */
#endif /* defined(__PPAGE__) */
#endif /* defined(__DPAGE__) */
#endif /* USE_SEVERAL_PAGES */
/*--------------------------- _SET_PAGE --------------------------------
Runtime routine to set the right page register. This routine is used if the compiler
does not know the right page register, i.e. if the option -Cp is used for more than
one pageregister or if the runtime option is used for one of the -Cp options.
Arguments :
- offset part of an address in the Y register
- page part of an address in the B register
Result :
- page part written into the correct page register.
- the old page register content is destroyed
- all processor registers remains unchanged
--------------------------- _SET_PAGE ----------------------------------*/
#ifdef __cplusplus
extern "C"
#endif
#pragma NO_ENTRY
#pragma NO_EXIT
#pragma NO_FRAME
void NEAR _SET_PAGE(void) {
#if USE_SEVERAL_PAGES
asm {
PSHX ; save X register
__PIC_JSR(_GET_PAGE_REG)
BEQ L_NOPAGE
STAB 0,X ; set page register
L_NOPAGE:
PULX ; restore X register
RTS
}
#else /* USE_SEVERAL_PAGES */
asm {
STAB PAGE_ADDR ; set page register
RTS
}
#endif /* USE_SEVERAL_PAGES */
}
/*--------------------------- _LOAD_FAR_8 --------------------------------
This runtime routine is used to access paged memory via a runtime function.
It may also be used if the compiler option -Cp is not used with the runtime argument.
Arguments :
- offset part of an address in the Y register
- page part of an address in the B register
Result :
- value to be read in the B register
- all other registers remains unchanged
- all page register still contain the same value
--------------------------- _LOAD_FAR_8 ----------------------------------*/
#ifdef __cplusplus
extern "C"
#endif
#pragma NO_ENTRY
#pragma NO_EXIT
#pragma NO_FRAME
void NEAR _LOAD_FAR_8(void) {
#if USE_SEVERAL_PAGES
asm {
PSHX ; save X register
__PIC_JSR(_GET_PAGE_REG)
BEQ L_NOPAGE
PSHA ; save A register
LDAA 0,X ; save page register
STAB 0,X ; set page register
LDAB 0,Y ; actual load, overwrites page
STAA 0,X ; restore page register
PULA ; restore A register
PULX ; restore X register
RTS
L_NOPAGE:
LDAB 0,Y ; actual load, overwrites page
PULX ; restore X register
RTS
}
#else /* USE_SEVERAL_PAGES */
asm {
PSHA ; save A register
LDAA PAGE_ADDR ; save page register
STAB PAGE_ADDR ; set page register
LDAB 0,Y ; actual load, overwrites page
STAA PAGE_ADDR ; restore page register
PULA ; restore A register
RTS
}
#endif /* USE_SEVERAL_PAGES */
}
/*--------------------------- _LOAD_FAR_16 --------------------------------
This runtime routine is used to access paged memory via a runtime function.
It may also be used if the compiler option -Cp is not used with the runtime argument.
Arguments :
- offset part of an address in the Y register
- page part of an address in the B register
Result :
- value to be read in the Y register
- all other registers remains unchanged
- all page register still contain the same value
--------------------------- _LOAD_FAR_16 ----------------------------------*/
#ifdef __cplusplus
extern "C"
#endif
#pragma NO_ENTRY
#pragma NO_EXIT
#pragma NO_FRAME
void NEAR _LOAD_FAR_16(void) {
#if USE_SEVERAL_PAGES
asm {
PSHX ; save X register
__PIC_JSR(_GET_PAGE_REG)
BEQ L_NOPAGE
PSHA ; save A register
LDAA 0,X ; save page register
STAB 0,X ; set page register
LDY 0,Y ; actual load, overwrites address
STAA 0,X ; restore page register
PULA ; restore A register
PULX ; restore X register
RTS
L_NOPAGE:
LDY 0,Y ; actual load, overwrites address
PULX ; restore X register
RTS
}
#else /* USE_SEVERAL_PAGES */
asm {
PSHA ; save A register
LDAA PAGE_ADDR ; save page register
STAB PAGE_ADDR ; set page register
LDY 0,Y ; actual load, overwrites address
STAA PAGE_ADDR ; restore page register
PULA ; restore A register
RTS
}
#endif /* USE_SEVERAL_PAGES */
}
/*--------------------------- _LOAD_FAR_24 --------------------------------
This runtime routine is used to access paged memory via a runtime function.
It may also be used if the compiler option -Cp is not used with the runtime argument.
Arguments :
- offset part of an address in the Y register
- page part of an address in the B register
Result :
- value to be read in the Y:B registers
- all other registers remains unchanged
- all page register still contain the same value
--------------------------- _LOAD_FAR_24 ----------------------------------*/
#ifdef __cplusplus
extern "C"
#endif
#pragma NO_ENTRY
#pragma NO_EXIT
#pragma NO_FRAME
void NEAR _LOAD_FAR_24(void) {
#if USE_SEVERAL_PAGES
asm {
PSHX ; save X register
__PIC_JSR(_GET_PAGE_REG)
BEQ L_NOPAGE
PSHA ; save A register
LDAA 0,X ; save page register
STAB 0,X ; set page register
LDAB 0,Y ; actual load, overwrites page of address
LDY 1,Y ; actual load, overwrites offset of address
STAA 0,X ; restore page register
PULA ; restore A register
PULX ; restore X register
RTS
L_NOPAGE:
LDAB 0,Y ; actual load, overwrites page of address
LDY 1,Y ; actual load, overwrites offset of address
PULX ; restore X register
RTS
}
#else /* USE_SEVERAL_PAGES */
asm {
PSHA ; save A register
LDAA PAGE_ADDR ; save page register
STAB PAGE_ADDR ; set page register
LDAB 0,Y ; actual load, overwrites page of address
LDY 1,Y ; actual load, overwrites offset of address
STAA PAGE_ADDR ; restore page register
PULA ; restore A register
RTS
}
#endif /* USE_SEVERAL_PAGES */
}
/*--------------------------- _LOAD_FAR_32 --------------------------------
This runtime routine is used to access paged memory via a runtime function.
It may also be used if the compiler option -Cp is not used with the runtime argument.
Arguments :
- offset part of an address in the Y register
- page part of an address in the B register
Result :
- low 16 bit of value to be read in the D registers
- high 16 bit of value to be read in the Y registers
- all other registers remains unchanged
- all page register still contain the same value
--------------------------- _LOAD_FAR_32 ----------------------------------*/
#ifdef __cplusplus
extern "C"
#endif
#pragma NO_ENTRY
#pragma NO_EXIT
#pragma NO_FRAME
void NEAR _LOAD_FAR_32(void) {
#if USE_SEVERAL_PAGES
asm {
PSHX ; save X register
__PIC_JSR(_GET_PAGE_REG)
BEQ L_NOPAGE
LDAA 0,X ; save page register
PSHA ; put it onto the stack
STAB 0,X ; set page register
LDD 2,Y ; actual load, low word
LDY 0,Y ; actual load, high word
MOVB 1,SP+,0,X ; restore page register
PULX ; restore X register
RTS
L_NOPAGE:
LDD 2,Y ; actual load, low word
LDY 0,Y ; actual load, high word
PULX ; restore X register
RTS
}
#else /* USE_SEVERAL_PAGES */
asm {
LDAA PAGE_ADDR ; save page register
PSHA ; put it onto the stack
STAB PAGE_ADDR ; set page register
LDD 2,Y ; actual load, low word
LDY 0,Y ; actual load, high word
MOVB 1,SP+,PAGE_ADDR; restore page register
RTS
}
#endif /* USE_SEVERAL_PAGES */
}
/*--------------------------- _STORE_FAR_8 --------------------------------
This runtime routine is used to access paged memory via a runtime function.
It may also be used if the compiler option -Cp is not used with the runtime argument.
Arguments :
- offset part of an address in the Y register
- page part of an address in the B register
- value to be stored in the B register
Result :
- value stored at the address
- all registers remains unchanged
- all page register still contain the same value
--------------------------- _STORE_FAR_8 ----------------------------------*/
#ifdef __cplusplus
extern "C"
#endif
#pragma NO_ENTRY
#pragma NO_EXIT
#pragma NO_FRAME
void NEAR _STORE_FAR_8(void) {
#if USE_SEVERAL_PAGES
asm {
PSHX ; save X register
__PIC_JSR(_GET_PAGE_REG)
BEQ L_NOPAGE
PSHB ; save B register
LDAB 0,X ; save page register
MOVB 0,SP, 0,X ; set page register
STAA 0,Y ; store the value passed in A
STAB 0,X ; restore page register
PULB ; restore B register
PULX ; restore X register
RTS
L_NOPAGE:
STAA 0,Y ; store the value passed in A
PULX ; restore X register
RTS
}
#else /* USE_SEVERAL_PAGES */
asm {
PSHB ; save A register
LDAB PAGE_ADDR ; save page register
MOVB 0,SP,PAGE_ADDR ; set page register
STAA 0,Y ; store the value passed in A
STAB PAGE_ADDR ; restore page register
PULB ; restore B register
RTS
}
#endif /* USE_SEVERAL_PAGES */
}
/*--------------------------- _STORE_FAR_16 --------------------------------
This runtime routine is used to access paged memory via a runtime function.
It may also be used if the compiler option -Cp is not used with the runtime argument.
Arguments :
- offset part of an address in the Y register
- page part of an address in the B register
- value to be stored in the X register
Result :
- value stored at the address
- all registers remains unchanged
- all page register still contain the same value
--------------------------- _STORE_FAR_16 ----------------------------------*/
#ifdef __cplusplus
extern "C"
#endif
#pragma NO_ENTRY
#pragma NO_EXIT
#pragma NO_FRAME
void NEAR _STORE_FAR_16(void) {
#if USE_SEVERAL_PAGES
asm {
PSHX ; save X register
__PIC_JSR(_GET_PAGE_REG)
BEQ L_NOPAGE
PSHA
LDAA 0,X ; save page register
STAB 0,X ; set page register
MOVW 1,SP, 0,Y ; store the value passed in X
STAA 0,X ; restore page register
PULA ; restore A register
PULX ; restore X register
RTS
L_NOPAGE:
STX 0,Y ; store the value passed in X
PULX ; restore X register
RTS
}
#else /* USE_SEVERAL_PAGES */
asm {
PSHA ; save A register
LDAA PAGE_ADDR ; save page register
STAB PAGE_ADDR ; set page register
STX 0,Y ; store the value passed in X
STAA PAGE_ADDR ; restore page register
PULA ; restore A register
RTS
}
#endif /* USE_SEVERAL_PAGES */
}
/*--------------------------- _STORE_FAR_24 --------------------------------
This runtime routine is used to access paged memory via a runtime function.
It may also be used if the compiler option -Cp is not used with the runtime argument.
Arguments :
- offset part of an address in the Y register
- page part of an address in the B register
- value to be stored in the X:A registers (X : low 16 bit, A : high 8 bit)
Result :
- value stored at the address
- all registers remains unchanged
- all page register still contain the same value
--------------------------- _STORE_FAR_24 ----------------------------------*/
#ifdef __cplusplus
extern "C"
#endif
#pragma NO_ENTRY
#pragma NO_EXIT
#pragma NO_FRAME
void NEAR _STORE_FAR_24(void) {
#if USE_SEVERAL_PAGES
asm {
PSHX ; save X register
__PIC_JSR(_GET_PAGE_REG)
BEQ L_NOPAGE
PSHA
LDAA 0,X ; save page register
STAB 0,X ; set page register
MOVW 1,SP, 1,Y ; store the value passed in X
MOVB 0,SP, 0,Y ; store the value passed in A
STAA 0,X ; restore page register
PULA ; restore A register
PULX ; restore X register
RTS
L_NOPAGE:
STX 1,Y ; store the value passed in X
STAA 0,Y ; store the value passed in X
PULX ; restore X register
RTS
}
#else /* USE_SEVERAL_PAGES */
asm {
PSHA ; save A register
LDAA PAGE_ADDR ; save page register
STAB PAGE_ADDR ; set page register
MOVB 0,SP, 0,Y ; store the value passed in A
STX 1,Y ; store the value passed in X
STAA PAGE_ADDR ; restore page register
PULA ; restore A register
RTS
}
#endif /* USE_SEVERAL_PAGES */
}
/*--------------------------- _STORE_FAR_32 --------------------------------
This runtime routine is used to access paged memory via a runtime function.
It may also be used if the compiler option -Cp is not used with the runtime argument.
Arguments :
- offset part of an address in the Y register
- page part of an address is on the stack at 3,SP (just below the return address)
- value to be stored in the X:D registers (D : low 16 bit, X : high 16 bit)
Result :
- value stored at the address
- all registers remains unchanged
- the page part is removed from the stack
- all page register still contain the same value
--------------------------- _STORE_FAR_32 ----------------------------------*/
#ifdef __cplusplus
extern "C"
#endif
#pragma NO_ENTRY
#pragma NO_EXIT
#pragma NO_FRAME
void NEAR _STORE_FAR_32(void) {
#if USE_SEVERAL_PAGES
asm {
PSHX ; save X register
__PIC_JSR(_GET_PAGE_REG)
BEQ L_NOPAGE
PSHD
LDAA 0,X ; save page register
MOVB 6,SP, 0,X ; set page register
MOVW 2,SP, 0,Y ; store the value passed in X (high word)
MOVW 0,SP, 2,Y ; store the value passed in D (low word)
STAA 0,X ; restore page register
PULD ; restore A register
BRA done
L_NOPAGE:
MOVW 0,SP, 0,Y ; store the value passed in X (high word)
STD 2,Y ; store the value passed in D (low word)
done:
PULX ; restore X register
MOVW 0,SP, 1,+SP ; move return address
RTS
}
#else /* USE_SEVERAL_PAGES */
asm {
PSHD ; save D register
LDAA PAGE_ADDR ; save page register
LDAB 4,SP ; load page part of address
STAB PAGE_ADDR ; set page register
STX 0,Y ; store the value passed in X
MOVW 0,SP, 2,Y ; store the value passed in D (low word)
STAA PAGE_ADDR ; restore page register
PULD ; restore D register
MOVW 0,SP, 1,+SP ; move return address
RTS
}
#endif /* USE_SEVERAL_PAGES */
}
/*--------------------------- _FAR_COPY --------------------------------
This runtime routine is used to access paged memory via a runtime function.
It may also be used if the compiler option -Cp is not used with the runtime argument.
Arguments :
- offset part of the source int the X register
- page part of the source in the A register
- offset part of the dest int the Y register
- page part of the dest in the B register
- number of bytes to be copied at 2,SP. The number of bytes is always > 0
Result :
- memory area copied
- no registers are saved, i.e. all registers may be destroied
- all page register still contain the same value
stack-structure at the loop-label:
0,SP : destination offset
2,SP : source page
3,SP : destination page
4,SP : source offset
6,SP : return address
8,SP : counter, > 0
--------------------------- _FAR_COPY ----------------------------------*/
#ifdef __cplusplus
extern "C"
#endif
#pragma NO_ENTRY
#pragma NO_EXIT
#pragma NO_FRAME
void NEAR _FAR_COPY(void) {
#if USE_SEVERAL_PAGES
asm {
DEX ; source addr-=1, because loop counter ends at 1
PSHX ; save source offset
PSHD ; save both pages
DEY ; destination addr-=1, because loop counter ends at 1
PSHY ; save destination offset
LDX 8,SP ; load counter, assuming counter > 0
loop:
LDD 4,SP ; load source offset
LEAY D,X ; calcutate actual source address
LDAB 2,SP ; load source page
__PIC_JSR (_LOAD_FAR_8); load 1 source byte
PSHB ; save value
LDD 0+1,SP ; load destination offset
LEAY D,X ; calcutate acual destination address
PULA ; restore value
LDAB 3,SP ; load destination page
__PIC_JSR (_STORE_FAR_8); store one byte
DEX
BNE loop
LDX 6,SP ; load return address
LEAS 10,SP ; release stack
JMP 0,X ; return
}
#else
asm {
PSHD ; store page registers
TFR X,D
ADDD 4,SP ; calculate source end address
STD 4,SP
PULB ; reload source page
LDAA PAGE_ADDR ; save page register
PSHA
loop:
STAB PAGE_ADDR ; set source page
LDAA 1,X+ ; load value
MOVB 1,SP, PAGE_ADDR ; set destination page
STAA 1,Y+
CPX 4,SP
BNE loop
LDAA 2,SP+ ; restore old page value and release stack
STAA PAGE_ADDR ; store it into page register
LDX 4,SP+ ; release stack and load return address
JMP 0,X ; return
}
#endif
}

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// After load the commands written below will be executed
// Show main function at startup
FindProc main

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// Before load the commands written below will be executed

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// After reset the commands written below will be executed

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// At startup the commands written below will be executed

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// At startup the commands written below will be executed

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// After load the commands written below will be executed
// Show main function at startup
FindProc main

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// Before load the commands written below will be executed

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// After reset the commands written below will be executed

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// At startup the commands written below will be executed

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/*
FreeRTOS.org V4.7.1 - Copyright (C) 2003-2008 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
Please ensure to read the configuration and relevant port sections of the
online documentation.
+++ http://www.FreeRTOS.org +++
Documentation, latest information, license and contact details.
+++ http://www.SafeRTOS.com +++
A version that is certified for use in safety critical systems.
+++ http://www.OpenRTOS.com +++
Commercial support, development, porting, licensing and training services.
***************************************************************************
*/
/*
*
* vMain() is effectively the demo application entry point. It is called by
* the main() function generated by the Processor Expert application.
*
* vMain() creates all the demo application tasks, then starts the scheduler.
* The WEB documentation provides more details of the demo application tasks.
*
* Main.c also creates a task called "Check". This only executes every three
* seconds but has the highest priority so is guaranteed to get processor time.
* Its main function is to check that all the other tasks are still operational.
* Each task (other than the "flash" tasks) maintains a unique count that is
* incremented each time the task successfully completes its function. Should
* any error occur within such a task the count is permanently halted. The
* check task inspects the count of each task to ensure it has changed since
* the last time the check task executed. If all the count variables have
* changed all the tasks are still executing error free, and the check task
* toggles the onboard LED. Should any task contain an error at any time
* the LED toggle rate will change from 3 seconds to 500ms.
*
* This file also includes the functionality normally implemented within the
* standard demo application file integer.c. Due to the limited memory
* available on the microcontroller the functionality has been included within
* the idle task hook [vApplicationIdleHook()] - instead of within the usual
* separate task. See the documentation within integer.c for the rationale
* of the integer task functionality.
*
*
*
* The demo applications included with other FreeRTOS ports make use of the
* standard ComTest tasks. These use a loopback connector to transmit and
* receive RS232 characters between two tasks. The test is important for two
* reasons:
*
* 1) It tests the mechanism of context switching from within an application
* ISR.
*
* 2) It generates some randomised timing.
*
* The demo board used to develop this port does not include an RS232 interface
* so the ComTest tasks could not easily be included. Instead these two tests
* are created using a 'Button Push' task.
*
* The 'Button Push' task blocks on a queue, waiting for data to arrive. A
* simple interrupt routine connected to the PP0 input on the demo board places
* data in the queue each time the PP0 button is pushed (this button is built
* onto the demo board). As the 'Button Push' task is created with a
* relatively high priority it will unblock and want to execute as soon as data
* arrives in the queue - resulting in a context switch within the PP0 input
* ISR. If the data retrieved from the queue is that expected the 'Button Push'
* task toggles LED 5. Therefore correct operation is indicated by the LED
* toggling each time the PP0 button is pressed.
*
* This test is not as satisfactory as the ComTest method - but the simple
* nature of the port makes is just about adequate.
*
*/
/* Kernel includes. */
#include "FreeRTOS.h"
#include "task.h"
#include "queue.h"
/* Demo application includes. */
#include "flash.h"
#include "PollQ.h"
#include "dynamic.h"
#include "partest.h"
/* Processor expert includes. */
#include "ButtonInterrupt.h"
/*-----------------------------------------------------------
Definitions.
-----------------------------------------------------------*/
/* Priorities assigned to demo application tasks. */
#define mainFLASH_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define mainCHECK_TASK_PRIORITY ( tskIDLE_PRIORITY + 3 )
#define mainBUTTON_TASK_PRIORITY ( tskIDLE_PRIORITY + 3 )
#define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 2 )
/* LED that is toggled by the check task. The check task periodically checks
that all the other tasks are operating without error. If no errors are found
the LED is toggled with mainCHECK_PERIOD frequency. If an error is found
then the toggle rate increases to mainERROR_CHECK_PERIOD. */
#define mainCHECK_TASK_LED ( 7 )
#define mainCHECK_PERIOD ( ( portTickType ) 3000 / portTICK_RATE_MS )
#define mainERROR_CHECK_PERIOD ( ( portTickType ) 500 / portTICK_RATE_MS )
/* LED that is toggled by the button push interrupt. */
#define mainBUTTON_PUSH_LED ( 5 )
/* The constants used in the idle task calculation. */
#define intgCONST1 ( ( portLONG ) 123 )
#define intgCONST2 ( ( portLONG ) 234567 )
#define intgCONST3 ( ( portLONG ) -3 )
#define intgCONST4 ( ( portLONG ) 7 )
#define intgEXPECTED_ANSWER ( ( ( intgCONST1 + intgCONST2 ) * intgCONST3 ) / intgCONST4 )
/* The length of the queue between is button push ISR and the Button Push task
is greater than 1 to account for switch bounces generating multiple inputs. */
#define mainBUTTON_QUEUE_SIZE 6
/*-----------------------------------------------------------
Local functions prototypes.
-----------------------------------------------------------*/
/*
* The 'Check' task function. See the explanation at the top of the file.
*/
static void vErrorChecks( void* pvParameters );
/*
* The 'Button Push' task. See the explanation at the top of the file.
*/
static void vButtonTask( void *pvParameters );
/*
* The idle task hook - in which the integer task is implemented. See the
* explanation at the top of the file.
*/
void vApplicationIdleHook( void );
/*
* Checks the unique counts of other tasks to ensure they are still operational.
*/
static portLONG prvCheckOtherTasksAreStillRunning( void );
/*-----------------------------------------------------------
Local variables.
-----------------------------------------------------------*/
/* A few tasks are defined within this file. This flag is used to indicate
their status. If an error is detected in one of the locally defined tasks then
this flag is set to pdTRUE. */
portBASE_TYPE xLocalError = pdFALSE;
/* The queue used to send data from the button push ISR to the Button Push
task. */
static xQueueHandle xButtonQueue;
/*-----------------------------------------------------------*/
/*
* This is called from the main() function generated by the Processor Expert.
*/
void vMain( void )
{
/* Start some of the standard demo tasks. */
vStartLEDFlashTasks( mainFLASH_PRIORITY );
vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );
vStartDynamicPriorityTasks();
/* Start the locally defined tasks. There is also a task implemented as
the idle hook. */
xTaskCreate( vErrorChecks, "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );
xTaskCreate( vButtonTask, "Button", configMINIMAL_STACK_SIZE, NULL, mainBUTTON_TASK_PRIORITY, NULL );
/* All the tasks have been created - start the scheduler. */
vTaskStartScheduler();
/* Should not reach here! */
for( ;; );
}
/*-----------------------------------------------------------*/
static void vErrorChecks( void *pvParameters )
{
portTickType xDelayPeriod = mainCHECK_PERIOD;
portTickType xLastWakeTime;
/* Initialise xLastWakeTime to ensure the first call to vTaskDelayUntil()
functions correctly. */
xLastWakeTime = xTaskGetTickCount();
for( ;; )
{
/* Delay until it is time to execute again. The delay period is
shorter following an error. */
vTaskDelayUntil( &xLastWakeTime, xDelayPeriod );
/* Check all the demo application tasks are executing without
error. If an error is found the delay period is shortened - this
has the effect of increasing the flash rate of the 'check' task
LED. */
if( prvCheckOtherTasksAreStillRunning() == pdFAIL )
{
/* An error has been detected in one of the tasks - flash faster. */
xDelayPeriod = mainERROR_CHECK_PERIOD;
}
/* Toggle the LED each cycle round. */
vParTestToggleLED( mainCHECK_TASK_LED );
}
}
/*-----------------------------------------------------------*/
static portLONG prvCheckOtherTasksAreStillRunning( void )
{
portBASE_TYPE xAllTasksPassed = pdPASS;
if( xArePollingQueuesStillRunning() != pdTRUE )
{
xAllTasksPassed = pdFAIL;
}
if( xAreDynamicPriorityTasksStillRunning() != pdTRUE )
{
xAllTasksPassed = pdFAIL;
}
/* Also check the status flag for the tasks defined within this function. */
if( xLocalError != pdFALSE )
{
xAllTasksPassed = pdFAIL;
}
return xAllTasksPassed;
}
/*-----------------------------------------------------------*/
void vApplicationIdleHook( void )
{
/* This variable is effectively set to a constant so it is made volatile to
ensure the compiler does not just get rid of it. */
volatile portLONG lValue;
/* Keep performing a calculation and checking the result against a constant. */
for( ;; )
{
/* Perform the calculation. This will store partial value in
registers, resulting in a good test of the context switch mechanism. */
lValue = intgCONST1;
lValue += intgCONST2;
lValue *= intgCONST3;
lValue /= intgCONST4;
/* Did we perform the calculation correctly with no corruption? */
if( lValue != intgEXPECTED_ANSWER )
{
/* Error! */
portENTER_CRITICAL();
xLocalError = pdTRUE;
portEXIT_CRITICAL();
}
/* Yield in case cooperative scheduling is being used. */
#if configUSE_PREEMPTION == 0
{
taskYIELD();
}
#endif
}
}
/*-----------------------------------------------------------*/
static void vButtonTask( void *pvParameters )
{
unsigned portBASE_TYPE uxExpected = 1, uxReceived;
/* Create the queue used by the producer and consumer. */
xButtonQueue = xQueueCreate( mainBUTTON_QUEUE_SIZE, ( unsigned portBASE_TYPE ) sizeof( unsigned portBASE_TYPE ) );
if( xButtonQueue )
{
/* Now the queue is created it is safe to enable the button interrupt. */
ButtonInterrupt_Enable();
for( ;; )
{
/* Simply wait for data to arrive from the button push interrupt. */
if( xQueueReceive( xButtonQueue, &uxReceived, portMAX_DELAY ) == pdPASS )
{
/* Was the data we received that expected? */
if( uxReceived != uxExpected )
{
/* Error! */
portENTER_CRITICAL();
xLocalError = pdTRUE;
portEXIT_CRITICAL();
}
else
{
/* Toggle the LED for every successful push. */
vParTestToggleLED( mainBUTTON_PUSH_LED );
}
uxExpected++;
}
}
}
/* Will only get here if the queue could not be created. */
for( ;; );
}
/*-----------------------------------------------------------*/
#pragma CODE_SEG __NEAR_SEG NON_BANKED
/* Button push ISR. */
void interrupt vButtonPush( void )
{
static unsigned portBASE_TYPE uxValToSend = 0;
/* Send an incrementing value to the button push task each run. */
uxValToSend++;
/* Clear the interrupt flag. */
PIFP = 1;
/* Send the incremented value down the queue. The button push task is
blocked waiting for the data. As the button push task is high priority
it will wake and a context switch should be performed before leaving
the ISR. */
if( xQueueSendFromISR( xButtonQueue, &uxValToSend, pdFALSE ) )
{
/* NOTE: This macro can only be used if there are no local
variables defined. This function uses a static variable so it's
use is permitted. If the variable were not static portYIELD()
would have to be used in it's place. */
portTASK_SWITCH_FROM_ISR();
}
}
#pragma CODE_SEG DEFAULT

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/* logical s-record file */
OPENFILE "%ABS_FILE%.s19"
format=motorola
busWidth=1
origin=0
len=0x1000000
destination=0
SRECORD=Sx
SENDBYTE 1 "%ABS_FILE%"
CLOSE
/* physical s-record file */
OPENFILE "%ABS_FILE%.phy"
format = motorola
busWidth = 1
len = 0x4000
origin = 0x008000
destination = 0x000000
SENDBYTE 1 "%ABS_FILE%"
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destination = 0x004000
SENDBYTE 1 "%ABS_FILE%"
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destination = 0x008000
SENDBYTE 1 "%ABS_FILE%"
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SENDBYTE 1 "%ABS_FILE%"
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SENDBYTE 1 "%ABS_FILE%"
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SENDBYTE 1 "%ABS_FILE%"
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SENDBYTE 1 "%ABS_FILE%"
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SENDBYTE 1 "%ABS_FILE%"
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SENDBYTE 1 "%ABS_FILE%"
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SENDBYTE 1 "%ABS_FILE%"
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SENDBYTE 1 "%ABS_FILE%"
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SENDBYTE 1 "%ABS_FILE%"
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SENDBYTE 1 "%ABS_FILE%"
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SENDBYTE 1 "%ABS_FILE%"
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SENDBYTE 1 "%ABS_FILE%"
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SENDBYTE 1 "%ABS_FILE%"
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SENDBYTE 1 "%ABS_FILE%"
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destination = 0x0F8000
SENDBYTE 1 "%ABS_FILE%"
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destination = 0x0F8000
SENDBYTE 1 "%ABS_FILE%"
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SENDBYTE 1 "%ABS_FILE%"
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SENDBYTE 1 "%ABS_FILE%"
CLOSE

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//------------------------------------------------------------------------
// Readme.txt
//------------------------------------------------------------------------
This project stationery is designed to get you up and running
quickly with CodeWarrior for MC9S12C32.
It is set up for the selected CPU and target connection,
but can be easily modified.
Sample code for the following language(s) is at your disposal:
- C
The wizard has prepared CodeWarrior target(s) with the connection methods of
your choice:
- Simulator:
This interface/target is prepared to use the FCS (Full Chip Simulation).
- SofTec:
This target interface connects to any of the USB-based SofTec Microsystems tools for HC(S)12.
Additional connections can be chosen in the simulator/debugger,
use the menu Component > Set Target.
//------------------------------------------------------------------------
// Processor Expert
//------------------------------------------------------------------------
This project is prepared to be designed with Processor Expert.
The project has an additional 'tab' named 'Processor Expert' where you
can configure the CPU and its beans.
The CPU selected is inserted into the Processor Expert project panel, in
the Debug and Release configurations.
Change of the configuration is possible by the mouse double-click on it.
All the installed Embedded Beans are accessible in the Bean Selector
window, grouped into folders according to their function. The mouse
double-click on selected Embedded Bean in the Bean Selector window adds
the Bean to the project. The mouse double-click on the Bean icon in the
Project panel opens the Bean Inspector window, which is used to set the
Bean properties. Source code is generated after selecting the
(Code Design 'Project_name.mcp') menu command from the CodeWarrior main
window (Processor Expert > Code design 'Project_name.mcp').
Use the bean methods and events to write your code in the main module
'Project_name'.c and the event module Events.c.
For more help please read Processor Expert help:
(Processor Expert > Help > 'Topic').
The following folders are used in CodeWarrior project window for
ProcessorExpert:
- User modules: contains your sources. The main module 'Project_name'.c
and event module Events.c are located here after the Processor Expert
code generation.
- Prm: Linker parameter file used for linking. Note that the file used
for the linker is specified in the Linker Preference Panel. To open
the Preference Panel, please press <ALT-F7> or open the
(Edit > 'Current Build Target Name' Settings...) menu item in the
CodeWarrior main window menu, while the project window is opened).
After Processor Expert code generation 'Project_name'.prm file
will be placed here. You can switch off the .prm file generation in
Processor Expert if you want (in the CPU bean, Build Options)
- Generated code: this folder appears after the Processor Expert code
generation and contains generated code from Processor Expert.
- Doc: other files generated from the Processor Expert (documentation)
//------------------------------------------------------------------------
// Getting Started
//------------------------------------------------------------------------
To build/debug your project, use the menu Project > Debug or press F5.
This will open the simulator/debugger.
Press again F5 in the debugger (or menu Run > Start/Continue) to start
the application. The menu Run > Halt or F6 stops the application.
In the debugger menu Component > Open you can load additional components.
//------------------------------------------------------------------------
// Project structure
//------------------------------------------------------------------------
The project generated contains various files/folders:
- readme.txt: this file
- Sources: folder with the application source code
- Startup Code: C/C++ startup code
- Prm:
- burner.bbl file to generate S-Records
- Linker Map: the .map file generated by the linker
- Libraries: needed library files (ANSI, derivative header/implementation files)
- Debugger Project File: contains a .ini file for the debugger for each
connection
- Debugger Cmd Files: contains sub-folders for each connection with command
files
//------------------------------------------------------------------------
// Adding your own code
//------------------------------------------------------------------------
Once everything is working as expected, you can begin adding your own code
to the project. Keep in mind that we provide this as an example of how to
get up and running quickly with CodeWarrior. There are certainly other
ways to handle interrupts and set up your linker command file. Feel free
to modify any of the source files provided.
//------------------------------------------------------------------------
// Simulator/Debugger: Additional components
//------------------------------------------------------------------------
In the simulator/debugger, you can load additional components. Try the menu
Component > Open.
//------------------------------------------------------------------------
// Additional documentation
//------------------------------------------------------------------------
Check out the online documentation provided. Use in CodeWarrior IDE the
menu Help > Online Manuals.
//------------------------------------------------------------------------
// Contacting Metrowerks
//------------------------------------------------------------------------
For bug reports, technical questions, and suggestions, please use the
forms installed in the Release_Notes folder and send them to:
USA: support@metrowerks.com
EUROPE: support_europe@metrowerks.com
ASIA/PACIFIC: j-emb-sup@metrowerks.com

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/*
FreeRTOS.org V4.7.1 - Copyright (C) 2003-2008 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
Please ensure to read the configuration and relevant port sections of the
online documentation.
+++ http://www.FreeRTOS.org +++
Documentation, latest information, license and contact details.
+++ http://www.SafeRTOS.com +++
A version that is certified for use in safety critical systems.
+++ http://www.OpenRTOS.com +++
Commercial support, development, porting, licensing and training services.
***************************************************************************
*/
/* BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER for port 1.
Note that this driver is written to test the RTOS port and is not intended
to represent an optimised solution. */
/* Standard include files. */
#include <stdlib.h>
/* Scheduler include files. */
#include "FreeRTOS.h"
#include "queue.h"
#include "task.h"
/* Demo application include files. */
#include "serial.h"
/*
* Initialise port 1 for interrupt driven communications.
*/
xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
{
return NULL;
}
/*-----------------------------------------------------------*/
signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )
{
return pdFALSE;
}
/*-----------------------------------------------------------*/
signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
{
signed portBASE_TYPE xReturn = pdPASS;
return xReturn;
}
/*-----------------------------------------------------------*/
void vSerialClose( xComPortHandle xPort )
{
/* Not supported. */
( void ) xPort;
}
/*-----------------------------------------------------------*/