mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-09-01 20:03:50 -04:00
Add trace hook macro for most ports (#794)
Add trace hook macro for most ports In pull request #659 we introduced better support for tracing tools like systemview. This patchset adds support for more ports as requested in the original pull request.
This commit is contained in:
parent
83861f5b1d
commit
d43062ba78
103 changed files with 1005 additions and 134 deletions
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@ -233,13 +233,19 @@ void xPortSysTickHandler( void )
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uint32_t ulPreviousMask;
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ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
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traceISR_ENTER();
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{
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/* Increment the RTOS tick. */
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if( xTaskIncrementTick() != pdFALSE )
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{
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traceISR_EXIT_TO_SCHEDULER();
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/* Pend a context switch. */
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portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET;
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}
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else
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{
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traceISR_EXIT();
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}
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}
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portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
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}
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@ -86,9 +86,21 @@ typedef unsigned long UBaseType_t;
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extern void vPortYield( void );
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#define portNVIC_INT_CTRL ( ( volatile uint32_t * ) 0xe000ed04 )
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#define portNVIC_PENDSVSET 0x10000000
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#define portYIELD() vPortYield()
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#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET
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#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
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#define portYIELD() vPortYield()
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#define portEND_SWITCHING_ISR( xSwitchRequired ) \
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do \
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{ \
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if( xSwitchRequired != pdFALSE ) \
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{ \
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traceISR_EXIT_TO_SCHEDULER(); \
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*( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET \
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} \
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else \
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{ \
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traceISR_EXIT(); \
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} \
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} while( 0 )
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#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
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/*-----------------------------------------------------------*/
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@ -977,13 +977,19 @@ void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */
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uint32_t ulPreviousMask;
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ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
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traceISR_ENTER();
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{
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/* Increment the RTOS tick. */
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if( xTaskIncrementTick() != pdFALSE )
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{
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traceISR_EXIT_TO_SCHEDULER();
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/* Pend a context switch. */
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portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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}
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else
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{
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traceISR_EXIT();
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}
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}
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portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
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}
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@ -338,9 +338,19 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
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#define portYIELD() vPortYield()
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#define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
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#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
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#define portEND_SWITCHING_ISR( xSwitchRequired ) \
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do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } \
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while( 0 )
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#define portEND_SWITCHING_ISR( xSwitchRequired ) \
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do \
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{ \
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if( xSwitchRequired ) \
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{ \
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traceISR_EXIT_TO_SCHEDULER(); \
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portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
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} \
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else \
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{ \
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traceISR_EXIT(); \
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} \
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} while( 0 )
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#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
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/*-----------------------------------------------------------*/
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@ -977,13 +977,19 @@ void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */
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uint32_t ulPreviousMask;
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ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
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traceISR_ENTER();
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{
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/* Increment the RTOS tick. */
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if( xTaskIncrementTick() != pdFALSE )
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{
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traceISR_EXIT_TO_SCHEDULER();
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/* Pend a context switch. */
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portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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}
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else
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{
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traceISR_EXIT();
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}
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}
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portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
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}
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@ -338,9 +338,19 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
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#define portYIELD() vPortYield()
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#define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
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#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
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#define portEND_SWITCHING_ISR( xSwitchRequired ) \
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do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } \
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while( 0 )
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#define portEND_SWITCHING_ISR( xSwitchRequired ) \
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do \
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{ \
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if( xSwitchRequired ) \
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{ \
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traceISR_EXIT_TO_SCHEDULER(); \
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portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
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} \
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else \
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{ \
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traceISR_EXIT(); \
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} \
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} while( 0 )
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#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
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/*-----------------------------------------------------------*/
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@ -355,14 +355,21 @@ void xPortSysTickHandler( void )
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* save and then restore the interrupt mask value as its value is already
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* known. */
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portDISABLE_INTERRUPTS();
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traceISR_ENTER();
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{
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/* Increment the RTOS tick. */
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if( xTaskIncrementTick() != pdFALSE )
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{
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traceISR_EXIT_TO_SCHEDULER();
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/* A context switch is required. Context switching is performed in
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* the PendSV interrupt. Pend the PendSV interrupt. */
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portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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}
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else
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{
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traceISR_EXIT();
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}
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}
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portENABLE_INTERRUPTS();
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}
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@ -100,8 +100,20 @@ typedef unsigned long UBaseType_t;
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#define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
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#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
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#define portEND_SWITCHING_ISR( xSwitchRequired ) do { if( xSwitchRequired != pdFALSE ) portYIELD( ); } while( 0 )
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#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
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#define portEND_SWITCHING_ISR( xSwitchRequired ) \
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do \
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{ \
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if( xSwitchRequired != pdFALSE ) \
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{ \
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traceISR_EXIT_TO_SCHEDULER(); \
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portYIELD(); \
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} \
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else \
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{ \
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traceISR_EXIT(); \
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} \
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} while( 0 )
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#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
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/*-----------------------------------------------------------*/
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@ -977,13 +977,19 @@ void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */
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uint32_t ulPreviousMask;
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ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
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traceISR_ENTER();
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{
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/* Increment the RTOS tick. */
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if( xTaskIncrementTick() != pdFALSE )
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{
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traceISR_EXIT_TO_SCHEDULER();
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/* Pend a context switch. */
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portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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}
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else
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{
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traceISR_EXIT();
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}
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}
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portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
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}
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@ -338,9 +338,19 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
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#define portYIELD() vPortYield()
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#define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
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#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
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#define portEND_SWITCHING_ISR( xSwitchRequired ) \
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do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } \
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while( 0 )
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#define portEND_SWITCHING_ISR( xSwitchRequired ) \
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do \
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{ \
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if( xSwitchRequired ) \
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{ \
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traceISR_EXIT_TO_SCHEDULER(); \
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portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
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} \
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else \
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{ \
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traceISR_EXIT(); \
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} \
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} while( 0 )
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#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
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/*-----------------------------------------------------------*/
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@ -977,13 +977,19 @@ void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */
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uint32_t ulPreviousMask;
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ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
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traceISR_ENTER();
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{
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/* Increment the RTOS tick. */
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if( xTaskIncrementTick() != pdFALSE )
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{
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traceISR_EXIT_TO_SCHEDULER();
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/* Pend a context switch. */
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portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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}
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else
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{
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traceISR_EXIT();
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}
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}
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portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
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}
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@ -338,9 +338,19 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
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#define portYIELD() vPortYield()
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#define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
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#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
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#define portEND_SWITCHING_ISR( xSwitchRequired ) \
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do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } \
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while( 0 )
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#define portEND_SWITCHING_ISR( xSwitchRequired ) \
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do \
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{ \
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if( xSwitchRequired ) \
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{ \
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traceISR_EXIT_TO_SCHEDULER(); \
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portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
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} \
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else \
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{ \
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traceISR_EXIT(); \
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} \
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} while( 0 )
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#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
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/*-----------------------------------------------------------*/
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@ -977,13 +977,19 @@ void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */
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uint32_t ulPreviousMask;
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ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
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traceISR_ENTER();
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{
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/* Increment the RTOS tick. */
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if( xTaskIncrementTick() != pdFALSE )
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{
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traceISR_EXIT_TO_SCHEDULER();
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/* Pend a context switch. */
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portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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}
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else
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{
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traceISR_EXIT();
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}
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}
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portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
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}
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@ -338,9 +338,19 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
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#define portYIELD() vPortYield()
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#define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
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#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
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#define portEND_SWITCHING_ISR( xSwitchRequired ) \
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do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } \
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while( 0 )
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#define portEND_SWITCHING_ISR( xSwitchRequired ) \
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do \
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{ \
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if( xSwitchRequired ) \
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{ \
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traceISR_EXIT_TO_SCHEDULER(); \
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portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
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} \
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else \
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{ \
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traceISR_EXIT(); \
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} \
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} while( 0 )
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#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
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/*-----------------------------------------------------------*/
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@ -977,13 +977,19 @@ void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */
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uint32_t ulPreviousMask;
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ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
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traceISR_ENTER();
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{
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/* Increment the RTOS tick. */
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if( xTaskIncrementTick() != pdFALSE )
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{
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traceISR_EXIT_TO_SCHEDULER();
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/* Pend a context switch. */
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portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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}
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else
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{
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traceISR_EXIT();
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}
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}
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portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
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}
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@ -338,9 +338,19 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
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#define portYIELD() vPortYield()
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#define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
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#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
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#define portEND_SWITCHING_ISR( xSwitchRequired ) \
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do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } \
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while( 0 )
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#define portEND_SWITCHING_ISR( xSwitchRequired ) \
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do \
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{ \
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if( xSwitchRequired ) \
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{ \
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traceISR_EXIT_TO_SCHEDULER(); \
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portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
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} \
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else \
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{ \
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traceISR_EXIT(); \
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} \
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} while( 0 )
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#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
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/*-----------------------------------------------------------*/
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@ -399,14 +399,21 @@ void xPortSysTickHandler( void )
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* save and then restore the interrupt mask value as its value is already
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* known. */
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portDISABLE_INTERRUPTS();
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traceISR_ENTER();
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{
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/* Increment the RTOS tick. */
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if( xTaskIncrementTick() != pdFALSE )
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{
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traceISR_EXIT_TO_SCHEDULER();
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/* A context switch is required. Context switching is performed in
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* the PendSV interrupt. Pend the PendSV interrupt. */
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portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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}
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else
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{
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traceISR_EXIT();
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}
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}
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portENABLE_INTERRUPTS();
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}
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@ -99,8 +99,20 @@ typedef unsigned long UBaseType_t;
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#define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
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#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
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#define portEND_SWITCHING_ISR( xSwitchRequired ) do { if( xSwitchRequired != pdFALSE ) portYIELD( ); } while( 0 )
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#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
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#define portEND_SWITCHING_ISR( xSwitchRequired ) \
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do \
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{ \
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if( xSwitchRequired != pdFALSE ) \
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{ \
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traceISR_EXIT_TO_SCHEDULER(); \
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portYIELD(); \
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} \
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else \
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{ \
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traceISR_EXIT(); \
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} \
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} while( 0 )
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#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
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/*-----------------------------------------------------------*/
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@ -987,14 +987,21 @@ void xPortSysTickHandler( void )
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* save and then restore the interrupt mask value as its value is already
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* known. */
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portDISABLE_INTERRUPTS();
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traceISR_ENTER();
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{
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/* Increment the RTOS tick. */
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if( xTaskIncrementTick() != pdFALSE )
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{
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traceISR_EXIT_TO_SCHEDULER();
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/* A context switch is required. Context switching is performed in
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* the PendSV interrupt. Pend the PendSV interrupt. */
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portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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}
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else
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{
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traceISR_EXIT();
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}
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}
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portENABLE_INTERRUPTS();
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}
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@ -275,8 +275,20 @@ typedef struct MPU_SETTINGS
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#define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
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#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
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#define portEND_SWITCHING_ISR( xSwitchRequired ) do { if( xSwitchRequired != pdFALSE ) portYIELD_WITHIN_API( ); } while( 0 )
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#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
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#define portEND_SWITCHING_ISR( xSwitchRequired ) \
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do \
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{ \
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if( xSwitchRequired != pdFALSE ) \
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{ \
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||||
traceISR_EXIT_TO_SCHEDULER(); \
|
||||
portYIELD_WITHIN_API(); \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
traceISR_EXIT(); \
|
||||
} \
|
||||
} while( 0 )
|
||||
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Architecture specific optimisations. */
|
||||
|
|
|
@ -977,13 +977,19 @@ void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */
|
|||
uint32_t ulPreviousMask;
|
||||
|
||||
ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
|
||||
traceISR_ENTER();
|
||||
{
|
||||
/* Increment the RTOS tick. */
|
||||
if( xTaskIncrementTick() != pdFALSE )
|
||||
{
|
||||
traceISR_EXIT_TO_SCHEDULER();
|
||||
/* Pend a context switch. */
|
||||
portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
|
||||
}
|
||||
else
|
||||
{
|
||||
traceISR_EXIT();
|
||||
}
|
||||
}
|
||||
portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
|
||||
}
|
||||
|
|
|
@ -338,9 +338,19 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
|
|||
#define portYIELD() vPortYield()
|
||||
#define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
|
||||
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) \
|
||||
do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } \
|
||||
while( 0 )
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) \
|
||||
do \
|
||||
{ \
|
||||
if( xSwitchRequired ) \
|
||||
{ \
|
||||
traceISR_EXIT_TO_SCHEDULER(); \
|
||||
portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
traceISR_EXIT(); \
|
||||
} \
|
||||
} while( 0 )
|
||||
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
@ -977,13 +977,19 @@ void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */
|
|||
uint32_t ulPreviousMask;
|
||||
|
||||
ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
|
||||
traceISR_ENTER();
|
||||
{
|
||||
/* Increment the RTOS tick. */
|
||||
if( xTaskIncrementTick() != pdFALSE )
|
||||
{
|
||||
traceISR_EXIT_TO_SCHEDULER();
|
||||
/* Pend a context switch. */
|
||||
portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
|
||||
}
|
||||
else
|
||||
{
|
||||
traceISR_EXIT();
|
||||
}
|
||||
}
|
||||
portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
|
||||
}
|
||||
|
|
|
@ -338,9 +338,19 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
|
|||
#define portYIELD() vPortYield()
|
||||
#define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
|
||||
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) \
|
||||
do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } \
|
||||
while( 0 )
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) \
|
||||
do \
|
||||
{ \
|
||||
if( xSwitchRequired ) \
|
||||
{ \
|
||||
traceISR_EXIT_TO_SCHEDULER(); \
|
||||
portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
traceISR_EXIT(); \
|
||||
} \
|
||||
} while( 0 )
|
||||
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
@ -387,14 +387,21 @@ void xPortSysTickHandler( void )
|
|||
* save and then restore the interrupt mask value as its value is already
|
||||
* known. */
|
||||
portDISABLE_INTERRUPTS();
|
||||
traceISR_ENTER();
|
||||
{
|
||||
/* Increment the RTOS tick. */
|
||||
if( xTaskIncrementTick() != pdFALSE )
|
||||
{
|
||||
traceISR_EXIT_TO_SCHEDULER();
|
||||
|
||||
/* A context switch is required. Context switching is performed in
|
||||
* the PendSV interrupt. Pend the PendSV interrupt. */
|
||||
portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
|
||||
}
|
||||
else
|
||||
{
|
||||
traceISR_EXIT();
|
||||
}
|
||||
}
|
||||
portENABLE_INTERRUPTS();
|
||||
}
|
||||
|
|
|
@ -99,8 +99,20 @@ typedef unsigned long UBaseType_t;
|
|||
|
||||
#define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
|
||||
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) do { if( xSwitchRequired != pdFALSE ) portYIELD( ); } while( 0 )
|
||||
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) \
|
||||
do \
|
||||
{ \
|
||||
if( xSwitchRequired != pdFALSE ) \
|
||||
{ \
|
||||
traceISR_EXIT_TO_SCHEDULER(); \
|
||||
portYIELD(); \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
traceISR_EXIT(); \
|
||||
} \
|
||||
} while( 0 )
|
||||
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
@ -977,13 +977,19 @@ void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */
|
|||
uint32_t ulPreviousMask;
|
||||
|
||||
ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
|
||||
traceISR_ENTER();
|
||||
{
|
||||
/* Increment the RTOS tick. */
|
||||
if( xTaskIncrementTick() != pdFALSE )
|
||||
{
|
||||
traceISR_EXIT_TO_SCHEDULER();
|
||||
/* Pend a context switch. */
|
||||
portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
|
||||
}
|
||||
else
|
||||
{
|
||||
traceISR_EXIT();
|
||||
}
|
||||
}
|
||||
portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
|
||||
}
|
||||
|
|
|
@ -338,9 +338,19 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
|
|||
#define portYIELD() vPortYield()
|
||||
#define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
|
||||
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) \
|
||||
do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } \
|
||||
while( 0 )
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) \
|
||||
do \
|
||||
{ \
|
||||
if( xSwitchRequired ) \
|
||||
{ \
|
||||
traceISR_EXIT_TO_SCHEDULER(); \
|
||||
portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
traceISR_EXIT(); \
|
||||
} \
|
||||
} while( 0 )
|
||||
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
@ -977,13 +977,19 @@ void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */
|
|||
uint32_t ulPreviousMask;
|
||||
|
||||
ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
|
||||
traceISR_ENTER();
|
||||
{
|
||||
/* Increment the RTOS tick. */
|
||||
if( xTaskIncrementTick() != pdFALSE )
|
||||
{
|
||||
traceISR_EXIT_TO_SCHEDULER();
|
||||
/* Pend a context switch. */
|
||||
portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
|
||||
}
|
||||
else
|
||||
{
|
||||
traceISR_EXIT();
|
||||
}
|
||||
}
|
||||
portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
|
||||
}
|
||||
|
|
|
@ -338,9 +338,19 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
|
|||
#define portYIELD() vPortYield()
|
||||
#define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
|
||||
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) \
|
||||
do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } \
|
||||
while( 0 )
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) \
|
||||
do \
|
||||
{ \
|
||||
if( xSwitchRequired ) \
|
||||
{ \
|
||||
traceISR_EXIT_TO_SCHEDULER(); \
|
||||
portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
traceISR_EXIT(); \
|
||||
} \
|
||||
} while( 0 )
|
||||
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
@ -97,8 +97,13 @@ __arm __interwork void vPortExitCritical( void );
|
|||
\
|
||||
if( xSwitchRequired ) \
|
||||
{ \
|
||||
traceISR_EXIT_TO_SCHEDULER(); \
|
||||
vTaskSwitchContext(); \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
traceISR_EXIT(); \
|
||||
} \
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
@ -100,8 +100,13 @@ __arm __interwork void vPortExitCritical( void );
|
|||
\
|
||||
if( xSwitchRequired ) \
|
||||
{ \
|
||||
traceISR_EXIT_TO_SCHEDULER(); \
|
||||
vTaskSwitchContext(); \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
traceISR_EXIT(); \
|
||||
} \
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
@ -100,8 +100,13 @@ __arm __interwork void vPortExitCritical( void );
|
|||
\
|
||||
if( xSwitchRequired ) \
|
||||
{ \
|
||||
traceISR_EXIT_TO_SCHEDULER(); \
|
||||
vTaskSwitchContext(); \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
traceISR_EXIT(); \
|
||||
} \
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
@ -93,9 +93,21 @@ typedef portUBASE_TYPE TickType_t;
|
|||
|
||||
/* Scheduler utilities. */
|
||||
extern void vTaskSwitchContext( void );
|
||||
#define portYIELD() __asm volatile ( "ecall" );
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) do { if( xSwitchRequired ) vTaskSwitchContext( ); } while( 0 )
|
||||
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
|
||||
#define portYIELD() __asm volatile ( "ecall" );
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) \
|
||||
do \
|
||||
{ \
|
||||
if( xSwitchRequired != pdFALSE ) \
|
||||
{ \
|
||||
traceISR_EXIT_TO_SCHEDULER(); \
|
||||
vTaskSwitchContext(); \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
traceISR_EXIT(); \
|
||||
} \
|
||||
} while( 0 )
|
||||
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Critical section management. */
|
||||
|
|
|
@ -101,8 +101,13 @@ __arm __interwork void vPortExitCritical( void );
|
|||
\
|
||||
if( xSwitchRequired ) \
|
||||
{ \
|
||||
traceISR_EXIT_TO_SCHEDULER(); \
|
||||
vTaskSwitchContext(); \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
traceISR_EXIT(); \
|
||||
} \
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
@ -98,8 +98,13 @@ __arm __interwork void vPortExitCritical( void );
|
|||
\
|
||||
if( xSwitchRequired ) \
|
||||
{ \
|
||||
traceISR_EXIT_TO_SCHEDULER(); \
|
||||
vTaskSwitchContext(); \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
traceISR_EXIT(); \
|
||||
} \
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
@ -100,8 +100,13 @@ __arm __interwork void vPortExitCritical( void );
|
|||
\
|
||||
if( xSwitchRequired ) \
|
||||
{ \
|
||||
traceISR_EXIT_TO_SCHEDULER(); \
|
||||
vTaskSwitchContext(); \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
traceISR_EXIT(); \
|
||||
} \
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue