diff --git a/portable/ARMv8M/non_secure/port.c b/portable/ARMv8M/non_secure/port.c index e8ad8cf4c..0ba29f9b4 100644 --- a/portable/ARMv8M/non_secure/port.c +++ b/portable/ARMv8M/non_secure/port.c @@ -977,13 +977,19 @@ void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */ uint32_t ulPreviousMask; ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR(); + traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); /* Pend a context switch. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } + else + { + traceISR_EXIT(); + } } portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask ); } diff --git a/portable/ARMv8M/non_secure/portmacrocommon.h b/portable/ARMv8M/non_secure/portmacrocommon.h index cc2adb7fd..96a28ca4e 100644 --- a/portable/ARMv8M/non_secure/portmacrocommon.h +++ b/portable/ARMv8M/non_secure/portmacrocommon.h @@ -338,9 +338,19 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portYIELD() vPortYield() #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) -#define portEND_SWITCHING_ISR( xSwitchRequired ) \ - do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } \ - while( 0 ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ diff --git a/portable/CCS/ARM_CM3/port.c b/portable/CCS/ARM_CM3/port.c index a1353c8bc..e55b01dbd 100644 --- a/portable/CCS/ARM_CM3/port.c +++ b/portable/CCS/ARM_CM3/port.c @@ -363,14 +363,21 @@ void xPortSysTickHandler( void ) * save and then restore the interrupt mask value as its value is already * known. */ ( void ) portSET_INTERRUPT_MASK_FROM_ISR(); + traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); + /* A context switch is required. Context switching is performed in * the PendSV interrupt. Pend the PendSV interrupt. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } + else + { + traceISR_EXIT(); + } } portCLEAR_INTERRUPT_MASK_FROM_ISR( 0 ); } diff --git a/portable/CCS/ARM_CM3/portmacro.h b/portable/CCS/ARM_CM3/portmacro.h index 6c9edc39e..1d9c8ff75 100644 --- a/portable/CCS/ARM_CM3/portmacro.h +++ b/portable/CCS/ARM_CM3/portmacro.h @@ -97,8 +97,20 @@ typedef unsigned long UBaseType_t; #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) -#define portEND_SWITCHING_ISR( xSwitchRequired ) do { if( xSwitchRequired != pdFALSE ) portYIELD( ); } while( 0 ) -#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired != pdFALSE ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portYIELD(); \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) +#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ diff --git a/portable/CCS/ARM_CM4F/port.c b/portable/CCS/ARM_CM4F/port.c index fa444d593..6cba0913e 100644 --- a/portable/CCS/ARM_CM4F/port.c +++ b/portable/CCS/ARM_CM4F/port.c @@ -388,14 +388,21 @@ void xPortSysTickHandler( void ) * save and then restore the interrupt mask value as its value is already * known. */ ( void ) portSET_INTERRUPT_MASK_FROM_ISR(); + traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); + /* A context switch is required. Context switching is performed in * the PendSV interrupt. Pend the PendSV interrupt. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } + else + { + traceISR_EXIT(); + } } portCLEAR_INTERRUPT_MASK_FROM_ISR( 0 ); } diff --git a/portable/CCS/ARM_CM4F/portmacro.h b/portable/CCS/ARM_CM4F/portmacro.h index ba4f7490d..5d01094c5 100644 --- a/portable/CCS/ARM_CM4F/portmacro.h +++ b/portable/CCS/ARM_CM4F/portmacro.h @@ -91,8 +91,20 @@ typedef unsigned long UBaseType_t; #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) -#define portEND_SWITCHING_ISR( xSwitchRequired ) do { if( xSwitchRequired != pdFALSE ) portYIELD( ); } while( 0 ) -#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired != pdFALSE ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portYIELD(); \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) +#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ diff --git a/portable/CodeWarrior/ColdFire_V1/portmacro.h b/portable/CodeWarrior/ColdFire_V1/portmacro.h index 0f62912d4..d72637801 100644 --- a/portable/CodeWarrior/ColdFire_V1/portmacro.h +++ b/portable/CodeWarrior/ColdFire_V1/portmacro.h @@ -106,8 +106,19 @@ extern void vPortClearInterruptMaskFromISR( UBaseType_t ); #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters ) /*-----------------------------------------------------------*/ -#define portEND_SWITCHING_ISR( xSwitchRequired ) do { if( xSwitchRequired != pdFALSE ) { portYIELD(); } } while( 0 ) - +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired != pdFALSE ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portYIELD(); \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) /* *INDENT-OFF* */ #ifdef __cplusplus diff --git a/portable/CodeWarrior/ColdFire_V2/portmacro.h b/portable/CodeWarrior/ColdFire_V2/portmacro.h index a815e6469..e367e0774 100644 --- a/portable/CodeWarrior/ColdFire_V2/portmacro.h +++ b/portable/CodeWarrior/ColdFire_V2/portmacro.h @@ -105,8 +105,19 @@ extern void vPortClearInterruptMaskFromISR( UBaseType_t ); #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters ) /*-----------------------------------------------------------*/ -#define portEND_SWITCHING_ISR( xSwitchRequired ) do { if( xSwitchRequired != pdFALSE ) { portYIELD(); } } while( 0 ) - +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired != pdFALSE ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portYIELD(); \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) /* *INDENT-OFF* */ #ifdef __cplusplus diff --git a/portable/GCC/ARM_CM0/port.c b/portable/GCC/ARM_CM0/port.c index e67a10fb5..93e6d0489 100644 --- a/portable/GCC/ARM_CM0/port.c +++ b/portable/GCC/ARM_CM0/port.c @@ -375,13 +375,19 @@ void xPortSysTickHandler( void ) uint32_t ulPreviousMask; ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR(); + traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); /* Pend a context switch. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } + else + { + traceISR_EXIT(); + } } portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask ); } diff --git a/portable/GCC/ARM_CM0/portmacro.h b/portable/GCC/ARM_CM0/portmacro.h index df571eb53..3c55b5d0c 100644 --- a/portable/GCC/ARM_CM0/portmacro.h +++ b/portable/GCC/ARM_CM0/portmacro.h @@ -87,9 +87,19 @@ extern void vPortYield( void ); #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) #define portYIELD() vPortYield() -#define portEND_SWITCHING_ISR( xSwitchRequired ) \ - do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } \ - while( 0 ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM23/non_secure/port.c b/portable/GCC/ARM_CM23/non_secure/port.c index e8ad8cf4c..0ba29f9b4 100644 --- a/portable/GCC/ARM_CM23/non_secure/port.c +++ b/portable/GCC/ARM_CM23/non_secure/port.c @@ -977,13 +977,19 @@ void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */ uint32_t ulPreviousMask; ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR(); + traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); /* Pend a context switch. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } + else + { + traceISR_EXIT(); + } } portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask ); } diff --git a/portable/GCC/ARM_CM23/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM23/non_secure/portmacrocommon.h index cc2adb7fd..96a28ca4e 100644 --- a/portable/GCC/ARM_CM23/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM23/non_secure/portmacrocommon.h @@ -338,9 +338,19 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portYIELD() vPortYield() #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) -#define portEND_SWITCHING_ISR( xSwitchRequired ) \ - do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } \ - while( 0 ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/port.c b/portable/GCC/ARM_CM23_NTZ/non_secure/port.c index e8ad8cf4c..0ba29f9b4 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/port.c @@ -977,13 +977,19 @@ void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */ uint32_t ulPreviousMask; ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR(); + traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); /* Pend a context switch. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } + else + { + traceISR_EXIT(); + } } portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask ); } diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM23_NTZ/non_secure/portmacrocommon.h index cc2adb7fd..96a28ca4e 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/portmacrocommon.h @@ -338,9 +338,19 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portYIELD() vPortYield() #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) -#define portEND_SWITCHING_ISR( xSwitchRequired ) \ - do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } \ - while( 0 ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM3/port.c b/portable/GCC/ARM_CM3/port.c index df633d11e..483f81324 100644 --- a/portable/GCC/ARM_CM3/port.c +++ b/portable/GCC/ARM_CM3/port.c @@ -452,14 +452,21 @@ void xPortSysTickHandler( void ) * save and then restore the interrupt mask value as its value is already * known. */ portDISABLE_INTERRUPTS(); + traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); + /* A context switch is required. Context switching is performed in * the PendSV interrupt. Pend the PendSV interrupt. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } + else + { + traceISR_EXIT(); + } } portENABLE_INTERRUPTS(); } diff --git a/portable/GCC/ARM_CM3/portmacro.h b/portable/GCC/ARM_CM3/portmacro.h index 0d6782270..5d91d2139 100644 --- a/portable/GCC/ARM_CM3/portmacro.h +++ b/portable/GCC/ARM_CM3/portmacro.h @@ -95,8 +95,20 @@ typedef unsigned long UBaseType_t; #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) -#define portEND_SWITCHING_ISR( xSwitchRequired ) do { if( xSwitchRequired != pdFALSE ) portYIELD( ); } while( 0 ) -#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired != pdFALSE ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portYIELD(); \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) +#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ /* Critical section management. */ diff --git a/portable/GCC/ARM_CM33/non_secure/port.c b/portable/GCC/ARM_CM33/non_secure/port.c index e8ad8cf4c..0ba29f9b4 100644 --- a/portable/GCC/ARM_CM33/non_secure/port.c +++ b/portable/GCC/ARM_CM33/non_secure/port.c @@ -977,13 +977,19 @@ void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */ uint32_t ulPreviousMask; ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR(); + traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); /* Pend a context switch. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } + else + { + traceISR_EXIT(); + } } portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask ); } diff --git a/portable/GCC/ARM_CM33/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM33/non_secure/portmacrocommon.h index cc2adb7fd..96a28ca4e 100644 --- a/portable/GCC/ARM_CM33/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM33/non_secure/portmacrocommon.h @@ -338,9 +338,19 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portYIELD() vPortYield() #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) -#define portEND_SWITCHING_ISR( xSwitchRequired ) \ - do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } \ - while( 0 ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/port.c b/portable/GCC/ARM_CM33_NTZ/non_secure/port.c index e8ad8cf4c..0ba29f9b4 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/port.c @@ -977,13 +977,19 @@ void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */ uint32_t ulPreviousMask; ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR(); + traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); /* Pend a context switch. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } + else + { + traceISR_EXIT(); + } } portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask ); } diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM33_NTZ/non_secure/portmacrocommon.h index cc2adb7fd..96a28ca4e 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/portmacrocommon.h @@ -338,9 +338,19 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portYIELD() vPortYield() #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) -#define portEND_SWITCHING_ISR( xSwitchRequired ) \ - do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } \ - while( 0 ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM35P/non_secure/port.c b/portable/GCC/ARM_CM35P/non_secure/port.c index e8ad8cf4c..0ba29f9b4 100644 --- a/portable/GCC/ARM_CM35P/non_secure/port.c +++ b/portable/GCC/ARM_CM35P/non_secure/port.c @@ -977,13 +977,19 @@ void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */ uint32_t ulPreviousMask; ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR(); + traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); /* Pend a context switch. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } + else + { + traceISR_EXIT(); + } } portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask ); } diff --git a/portable/GCC/ARM_CM35P/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM35P/non_secure/portmacrocommon.h index cc2adb7fd..96a28ca4e 100644 --- a/portable/GCC/ARM_CM35P/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM35P/non_secure/portmacrocommon.h @@ -338,9 +338,19 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portYIELD() vPortYield() #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) -#define portEND_SWITCHING_ISR( xSwitchRequired ) \ - do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } \ - while( 0 ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM35P_NTZ/non_secure/port.c b/portable/GCC/ARM_CM35P_NTZ/non_secure/port.c index e8ad8cf4c..0ba29f9b4 100644 --- a/portable/GCC/ARM_CM35P_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM35P_NTZ/non_secure/port.c @@ -977,13 +977,19 @@ void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */ uint32_t ulPreviousMask; ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR(); + traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); /* Pend a context switch. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } + else + { + traceISR_EXIT(); + } } portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask ); } diff --git a/portable/GCC/ARM_CM35P_NTZ/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM35P_NTZ/non_secure/portmacrocommon.h index cc2adb7fd..96a28ca4e 100644 --- a/portable/GCC/ARM_CM35P_NTZ/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM35P_NTZ/non_secure/portmacrocommon.h @@ -338,9 +338,19 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portYIELD() vPortYield() #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) -#define portEND_SWITCHING_ISR( xSwitchRequired ) \ - do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } \ - while( 0 ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM3_MPU/port.c b/portable/GCC/ARM_CM3_MPU/port.c index a524f2b2a..3c46dfde8 100644 --- a/portable/GCC/ARM_CM3_MPU/port.c +++ b/portable/GCC/ARM_CM3_MPU/port.c @@ -1057,13 +1057,19 @@ void xPortSysTickHandler( void ) uint32_t ulDummy; ulDummy = portSET_INTERRUPT_MASK_FROM_ISR(); + traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); /* Pend a context switch. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } + else + { + traceISR_EXIT(); + } } portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy ); } diff --git a/portable/GCC/ARM_CM3_MPU/portmacro.h b/portable/GCC/ARM_CM3_MPU/portmacro.h index c844a8e6f..796e5253c 100644 --- a/portable/GCC/ARM_CM3_MPU/portmacro.h +++ b/portable/GCC/ARM_CM3_MPU/portmacro.h @@ -183,9 +183,19 @@ typedef struct MPU_SETTINGS #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) -#define portEND_SWITCHING_ISR( xSwitchRequired ) \ - do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } \ - while( 0 ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM4F/port.c b/portable/GCC/ARM_CM4F/port.c index e5ea4e336..3846a50f6 100644 --- a/portable/GCC/ARM_CM4F/port.c +++ b/portable/GCC/ARM_CM4F/port.c @@ -521,14 +521,21 @@ void xPortSysTickHandler( void ) * save and then restore the interrupt mask value as its value is already * known. */ portDISABLE_INTERRUPTS(); + traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); + /* A context switch is required. Context switching is performed in * the PendSV interrupt. Pend the PendSV interrupt. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } + else + { + traceISR_EXIT(); + } } portENABLE_INTERRUPTS(); } diff --git a/portable/GCC/ARM_CM4F/portmacro.h b/portable/GCC/ARM_CM4F/portmacro.h index 5d70c0e22..40b2d03e9 100644 --- a/portable/GCC/ARM_CM4F/portmacro.h +++ b/portable/GCC/ARM_CM4F/portmacro.h @@ -98,8 +98,20 @@ typedef unsigned long UBaseType_t; #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) -#define portEND_SWITCHING_ISR( xSwitchRequired ) do { if( xSwitchRequired != pdFALSE ) portYIELD( ); } while( 0 ) -#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired != pdFALSE ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portYIELD(); \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) +#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ /* Critical section management. */ diff --git a/portable/GCC/ARM_CM4_MPU/port.c b/portable/GCC/ARM_CM4_MPU/port.c index a59a651f4..861c400cd 100644 --- a/portable/GCC/ARM_CM4_MPU/port.c +++ b/portable/GCC/ARM_CM4_MPU/port.c @@ -1203,13 +1203,19 @@ void xPortSysTickHandler( void ) uint32_t ulDummy; ulDummy = portSET_INTERRUPT_MASK_FROM_ISR(); + traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); /* Pend a context switch. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } + else + { + traceISR_EXIT(); + } } portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy ); } diff --git a/portable/GCC/ARM_CM4_MPU/portmacro.h b/portable/GCC/ARM_CM4_MPU/portmacro.h index e7d0c4105..efe8ed2ef 100644 --- a/portable/GCC/ARM_CM4_MPU/portmacro.h +++ b/portable/GCC/ARM_CM4_MPU/portmacro.h @@ -277,9 +277,19 @@ typedef struct MPU_SETTINGS #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) -#define portEND_SWITCHING_ISR( xSwitchRequired ) \ - do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } \ - while( 0 ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM55/non_secure/port.c b/portable/GCC/ARM_CM55/non_secure/port.c index e8ad8cf4c..0ba29f9b4 100644 --- a/portable/GCC/ARM_CM55/non_secure/port.c +++ b/portable/GCC/ARM_CM55/non_secure/port.c @@ -977,13 +977,19 @@ void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */ uint32_t ulPreviousMask; ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR(); + traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); /* Pend a context switch. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } + else + { + traceISR_EXIT(); + } } portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask ); } diff --git a/portable/GCC/ARM_CM55/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM55/non_secure/portmacrocommon.h index cc2adb7fd..96a28ca4e 100644 --- a/portable/GCC/ARM_CM55/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM55/non_secure/portmacrocommon.h @@ -338,9 +338,19 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portYIELD() vPortYield() #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) -#define portEND_SWITCHING_ISR( xSwitchRequired ) \ - do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } \ - while( 0 ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM55_NTZ/non_secure/port.c b/portable/GCC/ARM_CM55_NTZ/non_secure/port.c index e8ad8cf4c..0ba29f9b4 100644 --- a/portable/GCC/ARM_CM55_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM55_NTZ/non_secure/port.c @@ -977,13 +977,19 @@ void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */ uint32_t ulPreviousMask; ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR(); + traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); /* Pend a context switch. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } + else + { + traceISR_EXIT(); + } } portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask ); } diff --git a/portable/GCC/ARM_CM55_NTZ/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM55_NTZ/non_secure/portmacrocommon.h index cc2adb7fd..96a28ca4e 100644 --- a/portable/GCC/ARM_CM55_NTZ/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM55_NTZ/non_secure/portmacrocommon.h @@ -338,9 +338,19 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portYIELD() vPortYield() #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) -#define portEND_SWITCHING_ISR( xSwitchRequired ) \ - do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } \ - while( 0 ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM7/r0p1/portmacro.h b/portable/GCC/ARM_CM7/r0p1/portmacro.h index d32af2b75..aa2199c25 100644 --- a/portable/GCC/ARM_CM7/r0p1/portmacro.h +++ b/portable/GCC/ARM_CM7/r0p1/portmacro.h @@ -95,9 +95,18 @@ typedef unsigned long UBaseType_t; #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) -#define portEND_SWITCHING_ISR( xSwitchRequired ) \ - do { if( xSwitchRequired != pdFALSE ) { traceISR_EXIT_TO_SCHEDULER(); portYIELD(); } \ - else { traceISR_EXIT(); } \ +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired != pdFALSE ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portYIELD(); \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ } while( 0 ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM85/non_secure/port.c b/portable/GCC/ARM_CM85/non_secure/port.c index e8ad8cf4c..0ba29f9b4 100644 --- a/portable/GCC/ARM_CM85/non_secure/port.c +++ b/portable/GCC/ARM_CM85/non_secure/port.c @@ -977,13 +977,19 @@ void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */ uint32_t ulPreviousMask; ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR(); + traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); /* Pend a context switch. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } + else + { + traceISR_EXIT(); + } } portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask ); } diff --git a/portable/GCC/ARM_CM85/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM85/non_secure/portmacrocommon.h index cc2adb7fd..96a28ca4e 100644 --- a/portable/GCC/ARM_CM85/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM85/non_secure/portmacrocommon.h @@ -338,9 +338,19 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portYIELD() vPortYield() #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) -#define portEND_SWITCHING_ISR( xSwitchRequired ) \ - do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } \ - while( 0 ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM85_NTZ/non_secure/port.c b/portable/GCC/ARM_CM85_NTZ/non_secure/port.c index e8ad8cf4c..0ba29f9b4 100644 --- a/portable/GCC/ARM_CM85_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM85_NTZ/non_secure/port.c @@ -977,13 +977,19 @@ void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */ uint32_t ulPreviousMask; ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR(); + traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); /* Pend a context switch. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } + else + { + traceISR_EXIT(); + } } portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask ); } diff --git a/portable/GCC/ARM_CM85_NTZ/non_secure/portmacrocommon.h b/portable/GCC/ARM_CM85_NTZ/non_secure/portmacrocommon.h index cc2adb7fd..96a28ca4e 100644 --- a/portable/GCC/ARM_CM85_NTZ/non_secure/portmacrocommon.h +++ b/portable/GCC/ARM_CM85_NTZ/non_secure/portmacrocommon.h @@ -338,9 +338,19 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portYIELD() vPortYield() #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) -#define portEND_SWITCHING_ISR( xSwitchRequired ) \ - do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } \ - while( 0 ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ColdFire_V2/portmacro.h b/portable/GCC/ColdFire_V2/portmacro.h index c1df5e9c8..1a1b618d0 100644 --- a/portable/GCC/ColdFire_V2/portmacro.h +++ b/portable/GCC/ColdFire_V2/portmacro.h @@ -105,7 +105,19 @@ extern void vPortClearInterruptMaskFromISR( UBaseType_t ); #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters ) /*-----------------------------------------------------------*/ -#define portEND_SWITCHING_ISR( xSwitchRequired ) do { if( xSwitchRequired != pdFALSE ) { portYIELD(); } } while( 0 ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired != pdFALSE ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portYIELD(); \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) /* *INDENT-OFF* */ diff --git a/portable/GCC/NiosII/portmacro.h b/portable/GCC/NiosII/portmacro.h index c6f1b32bc..b7b1d94a0 100644 --- a/portable/GCC/NiosII/portmacro.h +++ b/portable/GCC/NiosII/portmacro.h @@ -84,9 +84,20 @@ typedef unsigned long UBaseType_t; /*-----------------------------------------------------------*/ extern void vTaskSwitchContext( void ); -#define portYIELD() asm volatile ( "trap" ); -#define portEND_SWITCHING_ISR( xSwitchRequired ) do { if( xSwitchRequired ) vTaskSwitchContext( ); } while( 0 ) - +#define portYIELD() asm volatile ( "trap" ); +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired != pdFALSE ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + vTaskSwitchContext(); \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) /* Include the port_asm.S file where the Context saving/restoring is defined. */ __asm__ ( "\n\t.globl save_context" ); diff --git a/portable/GCC/RISC-V/portmacro.h b/portable/GCC/RISC-V/portmacro.h index 28778c78e..e40af6639 100644 --- a/portable/GCC/RISC-V/portmacro.h +++ b/portable/GCC/RISC-V/portmacro.h @@ -91,9 +91,21 @@ typedef portUBASE_TYPE TickType_t; /* Scheduler utilities. */ extern void vTaskSwitchContext( void ); -#define portYIELD() __asm volatile ( "ecall" ); -#define portEND_SWITCHING_ISR( xSwitchRequired ) do { if( xSwitchRequired ) vTaskSwitchContext( ); } while( 0 ) -#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) +#define portYIELD() __asm volatile ( "ecall" ); +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired != pdFALSE ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + vTaskSwitchContext(); \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) +#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ /* Critical section management. */ diff --git a/portable/GCC/STR75x/portmacro.h b/portable/GCC/STR75x/portmacro.h index 10c13c717..b52d3a513 100644 --- a/portable/GCC/STR75x/portmacro.h +++ b/portable/GCC/STR75x/portmacro.h @@ -129,8 +129,13 @@ extern void vPortExitCritical( void ); \ if( xSwitchRequired ) \ { \ + traceISR_EXIT_TO_SCHEDULER(); \ vTaskSwitchContext(); \ } \ + else \ + { \ + traceISR_EXIT(); \ + } \ } /*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM0/port.c b/portable/IAR/ARM_CM0/port.c index c55af1fd8..f4d77120c 100644 --- a/portable/IAR/ARM_CM0/port.c +++ b/portable/IAR/ARM_CM0/port.c @@ -233,13 +233,19 @@ void xPortSysTickHandler( void ) uint32_t ulPreviousMask; ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR(); + traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); /* Pend a context switch. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET; } + else + { + traceISR_EXIT(); + } } portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask ); } diff --git a/portable/IAR/ARM_CM0/portmacro.h b/portable/IAR/ARM_CM0/portmacro.h index 5dcc949b2..fa8438fec 100644 --- a/portable/IAR/ARM_CM0/portmacro.h +++ b/portable/IAR/ARM_CM0/portmacro.h @@ -86,9 +86,21 @@ typedef unsigned long UBaseType_t; extern void vPortYield( void ); #define portNVIC_INT_CTRL ( ( volatile uint32_t * ) 0xe000ed04 ) #define portNVIC_PENDSVSET 0x10000000 -#define portYIELD() vPortYield() -#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET -#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) +#define portYIELD() vPortYield() +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired != pdFALSE ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) +#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM23/non_secure/port.c b/portable/IAR/ARM_CM23/non_secure/port.c index e8ad8cf4c..0ba29f9b4 100644 --- a/portable/IAR/ARM_CM23/non_secure/port.c +++ b/portable/IAR/ARM_CM23/non_secure/port.c @@ -977,13 +977,19 @@ void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */ uint32_t ulPreviousMask; ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR(); + traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); /* Pend a context switch. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } + else + { + traceISR_EXIT(); + } } portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask ); } diff --git a/portable/IAR/ARM_CM23/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM23/non_secure/portmacrocommon.h index cc2adb7fd..96a28ca4e 100644 --- a/portable/IAR/ARM_CM23/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM23/non_secure/portmacrocommon.h @@ -338,9 +338,19 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portYIELD() vPortYield() #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) -#define portEND_SWITCHING_ISR( xSwitchRequired ) \ - do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } \ - while( 0 ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/port.c b/portable/IAR/ARM_CM23_NTZ/non_secure/port.c index e8ad8cf4c..0ba29f9b4 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/port.c @@ -977,13 +977,19 @@ void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */ uint32_t ulPreviousMask; ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR(); + traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); /* Pend a context switch. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } + else + { + traceISR_EXIT(); + } } portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask ); } diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM23_NTZ/non_secure/portmacrocommon.h index cc2adb7fd..96a28ca4e 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/portmacrocommon.h @@ -338,9 +338,19 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portYIELD() vPortYield() #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) -#define portEND_SWITCHING_ISR( xSwitchRequired ) \ - do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } \ - while( 0 ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM3/port.c b/portable/IAR/ARM_CM3/port.c index 5d44bdb32..1fbe96d44 100644 --- a/portable/IAR/ARM_CM3/port.c +++ b/portable/IAR/ARM_CM3/port.c @@ -355,14 +355,21 @@ void xPortSysTickHandler( void ) * save and then restore the interrupt mask value as its value is already * known. */ portDISABLE_INTERRUPTS(); + traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); + /* A context switch is required. Context switching is performed in * the PendSV interrupt. Pend the PendSV interrupt. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } + else + { + traceISR_EXIT(); + } } portENABLE_INTERRUPTS(); } diff --git a/portable/IAR/ARM_CM3/portmacro.h b/portable/IAR/ARM_CM3/portmacro.h index 7c7d5356d..c90a952e2 100644 --- a/portable/IAR/ARM_CM3/portmacro.h +++ b/portable/IAR/ARM_CM3/portmacro.h @@ -100,8 +100,20 @@ typedef unsigned long UBaseType_t; #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) -#define portEND_SWITCHING_ISR( xSwitchRequired ) do { if( xSwitchRequired != pdFALSE ) portYIELD( ); } while( 0 ) -#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired != pdFALSE ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portYIELD(); \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) +#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM33/non_secure/port.c b/portable/IAR/ARM_CM33/non_secure/port.c index e8ad8cf4c..0ba29f9b4 100644 --- a/portable/IAR/ARM_CM33/non_secure/port.c +++ b/portable/IAR/ARM_CM33/non_secure/port.c @@ -977,13 +977,19 @@ void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */ uint32_t ulPreviousMask; ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR(); + traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); /* Pend a context switch. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } + else + { + traceISR_EXIT(); + } } portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask ); } diff --git a/portable/IAR/ARM_CM33/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM33/non_secure/portmacrocommon.h index cc2adb7fd..96a28ca4e 100644 --- a/portable/IAR/ARM_CM33/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM33/non_secure/portmacrocommon.h @@ -338,9 +338,19 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portYIELD() vPortYield() #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) -#define portEND_SWITCHING_ISR( xSwitchRequired ) \ - do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } \ - while( 0 ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/port.c b/portable/IAR/ARM_CM33_NTZ/non_secure/port.c index e8ad8cf4c..0ba29f9b4 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/port.c @@ -977,13 +977,19 @@ void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */ uint32_t ulPreviousMask; ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR(); + traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); /* Pend a context switch. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } + else + { + traceISR_EXIT(); + } } portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask ); } diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM33_NTZ/non_secure/portmacrocommon.h index cc2adb7fd..96a28ca4e 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/portmacrocommon.h @@ -338,9 +338,19 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portYIELD() vPortYield() #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) -#define portEND_SWITCHING_ISR( xSwitchRequired ) \ - do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } \ - while( 0 ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM35P/non_secure/port.c b/portable/IAR/ARM_CM35P/non_secure/port.c index e8ad8cf4c..0ba29f9b4 100644 --- a/portable/IAR/ARM_CM35P/non_secure/port.c +++ b/portable/IAR/ARM_CM35P/non_secure/port.c @@ -977,13 +977,19 @@ void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */ uint32_t ulPreviousMask; ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR(); + traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); /* Pend a context switch. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } + else + { + traceISR_EXIT(); + } } portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask ); } diff --git a/portable/IAR/ARM_CM35P/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM35P/non_secure/portmacrocommon.h index cc2adb7fd..96a28ca4e 100644 --- a/portable/IAR/ARM_CM35P/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM35P/non_secure/portmacrocommon.h @@ -338,9 +338,19 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portYIELD() vPortYield() #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) -#define portEND_SWITCHING_ISR( xSwitchRequired ) \ - do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } \ - while( 0 ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM35P_NTZ/non_secure/port.c b/portable/IAR/ARM_CM35P_NTZ/non_secure/port.c index e8ad8cf4c..0ba29f9b4 100644 --- a/portable/IAR/ARM_CM35P_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM35P_NTZ/non_secure/port.c @@ -977,13 +977,19 @@ void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */ uint32_t ulPreviousMask; ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR(); + traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); /* Pend a context switch. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } + else + { + traceISR_EXIT(); + } } portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask ); } diff --git a/portable/IAR/ARM_CM35P_NTZ/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM35P_NTZ/non_secure/portmacrocommon.h index cc2adb7fd..96a28ca4e 100644 --- a/portable/IAR/ARM_CM35P_NTZ/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM35P_NTZ/non_secure/portmacrocommon.h @@ -338,9 +338,19 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portYIELD() vPortYield() #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) -#define portEND_SWITCHING_ISR( xSwitchRequired ) \ - do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } \ - while( 0 ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM4F/port.c b/portable/IAR/ARM_CM4F/port.c index dd328160b..effedcb14 100644 --- a/portable/IAR/ARM_CM4F/port.c +++ b/portable/IAR/ARM_CM4F/port.c @@ -399,14 +399,21 @@ void xPortSysTickHandler( void ) * save and then restore the interrupt mask value as its value is already * known. */ portDISABLE_INTERRUPTS(); + traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); + /* A context switch is required. Context switching is performed in * the PendSV interrupt. Pend the PendSV interrupt. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } + else + { + traceISR_EXIT(); + } } portENABLE_INTERRUPTS(); } diff --git a/portable/IAR/ARM_CM4F/portmacro.h b/portable/IAR/ARM_CM4F/portmacro.h index 5c4369418..20467efcb 100644 --- a/portable/IAR/ARM_CM4F/portmacro.h +++ b/portable/IAR/ARM_CM4F/portmacro.h @@ -99,8 +99,20 @@ typedef unsigned long UBaseType_t; #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) -#define portEND_SWITCHING_ISR( xSwitchRequired ) do { if( xSwitchRequired != pdFALSE ) portYIELD( ); } while( 0 ) -#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired != pdFALSE ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portYIELD(); \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) +#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM4F_MPU/port.c b/portable/IAR/ARM_CM4F_MPU/port.c index 2d90c348c..f7b9f45ce 100644 --- a/portable/IAR/ARM_CM4F_MPU/port.c +++ b/portable/IAR/ARM_CM4F_MPU/port.c @@ -987,14 +987,21 @@ void xPortSysTickHandler( void ) * save and then restore the interrupt mask value as its value is already * known. */ portDISABLE_INTERRUPTS(); + traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); + /* A context switch is required. Context switching is performed in * the PendSV interrupt. Pend the PendSV interrupt. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } + else + { + traceISR_EXIT(); + } } portENABLE_INTERRUPTS(); } diff --git a/portable/IAR/ARM_CM4F_MPU/portmacro.h b/portable/IAR/ARM_CM4F_MPU/portmacro.h index 8a5538064..15e65619c 100644 --- a/portable/IAR/ARM_CM4F_MPU/portmacro.h +++ b/portable/IAR/ARM_CM4F_MPU/portmacro.h @@ -275,8 +275,20 @@ typedef struct MPU_SETTINGS #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) -#define portEND_SWITCHING_ISR( xSwitchRequired ) do { if( xSwitchRequired != pdFALSE ) portYIELD_WITHIN_API( ); } while( 0 ) -#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired != pdFALSE ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portYIELD_WITHIN_API(); \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) +#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ /* Architecture specific optimisations. */ diff --git a/portable/IAR/ARM_CM55/non_secure/port.c b/portable/IAR/ARM_CM55/non_secure/port.c index e8ad8cf4c..0ba29f9b4 100644 --- a/portable/IAR/ARM_CM55/non_secure/port.c +++ b/portable/IAR/ARM_CM55/non_secure/port.c @@ -977,13 +977,19 @@ void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */ uint32_t ulPreviousMask; ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR(); + traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); /* Pend a context switch. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } + else + { + traceISR_EXIT(); + } } portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask ); } diff --git a/portable/IAR/ARM_CM55/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM55/non_secure/portmacrocommon.h index cc2adb7fd..96a28ca4e 100644 --- a/portable/IAR/ARM_CM55/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM55/non_secure/portmacrocommon.h @@ -338,9 +338,19 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portYIELD() vPortYield() #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) -#define portEND_SWITCHING_ISR( xSwitchRequired ) \ - do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } \ - while( 0 ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM55_NTZ/non_secure/port.c b/portable/IAR/ARM_CM55_NTZ/non_secure/port.c index e8ad8cf4c..0ba29f9b4 100644 --- a/portable/IAR/ARM_CM55_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM55_NTZ/non_secure/port.c @@ -977,13 +977,19 @@ void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */ uint32_t ulPreviousMask; ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR(); + traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); /* Pend a context switch. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } + else + { + traceISR_EXIT(); + } } portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask ); } diff --git a/portable/IAR/ARM_CM55_NTZ/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM55_NTZ/non_secure/portmacrocommon.h index cc2adb7fd..96a28ca4e 100644 --- a/portable/IAR/ARM_CM55_NTZ/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM55_NTZ/non_secure/portmacrocommon.h @@ -338,9 +338,19 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portYIELD() vPortYield() #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) -#define portEND_SWITCHING_ISR( xSwitchRequired ) \ - do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } \ - while( 0 ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM7/r0p1/port.c b/portable/IAR/ARM_CM7/r0p1/port.c index 6d2c122d1..58129a4df 100644 --- a/portable/IAR/ARM_CM7/r0p1/port.c +++ b/portable/IAR/ARM_CM7/r0p1/port.c @@ -387,14 +387,21 @@ void xPortSysTickHandler( void ) * save and then restore the interrupt mask value as its value is already * known. */ portDISABLE_INTERRUPTS(); + traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); + /* A context switch is required. Context switching is performed in * the PendSV interrupt. Pend the PendSV interrupt. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } + else + { + traceISR_EXIT(); + } } portENABLE_INTERRUPTS(); } diff --git a/portable/IAR/ARM_CM7/r0p1/portmacro.h b/portable/IAR/ARM_CM7/r0p1/portmacro.h index 5f1c0488c..a6c377b6b 100644 --- a/portable/IAR/ARM_CM7/r0p1/portmacro.h +++ b/portable/IAR/ARM_CM7/r0p1/portmacro.h @@ -99,8 +99,20 @@ typedef unsigned long UBaseType_t; #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) -#define portEND_SWITCHING_ISR( xSwitchRequired ) do { if( xSwitchRequired != pdFALSE ) portYIELD( ); } while( 0 ) -#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired != pdFALSE ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portYIELD(); \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) +#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM85/non_secure/port.c b/portable/IAR/ARM_CM85/non_secure/port.c index e8ad8cf4c..0ba29f9b4 100644 --- a/portable/IAR/ARM_CM85/non_secure/port.c +++ b/portable/IAR/ARM_CM85/non_secure/port.c @@ -977,13 +977,19 @@ void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */ uint32_t ulPreviousMask; ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR(); + traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); /* Pend a context switch. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } + else + { + traceISR_EXIT(); + } } portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask ); } diff --git a/portable/IAR/ARM_CM85/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM85/non_secure/portmacrocommon.h index cc2adb7fd..96a28ca4e 100644 --- a/portable/IAR/ARM_CM85/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM85/non_secure/portmacrocommon.h @@ -338,9 +338,19 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portYIELD() vPortYield() #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) -#define portEND_SWITCHING_ISR( xSwitchRequired ) \ - do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } \ - while( 0 ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM85_NTZ/non_secure/port.c b/portable/IAR/ARM_CM85_NTZ/non_secure/port.c index e8ad8cf4c..0ba29f9b4 100644 --- a/portable/IAR/ARM_CM85_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM85_NTZ/non_secure/port.c @@ -977,13 +977,19 @@ void SysTick_Handler( void ) /* PRIVILEGED_FUNCTION */ uint32_t ulPreviousMask; ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR(); + traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); /* Pend a context switch. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } + else + { + traceISR_EXIT(); + } } portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask ); } diff --git a/portable/IAR/ARM_CM85_NTZ/non_secure/portmacrocommon.h b/portable/IAR/ARM_CM85_NTZ/non_secure/portmacrocommon.h index cc2adb7fd..96a28ca4e 100644 --- a/portable/IAR/ARM_CM85_NTZ/non_secure/portmacrocommon.h +++ b/portable/IAR/ARM_CM85_NTZ/non_secure/portmacrocommon.h @@ -338,9 +338,19 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P #define portYIELD() vPortYield() #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) -#define portEND_SWITCHING_ISR( xSwitchRequired ) \ - do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } \ - while( 0 ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ diff --git a/portable/IAR/AtmelSAM7S64/portmacro.h b/portable/IAR/AtmelSAM7S64/portmacro.h index dbea59237..337139712 100644 --- a/portable/IAR/AtmelSAM7S64/portmacro.h +++ b/portable/IAR/AtmelSAM7S64/portmacro.h @@ -97,8 +97,13 @@ __arm __interwork void vPortExitCritical( void ); \ if( xSwitchRequired ) \ { \ + traceISR_EXIT_TO_SCHEDULER(); \ vTaskSwitchContext(); \ } \ + else \ + { \ + traceISR_EXIT(); \ + } \ } /*-----------------------------------------------------------*/ diff --git a/portable/IAR/AtmelSAM9XE/portmacro.h b/portable/IAR/AtmelSAM9XE/portmacro.h index 54af3f1d6..6a234933e 100644 --- a/portable/IAR/AtmelSAM9XE/portmacro.h +++ b/portable/IAR/AtmelSAM9XE/portmacro.h @@ -100,8 +100,13 @@ __arm __interwork void vPortExitCritical( void ); \ if( xSwitchRequired ) \ { \ + traceISR_EXIT_TO_SCHEDULER(); \ vTaskSwitchContext(); \ } \ + else \ + { \ + traceISR_EXIT(); \ + } \ } /*-----------------------------------------------------------*/ diff --git a/portable/IAR/LPC2000/portmacro.h b/portable/IAR/LPC2000/portmacro.h index 28b8d7e77..40231e408 100644 --- a/portable/IAR/LPC2000/portmacro.h +++ b/portable/IAR/LPC2000/portmacro.h @@ -100,8 +100,13 @@ __arm __interwork void vPortExitCritical( void ); \ if( xSwitchRequired ) \ { \ + traceISR_EXIT_TO_SCHEDULER(); \ vTaskSwitchContext(); \ } \ + else \ + { \ + traceISR_EXIT(); \ + } \ } /*-----------------------------------------------------------*/ diff --git a/portable/IAR/RISC-V/portmacro.h b/portable/IAR/RISC-V/portmacro.h index f9431a6de..eba9eb6f2 100644 --- a/portable/IAR/RISC-V/portmacro.h +++ b/portable/IAR/RISC-V/portmacro.h @@ -93,9 +93,21 @@ typedef portUBASE_TYPE TickType_t; /* Scheduler utilities. */ extern void vTaskSwitchContext( void ); -#define portYIELD() __asm volatile ( "ecall" ); -#define portEND_SWITCHING_ISR( xSwitchRequired ) do { if( xSwitchRequired ) vTaskSwitchContext( ); } while( 0 ) -#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) +#define portYIELD() __asm volatile ( "ecall" ); +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired != pdFALSE ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + vTaskSwitchContext(); \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) +#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ /* Critical section management. */ diff --git a/portable/IAR/STR71x/portmacro.h b/portable/IAR/STR71x/portmacro.h index 7fa132cd9..7f5096c9d 100644 --- a/portable/IAR/STR71x/portmacro.h +++ b/portable/IAR/STR71x/portmacro.h @@ -101,8 +101,13 @@ __arm __interwork void vPortExitCritical( void ); \ if( xSwitchRequired ) \ { \ + traceISR_EXIT_TO_SCHEDULER(); \ vTaskSwitchContext(); \ } \ + else \ + { \ + traceISR_EXIT(); \ + } \ } /*-----------------------------------------------------------*/ diff --git a/portable/IAR/STR75x/portmacro.h b/portable/IAR/STR75x/portmacro.h index edbddd4d3..8be4a1a44 100644 --- a/portable/IAR/STR75x/portmacro.h +++ b/portable/IAR/STR75x/portmacro.h @@ -98,8 +98,13 @@ __arm __interwork void vPortExitCritical( void ); \ if( xSwitchRequired ) \ { \ + traceISR_EXIT_TO_SCHEDULER(); \ vTaskSwitchContext(); \ } \ + else \ + { \ + traceISR_EXIT(); \ + } \ } /*-----------------------------------------------------------*/ diff --git a/portable/IAR/STR91x/portmacro.h b/portable/IAR/STR91x/portmacro.h index fc4506d32..853b80139 100644 --- a/portable/IAR/STR91x/portmacro.h +++ b/portable/IAR/STR91x/portmacro.h @@ -100,8 +100,13 @@ __arm __interwork void vPortExitCritical( void ); \ if( xSwitchRequired ) \ { \ + traceISR_EXIT_TO_SCHEDULER(); \ vTaskSwitchContext(); \ } \ + else \ + { \ + traceISR_EXIT(); \ + } \ } /*-----------------------------------------------------------*/ diff --git a/portable/MPLAB/PIC32MEC14xx/portmacro.h b/portable/MPLAB/PIC32MEC14xx/portmacro.h index e20d7b68e..2b1fb9fa6 100644 --- a/portable/MPLAB/PIC32MEC14xx/portmacro.h +++ b/portable/MPLAB/PIC32MEC14xx/portmacro.h @@ -240,7 +240,19 @@ extern volatile UBaseType_t uxInterruptNesting; #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters ) /*-----------------------------------------------------------*/ -#define portEND_SWITCHING_ISR( xSwitchRequired ) do { if( xSwitchRequired ) { portYIELD(); } } while( 0 ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired != pdFALSE ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portYIELD(); \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) /* Required by the kernel aware debugger. */ #ifdef __DEBUG diff --git a/portable/MPLAB/PIC32MX/portmacro.h b/portable/MPLAB/PIC32MX/portmacro.h index 535104d20..89777d80b 100644 --- a/portable/MPLAB/PIC32MX/portmacro.h +++ b/portable/MPLAB/PIC32MX/portmacro.h @@ -191,7 +191,19 @@ extern volatile UBaseType_t uxInterruptNesting; #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters ) /*-----------------------------------------------------------*/ -#define portEND_SWITCHING_ISR( xSwitchRequired ) do { if( xSwitchRequired ) { portYIELD(); } } while( 0 ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired != pdFALSE ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portYIELD(); \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) /* Required by the kernel aware debugger. */ #ifdef __DEBUG diff --git a/portable/MPLAB/PIC32MZ/portmacro.h b/portable/MPLAB/PIC32MZ/portmacro.h index 63b69b436..050bb31fa 100644 --- a/portable/MPLAB/PIC32MZ/portmacro.h +++ b/portable/MPLAB/PIC32MZ/portmacro.h @@ -203,7 +203,19 @@ extern volatile UBaseType_t uxInterruptNesting; #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters ) /*-----------------------------------------------------------*/ -#define portEND_SWITCHING_ISR( xSwitchRequired ) do { if( xSwitchRequired ) { portYIELD(); } } while( 0 ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired != pdFALSE ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portYIELD(); \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) /* Required by the kernel aware debugger. */ #ifdef __DEBUG diff --git a/portable/MikroC/ARM_CM4F/port.c b/portable/MikroC/ARM_CM4F/port.c index a1c3f4e61..1e5075d1d 100644 --- a/portable/MikroC/ARM_CM4F/port.c +++ b/portable/MikroC/ARM_CM4F/port.c @@ -509,14 +509,21 @@ void xPortSysTickHandler( void ) iv IVT_INT_SysTick ics ICS_AUTO * known - therefore the slightly faster portDISABLE_INTERRUPTS() function is * used in place of portSET_INTERRUPT_MASK_FROM_ISR(). */ portDISABLE_INTERRUPTS(); + traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); + /* A context switch is required. Context switching is performed in * the PendSV interrupt. Pend the PendSV interrupt. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } + else + { + traceISR_EXIT(); + } } portENABLE_INTERRUPTS(); } diff --git a/portable/MikroC/ARM_CM4F/portmacro.h b/portable/MikroC/ARM_CM4F/portmacro.h index c7b4aae0f..6c169773c 100644 --- a/portable/MikroC/ARM_CM4F/portmacro.h +++ b/portable/MikroC/ARM_CM4F/portmacro.h @@ -99,8 +99,20 @@ typedef unsigned long UBaseType_t; #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) -#define portEND_SWITCHING_ISR( xSwitchRequired ) do { if( xSwitchRequired != pdFALSE ) portYIELD( ); } while( 0 ) -#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired != pdFALSE ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portYIELD(); \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) +#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ /* Critical section management. */ diff --git a/portable/RVDS/ARM_CM0/port.c b/portable/RVDS/ARM_CM0/port.c index 6af94943f..96947d215 100644 --- a/portable/RVDS/ARM_CM0/port.c +++ b/portable/RVDS/ARM_CM0/port.c @@ -352,13 +352,19 @@ void xPortSysTickHandler( void ) uint32_t ulPreviousMask; ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR(); + traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); /* Pend a context switch. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } + else + { + traceISR_EXIT(); + } } portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask ); } diff --git a/portable/RVDS/ARM_CM0/portmacro.h b/portable/RVDS/ARM_CM0/portmacro.h index 134ee23b8..1b5821a71 100644 --- a/portable/RVDS/ARM_CM0/portmacro.h +++ b/portable/RVDS/ARM_CM0/portmacro.h @@ -86,9 +86,19 @@ extern void vPortYield( void ); #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) #define portYIELD() vPortYield() -#define portEND_SWITCHING_ISR( xSwitchRequired ) \ - do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } \ - while( 0 ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ diff --git a/portable/RVDS/ARM_CM3/port.c b/portable/RVDS/ARM_CM3/port.c index ab9fb9f6b..9a6af5acc 100644 --- a/portable/RVDS/ARM_CM3/port.c +++ b/portable/RVDS/ARM_CM3/port.c @@ -449,14 +449,21 @@ void xPortSysTickHandler( void ) * known - therefore the slightly faster vPortRaiseBASEPRI() function is used * in place of portSET_INTERRUPT_MASK_FROM_ISR(). */ vPortRaiseBASEPRI(); + traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); + /* A context switch is required. Context switching is performed in * the PendSV interrupt. Pend the PendSV interrupt. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } + else + { + traceISR_EXIT(); + } } vPortClearBASEPRIFromISR(); diff --git a/portable/RVDS/ARM_CM3/portmacro.h b/portable/RVDS/ARM_CM3/portmacro.h index 56f59a6e9..4b8fbdb99 100644 --- a/portable/RVDS/ARM_CM3/portmacro.h +++ b/portable/RVDS/ARM_CM3/portmacro.h @@ -99,8 +99,20 @@ typedef unsigned long UBaseType_t; #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) -#define portEND_SWITCHING_ISR( xSwitchRequired ) do { if( xSwitchRequired != pdFALSE ) portYIELD( ); } while( 0 ) -#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired != pdFALSE ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portYIELD(); \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) +#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ /* Critical section management. */ diff --git a/portable/RVDS/ARM_CM4F/port.c b/portable/RVDS/ARM_CM4F/port.c index 6794feb3f..c6d825b82 100644 --- a/portable/RVDS/ARM_CM4F/port.c +++ b/portable/RVDS/ARM_CM4F/port.c @@ -545,14 +545,21 @@ void xPortSysTickHandler( void ) * known - therefore the slightly faster vPortRaiseBASEPRI() function is used * in place of portSET_INTERRUPT_MASK_FROM_ISR(). */ vPortRaiseBASEPRI(); + traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); + /* A context switch is required. Context switching is performed in * the PendSV interrupt. Pend the PendSV interrupt. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } + else + { + traceISR_EXIT(); + } } vPortClearBASEPRIFromISR(); diff --git a/portable/RVDS/ARM_CM4F/portmacro.h b/portable/RVDS/ARM_CM4F/portmacro.h index 645926822..03ea9e95a 100644 --- a/portable/RVDS/ARM_CM4F/portmacro.h +++ b/portable/RVDS/ARM_CM4F/portmacro.h @@ -99,8 +99,20 @@ typedef unsigned long UBaseType_t; #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) -#define portEND_SWITCHING_ISR( xSwitchRequired ) do { if( xSwitchRequired != pdFALSE ) portYIELD( ); } while( 0 ) -#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired != pdFALSE ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portYIELD(); \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) +#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ /* Critical section management. */ diff --git a/portable/RVDS/ARM_CM4_MPU/port.c b/portable/RVDS/ARM_CM4_MPU/port.c index e5324945a..68562f8ed 100644 --- a/portable/RVDS/ARM_CM4_MPU/port.c +++ b/portable/RVDS/ARM_CM4_MPU/port.c @@ -1185,13 +1185,19 @@ void xPortSysTickHandler( void ) uint32_t ulDummy; ulDummy = portSET_INTERRUPT_MASK_FROM_ISR(); + traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); /* Pend a context switch. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } + else + { + traceISR_EXIT(); + } } portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy ); } diff --git a/portable/RVDS/ARM_CM4_MPU/portmacro.h b/portable/RVDS/ARM_CM4_MPU/portmacro.h index 4566fba1c..6f7954e9f 100644 --- a/portable/RVDS/ARM_CM4_MPU/portmacro.h +++ b/portable/RVDS/ARM_CM4_MPU/portmacro.h @@ -281,9 +281,19 @@ typedef struct MPU_SETTINGS #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) -#define portEND_SWITCHING_ISR( xSwitchRequired ) \ - do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } \ - while( 0 ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ diff --git a/portable/RVDS/ARM_CM7/r0p1/port.c b/portable/RVDS/ARM_CM7/r0p1/port.c index a7dddc4eb..49310786c 100644 --- a/portable/RVDS/ARM_CM7/r0p1/port.c +++ b/portable/RVDS/ARM_CM7/r0p1/port.c @@ -531,14 +531,21 @@ void xPortSysTickHandler( void ) * known - therefore the slightly faster vPortRaiseBASEPRI() function is used * in place of portSET_INTERRUPT_MASK_FROM_ISR(). */ vPortRaiseBASEPRI(); + traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); + /* A context switch is required. Context switching is performed in * the PendSV interrupt. Pend the PendSV interrupt. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } + else + { + traceISR_EXIT(); + } } vPortClearBASEPRIFromISR(); diff --git a/portable/RVDS/ARM_CM7/r0p1/portmacro.h b/portable/RVDS/ARM_CM7/r0p1/portmacro.h index efc1a1a43..2fcf53dfa 100644 --- a/portable/RVDS/ARM_CM7/r0p1/portmacro.h +++ b/portable/RVDS/ARM_CM7/r0p1/portmacro.h @@ -99,8 +99,20 @@ typedef unsigned long UBaseType_t; #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) -#define portEND_SWITCHING_ISR( xSwitchRequired ) do { if( xSwitchRequired != pdFALSE ) portYIELD( ); } while( 0 ) -#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired != pdFALSE ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portYIELD(); \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) +#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ /* Critical section management. */ diff --git a/portable/Tasking/ARM_CM4F/port.c b/portable/Tasking/ARM_CM4F/port.c index 55237166b..bc01af91f 100644 --- a/portable/Tasking/ARM_CM4F/port.c +++ b/portable/Tasking/ARM_CM4F/port.c @@ -246,12 +246,18 @@ void SysTick_Handler( void ) uint32_t ulDummy; ulDummy = portSET_INTERRUPT_MASK_FROM_ISR(); + traceISR_ENTER(); { if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); /* Pend a context switch. */ *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET; } + else + { + traceISR_EXIT(); + } } portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy ); } diff --git a/portable/Tasking/ARM_CM4F/portmacro.h b/portable/Tasking/ARM_CM4F/portmacro.h index 1f159e4b8..516d856d8 100644 --- a/portable/Tasking/ARM_CM4F/portmacro.h +++ b/portable/Tasking/ARM_CM4F/portmacro.h @@ -86,10 +86,22 @@ typedef unsigned long UBaseType_t; extern void vPortYield( void ); #define portNVIC_INT_CTRL ( ( volatile uint32_t * ) 0xe000ed04 ) #define portNVIC_PENDSVSET 0x10000000 -#define portYIELD() vPortYield() +#define portYIELD() vPortYield() -#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET -#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired != pdFALSE ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET; \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) +#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ diff --git a/portable/ThirdParty/CDK/T-HEAD_CK802/port.c b/portable/ThirdParty/CDK/T-HEAD_CK802/port.c index 900bae8b7..6e953a0cb 100644 --- a/portable/ThirdParty/CDK/T-HEAD_CK802/port.c +++ b/portable/ThirdParty/CDK/T-HEAD_CK802/port.c @@ -125,11 +125,17 @@ void vPortExitCritical( void ) portLONG ulDummy; ulDummy = portSET_INTERRUPT_MASK_FROM_ISR(); + traceISR_ENTER(); { if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); portYIELD_FROM_ISR( pdTRUE ); } + else + { + traceISR_EXIT(); + } } portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy ); } diff --git a/portable/ThirdParty/CDK/T-HEAD_CK802/portmacro.h b/portable/ThirdParty/CDK/T-HEAD_CK802/portmacro.h index d91f5251e..76c72f488 100644 --- a/portable/ThirdParty/CDK/T-HEAD_CK802/portmacro.h +++ b/portable/ThirdParty/CDK/T-HEAD_CK802/portmacro.h @@ -152,8 +152,13 @@ extern portLONG pendsvflag; do { \ if( xSwitchRequired != pdFALSE ) \ { \ + traceISR_EXIT_TO_SCHEDULER(); \ portYIELD(); \ } \ + else \ + { \ + traceISR_EXIT(); \ + } \ } while( 0 ) #define portYIELD_FROM_ISR( a ) vTaskSwitchContext() diff --git a/portable/ThirdParty/GCC/Posix/portmacro.h b/portable/ThirdParty/GCC/Posix/portmacro.h index 6d141f145..6de25da45 100644 --- a/portable/ThirdParty/GCC/Posix/portmacro.h +++ b/portable/ThirdParty/GCC/Posix/portmacro.h @@ -81,10 +81,22 @@ typedef unsigned long TickType_t; /* Scheduler utilities. */ extern void vPortYield( void ); -#define portYIELD() vPortYield() +#define portYIELD() vPortYield() -#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) vPortYield( ) -#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired != pdFALSE ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + vPortYield(); \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) +#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ /* Critical section management. */ diff --git a/portable/ThirdParty/GCC/RP2040/include/portmacro.h b/portable/ThirdParty/GCC/RP2040/include/portmacro.h index e1c483458..2b3f822b5 100644 --- a/portable/ThirdParty/GCC/RP2040/include/portmacro.h +++ b/portable/ThirdParty/GCC/RP2040/include/portmacro.h @@ -97,9 +97,21 @@ typedef uint32_t UBaseType_t; extern void vPortYield( void ); #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) -#define portYIELD() vPortYield() -#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT -#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) +#define portYIELD() vPortYield() +#define portEND_SWITCHING_ISR( xSwitchRequired ) \ + do \ + { \ + if( xSwitchRequired ) \ + { \ + traceISR_EXIT_TO_SCHEDULER(); \ + portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \ + } \ + else \ + { \ + traceISR_EXIT(); \ + } \ + } while( 0 ) +#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ diff --git a/portable/ThirdParty/GCC/RP2040/port.c b/portable/ThirdParty/GCC/RP2040/port.c index aef32afba..d022ca2fa 100644 --- a/portable/ThirdParty/GCC/RP2040/port.c +++ b/portable/ThirdParty/GCC/RP2040/port.c @@ -741,13 +741,19 @@ void xPortSysTickHandler( void ) uint32_t ulPreviousMask; ulPreviousMask = taskENTER_CRITICAL_FROM_ISR(); + traceISR_ENTER(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); /* Pend a context switch. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } + else + { + traceISR_EXIT(); + } } taskEXIT_CRITICAL_FROM_ISR( ulPreviousMask ); } diff --git a/portable/ThirdParty/GCC/Xtensa_ESP32/port_systick.c b/portable/ThirdParty/GCC/Xtensa_ESP32/port_systick.c index 69d8e9a03..b7a49170b 100644 --- a/portable/ThirdParty/GCC/Xtensa_ESP32/port_systick.c +++ b/portable/ThirdParty/GCC/Xtensa_ESP32/port_systick.c @@ -185,6 +185,7 @@ BaseType_t xPortSysTickHandler( void ) if( ret != pdFALSE ) { + traceISR_EXIT_TO_SCHEDULER(); portYIELD_FROM_ISR(); } else