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https://github.com/FreeRTOS/FreeRTOS-Kernel.git
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Replicate to other Cortex M ports
Also set a new fiddle factor based on tests with a CM4F. I used gcc, optimizing at -O1. Users can fine-tune as needed. Also add configSYSTICK_CLOCK_HZ to the CM0 ports to be just like the other Cortex M ports. This change allowed uniformity in the default tickless implementations across all Cortex M ports. And CM0 is likely to benefit from configSYSTICK_CLOCK_HZ, especially considering new CM0 devices with very fast CPU clock speeds.
This commit is contained in:
Jeff Tenney
parent
aded661d97
commit
cfabb61191
25 changed files with 2613 additions and 1583 deletions
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@ -76,20 +76,13 @@
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#define portNVIC_SHPR3_REG ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
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#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
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#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
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#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
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#define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
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#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
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#define portNVIC_PEND_SYSTICK_SET_BIT ( 1UL << 26UL )
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#define portMIN_INTERRUPT_PRIORITY ( 255UL )
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#define portNVIC_PENDSV_PRI ( portMIN_INTERRUPT_PRIORITY << 16UL )
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#define portNVIC_SYSTICK_PRI ( portMIN_INTERRUPT_PRIORITY << 24UL )
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#ifndef configSYSTICK_CLOCK_HZ
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#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
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/* Ensure the SysTick is clocked at the same frequency as the core. */
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#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
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#else
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/* The way the SysTick is clocked is not modified in case it is not the
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* same a the core. */
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#define portNVIC_SYSTICK_CLK_BIT ( 0 )
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#endif
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/*-----------------------------------------------------------*/
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/**
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@ -197,7 +190,7 @@
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* have occurred while the SysTick counter is stopped during tickless idle
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* calculations.
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*/
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#define portMISSED_COUNTS_FACTOR ( 45UL )
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#define portMISSED_COUNTS_FACTOR ( 94UL )
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/*-----------------------------------------------------------*/
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/**
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@ -256,6 +249,22 @@
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#define portINITIAL_CONTROL_UNPRIVILEGED ( 0x3 )
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#define portINITIAL_CONTROL_PRIVILEGED ( 0x2 )
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/**
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* @brief Let the user override the default SysTick clock rate. If defined by the
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* user, this symbol must equal the SysTick clock rate when the CLK bit is 0 in the
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* configuration register.
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*/
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#ifndef configSYSTICK_CLOCK_HZ
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#define configSYSTICK_CLOCK_HZ ( configCPU_CLOCK_HZ )
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/* Ensure the SysTick is clocked at the same frequency as the core. */
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#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( portNVIC_SYSTICK_CLK_BIT )
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#else
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/* Select the option to clock SysTick not at the same frequency as the core.
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* The clock used is often a divided version of the core clock. */
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#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( 0 )
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#endif
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/**
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* @brief Let the user override the pre-loading of the initial LR with the
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* address of prvTaskExitError() in case it messes up unwinding of the stack
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@ -384,7 +393,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
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#if ( configUSE_TICKLESS_IDLE == 1 )
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__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
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{
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uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
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uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
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TickType_t xModifiableIdleTime;
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/* Make sure the SysTick reload value does not overflow the counter. */
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@ -393,22 +402,6 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
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xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
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}
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/* Stop the SysTick momentarily. The time the SysTick is stopped for is
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* accounted for as best it can be, but using the tickless mode will
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* inevitably result in some tiny drift of the time maintained by the
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* kernel with respect to calendar time. */
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portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
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/* Calculate the reload value required to wait xExpectedIdleTime
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* tick periods. -1 is used because this code will execute part way
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* through one of the tick periods. */
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ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
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if( ulReloadValue > ulStoppedTimerCompensation )
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{
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ulReloadValue -= ulStoppedTimerCompensation;
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}
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/* Enter a critical section but don't use the taskENTER_CRITICAL()
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* method as that will mask interrupts that should exit sleep mode. */
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__asm volatile ( "cpsid i" ::: "memory" );
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@ -416,26 +409,52 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
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__asm volatile ( "isb" );
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/* If a context switch is pending or a task is waiting for the scheduler
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* to be un-suspended then abandon the low power entry. */
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* to be unsuspended then abandon the low power entry. */
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if( eTaskConfirmSleepModeStatus() == eAbortSleep )
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{
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/* Restart from whatever is left in the count register to complete
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* this tick period. */
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portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
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/* Restart SysTick. */
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portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
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/* Reset the reload register to the value required for normal tick
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* periods. */
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portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
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/* Re-enable interrupts - see comments above the cpsid instruction()
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/* Re-enable interrupts - see comments above the cpsid instruction
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* above. */
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__asm volatile ( "cpsie i" ::: "memory" );
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}
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else
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{
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/* Stop the SysTick momentarily. The time the SysTick is stopped for
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* is accounted for as best it can be, but using the tickless mode will
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* inevitably result in some tiny drift of the time maintained by the
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* kernel with respect to calendar time. */
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portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
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/* Use the SysTick current-value register to determine the number of
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* SysTick decrements remaining until the next tick interrupt. If the
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* current-value register is zero, then there are actually
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* ulTimerCountsForOneTick decrements remaining, not zero, because the
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* SysTick requests the interrupt when decrementing from 1 to 0. */
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ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
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if( ulSysTickDecrementsLeft == 0 )
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{
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ulSysTickDecrementsLeft = ulTimerCountsForOneTick;
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}
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/* Calculate the reload value required to wait xExpectedIdleTime
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* tick periods. -1 is used because this code normally executes part
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* way through the first tick period. But if the SysTick IRQ is now
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* pending, then clear the IRQ, suppressing the first tick, and correct
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* the reload value to reflect that the second tick period is already
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* underway. The expected idle time is always at least two ticks. */
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ulReloadValue = ulSysTickDecrementsLeft + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
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if( ( portNVIC_INT_CTRL_REG & portNVIC_PEND_SYSTICK_SET_BIT ) != 0 )
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{
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portNVIC_INT_CTRL_REG = portNVIC_PEND_SYSTICK_CLEAR_BIT;
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ulReloadValue -= ulTimerCountsForOneTick;
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}
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if( ulReloadValue > ulStoppedTimerCompensation )
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{
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ulReloadValue -= ulStoppedTimerCompensation;
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}
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/* Set the new reload value. */
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portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
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@ -446,12 +465,11 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
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/* Restart SysTick. */
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portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
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/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
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* set its parameter to 0 to indicate that its implementation
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* contains its own wait for interrupt or wait for event
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* instruction, and so wfi should not be executed again. However,
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* the original expected idle time variable must remain unmodified,
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* so a copy is taken. */
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/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
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* set its parameter to 0 to indicate that its implementation contains
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* its own wait for interrupt or wait for event instruction, and so wfi
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* should not be executed again. However, the original expected idle
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* time variable must remain unmodified, so a copy is taken. */
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xModifiableIdleTime = xExpectedIdleTime;
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configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
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@ -465,47 +483,43 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
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configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
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/* Re-enable interrupts to allow the interrupt that brought the MCU
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* out of sleep mode to execute immediately. See comments above
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* out of sleep mode to execute immediately. See comments above
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* the cpsid instruction above. */
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__asm volatile ( "cpsie i" ::: "memory" );
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__asm volatile ( "dsb" );
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__asm volatile ( "isb" );
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/* Disable interrupts again because the clock is about to be stopped
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* and interrupts that execute while the clock is stopped will
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* increase any slippage between the time maintained by the RTOS and
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* calendar time. */
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* and interrupts that execute while the clock is stopped will increase
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* any slippage between the time maintained by the RTOS and calendar
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* time. */
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__asm volatile ( "cpsid i" ::: "memory" );
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__asm volatile ( "dsb" );
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__asm volatile ( "isb" );
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/* Disable the SysTick clock without reading the
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* portNVIC_SYSTICK_CTRL_REG register to ensure the
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* portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.
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* Again, the time the SysTick is stopped for is accounted for as
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* best it can be, but using the tickless mode will inevitably
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* result in some tiny drift of the time maintained by the kernel
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* with respect to calendar time*/
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portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
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* portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set. Again,
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* the time the SysTick is stopped for is accounted for as best it can
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* be, but using the tickless mode will inevitably result in some tiny
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* drift of the time maintained by the kernel with respect to calendar
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* time*/
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portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
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/* Determine if the SysTick clock has already counted to zero and
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* been set back to the current reload value (the reload back being
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* correct for the entire expected idle time) or if the SysTick is
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* yet to count to zero (in which case an interrupt other than the
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* SysTick must have brought the system out of sleep mode). */
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/* Determine whether the SysTick has already counted to zero. */
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if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
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{
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uint32_t ulCalculatedLoadValue;
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/* The tick interrupt is already pending, and the SysTick count
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* reloaded with ulReloadValue. Reset the
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* portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
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* period. */
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/* The tick interrupt ended the sleep (or is now pending), and
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* a new tick period has started. Reset portNVIC_SYSTICK_LOAD_REG
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* with whatever remains of the new tick period. */
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ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
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/* Don't allow a tiny value, or values that have somehow
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* underflowed because the post sleep hook did something
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* that took too long. */
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* that took too long or because the SysTick current-value register
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* is zero. */
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if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
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{
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ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
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portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
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/* As the pending tick will be processed as soon as this
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* function exits, the tick value maintained by the tick is
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* stepped forward by one less than the time spent waiting. */
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* function exits, the tick value maintained by the tick is stepped
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* forward by one less than the time spent waiting. */
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ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
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}
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else
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{
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/* Something other than the tick interrupt ended the sleep.
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* Work out how long the sleep lasted rounded to complete tick
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/* Something other than the tick interrupt ended the sleep. */
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/* Use the SysTick current-value register to determine the
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* number of SysTick decrements remaining until the expected idle
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* time would have ended. */
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ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
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#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
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{
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/* If the SysTick is not using the core clock, the current-
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* value register might still be zero here. In that case, the
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* SysTick didn't load from the reload register, and there are
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* ulReloadValue + 1 decrements remaining, not zero. */
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if( ulSysTickDecrementsLeft == 0 )
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{
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ulSysTickDecrementsLeft = ulReloadValue + 1UL;
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}
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}
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#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
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/* Work out how long the sleep lasted rounded to complete tick
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* periods (not the ulReload value which accounted for part
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* ticks). */
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ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
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ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - ulSysTickDecrementsLeft;
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/* How many complete tick periods passed while the processor
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* was waiting? */
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@ -535,13 +567,26 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
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portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
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}
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/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
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* again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
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* value. */
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/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG again,
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* then set portNVIC_SYSTICK_LOAD_REG back to its standard value. If
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* the SysTick is not using the core clock, temporarily configure it to
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* use the core clock. This configuration forces the SysTick to load
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* from portNVIC_SYSTICK_LOAD_REG immediately instead of at the next
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* cycle of the other clock. Then portNVIC_SYSTICK_LOAD_REG is ready
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* to receive the standard value immediately. */
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portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
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portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
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vTaskStepTick( ulCompleteTickPeriods );
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portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
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portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
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#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
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{
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/* The temporary usage of the core clock has served its purpose,
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* as described above. Resume usage of the other clock. */
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portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
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}
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#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
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/* Step the tick to account for any tick periods that elapsed. */
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vTaskStepTick( ulCompleteTickPeriods );
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/* Exit with interrupts enabled. */
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__asm volatile ( "cpsie i" ::: "memory" );
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@ -567,7 +612,7 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FU
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/* Configure SysTick to interrupt at the requested rate. */
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portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
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portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
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portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
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}
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/*-----------------------------------------------------------*/
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@ -36,27 +36,18 @@
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#error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See http: /*www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
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#endif
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#ifndef configSYSTICK_CLOCK_HZ
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#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
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/* Ensure the SysTick is clocked at the same frequency as the core. */
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#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
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#else
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/* The way the SysTick is clocked is not modified in case it is not the same
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* as the core. */
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#define portNVIC_SYSTICK_CLK_BIT ( 0 )
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#endif
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/* Constants required to manipulate the core. Registers first... */
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#define portNVIC_SYSTICK_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000e010 ) )
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#define portNVIC_SYSTICK_LOAD_REG ( *( ( volatile uint32_t * ) 0xe000e014 ) )
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#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( *( ( volatile uint32_t * ) 0xe000e018 ) )
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#define portNVIC_SHPR3_REG ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
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/* ...then bits in the registers. */
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#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
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#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
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#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
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#define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
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#define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL )
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#define portNVIC_PEND_SYSTICK_SET_BIT ( 1UL << 26UL )
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#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
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#define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
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@ -84,12 +75,26 @@
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/* A fiddle factor to estimate the number of SysTick counts that would have
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* occurred while the SysTick counter is stopped during tickless idle
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* calculations. */
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#define portMISSED_COUNTS_FACTOR ( 45UL )
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#define portMISSED_COUNTS_FACTOR ( 94UL )
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/* For strict compliance with the Cortex-M spec the task start address should
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* have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
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||||
#define portSTART_ADDRESS_MASK ( ( StackType_t ) 0xfffffffeUL )
|
||||
|
||||
/* Let the user override the default SysTick clock rate. If defined by the
|
||||
* user, this symbol must equal the SysTick clock rate when the CLK bit is 0 in the
|
||||
* configuration register. */
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ ( configCPU_CLOCK_HZ )
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( portNVIC_SYSTICK_CLK_BIT )
|
||||
#else
|
||||
|
||||
/* Select the option to clock SysTick not at the same frequency as the core.
|
||||
* The clock used is often a divided version of the core clock. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( 0 )
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Setup the timer to generate the tick interrupts. The implementation in this
|
||||
* file is weak to allow application writers to change the timer used to
|
||||
|
|
@ -354,7 +359,7 @@ void xPortSysTickHandler( void )
|
|||
#pragma WEAK( vPortSuppressTicksAndSleep )
|
||||
void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
||||
{
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
||||
TickType_t xModifiableIdleTime;
|
||||
|
||||
/* Make sure the SysTick reload value does not overflow the counter. */
|
||||
|
|
@ -363,22 +368,6 @@ void xPortSysTickHandler( void )
|
|||
xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
|
||||
}
|
||||
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for
|
||||
* is accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code will execute part way
|
||||
* through one of the tick periods. */
|
||||
ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Enter a critical section but don't use the taskENTER_CRITICAL()
|
||||
* method as that will mask interrupts that should exit sleep mode. */
|
||||
__asm( " cpsid i");
|
||||
|
|
@ -389,23 +378,49 @@ void xPortSysTickHandler( void )
|
|||
* to be unsuspended then abandon the low power entry. */
|
||||
if( eTaskConfirmSleepModeStatus() == eAbortSleep )
|
||||
{
|
||||
/* Restart from whatever is left in the count register to complete
|
||||
* this tick period. */
|
||||
portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
/* Restart SysTick. */
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Reset the reload register to the value required for normal tick
|
||||
* periods. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
|
||||
/* Re-enable interrupts - see comments above __disable_interrupt()
|
||||
* call above. */
|
||||
/* Re-enable interrupts - see comments above the cpsid instruction
|
||||
* above. */
|
||||
__asm( " cpsie i");
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for
|
||||
* is accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Use the SysTick current-value register to determine the number of
|
||||
* SysTick decrements remaining until the next tick interrupt. If the
|
||||
* current-value register is zero, then there are actually
|
||||
* ulTimerCountsForOneTick decrements remaining, not zero, because the
|
||||
* SysTick requests the interrupt when decrementing from 1 to 0. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code normally executes part
|
||||
* way through the first tick period. But if the SysTick IRQ is now
|
||||
* pending, then clear the IRQ, suppressing the first tick, and correct
|
||||
* the reload value to reflect that the second tick period is already
|
||||
* underway. The expected idle time is always at least two ticks. */
|
||||
ulReloadValue = ulSysTickDecrementsLeft + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ( portNVIC_INT_CTRL_REG & portNVIC_PEND_SYSTICK_SET_BIT ) != 0 )
|
||||
{
|
||||
portNVIC_INT_CTRL_REG = portNVIC_PEND_SYSTICK_CLEAR_BIT;
|
||||
ulReloadValue -= ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Set the new reload value. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
|
||||
|
||||
|
|
@ -434,8 +449,8 @@ void xPortSysTickHandler( void )
|
|||
configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
|
||||
|
||||
/* Re-enable interrupts to allow the interrupt that brought the MCU
|
||||
* out of sleep mode to execute immediately. see comments above
|
||||
* __disable_interrupt() call above. */
|
||||
* out of sleep mode to execute immediately. See comments above
|
||||
* the cpsid instruction above. */
|
||||
__asm( " cpsie i");
|
||||
__asm( " dsb");
|
||||
__asm( " isb");
|
||||
|
|
@ -455,26 +470,22 @@ void xPortSysTickHandler( void )
|
|||
* be, but using the tickless mode will inevitably result in some tiny
|
||||
* drift of the time maintained by the kernel with respect to calendar
|
||||
* time*/
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Determine if the SysTick clock has already counted to zero and
|
||||
* been set back to the current reload value (the reload back being
|
||||
* correct for the entire expected idle time) or if the SysTick is yet
|
||||
* to count to zero (in which case an interrupt other than the SysTick
|
||||
* must have brought the system out of sleep mode). */
|
||||
/* Determine whether the SysTick has already counted to zero. */
|
||||
if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
|
||||
{
|
||||
uint32_t ulCalculatedLoadValue;
|
||||
|
||||
/* The tick interrupt is already pending, and the SysTick count
|
||||
* reloaded with ulReloadValue. Reset the
|
||||
* portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
|
||||
* period. */
|
||||
/* The tick interrupt ended the sleep (or is now pending), and
|
||||
* a new tick period has started. Reset portNVIC_SYSTICK_LOAD_REG
|
||||
* with whatever remains of the new tick period. */
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
|
||||
|
||||
/* Don't allow a tiny value, or values that have somehow
|
||||
* underflowed because the post sleep hook did something
|
||||
* that took too long. */
|
||||
* that took too long or because the SysTick current-value register
|
||||
* is zero. */
|
||||
if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
|
||||
{
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
|
||||
|
|
@ -489,11 +500,29 @@ void xPortSysTickHandler( void )
|
|||
}
|
||||
else
|
||||
{
|
||||
/* Something other than the tick interrupt ended the sleep.
|
||||
* Work out how long the sleep lasted rounded to complete tick
|
||||
/* Something other than the tick interrupt ended the sleep. */
|
||||
|
||||
/* Use the SysTick current-value register to determine the
|
||||
* number of SysTick decrements remaining until the expected idle
|
||||
* time would have ended. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* If the SysTick is not using the core clock, the current-
|
||||
* value register might still be zero here. In that case, the
|
||||
* SysTick didn't load from the reload register, and there are
|
||||
* ulReloadValue + 1 decrements remaining, not zero. */
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulReloadValue + 1UL;
|
||||
}
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Work out how long the sleep lasted rounded to complete tick
|
||||
* periods (not the ulReload value which accounted for part
|
||||
* ticks). */
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - ulSysTickDecrementsLeft;
|
||||
|
||||
/* How many complete tick periods passed while the processor
|
||||
* was waiting? */
|
||||
|
|
@ -504,13 +533,26 @@ void xPortSysTickHandler( void )
|
|||
portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
|
||||
}
|
||||
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
|
||||
* again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
|
||||
* value. */
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG again,
|
||||
* then set portNVIC_SYSTICK_LOAD_REG back to its standard value. If
|
||||
* the SysTick is not using the core clock, temporarily configure it to
|
||||
* use the core clock. This configuration forces the SysTick to load
|
||||
* from portNVIC_SYSTICK_LOAD_REG immediately instead of at the next
|
||||
* cycle of the other clock. Then portNVIC_SYSTICK_LOAD_REG is ready
|
||||
* to receive the standard value immediately. */
|
||||
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* The temporary usage of the core clock has served its purpose,
|
||||
* as described above. Resume usage of the other clock. */
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Step the tick to account for any tick periods that elapsed. */
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
|
||||
/* Exit with interrupts enabled. */
|
||||
__asm( " cpsie i");
|
||||
|
|
@ -542,7 +584,7 @@ void vPortSetupTimerInterrupt( void )
|
|||
|
||||
/* Configure SysTick to interrupt at the requested rate. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
|||
|
|
@ -40,27 +40,18 @@
|
|||
#error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See http: /*www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
|
||||
#endif
|
||||
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
|
||||
#else
|
||||
|
||||
/* The way the SysTick is clocked is not modified in case it is not the same
|
||||
* as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 0 )
|
||||
#endif
|
||||
|
||||
/* Constants required to manipulate the core. Registers first... */
|
||||
#define portNVIC_SYSTICK_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000e010 ) )
|
||||
#define portNVIC_SYSTICK_LOAD_REG ( *( ( volatile uint32_t * ) 0xe000e014 ) )
|
||||
#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( *( ( volatile uint32_t * ) 0xe000e018 ) )
|
||||
#define portNVIC_SHPR3_REG ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
|
||||
/* ...then bits in the registers. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
|
||||
#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
|
||||
#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
|
||||
#define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
|
||||
#define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL )
|
||||
#define portNVIC_PEND_SYSTICK_SET_BIT ( 1UL << 26UL )
|
||||
#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
|
||||
|
||||
#define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
|
||||
|
|
@ -93,12 +84,26 @@
|
|||
/* A fiddle factor to estimate the number of SysTick counts that would have
|
||||
* occurred while the SysTick counter is stopped during tickless idle
|
||||
* calculations. */
|
||||
#define portMISSED_COUNTS_FACTOR ( 45UL )
|
||||
#define portMISSED_COUNTS_FACTOR ( 94UL )
|
||||
|
||||
/* For strict compliance with the Cortex-M spec the task start address should
|
||||
* have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
|
||||
#define portSTART_ADDRESS_MASK ( ( StackType_t ) 0xfffffffeUL )
|
||||
|
||||
/* Let the user override the default SysTick clock rate. If defined by the
|
||||
* user, this symbol must equal the SysTick clock rate when the CLK bit is 0 in the
|
||||
* configuration register. */
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ ( configCPU_CLOCK_HZ )
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( portNVIC_SYSTICK_CLK_BIT )
|
||||
#else
|
||||
|
||||
/* Select the option to clock SysTick not at the same frequency as the core.
|
||||
* The clock used is often a divided version of the core clock. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( 0 )
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Setup the timer to generate the tick interrupts. The implementation in this
|
||||
* file is weak to allow application writers to change the timer used to
|
||||
|
|
@ -379,7 +384,7 @@ void xPortSysTickHandler( void )
|
|||
#pragma WEAK( vPortSuppressTicksAndSleep )
|
||||
void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
||||
{
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
||||
TickType_t xModifiableIdleTime;
|
||||
|
||||
/* Make sure the SysTick reload value does not overflow the counter. */
|
||||
|
|
@ -388,22 +393,6 @@ void xPortSysTickHandler( void )
|
|||
xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
|
||||
}
|
||||
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for
|
||||
* is accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code will execute part way
|
||||
* through one of the tick periods. */
|
||||
ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Enter a critical section but don't use the taskENTER_CRITICAL()
|
||||
* method as that will mask interrupts that should exit sleep mode. */
|
||||
__asm( " cpsid i");
|
||||
|
|
@ -414,23 +403,49 @@ void xPortSysTickHandler( void )
|
|||
* to be unsuspended then abandon the low power entry. */
|
||||
if( eTaskConfirmSleepModeStatus() == eAbortSleep )
|
||||
{
|
||||
/* Restart from whatever is left in the count register to complete
|
||||
* this tick period. */
|
||||
portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
/* Restart SysTick. */
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Reset the reload register to the value required for normal tick
|
||||
* periods. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
|
||||
/* Re-enable interrupts - see comments above __disable_interrupt()
|
||||
* call above. */
|
||||
/* Re-enable interrupts - see comments above the cpsid instruction
|
||||
* above. */
|
||||
__asm( " cpsie i");
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for
|
||||
* is accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Use the SysTick current-value register to determine the number of
|
||||
* SysTick decrements remaining until the next tick interrupt. If the
|
||||
* current-value register is zero, then there are actually
|
||||
* ulTimerCountsForOneTick decrements remaining, not zero, because the
|
||||
* SysTick requests the interrupt when decrementing from 1 to 0. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code normally executes part
|
||||
* way through the first tick period. But if the SysTick IRQ is now
|
||||
* pending, then clear the IRQ, suppressing the first tick, and correct
|
||||
* the reload value to reflect that the second tick period is already
|
||||
* underway. The expected idle time is always at least two ticks. */
|
||||
ulReloadValue = ulSysTickDecrementsLeft + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ( portNVIC_INT_CTRL_REG & portNVIC_PEND_SYSTICK_SET_BIT ) != 0 )
|
||||
{
|
||||
portNVIC_INT_CTRL_REG = portNVIC_PEND_SYSTICK_CLEAR_BIT;
|
||||
ulReloadValue -= ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Set the new reload value. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
|
||||
|
||||
|
|
@ -459,8 +474,8 @@ void xPortSysTickHandler( void )
|
|||
configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
|
||||
|
||||
/* Re-enable interrupts to allow the interrupt that brought the MCU
|
||||
* out of sleep mode to execute immediately. see comments above
|
||||
* __disable_interrupt() call above. */
|
||||
* out of sleep mode to execute immediately. See comments above
|
||||
* the cpsid instruction above. */
|
||||
__asm( " cpsie i");
|
||||
__asm( " dsb");
|
||||
__asm( " isb");
|
||||
|
|
@ -480,26 +495,22 @@ void xPortSysTickHandler( void )
|
|||
* be, but using the tickless mode will inevitably result in some tiny
|
||||
* drift of the time maintained by the kernel with respect to calendar
|
||||
* time*/
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Determine if the SysTick clock has already counted to zero and
|
||||
* been set back to the current reload value (the reload back being
|
||||
* correct for the entire expected idle time) or if the SysTick is yet
|
||||
* to count to zero (in which case an interrupt other than the SysTick
|
||||
* must have brought the system out of sleep mode). */
|
||||
/* Determine whether the SysTick has already counted to zero. */
|
||||
if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
|
||||
{
|
||||
uint32_t ulCalculatedLoadValue;
|
||||
|
||||
/* The tick interrupt is already pending, and the SysTick count
|
||||
* reloaded with ulReloadValue. Reset the
|
||||
* portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
|
||||
* period. */
|
||||
/* The tick interrupt ended the sleep (or is now pending), and
|
||||
* a new tick period has started. Reset portNVIC_SYSTICK_LOAD_REG
|
||||
* with whatever remains of the new tick period. */
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
|
||||
|
||||
/* Don't allow a tiny value, or values that have somehow
|
||||
* underflowed because the post sleep hook did something
|
||||
* that took too long. */
|
||||
* that took too long or because the SysTick current-value register
|
||||
* is zero. */
|
||||
if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
|
||||
{
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
|
||||
|
|
@ -514,11 +525,29 @@ void xPortSysTickHandler( void )
|
|||
}
|
||||
else
|
||||
{
|
||||
/* Something other than the tick interrupt ended the sleep.
|
||||
* Work out how long the sleep lasted rounded to complete tick
|
||||
/* Something other than the tick interrupt ended the sleep. */
|
||||
|
||||
/* Use the SysTick current-value register to determine the
|
||||
* number of SysTick decrements remaining until the expected idle
|
||||
* time would have ended. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* If the SysTick is not using the core clock, the current-
|
||||
* value register might still be zero here. In that case, the
|
||||
* SysTick didn't load from the reload register, and there are
|
||||
* ulReloadValue + 1 decrements remaining, not zero. */
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulReloadValue + 1UL;
|
||||
}
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Work out how long the sleep lasted rounded to complete tick
|
||||
* periods (not the ulReload value which accounted for part
|
||||
* ticks). */
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - ulSysTickDecrementsLeft;
|
||||
|
||||
/* How many complete tick periods passed while the processor
|
||||
* was waiting? */
|
||||
|
|
@ -529,13 +558,26 @@ void xPortSysTickHandler( void )
|
|||
portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
|
||||
}
|
||||
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
|
||||
* again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
|
||||
* value. */
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG again,
|
||||
* then set portNVIC_SYSTICK_LOAD_REG back to its standard value. If
|
||||
* the SysTick is not using the core clock, temporarily configure it to
|
||||
* use the core clock. This configuration forces the SysTick to load
|
||||
* from portNVIC_SYSTICK_LOAD_REG immediately instead of at the next
|
||||
* cycle of the other clock. Then portNVIC_SYSTICK_LOAD_REG is ready
|
||||
* to receive the standard value immediately. */
|
||||
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* The temporary usage of the core clock has served its purpose,
|
||||
* as described above. Resume usage of the other clock. */
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Step the tick to account for any tick periods that elapsed. */
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
|
||||
/* Exit with interrupts enabled. */
|
||||
__asm( " cpsie i");
|
||||
|
|
@ -567,7 +609,7 @@ void vPortSetupTimerInterrupt( void )
|
|||
|
||||
/* Configure SysTick to interrupt at the requested rate. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
|||
|
|
@ -43,6 +43,8 @@
|
|||
#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
|
||||
#define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
|
||||
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
|
||||
#define portNVIC_PEND_SYSTICK_SET_BIT ( 1UL << 26UL )
|
||||
#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
|
||||
#define portMIN_INTERRUPT_PRIORITY ( 255UL )
|
||||
#define portNVIC_PENDSV_PRI ( portMIN_INTERRUPT_PRIORITY << 16UL )
|
||||
#define portNVIC_SYSTICK_PRI ( portMIN_INTERRUPT_PRIORITY << 24UL )
|
||||
|
|
@ -57,7 +59,21 @@
|
|||
* occurred while the SysTick counter is stopped during tickless idle
|
||||
* calculations. */
|
||||
#ifndef portMISSED_COUNTS_FACTOR
|
||||
#define portMISSED_COUNTS_FACTOR ( 45UL )
|
||||
#define portMISSED_COUNTS_FACTOR ( 94UL )
|
||||
#endif
|
||||
|
||||
/* Let the user override the default SysTick clock rate. If defined by the
|
||||
* user, this symbol must equal the SysTick clock rate when the CLK bit is 0 in the
|
||||
* configuration register. */
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ ( configCPU_CLOCK_HZ )
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( portNVIC_SYSTICK_CLK_BIT )
|
||||
#else
|
||||
|
||||
/* Select the option to clock SysTick not at the same frequency as the core.
|
||||
* The clock used is often a divided version of the core clock. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( 0 )
|
||||
#endif
|
||||
|
||||
/* Let the user override the pre-loading of the initial LR with the address of
|
||||
|
|
@ -380,9 +396,9 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void )
|
|||
/* Calculate the constants required to configure the tick interrupt. */
|
||||
#if ( configUSE_TICKLESS_IDLE == 1 )
|
||||
{
|
||||
ulTimerCountsForOneTick = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ );
|
||||
ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
|
||||
xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
|
||||
ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR;
|
||||
ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
|
||||
}
|
||||
#endif /* configUSE_TICKLESS_IDLE */
|
||||
|
||||
|
|
@ -391,8 +407,8 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void )
|
|||
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
|
||||
|
||||
/* Configure SysTick to interrupt at the requested rate. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
@ -400,7 +416,7 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void )
|
|||
|
||||
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
||||
{
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
||||
TickType_t xModifiableIdleTime;
|
||||
|
||||
/* Make sure the SysTick reload value does not overflow the counter. */
|
||||
|
|
@ -409,22 +425,6 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void )
|
|||
xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
|
||||
}
|
||||
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for
|
||||
* is accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code will execute part way
|
||||
* through one of the tick periods. */
|
||||
ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Enter a critical section but don't use the taskENTER_CRITICAL()
|
||||
* method as that will mask interrupts that should exit sleep mode. */
|
||||
__asm volatile ( "cpsid i" ::: "memory" );
|
||||
|
|
@ -435,23 +435,49 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void )
|
|||
* to be unsuspended then abandon the low power entry. */
|
||||
if( eTaskConfirmSleepModeStatus() == eAbortSleep )
|
||||
{
|
||||
/* Restart from whatever is left in the count register to complete
|
||||
* this tick period. */
|
||||
portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
/* Restart SysTick. */
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Reset the reload register to the value required for normal tick
|
||||
* periods. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
|
||||
/* Re-enable interrupts - see comments above the cpsid instruction()
|
||||
/* Re-enable interrupts - see comments above the cpsid instruction
|
||||
* above. */
|
||||
__asm volatile ( "cpsie i" ::: "memory" );
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for
|
||||
* is accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Use the SysTick current-value register to determine the number of
|
||||
* SysTick decrements remaining until the next tick interrupt. If the
|
||||
* current-value register is zero, then there are actually
|
||||
* ulTimerCountsForOneTick decrements remaining, not zero, because the
|
||||
* SysTick requests the interrupt when decrementing from 1 to 0. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code normally executes part
|
||||
* way through the first tick period. But if the SysTick IRQ is now
|
||||
* pending, then clear the IRQ, suppressing the first tick, and correct
|
||||
* the reload value to reflect that the second tick period is already
|
||||
* underway. The expected idle time is always at least two ticks. */
|
||||
ulReloadValue = ulSysTickDecrementsLeft + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ( portNVIC_INT_CTRL_REG & portNVIC_PEND_SYSTICK_SET_BIT ) != 0 )
|
||||
{
|
||||
portNVIC_INT_CTRL_REG = portNVIC_PEND_SYSTICK_CLEAR_BIT;
|
||||
ulReloadValue -= ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Set the new reload value. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
|
||||
|
||||
|
|
@ -480,8 +506,8 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void )
|
|||
configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
|
||||
|
||||
/* Re-enable interrupts to allow the interrupt that brought the MCU
|
||||
* out of sleep mode to execute immediately. see comments above
|
||||
* __disable_interrupt() call above. */
|
||||
* out of sleep mode to execute immediately. See comments above
|
||||
* the cpsid instruction above. */
|
||||
__asm volatile ( "cpsie i" ::: "memory" );
|
||||
__asm volatile ( "dsb" );
|
||||
__asm volatile ( "isb" );
|
||||
|
|
@ -501,26 +527,22 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void )
|
|||
* be, but using the tickless mode will inevitably result in some tiny
|
||||
* drift of the time maintained by the kernel with respect to calendar
|
||||
* time*/
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Determine if the SysTick clock has already counted to zero and
|
||||
* been set back to the current reload value (the reload back being
|
||||
* correct for the entire expected idle time) or if the SysTick is yet
|
||||
* to count to zero (in which case an interrupt other than the SysTick
|
||||
* must have brought the system out of sleep mode). */
|
||||
/* Determine whether the SysTick has already counted to zero. */
|
||||
if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
|
||||
{
|
||||
uint32_t ulCalculatedLoadValue;
|
||||
|
||||
/* The tick interrupt is already pending, and the SysTick count
|
||||
* reloaded with ulReloadValue. Reset the
|
||||
* portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
|
||||
* period. */
|
||||
/* The tick interrupt ended the sleep (or is now pending), and
|
||||
* a new tick period has started. Reset portNVIC_SYSTICK_LOAD_REG
|
||||
* with whatever remains of the new tick period. */
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
|
||||
|
||||
/* Don't allow a tiny value, or values that have somehow
|
||||
* underflowed because the post sleep hook did something
|
||||
* that took too long. */
|
||||
* that took too long or because the SysTick current-value register
|
||||
* is zero. */
|
||||
if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
|
||||
{
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
|
||||
|
|
@ -535,11 +557,29 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void )
|
|||
}
|
||||
else
|
||||
{
|
||||
/* Something other than the tick interrupt ended the sleep.
|
||||
* Work out how long the sleep lasted rounded to complete tick
|
||||
/* Something other than the tick interrupt ended the sleep. */
|
||||
|
||||
/* Use the SysTick current-value register to determine the
|
||||
* number of SysTick decrements remaining until the expected idle
|
||||
* time would have ended. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* If the SysTick is not using the core clock, the current-
|
||||
* value register might still be zero here. In that case, the
|
||||
* SysTick didn't load from the reload register, and there are
|
||||
* ulReloadValue + 1 decrements remaining, not zero. */
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulReloadValue + 1UL;
|
||||
}
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Work out how long the sleep lasted rounded to complete tick
|
||||
* periods (not the ulReload value which accounted for part
|
||||
* ticks). */
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - ulSysTickDecrementsLeft;
|
||||
|
||||
/* How many complete tick periods passed while the processor
|
||||
* was waiting? */
|
||||
|
|
@ -550,15 +590,28 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void )
|
|||
portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
|
||||
}
|
||||
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
|
||||
* again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
|
||||
* value. */
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG again,
|
||||
* then set portNVIC_SYSTICK_LOAD_REG back to its standard value. If
|
||||
* the SysTick is not using the core clock, temporarily configure it to
|
||||
* use the core clock. This configuration forces the SysTick to load
|
||||
* from portNVIC_SYSTICK_LOAD_REG immediately instead of at the next
|
||||
* cycle of the other clock. Then portNVIC_SYSTICK_LOAD_REG is ready
|
||||
* to receive the standard value immediately. */
|
||||
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* The temporary usage of the core clock has served its purpose,
|
||||
* as described above. Resume usage of the other clock. */
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Exit with interrpts enabled. */
|
||||
/* Step the tick to account for any tick periods that elapsed. */
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
|
||||
/* Exit with interrupts enabled. */
|
||||
__asm volatile ( "cpsie i" ::: "memory" );
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -76,20 +76,13 @@
|
|||
#define portNVIC_SHPR3_REG ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
|
||||
#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
|
||||
#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
|
||||
#define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
|
||||
#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
|
||||
#define portNVIC_PEND_SYSTICK_SET_BIT ( 1UL << 26UL )
|
||||
#define portMIN_INTERRUPT_PRIORITY ( 255UL )
|
||||
#define portNVIC_PENDSV_PRI ( portMIN_INTERRUPT_PRIORITY << 16UL )
|
||||
#define portNVIC_SYSTICK_PRI ( portMIN_INTERRUPT_PRIORITY << 24UL )
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
|
||||
#else
|
||||
|
||||
/* The way the SysTick is clocked is not modified in case it is not the
|
||||
* same a the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 0 )
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
|
|
@ -197,7 +190,7 @@
|
|||
* have occurred while the SysTick counter is stopped during tickless idle
|
||||
* calculations.
|
||||
*/
|
||||
#define portMISSED_COUNTS_FACTOR ( 45UL )
|
||||
#define portMISSED_COUNTS_FACTOR ( 94UL )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
|
|
@ -256,6 +249,22 @@
|
|||
#define portINITIAL_CONTROL_UNPRIVILEGED ( 0x3 )
|
||||
#define portINITIAL_CONTROL_PRIVILEGED ( 0x2 )
|
||||
|
||||
/**
|
||||
* @brief Let the user override the default SysTick clock rate. If defined by the
|
||||
* user, this symbol must equal the SysTick clock rate when the CLK bit is 0 in the
|
||||
* configuration register.
|
||||
*/
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ ( configCPU_CLOCK_HZ )
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( portNVIC_SYSTICK_CLK_BIT )
|
||||
#else
|
||||
|
||||
/* Select the option to clock SysTick not at the same frequency as the core.
|
||||
* The clock used is often a divided version of the core clock. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( 0 )
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Let the user override the pre-loading of the initial LR with the
|
||||
* address of prvTaskExitError() in case it messes up unwinding of the stack
|
||||
|
|
@ -384,7 +393,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
#if ( configUSE_TICKLESS_IDLE == 1 )
|
||||
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
||||
{
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
||||
TickType_t xModifiableIdleTime;
|
||||
|
||||
/* Make sure the SysTick reload value does not overflow the counter. */
|
||||
|
|
@ -393,22 +402,6 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
|
||||
}
|
||||
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for is
|
||||
* accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code will execute part way
|
||||
* through one of the tick periods. */
|
||||
ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Enter a critical section but don't use the taskENTER_CRITICAL()
|
||||
* method as that will mask interrupts that should exit sleep mode. */
|
||||
__asm volatile ( "cpsid i" ::: "memory" );
|
||||
|
|
@ -416,26 +409,52 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
__asm volatile ( "isb" );
|
||||
|
||||
/* If a context switch is pending or a task is waiting for the scheduler
|
||||
* to be un-suspended then abandon the low power entry. */
|
||||
* to be unsuspended then abandon the low power entry. */
|
||||
if( eTaskConfirmSleepModeStatus() == eAbortSleep )
|
||||
{
|
||||
/* Restart from whatever is left in the count register to complete
|
||||
* this tick period. */
|
||||
portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
/* Restart SysTick. */
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Reset the reload register to the value required for normal tick
|
||||
* periods. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
|
||||
/* Re-enable interrupts - see comments above the cpsid instruction()
|
||||
/* Re-enable interrupts - see comments above the cpsid instruction
|
||||
* above. */
|
||||
__asm volatile ( "cpsie i" ::: "memory" );
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for
|
||||
* is accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Use the SysTick current-value register to determine the number of
|
||||
* SysTick decrements remaining until the next tick interrupt. If the
|
||||
* current-value register is zero, then there are actually
|
||||
* ulTimerCountsForOneTick decrements remaining, not zero, because the
|
||||
* SysTick requests the interrupt when decrementing from 1 to 0. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code normally executes part
|
||||
* way through the first tick period. But if the SysTick IRQ is now
|
||||
* pending, then clear the IRQ, suppressing the first tick, and correct
|
||||
* the reload value to reflect that the second tick period is already
|
||||
* underway. The expected idle time is always at least two ticks. */
|
||||
ulReloadValue = ulSysTickDecrementsLeft + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ( portNVIC_INT_CTRL_REG & portNVIC_PEND_SYSTICK_SET_BIT ) != 0 )
|
||||
{
|
||||
portNVIC_INT_CTRL_REG = portNVIC_PEND_SYSTICK_CLEAR_BIT;
|
||||
ulReloadValue -= ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Set the new reload value. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
|
||||
|
||||
|
|
@ -446,12 +465,11 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
/* Restart SysTick. */
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
|
||||
* set its parameter to 0 to indicate that its implementation
|
||||
* contains its own wait for interrupt or wait for event
|
||||
* instruction, and so wfi should not be executed again. However,
|
||||
* the original expected idle time variable must remain unmodified,
|
||||
* so a copy is taken. */
|
||||
/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
|
||||
* set its parameter to 0 to indicate that its implementation contains
|
||||
* its own wait for interrupt or wait for event instruction, and so wfi
|
||||
* should not be executed again. However, the original expected idle
|
||||
* time variable must remain unmodified, so a copy is taken. */
|
||||
xModifiableIdleTime = xExpectedIdleTime;
|
||||
configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
|
||||
|
||||
|
|
@ -465,47 +483,43 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
|
||||
|
||||
/* Re-enable interrupts to allow the interrupt that brought the MCU
|
||||
* out of sleep mode to execute immediately. See comments above
|
||||
* out of sleep mode to execute immediately. See comments above
|
||||
* the cpsid instruction above. */
|
||||
__asm volatile ( "cpsie i" ::: "memory" );
|
||||
__asm volatile ( "dsb" );
|
||||
__asm volatile ( "isb" );
|
||||
|
||||
/* Disable interrupts again because the clock is about to be stopped
|
||||
* and interrupts that execute while the clock is stopped will
|
||||
* increase any slippage between the time maintained by the RTOS and
|
||||
* calendar time. */
|
||||
* and interrupts that execute while the clock is stopped will increase
|
||||
* any slippage between the time maintained by the RTOS and calendar
|
||||
* time. */
|
||||
__asm volatile ( "cpsid i" ::: "memory" );
|
||||
__asm volatile ( "dsb" );
|
||||
__asm volatile ( "isb" );
|
||||
|
||||
/* Disable the SysTick clock without reading the
|
||||
* portNVIC_SYSTICK_CTRL_REG register to ensure the
|
||||
* portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.
|
||||
* Again, the time the SysTick is stopped for is accounted for as
|
||||
* best it can be, but using the tickless mode will inevitably
|
||||
* result in some tiny drift of the time maintained by the kernel
|
||||
* with respect to calendar time*/
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
|
||||
* portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set. Again,
|
||||
* the time the SysTick is stopped for is accounted for as best it can
|
||||
* be, but using the tickless mode will inevitably result in some tiny
|
||||
* drift of the time maintained by the kernel with respect to calendar
|
||||
* time*/
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Determine if the SysTick clock has already counted to zero and
|
||||
* been set back to the current reload value (the reload back being
|
||||
* correct for the entire expected idle time) or if the SysTick is
|
||||
* yet to count to zero (in which case an interrupt other than the
|
||||
* SysTick must have brought the system out of sleep mode). */
|
||||
/* Determine whether the SysTick has already counted to zero. */
|
||||
if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
|
||||
{
|
||||
uint32_t ulCalculatedLoadValue;
|
||||
|
||||
/* The tick interrupt is already pending, and the SysTick count
|
||||
* reloaded with ulReloadValue. Reset the
|
||||
* portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
|
||||
* period. */
|
||||
/* The tick interrupt ended the sleep (or is now pending), and
|
||||
* a new tick period has started. Reset portNVIC_SYSTICK_LOAD_REG
|
||||
* with whatever remains of the new tick period. */
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
|
||||
|
||||
/* Don't allow a tiny value, or values that have somehow
|
||||
* underflowed because the post sleep hook did something
|
||||
* that took too long. */
|
||||
* that took too long or because the SysTick current-value register
|
||||
* is zero. */
|
||||
if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
|
||||
{
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
|
||||
|
|
@ -514,17 +528,35 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
|
||||
|
||||
/* As the pending tick will be processed as soon as this
|
||||
* function exits, the tick value maintained by the tick is
|
||||
* stepped forward by one less than the time spent waiting. */
|
||||
* function exits, the tick value maintained by the tick is stepped
|
||||
* forward by one less than the time spent waiting. */
|
||||
ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Something other than the tick interrupt ended the sleep.
|
||||
* Work out how long the sleep lasted rounded to complete tick
|
||||
/* Something other than the tick interrupt ended the sleep. */
|
||||
|
||||
/* Use the SysTick current-value register to determine the
|
||||
* number of SysTick decrements remaining until the expected idle
|
||||
* time would have ended. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* If the SysTick is not using the core clock, the current-
|
||||
* value register might still be zero here. In that case, the
|
||||
* SysTick didn't load from the reload register, and there are
|
||||
* ulReloadValue + 1 decrements remaining, not zero. */
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulReloadValue + 1UL;
|
||||
}
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Work out how long the sleep lasted rounded to complete tick
|
||||
* periods (not the ulReload value which accounted for part
|
||||
* ticks). */
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - ulSysTickDecrementsLeft;
|
||||
|
||||
/* How many complete tick periods passed while the processor
|
||||
* was waiting? */
|
||||
|
|
@ -535,13 +567,26 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
|
||||
}
|
||||
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
|
||||
* again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
|
||||
* value. */
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG again,
|
||||
* then set portNVIC_SYSTICK_LOAD_REG back to its standard value. If
|
||||
* the SysTick is not using the core clock, temporarily configure it to
|
||||
* use the core clock. This configuration forces the SysTick to load
|
||||
* from portNVIC_SYSTICK_LOAD_REG immediately instead of at the next
|
||||
* cycle of the other clock. Then portNVIC_SYSTICK_LOAD_REG is ready
|
||||
* to receive the standard value immediately. */
|
||||
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* The temporary usage of the core clock has served its purpose,
|
||||
* as described above. Resume usage of the other clock. */
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Step the tick to account for any tick periods that elapsed. */
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
|
||||
/* Exit with interrupts enabled. */
|
||||
__asm volatile ( "cpsie i" ::: "memory" );
|
||||
|
|
@ -567,7 +612,7 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FU
|
|||
|
||||
/* Configure SysTick to interrupt at the requested rate. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
|||
|
|
@ -76,20 +76,13 @@
|
|||
#define portNVIC_SHPR3_REG ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
|
||||
#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
|
||||
#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
|
||||
#define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
|
||||
#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
|
||||
#define portNVIC_PEND_SYSTICK_SET_BIT ( 1UL << 26UL )
|
||||
#define portMIN_INTERRUPT_PRIORITY ( 255UL )
|
||||
#define portNVIC_PENDSV_PRI ( portMIN_INTERRUPT_PRIORITY << 16UL )
|
||||
#define portNVIC_SYSTICK_PRI ( portMIN_INTERRUPT_PRIORITY << 24UL )
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
|
||||
#else
|
||||
|
||||
/* The way the SysTick is clocked is not modified in case it is not the
|
||||
* same a the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 0 )
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
|
|
@ -197,7 +190,7 @@
|
|||
* have occurred while the SysTick counter is stopped during tickless idle
|
||||
* calculations.
|
||||
*/
|
||||
#define portMISSED_COUNTS_FACTOR ( 45UL )
|
||||
#define portMISSED_COUNTS_FACTOR ( 94UL )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
|
|
@ -256,6 +249,22 @@
|
|||
#define portINITIAL_CONTROL_UNPRIVILEGED ( 0x3 )
|
||||
#define portINITIAL_CONTROL_PRIVILEGED ( 0x2 )
|
||||
|
||||
/**
|
||||
* @brief Let the user override the default SysTick clock rate. If defined by the
|
||||
* user, this symbol must equal the SysTick clock rate when the CLK bit is 0 in the
|
||||
* configuration register.
|
||||
*/
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ ( configCPU_CLOCK_HZ )
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( portNVIC_SYSTICK_CLK_BIT )
|
||||
#else
|
||||
|
||||
/* Select the option to clock SysTick not at the same frequency as the core.
|
||||
* The clock used is often a divided version of the core clock. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( 0 )
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Let the user override the pre-loading of the initial LR with the
|
||||
* address of prvTaskExitError() in case it messes up unwinding of the stack
|
||||
|
|
@ -384,7 +393,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
#if ( configUSE_TICKLESS_IDLE == 1 )
|
||||
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
||||
{
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
||||
TickType_t xModifiableIdleTime;
|
||||
|
||||
/* Make sure the SysTick reload value does not overflow the counter. */
|
||||
|
|
@ -393,22 +402,6 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
|
||||
}
|
||||
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for is
|
||||
* accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code will execute part way
|
||||
* through one of the tick periods. */
|
||||
ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Enter a critical section but don't use the taskENTER_CRITICAL()
|
||||
* method as that will mask interrupts that should exit sleep mode. */
|
||||
__asm volatile ( "cpsid i" ::: "memory" );
|
||||
|
|
@ -416,26 +409,52 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
__asm volatile ( "isb" );
|
||||
|
||||
/* If a context switch is pending or a task is waiting for the scheduler
|
||||
* to be un-suspended then abandon the low power entry. */
|
||||
* to be unsuspended then abandon the low power entry. */
|
||||
if( eTaskConfirmSleepModeStatus() == eAbortSleep )
|
||||
{
|
||||
/* Restart from whatever is left in the count register to complete
|
||||
* this tick period. */
|
||||
portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
/* Restart SysTick. */
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Reset the reload register to the value required for normal tick
|
||||
* periods. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
|
||||
/* Re-enable interrupts - see comments above the cpsid instruction()
|
||||
/* Re-enable interrupts - see comments above the cpsid instruction
|
||||
* above. */
|
||||
__asm volatile ( "cpsie i" ::: "memory" );
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for
|
||||
* is accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Use the SysTick current-value register to determine the number of
|
||||
* SysTick decrements remaining until the next tick interrupt. If the
|
||||
* current-value register is zero, then there are actually
|
||||
* ulTimerCountsForOneTick decrements remaining, not zero, because the
|
||||
* SysTick requests the interrupt when decrementing from 1 to 0. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code normally executes part
|
||||
* way through the first tick period. But if the SysTick IRQ is now
|
||||
* pending, then clear the IRQ, suppressing the first tick, and correct
|
||||
* the reload value to reflect that the second tick period is already
|
||||
* underway. The expected idle time is always at least two ticks. */
|
||||
ulReloadValue = ulSysTickDecrementsLeft + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ( portNVIC_INT_CTRL_REG & portNVIC_PEND_SYSTICK_SET_BIT ) != 0 )
|
||||
{
|
||||
portNVIC_INT_CTRL_REG = portNVIC_PEND_SYSTICK_CLEAR_BIT;
|
||||
ulReloadValue -= ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Set the new reload value. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
|
||||
|
||||
|
|
@ -446,12 +465,11 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
/* Restart SysTick. */
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
|
||||
* set its parameter to 0 to indicate that its implementation
|
||||
* contains its own wait for interrupt or wait for event
|
||||
* instruction, and so wfi should not be executed again. However,
|
||||
* the original expected idle time variable must remain unmodified,
|
||||
* so a copy is taken. */
|
||||
/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
|
||||
* set its parameter to 0 to indicate that its implementation contains
|
||||
* its own wait for interrupt or wait for event instruction, and so wfi
|
||||
* should not be executed again. However, the original expected idle
|
||||
* time variable must remain unmodified, so a copy is taken. */
|
||||
xModifiableIdleTime = xExpectedIdleTime;
|
||||
configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
|
||||
|
||||
|
|
@ -465,47 +483,43 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
|
||||
|
||||
/* Re-enable interrupts to allow the interrupt that brought the MCU
|
||||
* out of sleep mode to execute immediately. See comments above
|
||||
* out of sleep mode to execute immediately. See comments above
|
||||
* the cpsid instruction above. */
|
||||
__asm volatile ( "cpsie i" ::: "memory" );
|
||||
__asm volatile ( "dsb" );
|
||||
__asm volatile ( "isb" );
|
||||
|
||||
/* Disable interrupts again because the clock is about to be stopped
|
||||
* and interrupts that execute while the clock is stopped will
|
||||
* increase any slippage between the time maintained by the RTOS and
|
||||
* calendar time. */
|
||||
* and interrupts that execute while the clock is stopped will increase
|
||||
* any slippage between the time maintained by the RTOS and calendar
|
||||
* time. */
|
||||
__asm volatile ( "cpsid i" ::: "memory" );
|
||||
__asm volatile ( "dsb" );
|
||||
__asm volatile ( "isb" );
|
||||
|
||||
/* Disable the SysTick clock without reading the
|
||||
* portNVIC_SYSTICK_CTRL_REG register to ensure the
|
||||
* portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.
|
||||
* Again, the time the SysTick is stopped for is accounted for as
|
||||
* best it can be, but using the tickless mode will inevitably
|
||||
* result in some tiny drift of the time maintained by the kernel
|
||||
* with respect to calendar time*/
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
|
||||
* portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set. Again,
|
||||
* the time the SysTick is stopped for is accounted for as best it can
|
||||
* be, but using the tickless mode will inevitably result in some tiny
|
||||
* drift of the time maintained by the kernel with respect to calendar
|
||||
* time*/
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Determine if the SysTick clock has already counted to zero and
|
||||
* been set back to the current reload value (the reload back being
|
||||
* correct for the entire expected idle time) or if the SysTick is
|
||||
* yet to count to zero (in which case an interrupt other than the
|
||||
* SysTick must have brought the system out of sleep mode). */
|
||||
/* Determine whether the SysTick has already counted to zero. */
|
||||
if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
|
||||
{
|
||||
uint32_t ulCalculatedLoadValue;
|
||||
|
||||
/* The tick interrupt is already pending, and the SysTick count
|
||||
* reloaded with ulReloadValue. Reset the
|
||||
* portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
|
||||
* period. */
|
||||
/* The tick interrupt ended the sleep (or is now pending), and
|
||||
* a new tick period has started. Reset portNVIC_SYSTICK_LOAD_REG
|
||||
* with whatever remains of the new tick period. */
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
|
||||
|
||||
/* Don't allow a tiny value, or values that have somehow
|
||||
* underflowed because the post sleep hook did something
|
||||
* that took too long. */
|
||||
* that took too long or because the SysTick current-value register
|
||||
* is zero. */
|
||||
if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
|
||||
{
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
|
||||
|
|
@ -514,17 +528,35 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
|
||||
|
||||
/* As the pending tick will be processed as soon as this
|
||||
* function exits, the tick value maintained by the tick is
|
||||
* stepped forward by one less than the time spent waiting. */
|
||||
* function exits, the tick value maintained by the tick is stepped
|
||||
* forward by one less than the time spent waiting. */
|
||||
ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Something other than the tick interrupt ended the sleep.
|
||||
* Work out how long the sleep lasted rounded to complete tick
|
||||
/* Something other than the tick interrupt ended the sleep. */
|
||||
|
||||
/* Use the SysTick current-value register to determine the
|
||||
* number of SysTick decrements remaining until the expected idle
|
||||
* time would have ended. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* If the SysTick is not using the core clock, the current-
|
||||
* value register might still be zero here. In that case, the
|
||||
* SysTick didn't load from the reload register, and there are
|
||||
* ulReloadValue + 1 decrements remaining, not zero. */
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulReloadValue + 1UL;
|
||||
}
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Work out how long the sleep lasted rounded to complete tick
|
||||
* periods (not the ulReload value which accounted for part
|
||||
* ticks). */
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - ulSysTickDecrementsLeft;
|
||||
|
||||
/* How many complete tick periods passed while the processor
|
||||
* was waiting? */
|
||||
|
|
@ -535,13 +567,26 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
|
||||
}
|
||||
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
|
||||
* again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
|
||||
* value. */
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG again,
|
||||
* then set portNVIC_SYSTICK_LOAD_REG back to its standard value. If
|
||||
* the SysTick is not using the core clock, temporarily configure it to
|
||||
* use the core clock. This configuration forces the SysTick to load
|
||||
* from portNVIC_SYSTICK_LOAD_REG immediately instead of at the next
|
||||
* cycle of the other clock. Then portNVIC_SYSTICK_LOAD_REG is ready
|
||||
* to receive the standard value immediately. */
|
||||
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* The temporary usage of the core clock has served its purpose,
|
||||
* as described above. Resume usage of the other clock. */
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Step the tick to account for any tick periods that elapsed. */
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
|
||||
/* Exit with interrupts enabled. */
|
||||
__asm volatile ( "cpsie i" ::: "memory" );
|
||||
|
|
@ -567,7 +612,7 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FU
|
|||
|
||||
/* Configure SysTick to interrupt at the requested rate. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
|||
|
|
@ -39,27 +39,18 @@
|
|||
#define configKERNEL_INTERRUPT_PRIORITY 255
|
||||
#endif
|
||||
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
|
||||
#else
|
||||
|
||||
/* The way the SysTick is clocked is not modified in case it is not the same
|
||||
* as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 0 )
|
||||
#endif
|
||||
|
||||
/* Constants required to manipulate the core. Registers first... */
|
||||
#define portNVIC_SYSTICK_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000e010 ) )
|
||||
#define portNVIC_SYSTICK_LOAD_REG ( *( ( volatile uint32_t * ) 0xe000e014 ) )
|
||||
#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( *( ( volatile uint32_t * ) 0xe000e018 ) )
|
||||
#define portNVIC_SHPR3_REG ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
|
||||
/* ...then bits in the registers. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
|
||||
#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
|
||||
#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
|
||||
#define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
|
||||
#define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL )
|
||||
#define portNVIC_PEND_SYSTICK_SET_BIT ( 1UL << 26UL )
|
||||
#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
|
||||
|
||||
#define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
|
||||
|
|
@ -87,12 +78,26 @@
|
|||
/* A fiddle factor to estimate the number of SysTick counts that would have
|
||||
* occurred while the SysTick counter is stopped during tickless idle
|
||||
* calculations. */
|
||||
#define portMISSED_COUNTS_FACTOR ( 45UL )
|
||||
#define portMISSED_COUNTS_FACTOR ( 94UL )
|
||||
|
||||
/* For strict compliance with the Cortex-M spec the task start address should
|
||||
* have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
|
||||
#define portSTART_ADDRESS_MASK ( ( StackType_t ) 0xfffffffeUL )
|
||||
|
||||
/* Let the user override the default SysTick clock rate. If defined by the
|
||||
* user, this symbol must equal the SysTick clock rate when the CLK bit is 0 in the
|
||||
* configuration register. */
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ ( configCPU_CLOCK_HZ )
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( portNVIC_SYSTICK_CLK_BIT )
|
||||
#else
|
||||
|
||||
/* Select the option to clock SysTick not at the same frequency as the core.
|
||||
* The clock used is often a divided version of the core clock. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( 0 )
|
||||
#endif
|
||||
|
||||
/* Let the user override the pre-loading of the initial LR with the address of
|
||||
* prvTaskExitError() in case it messes up unwinding of the stack in the
|
||||
* debugger. */
|
||||
|
|
@ -453,7 +458,7 @@ void xPortSysTickHandler( void )
|
|||
|
||||
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
||||
{
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
||||
TickType_t xModifiableIdleTime;
|
||||
|
||||
/* Make sure the SysTick reload value does not overflow the counter. */
|
||||
|
|
@ -462,22 +467,6 @@ void xPortSysTickHandler( void )
|
|||
xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
|
||||
}
|
||||
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for
|
||||
* is accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code will execute part way
|
||||
* through one of the tick periods. */
|
||||
ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Enter a critical section but don't use the taskENTER_CRITICAL()
|
||||
* method as that will mask interrupts that should exit sleep mode. */
|
||||
__asm volatile ( "cpsid i" ::: "memory" );
|
||||
|
|
@ -488,23 +477,49 @@ void xPortSysTickHandler( void )
|
|||
* to be unsuspended then abandon the low power entry. */
|
||||
if( eTaskConfirmSleepModeStatus() == eAbortSleep )
|
||||
{
|
||||
/* Restart from whatever is left in the count register to complete
|
||||
* this tick period. */
|
||||
portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
/* Restart SysTick. */
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Reset the reload register to the value required for normal tick
|
||||
* periods. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
|
||||
/* Re-enable interrupts - see comments above the cpsid instruction()
|
||||
/* Re-enable interrupts - see comments above the cpsid instruction
|
||||
* above. */
|
||||
__asm volatile ( "cpsie i" ::: "memory" );
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for
|
||||
* is accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Use the SysTick current-value register to determine the number of
|
||||
* SysTick decrements remaining until the next tick interrupt. If the
|
||||
* current-value register is zero, then there are actually
|
||||
* ulTimerCountsForOneTick decrements remaining, not zero, because the
|
||||
* SysTick requests the interrupt when decrementing from 1 to 0. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code normally executes part
|
||||
* way through the first tick period. But if the SysTick IRQ is now
|
||||
* pending, then clear the IRQ, suppressing the first tick, and correct
|
||||
* the reload value to reflect that the second tick period is already
|
||||
* underway. The expected idle time is always at least two ticks. */
|
||||
ulReloadValue = ulSysTickDecrementsLeft + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ( portNVIC_INT_CTRL_REG & portNVIC_PEND_SYSTICK_SET_BIT ) != 0 )
|
||||
{
|
||||
portNVIC_INT_CTRL_REG = portNVIC_PEND_SYSTICK_CLEAR_BIT;
|
||||
ulReloadValue -= ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Set the new reload value. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
|
||||
|
||||
|
|
@ -533,8 +548,8 @@ void xPortSysTickHandler( void )
|
|||
configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
|
||||
|
||||
/* Re-enable interrupts to allow the interrupt that brought the MCU
|
||||
* out of sleep mode to execute immediately. see comments above
|
||||
* __disable_interrupt() call above. */
|
||||
* out of sleep mode to execute immediately. See comments above
|
||||
* the cpsid instruction above. */
|
||||
__asm volatile ( "cpsie i" ::: "memory" );
|
||||
__asm volatile ( "dsb" );
|
||||
__asm volatile ( "isb" );
|
||||
|
|
@ -554,26 +569,22 @@ void xPortSysTickHandler( void )
|
|||
* be, but using the tickless mode will inevitably result in some tiny
|
||||
* drift of the time maintained by the kernel with respect to calendar
|
||||
* time*/
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Determine if the SysTick clock has already counted to zero and
|
||||
* been set back to the current reload value (the reload back being
|
||||
* correct for the entire expected idle time) or if the SysTick is yet
|
||||
* to count to zero (in which case an interrupt other than the SysTick
|
||||
* must have brought the system out of sleep mode). */
|
||||
/* Determine whether the SysTick has already counted to zero. */
|
||||
if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
|
||||
{
|
||||
uint32_t ulCalculatedLoadValue;
|
||||
|
||||
/* The tick interrupt is already pending, and the SysTick count
|
||||
* reloaded with ulReloadValue. Reset the
|
||||
* portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
|
||||
* period. */
|
||||
/* The tick interrupt ended the sleep (or is now pending), and
|
||||
* a new tick period has started. Reset portNVIC_SYSTICK_LOAD_REG
|
||||
* with whatever remains of the new tick period. */
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
|
||||
|
||||
/* Don't allow a tiny value, or values that have somehow
|
||||
* underflowed because the post sleep hook did something
|
||||
* that took too long. */
|
||||
* that took too long or because the SysTick current-value register
|
||||
* is zero. */
|
||||
if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
|
||||
{
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
|
||||
|
|
@ -588,11 +599,29 @@ void xPortSysTickHandler( void )
|
|||
}
|
||||
else
|
||||
{
|
||||
/* Something other than the tick interrupt ended the sleep.
|
||||
* Work out how long the sleep lasted rounded to complete tick
|
||||
/* Something other than the tick interrupt ended the sleep. */
|
||||
|
||||
/* Use the SysTick current-value register to determine the
|
||||
* number of SysTick decrements remaining until the expected idle
|
||||
* time would have ended. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* If the SysTick is not using the core clock, the current-
|
||||
* value register might still be zero here. In that case, the
|
||||
* SysTick didn't load from the reload register, and there are
|
||||
* ulReloadValue + 1 decrements remaining, not zero. */
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulReloadValue + 1UL;
|
||||
}
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Work out how long the sleep lasted rounded to complete tick
|
||||
* periods (not the ulReload value which accounted for part
|
||||
* ticks). */
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - ulSysTickDecrementsLeft;
|
||||
|
||||
/* How many complete tick periods passed while the processor
|
||||
* was waiting? */
|
||||
|
|
@ -603,13 +632,26 @@ void xPortSysTickHandler( void )
|
|||
portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
|
||||
}
|
||||
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
|
||||
* again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
|
||||
* value. */
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG again,
|
||||
* then set portNVIC_SYSTICK_LOAD_REG back to its standard value. If
|
||||
* the SysTick is not using the core clock, temporarily configure it to
|
||||
* use the core clock. This configuration forces the SysTick to load
|
||||
* from portNVIC_SYSTICK_LOAD_REG immediately instead of at the next
|
||||
* cycle of the other clock. Then portNVIC_SYSTICK_LOAD_REG is ready
|
||||
* to receive the standard value immediately. */
|
||||
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* The temporary usage of the core clock has served its purpose,
|
||||
* as described above. Resume usage of the other clock. */
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Step the tick to account for any tick periods that elapsed. */
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
|
||||
/* Exit with interrupts enabled. */
|
||||
__asm volatile ( "cpsie i" ::: "memory" );
|
||||
|
|
@ -640,7 +682,7 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void )
|
|||
|
||||
/* Configure SysTick to interrupt at the requested rate. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
|||
|
|
@ -76,20 +76,13 @@
|
|||
#define portNVIC_SHPR3_REG ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
|
||||
#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
|
||||
#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
|
||||
#define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
|
||||
#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
|
||||
#define portNVIC_PEND_SYSTICK_SET_BIT ( 1UL << 26UL )
|
||||
#define portMIN_INTERRUPT_PRIORITY ( 255UL )
|
||||
#define portNVIC_PENDSV_PRI ( portMIN_INTERRUPT_PRIORITY << 16UL )
|
||||
#define portNVIC_SYSTICK_PRI ( portMIN_INTERRUPT_PRIORITY << 24UL )
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
|
||||
#else
|
||||
|
||||
/* The way the SysTick is clocked is not modified in case it is not the
|
||||
* same a the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 0 )
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
|
|
@ -197,7 +190,7 @@
|
|||
* have occurred while the SysTick counter is stopped during tickless idle
|
||||
* calculations.
|
||||
*/
|
||||
#define portMISSED_COUNTS_FACTOR ( 45UL )
|
||||
#define portMISSED_COUNTS_FACTOR ( 94UL )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
|
|
@ -256,6 +249,22 @@
|
|||
#define portINITIAL_CONTROL_UNPRIVILEGED ( 0x3 )
|
||||
#define portINITIAL_CONTROL_PRIVILEGED ( 0x2 )
|
||||
|
||||
/**
|
||||
* @brief Let the user override the default SysTick clock rate. If defined by the
|
||||
* user, this symbol must equal the SysTick clock rate when the CLK bit is 0 in the
|
||||
* configuration register.
|
||||
*/
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ ( configCPU_CLOCK_HZ )
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( portNVIC_SYSTICK_CLK_BIT )
|
||||
#else
|
||||
|
||||
/* Select the option to clock SysTick not at the same frequency as the core.
|
||||
* The clock used is often a divided version of the core clock. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( 0 )
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Let the user override the pre-loading of the initial LR with the
|
||||
* address of prvTaskExitError() in case it messes up unwinding of the stack
|
||||
|
|
@ -384,7 +393,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
#if ( configUSE_TICKLESS_IDLE == 1 )
|
||||
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
||||
{
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
||||
TickType_t xModifiableIdleTime;
|
||||
|
||||
/* Make sure the SysTick reload value does not overflow the counter. */
|
||||
|
|
@ -393,22 +402,6 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
|
||||
}
|
||||
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for is
|
||||
* accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code will execute part way
|
||||
* through one of the tick periods. */
|
||||
ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Enter a critical section but don't use the taskENTER_CRITICAL()
|
||||
* method as that will mask interrupts that should exit sleep mode. */
|
||||
__asm volatile ( "cpsid i" ::: "memory" );
|
||||
|
|
@ -416,26 +409,52 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
__asm volatile ( "isb" );
|
||||
|
||||
/* If a context switch is pending or a task is waiting for the scheduler
|
||||
* to be un-suspended then abandon the low power entry. */
|
||||
* to be unsuspended then abandon the low power entry. */
|
||||
if( eTaskConfirmSleepModeStatus() == eAbortSleep )
|
||||
{
|
||||
/* Restart from whatever is left in the count register to complete
|
||||
* this tick period. */
|
||||
portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
/* Restart SysTick. */
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Reset the reload register to the value required for normal tick
|
||||
* periods. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
|
||||
/* Re-enable interrupts - see comments above the cpsid instruction()
|
||||
/* Re-enable interrupts - see comments above the cpsid instruction
|
||||
* above. */
|
||||
__asm volatile ( "cpsie i" ::: "memory" );
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for
|
||||
* is accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Use the SysTick current-value register to determine the number of
|
||||
* SysTick decrements remaining until the next tick interrupt. If the
|
||||
* current-value register is zero, then there are actually
|
||||
* ulTimerCountsForOneTick decrements remaining, not zero, because the
|
||||
* SysTick requests the interrupt when decrementing from 1 to 0. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code normally executes part
|
||||
* way through the first tick period. But if the SysTick IRQ is now
|
||||
* pending, then clear the IRQ, suppressing the first tick, and correct
|
||||
* the reload value to reflect that the second tick period is already
|
||||
* underway. The expected idle time is always at least two ticks. */
|
||||
ulReloadValue = ulSysTickDecrementsLeft + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ( portNVIC_INT_CTRL_REG & portNVIC_PEND_SYSTICK_SET_BIT ) != 0 )
|
||||
{
|
||||
portNVIC_INT_CTRL_REG = portNVIC_PEND_SYSTICK_CLEAR_BIT;
|
||||
ulReloadValue -= ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Set the new reload value. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
|
||||
|
||||
|
|
@ -446,12 +465,11 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
/* Restart SysTick. */
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
|
||||
* set its parameter to 0 to indicate that its implementation
|
||||
* contains its own wait for interrupt or wait for event
|
||||
* instruction, and so wfi should not be executed again. However,
|
||||
* the original expected idle time variable must remain unmodified,
|
||||
* so a copy is taken. */
|
||||
/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
|
||||
* set its parameter to 0 to indicate that its implementation contains
|
||||
* its own wait for interrupt or wait for event instruction, and so wfi
|
||||
* should not be executed again. However, the original expected idle
|
||||
* time variable must remain unmodified, so a copy is taken. */
|
||||
xModifiableIdleTime = xExpectedIdleTime;
|
||||
configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
|
||||
|
||||
|
|
@ -465,47 +483,43 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
|
||||
|
||||
/* Re-enable interrupts to allow the interrupt that brought the MCU
|
||||
* out of sleep mode to execute immediately. See comments above
|
||||
* out of sleep mode to execute immediately. See comments above
|
||||
* the cpsid instruction above. */
|
||||
__asm volatile ( "cpsie i" ::: "memory" );
|
||||
__asm volatile ( "dsb" );
|
||||
__asm volatile ( "isb" );
|
||||
|
||||
/* Disable interrupts again because the clock is about to be stopped
|
||||
* and interrupts that execute while the clock is stopped will
|
||||
* increase any slippage between the time maintained by the RTOS and
|
||||
* calendar time. */
|
||||
* and interrupts that execute while the clock is stopped will increase
|
||||
* any slippage between the time maintained by the RTOS and calendar
|
||||
* time. */
|
||||
__asm volatile ( "cpsid i" ::: "memory" );
|
||||
__asm volatile ( "dsb" );
|
||||
__asm volatile ( "isb" );
|
||||
|
||||
/* Disable the SysTick clock without reading the
|
||||
* portNVIC_SYSTICK_CTRL_REG register to ensure the
|
||||
* portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.
|
||||
* Again, the time the SysTick is stopped for is accounted for as
|
||||
* best it can be, but using the tickless mode will inevitably
|
||||
* result in some tiny drift of the time maintained by the kernel
|
||||
* with respect to calendar time*/
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
|
||||
* portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set. Again,
|
||||
* the time the SysTick is stopped for is accounted for as best it can
|
||||
* be, but using the tickless mode will inevitably result in some tiny
|
||||
* drift of the time maintained by the kernel with respect to calendar
|
||||
* time*/
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Determine if the SysTick clock has already counted to zero and
|
||||
* been set back to the current reload value (the reload back being
|
||||
* correct for the entire expected idle time) or if the SysTick is
|
||||
* yet to count to zero (in which case an interrupt other than the
|
||||
* SysTick must have brought the system out of sleep mode). */
|
||||
/* Determine whether the SysTick has already counted to zero. */
|
||||
if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
|
||||
{
|
||||
uint32_t ulCalculatedLoadValue;
|
||||
|
||||
/* The tick interrupt is already pending, and the SysTick count
|
||||
* reloaded with ulReloadValue. Reset the
|
||||
* portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
|
||||
* period. */
|
||||
/* The tick interrupt ended the sleep (or is now pending), and
|
||||
* a new tick period has started. Reset portNVIC_SYSTICK_LOAD_REG
|
||||
* with whatever remains of the new tick period. */
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
|
||||
|
||||
/* Don't allow a tiny value, or values that have somehow
|
||||
* underflowed because the post sleep hook did something
|
||||
* that took too long. */
|
||||
* that took too long or because the SysTick current-value register
|
||||
* is zero. */
|
||||
if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
|
||||
{
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
|
||||
|
|
@ -514,17 +528,35 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
|
||||
|
||||
/* As the pending tick will be processed as soon as this
|
||||
* function exits, the tick value maintained by the tick is
|
||||
* stepped forward by one less than the time spent waiting. */
|
||||
* function exits, the tick value maintained by the tick is stepped
|
||||
* forward by one less than the time spent waiting. */
|
||||
ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Something other than the tick interrupt ended the sleep.
|
||||
* Work out how long the sleep lasted rounded to complete tick
|
||||
/* Something other than the tick interrupt ended the sleep. */
|
||||
|
||||
/* Use the SysTick current-value register to determine the
|
||||
* number of SysTick decrements remaining until the expected idle
|
||||
* time would have ended. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* If the SysTick is not using the core clock, the current-
|
||||
* value register might still be zero here. In that case, the
|
||||
* SysTick didn't load from the reload register, and there are
|
||||
* ulReloadValue + 1 decrements remaining, not zero. */
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulReloadValue + 1UL;
|
||||
}
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Work out how long the sleep lasted rounded to complete tick
|
||||
* periods (not the ulReload value which accounted for part
|
||||
* ticks). */
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - ulSysTickDecrementsLeft;
|
||||
|
||||
/* How many complete tick periods passed while the processor
|
||||
* was waiting? */
|
||||
|
|
@ -535,13 +567,26 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
|
||||
}
|
||||
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
|
||||
* again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
|
||||
* value. */
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG again,
|
||||
* then set portNVIC_SYSTICK_LOAD_REG back to its standard value. If
|
||||
* the SysTick is not using the core clock, temporarily configure it to
|
||||
* use the core clock. This configuration forces the SysTick to load
|
||||
* from portNVIC_SYSTICK_LOAD_REG immediately instead of at the next
|
||||
* cycle of the other clock. Then portNVIC_SYSTICK_LOAD_REG is ready
|
||||
* to receive the standard value immediately. */
|
||||
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* The temporary usage of the core clock has served its purpose,
|
||||
* as described above. Resume usage of the other clock. */
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Step the tick to account for any tick periods that elapsed. */
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
|
||||
/* Exit with interrupts enabled. */
|
||||
__asm volatile ( "cpsie i" ::: "memory" );
|
||||
|
|
@ -567,7 +612,7 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FU
|
|||
|
||||
/* Configure SysTick to interrupt at the requested rate. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
|||
|
|
@ -76,20 +76,13 @@
|
|||
#define portNVIC_SHPR3_REG ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
|
||||
#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
|
||||
#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
|
||||
#define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
|
||||
#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
|
||||
#define portNVIC_PEND_SYSTICK_SET_BIT ( 1UL << 26UL )
|
||||
#define portMIN_INTERRUPT_PRIORITY ( 255UL )
|
||||
#define portNVIC_PENDSV_PRI ( portMIN_INTERRUPT_PRIORITY << 16UL )
|
||||
#define portNVIC_SYSTICK_PRI ( portMIN_INTERRUPT_PRIORITY << 24UL )
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
|
||||
#else
|
||||
|
||||
/* The way the SysTick is clocked is not modified in case it is not the
|
||||
* same a the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 0 )
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
|
|
@ -197,7 +190,7 @@
|
|||
* have occurred while the SysTick counter is stopped during tickless idle
|
||||
* calculations.
|
||||
*/
|
||||
#define portMISSED_COUNTS_FACTOR ( 45UL )
|
||||
#define portMISSED_COUNTS_FACTOR ( 94UL )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
|
|
@ -256,6 +249,22 @@
|
|||
#define portINITIAL_CONTROL_UNPRIVILEGED ( 0x3 )
|
||||
#define portINITIAL_CONTROL_PRIVILEGED ( 0x2 )
|
||||
|
||||
/**
|
||||
* @brief Let the user override the default SysTick clock rate. If defined by the
|
||||
* user, this symbol must equal the SysTick clock rate when the CLK bit is 0 in the
|
||||
* configuration register.
|
||||
*/
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ ( configCPU_CLOCK_HZ )
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( portNVIC_SYSTICK_CLK_BIT )
|
||||
#else
|
||||
|
||||
/* Select the option to clock SysTick not at the same frequency as the core.
|
||||
* The clock used is often a divided version of the core clock. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( 0 )
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Let the user override the pre-loading of the initial LR with the
|
||||
* address of prvTaskExitError() in case it messes up unwinding of the stack
|
||||
|
|
@ -384,7 +393,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
#if ( configUSE_TICKLESS_IDLE == 1 )
|
||||
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
||||
{
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
||||
TickType_t xModifiableIdleTime;
|
||||
|
||||
/* Make sure the SysTick reload value does not overflow the counter. */
|
||||
|
|
@ -393,22 +402,6 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
|
||||
}
|
||||
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for is
|
||||
* accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code will execute part way
|
||||
* through one of the tick periods. */
|
||||
ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Enter a critical section but don't use the taskENTER_CRITICAL()
|
||||
* method as that will mask interrupts that should exit sleep mode. */
|
||||
__asm volatile ( "cpsid i" ::: "memory" );
|
||||
|
|
@ -416,26 +409,52 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
__asm volatile ( "isb" );
|
||||
|
||||
/* If a context switch is pending or a task is waiting for the scheduler
|
||||
* to be un-suspended then abandon the low power entry. */
|
||||
* to be unsuspended then abandon the low power entry. */
|
||||
if( eTaskConfirmSleepModeStatus() == eAbortSleep )
|
||||
{
|
||||
/* Restart from whatever is left in the count register to complete
|
||||
* this tick period. */
|
||||
portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
/* Restart SysTick. */
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Reset the reload register to the value required for normal tick
|
||||
* periods. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
|
||||
/* Re-enable interrupts - see comments above the cpsid instruction()
|
||||
/* Re-enable interrupts - see comments above the cpsid instruction
|
||||
* above. */
|
||||
__asm volatile ( "cpsie i" ::: "memory" );
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for
|
||||
* is accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Use the SysTick current-value register to determine the number of
|
||||
* SysTick decrements remaining until the next tick interrupt. If the
|
||||
* current-value register is zero, then there are actually
|
||||
* ulTimerCountsForOneTick decrements remaining, not zero, because the
|
||||
* SysTick requests the interrupt when decrementing from 1 to 0. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code normally executes part
|
||||
* way through the first tick period. But if the SysTick IRQ is now
|
||||
* pending, then clear the IRQ, suppressing the first tick, and correct
|
||||
* the reload value to reflect that the second tick period is already
|
||||
* underway. The expected idle time is always at least two ticks. */
|
||||
ulReloadValue = ulSysTickDecrementsLeft + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ( portNVIC_INT_CTRL_REG & portNVIC_PEND_SYSTICK_SET_BIT ) != 0 )
|
||||
{
|
||||
portNVIC_INT_CTRL_REG = portNVIC_PEND_SYSTICK_CLEAR_BIT;
|
||||
ulReloadValue -= ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Set the new reload value. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
|
||||
|
||||
|
|
@ -446,12 +465,11 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
/* Restart SysTick. */
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
|
||||
* set its parameter to 0 to indicate that its implementation
|
||||
* contains its own wait for interrupt or wait for event
|
||||
* instruction, and so wfi should not be executed again. However,
|
||||
* the original expected idle time variable must remain unmodified,
|
||||
* so a copy is taken. */
|
||||
/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
|
||||
* set its parameter to 0 to indicate that its implementation contains
|
||||
* its own wait for interrupt or wait for event instruction, and so wfi
|
||||
* should not be executed again. However, the original expected idle
|
||||
* time variable must remain unmodified, so a copy is taken. */
|
||||
xModifiableIdleTime = xExpectedIdleTime;
|
||||
configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
|
||||
|
||||
|
|
@ -465,47 +483,43 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
|
||||
|
||||
/* Re-enable interrupts to allow the interrupt that brought the MCU
|
||||
* out of sleep mode to execute immediately. See comments above
|
||||
* out of sleep mode to execute immediately. See comments above
|
||||
* the cpsid instruction above. */
|
||||
__asm volatile ( "cpsie i" ::: "memory" );
|
||||
__asm volatile ( "dsb" );
|
||||
__asm volatile ( "isb" );
|
||||
|
||||
/* Disable interrupts again because the clock is about to be stopped
|
||||
* and interrupts that execute while the clock is stopped will
|
||||
* increase any slippage between the time maintained by the RTOS and
|
||||
* calendar time. */
|
||||
* and interrupts that execute while the clock is stopped will increase
|
||||
* any slippage between the time maintained by the RTOS and calendar
|
||||
* time. */
|
||||
__asm volatile ( "cpsid i" ::: "memory" );
|
||||
__asm volatile ( "dsb" );
|
||||
__asm volatile ( "isb" );
|
||||
|
||||
/* Disable the SysTick clock without reading the
|
||||
* portNVIC_SYSTICK_CTRL_REG register to ensure the
|
||||
* portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.
|
||||
* Again, the time the SysTick is stopped for is accounted for as
|
||||
* best it can be, but using the tickless mode will inevitably
|
||||
* result in some tiny drift of the time maintained by the kernel
|
||||
* with respect to calendar time*/
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
|
||||
* portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set. Again,
|
||||
* the time the SysTick is stopped for is accounted for as best it can
|
||||
* be, but using the tickless mode will inevitably result in some tiny
|
||||
* drift of the time maintained by the kernel with respect to calendar
|
||||
* time*/
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Determine if the SysTick clock has already counted to zero and
|
||||
* been set back to the current reload value (the reload back being
|
||||
* correct for the entire expected idle time) or if the SysTick is
|
||||
* yet to count to zero (in which case an interrupt other than the
|
||||
* SysTick must have brought the system out of sleep mode). */
|
||||
/* Determine whether the SysTick has already counted to zero. */
|
||||
if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
|
||||
{
|
||||
uint32_t ulCalculatedLoadValue;
|
||||
|
||||
/* The tick interrupt is already pending, and the SysTick count
|
||||
* reloaded with ulReloadValue. Reset the
|
||||
* portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
|
||||
* period. */
|
||||
/* The tick interrupt ended the sleep (or is now pending), and
|
||||
* a new tick period has started. Reset portNVIC_SYSTICK_LOAD_REG
|
||||
* with whatever remains of the new tick period. */
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
|
||||
|
||||
/* Don't allow a tiny value, or values that have somehow
|
||||
* underflowed because the post sleep hook did something
|
||||
* that took too long. */
|
||||
* that took too long or because the SysTick current-value register
|
||||
* is zero. */
|
||||
if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
|
||||
{
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
|
||||
|
|
@ -514,17 +528,35 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
|
||||
|
||||
/* As the pending tick will be processed as soon as this
|
||||
* function exits, the tick value maintained by the tick is
|
||||
* stepped forward by one less than the time spent waiting. */
|
||||
* function exits, the tick value maintained by the tick is stepped
|
||||
* forward by one less than the time spent waiting. */
|
||||
ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Something other than the tick interrupt ended the sleep.
|
||||
* Work out how long the sleep lasted rounded to complete tick
|
||||
/* Something other than the tick interrupt ended the sleep. */
|
||||
|
||||
/* Use the SysTick current-value register to determine the
|
||||
* number of SysTick decrements remaining until the expected idle
|
||||
* time would have ended. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* If the SysTick is not using the core clock, the current-
|
||||
* value register might still be zero here. In that case, the
|
||||
* SysTick didn't load from the reload register, and there are
|
||||
* ulReloadValue + 1 decrements remaining, not zero. */
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulReloadValue + 1UL;
|
||||
}
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Work out how long the sleep lasted rounded to complete tick
|
||||
* periods (not the ulReload value which accounted for part
|
||||
* ticks). */
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - ulSysTickDecrementsLeft;
|
||||
|
||||
/* How many complete tick periods passed while the processor
|
||||
* was waiting? */
|
||||
|
|
@ -535,13 +567,26 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
|
||||
}
|
||||
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
|
||||
* again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
|
||||
* value. */
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG again,
|
||||
* then set portNVIC_SYSTICK_LOAD_REG back to its standard value. If
|
||||
* the SysTick is not using the core clock, temporarily configure it to
|
||||
* use the core clock. This configuration forces the SysTick to load
|
||||
* from portNVIC_SYSTICK_LOAD_REG immediately instead of at the next
|
||||
* cycle of the other clock. Then portNVIC_SYSTICK_LOAD_REG is ready
|
||||
* to receive the standard value immediately. */
|
||||
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* The temporary usage of the core clock has served its purpose,
|
||||
* as described above. Resume usage of the other clock. */
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Step the tick to account for any tick periods that elapsed. */
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
|
||||
/* Exit with interrupts enabled. */
|
||||
__asm volatile ( "cpsie i" ::: "memory" );
|
||||
|
|
@ -567,7 +612,7 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FU
|
|||
|
||||
/* Configure SysTick to interrupt at the requested rate. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
|||
|
|
@ -90,16 +90,17 @@
|
|||
/* A fiddle factor to estimate the number of SysTick counts that would have
|
||||
* occurred while the SysTick counter is stopped during tickless idle
|
||||
* calculations. */
|
||||
#define portMISSED_COUNTS_FACTOR ( 45UL )
|
||||
#define portMISSED_COUNTS_FACTOR ( 94UL )
|
||||
|
||||
/* Let the user override the default SysTick clock rate. If defined by the
|
||||
* user, this symbol must equal the SysTick clock rate when the CLK bit is 0 in the
|
||||
* configuration register. */
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ ( configCPU_CLOCK_HZ )
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( portNVIC_SYSTICK_CLK_BIT )
|
||||
#else
|
||||
|
||||
/* Select the option to clock SysTick not at the same frequency as the core.
|
||||
* The clock used is often a divided version of the core clock. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( 0 )
|
||||
|
|
@ -556,6 +557,7 @@ void xPortSysTickHandler( void )
|
|||
* ulTimerCountsForOneTick decrements remaining, not zero, because the
|
||||
* SysTick requests the interrupt when decrementing from 1 to 0. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulTimerCountsForOneTick;
|
||||
|
|
@ -568,11 +570,13 @@ void xPortSysTickHandler( void )
|
|||
* the reload value to reflect that the second tick period is already
|
||||
* underway. The expected idle time is always at least two ticks. */
|
||||
ulReloadValue = ulSysTickDecrementsLeft + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ( portNVIC_INT_CTRL_REG & portNVIC_PEND_SYSTICK_SET_BIT ) != 0 )
|
||||
{
|
||||
portNVIC_INT_CTRL_REG = portNVIC_PEND_SYSTICK_CLEAR_BIT;
|
||||
ulReloadValue -= ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
|
|
@ -663,7 +667,7 @@ void xPortSysTickHandler( void )
|
|||
* number of SysTick decrements remaining until the expected idle
|
||||
* time would have ended. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
#if( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* If the SysTick is not using the core clock, the current-
|
||||
* value register might still be zero here. In that case, the
|
||||
|
|
@ -700,14 +704,14 @@ void xPortSysTickHandler( void )
|
|||
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
#if( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* The temporary usage of the core clock has served its purpose,
|
||||
* as described above. Resume usage of the other clock. */
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
|
||||
/* Step the tick to account for any tick periods that elapsed. */
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
|
||||
|
|
|
|||
|
|
@ -36,27 +36,18 @@
|
|||
#error This port can only be used when the project options are configured to enable hardware floating point support.
|
||||
#endif
|
||||
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
|
||||
#else
|
||||
|
||||
/* The way the SysTick is clocked is not modified in case it is not the same
|
||||
* as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 0 )
|
||||
#endif
|
||||
|
||||
/* Constants required to manipulate the core. Registers first... */
|
||||
#define portNVIC_SYSTICK_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000e010 ) )
|
||||
#define portNVIC_SYSTICK_LOAD_REG ( *( ( volatile uint32_t * ) 0xe000e014 ) )
|
||||
#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( *( ( volatile uint32_t * ) 0xe000e018 ) )
|
||||
#define portNVIC_SHPR3_REG ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
|
||||
/* ...then bits in the registers. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
|
||||
#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
|
||||
#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
|
||||
#define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
|
||||
#define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL )
|
||||
#define portNVIC_PEND_SYSTICK_SET_BIT ( 1UL << 26UL )
|
||||
#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
|
||||
|
||||
#define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
|
||||
|
|
@ -93,7 +84,21 @@
|
|||
/* A fiddle factor to estimate the number of SysTick counts that would have
|
||||
* occurred while the SysTick counter is stopped during tickless idle
|
||||
* calculations. */
|
||||
#define portMISSED_COUNTS_FACTOR ( 45UL )
|
||||
#define portMISSED_COUNTS_FACTOR ( 94UL )
|
||||
|
||||
/* Let the user override the default SysTick clock rate. If defined by the
|
||||
* user, this symbol must equal the SysTick clock rate when the CLK bit is 0 in the
|
||||
* configuration register. */
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ ( configCPU_CLOCK_HZ )
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( portNVIC_SYSTICK_CLK_BIT )
|
||||
#else
|
||||
|
||||
/* Select the option to clock SysTick not at the same frequency as the core.
|
||||
* The clock used is often a divided version of the core clock. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( 0 )
|
||||
#endif
|
||||
|
||||
/* Let the user override the pre-loading of the initial LR with the address of
|
||||
* prvTaskExitError() in case it messes up unwinding of the stack in the
|
||||
|
|
@ -505,7 +510,7 @@ void xPortSysTickHandler( void )
|
|||
|
||||
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
||||
{
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
||||
TickType_t xModifiableIdleTime;
|
||||
|
||||
/* Make sure the SysTick reload value does not overflow the counter. */
|
||||
|
|
@ -514,22 +519,6 @@ void xPortSysTickHandler( void )
|
|||
xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
|
||||
}
|
||||
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for
|
||||
* is accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code will execute part way
|
||||
* through one of the tick periods. */
|
||||
ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Enter a critical section but don't use the taskENTER_CRITICAL()
|
||||
* method as that will mask interrupts that should exit sleep mode. */
|
||||
__asm volatile ( "cpsid i" ::: "memory" );
|
||||
|
|
@ -540,23 +529,49 @@ void xPortSysTickHandler( void )
|
|||
* to be unsuspended then abandon the low power entry. */
|
||||
if( eTaskConfirmSleepModeStatus() == eAbortSleep )
|
||||
{
|
||||
/* Restart from whatever is left in the count register to complete
|
||||
* this tick period. */
|
||||
portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
/* Restart SysTick. */
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Reset the reload register to the value required for normal tick
|
||||
* periods. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
|
||||
/* Re-enable interrupts - see comments above the cpsid instruction()
|
||||
/* Re-enable interrupts - see comments above the cpsid instruction
|
||||
* above. */
|
||||
__asm volatile ( "cpsie i" ::: "memory" );
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for
|
||||
* is accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Use the SysTick current-value register to determine the number of
|
||||
* SysTick decrements remaining until the next tick interrupt. If the
|
||||
* current-value register is zero, then there are actually
|
||||
* ulTimerCountsForOneTick decrements remaining, not zero, because the
|
||||
* SysTick requests the interrupt when decrementing from 1 to 0. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code normally executes part
|
||||
* way through the first tick period. But if the SysTick IRQ is now
|
||||
* pending, then clear the IRQ, suppressing the first tick, and correct
|
||||
* the reload value to reflect that the second tick period is already
|
||||
* underway. The expected idle time is always at least two ticks. */
|
||||
ulReloadValue = ulSysTickDecrementsLeft + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ( portNVIC_INT_CTRL_REG & portNVIC_PEND_SYSTICK_SET_BIT ) != 0 )
|
||||
{
|
||||
portNVIC_INT_CTRL_REG = portNVIC_PEND_SYSTICK_CLEAR_BIT;
|
||||
ulReloadValue -= ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Set the new reload value. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
|
||||
|
||||
|
|
@ -585,8 +600,8 @@ void xPortSysTickHandler( void )
|
|||
configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
|
||||
|
||||
/* Re-enable interrupts to allow the interrupt that brought the MCU
|
||||
* out of sleep mode to execute immediately. see comments above
|
||||
* __disable_interrupt() call above. */
|
||||
* out of sleep mode to execute immediately. See comments above
|
||||
* the cpsid instruction above. */
|
||||
__asm volatile ( "cpsie i" ::: "memory" );
|
||||
__asm volatile ( "dsb" );
|
||||
__asm volatile ( "isb" );
|
||||
|
|
@ -606,26 +621,22 @@ void xPortSysTickHandler( void )
|
|||
* be, but using the tickless mode will inevitably result in some tiny
|
||||
* drift of the time maintained by the kernel with respect to calendar
|
||||
* time*/
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Determine if the SysTick clock has already counted to zero and
|
||||
* been set back to the current reload value (the reload back being
|
||||
* correct for the entire expected idle time) or if the SysTick is yet
|
||||
* to count to zero (in which case an interrupt other than the SysTick
|
||||
* must have brought the system out of sleep mode). */
|
||||
/* Determine whether the SysTick has already counted to zero. */
|
||||
if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
|
||||
{
|
||||
uint32_t ulCalculatedLoadValue;
|
||||
|
||||
/* The tick interrupt is already pending, and the SysTick count
|
||||
* reloaded with ulReloadValue. Reset the
|
||||
* portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
|
||||
* period. */
|
||||
/* The tick interrupt ended the sleep (or is now pending), and
|
||||
* a new tick period has started. Reset portNVIC_SYSTICK_LOAD_REG
|
||||
* with whatever remains of the new tick period. */
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
|
||||
|
||||
/* Don't allow a tiny value, or values that have somehow
|
||||
* underflowed because the post sleep hook did something
|
||||
* that took too long. */
|
||||
* that took too long or because the SysTick current-value register
|
||||
* is zero. */
|
||||
if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
|
||||
{
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
|
||||
|
|
@ -640,11 +651,29 @@ void xPortSysTickHandler( void )
|
|||
}
|
||||
else
|
||||
{
|
||||
/* Something other than the tick interrupt ended the sleep.
|
||||
* Work out how long the sleep lasted rounded to complete tick
|
||||
/* Something other than the tick interrupt ended the sleep. */
|
||||
|
||||
/* Use the SysTick current-value register to determine the
|
||||
* number of SysTick decrements remaining until the expected idle
|
||||
* time would have ended. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* If the SysTick is not using the core clock, the current-
|
||||
* value register might still be zero here. In that case, the
|
||||
* SysTick didn't load from the reload register, and there are
|
||||
* ulReloadValue + 1 decrements remaining, not zero. */
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulReloadValue + 1UL;
|
||||
}
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Work out how long the sleep lasted rounded to complete tick
|
||||
* periods (not the ulReload value which accounted for part
|
||||
* ticks). */
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - ulSysTickDecrementsLeft;
|
||||
|
||||
/* How many complete tick periods passed while the processor
|
||||
* was waiting? */
|
||||
|
|
@ -655,13 +684,26 @@ void xPortSysTickHandler( void )
|
|||
portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
|
||||
}
|
||||
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
|
||||
* again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
|
||||
* value. */
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG again,
|
||||
* then set portNVIC_SYSTICK_LOAD_REG back to its standard value. If
|
||||
* the SysTick is not using the core clock, temporarily configure it to
|
||||
* use the core clock. This configuration forces the SysTick to load
|
||||
* from portNVIC_SYSTICK_LOAD_REG immediately instead of at the next
|
||||
* cycle of the other clock. Then portNVIC_SYSTICK_LOAD_REG is ready
|
||||
* to receive the standard value immediately. */
|
||||
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* The temporary usage of the core clock has served its purpose,
|
||||
* as described above. Resume usage of the other clock. */
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Step the tick to account for any tick periods that elapsed. */
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
|
||||
/* Exit with interrupts enabled. */
|
||||
__asm volatile ( "cpsie i" ::: "memory" );
|
||||
|
|
@ -692,7 +734,7 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void )
|
|||
|
||||
/* Configure SysTick to interrupt at the requested rate. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
|||
|
|
@ -45,6 +45,8 @@
|
|||
#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
|
||||
#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
|
||||
#define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
|
||||
#define portNVIC_PEND_SYSTICK_SET_BIT ( 1UL << 26UL )
|
||||
#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
|
||||
#define portMIN_INTERRUPT_PRIORITY ( 255UL )
|
||||
#define portNVIC_PENDSV_PRI ( portMIN_INTERRUPT_PRIORITY << 16UL )
|
||||
#define portNVIC_SYSTICK_PRI ( portMIN_INTERRUPT_PRIORITY << 24UL )
|
||||
|
|
@ -70,7 +72,7 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
|
|||
* occurred while the SysTick counter is stopped during tickless idle
|
||||
* calculations. */
|
||||
#ifndef portMISSED_COUNTS_FACTOR
|
||||
#define portMISSED_COUNTS_FACTOR ( 45UL )
|
||||
#define portMISSED_COUNTS_FACTOR ( 94UL )
|
||||
#endif
|
||||
|
||||
/* The number of SysTick increments that make up one tick period. */
|
||||
|
|
@ -90,6 +92,20 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
|
|||
static uint32_t ulStoppedTimerCompensation = 0;
|
||||
#endif /* configUSE_TICKLESS_IDLE */
|
||||
|
||||
/* Let the user override the default SysTick clock rate. If defined by the
|
||||
* user, this symbol must equal the SysTick clock rate when the CLK bit is 0 in the
|
||||
* configuration register. */
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ ( configCPU_CLOCK_HZ )
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( portNVIC_SYSTICK_CLK_BIT )
|
||||
#else
|
||||
|
||||
/* Select the option to clock SysTick not at the same frequency as the core.
|
||||
* The clock used is often a divided version of the core clock. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( 0 )
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Setup the timer to generate the tick interrupts. The implementation in this
|
||||
* file is weak to allow application writers to change the timer used to
|
||||
|
|
@ -245,9 +261,9 @@ __weak void vPortSetupTimerInterrupt( void )
|
|||
/* Calculate the constants required to configure the tick interrupt. */
|
||||
#if ( configUSE_TICKLESS_IDLE == 1 )
|
||||
{
|
||||
ulTimerCountsForOneTick = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ );
|
||||
ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
|
||||
xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
|
||||
ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR;
|
||||
ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
|
||||
}
|
||||
#endif /* configUSE_TICKLESS_IDLE */
|
||||
|
||||
|
|
@ -256,8 +272,8 @@ __weak void vPortSetupTimerInterrupt( void )
|
|||
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
|
||||
|
||||
/* Configure SysTick to interrupt at the requested rate. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
@ -265,7 +281,7 @@ __weak void vPortSetupTimerInterrupt( void )
|
|||
|
||||
__weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
||||
{
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
||||
TickType_t xModifiableIdleTime;
|
||||
|
||||
/* Make sure the SysTick reload value does not overflow the counter. */
|
||||
|
|
@ -274,22 +290,6 @@ __weak void vPortSetupTimerInterrupt( void )
|
|||
xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
|
||||
}
|
||||
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for
|
||||
* is accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code will execute part way
|
||||
* through one of the tick periods. */
|
||||
ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Enter a critical section but don't use the taskENTER_CRITICAL()
|
||||
* method as that will mask interrupts that should exit sleep mode. */
|
||||
__disable_interrupt();
|
||||
|
|
@ -300,23 +300,49 @@ __weak void vPortSetupTimerInterrupt( void )
|
|||
* to be unsuspended then abandon the low power entry. */
|
||||
if( eTaskConfirmSleepModeStatus() == eAbortSleep )
|
||||
{
|
||||
/* Restart from whatever is left in the count register to complete
|
||||
* this tick period. */
|
||||
portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
/* Restart SysTick. */
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Reset the reload register to the value required for normal tick
|
||||
* periods. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
|
||||
/* Re-enable interrupts - see comments above __disable_interrupt()
|
||||
/* Re-enable interrupts - see comments above the __disable_interrupt()
|
||||
* call above. */
|
||||
__enable_interrupt();
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for
|
||||
* is accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Use the SysTick current-value register to determine the number of
|
||||
* SysTick decrements remaining until the next tick interrupt. If the
|
||||
* current-value register is zero, then there are actually
|
||||
* ulTimerCountsForOneTick decrements remaining, not zero, because the
|
||||
* SysTick requests the interrupt when decrementing from 1 to 0. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code normally executes part
|
||||
* way through the first tick period. But if the SysTick IRQ is now
|
||||
* pending, then clear the IRQ, suppressing the first tick, and correct
|
||||
* the reload value to reflect that the second tick period is already
|
||||
* underway. The expected idle time is always at least two ticks. */
|
||||
ulReloadValue = ulSysTickDecrementsLeft + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ( portNVIC_INT_CTRL_REG & portNVIC_PEND_SYSTICK_SET_BIT ) != 0 )
|
||||
{
|
||||
portNVIC_INT_CTRL_REG = portNVIC_PEND_SYSTICK_CLEAR_BIT;
|
||||
ulReloadValue -= ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Set the new reload value. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
|
||||
|
||||
|
|
@ -345,8 +371,8 @@ __weak void vPortSetupTimerInterrupt( void )
|
|||
configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
|
||||
|
||||
/* Re-enable interrupts to allow the interrupt that brought the MCU
|
||||
* out of sleep mode to execute immediately. see comments above
|
||||
* __disable_interrupt() call above. */
|
||||
* out of sleep mode to execute immediately. See comments above
|
||||
* the __disable_interrupt() call above. */
|
||||
__enable_interrupt();
|
||||
__DSB();
|
||||
__ISB();
|
||||
|
|
@ -366,26 +392,22 @@ __weak void vPortSetupTimerInterrupt( void )
|
|||
* be, but using the tickless mode will inevitably result in some tiny
|
||||
* drift of the time maintained by the kernel with respect to calendar
|
||||
* time*/
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Determine if the SysTick clock has already counted to zero and
|
||||
* been set back to the current reload value (the reload back being
|
||||
* correct for the entire expected idle time) or if the SysTick is yet
|
||||
* to count to zero (in which case an interrupt other than the SysTick
|
||||
* must have brought the system out of sleep mode). */
|
||||
/* Determine whether the SysTick has already counted to zero. */
|
||||
if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
|
||||
{
|
||||
uint32_t ulCalculatedLoadValue;
|
||||
|
||||
/* The tick interrupt is already pending, and the SysTick count
|
||||
* reloaded with ulReloadValue. Reset the
|
||||
* portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
|
||||
* period. */
|
||||
/* The tick interrupt ended the sleep (or is now pending), and
|
||||
* a new tick period has started. Reset portNVIC_SYSTICK_LOAD_REG
|
||||
* with whatever remains of the new tick period. */
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
|
||||
|
||||
/* Don't allow a tiny value, or values that have somehow
|
||||
* underflowed because the post sleep hook did something
|
||||
* that took too long. */
|
||||
* that took too long or because the SysTick current-value register
|
||||
* is zero. */
|
||||
if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
|
||||
{
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
|
||||
|
|
@ -400,11 +422,29 @@ __weak void vPortSetupTimerInterrupt( void )
|
|||
}
|
||||
else
|
||||
{
|
||||
/* Something other than the tick interrupt ended the sleep.
|
||||
* Work out how long the sleep lasted rounded to complete tick
|
||||
/* Something other than the tick interrupt ended the sleep. */
|
||||
|
||||
/* Use the SysTick current-value register to determine the
|
||||
* number of SysTick decrements remaining until the expected idle
|
||||
* time would have ended. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* If the SysTick is not using the core clock, the current-
|
||||
* value register might still be zero here. In that case, the
|
||||
* SysTick didn't load from the reload register, and there are
|
||||
* ulReloadValue + 1 decrements remaining, not zero. */
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulReloadValue + 1UL;
|
||||
}
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Work out how long the sleep lasted rounded to complete tick
|
||||
* periods (not the ulReload value which accounted for part
|
||||
* ticks). */
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - ulSysTickDecrementsLeft;
|
||||
|
||||
/* How many complete tick periods passed while the processor
|
||||
* was waiting? */
|
||||
|
|
@ -415,15 +455,28 @@ __weak void vPortSetupTimerInterrupt( void )
|
|||
portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
|
||||
}
|
||||
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
|
||||
* again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
|
||||
* value. */
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG again,
|
||||
* then set portNVIC_SYSTICK_LOAD_REG back to its standard value. If
|
||||
* the SysTick is not using the core clock, temporarily configure it to
|
||||
* use the core clock. This configuration forces the SysTick to load
|
||||
* from portNVIC_SYSTICK_LOAD_REG immediately instead of at the next
|
||||
* cycle of the other clock. Then portNVIC_SYSTICK_LOAD_REG is ready
|
||||
* to receive the standard value immediately. */
|
||||
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* The temporary usage of the core clock has served its purpose,
|
||||
* as described above. Resume usage of the other clock. */
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Exit with interrpts enabled. */
|
||||
/* Step the tick to account for any tick periods that elapsed. */
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
|
||||
/* Exit with interrupts enabled. */
|
||||
__enable_interrupt();
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -22,10 +22,8 @@
|
|||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
|
||||
#ifndef PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
|
||||
|
|
@ -79,8 +77,9 @@
|
|||
|
||||
/* Scheduler utilities. */
|
||||
extern void vPortYield( void );
|
||||
#define portNVIC_INT_CTRL ( ( volatile uint32_t * ) 0xe000ed04 )
|
||||
#define portNVIC_PENDSVSET 0x10000000
|
||||
#define portNVIC_INT_CTRL ( ( volatile uint32_t * ) 0xe000ed04 )
|
||||
#define portNVIC_INT_CTRL_REG ( *( portNVIC_INT_CTRL ) )
|
||||
#define portNVIC_PENDSVSET 0x10000000
|
||||
#define portYIELD() vPortYield()
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET
|
||||
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
|
||||
|
|
|
|||
|
|
@ -76,20 +76,13 @@
|
|||
#define portNVIC_SHPR3_REG ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
|
||||
#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
|
||||
#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
|
||||
#define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
|
||||
#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
|
||||
#define portNVIC_PEND_SYSTICK_SET_BIT ( 1UL << 26UL )
|
||||
#define portMIN_INTERRUPT_PRIORITY ( 255UL )
|
||||
#define portNVIC_PENDSV_PRI ( portMIN_INTERRUPT_PRIORITY << 16UL )
|
||||
#define portNVIC_SYSTICK_PRI ( portMIN_INTERRUPT_PRIORITY << 24UL )
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
|
||||
#else
|
||||
|
||||
/* The way the SysTick is clocked is not modified in case it is not the
|
||||
* same a the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 0 )
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
|
|
@ -197,7 +190,7 @@
|
|||
* have occurred while the SysTick counter is stopped during tickless idle
|
||||
* calculations.
|
||||
*/
|
||||
#define portMISSED_COUNTS_FACTOR ( 45UL )
|
||||
#define portMISSED_COUNTS_FACTOR ( 94UL )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
|
|
@ -256,6 +249,22 @@
|
|||
#define portINITIAL_CONTROL_UNPRIVILEGED ( 0x3 )
|
||||
#define portINITIAL_CONTROL_PRIVILEGED ( 0x2 )
|
||||
|
||||
/**
|
||||
* @brief Let the user override the default SysTick clock rate. If defined by the
|
||||
* user, this symbol must equal the SysTick clock rate when the CLK bit is 0 in the
|
||||
* configuration register.
|
||||
*/
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ ( configCPU_CLOCK_HZ )
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( portNVIC_SYSTICK_CLK_BIT )
|
||||
#else
|
||||
|
||||
/* Select the option to clock SysTick not at the same frequency as the core.
|
||||
* The clock used is often a divided version of the core clock. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( 0 )
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Let the user override the pre-loading of the initial LR with the
|
||||
* address of prvTaskExitError() in case it messes up unwinding of the stack
|
||||
|
|
@ -384,7 +393,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
#if ( configUSE_TICKLESS_IDLE == 1 )
|
||||
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
||||
{
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
||||
TickType_t xModifiableIdleTime;
|
||||
|
||||
/* Make sure the SysTick reload value does not overflow the counter. */
|
||||
|
|
@ -393,22 +402,6 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
|
||||
}
|
||||
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for is
|
||||
* accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code will execute part way
|
||||
* through one of the tick periods. */
|
||||
ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Enter a critical section but don't use the taskENTER_CRITICAL()
|
||||
* method as that will mask interrupts that should exit sleep mode. */
|
||||
__asm volatile ( "cpsid i" ::: "memory" );
|
||||
|
|
@ -416,26 +409,52 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
__asm volatile ( "isb" );
|
||||
|
||||
/* If a context switch is pending or a task is waiting for the scheduler
|
||||
* to be un-suspended then abandon the low power entry. */
|
||||
* to be unsuspended then abandon the low power entry. */
|
||||
if( eTaskConfirmSleepModeStatus() == eAbortSleep )
|
||||
{
|
||||
/* Restart from whatever is left in the count register to complete
|
||||
* this tick period. */
|
||||
portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
/* Restart SysTick. */
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Reset the reload register to the value required for normal tick
|
||||
* periods. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
|
||||
/* Re-enable interrupts - see comments above the cpsid instruction()
|
||||
/* Re-enable interrupts - see comments above the cpsid instruction
|
||||
* above. */
|
||||
__asm volatile ( "cpsie i" ::: "memory" );
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for
|
||||
* is accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Use the SysTick current-value register to determine the number of
|
||||
* SysTick decrements remaining until the next tick interrupt. If the
|
||||
* current-value register is zero, then there are actually
|
||||
* ulTimerCountsForOneTick decrements remaining, not zero, because the
|
||||
* SysTick requests the interrupt when decrementing from 1 to 0. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code normally executes part
|
||||
* way through the first tick period. But if the SysTick IRQ is now
|
||||
* pending, then clear the IRQ, suppressing the first tick, and correct
|
||||
* the reload value to reflect that the second tick period is already
|
||||
* underway. The expected idle time is always at least two ticks. */
|
||||
ulReloadValue = ulSysTickDecrementsLeft + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ( portNVIC_INT_CTRL_REG & portNVIC_PEND_SYSTICK_SET_BIT ) != 0 )
|
||||
{
|
||||
portNVIC_INT_CTRL_REG = portNVIC_PEND_SYSTICK_CLEAR_BIT;
|
||||
ulReloadValue -= ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Set the new reload value. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
|
||||
|
||||
|
|
@ -446,12 +465,11 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
/* Restart SysTick. */
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
|
||||
* set its parameter to 0 to indicate that its implementation
|
||||
* contains its own wait for interrupt or wait for event
|
||||
* instruction, and so wfi should not be executed again. However,
|
||||
* the original expected idle time variable must remain unmodified,
|
||||
* so a copy is taken. */
|
||||
/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
|
||||
* set its parameter to 0 to indicate that its implementation contains
|
||||
* its own wait for interrupt or wait for event instruction, and so wfi
|
||||
* should not be executed again. However, the original expected idle
|
||||
* time variable must remain unmodified, so a copy is taken. */
|
||||
xModifiableIdleTime = xExpectedIdleTime;
|
||||
configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
|
||||
|
||||
|
|
@ -465,47 +483,43 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
|
||||
|
||||
/* Re-enable interrupts to allow the interrupt that brought the MCU
|
||||
* out of sleep mode to execute immediately. See comments above
|
||||
* out of sleep mode to execute immediately. See comments above
|
||||
* the cpsid instruction above. */
|
||||
__asm volatile ( "cpsie i" ::: "memory" );
|
||||
__asm volatile ( "dsb" );
|
||||
__asm volatile ( "isb" );
|
||||
|
||||
/* Disable interrupts again because the clock is about to be stopped
|
||||
* and interrupts that execute while the clock is stopped will
|
||||
* increase any slippage between the time maintained by the RTOS and
|
||||
* calendar time. */
|
||||
* and interrupts that execute while the clock is stopped will increase
|
||||
* any slippage between the time maintained by the RTOS and calendar
|
||||
* time. */
|
||||
__asm volatile ( "cpsid i" ::: "memory" );
|
||||
__asm volatile ( "dsb" );
|
||||
__asm volatile ( "isb" );
|
||||
|
||||
/* Disable the SysTick clock without reading the
|
||||
* portNVIC_SYSTICK_CTRL_REG register to ensure the
|
||||
* portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.
|
||||
* Again, the time the SysTick is stopped for is accounted for as
|
||||
* best it can be, but using the tickless mode will inevitably
|
||||
* result in some tiny drift of the time maintained by the kernel
|
||||
* with respect to calendar time*/
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
|
||||
* portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set. Again,
|
||||
* the time the SysTick is stopped for is accounted for as best it can
|
||||
* be, but using the tickless mode will inevitably result in some tiny
|
||||
* drift of the time maintained by the kernel with respect to calendar
|
||||
* time*/
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Determine if the SysTick clock has already counted to zero and
|
||||
* been set back to the current reload value (the reload back being
|
||||
* correct for the entire expected idle time) or if the SysTick is
|
||||
* yet to count to zero (in which case an interrupt other than the
|
||||
* SysTick must have brought the system out of sleep mode). */
|
||||
/* Determine whether the SysTick has already counted to zero. */
|
||||
if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
|
||||
{
|
||||
uint32_t ulCalculatedLoadValue;
|
||||
|
||||
/* The tick interrupt is already pending, and the SysTick count
|
||||
* reloaded with ulReloadValue. Reset the
|
||||
* portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
|
||||
* period. */
|
||||
/* The tick interrupt ended the sleep (or is now pending), and
|
||||
* a new tick period has started. Reset portNVIC_SYSTICK_LOAD_REG
|
||||
* with whatever remains of the new tick period. */
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
|
||||
|
||||
/* Don't allow a tiny value, or values that have somehow
|
||||
* underflowed because the post sleep hook did something
|
||||
* that took too long. */
|
||||
* that took too long or because the SysTick current-value register
|
||||
* is zero. */
|
||||
if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
|
||||
{
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
|
||||
|
|
@ -514,17 +528,35 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
|
||||
|
||||
/* As the pending tick will be processed as soon as this
|
||||
* function exits, the tick value maintained by the tick is
|
||||
* stepped forward by one less than the time spent waiting. */
|
||||
* function exits, the tick value maintained by the tick is stepped
|
||||
* forward by one less than the time spent waiting. */
|
||||
ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Something other than the tick interrupt ended the sleep.
|
||||
* Work out how long the sleep lasted rounded to complete tick
|
||||
/* Something other than the tick interrupt ended the sleep. */
|
||||
|
||||
/* Use the SysTick current-value register to determine the
|
||||
* number of SysTick decrements remaining until the expected idle
|
||||
* time would have ended. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* If the SysTick is not using the core clock, the current-
|
||||
* value register might still be zero here. In that case, the
|
||||
* SysTick didn't load from the reload register, and there are
|
||||
* ulReloadValue + 1 decrements remaining, not zero. */
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulReloadValue + 1UL;
|
||||
}
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Work out how long the sleep lasted rounded to complete tick
|
||||
* periods (not the ulReload value which accounted for part
|
||||
* ticks). */
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - ulSysTickDecrementsLeft;
|
||||
|
||||
/* How many complete tick periods passed while the processor
|
||||
* was waiting? */
|
||||
|
|
@ -535,13 +567,26 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
|
||||
}
|
||||
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
|
||||
* again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
|
||||
* value. */
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG again,
|
||||
* then set portNVIC_SYSTICK_LOAD_REG back to its standard value. If
|
||||
* the SysTick is not using the core clock, temporarily configure it to
|
||||
* use the core clock. This configuration forces the SysTick to load
|
||||
* from portNVIC_SYSTICK_LOAD_REG immediately instead of at the next
|
||||
* cycle of the other clock. Then portNVIC_SYSTICK_LOAD_REG is ready
|
||||
* to receive the standard value immediately. */
|
||||
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* The temporary usage of the core clock has served its purpose,
|
||||
* as described above. Resume usage of the other clock. */
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Step the tick to account for any tick periods that elapsed. */
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
|
||||
/* Exit with interrupts enabled. */
|
||||
__asm volatile ( "cpsie i" ::: "memory" );
|
||||
|
|
@ -567,7 +612,7 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FU
|
|||
|
||||
/* Configure SysTick to interrupt at the requested rate. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
|||
|
|
@ -76,20 +76,13 @@
|
|||
#define portNVIC_SHPR3_REG ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
|
||||
#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
|
||||
#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
|
||||
#define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
|
||||
#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
|
||||
#define portNVIC_PEND_SYSTICK_SET_BIT ( 1UL << 26UL )
|
||||
#define portMIN_INTERRUPT_PRIORITY ( 255UL )
|
||||
#define portNVIC_PENDSV_PRI ( portMIN_INTERRUPT_PRIORITY << 16UL )
|
||||
#define portNVIC_SYSTICK_PRI ( portMIN_INTERRUPT_PRIORITY << 24UL )
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
|
||||
#else
|
||||
|
||||
/* The way the SysTick is clocked is not modified in case it is not the
|
||||
* same a the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 0 )
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
|
|
@ -197,7 +190,7 @@
|
|||
* have occurred while the SysTick counter is stopped during tickless idle
|
||||
* calculations.
|
||||
*/
|
||||
#define portMISSED_COUNTS_FACTOR ( 45UL )
|
||||
#define portMISSED_COUNTS_FACTOR ( 94UL )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
|
|
@ -256,6 +249,22 @@
|
|||
#define portINITIAL_CONTROL_UNPRIVILEGED ( 0x3 )
|
||||
#define portINITIAL_CONTROL_PRIVILEGED ( 0x2 )
|
||||
|
||||
/**
|
||||
* @brief Let the user override the default SysTick clock rate. If defined by the
|
||||
* user, this symbol must equal the SysTick clock rate when the CLK bit is 0 in the
|
||||
* configuration register.
|
||||
*/
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ ( configCPU_CLOCK_HZ )
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( portNVIC_SYSTICK_CLK_BIT )
|
||||
#else
|
||||
|
||||
/* Select the option to clock SysTick not at the same frequency as the core.
|
||||
* The clock used is often a divided version of the core clock. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( 0 )
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Let the user override the pre-loading of the initial LR with the
|
||||
* address of prvTaskExitError() in case it messes up unwinding of the stack
|
||||
|
|
@ -384,7 +393,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
#if ( configUSE_TICKLESS_IDLE == 1 )
|
||||
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
||||
{
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
||||
TickType_t xModifiableIdleTime;
|
||||
|
||||
/* Make sure the SysTick reload value does not overflow the counter. */
|
||||
|
|
@ -393,22 +402,6 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
|
||||
}
|
||||
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for is
|
||||
* accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code will execute part way
|
||||
* through one of the tick periods. */
|
||||
ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Enter a critical section but don't use the taskENTER_CRITICAL()
|
||||
* method as that will mask interrupts that should exit sleep mode. */
|
||||
__asm volatile ( "cpsid i" ::: "memory" );
|
||||
|
|
@ -416,26 +409,52 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
__asm volatile ( "isb" );
|
||||
|
||||
/* If a context switch is pending or a task is waiting for the scheduler
|
||||
* to be un-suspended then abandon the low power entry. */
|
||||
* to be unsuspended then abandon the low power entry. */
|
||||
if( eTaskConfirmSleepModeStatus() == eAbortSleep )
|
||||
{
|
||||
/* Restart from whatever is left in the count register to complete
|
||||
* this tick period. */
|
||||
portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
/* Restart SysTick. */
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Reset the reload register to the value required for normal tick
|
||||
* periods. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
|
||||
/* Re-enable interrupts - see comments above the cpsid instruction()
|
||||
/* Re-enable interrupts - see comments above the cpsid instruction
|
||||
* above. */
|
||||
__asm volatile ( "cpsie i" ::: "memory" );
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for
|
||||
* is accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Use the SysTick current-value register to determine the number of
|
||||
* SysTick decrements remaining until the next tick interrupt. If the
|
||||
* current-value register is zero, then there are actually
|
||||
* ulTimerCountsForOneTick decrements remaining, not zero, because the
|
||||
* SysTick requests the interrupt when decrementing from 1 to 0. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code normally executes part
|
||||
* way through the first tick period. But if the SysTick IRQ is now
|
||||
* pending, then clear the IRQ, suppressing the first tick, and correct
|
||||
* the reload value to reflect that the second tick period is already
|
||||
* underway. The expected idle time is always at least two ticks. */
|
||||
ulReloadValue = ulSysTickDecrementsLeft + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ( portNVIC_INT_CTRL_REG & portNVIC_PEND_SYSTICK_SET_BIT ) != 0 )
|
||||
{
|
||||
portNVIC_INT_CTRL_REG = portNVIC_PEND_SYSTICK_CLEAR_BIT;
|
||||
ulReloadValue -= ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Set the new reload value. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
|
||||
|
||||
|
|
@ -446,12 +465,11 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
/* Restart SysTick. */
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
|
||||
* set its parameter to 0 to indicate that its implementation
|
||||
* contains its own wait for interrupt or wait for event
|
||||
* instruction, and so wfi should not be executed again. However,
|
||||
* the original expected idle time variable must remain unmodified,
|
||||
* so a copy is taken. */
|
||||
/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
|
||||
* set its parameter to 0 to indicate that its implementation contains
|
||||
* its own wait for interrupt or wait for event instruction, and so wfi
|
||||
* should not be executed again. However, the original expected idle
|
||||
* time variable must remain unmodified, so a copy is taken. */
|
||||
xModifiableIdleTime = xExpectedIdleTime;
|
||||
configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
|
||||
|
||||
|
|
@ -465,47 +483,43 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
|
||||
|
||||
/* Re-enable interrupts to allow the interrupt that brought the MCU
|
||||
* out of sleep mode to execute immediately. See comments above
|
||||
* out of sleep mode to execute immediately. See comments above
|
||||
* the cpsid instruction above. */
|
||||
__asm volatile ( "cpsie i" ::: "memory" );
|
||||
__asm volatile ( "dsb" );
|
||||
__asm volatile ( "isb" );
|
||||
|
||||
/* Disable interrupts again because the clock is about to be stopped
|
||||
* and interrupts that execute while the clock is stopped will
|
||||
* increase any slippage between the time maintained by the RTOS and
|
||||
* calendar time. */
|
||||
* and interrupts that execute while the clock is stopped will increase
|
||||
* any slippage between the time maintained by the RTOS and calendar
|
||||
* time. */
|
||||
__asm volatile ( "cpsid i" ::: "memory" );
|
||||
__asm volatile ( "dsb" );
|
||||
__asm volatile ( "isb" );
|
||||
|
||||
/* Disable the SysTick clock without reading the
|
||||
* portNVIC_SYSTICK_CTRL_REG register to ensure the
|
||||
* portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.
|
||||
* Again, the time the SysTick is stopped for is accounted for as
|
||||
* best it can be, but using the tickless mode will inevitably
|
||||
* result in some tiny drift of the time maintained by the kernel
|
||||
* with respect to calendar time*/
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
|
||||
* portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set. Again,
|
||||
* the time the SysTick is stopped for is accounted for as best it can
|
||||
* be, but using the tickless mode will inevitably result in some tiny
|
||||
* drift of the time maintained by the kernel with respect to calendar
|
||||
* time*/
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Determine if the SysTick clock has already counted to zero and
|
||||
* been set back to the current reload value (the reload back being
|
||||
* correct for the entire expected idle time) or if the SysTick is
|
||||
* yet to count to zero (in which case an interrupt other than the
|
||||
* SysTick must have brought the system out of sleep mode). */
|
||||
/* Determine whether the SysTick has already counted to zero. */
|
||||
if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
|
||||
{
|
||||
uint32_t ulCalculatedLoadValue;
|
||||
|
||||
/* The tick interrupt is already pending, and the SysTick count
|
||||
* reloaded with ulReloadValue. Reset the
|
||||
* portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
|
||||
* period. */
|
||||
/* The tick interrupt ended the sleep (or is now pending), and
|
||||
* a new tick period has started. Reset portNVIC_SYSTICK_LOAD_REG
|
||||
* with whatever remains of the new tick period. */
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
|
||||
|
||||
/* Don't allow a tiny value, or values that have somehow
|
||||
* underflowed because the post sleep hook did something
|
||||
* that took too long. */
|
||||
* that took too long or because the SysTick current-value register
|
||||
* is zero. */
|
||||
if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
|
||||
{
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
|
||||
|
|
@ -514,17 +528,35 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
|
||||
|
||||
/* As the pending tick will be processed as soon as this
|
||||
* function exits, the tick value maintained by the tick is
|
||||
* stepped forward by one less than the time spent waiting. */
|
||||
* function exits, the tick value maintained by the tick is stepped
|
||||
* forward by one less than the time spent waiting. */
|
||||
ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Something other than the tick interrupt ended the sleep.
|
||||
* Work out how long the sleep lasted rounded to complete tick
|
||||
/* Something other than the tick interrupt ended the sleep. */
|
||||
|
||||
/* Use the SysTick current-value register to determine the
|
||||
* number of SysTick decrements remaining until the expected idle
|
||||
* time would have ended. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* If the SysTick is not using the core clock, the current-
|
||||
* value register might still be zero here. In that case, the
|
||||
* SysTick didn't load from the reload register, and there are
|
||||
* ulReloadValue + 1 decrements remaining, not zero. */
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulReloadValue + 1UL;
|
||||
}
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Work out how long the sleep lasted rounded to complete tick
|
||||
* periods (not the ulReload value which accounted for part
|
||||
* ticks). */
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - ulSysTickDecrementsLeft;
|
||||
|
||||
/* How many complete tick periods passed while the processor
|
||||
* was waiting? */
|
||||
|
|
@ -535,13 +567,26 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
|
||||
}
|
||||
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
|
||||
* again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
|
||||
* value. */
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG again,
|
||||
* then set portNVIC_SYSTICK_LOAD_REG back to its standard value. If
|
||||
* the SysTick is not using the core clock, temporarily configure it to
|
||||
* use the core clock. This configuration forces the SysTick to load
|
||||
* from portNVIC_SYSTICK_LOAD_REG immediately instead of at the next
|
||||
* cycle of the other clock. Then portNVIC_SYSTICK_LOAD_REG is ready
|
||||
* to receive the standard value immediately. */
|
||||
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* The temporary usage of the core clock has served its purpose,
|
||||
* as described above. Resume usage of the other clock. */
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Step the tick to account for any tick periods that elapsed. */
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
|
||||
/* Exit with interrupts enabled. */
|
||||
__asm volatile ( "cpsie i" ::: "memory" );
|
||||
|
|
@ -567,7 +612,7 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FU
|
|||
|
||||
/* Configure SysTick to interrupt at the requested rate. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
|||
|
|
@ -39,27 +39,18 @@
|
|||
#error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See http: /*www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
|
||||
#endif
|
||||
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
|
||||
#else
|
||||
|
||||
/* The way the SysTick is clocked is not modified in case it is not the same
|
||||
* as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 0 )
|
||||
#endif
|
||||
|
||||
/* Constants required to manipulate the core. Registers first... */
|
||||
#define portNVIC_SYSTICK_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000e010 ) )
|
||||
#define portNVIC_SYSTICK_LOAD_REG ( *( ( volatile uint32_t * ) 0xe000e014 ) )
|
||||
#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( *( ( volatile uint32_t * ) 0xe000e018 ) )
|
||||
#define portNVIC_SHPR3_REG ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
|
||||
/* ...then bits in the registers. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
|
||||
#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
|
||||
#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
|
||||
#define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
|
||||
#define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL )
|
||||
#define portNVIC_PEND_SYSTICK_SET_BIT ( 1UL << 26UL )
|
||||
#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
|
||||
|
||||
#define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
|
||||
|
|
@ -87,7 +78,7 @@
|
|||
/* A fiddle factor to estimate the number of SysTick counts that would have
|
||||
* occurred while the SysTick counter is stopped during tickless idle
|
||||
* calculations. */
|
||||
#define portMISSED_COUNTS_FACTOR ( 45UL )
|
||||
#define portMISSED_COUNTS_FACTOR ( 94UL )
|
||||
|
||||
/* For strict compliance with the Cortex-M spec the task start address should
|
||||
* have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
|
||||
|
|
@ -100,6 +91,20 @@
|
|||
#define configKERNEL_INTERRUPT_PRIORITY 255
|
||||
#endif
|
||||
|
||||
/* Let the user override the default SysTick clock rate. If defined by the
|
||||
* user, this symbol must equal the SysTick clock rate when the CLK bit is 0 in the
|
||||
* configuration register. */
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ ( configCPU_CLOCK_HZ )
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( portNVIC_SYSTICK_CLK_BIT )
|
||||
#else
|
||||
|
||||
/* Select the option to clock SysTick not at the same frequency as the core.
|
||||
* The clock used is often a divided version of the core clock. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( 0 )
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Setup the timer to generate the tick interrupts. The implementation in this
|
||||
* file is weak to allow application writers to change the timer used to
|
||||
|
|
@ -356,7 +361,7 @@ void xPortSysTickHandler( void )
|
|||
|
||||
__weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
||||
{
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
||||
TickType_t xModifiableIdleTime;
|
||||
|
||||
/* Make sure the SysTick reload value does not overflow the counter. */
|
||||
|
|
@ -365,22 +370,6 @@ void xPortSysTickHandler( void )
|
|||
xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
|
||||
}
|
||||
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for
|
||||
* is accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code will execute part way
|
||||
* through one of the tick periods. */
|
||||
ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Enter a critical section but don't use the taskENTER_CRITICAL()
|
||||
* method as that will mask interrupts that should exit sleep mode. */
|
||||
__disable_interrupt();
|
||||
|
|
@ -391,23 +380,49 @@ void xPortSysTickHandler( void )
|
|||
* to be unsuspended then abandon the low power entry. */
|
||||
if( eTaskConfirmSleepModeStatus() == eAbortSleep )
|
||||
{
|
||||
/* Restart from whatever is left in the count register to complete
|
||||
* this tick period. */
|
||||
portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
/* Restart SysTick. */
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Reset the reload register to the value required for normal tick
|
||||
* periods. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
|
||||
/* Re-enable interrupts - see comments above __disable_interrupt()
|
||||
/* Re-enable interrupts - see comments above the __disable_interrupt()
|
||||
* call above. */
|
||||
__enable_interrupt();
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for
|
||||
* is accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Use the SysTick current-value register to determine the number of
|
||||
* SysTick decrements remaining until the next tick interrupt. If the
|
||||
* current-value register is zero, then there are actually
|
||||
* ulTimerCountsForOneTick decrements remaining, not zero, because the
|
||||
* SysTick requests the interrupt when decrementing from 1 to 0. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code normally executes part
|
||||
* way through the first tick period. But if the SysTick IRQ is now
|
||||
* pending, then clear the IRQ, suppressing the first tick, and correct
|
||||
* the reload value to reflect that the second tick period is already
|
||||
* underway. The expected idle time is always at least two ticks. */
|
||||
ulReloadValue = ulSysTickDecrementsLeft + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ( portNVIC_INT_CTRL_REG & portNVIC_PEND_SYSTICK_SET_BIT ) != 0 )
|
||||
{
|
||||
portNVIC_INT_CTRL_REG = portNVIC_PEND_SYSTICK_CLEAR_BIT;
|
||||
ulReloadValue -= ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Set the new reload value. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
|
||||
|
||||
|
|
@ -436,8 +451,8 @@ void xPortSysTickHandler( void )
|
|||
configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
|
||||
|
||||
/* Re-enable interrupts to allow the interrupt that brought the MCU
|
||||
* out of sleep mode to execute immediately. see comments above
|
||||
* __disable_interrupt() call above. */
|
||||
* out of sleep mode to execute immediately. See comments above
|
||||
* the __disable_interrupt() call above. */
|
||||
__enable_interrupt();
|
||||
__DSB();
|
||||
__ISB();
|
||||
|
|
@ -457,26 +472,22 @@ void xPortSysTickHandler( void )
|
|||
* be, but using the tickless mode will inevitably result in some tiny
|
||||
* drift of the time maintained by the kernel with respect to calendar
|
||||
* time*/
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Determine if the SysTick clock has already counted to zero and
|
||||
* been set back to the current reload value (the reload back being
|
||||
* correct for the entire expected idle time) or if the SysTick is yet
|
||||
* to count to zero (in which case an interrupt other than the SysTick
|
||||
* must have brought the system out of sleep mode). */
|
||||
/* Determine whether the SysTick has already counted to zero. */
|
||||
if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
|
||||
{
|
||||
uint32_t ulCalculatedLoadValue;
|
||||
|
||||
/* The tick interrupt is already pending, and the SysTick count
|
||||
* reloaded with ulReloadValue. Reset the
|
||||
* portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
|
||||
* period. */
|
||||
/* The tick interrupt ended the sleep (or is now pending), and
|
||||
* a new tick period has started. Reset portNVIC_SYSTICK_LOAD_REG
|
||||
* with whatever remains of the new tick period. */
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
|
||||
|
||||
/* Don't allow a tiny value, or values that have somehow
|
||||
* underflowed because the post sleep hook did something
|
||||
* that took too long. */
|
||||
* that took too long or because the SysTick current-value register
|
||||
* is zero. */
|
||||
if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
|
||||
{
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
|
||||
|
|
@ -491,11 +502,29 @@ void xPortSysTickHandler( void )
|
|||
}
|
||||
else
|
||||
{
|
||||
/* Something other than the tick interrupt ended the sleep.
|
||||
* Work out how long the sleep lasted rounded to complete tick
|
||||
/* Something other than the tick interrupt ended the sleep. */
|
||||
|
||||
/* Use the SysTick current-value register to determine the
|
||||
* number of SysTick decrements remaining until the expected idle
|
||||
* time would have ended. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* If the SysTick is not using the core clock, the current-
|
||||
* value register might still be zero here. In that case, the
|
||||
* SysTick didn't load from the reload register, and there are
|
||||
* ulReloadValue + 1 decrements remaining, not zero. */
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulReloadValue + 1UL;
|
||||
}
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Work out how long the sleep lasted rounded to complete tick
|
||||
* periods (not the ulReload value which accounted for part
|
||||
* ticks). */
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - ulSysTickDecrementsLeft;
|
||||
|
||||
/* How many complete tick periods passed while the processor
|
||||
* was waiting? */
|
||||
|
|
@ -506,13 +535,26 @@ void xPortSysTickHandler( void )
|
|||
portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
|
||||
}
|
||||
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
|
||||
* again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
|
||||
* value. */
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG again,
|
||||
* then set portNVIC_SYSTICK_LOAD_REG back to its standard value. If
|
||||
* the SysTick is not using the core clock, temporarily configure it to
|
||||
* use the core clock. This configuration forces the SysTick to load
|
||||
* from portNVIC_SYSTICK_LOAD_REG immediately instead of at the next
|
||||
* cycle of the other clock. Then portNVIC_SYSTICK_LOAD_REG is ready
|
||||
* to receive the standard value immediately. */
|
||||
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* The temporary usage of the core clock has served its purpose,
|
||||
* as described above. Resume usage of the other clock. */
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Step the tick to account for any tick periods that elapsed. */
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
|
||||
/* Exit with interrupts enabled. */
|
||||
__enable_interrupt();
|
||||
|
|
@ -543,7 +585,7 @@ __weak void vPortSetupTimerInterrupt( void )
|
|||
|
||||
/* Configure SysTick to interrupt at the requested rate. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
|||
|
|
@ -76,20 +76,13 @@
|
|||
#define portNVIC_SHPR3_REG ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
|
||||
#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
|
||||
#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
|
||||
#define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
|
||||
#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
|
||||
#define portNVIC_PEND_SYSTICK_SET_BIT ( 1UL << 26UL )
|
||||
#define portMIN_INTERRUPT_PRIORITY ( 255UL )
|
||||
#define portNVIC_PENDSV_PRI ( portMIN_INTERRUPT_PRIORITY << 16UL )
|
||||
#define portNVIC_SYSTICK_PRI ( portMIN_INTERRUPT_PRIORITY << 24UL )
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
|
||||
#else
|
||||
|
||||
/* The way the SysTick is clocked is not modified in case it is not the
|
||||
* same a the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 0 )
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
|
|
@ -197,7 +190,7 @@
|
|||
* have occurred while the SysTick counter is stopped during tickless idle
|
||||
* calculations.
|
||||
*/
|
||||
#define portMISSED_COUNTS_FACTOR ( 45UL )
|
||||
#define portMISSED_COUNTS_FACTOR ( 94UL )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
|
|
@ -256,6 +249,22 @@
|
|||
#define portINITIAL_CONTROL_UNPRIVILEGED ( 0x3 )
|
||||
#define portINITIAL_CONTROL_PRIVILEGED ( 0x2 )
|
||||
|
||||
/**
|
||||
* @brief Let the user override the default SysTick clock rate. If defined by the
|
||||
* user, this symbol must equal the SysTick clock rate when the CLK bit is 0 in the
|
||||
* configuration register.
|
||||
*/
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ ( configCPU_CLOCK_HZ )
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( portNVIC_SYSTICK_CLK_BIT )
|
||||
#else
|
||||
|
||||
/* Select the option to clock SysTick not at the same frequency as the core.
|
||||
* The clock used is often a divided version of the core clock. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( 0 )
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Let the user override the pre-loading of the initial LR with the
|
||||
* address of prvTaskExitError() in case it messes up unwinding of the stack
|
||||
|
|
@ -384,7 +393,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
#if ( configUSE_TICKLESS_IDLE == 1 )
|
||||
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
||||
{
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
||||
TickType_t xModifiableIdleTime;
|
||||
|
||||
/* Make sure the SysTick reload value does not overflow the counter. */
|
||||
|
|
@ -393,22 +402,6 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
|
||||
}
|
||||
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for is
|
||||
* accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code will execute part way
|
||||
* through one of the tick periods. */
|
||||
ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Enter a critical section but don't use the taskENTER_CRITICAL()
|
||||
* method as that will mask interrupts that should exit sleep mode. */
|
||||
__asm volatile ( "cpsid i" ::: "memory" );
|
||||
|
|
@ -416,26 +409,52 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
__asm volatile ( "isb" );
|
||||
|
||||
/* If a context switch is pending or a task is waiting for the scheduler
|
||||
* to be un-suspended then abandon the low power entry. */
|
||||
* to be unsuspended then abandon the low power entry. */
|
||||
if( eTaskConfirmSleepModeStatus() == eAbortSleep )
|
||||
{
|
||||
/* Restart from whatever is left in the count register to complete
|
||||
* this tick period. */
|
||||
portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
/* Restart SysTick. */
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Reset the reload register to the value required for normal tick
|
||||
* periods. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
|
||||
/* Re-enable interrupts - see comments above the cpsid instruction()
|
||||
/* Re-enable interrupts - see comments above the cpsid instruction
|
||||
* above. */
|
||||
__asm volatile ( "cpsie i" ::: "memory" );
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for
|
||||
* is accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Use the SysTick current-value register to determine the number of
|
||||
* SysTick decrements remaining until the next tick interrupt. If the
|
||||
* current-value register is zero, then there are actually
|
||||
* ulTimerCountsForOneTick decrements remaining, not zero, because the
|
||||
* SysTick requests the interrupt when decrementing from 1 to 0. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code normally executes part
|
||||
* way through the first tick period. But if the SysTick IRQ is now
|
||||
* pending, then clear the IRQ, suppressing the first tick, and correct
|
||||
* the reload value to reflect that the second tick period is already
|
||||
* underway. The expected idle time is always at least two ticks. */
|
||||
ulReloadValue = ulSysTickDecrementsLeft + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ( portNVIC_INT_CTRL_REG & portNVIC_PEND_SYSTICK_SET_BIT ) != 0 )
|
||||
{
|
||||
portNVIC_INT_CTRL_REG = portNVIC_PEND_SYSTICK_CLEAR_BIT;
|
||||
ulReloadValue -= ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Set the new reload value. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
|
||||
|
||||
|
|
@ -446,12 +465,11 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
/* Restart SysTick. */
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
|
||||
* set its parameter to 0 to indicate that its implementation
|
||||
* contains its own wait for interrupt or wait for event
|
||||
* instruction, and so wfi should not be executed again. However,
|
||||
* the original expected idle time variable must remain unmodified,
|
||||
* so a copy is taken. */
|
||||
/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
|
||||
* set its parameter to 0 to indicate that its implementation contains
|
||||
* its own wait for interrupt or wait for event instruction, and so wfi
|
||||
* should not be executed again. However, the original expected idle
|
||||
* time variable must remain unmodified, so a copy is taken. */
|
||||
xModifiableIdleTime = xExpectedIdleTime;
|
||||
configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
|
||||
|
||||
|
|
@ -465,47 +483,43 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
|
||||
|
||||
/* Re-enable interrupts to allow the interrupt that brought the MCU
|
||||
* out of sleep mode to execute immediately. See comments above
|
||||
* out of sleep mode to execute immediately. See comments above
|
||||
* the cpsid instruction above. */
|
||||
__asm volatile ( "cpsie i" ::: "memory" );
|
||||
__asm volatile ( "dsb" );
|
||||
__asm volatile ( "isb" );
|
||||
|
||||
/* Disable interrupts again because the clock is about to be stopped
|
||||
* and interrupts that execute while the clock is stopped will
|
||||
* increase any slippage between the time maintained by the RTOS and
|
||||
* calendar time. */
|
||||
* and interrupts that execute while the clock is stopped will increase
|
||||
* any slippage between the time maintained by the RTOS and calendar
|
||||
* time. */
|
||||
__asm volatile ( "cpsid i" ::: "memory" );
|
||||
__asm volatile ( "dsb" );
|
||||
__asm volatile ( "isb" );
|
||||
|
||||
/* Disable the SysTick clock without reading the
|
||||
* portNVIC_SYSTICK_CTRL_REG register to ensure the
|
||||
* portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.
|
||||
* Again, the time the SysTick is stopped for is accounted for as
|
||||
* best it can be, but using the tickless mode will inevitably
|
||||
* result in some tiny drift of the time maintained by the kernel
|
||||
* with respect to calendar time*/
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
|
||||
* portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set. Again,
|
||||
* the time the SysTick is stopped for is accounted for as best it can
|
||||
* be, but using the tickless mode will inevitably result in some tiny
|
||||
* drift of the time maintained by the kernel with respect to calendar
|
||||
* time*/
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Determine if the SysTick clock has already counted to zero and
|
||||
* been set back to the current reload value (the reload back being
|
||||
* correct for the entire expected idle time) or if the SysTick is
|
||||
* yet to count to zero (in which case an interrupt other than the
|
||||
* SysTick must have brought the system out of sleep mode). */
|
||||
/* Determine whether the SysTick has already counted to zero. */
|
||||
if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
|
||||
{
|
||||
uint32_t ulCalculatedLoadValue;
|
||||
|
||||
/* The tick interrupt is already pending, and the SysTick count
|
||||
* reloaded with ulReloadValue. Reset the
|
||||
* portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
|
||||
* period. */
|
||||
/* The tick interrupt ended the sleep (or is now pending), and
|
||||
* a new tick period has started. Reset portNVIC_SYSTICK_LOAD_REG
|
||||
* with whatever remains of the new tick period. */
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
|
||||
|
||||
/* Don't allow a tiny value, or values that have somehow
|
||||
* underflowed because the post sleep hook did something
|
||||
* that took too long. */
|
||||
* that took too long or because the SysTick current-value register
|
||||
* is zero. */
|
||||
if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
|
||||
{
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
|
||||
|
|
@ -514,17 +528,35 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
|
||||
|
||||
/* As the pending tick will be processed as soon as this
|
||||
* function exits, the tick value maintained by the tick is
|
||||
* stepped forward by one less than the time spent waiting. */
|
||||
* function exits, the tick value maintained by the tick is stepped
|
||||
* forward by one less than the time spent waiting. */
|
||||
ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Something other than the tick interrupt ended the sleep.
|
||||
* Work out how long the sleep lasted rounded to complete tick
|
||||
/* Something other than the tick interrupt ended the sleep. */
|
||||
|
||||
/* Use the SysTick current-value register to determine the
|
||||
* number of SysTick decrements remaining until the expected idle
|
||||
* time would have ended. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* If the SysTick is not using the core clock, the current-
|
||||
* value register might still be zero here. In that case, the
|
||||
* SysTick didn't load from the reload register, and there are
|
||||
* ulReloadValue + 1 decrements remaining, not zero. */
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulReloadValue + 1UL;
|
||||
}
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Work out how long the sleep lasted rounded to complete tick
|
||||
* periods (not the ulReload value which accounted for part
|
||||
* ticks). */
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - ulSysTickDecrementsLeft;
|
||||
|
||||
/* How many complete tick periods passed while the processor
|
||||
* was waiting? */
|
||||
|
|
@ -535,13 +567,26 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
|
||||
}
|
||||
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
|
||||
* again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
|
||||
* value. */
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG again,
|
||||
* then set portNVIC_SYSTICK_LOAD_REG back to its standard value. If
|
||||
* the SysTick is not using the core clock, temporarily configure it to
|
||||
* use the core clock. This configuration forces the SysTick to load
|
||||
* from portNVIC_SYSTICK_LOAD_REG immediately instead of at the next
|
||||
* cycle of the other clock. Then portNVIC_SYSTICK_LOAD_REG is ready
|
||||
* to receive the standard value immediately. */
|
||||
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* The temporary usage of the core clock has served its purpose,
|
||||
* as described above. Resume usage of the other clock. */
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Step the tick to account for any tick periods that elapsed. */
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
|
||||
/* Exit with interrupts enabled. */
|
||||
__asm volatile ( "cpsie i" ::: "memory" );
|
||||
|
|
@ -567,7 +612,7 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FU
|
|||
|
||||
/* Configure SysTick to interrupt at the requested rate. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
|||
|
|
@ -76,20 +76,13 @@
|
|||
#define portNVIC_SHPR3_REG ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
|
||||
#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
|
||||
#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
|
||||
#define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
|
||||
#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
|
||||
#define portNVIC_PEND_SYSTICK_SET_BIT ( 1UL << 26UL )
|
||||
#define portMIN_INTERRUPT_PRIORITY ( 255UL )
|
||||
#define portNVIC_PENDSV_PRI ( portMIN_INTERRUPT_PRIORITY << 16UL )
|
||||
#define portNVIC_SYSTICK_PRI ( portMIN_INTERRUPT_PRIORITY << 24UL )
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
|
||||
#else
|
||||
|
||||
/* The way the SysTick is clocked is not modified in case it is not the
|
||||
* same a the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 0 )
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
|
|
@ -197,7 +190,7 @@
|
|||
* have occurred while the SysTick counter is stopped during tickless idle
|
||||
* calculations.
|
||||
*/
|
||||
#define portMISSED_COUNTS_FACTOR ( 45UL )
|
||||
#define portMISSED_COUNTS_FACTOR ( 94UL )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
|
|
@ -256,6 +249,22 @@
|
|||
#define portINITIAL_CONTROL_UNPRIVILEGED ( 0x3 )
|
||||
#define portINITIAL_CONTROL_PRIVILEGED ( 0x2 )
|
||||
|
||||
/**
|
||||
* @brief Let the user override the default SysTick clock rate. If defined by the
|
||||
* user, this symbol must equal the SysTick clock rate when the CLK bit is 0 in the
|
||||
* configuration register.
|
||||
*/
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ ( configCPU_CLOCK_HZ )
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( portNVIC_SYSTICK_CLK_BIT )
|
||||
#else
|
||||
|
||||
/* Select the option to clock SysTick not at the same frequency as the core.
|
||||
* The clock used is often a divided version of the core clock. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( 0 )
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Let the user override the pre-loading of the initial LR with the
|
||||
* address of prvTaskExitError() in case it messes up unwinding of the stack
|
||||
|
|
@ -384,7 +393,7 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
#if ( configUSE_TICKLESS_IDLE == 1 )
|
||||
__attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
||||
{
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
||||
TickType_t xModifiableIdleTime;
|
||||
|
||||
/* Make sure the SysTick reload value does not overflow the counter. */
|
||||
|
|
@ -393,22 +402,6 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
|
||||
}
|
||||
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for is
|
||||
* accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code will execute part way
|
||||
* through one of the tick periods. */
|
||||
ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Enter a critical section but don't use the taskENTER_CRITICAL()
|
||||
* method as that will mask interrupts that should exit sleep mode. */
|
||||
__asm volatile ( "cpsid i" ::: "memory" );
|
||||
|
|
@ -416,26 +409,52 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
__asm volatile ( "isb" );
|
||||
|
||||
/* If a context switch is pending or a task is waiting for the scheduler
|
||||
* to be un-suspended then abandon the low power entry. */
|
||||
* to be unsuspended then abandon the low power entry. */
|
||||
if( eTaskConfirmSleepModeStatus() == eAbortSleep )
|
||||
{
|
||||
/* Restart from whatever is left in the count register to complete
|
||||
* this tick period. */
|
||||
portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
/* Restart SysTick. */
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Reset the reload register to the value required for normal tick
|
||||
* periods. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
|
||||
/* Re-enable interrupts - see comments above the cpsid instruction()
|
||||
/* Re-enable interrupts - see comments above the cpsid instruction
|
||||
* above. */
|
||||
__asm volatile ( "cpsie i" ::: "memory" );
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for
|
||||
* is accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Use the SysTick current-value register to determine the number of
|
||||
* SysTick decrements remaining until the next tick interrupt. If the
|
||||
* current-value register is zero, then there are actually
|
||||
* ulTimerCountsForOneTick decrements remaining, not zero, because the
|
||||
* SysTick requests the interrupt when decrementing from 1 to 0. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code normally executes part
|
||||
* way through the first tick period. But if the SysTick IRQ is now
|
||||
* pending, then clear the IRQ, suppressing the first tick, and correct
|
||||
* the reload value to reflect that the second tick period is already
|
||||
* underway. The expected idle time is always at least two ticks. */
|
||||
ulReloadValue = ulSysTickDecrementsLeft + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ( portNVIC_INT_CTRL_REG & portNVIC_PEND_SYSTICK_SET_BIT ) != 0 )
|
||||
{
|
||||
portNVIC_INT_CTRL_REG = portNVIC_PEND_SYSTICK_CLEAR_BIT;
|
||||
ulReloadValue -= ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Set the new reload value. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
|
||||
|
||||
|
|
@ -446,12 +465,11 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
/* Restart SysTick. */
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
|
||||
* set its parameter to 0 to indicate that its implementation
|
||||
* contains its own wait for interrupt or wait for event
|
||||
* instruction, and so wfi should not be executed again. However,
|
||||
* the original expected idle time variable must remain unmodified,
|
||||
* so a copy is taken. */
|
||||
/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
|
||||
* set its parameter to 0 to indicate that its implementation contains
|
||||
* its own wait for interrupt or wait for event instruction, and so wfi
|
||||
* should not be executed again. However, the original expected idle
|
||||
* time variable must remain unmodified, so a copy is taken. */
|
||||
xModifiableIdleTime = xExpectedIdleTime;
|
||||
configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
|
||||
|
||||
|
|
@ -465,47 +483,43 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
|
||||
|
||||
/* Re-enable interrupts to allow the interrupt that brought the MCU
|
||||
* out of sleep mode to execute immediately. See comments above
|
||||
* out of sleep mode to execute immediately. See comments above
|
||||
* the cpsid instruction above. */
|
||||
__asm volatile ( "cpsie i" ::: "memory" );
|
||||
__asm volatile ( "dsb" );
|
||||
__asm volatile ( "isb" );
|
||||
|
||||
/* Disable interrupts again because the clock is about to be stopped
|
||||
* and interrupts that execute while the clock is stopped will
|
||||
* increase any slippage between the time maintained by the RTOS and
|
||||
* calendar time. */
|
||||
* and interrupts that execute while the clock is stopped will increase
|
||||
* any slippage between the time maintained by the RTOS and calendar
|
||||
* time. */
|
||||
__asm volatile ( "cpsid i" ::: "memory" );
|
||||
__asm volatile ( "dsb" );
|
||||
__asm volatile ( "isb" );
|
||||
|
||||
/* Disable the SysTick clock without reading the
|
||||
* portNVIC_SYSTICK_CTRL_REG register to ensure the
|
||||
* portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.
|
||||
* Again, the time the SysTick is stopped for is accounted for as
|
||||
* best it can be, but using the tickless mode will inevitably
|
||||
* result in some tiny drift of the time maintained by the kernel
|
||||
* with respect to calendar time*/
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
|
||||
* portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set. Again,
|
||||
* the time the SysTick is stopped for is accounted for as best it can
|
||||
* be, but using the tickless mode will inevitably result in some tiny
|
||||
* drift of the time maintained by the kernel with respect to calendar
|
||||
* time*/
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Determine if the SysTick clock has already counted to zero and
|
||||
* been set back to the current reload value (the reload back being
|
||||
* correct for the entire expected idle time) or if the SysTick is
|
||||
* yet to count to zero (in which case an interrupt other than the
|
||||
* SysTick must have brought the system out of sleep mode). */
|
||||
/* Determine whether the SysTick has already counted to zero. */
|
||||
if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
|
||||
{
|
||||
uint32_t ulCalculatedLoadValue;
|
||||
|
||||
/* The tick interrupt is already pending, and the SysTick count
|
||||
* reloaded with ulReloadValue. Reset the
|
||||
* portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
|
||||
* period. */
|
||||
/* The tick interrupt ended the sleep (or is now pending), and
|
||||
* a new tick period has started. Reset portNVIC_SYSTICK_LOAD_REG
|
||||
* with whatever remains of the new tick period. */
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
|
||||
|
||||
/* Don't allow a tiny value, or values that have somehow
|
||||
* underflowed because the post sleep hook did something
|
||||
* that took too long. */
|
||||
* that took too long or because the SysTick current-value register
|
||||
* is zero. */
|
||||
if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
|
||||
{
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
|
||||
|
|
@ -514,17 +528,35 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
|
||||
|
||||
/* As the pending tick will be processed as soon as this
|
||||
* function exits, the tick value maintained by the tick is
|
||||
* stepped forward by one less than the time spent waiting. */
|
||||
* function exits, the tick value maintained by the tick is stepped
|
||||
* forward by one less than the time spent waiting. */
|
||||
ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Something other than the tick interrupt ended the sleep.
|
||||
* Work out how long the sleep lasted rounded to complete tick
|
||||
/* Something other than the tick interrupt ended the sleep. */
|
||||
|
||||
/* Use the SysTick current-value register to determine the
|
||||
* number of SysTick decrements remaining until the expected idle
|
||||
* time would have ended. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* If the SysTick is not using the core clock, the current-
|
||||
* value register might still be zero here. In that case, the
|
||||
* SysTick didn't load from the reload register, and there are
|
||||
* ulReloadValue + 1 decrements remaining, not zero. */
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulReloadValue + 1UL;
|
||||
}
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Work out how long the sleep lasted rounded to complete tick
|
||||
* periods (not the ulReload value which accounted for part
|
||||
* ticks). */
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - ulSysTickDecrementsLeft;
|
||||
|
||||
/* How many complete tick periods passed while the processor
|
||||
* was waiting? */
|
||||
|
|
@ -535,13 +567,26 @@ PRIVILEGED_DATA static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
|
|||
portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
|
||||
}
|
||||
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
|
||||
* again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
|
||||
* value. */
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG again,
|
||||
* then set portNVIC_SYSTICK_LOAD_REG back to its standard value. If
|
||||
* the SysTick is not using the core clock, temporarily configure it to
|
||||
* use the core clock. This configuration forces the SysTick to load
|
||||
* from portNVIC_SYSTICK_LOAD_REG immediately instead of at the next
|
||||
* cycle of the other clock. Then portNVIC_SYSTICK_LOAD_REG is ready
|
||||
* to receive the standard value immediately. */
|
||||
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* The temporary usage of the core clock has served its purpose,
|
||||
* as described above. Resume usage of the other clock. */
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Step the tick to account for any tick periods that elapsed. */
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
|
||||
/* Exit with interrupts enabled. */
|
||||
__asm volatile ( "cpsie i" ::: "memory" );
|
||||
|
|
@ -567,7 +612,7 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FU
|
|||
|
||||
/* Configure SysTick to interrupt at the requested rate. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
|||
|
|
@ -43,27 +43,18 @@
|
|||
#error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See http: /*www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
|
||||
#endif
|
||||
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
|
||||
#else
|
||||
|
||||
/* The way the SysTick is clocked is not modified in case it is not the same
|
||||
* as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 0 )
|
||||
#endif
|
||||
|
||||
/* Constants required to manipulate the core. Registers first... */
|
||||
#define portNVIC_SYSTICK_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000e010 ) )
|
||||
#define portNVIC_SYSTICK_LOAD_REG ( *( ( volatile uint32_t * ) 0xe000e014 ) )
|
||||
#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( *( ( volatile uint32_t * ) 0xe000e018 ) )
|
||||
#define portNVIC_SHPR3_REG ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
|
||||
/* ...then bits in the registers. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
|
||||
#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
|
||||
#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
|
||||
#define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
|
||||
#define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL )
|
||||
#define portNVIC_PEND_SYSTICK_SET_BIT ( 1UL << 26UL )
|
||||
#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
|
||||
|
||||
/* Constants used to detect a Cortex-M7 r0p1 core, which should use the ARM_CM7
|
||||
|
|
@ -102,12 +93,26 @@
|
|||
/* A fiddle factor to estimate the number of SysTick counts that would have
|
||||
* occurred while the SysTick counter is stopped during tickless idle
|
||||
* calculations. */
|
||||
#define portMISSED_COUNTS_FACTOR ( 45UL )
|
||||
#define portMISSED_COUNTS_FACTOR ( 94UL )
|
||||
|
||||
/* For strict compliance with the Cortex-M spec the task start address should
|
||||
* have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
|
||||
#define portSTART_ADDRESS_MASK ( ( StackType_t ) 0xfffffffeUL )
|
||||
|
||||
/* Let the user override the default SysTick clock rate. If defined by the
|
||||
* user, this symbol must equal the SysTick clock rate when the CLK bit is 0 in the
|
||||
* configuration register. */
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ ( configCPU_CLOCK_HZ )
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( portNVIC_SYSTICK_CLK_BIT )
|
||||
#else
|
||||
|
||||
/* Select the option to clock SysTick not at the same frequency as the core.
|
||||
* The clock used is often a divided version of the core clock. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( 0 )
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Setup the timer to generate the tick interrupts. The implementation in this
|
||||
* file is weak to allow application writers to change the timer used to
|
||||
|
|
@ -393,7 +398,7 @@ void xPortSysTickHandler( void )
|
|||
|
||||
__weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
||||
{
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
||||
TickType_t xModifiableIdleTime;
|
||||
|
||||
/* Make sure the SysTick reload value does not overflow the counter. */
|
||||
|
|
@ -402,22 +407,6 @@ void xPortSysTickHandler( void )
|
|||
xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
|
||||
}
|
||||
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for
|
||||
* is accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code will execute part way
|
||||
* through one of the tick periods. */
|
||||
ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Enter a critical section but don't use the taskENTER_CRITICAL()
|
||||
* method as that will mask interrupts that should exit sleep mode. */
|
||||
__disable_interrupt();
|
||||
|
|
@ -428,23 +417,49 @@ void xPortSysTickHandler( void )
|
|||
* to be unsuspended then abandon the low power entry. */
|
||||
if( eTaskConfirmSleepModeStatus() == eAbortSleep )
|
||||
{
|
||||
/* Restart from whatever is left in the count register to complete
|
||||
* this tick period. */
|
||||
portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
/* Restart SysTick. */
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Reset the reload register to the value required for normal tick
|
||||
* periods. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
|
||||
/* Re-enable interrupts - see comments above __disable_interrupt()
|
||||
/* Re-enable interrupts - see comments above the __disable_interrupt()
|
||||
* call above. */
|
||||
__enable_interrupt();
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for
|
||||
* is accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Use the SysTick current-value register to determine the number of
|
||||
* SysTick decrements remaining until the next tick interrupt. If the
|
||||
* current-value register is zero, then there are actually
|
||||
* ulTimerCountsForOneTick decrements remaining, not zero, because the
|
||||
* SysTick requests the interrupt when decrementing from 1 to 0. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code normally executes part
|
||||
* way through the first tick period. But if the SysTick IRQ is now
|
||||
* pending, then clear the IRQ, suppressing the first tick, and correct
|
||||
* the reload value to reflect that the second tick period is already
|
||||
* underway. The expected idle time is always at least two ticks. */
|
||||
ulReloadValue = ulSysTickDecrementsLeft + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ( portNVIC_INT_CTRL_REG & portNVIC_PEND_SYSTICK_SET_BIT ) != 0 )
|
||||
{
|
||||
portNVIC_INT_CTRL_REG = portNVIC_PEND_SYSTICK_CLEAR_BIT;
|
||||
ulReloadValue -= ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Set the new reload value. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
|
||||
|
||||
|
|
@ -473,8 +488,8 @@ void xPortSysTickHandler( void )
|
|||
configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
|
||||
|
||||
/* Re-enable interrupts to allow the interrupt that brought the MCU
|
||||
* out of sleep mode to execute immediately. see comments above
|
||||
* __disable_interrupt() call above. */
|
||||
* out of sleep mode to execute immediately. See comments above
|
||||
* the __disable_interrupt() call above. */
|
||||
__enable_interrupt();
|
||||
__DSB();
|
||||
__ISB();
|
||||
|
|
@ -494,26 +509,22 @@ void xPortSysTickHandler( void )
|
|||
* be, but using the tickless mode will inevitably result in some tiny
|
||||
* drift of the time maintained by the kernel with respect to calendar
|
||||
* time*/
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Determine if the SysTick clock has already counted to zero and
|
||||
* been set back to the current reload value (the reload back being
|
||||
* correct for the entire expected idle time) or if the SysTick is yet
|
||||
* to count to zero (in which case an interrupt other than the SysTick
|
||||
* must have brought the system out of sleep mode). */
|
||||
/* Determine whether the SysTick has already counted to zero. */
|
||||
if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
|
||||
{
|
||||
uint32_t ulCalculatedLoadValue;
|
||||
|
||||
/* The tick interrupt is already pending, and the SysTick count
|
||||
* reloaded with ulReloadValue. Reset the
|
||||
* portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
|
||||
* period. */
|
||||
/* The tick interrupt ended the sleep (or is now pending), and
|
||||
* a new tick period has started. Reset portNVIC_SYSTICK_LOAD_REG
|
||||
* with whatever remains of the new tick period. */
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
|
||||
|
||||
/* Don't allow a tiny value, or values that have somehow
|
||||
* underflowed because the post sleep hook did something
|
||||
* that took too long. */
|
||||
* that took too long or because the SysTick current-value register
|
||||
* is zero. */
|
||||
if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
|
||||
{
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
|
||||
|
|
@ -528,11 +539,29 @@ void xPortSysTickHandler( void )
|
|||
}
|
||||
else
|
||||
{
|
||||
/* Something other than the tick interrupt ended the sleep.
|
||||
* Work out how long the sleep lasted rounded to complete tick
|
||||
/* Something other than the tick interrupt ended the sleep. */
|
||||
|
||||
/* Use the SysTick current-value register to determine the
|
||||
* number of SysTick decrements remaining until the expected idle
|
||||
* time would have ended. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* If the SysTick is not using the core clock, the current-
|
||||
* value register might still be zero here. In that case, the
|
||||
* SysTick didn't load from the reload register, and there are
|
||||
* ulReloadValue + 1 decrements remaining, not zero. */
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulReloadValue + 1UL;
|
||||
}
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Work out how long the sleep lasted rounded to complete tick
|
||||
* periods (not the ulReload value which accounted for part
|
||||
* ticks). */
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - ulSysTickDecrementsLeft;
|
||||
|
||||
/* How many complete tick periods passed while the processor
|
||||
* was waiting? */
|
||||
|
|
@ -543,13 +572,26 @@ void xPortSysTickHandler( void )
|
|||
portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
|
||||
}
|
||||
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
|
||||
* again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
|
||||
* value. */
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG again,
|
||||
* then set portNVIC_SYSTICK_LOAD_REG back to its standard value. If
|
||||
* the SysTick is not using the core clock, temporarily configure it to
|
||||
* use the core clock. This configuration forces the SysTick to load
|
||||
* from portNVIC_SYSTICK_LOAD_REG immediately instead of at the next
|
||||
* cycle of the other clock. Then portNVIC_SYSTICK_LOAD_REG is ready
|
||||
* to receive the standard value immediately. */
|
||||
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* The temporary usage of the core clock has served its purpose,
|
||||
* as described above. Resume usage of the other clock. */
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Step the tick to account for any tick periods that elapsed. */
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
|
||||
/* Exit with interrupts enabled. */
|
||||
__enable_interrupt();
|
||||
|
|
@ -580,7 +622,7 @@ __weak void vPortSetupTimerInterrupt( void )
|
|||
|
||||
/* Configure SysTick to interrupt at the requested rate. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
|||
|
|
@ -43,27 +43,18 @@
|
|||
#error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See http: /*www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
|
||||
#endif
|
||||
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
|
||||
#else
|
||||
|
||||
/* The way the SysTick is clocked is not modified in case it is not the same
|
||||
* as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 0 )
|
||||
#endif
|
||||
|
||||
/* Constants required to manipulate the core. Registers first... */
|
||||
#define portNVIC_SYSTICK_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000e010 ) )
|
||||
#define portNVIC_SYSTICK_LOAD_REG ( *( ( volatile uint32_t * ) 0xe000e014 ) )
|
||||
#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( *( ( volatile uint32_t * ) 0xe000e018 ) )
|
||||
#define portNVIC_SHPR3_REG ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
|
||||
/* ...then bits in the registers. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
|
||||
#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
|
||||
#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
|
||||
#define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
|
||||
#define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL )
|
||||
#define portNVIC_PEND_SYSTICK_SET_BIT ( 1UL << 26UL )
|
||||
#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
|
||||
|
||||
#define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
|
||||
|
|
@ -96,12 +87,26 @@
|
|||
/* A fiddle factor to estimate the number of SysTick counts that would have
|
||||
* occurred while the SysTick counter is stopped during tickless idle
|
||||
* calculations. */
|
||||
#define portMISSED_COUNTS_FACTOR ( 45UL )
|
||||
#define portMISSED_COUNTS_FACTOR ( 94UL )
|
||||
|
||||
/* For strict compliance with the Cortex-M spec the task start address should
|
||||
* have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
|
||||
#define portSTART_ADDRESS_MASK ( ( StackType_t ) 0xfffffffeUL )
|
||||
|
||||
/* Let the user override the default SysTick clock rate. If defined by the
|
||||
* user, this symbol must equal the SysTick clock rate when the CLK bit is 0 in the
|
||||
* configuration register. */
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ ( configCPU_CLOCK_HZ )
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( portNVIC_SYSTICK_CLK_BIT )
|
||||
#else
|
||||
|
||||
/* Select the option to clock SysTick not at the same frequency as the core.
|
||||
* The clock used is often a divided version of the core clock. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( 0 )
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Setup the timer to generate the tick interrupts. The implementation in this
|
||||
* file is weak to allow application writers to change the timer used to
|
||||
|
|
@ -381,7 +386,7 @@ void xPortSysTickHandler( void )
|
|||
|
||||
__weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
||||
{
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
||||
TickType_t xModifiableIdleTime;
|
||||
|
||||
/* Make sure the SysTick reload value does not overflow the counter. */
|
||||
|
|
@ -390,22 +395,6 @@ void xPortSysTickHandler( void )
|
|||
xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
|
||||
}
|
||||
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for
|
||||
* is accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code will execute part way
|
||||
* through one of the tick periods. */
|
||||
ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Enter a critical section but don't use the taskENTER_CRITICAL()
|
||||
* method as that will mask interrupts that should exit sleep mode. */
|
||||
__disable_interrupt();
|
||||
|
|
@ -416,23 +405,49 @@ void xPortSysTickHandler( void )
|
|||
* to be unsuspended then abandon the low power entry. */
|
||||
if( eTaskConfirmSleepModeStatus() == eAbortSleep )
|
||||
{
|
||||
/* Restart from whatever is left in the count register to complete
|
||||
* this tick period. */
|
||||
portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
/* Restart SysTick. */
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Reset the reload register to the value required for normal tick
|
||||
* periods. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
|
||||
/* Re-enable interrupts - see comments above __disable_interrupt()
|
||||
/* Re-enable interrupts - see comments above the __disable_interrupt()
|
||||
* call above. */
|
||||
__enable_interrupt();
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for
|
||||
* is accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Use the SysTick current-value register to determine the number of
|
||||
* SysTick decrements remaining until the next tick interrupt. If the
|
||||
* current-value register is zero, then there are actually
|
||||
* ulTimerCountsForOneTick decrements remaining, not zero, because the
|
||||
* SysTick requests the interrupt when decrementing from 1 to 0. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code normally executes part
|
||||
* way through the first tick period. But if the SysTick IRQ is now
|
||||
* pending, then clear the IRQ, suppressing the first tick, and correct
|
||||
* the reload value to reflect that the second tick period is already
|
||||
* underway. The expected idle time is always at least two ticks. */
|
||||
ulReloadValue = ulSysTickDecrementsLeft + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ( portNVIC_INT_CTRL_REG & portNVIC_PEND_SYSTICK_SET_BIT ) != 0 )
|
||||
{
|
||||
portNVIC_INT_CTRL_REG = portNVIC_PEND_SYSTICK_CLEAR_BIT;
|
||||
ulReloadValue -= ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Set the new reload value. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
|
||||
|
||||
|
|
@ -461,8 +476,8 @@ void xPortSysTickHandler( void )
|
|||
configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
|
||||
|
||||
/* Re-enable interrupts to allow the interrupt that brought the MCU
|
||||
* out of sleep mode to execute immediately. see comments above
|
||||
* __disable_interrupt() call above. */
|
||||
* out of sleep mode to execute immediately. See comments above
|
||||
* the __disable_interrupt() call above. */
|
||||
__enable_interrupt();
|
||||
__DSB();
|
||||
__ISB();
|
||||
|
|
@ -482,26 +497,22 @@ void xPortSysTickHandler( void )
|
|||
* be, but using the tickless mode will inevitably result in some tiny
|
||||
* drift of the time maintained by the kernel with respect to calendar
|
||||
* time*/
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Determine if the SysTick clock has already counted to zero and
|
||||
* been set back to the current reload value (the reload back being
|
||||
* correct for the entire expected idle time) or if the SysTick is yet
|
||||
* to count to zero (in which case an interrupt other than the SysTick
|
||||
* must have brought the system out of sleep mode). */
|
||||
/* Determine whether the SysTick has already counted to zero. */
|
||||
if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
|
||||
{
|
||||
uint32_t ulCalculatedLoadValue;
|
||||
|
||||
/* The tick interrupt is already pending, and the SysTick count
|
||||
* reloaded with ulReloadValue. Reset the
|
||||
* portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
|
||||
* period. */
|
||||
/* The tick interrupt ended the sleep (or is now pending), and
|
||||
* a new tick period has started. Reset portNVIC_SYSTICK_LOAD_REG
|
||||
* with whatever remains of the new tick period. */
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
|
||||
|
||||
/* Don't allow a tiny value, or values that have somehow
|
||||
* underflowed because the post sleep hook did something
|
||||
* that took too long. */
|
||||
* that took too long or because the SysTick current-value register
|
||||
* is zero. */
|
||||
if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
|
||||
{
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
|
||||
|
|
@ -516,11 +527,29 @@ void xPortSysTickHandler( void )
|
|||
}
|
||||
else
|
||||
{
|
||||
/* Something other than the tick interrupt ended the sleep.
|
||||
* Work out how long the sleep lasted rounded to complete tick
|
||||
/* Something other than the tick interrupt ended the sleep. */
|
||||
|
||||
/* Use the SysTick current-value register to determine the
|
||||
* number of SysTick decrements remaining until the expected idle
|
||||
* time would have ended. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* If the SysTick is not using the core clock, the current-
|
||||
* value register might still be zero here. In that case, the
|
||||
* SysTick didn't load from the reload register, and there are
|
||||
* ulReloadValue + 1 decrements remaining, not zero. */
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulReloadValue + 1UL;
|
||||
}
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Work out how long the sleep lasted rounded to complete tick
|
||||
* periods (not the ulReload value which accounted for part
|
||||
* ticks). */
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - ulSysTickDecrementsLeft;
|
||||
|
||||
/* How many complete tick periods passed while the processor
|
||||
* was waiting? */
|
||||
|
|
@ -531,13 +560,26 @@ void xPortSysTickHandler( void )
|
|||
portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
|
||||
}
|
||||
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
|
||||
* again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
|
||||
* value. */
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG again,
|
||||
* then set portNVIC_SYSTICK_LOAD_REG back to its standard value. If
|
||||
* the SysTick is not using the core clock, temporarily configure it to
|
||||
* use the core clock. This configuration forces the SysTick to load
|
||||
* from portNVIC_SYSTICK_LOAD_REG immediately instead of at the next
|
||||
* cycle of the other clock. Then portNVIC_SYSTICK_LOAD_REG is ready
|
||||
* to receive the standard value immediately. */
|
||||
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* The temporary usage of the core clock has served its purpose,
|
||||
* as described above. Resume usage of the other clock. */
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Step the tick to account for any tick periods that elapsed. */
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
|
||||
/* Exit with interrupts enabled. */
|
||||
__enable_interrupt();
|
||||
|
|
@ -568,7 +610,7 @@ __weak void vPortSetupTimerInterrupt( void )
|
|||
|
||||
/* Configure SysTick to interrupt at the requested rate. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
|||
|
|
@ -32,28 +32,18 @@
|
|||
#include "FreeRTOS.h"
|
||||
#include "task.h"
|
||||
|
||||
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
|
||||
#else
|
||||
|
||||
/* The way the SysTick is clocked is not modified in case it is not the same
|
||||
* as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 0 )
|
||||
#endif
|
||||
|
||||
/* Constants required to manipulate the core. Registers first... */
|
||||
#define portNVIC_SYSTICK_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000e010 ) )
|
||||
#define portNVIC_SYSTICK_LOAD_REG ( *( ( volatile uint32_t * ) 0xe000e014 ) )
|
||||
#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( *( ( volatile uint32_t * ) 0xe000e018 ) )
|
||||
#define portNVIC_SHPR3_REG ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
|
||||
/* ...then bits in the registers. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
|
||||
#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
|
||||
#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
|
||||
#define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
|
||||
#define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL )
|
||||
#define portNVIC_PEND_SYSTICK_SET_BIT ( 1UL << 26UL )
|
||||
#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
|
||||
|
||||
#define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
|
||||
|
|
@ -86,7 +76,21 @@
|
|||
/* A fiddle factor to estimate the number of SysTick counts that would have
|
||||
* occurred while the SysTick counter is stopped during tickless idle
|
||||
* calculations. */
|
||||
#define portMISSED_COUNTS_FACTOR ( 45UL )
|
||||
#define portMISSED_COUNTS_FACTOR ( 94UL )
|
||||
|
||||
/* Let the user override the default SysTick clock rate. If defined by the
|
||||
* user, this symbol must equal the SysTick clock rate when the CLK bit is 0 in the
|
||||
* configuration register. */
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ ( configCPU_CLOCK_HZ )
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( portNVIC_SYSTICK_CLK_BIT )
|
||||
#else
|
||||
|
||||
/* Select the option to clock SysTick not at the same frequency as the core.
|
||||
* The clock used is often a divided version of the core clock. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( 0 )
|
||||
#endif
|
||||
|
||||
/* Let the user override the pre-loading of the initial LR with the address of
|
||||
* prvTaskExitError() in case it messes up unwinding of the stack in the
|
||||
|
|
@ -508,7 +512,7 @@ void xPortSysTickHandler( void ) iv IVT_INT_SysTick ics ICS_AUTO
|
|||
|
||||
void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
||||
{
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
||||
TickType_t xModifiableIdleTime;
|
||||
|
||||
/* Make sure the SysTick reload value does not overflow the counter. */
|
||||
|
|
@ -517,22 +521,6 @@ void xPortSysTickHandler( void ) iv IVT_INT_SysTick ics ICS_AUTO
|
|||
xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
|
||||
}
|
||||
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for
|
||||
* is accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code will execute part way
|
||||
* through one of the tick periods. */
|
||||
ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Enter a critical section but don't use the taskENTER_CRITICAL()
|
||||
* method as that will mask interrupts that should exit sleep mode. */
|
||||
__asm {
|
||||
|
|
@ -549,18 +537,7 @@ void xPortSysTickHandler( void ) iv IVT_INT_SysTick ics ICS_AUTO
|
|||
* to be unsuspended then abandon the low power entry. */
|
||||
if( eTaskConfirmSleepModeStatus() == eAbortSleep )
|
||||
{
|
||||
/* Restart from whatever is left in the count register to complete
|
||||
* this tick period. */
|
||||
portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
/* Restart SysTick. */
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Reset the reload register to the value required for normal tick
|
||||
* periods. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
|
||||
/* Re-enable interrupts - see comments above the cpsid instruction()
|
||||
/* Re-enable interrupts - see comments above the cpsid instruction
|
||||
* above. */
|
||||
__asm {
|
||||
"cpsie i"
|
||||
|
|
@ -568,6 +545,43 @@ void xPortSysTickHandler( void ) iv IVT_INT_SysTick ics ICS_AUTO
|
|||
}
|
||||
else
|
||||
{
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for
|
||||
* is accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Use the SysTick current-value register to determine the number of
|
||||
* SysTick decrements remaining until the next tick interrupt. If the
|
||||
* current-value register is zero, then there are actually
|
||||
* ulTimerCountsForOneTick decrements remaining, not zero, because the
|
||||
* SysTick requests the interrupt when decrementing from 1 to 0. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code normally executes part
|
||||
* way through the first tick period. But if the SysTick IRQ is now
|
||||
* pending, then clear the IRQ, suppressing the first tick, and correct
|
||||
* the reload value to reflect that the second tick period is already
|
||||
* underway. The expected idle time is always at least two ticks. */
|
||||
ulReloadValue = ulSysTickDecrementsLeft + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ( portNVIC_INT_CTRL_REG & portNVIC_PEND_SYSTICK_SET_BIT ) != 0 )
|
||||
{
|
||||
portNVIC_INT_CTRL_REG = portNVIC_PEND_SYSTICK_CLEAR_BIT;
|
||||
ulReloadValue -= ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Set the new reload value. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
|
||||
|
||||
|
|
@ -602,8 +616,8 @@ void xPortSysTickHandler( void ) iv IVT_INT_SysTick ics ICS_AUTO
|
|||
configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
|
||||
|
||||
/* Re-enable interrupts to allow the interrupt that brought the MCU
|
||||
* out of sleep mode to execute immediately. see comments above
|
||||
* __disable_interrupt() call above. */
|
||||
* out of sleep mode to execute immediately. See comments above
|
||||
* the cpsid instruction above. */
|
||||
__asm {
|
||||
"cpsie i"
|
||||
};
|
||||
|
|
@ -635,26 +649,22 @@ void xPortSysTickHandler( void ) iv IVT_INT_SysTick ics ICS_AUTO
|
|||
* be, but using the tickless mode will inevitably result in some tiny
|
||||
* drift of the time maintained by the kernel with respect to calendar
|
||||
* time*/
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Determine if the SysTick clock has already counted to zero and
|
||||
* been set back to the current reload value (the reload back being
|
||||
* correct for the entire expected idle time) or if the SysTick is yet
|
||||
* to count to zero (in which case an interrupt other than the SysTick
|
||||
* must have brought the system out of sleep mode). */
|
||||
/* Determine whether the SysTick has already counted to zero. */
|
||||
if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
|
||||
{
|
||||
uint32_t ulCalculatedLoadValue;
|
||||
|
||||
/* The tick interrupt is already pending, and the SysTick count
|
||||
* reloaded with ulReloadValue. Reset the
|
||||
* portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
|
||||
* period. */
|
||||
/* The tick interrupt ended the sleep (or is now pending), and
|
||||
* a new tick period has started. Reset portNVIC_SYSTICK_LOAD_REG
|
||||
* with whatever remains of the new tick period. */
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
|
||||
|
||||
/* Don't allow a tiny value, or values that have somehow
|
||||
* underflowed because the post sleep hook did something
|
||||
* that took too long. */
|
||||
* that took too long or because the SysTick current-value register
|
||||
* is zero. */
|
||||
if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
|
||||
{
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
|
||||
|
|
@ -669,11 +679,29 @@ void xPortSysTickHandler( void ) iv IVT_INT_SysTick ics ICS_AUTO
|
|||
}
|
||||
else
|
||||
{
|
||||
/* Something other than the tick interrupt ended the sleep.
|
||||
* Work out how long the sleep lasted rounded to complete tick
|
||||
/* Something other than the tick interrupt ended the sleep. */
|
||||
|
||||
/* Use the SysTick current-value register to determine the
|
||||
* number of SysTick decrements remaining until the expected idle
|
||||
* time would have ended. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* If the SysTick is not using the core clock, the current-
|
||||
* value register might still be zero here. In that case, the
|
||||
* SysTick didn't load from the reload register, and there are
|
||||
* ulReloadValue + 1 decrements remaining, not zero. */
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulReloadValue + 1UL;
|
||||
}
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Work out how long the sleep lasted rounded to complete tick
|
||||
* periods (not the ulReload value which accounted for part
|
||||
* ticks). */
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - ulSysTickDecrementsLeft;
|
||||
|
||||
/* How many complete tick periods passed while the processor
|
||||
* was waiting? */
|
||||
|
|
@ -684,13 +712,26 @@ void xPortSysTickHandler( void ) iv IVT_INT_SysTick ics ICS_AUTO
|
|||
portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
|
||||
}
|
||||
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
|
||||
* again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
|
||||
* value. */
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG again,
|
||||
* then set portNVIC_SYSTICK_LOAD_REG back to its standard value. If
|
||||
* the SysTick is not using the core clock, temporarily configure it to
|
||||
* use the core clock. This configuration forces the SysTick to load
|
||||
* from portNVIC_SYSTICK_LOAD_REG immediately instead of at the next
|
||||
* cycle of the other clock. Then portNVIC_SYSTICK_LOAD_REG is ready
|
||||
* to receive the standard value immediately. */
|
||||
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* The temporary usage of the core clock has served its purpose,
|
||||
* as described above. Resume usage of the other clock. */
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Step the tick to account for any tick periods that elapsed. */
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
|
||||
/* Exit with interrupts enabled. */
|
||||
__asm {
|
||||
|
|
@ -725,7 +766,7 @@ void xPortSysTickHandler( void ) iv IVT_INT_SysTick ics ICS_AUTO
|
|||
|
||||
/* Configure SysTick to interrupt at the requested rate. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
|
||||
}
|
||||
|
||||
#endif /* configOVERRIDE_DEFAULT_TICK_CONFIGURATION */
|
||||
|
|
|
|||
|
|
@ -43,6 +43,8 @@
|
|||
#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
|
||||
#define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
|
||||
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
|
||||
#define portNVIC_PEND_SYSTICK_SET_BIT ( 1UL << 26UL )
|
||||
#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
|
||||
#define portMIN_INTERRUPT_PRIORITY ( 255UL )
|
||||
#define portNVIC_PENDSV_PRI ( portMIN_INTERRUPT_PRIORITY << 16UL )
|
||||
#define portNVIC_SYSTICK_PRI ( portMIN_INTERRUPT_PRIORITY << 24UL )
|
||||
|
|
@ -57,12 +59,26 @@
|
|||
* occurred while the SysTick counter is stopped during tickless idle
|
||||
* calculations. */
|
||||
#ifndef portMISSED_COUNTS_FACTOR
|
||||
#define portMISSED_COUNTS_FACTOR ( 45UL )
|
||||
#define portMISSED_COUNTS_FACTOR ( 94UL )
|
||||
#endif
|
||||
|
||||
/* Constants used with memory barrier intrinsics. */
|
||||
#define portSY_FULL_READ_WRITE ( 15 )
|
||||
|
||||
/* Let the user override the default SysTick clock rate. If defined by the
|
||||
* user, this symbol must equal the SysTick clock rate when the CLK bit is 0 in the
|
||||
* configuration register. */
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ ( configCPU_CLOCK_HZ )
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( portNVIC_SYSTICK_CLK_BIT )
|
||||
#else
|
||||
|
||||
/* Select the option to clock SysTick not at the same frequency as the core.
|
||||
* The clock used is often a divided version of the core clock. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( 0 )
|
||||
#endif
|
||||
|
||||
/* Legacy macro for backward compatibility only. This macro used to be used to
|
||||
* replace the function that configures the clock used to generate the tick
|
||||
* interrupt (prvSetupTimerInterrupt()), but now the function is declared weak so
|
||||
|
|
@ -358,18 +374,20 @@ void xPortSysTickHandler( void )
|
|||
{
|
||||
/* Calculate the constants required to configure the tick interrupt. */
|
||||
#if ( configUSE_TICKLESS_IDLE == 1 )
|
||||
ulTimerCountsForOneTick = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ );
|
||||
xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
|
||||
ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR;
|
||||
{
|
||||
ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
|
||||
xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
|
||||
ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
|
||||
}
|
||||
#endif /* configUSE_TICKLESS_IDLE */
|
||||
|
||||
/* Stop and reset the SysTick. */
|
||||
/* Stop and clear the SysTick. */
|
||||
portNVIC_SYSTICK_CTRL_REG = 0UL;
|
||||
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
|
||||
|
||||
/* Configure SysTick to interrupt at the requested rate. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
|
||||
}
|
||||
|
||||
#endif /* configOVERRIDE_DEFAULT_TICK_CONFIGURATION */
|
||||
|
|
@ -379,7 +397,7 @@ void xPortSysTickHandler( void )
|
|||
|
||||
__weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
||||
{
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
||||
TickType_t xModifiableIdleTime;
|
||||
|
||||
/* Make sure the SysTick reload value does not overflow the counter. */
|
||||
|
|
@ -388,22 +406,6 @@ void xPortSysTickHandler( void )
|
|||
xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
|
||||
}
|
||||
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for
|
||||
* is accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code will execute part way
|
||||
* through one of the tick periods. */
|
||||
ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Enter a critical section but don't use the taskENTER_CRITICAL()
|
||||
* method as that will mask interrupts that should exit sleep mode. */
|
||||
__disable_irq();
|
||||
|
|
@ -414,23 +416,49 @@ void xPortSysTickHandler( void )
|
|||
* to be unsuspended then abandon the low power entry. */
|
||||
if( eTaskConfirmSleepModeStatus() == eAbortSleep )
|
||||
{
|
||||
/* Restart from whatever is left in the count register to complete
|
||||
* this tick period. */
|
||||
portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
/* Restart SysTick. */
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Reset the reload register to the value required for normal tick
|
||||
* periods. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
|
||||
/* Re-enable interrupts - see comments above __disable_irq() call
|
||||
* above. */
|
||||
/* Re-enable interrupts - see comments above the __disable_irq()
|
||||
* call above. */
|
||||
__enable_irq();
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for
|
||||
* is accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Use the SysTick current-value register to determine the number of
|
||||
* SysTick decrements remaining until the next tick interrupt. If the
|
||||
* current-value register is zero, then there are actually
|
||||
* ulTimerCountsForOneTick decrements remaining, not zero, because the
|
||||
* SysTick requests the interrupt when decrementing from 1 to 0. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code normally executes part
|
||||
* way through the first tick period. But if the SysTick IRQ is now
|
||||
* pending, then clear the IRQ, suppressing the first tick, and correct
|
||||
* the reload value to reflect that the second tick period is already
|
||||
* underway. The expected idle time is always at least two ticks. */
|
||||
ulReloadValue = ulSysTickDecrementsLeft + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ( portNVIC_INT_CTRL_REG & portNVIC_PEND_SYSTICK_SET_BIT ) != 0 )
|
||||
{
|
||||
portNVIC_INT_CTRL_REG = portNVIC_PEND_SYSTICK_CLEAR_BIT;
|
||||
ulReloadValue -= ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Set the new reload value. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
|
||||
|
||||
|
|
@ -441,10 +469,10 @@ void xPortSysTickHandler( void )
|
|||
/* Restart SysTick. */
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
|
||||
/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
|
||||
* set its parameter to 0 to indicate that its implementation contains
|
||||
* its own wait for interrupt or wait for event instruction, and so wfi
|
||||
* should not be executed again. However, the original expected idle
|
||||
* should not be executed again. However, the original expected idle
|
||||
* time variable must remain unmodified, so a copy is taken. */
|
||||
xModifiableIdleTime = xExpectedIdleTime;
|
||||
configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
|
||||
|
|
@ -459,8 +487,8 @@ void xPortSysTickHandler( void )
|
|||
configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
|
||||
|
||||
/* Re-enable interrupts to allow the interrupt that brought the MCU
|
||||
* out of sleep mode to execute immediately. see comments above
|
||||
* __disable_interrupt() call above. */
|
||||
* out of sleep mode to execute immediately. See comments above
|
||||
* the __disable_irq() call above. */
|
||||
__enable_irq();
|
||||
__dsb( portSY_FULL_READ_WRITE );
|
||||
__isb( portSY_FULL_READ_WRITE );
|
||||
|
|
@ -480,26 +508,22 @@ void xPortSysTickHandler( void )
|
|||
* be, but using the tickless mode will inevitably result in some tiny
|
||||
* drift of the time maintained by the kernel with respect to calendar
|
||||
* time*/
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Determine if the SysTick clock has already counted to zero and
|
||||
* been set back to the current reload value (the reload back being
|
||||
* correct for the entire expected idle time) or if the SysTick is yet
|
||||
* to count to zero (in which case an interrupt other than the SysTick
|
||||
* must have brought the system out of sleep mode). */
|
||||
/* Determine whether the SysTick has already counted to zero. */
|
||||
if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
|
||||
{
|
||||
uint32_t ulCalculatedLoadValue;
|
||||
|
||||
/* The tick interrupt is already pending, and the SysTick count
|
||||
* reloaded with ulReloadValue. Reset the
|
||||
* portNVIC_SYSTICK_LOAD with whatever remains of this tick
|
||||
* period. */
|
||||
/* The tick interrupt ended the sleep (or is now pending), and
|
||||
* a new tick period has started. Reset portNVIC_SYSTICK_LOAD_REG
|
||||
* with whatever remains of the new tick period. */
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
|
||||
|
||||
/* Don't allow a tiny value, or values that have somehow
|
||||
* underflowed because the post sleep hook did something
|
||||
* that took too long. */
|
||||
* that took too long or because the SysTick current-value register
|
||||
* is zero. */
|
||||
if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
|
||||
{
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
|
||||
|
|
@ -514,11 +538,29 @@ void xPortSysTickHandler( void )
|
|||
}
|
||||
else
|
||||
{
|
||||
/* Something other than the tick interrupt ended the sleep.
|
||||
* Work out how long the sleep lasted rounded to complete tick
|
||||
/* Something other than the tick interrupt ended the sleep. */
|
||||
|
||||
/* Use the SysTick current-value register to determine the
|
||||
* number of SysTick decrements remaining until the expected idle
|
||||
* time would have ended. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* If the SysTick is not using the core clock, the current-
|
||||
* value register might still be zero here. In that case, the
|
||||
* SysTick didn't load from the reload register, and there are
|
||||
* ulReloadValue + 1 decrements remaining, not zero. */
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulReloadValue + 1UL;
|
||||
}
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Work out how long the sleep lasted rounded to complete tick
|
||||
* periods (not the ulReload value which accounted for part
|
||||
* ticks). */
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - ulSysTickDecrementsLeft;
|
||||
|
||||
/* How many complete tick periods passed while the processor
|
||||
* was waiting? */
|
||||
|
|
@ -529,15 +571,28 @@ void xPortSysTickHandler( void )
|
|||
portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
|
||||
}
|
||||
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD
|
||||
* again, then set portNVIC_SYSTICK_LOAD back to its standard
|
||||
* value. */
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG again,
|
||||
* then set portNVIC_SYSTICK_LOAD_REG back to its standard value. If
|
||||
* the SysTick is not using the core clock, temporarily configure it to
|
||||
* use the core clock. This configuration forces the SysTick to load
|
||||
* from portNVIC_SYSTICK_LOAD_REG immediately instead of at the next
|
||||
* cycle of the other clock. Then portNVIC_SYSTICK_LOAD_REG is ready
|
||||
* to receive the standard value immediately. */
|
||||
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* The temporary usage of the core clock has served its purpose,
|
||||
* as described above. Resume usage of the other clock. */
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Exit with interrpts enabled. */
|
||||
/* Step the tick to account for any tick periods that elapsed. */
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
|
||||
/* Exit with interrupts enabled. */
|
||||
__enable_irq();
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -40,17 +40,6 @@
|
|||
#error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See http: /*www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
|
||||
#endif
|
||||
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
|
||||
#else
|
||||
|
||||
/* The way the SysTick is clocked is not modified in case it is not the same
|
||||
* as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 0 )
|
||||
#endif
|
||||
|
||||
/* Legacy macro for backward compatibility only. This macro used to be used to
|
||||
* replace the function that configures the clock used to generate the tick
|
||||
* interrupt (prvSetupTimerInterrupt()), but now the function is declared weak so
|
||||
|
|
@ -66,10 +55,12 @@
|
|||
#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( *( ( volatile uint32_t * ) 0xe000e018 ) )
|
||||
#define portNVIC_SHPR3_REG ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
|
||||
/* ...then bits in the registers. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
|
||||
#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
|
||||
#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
|
||||
#define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
|
||||
#define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL )
|
||||
#define portNVIC_PEND_SYSTICK_SET_BIT ( 1UL << 26UL )
|
||||
#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
|
||||
|
||||
#define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
|
||||
|
|
@ -97,12 +88,26 @@
|
|||
/* A fiddle factor to estimate the number of SysTick counts that would have
|
||||
* occurred while the SysTick counter is stopped during tickless idle
|
||||
* calculations. */
|
||||
#define portMISSED_COUNTS_FACTOR ( 45UL )
|
||||
#define portMISSED_COUNTS_FACTOR ( 94UL )
|
||||
|
||||
/* For strict compliance with the Cortex-M spec the task start address should
|
||||
* have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
|
||||
#define portSTART_ADDRESS_MASK ( ( StackType_t ) 0xfffffffeUL )
|
||||
|
||||
/* Let the user override the default SysTick clock rate. If defined by the
|
||||
* user, this symbol must equal the SysTick clock rate when the CLK bit is 0 in the
|
||||
* configuration register. */
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ ( configCPU_CLOCK_HZ )
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( portNVIC_SYSTICK_CLK_BIT )
|
||||
#else
|
||||
|
||||
/* Select the option to clock SysTick not at the same frequency as the core.
|
||||
* The clock used is often a divided version of the core clock. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( 0 )
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Setup the timer to generate the tick interrupts. The implementation in this
|
||||
* file is weak to allow application writers to change the timer used to
|
||||
|
|
@ -448,7 +453,7 @@ void xPortSysTickHandler( void )
|
|||
|
||||
__weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
||||
{
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
||||
TickType_t xModifiableIdleTime;
|
||||
|
||||
/* Make sure the SysTick reload value does not overflow the counter. */
|
||||
|
|
@ -457,22 +462,6 @@ void xPortSysTickHandler( void )
|
|||
xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
|
||||
}
|
||||
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for
|
||||
* is accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code will execute part way
|
||||
* through one of the tick periods. */
|
||||
ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Enter a critical section but don't use the taskENTER_CRITICAL()
|
||||
* method as that will mask interrupts that should exit sleep mode. */
|
||||
__disable_irq();
|
||||
|
|
@ -483,23 +472,49 @@ void xPortSysTickHandler( void )
|
|||
* to be unsuspended then abandon the low power entry. */
|
||||
if( eTaskConfirmSleepModeStatus() == eAbortSleep )
|
||||
{
|
||||
/* Restart from whatever is left in the count register to complete
|
||||
* this tick period. */
|
||||
portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
/* Restart SysTick. */
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Reset the reload register to the value required for normal tick
|
||||
* periods. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
|
||||
/* Re-enable interrupts - see comments above __disable_irq() call
|
||||
* above. */
|
||||
/* Re-enable interrupts - see comments above the __disable_irq()
|
||||
* call above. */
|
||||
__enable_irq();
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for
|
||||
* is accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Use the SysTick current-value register to determine the number of
|
||||
* SysTick decrements remaining until the next tick interrupt. If the
|
||||
* current-value register is zero, then there are actually
|
||||
* ulTimerCountsForOneTick decrements remaining, not zero, because the
|
||||
* SysTick requests the interrupt when decrementing from 1 to 0. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code normally executes part
|
||||
* way through the first tick period. But if the SysTick IRQ is now
|
||||
* pending, then clear the IRQ, suppressing the first tick, and correct
|
||||
* the reload value to reflect that the second tick period is already
|
||||
* underway. The expected idle time is always at least two ticks. */
|
||||
ulReloadValue = ulSysTickDecrementsLeft + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ( portNVIC_INT_CTRL_REG & portNVIC_PEND_SYSTICK_SET_BIT ) != 0 )
|
||||
{
|
||||
portNVIC_INT_CTRL_REG = portNVIC_PEND_SYSTICK_CLEAR_BIT;
|
||||
ulReloadValue -= ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Set the new reload value. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
|
||||
|
||||
|
|
@ -528,8 +543,8 @@ void xPortSysTickHandler( void )
|
|||
configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
|
||||
|
||||
/* Re-enable interrupts to allow the interrupt that brought the MCU
|
||||
* out of sleep mode to execute immediately. see comments above
|
||||
* __disable_interrupt() call above. */
|
||||
* out of sleep mode to execute immediately. See comments above
|
||||
* the __disable_irq() call above. */
|
||||
__enable_irq();
|
||||
__dsb( portSY_FULL_READ_WRITE );
|
||||
__isb( portSY_FULL_READ_WRITE );
|
||||
|
|
@ -549,26 +564,22 @@ void xPortSysTickHandler( void )
|
|||
* be, but using the tickless mode will inevitably result in some tiny
|
||||
* drift of the time maintained by the kernel with respect to calendar
|
||||
* time*/
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Determine if the SysTick clock has already counted to zero and
|
||||
* been set back to the current reload value (the reload back being
|
||||
* correct for the entire expected idle time) or if the SysTick is yet
|
||||
* to count to zero (in which case an interrupt other than the SysTick
|
||||
* must have brought the system out of sleep mode). */
|
||||
/* Determine whether the SysTick has already counted to zero. */
|
||||
if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
|
||||
{
|
||||
uint32_t ulCalculatedLoadValue;
|
||||
|
||||
/* The tick interrupt is already pending, and the SysTick count
|
||||
* reloaded with ulReloadValue. Reset the
|
||||
* portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
|
||||
* period. */
|
||||
/* The tick interrupt ended the sleep (or is now pending), and
|
||||
* a new tick period has started. Reset portNVIC_SYSTICK_LOAD_REG
|
||||
* with whatever remains of the new tick period. */
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
|
||||
|
||||
/* Don't allow a tiny value, or values that have somehow
|
||||
* underflowed because the post sleep hook did something
|
||||
* that took too long. */
|
||||
* that took too long or because the SysTick current-value register
|
||||
* is zero. */
|
||||
if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
|
||||
{
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
|
||||
|
|
@ -583,11 +594,29 @@ void xPortSysTickHandler( void )
|
|||
}
|
||||
else
|
||||
{
|
||||
/* Something other than the tick interrupt ended the sleep.
|
||||
* Work out how long the sleep lasted rounded to complete tick
|
||||
/* Something other than the tick interrupt ended the sleep. */
|
||||
|
||||
/* Use the SysTick current-value register to determine the
|
||||
* number of SysTick decrements remaining until the expected idle
|
||||
* time would have ended. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* If the SysTick is not using the core clock, the current-
|
||||
* value register might still be zero here. In that case, the
|
||||
* SysTick didn't load from the reload register, and there are
|
||||
* ulReloadValue + 1 decrements remaining, not zero. */
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulReloadValue + 1UL;
|
||||
}
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Work out how long the sleep lasted rounded to complete tick
|
||||
* periods (not the ulReload value which accounted for part
|
||||
* ticks). */
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - ulSysTickDecrementsLeft;
|
||||
|
||||
/* How many complete tick periods passed while the processor
|
||||
* was waiting? */
|
||||
|
|
@ -598,13 +627,26 @@ void xPortSysTickHandler( void )
|
|||
portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
|
||||
}
|
||||
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
|
||||
* again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
|
||||
* value. */
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG again,
|
||||
* then set portNVIC_SYSTICK_LOAD_REG back to its standard value. If
|
||||
* the SysTick is not using the core clock, temporarily configure it to
|
||||
* use the core clock. This configuration forces the SysTick to load
|
||||
* from portNVIC_SYSTICK_LOAD_REG immediately instead of at the next
|
||||
* cycle of the other clock. Then portNVIC_SYSTICK_LOAD_REG is ready
|
||||
* to receive the standard value immediately. */
|
||||
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* The temporary usage of the core clock has served its purpose,
|
||||
* as described above. Resume usage of the other clock. */
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Step the tick to account for any tick periods that elapsed. */
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
|
||||
/* Exit with interrupts enabled. */
|
||||
__enable_irq();
|
||||
|
|
@ -638,7 +680,7 @@ void xPortSysTickHandler( void )
|
|||
|
||||
/* Configure SysTick to interrupt at the requested rate. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
|
||||
}
|
||||
|
||||
#endif /* configOVERRIDE_DEFAULT_TICK_CONFIGURATION */
|
||||
|
|
|
|||
|
|
@ -40,17 +40,6 @@
|
|||
#error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See http: /*www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
|
||||
#endif
|
||||
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
|
||||
#else
|
||||
|
||||
/* The way the SysTick is clocked is not modified in case it is not the same
|
||||
* as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 0 )
|
||||
#endif
|
||||
|
||||
/* Legacy macro for backward compatibility only. This macro used to be used to
|
||||
* replace the function that configures the clock used to generate the tick
|
||||
* interrupt (prvSetupTimerInterrupt()), but now the function is declared weak so
|
||||
|
|
@ -66,10 +55,12 @@
|
|||
#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( *( ( volatile uint32_t * ) 0xe000e018 ) )
|
||||
#define portNVIC_SHPR3_REG ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
|
||||
/* ...then bits in the registers. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
|
||||
#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
|
||||
#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
|
||||
#define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
|
||||
#define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL )
|
||||
#define portNVIC_PEND_SYSTICK_SET_BIT ( 1UL << 26UL )
|
||||
#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
|
||||
|
||||
/* Constants used to detect a Cortex-M7 r0p1 core, which should use the ARM_CM7
|
||||
|
|
@ -108,12 +99,26 @@
|
|||
/* A fiddle factor to estimate the number of SysTick counts that would have
|
||||
* occurred while the SysTick counter is stopped during tickless idle
|
||||
* calculations. */
|
||||
#define portMISSED_COUNTS_FACTOR ( 45UL )
|
||||
#define portMISSED_COUNTS_FACTOR ( 94UL )
|
||||
|
||||
/* For strict compliance with the Cortex-M spec the task start address should
|
||||
* have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
|
||||
#define portSTART_ADDRESS_MASK ( ( StackType_t ) 0xfffffffeUL )
|
||||
|
||||
/* Let the user override the default SysTick clock rate. If defined by the
|
||||
* user, this symbol must equal the SysTick clock rate when the CLK bit is 0 in the
|
||||
* configuration register. */
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ ( configCPU_CLOCK_HZ )
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( portNVIC_SYSTICK_CLK_BIT )
|
||||
#else
|
||||
|
||||
/* Select the option to clock SysTick not at the same frequency as the core.
|
||||
* The clock used is often a divided version of the core clock. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( 0 )
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Setup the timer to generate the tick interrupts. The implementation in this
|
||||
* file is weak to allow application writers to change the timer used to
|
||||
|
|
@ -540,7 +545,7 @@ void xPortSysTickHandler( void )
|
|||
|
||||
__weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
||||
{
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
||||
TickType_t xModifiableIdleTime;
|
||||
|
||||
/* Make sure the SysTick reload value does not overflow the counter. */
|
||||
|
|
@ -549,22 +554,6 @@ void xPortSysTickHandler( void )
|
|||
xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
|
||||
}
|
||||
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for
|
||||
* is accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code will execute part way
|
||||
* through one of the tick periods. */
|
||||
ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Enter a critical section but don't use the taskENTER_CRITICAL()
|
||||
* method as that will mask interrupts that should exit sleep mode. */
|
||||
__disable_irq();
|
||||
|
|
@ -575,23 +564,49 @@ void xPortSysTickHandler( void )
|
|||
* to be unsuspended then abandon the low power entry. */
|
||||
if( eTaskConfirmSleepModeStatus() == eAbortSleep )
|
||||
{
|
||||
/* Restart from whatever is left in the count register to complete
|
||||
* this tick period. */
|
||||
portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
/* Restart SysTick. */
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Reset the reload register to the value required for normal tick
|
||||
* periods. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
|
||||
/* Re-enable interrupts - see comments above __disable_irq() call
|
||||
* above. */
|
||||
/* Re-enable interrupts - see comments above the __disable_irq()
|
||||
* call above. */
|
||||
__enable_irq();
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for
|
||||
* is accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Use the SysTick current-value register to determine the number of
|
||||
* SysTick decrements remaining until the next tick interrupt. If the
|
||||
* current-value register is zero, then there are actually
|
||||
* ulTimerCountsForOneTick decrements remaining, not zero, because the
|
||||
* SysTick requests the interrupt when decrementing from 1 to 0. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code normally executes part
|
||||
* way through the first tick period. But if the SysTick IRQ is now
|
||||
* pending, then clear the IRQ, suppressing the first tick, and correct
|
||||
* the reload value to reflect that the second tick period is already
|
||||
* underway. The expected idle time is always at least two ticks. */
|
||||
ulReloadValue = ulSysTickDecrementsLeft + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ( portNVIC_INT_CTRL_REG & portNVIC_PEND_SYSTICK_SET_BIT ) != 0 )
|
||||
{
|
||||
portNVIC_INT_CTRL_REG = portNVIC_PEND_SYSTICK_CLEAR_BIT;
|
||||
ulReloadValue -= ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Set the new reload value. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
|
||||
|
||||
|
|
@ -620,8 +635,8 @@ void xPortSysTickHandler( void )
|
|||
configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
|
||||
|
||||
/* Re-enable interrupts to allow the interrupt that brought the MCU
|
||||
* out of sleep mode to execute immediately. see comments above
|
||||
* __disable_interrupt() call above. */
|
||||
* out of sleep mode to execute immediately. See comments above
|
||||
* the __disable_irq() call above. */
|
||||
__enable_irq();
|
||||
__dsb( portSY_FULL_READ_WRITE );
|
||||
__isb( portSY_FULL_READ_WRITE );
|
||||
|
|
@ -641,26 +656,22 @@ void xPortSysTickHandler( void )
|
|||
* be, but using the tickless mode will inevitably result in some tiny
|
||||
* drift of the time maintained by the kernel with respect to calendar
|
||||
* time*/
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Determine if the SysTick clock has already counted to zero and
|
||||
* been set back to the current reload value (the reload back being
|
||||
* correct for the entire expected idle time) or if the SysTick is yet
|
||||
* to count to zero (in which case an interrupt other than the SysTick
|
||||
* must have brought the system out of sleep mode). */
|
||||
/* Determine whether the SysTick has already counted to zero. */
|
||||
if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
|
||||
{
|
||||
uint32_t ulCalculatedLoadValue;
|
||||
|
||||
/* The tick interrupt is already pending, and the SysTick count
|
||||
* reloaded with ulReloadValue. Reset the
|
||||
* portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
|
||||
* period. */
|
||||
/* The tick interrupt ended the sleep (or is now pending), and
|
||||
* a new tick period has started. Reset portNVIC_SYSTICK_LOAD_REG
|
||||
* with whatever remains of the new tick period. */
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
|
||||
|
||||
/* Don't allow a tiny value, or values that have somehow
|
||||
* underflowed because the post sleep hook did something
|
||||
* that took too long. */
|
||||
* that took too long or because the SysTick current-value register
|
||||
* is zero. */
|
||||
if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
|
||||
{
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
|
||||
|
|
@ -675,11 +686,29 @@ void xPortSysTickHandler( void )
|
|||
}
|
||||
else
|
||||
{
|
||||
/* Something other than the tick interrupt ended the sleep.
|
||||
* Work out how long the sleep lasted rounded to complete tick
|
||||
/* Something other than the tick interrupt ended the sleep. */
|
||||
|
||||
/* Use the SysTick current-value register to determine the
|
||||
* number of SysTick decrements remaining until the expected idle
|
||||
* time would have ended. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* If the SysTick is not using the core clock, the current-
|
||||
* value register might still be zero here. In that case, the
|
||||
* SysTick didn't load from the reload register, and there are
|
||||
* ulReloadValue + 1 decrements remaining, not zero. */
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulReloadValue + 1UL;
|
||||
}
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Work out how long the sleep lasted rounded to complete tick
|
||||
* periods (not the ulReload value which accounted for part
|
||||
* ticks). */
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - ulSysTickDecrementsLeft;
|
||||
|
||||
/* How many complete tick periods passed while the processor
|
||||
* was waiting? */
|
||||
|
|
@ -690,13 +719,26 @@ void xPortSysTickHandler( void )
|
|||
portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
|
||||
}
|
||||
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
|
||||
* again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
|
||||
* value. */
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG again,
|
||||
* then set portNVIC_SYSTICK_LOAD_REG back to its standard value. If
|
||||
* the SysTick is not using the core clock, temporarily configure it to
|
||||
* use the core clock. This configuration forces the SysTick to load
|
||||
* from portNVIC_SYSTICK_LOAD_REG immediately instead of at the next
|
||||
* cycle of the other clock. Then portNVIC_SYSTICK_LOAD_REG is ready
|
||||
* to receive the standard value immediately. */
|
||||
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* The temporary usage of the core clock has served its purpose,
|
||||
* as described above. Resume usage of the other clock. */
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Step the tick to account for any tick periods that elapsed. */
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
|
||||
/* Exit with interrupts enabled. */
|
||||
__enable_irq();
|
||||
|
|
@ -730,7 +772,7 @@ void xPortSysTickHandler( void )
|
|||
|
||||
/* Configure SysTick to interrupt at the requested rate. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
|
||||
}
|
||||
|
||||
#endif /* configOVERRIDE_DEFAULT_TICK_CONFIGURATION */
|
||||
|
|
|
|||
|
|
@ -40,17 +40,6 @@
|
|||
#error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See http: /*www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
|
||||
#endif
|
||||
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
|
||||
#else
|
||||
|
||||
/* The way the SysTick is clocked is not modified in case it is not the same
|
||||
* as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 0 )
|
||||
#endif
|
||||
|
||||
/* The __weak attribute does not work as you might expect with the Keil tools
|
||||
* so the configOVERRIDE_DEFAULT_TICK_CONFIGURATION constant must be set to 1 if
|
||||
* the application writer wants to provide their own implementation of
|
||||
|
|
@ -66,10 +55,12 @@
|
|||
#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( *( ( volatile uint32_t * ) 0xe000e018 ) )
|
||||
#define portNVIC_SHPR3_REG ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
|
||||
/* ...then bits in the registers. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
|
||||
#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
|
||||
#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
|
||||
#define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
|
||||
#define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL )
|
||||
#define portNVIC_PEND_SYSTICK_SET_BIT ( 1UL << 26UL )
|
||||
#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
|
||||
|
||||
#define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
|
||||
|
|
@ -102,12 +93,26 @@
|
|||
/* A fiddle factor to estimate the number of SysTick counts that would have
|
||||
* occurred while the SysTick counter is stopped during tickless idle
|
||||
* calculations. */
|
||||
#define portMISSED_COUNTS_FACTOR ( 45UL )
|
||||
#define portMISSED_COUNTS_FACTOR ( 94UL )
|
||||
|
||||
/* For strict compliance with the Cortex-M spec the task start address should
|
||||
* have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
|
||||
#define portSTART_ADDRESS_MASK ( ( StackType_t ) 0xfffffffeUL )
|
||||
|
||||
/* Let the user override the default SysTick clock rate. If defined by the
|
||||
* user, this symbol must equal the SysTick clock rate when the CLK bit is 0 in the
|
||||
* configuration register. */
|
||||
#ifndef configSYSTICK_CLOCK_HZ
|
||||
#define configSYSTICK_CLOCK_HZ ( configCPU_CLOCK_HZ )
|
||||
/* Ensure the SysTick is clocked at the same frequency as the core. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( portNVIC_SYSTICK_CLK_BIT )
|
||||
#else
|
||||
|
||||
/* Select the option to clock SysTick not at the same frequency as the core.
|
||||
* The clock used is often a divided version of the core clock. */
|
||||
#define portNVIC_SYSTICK_CLK_BIT_CONFIG ( 0 )
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Setup the timer to generate the tick interrupts. The implementation in this
|
||||
* file is weak to allow application writers to change the timer used to
|
||||
|
|
@ -527,7 +532,7 @@ void xPortSysTickHandler( void )
|
|||
|
||||
__weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
|
||||
{
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
|
||||
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickDecrementsLeft;
|
||||
TickType_t xModifiableIdleTime;
|
||||
|
||||
/* Make sure the SysTick reload value does not overflow the counter. */
|
||||
|
|
@ -536,22 +541,6 @@ void xPortSysTickHandler( void )
|
|||
xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
|
||||
}
|
||||
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for
|
||||
* is accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code will execute part way
|
||||
* through one of the tick periods. */
|
||||
ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Enter a critical section but don't use the taskENTER_CRITICAL()
|
||||
* method as that will mask interrupts that should exit sleep mode. */
|
||||
__disable_irq();
|
||||
|
|
@ -562,23 +551,49 @@ void xPortSysTickHandler( void )
|
|||
* to be unsuspended then abandon the low power entry. */
|
||||
if( eTaskConfirmSleepModeStatus() == eAbortSleep )
|
||||
{
|
||||
/* Restart from whatever is left in the count register to complete
|
||||
* this tick period. */
|
||||
portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
/* Restart SysTick. */
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
|
||||
/* Reset the reload register to the value required for normal tick
|
||||
* periods. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
|
||||
/* Re-enable interrupts - see comments above __disable_irq() call
|
||||
* above. */
|
||||
/* Re-enable interrupts - see comments above the __disable_irq()
|
||||
* call above. */
|
||||
__enable_irq();
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Stop the SysTick momentarily. The time the SysTick is stopped for
|
||||
* is accounted for as best it can be, but using the tickless mode will
|
||||
* inevitably result in some tiny drift of the time maintained by the
|
||||
* kernel with respect to calendar time. */
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Use the SysTick current-value register to determine the number of
|
||||
* SysTick decrements remaining until the next tick interrupt. If the
|
||||
* current-value register is zero, then there are actually
|
||||
* ulTimerCountsForOneTick decrements remaining, not zero, because the
|
||||
* SysTick requests the interrupt when decrementing from 1 to 0. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime
|
||||
* tick periods. -1 is used because this code normally executes part
|
||||
* way through the first tick period. But if the SysTick IRQ is now
|
||||
* pending, then clear the IRQ, suppressing the first tick, and correct
|
||||
* the reload value to reflect that the second tick period is already
|
||||
* underway. The expected idle time is always at least two ticks. */
|
||||
ulReloadValue = ulSysTickDecrementsLeft + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
|
||||
if( ( portNVIC_INT_CTRL_REG & portNVIC_PEND_SYSTICK_SET_BIT ) != 0 )
|
||||
{
|
||||
portNVIC_INT_CTRL_REG = portNVIC_PEND_SYSTICK_CLEAR_BIT;
|
||||
ulReloadValue -= ulTimerCountsForOneTick;
|
||||
}
|
||||
|
||||
if( ulReloadValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
ulReloadValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Set the new reload value. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
|
||||
|
||||
|
|
@ -607,8 +622,8 @@ void xPortSysTickHandler( void )
|
|||
configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
|
||||
|
||||
/* Re-enable interrupts to allow the interrupt that brought the MCU
|
||||
* out of sleep mode to execute immediately. see comments above
|
||||
* __disable_interrupt() call above. */
|
||||
* out of sleep mode to execute immediately. See comments above
|
||||
* the __disable_irq() call above. */
|
||||
__enable_irq();
|
||||
__dsb( portSY_FULL_READ_WRITE );
|
||||
__isb( portSY_FULL_READ_WRITE );
|
||||
|
|
@ -628,26 +643,22 @@ void xPortSysTickHandler( void )
|
|||
* be, but using the tickless mode will inevitably result in some tiny
|
||||
* drift of the time maintained by the kernel with respect to calendar
|
||||
* time*/
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT );
|
||||
|
||||
/* Determine if the SysTick clock has already counted to zero and
|
||||
* been set back to the current reload value (the reload back being
|
||||
* correct for the entire expected idle time) or if the SysTick is yet
|
||||
* to count to zero (in which case an interrupt other than the SysTick
|
||||
* must have brought the system out of sleep mode). */
|
||||
/* Determine whether the SysTick has already counted to zero. */
|
||||
if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
|
||||
{
|
||||
uint32_t ulCalculatedLoadValue;
|
||||
|
||||
/* The tick interrupt is already pending, and the SysTick count
|
||||
* reloaded with ulReloadValue. Reset the
|
||||
* portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
|
||||
* period. */
|
||||
/* The tick interrupt ended the sleep (or is now pending), and
|
||||
* a new tick period has started. Reset portNVIC_SYSTICK_LOAD_REG
|
||||
* with whatever remains of the new tick period. */
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
|
||||
|
||||
/* Don't allow a tiny value, or values that have somehow
|
||||
* underflowed because the post sleep hook did something
|
||||
* that took too long. */
|
||||
* that took too long or because the SysTick current-value register
|
||||
* is zero. */
|
||||
if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
|
||||
{
|
||||
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
|
||||
|
|
@ -662,11 +673,29 @@ void xPortSysTickHandler( void )
|
|||
}
|
||||
else
|
||||
{
|
||||
/* Something other than the tick interrupt ended the sleep.
|
||||
* Work out how long the sleep lasted rounded to complete tick
|
||||
/* Something other than the tick interrupt ended the sleep. */
|
||||
|
||||
/* Use the SysTick current-value register to determine the
|
||||
* number of SysTick decrements remaining until the expected idle
|
||||
* time would have ended. */
|
||||
ulSysTickDecrementsLeft = portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* If the SysTick is not using the core clock, the current-
|
||||
* value register might still be zero here. In that case, the
|
||||
* SysTick didn't load from the reload register, and there are
|
||||
* ulReloadValue + 1 decrements remaining, not zero. */
|
||||
if( ulSysTickDecrementsLeft == 0 )
|
||||
{
|
||||
ulSysTickDecrementsLeft = ulReloadValue + 1UL;
|
||||
}
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Work out how long the sleep lasted rounded to complete tick
|
||||
* periods (not the ulReload value which accounted for part
|
||||
* ticks). */
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
||||
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - ulSysTickDecrementsLeft;
|
||||
|
||||
/* How many complete tick periods passed while the processor
|
||||
* was waiting? */
|
||||
|
|
@ -677,13 +706,26 @@ void xPortSysTickHandler( void )
|
|||
portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
|
||||
}
|
||||
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
|
||||
* again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
|
||||
* value. */
|
||||
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG again,
|
||||
* then set portNVIC_SYSTICK_LOAD_REG back to its standard value. If
|
||||
* the SysTick is not using the core clock, temporarily configure it to
|
||||
* use the core clock. This configuration forces the SysTick to load
|
||||
* from portNVIC_SYSTICK_LOAD_REG immediately instead of at the next
|
||||
* cycle of the other clock. Then portNVIC_SYSTICK_LOAD_REG is ready
|
||||
* to receive the standard value immediately. */
|
||||
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
|
||||
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
|
||||
#if ( portNVIC_SYSTICK_CLK_BIT_CONFIG != portNVIC_SYSTICK_CLK_BIT )
|
||||
{
|
||||
/* The temporary usage of the core clock has served its purpose,
|
||||
* as described above. Resume usage of the other clock. */
|
||||
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
||||
}
|
||||
#endif /* portNVIC_SYSTICK_CLK_BIT_CONFIG */
|
||||
|
||||
/* Step the tick to account for any tick periods that elapsed. */
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
|
||||
/* Exit with interrupts enabled. */
|
||||
__enable_irq();
|
||||
|
|
@ -717,7 +759,7 @@ void xPortSysTickHandler( void )
|
|||
|
||||
/* Configure SysTick to interrupt at the requested rate. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT_CONFIG | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
|
||||
}
|
||||
|
||||
#endif /* configOVERRIDE_DEFAULT_TICK_CONFIGURATION */
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue