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port: riscv: Update the stack init function to include the fpu context size

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Jonathan Cubides 2025-01-23 15:04:11 +01:00
parent 0fc228dc9b
commit a864fe3e08
1 changed files with 2 additions and 0 deletions
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2
portable/GCC/RISC-V/portASM.S
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@ -162,6 +162,7 @@ definitions. */
* where the global and thread pointers are currently assumed to be constant so * where the global and thread pointers are currently assumed to be constant so
* are not saved: * are not saved:
* *
* [FPU registers (when enabled/available) go here]
* mstatus * mstatus
* xCriticalNesting * xCriticalNesting
* x31 * x31
@ -196,6 +197,7 @@ definitions. */
* pxCode * pxCode
*/ */
pxPortInitialiseStack: pxPortInitialiseStack:
addi a0, a0, -portFPUCONTEXT_SIZE
csrr t0, mstatus /* Obtain current mstatus value. */ csrr t0, mstatus /* Obtain current mstatus value. */
andi t0, t0, ~0x8 /* Ensure interrupts are disabled when the stack is restored within an ISR. Required when a task is created after the scheduler has been started, otherwise interrupts would be disabled anyway. */ andi t0, t0, ~0x8 /* Ensure interrupts are disabled when the stack is restored within an ISR. Required when a task is created after the scheduler has been started, otherwise interrupts would be disabled anyway. */
addi t1, x0, 0x188 /* Generate the value 0x1880, which are the MPIE and MPP bits to set in mstatus. */ addi t1, x0, 0x188 /* Generate the value 0x1880, which are the MPIE and MPP bits to set in mstatus. */