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Style: uncrustify kernel files
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Alfred Gedeon
alfred gedeon
parent
66a815653b
commit
587a83d647
385 changed files with 4714 additions and 4338 deletions
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@ -22,6 +22,7 @@
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* http://www.FreeRTOS.org
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* http://aws.amazon.com/freertos
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*
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* 1 tab == 4 spaces!
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*/
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/*-----------------------------------------------------------
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@ -52,7 +53,7 @@
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/* Used during a context switch to store the size of the stack being copied
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* to or from XRAM. */
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data static uint8_t ucStackBytes;
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data static uint8_t ucStackBytes;
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/* Used during a context switch to point to the next byte in XRAM from/to which
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* a RAM byte is to be copied. */
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@ -60,7 +61,7 @@ xdata static StackType_t * data pxXRAMStack;
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/* Used during a context switch to point to the next byte in RAM from/to which
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* an XRAM byte is to be copied. */
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data static StackType_t * data pxRAMStack;
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data static StackType_t * data pxRAMStack;
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/* We require the address of the pxCurrentTCB variable, but don't want to know
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* any details of its type. */
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@ -84,29 +85,29 @@ static void prvSetupTimerInterrupt( void );
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{ \
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/* pxCurrentTCB points to a TCB which itself points to the location into \
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* which the first stack byte should be copied. Set pxXRAMStack to point \
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* to the location into which the first stack byte is to be copied. */ \
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pxXRAMStack = ( xdata StackType_t * ) *( ( xdata StackType_t ** ) pxCurrentTCB ); \
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\
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/* Set pxRAMStack to point to the first byte to be coped from the stack. */ \
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pxRAMStack = ( data StackType_t * data ) configSTACK_START; \
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\
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* to the location into which the first stack byte is to be copied. */ \
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pxXRAMStack = ( xdata StackType_t * ) *( ( xdata StackType_t ** ) pxCurrentTCB ); \
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\
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/* Set pxRAMStack to point to the first byte to be coped from the stack. */ \
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pxRAMStack = ( data StackType_t * data ) configSTACK_START; \
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\
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/* Calculate the size of the stack we are about to copy from the current \
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* stack pointer value. */ \
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ucStackBytes = SP - ( configSTACK_START - 1 ); \
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\
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* stack pointer value. */ \
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ucStackBytes = SP - ( configSTACK_START - 1 ); \
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\
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/* Before starting to copy the stack, store the calculated stack size so \
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* the stack can be restored when the task is resumed. */ \
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* pxXRAMStack = ucStackBytes; \
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\
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* the stack can be restored when the task is resumed. */\
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* pxXRAMStack = ucStackBytes; \
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\
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/* Copy each stack byte in turn. pxXRAMStack is incremented first as we \
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* have already stored the stack size into XRAM. */ \
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while( ucStackBytes ) \
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{ \
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pxXRAMStack ++; \
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* pxXRAMStack = * pxRAMStack; \
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pxRAMStack ++; \
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ucStackBytes --; \
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} \
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* have already stored the stack size into XRAM. */\
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while( ucStackBytes ) \
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{ \
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pxXRAMStack ++; \
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* pxXRAMStack = * pxRAMStack; \
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pxRAMStack ++; \
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ucStackBytes --; \
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} \
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}
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/*-----------------------------------------------------------*/
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@ -117,10 +118,10 @@ static void prvSetupTimerInterrupt( void );
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#define portCOPY_XRAM_TO_STACK() \
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{ \
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/* Setup the pointers as per portCOPY_STACK_TO_XRAM(), but this time to \
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* copy the data back out of XRAM and into the stack. */ \
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pxXRAMStack = ( xdata StackType_t * ) *( ( xdata StackType_t ** ) pxCurrentTCB ); \
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pxRAMStack = ( data StackType_t * data )( configSTACK_START - 1 ); \
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\
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* copy the data back out of XRAM and into the stack. */ \
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pxXRAMStack = ( xdata StackType_t * ) *( ( xdata StackType_t ** ) pxCurrentTCB ); \
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pxRAMStack = ( data StackType_t * data )( configSTACK_START - 1 ); \
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\
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/* The first value stored in XRAM was the size of the stack - i.e. the \
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* number of bytes we need to copy back. */ \
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ucStackBytes = pxXRAMStack[ 0 ]; \
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@ -135,7 +136,7 @@ static void prvSetupTimerInterrupt( void );
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} while( ucStackBytes ); \
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\
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/* Restore the stack pointer ready to use the restored stack. */ \
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SP = ( uint8_t ) pxRAMStack; \
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SP = ( uint8_t ) pxRAMStack; \
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}
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/*-----------------------------------------------------------*/
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@ -194,18 +195,18 @@ static void prvSetupTimerInterrupt( void );
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pop DPL \
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/* The next byte of the stack is the IE register. Only the global \
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* enable bit forms part of the task context. Pop off the IE then set \
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* the global enable bit to match that of the stored IE register. */ \
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pop ACC \
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JB ACC .7, 00 98$ \
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CLR IE .7 \
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LJMP 00 99$ \
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00 98$ : \
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SETB IE .7 \
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00 99$ : \
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/* Finally pop off the ACC, which was the first register saved. */ \
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pop ACC \
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reti \
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_endasm; \
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* the global enable bit to match that of the stored IE register. */\
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pop ACC \
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JB ACC .7, 00 98$ \
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CLR IE .7 \
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LJMP 00 99$ \
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00 98$ : \
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SETB IE .7 \
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00 99$ : \
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/* Finally pop off the ACC, which was the first register saved. */ \
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pop ACC \
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reti \
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_endasm; \
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}
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/*-----------------------------------------------------------*/
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@ -216,11 +217,11 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
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TaskFunction_t pxCode,
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void * pvParameters )
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{
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uint32_t ulAddress;
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uint32_t ulAddress;
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StackType_t * pxStartOfStack;
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/* Leave space to write the size of the stack as the first byte. */
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pxStartOfStack = pxTopOfStack;
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pxStartOfStack = pxTopOfStack;
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pxTopOfStack++;
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/* Place a few bytes of known values on the bottom of the stack.
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@ -237,53 +238,53 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
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* ISR.
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*
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* The return address that would have been pushed by the MCU. */
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ulAddress = ( uint32_t ) pxCode;
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*pxTopOfStack = ( StackType_t ) ulAddress;
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ulAddress >>= 8;
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ulAddress = ( uint32_t ) pxCode;
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*pxTopOfStack = ( StackType_t ) ulAddress;
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ulAddress >>= 8;
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pxTopOfStack++;
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*pxTopOfStack = ( StackType_t ) ( ulAddress );
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*pxTopOfStack = ( StackType_t ) ( ulAddress );
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pxTopOfStack++;
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/* Next all the registers will have been pushed by portSAVE_CONTEXT(). */
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*pxTopOfStack = 0xaa; /* acc */
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*pxTopOfStack = 0xaa; /* acc */
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pxTopOfStack++;
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/* We want tasks to start with interrupts enabled. */
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*pxTopOfStack = portGLOBAL_INTERRUPT_BIT;
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*pxTopOfStack = portGLOBAL_INTERRUPT_BIT;
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pxTopOfStack++;
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/* The function parameters will be passed in the DPTR and B register as
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* a three byte generic pointer is used. */
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ulAddress = ( uint32_t ) pvParameters;
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*pxTopOfStack = ( StackType_t ) ulAddress; /* DPL */
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ulAddress >>= 8;
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ulAddress = ( uint32_t ) pvParameters;
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*pxTopOfStack = ( StackType_t ) ulAddress; /* DPL */
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ulAddress >>= 8;
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*pxTopOfStack++;
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*pxTopOfStack = ( StackType_t ) ulAddress; /* DPH */
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ulAddress >>= 8;
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*pxTopOfStack = ( StackType_t ) ulAddress; /* DPH */
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ulAddress >>= 8;
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pxTopOfStack++;
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*pxTopOfStack = ( StackType_t ) ulAddress; /* b */
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*pxTopOfStack = ( StackType_t ) ulAddress; /* b */
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pxTopOfStack++;
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/* The remaining registers are straight forward. */
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*pxTopOfStack = 0x02; /* R2 */
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*pxTopOfStack = 0x02; /* R2 */
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pxTopOfStack++;
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*pxTopOfStack = 0x03; /* R3 */
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*pxTopOfStack = 0x03; /* R3 */
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pxTopOfStack++;
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*pxTopOfStack = 0x04; /* R4 */
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*pxTopOfStack = 0x04; /* R4 */
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pxTopOfStack++;
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*pxTopOfStack = 0x05; /* R5 */
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*pxTopOfStack = 0x05; /* R5 */
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pxTopOfStack++;
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*pxTopOfStack = 0x06; /* R6 */
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*pxTopOfStack = 0x06; /* R6 */
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pxTopOfStack++;
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*pxTopOfStack = 0x07; /* R7 */
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*pxTopOfStack = 0x07; /* R7 */
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pxTopOfStack++;
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*pxTopOfStack = 0x00; /* R0 */
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*pxTopOfStack = 0x00; /* R0 */
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pxTopOfStack++;
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*pxTopOfStack = 0x01; /* R1 */
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*pxTopOfStack = 0x01; /* R1 */
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pxTopOfStack++;
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*pxTopOfStack = 0x00; /* PSW */
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*pxTopOfStack = 0x00; /* PSW */
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pxTopOfStack++;
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*pxTopOfStack = 0xbb; /* BP */
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*pxTopOfStack = 0xbb; /* BP */
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/* Dont increment the stack size here as we don't want to include
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* the stack size byte as part of the stack size count.
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@ -369,7 +370,7 @@ void vPortYield( void ) _naked
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portCOPY_XRAM_TO_STACK();
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portRESTORE_CONTEXT();
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}
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#else /* if configUSE_PREEMPTION == 1 */
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#else /* if configUSE_PREEMPTION == 1 */
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void vTimer2ISR( void ) interrupt 5
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{
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/* When using the cooperative scheduler the timer 2 ISR is only
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@ -383,40 +384,40 @@ void vPortYield( void ) _naked
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static void prvSetupTimerInterrupt( void )
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{
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uint8_t ucOriginalSFRPage;
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uint8_t ucOriginalSFRPage;
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/* Constants calculated to give the required timer capture values. */
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const uint32_t ulTicksPerSecond = configCPU_CLOCK_HZ / portCLOCK_DIVISOR;
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const uint32_t ulCaptureTime = ulTicksPerSecond / configTICK_RATE_HZ;
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const uint32_t ulCaptureValue = portMAX_TIMER_VALUE - ulCaptureTime;
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const uint8_t ucLowCaptureByte = ( uint8_t ) ( ulCaptureValue & ( uint32_t ) 0xff );
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const uint8_t ucHighCaptureByte = ( uint8_t ) ( ulCaptureValue >> ( uint32_t ) 8 );
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const uint32_t ulTicksPerSecond = configCPU_CLOCK_HZ / portCLOCK_DIVISOR;
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const uint32_t ulCaptureTime = ulTicksPerSecond / configTICK_RATE_HZ;
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const uint32_t ulCaptureValue = portMAX_TIMER_VALUE - ulCaptureTime;
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const uint8_t ucLowCaptureByte = ( uint8_t ) ( ulCaptureValue & ( uint32_t ) 0xff );
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const uint8_t ucHighCaptureByte = ( uint8_t ) ( ulCaptureValue >> ( uint32_t ) 8 );
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/* NOTE: This uses a timer only present on 8052 architecture. */
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/* Remember the current SFR page so we can restore it at the end of the
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* function. */
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ucOriginalSFRPage = SFRPAGE;
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SFRPAGE = 0;
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SFRPAGE = 0;
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/* TMR2CF can be left in its default state. */
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TMR2CF = ( uint8_t ) 0;
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TMR2CF = ( uint8_t ) 0;
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/* Setup the overflow reload value. */
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RCAP2L = ucLowCaptureByte;
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RCAP2H = ucHighCaptureByte;
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RCAP2L = ucLowCaptureByte;
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RCAP2H = ucHighCaptureByte;
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/* The initial load is performed manually. */
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TMR2L = ucLowCaptureByte;
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TMR2H = ucHighCaptureByte;
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TMR2L = ucLowCaptureByte;
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TMR2H = ucHighCaptureByte;
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/* Enable the timer 2 interrupts. */
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IE |= portTIMER_2_INTERRUPT_ENABLE;
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IE |= portTIMER_2_INTERRUPT_ENABLE;
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/* Interrupts are disabled when this is called so the timer can be started
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* here. */
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TMR2CN = portENABLE_TIMER;
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TMR2CN = portENABLE_TIMER;
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/* Restore the original SFR page. */
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SFRPAGE = ucOriginalSFRPage;
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SFRPAGE = ucOriginalSFRPage;
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}
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@ -22,6 +22,7 @@
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* http://www.FreeRTOS.org
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* http://aws.amazon.com/freertos
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*
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* 1 tab == 4 spaces!
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*/
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#ifndef PORTMACRO_H
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@ -74,16 +75,16 @@ typedef unsigned char UBaseType_t;
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push ACC \
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push IE \
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_endasm; \
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EA = 0;
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EA = 0;
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#define portEXIT_CRITICAL() \
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_asm \
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pop ACC \
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_endasm; \
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ACC &= 0x80; \
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IE |= ACC; \
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_asm \
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pop ACC \
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#define portEXIT_CRITICAL() \
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_asm \
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pop ACC \
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_endasm; \
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ACC &= 0x80; \
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IE |= ACC; \
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_asm \
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pop ACC \
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_endasm;
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#define portDISABLE_INTERRUPTS() EA = 0;
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