From 587a83d647619bb0a508661c7bb4d6df89851582 Mon Sep 17 00:00:00 2001 From: Alfred Gedeon Date: Tue, 7 Jul 2020 17:42:07 -0700 Subject: [PATCH] Style: uncrustify kernel files --- croutine.c | 37 +- event_groups.c | 67 +-- include/FreeRTOS.h | 1 + include/StackMacros.h | 7 +- include/atomic.h | 23 +- include/croutine.h | 1 + include/deprecated_definitions.h | 1 + include/event_groups.h | 1 + include/list.h | 7 +- include/message_buffer.h | 1 + include/mpu_prototypes.h | 1 + include/mpu_wrappers.h | 1 + include/portable.h | 1 + include/projdefs.h | 1 + include/queue.h | 1 + include/semphr.h | 1 + include/stack_macros.h | 7 +- include/stream_buffer.h | 1 + include/task.h | 1 + include/timers.h | 1 + list.c | 27 +- portable/ARMv8M/non_secure/port.c | 215 ++++---- .../portable/GCC/ARM_CM23/portasm.c | 1 + .../portable/GCC/ARM_CM23/portmacro.h | 1 + .../portable/GCC/ARM_CM23_NTZ/portasm.c | 1 + .../portable/GCC/ARM_CM23_NTZ/portmacro.h | 1 + .../portable/GCC/ARM_CM33/portasm.c | 1 + .../portable/GCC/ARM_CM33/portmacro.h | 1 + .../portable/GCC/ARM_CM33_NTZ/portasm.c | 1 + .../portable/GCC/ARM_CM33_NTZ/portmacro.h | 1 + .../portable/IAR/ARM_CM23/portmacro.h | 1 + .../portable/IAR/ARM_CM23_NTZ/portmacro.h | 1 + .../portable/IAR/ARM_CM33/portmacro.h | 1 + .../portable/IAR/ARM_CM33_NTZ/portmacro.h | 1 + portable/ARMv8M/non_secure/portasm.h | 1 + .../GCC/ARM_CM23/secure_context_port.c | 1 + .../GCC/ARM_CM33/secure_context_port.c | 1 + .../IAR/ARM_CM23/secure_context_port.c | 1 + .../IAR/ARM_CM33/secure_context_port.c | 1 + .../ARMv8M/secure/context/secure_context.c | 11 +- .../ARMv8M/secure/context/secure_context.h | 1 + portable/ARMv8M/secure/heap/secure_heap.c | 73 +-- portable/ARMv8M/secure/heap/secure_heap.h | 1 + portable/ARMv8M/secure/init/secure_init.c | 1 + portable/ARMv8M/secure/init/secure_init.h | 1 + .../ARMv8M/secure/macros/secure_port_macros.h | 1 + portable/BCC/16BitDOS/Flsh186/port.c | 21 +- portable/BCC/16BitDOS/Flsh186/prtmacro.h | 1 + portable/BCC/16BitDOS/PC/port.c | 23 +- portable/BCC/16BitDOS/PC/prtmacro.h | 1 + portable/BCC/16BitDOS/common/portasm.h | 1 + portable/BCC/16BitDOS/common/portcomn.c | 1 + portable/CCS/ARM_CM3/port.c | 73 +-- portable/CCS/ARM_CM3/portmacro.h | 3 +- portable/CCS/ARM_CM4F/port.c | 75 +-- portable/CCS/ARM_CM4F/portmacro.h | 3 +- portable/CCS/ARM_Cortex-R4/port.c | 25 +- portable/CCS/ARM_Cortex-R4/portmacro.h | 3 +- portable/CCS/MSP430X/data_model.h | 1 + portable/CCS/MSP430X/port.c | 17 +- portable/CCS/MSP430X/portmacro.h | 1 + portable/CodeWarrior/ColdFire_V1/port.c | 19 +- portable/CodeWarrior/ColdFire_V1/portmacro.h | 1 + portable/CodeWarrior/ColdFire_V2/port.c | 3 +- portable/CodeWarrior/ColdFire_V2/portmacro.h | 1 + portable/CodeWarrior/HCS12/port.c | 21 +- portable/CodeWarrior/HCS12/portmacro.h | 9 +- portable/Common/mpu_wrappers.c | 97 ++-- portable/GCC/ARM7_AT91FR40008/port.c | 19 +- portable/GCC/ARM7_AT91FR40008/portISR.c | 5 +- portable/GCC/ARM7_AT91FR40008/portmacro.h | 5 +- portable/GCC/ARM7_AT91SAM7S/AT91SAM7X256.h | 6 +- portable/GCC/ARM7_AT91SAM7S/ioat91sam7x256.h | 470 +++++++++--------- .../GCC/ARM7_AT91SAM7S/lib_AT91SAM7X256.h | 50 +- portable/GCC/ARM7_AT91SAM7S/port.c | 3 +- portable/GCC/ARM7_AT91SAM7S/portISR.c | 3 +- portable/GCC/ARM7_AT91SAM7S/portmacro.h | 5 +- portable/GCC/ARM7_LPC2000/port.c | 17 +- portable/GCC/ARM7_LPC2000/portISR.c | 3 +- portable/GCC/ARM7_LPC2000/portmacro.h | 5 +- portable/GCC/ARM7_LPC23xx/port.c | 19 +- portable/GCC/ARM7_LPC23xx/portISR.c | 5 +- portable/GCC/ARM7_LPC23xx/portmacro.h | 5 +- portable/GCC/ARM_CA53_64_BIT/port.c | 25 +- portable/GCC/ARM_CA53_64_BIT/portmacro.h | 3 +- portable/GCC/ARM_CA9/port.c | 27 +- portable/GCC/ARM_CA9/portmacro.h | 3 +- portable/GCC/ARM_CM0/port.c | 47 +- portable/GCC/ARM_CM0/portmacro.h | 1 + portable/GCC/ARM_CM23/non_secure/port.c | 215 ++++---- portable/GCC/ARM_CM23/non_secure/portasm.c | 1 + portable/GCC/ARM_CM23/non_secure/portasm.h | 1 + portable/GCC/ARM_CM23/non_secure/portmacro.h | 1 + portable/GCC/ARM_CM23/secure/secure_context.c | 11 +- portable/GCC/ARM_CM23/secure/secure_context.h | 1 + .../GCC/ARM_CM23/secure/secure_context_port.c | 1 + portable/GCC/ARM_CM23/secure/secure_heap.c | 73 +-- portable/GCC/ARM_CM23/secure/secure_heap.h | 1 + portable/GCC/ARM_CM23/secure/secure_init.c | 1 + portable/GCC/ARM_CM23/secure/secure_init.h | 1 + .../GCC/ARM_CM23/secure/secure_port_macros.h | 1 + portable/GCC/ARM_CM23_NTZ/non_secure/port.c | 215 ++++---- .../GCC/ARM_CM23_NTZ/non_secure/portasm.c | 1 + .../GCC/ARM_CM23_NTZ/non_secure/portasm.h | 1 + .../GCC/ARM_CM23_NTZ/non_secure/portmacro.h | 1 + portable/GCC/ARM_CM3/port.c | 71 +-- portable/GCC/ARM_CM3/portmacro.h | 5 +- portable/GCC/ARM_CM33/non_secure/port.c | 215 ++++---- portable/GCC/ARM_CM33/non_secure/portasm.c | 1 + portable/GCC/ARM_CM33/non_secure/portasm.h | 1 + portable/GCC/ARM_CM33/non_secure/portmacro.h | 1 + portable/GCC/ARM_CM33/secure/secure_context.c | 11 +- portable/GCC/ARM_CM33/secure/secure_context.h | 1 + .../GCC/ARM_CM33/secure/secure_context_port.c | 1 + portable/GCC/ARM_CM33/secure/secure_heap.c | 73 +-- portable/GCC/ARM_CM33/secure/secure_heap.h | 1 + portable/GCC/ARM_CM33/secure/secure_init.c | 1 + portable/GCC/ARM_CM33/secure/secure_init.h | 1 + .../GCC/ARM_CM33/secure/secure_port_macros.h | 1 + portable/GCC/ARM_CM33_NTZ/non_secure/port.c | 215 ++++---- .../GCC/ARM_CM33_NTZ/non_secure/portasm.c | 1 + .../GCC/ARM_CM33_NTZ/non_secure/portasm.h | 1 + .../GCC/ARM_CM33_NTZ/non_secure/portmacro.h | 1 + portable/GCC/ARM_CM3_MPU/port.c | 91 ++-- portable/GCC/ARM_CM3_MPU/portmacro.h | 7 +- portable/GCC/ARM_CM4F/port.c | 73 +-- portable/GCC/ARM_CM4F/portmacro.h | 5 +- portable/GCC/ARM_CM4_MPU/port.c | 113 ++--- portable/GCC/ARM_CM4_MPU/portmacro.h | 7 +- portable/GCC/ARM_CM7/r0p1/port.c | 73 +-- portable/GCC/ARM_CM7/r0p1/portmacro.h | 5 +- portable/GCC/ARM_CR5/port.c | 25 +- portable/GCC/ARM_CR5/portmacro.h | 3 +- portable/GCC/ARM_CRx_No_GIC/port.c | 7 +- portable/GCC/ARM_CRx_No_GIC/portmacro.h | 3 +- portable/GCC/ATMega323/port.c | 35 +- portable/GCC/ATMega323/portmacro.h | 1 + portable/GCC/AVR32_UC3/port.c | 21 +- portable/GCC/AVR32_UC3/portmacro.h | 15 +- portable/GCC/CORTUS_APS3/port.c | 29 +- portable/GCC/CORTUS_APS3/portmacro.h | 1 + portable/GCC/ColdFire_V2/port.c | 3 +- portable/GCC/ColdFire_V2/portmacro.h | 1 + portable/GCC/H8S2329/port.c | 25 +- portable/GCC/H8S2329/portmacro.h | 1 + portable/GCC/HCS12/port.c | 23 +- portable/GCC/HCS12/portmacro.h | 1 + portable/GCC/IA32_flat/ISR_Support.h | 1 + portable/GCC/IA32_flat/port.c | 57 +-- portable/GCC/IA32_flat/portmacro.h | 1 + portable/GCC/MCF5235/port.c | 8 +- portable/GCC/MSP430F449/port.c | 13 +- portable/GCC/MSP430F449/portmacro.h | 1 + portable/GCC/MicroBlaze/port.c | 21 +- portable/GCC/MicroBlaze/portmacro.h | 1 + portable/GCC/MicroBlazeV8/port.c | 39 +- portable/GCC/MicroBlazeV8/port_exceptions.c | 87 ++-- portable/GCC/MicroBlazeV8/portmacro.h | 5 +- portable/GCC/MicroBlazeV9/port.c | 39 +- portable/GCC/MicroBlazeV9/port_exceptions.c | 87 ++-- portable/GCC/MicroBlazeV9/portmacro.h | 5 +- portable/GCC/NiosII/port.c | 9 +- portable/GCC/NiosII/portmacro.h | 1 + portable/GCC/PPC405_Xilinx/FPU_Macros.h | 1 + portable/GCC/PPC405_Xilinx/port.c | 11 +- portable/GCC/PPC405_Xilinx/portmacro.h | 1 + portable/GCC/PPC440_Xilinx/FPU_Macros.h | 1 + portable/GCC/PPC440_Xilinx/port.c | 11 +- portable/GCC/PPC440_Xilinx/portmacro.h | 1 + ...freertos_risc_v_chip_specific_extensions.h | 1 + ...freertos_risc_v_chip_specific_extensions.h | 1 + portable/GCC/RISC-V/port.c | 37 +- portable/GCC/RISC-V/portmacro.h | 3 +- portable/GCC/RL78/isr_support.h | 1 + portable/GCC/RL78/port.c | 29 +- portable/GCC/RL78/portmacro.h | 1 + portable/GCC/RX100/port.c | 71 +-- portable/GCC/RX100/portmacro.h | 1 + portable/GCC/RX600/port.c | 3 +- portable/GCC/RX600/portmacro.h | 1 + portable/GCC/RX600v2/port.c | 3 +- portable/GCC/RX600v2/portmacro.h | 1 + portable/GCC/STR75x/port.c | 15 +- portable/GCC/STR75x/portISR.c | 1 + portable/GCC/STR75x/portmacro.h | 1 + portable/GCC/TriCore_1782/port.c | 71 +-- portable/GCC/TriCore_1782/portmacro.h | 7 +- portable/GCC/TriCore_1782/porttrap.c | 1 + portable/IAR/78K0R/ISR_Support.h | 29 +- portable/IAR/78K0R/port.c | 35 +- portable/IAR/78K0R/portmacro.h | 1 + portable/IAR/ARM_CA5_No_GIC/port.c | 9 +- portable/IAR/ARM_CA5_No_GIC/portASM.h | 17 +- portable/IAR/ARM_CA5_No_GIC/portmacro.h | 3 +- portable/IAR/ARM_CA9/port.c | 11 +- portable/IAR/ARM_CA9/portASM.h | 15 +- portable/IAR/ARM_CA9/portmacro.h | 3 +- portable/IAR/ARM_CM0/port.c | 47 +- portable/IAR/ARM_CM0/portmacro.h | 1 + portable/IAR/ARM_CM23/non_secure/port.c | 215 ++++---- portable/IAR/ARM_CM23/non_secure/portasm.h | 1 + portable/IAR/ARM_CM23/non_secure/portmacro.h | 1 + portable/IAR/ARM_CM23/secure/secure_context.c | 11 +- portable/IAR/ARM_CM23/secure/secure_context.h | 1 + .../IAR/ARM_CM23/secure/secure_context_port.c | 1 + portable/IAR/ARM_CM23/secure/secure_heap.c | 73 +-- portable/IAR/ARM_CM23/secure/secure_heap.h | 1 + portable/IAR/ARM_CM23/secure/secure_init.c | 1 + portable/IAR/ARM_CM23/secure/secure_init.h | 1 + .../IAR/ARM_CM23/secure/secure_port_macros.h | 1 + portable/IAR/ARM_CM23_NTZ/non_secure/port.c | 215 ++++---- .../IAR/ARM_CM23_NTZ/non_secure/portasm.h | 1 + .../IAR/ARM_CM23_NTZ/non_secure/portmacro.h | 1 + portable/IAR/ARM_CM3/port.c | 71 +-- portable/IAR/ARM_CM3/portmacro.h | 5 +- portable/IAR/ARM_CM33/non_secure/port.c | 215 ++++---- portable/IAR/ARM_CM33/non_secure/portasm.h | 1 + portable/IAR/ARM_CM33/non_secure/portmacro.h | 1 + portable/IAR/ARM_CM33/secure/secure_context.c | 11 +- portable/IAR/ARM_CM33/secure/secure_context.h | 1 + .../IAR/ARM_CM33/secure/secure_context_port.c | 1 + portable/IAR/ARM_CM33/secure/secure_heap.c | 73 +-- portable/IAR/ARM_CM33/secure/secure_heap.h | 1 + portable/IAR/ARM_CM33/secure/secure_init.c | 1 + portable/IAR/ARM_CM33/secure/secure_init.h | 1 + .../IAR/ARM_CM33/secure/secure_port_macros.h | 1 + portable/IAR/ARM_CM33_NTZ/non_secure/port.c | 215 ++++---- .../IAR/ARM_CM33_NTZ/non_secure/portasm.h | 1 + .../IAR/ARM_CM33_NTZ/non_secure/portmacro.h | 1 + portable/IAR/ARM_CM4F/port.c | 73 +-- portable/IAR/ARM_CM4F/portmacro.h | 5 +- portable/IAR/ARM_CM4F_MPU/port.c | 91 ++-- portable/IAR/ARM_CM4F_MPU/portmacro.h | 5 +- portable/IAR/ARM_CM7/r0p1/port.c | 73 +-- portable/IAR/ARM_CM7/r0p1/portmacro.h | 5 +- portable/IAR/ARM_CRx_No_GIC/port.c | 7 +- portable/IAR/ARM_CRx_No_GIC/portmacro.h | 3 +- portable/IAR/ATMega323/port.c | 119 ++--- portable/IAR/ATMega323/portmacro.h | 1 + portable/IAR/AVR32_UC3/port.c | 19 +- portable/IAR/AVR32_UC3/portmacro.h | 15 +- portable/IAR/AtmelSAM7S64/ISR_Support.h | 13 +- portable/IAR/AtmelSAM7S64/lib_AT91SAM7S64.h | 48 +- portable/IAR/AtmelSAM7S64/lib_AT91SAM7X128.h | 50 +- portable/IAR/AtmelSAM7S64/lib_AT91SAM7X256.h | 50 +- portable/IAR/AtmelSAM7S64/port.c | 3 +- portable/IAR/AtmelSAM7S64/portmacro.h | 1 + portable/IAR/AtmelSAM9XE/ISR_Support.h | 12 +- portable/IAR/AtmelSAM9XE/port.c | 1 + portable/IAR/AtmelSAM9XE/portmacro.h | 1 + portable/IAR/LPC2000/ISR_Support.h | 13 +- portable/IAR/LPC2000/port.c | 19 +- portable/IAR/LPC2000/portmacro.h | 1 + portable/IAR/MSP430/port.c | 13 +- portable/IAR/MSP430/portasm.h | 1 + portable/IAR/MSP430/portmacro.h | 1 + portable/IAR/MSP430X/data_model.h | 1 + portable/IAR/MSP430X/port.c | 13 +- portable/IAR/MSP430X/portmacro.h | 1 + ...freertos_risc_v_chip_specific_extensions.h | 1 + portable/IAR/RISC-V/port.c | 37 +- portable/IAR/RISC-V/portmacro.h | 1 + portable/IAR/RL78/ISR_Support.h | 29 +- portable/IAR/RL78/port.c | 37 +- portable/IAR/RL78/portmacro.h | 1 + portable/IAR/RX100/port.c | 69 +-- portable/IAR/RX100/portmacro.h | 1 + portable/IAR/RX600/port.c | 3 +- portable/IAR/RX600/portmacro.h | 1 + portable/IAR/RXv2/port.c | 3 +- portable/IAR/RXv2/portmacro.h | 1 + portable/IAR/STR71x/ISR_Support.h | 13 +- portable/IAR/STR71x/port.c | 1 + portable/IAR/STR71x/portmacro.h | 1 + portable/IAR/STR75x/ISR_Support.h | 13 +- portable/IAR/STR75x/port.c | 15 +- portable/IAR/STR75x/portmacro.h | 1 + portable/IAR/STR91x/ISR_Support.h | 13 +- portable/IAR/STR91x/port.c | 55 +- portable/IAR/STR91x/portmacro.h | 1 + portable/IAR/V850ES/ISR_Support.h | 21 +- portable/IAR/V850ES/port.c | 79 +-- portable/IAR/V850ES/portmacro.h | 1 + portable/MPLAB/PIC18F/port.c | 33 +- portable/MPLAB/PIC18F/portmacro.h | 7 +- portable/MPLAB/PIC24_dsPIC/port.c | 33 +- portable/MPLAB/PIC24_dsPIC/portmacro.h | 1 + portable/MPLAB/PIC32MEC14xx/ISR_Support.h | 1 + portable/MPLAB/PIC32MEC14xx/port.c | 27 +- portable/MPLAB/PIC32MEC14xx/portmacro.h | 21 +- portable/MPLAB/PIC32MX/ISR_Support.h | 1 + portable/MPLAB/PIC32MX/port.c | 31 +- portable/MPLAB/PIC32MX/portmacro.h | 9 +- portable/MPLAB/PIC32MZ/ISR_Support.h | 7 +- portable/MPLAB/PIC32MZ/port.c | 33 +- portable/MPLAB/PIC32MZ/portmacro.h | 9 +- portable/MSVC-MingW/port.c | 63 +-- portable/MSVC-MingW/portmacro.h | 1 + portable/MemMang/heap_1.c | 7 +- portable/MemMang/heap_2.c | 45 +- portable/MemMang/heap_3.c | 1 + portable/MemMang/heap_4.c | 91 ++-- portable/MemMang/heap_5.c | 101 ++-- portable/MikroC/ARM_CM4F/port.c | 75 +-- portable/MikroC/ARM_CM4F/portmacro.h | 3 +- .../Paradigm/Tern_EE/large_untested/port.c | 1 + .../Paradigm/Tern_EE/large_untested/portasm.h | 1 + .../Tern_EE/large_untested/portmacro.h | 1 + portable/Paradigm/Tern_EE/small/port.c | 3 +- portable/Paradigm/Tern_EE/small/portasm.h | 1 + portable/Paradigm/Tern_EE/small/portmacro.h | 1 + portable/RVDS/ARM7_LPC21xx/port.c | 17 +- portable/RVDS/ARM7_LPC21xx/portmacro.h | 1 + portable/RVDS/ARM_CA9/port.c | 9 +- portable/RVDS/ARM_CA9/portmacro.h | 3 +- portable/RVDS/ARM_CM0/port.c | 53 +- portable/RVDS/ARM_CM0/portmacro.h | 1 + portable/RVDS/ARM_CM3/port.c | 75 +-- portable/RVDS/ARM_CM3/portmacro.h | 5 +- portable/RVDS/ARM_CM4F/port.c | 77 +-- portable/RVDS/ARM_CM4F/portmacro.h | 5 +- portable/RVDS/ARM_CM4_MPU/port.c | 161 +++--- portable/RVDS/ARM_CM4_MPU/portmacro.h | 7 +- portable/RVDS/ARM_CM7/r0p1/port.c | 77 +-- portable/RVDS/ARM_CM7/r0p1/portmacro.h | 5 +- portable/Renesas/RX100/port.c | 73 +-- portable/Renesas/RX100/portmacro.h | 1 + portable/Renesas/RX200/port.c | 5 +- portable/Renesas/RX200/portmacro.h | 1 + portable/Renesas/RX600/port.c | 5 +- portable/Renesas/RX600/portmacro.h | 1 + portable/Renesas/RX600v2/port.c | 5 +- portable/Renesas/RX600v2/portmacro.h | 1 + portable/Renesas/SH2A_FPU/port.c | 7 +- portable/Renesas/SH2A_FPU/portmacro.h | 1 + portable/Rowley/MSP430F449/port.c | 13 +- portable/Rowley/MSP430F449/portasm.h | 1 + portable/Rowley/MSP430F449/portmacro.h | 1 + portable/SDCC/Cygnal/port.c | 159 +++--- portable/SDCC/Cygnal/portmacro.h | 19 +- portable/Softune/MB91460/__STD_LIB_sbrk.c | 2 +- portable/Softune/MB91460/port.c | 21 +- portable/Softune/MB91460/portmacro.h | 1 + portable/Softune/MB96340/__STD_LIB_sbrk.c | 2 +- portable/Softune/MB96340/port.c | 1 + portable/Softune/MB96340/portmacro.h | 1 + portable/Tasking/ARM_CM4F/port.c | 9 +- portable/Tasking/ARM_CM4F/portmacro.h | 1 + portable/ThirdParty/CDK/T-HEAD_CK802/port.c | 5 +- .../ThirdParty/CDK/T-HEAD_CK802/portmacro.h | 1 + .../GCC/ARC_EM_HS/arc_freertos_exceptions.c | 1 + .../GCC/ARC_EM_HS/arc_freertos_exceptions.h | 1 + .../ThirdParty/GCC/ARC_EM_HS/freertos_tls.c | 3 +- portable/ThirdParty/GCC/ARC_EM_HS/port.c | 3 +- portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h | 1 + portable/ThirdParty/GCC/ATmega/port.c | 45 +- portable/ThirdParty/GCC/ATmega/portmacro.h | 1 + portable/ThirdParty/GCC/Posix/port.c | 91 ++-- portable/ThirdParty/GCC/Posix/portmacro.h | 1 + .../GCC/Xtensa_ESP32/include/portmacro.h | 8 +- .../GCC/Xtensa_ESP32/include/xtensa_context.h | 6 +- portable/ThirdParty/GCC/Xtensa_ESP32/port.c | 53 +- .../GCC/Xtensa_ESP32/portmux_impl.inc.h | 22 +- .../ThirdParty/GCC/Xtensa_ESP32/xtensa_intr.c | 14 +- portable/ThirdParty/XCC/Xtensa/port.c | 37 +- portable/ThirdParty/XCC/Xtensa/portclib.c | 20 +- portable/ThirdParty/XCC/Xtensa/portmacro.h | 3 +- .../ThirdParty/XCC/Xtensa/xtensa_context.h | 6 +- portable/ThirdParty/XCC/Xtensa/xtensa_init.c | 2 +- portable/ThirdParty/XCC/Xtensa/xtensa_intr.c | 8 +- portable/WizC/PIC18/Drivers/Tick/Tick.c | 31 +- portable/WizC/PIC18/Drivers/Tick/isrTick.c | 1 + portable/WizC/PIC18/addFreeRTOS.h | 1 + portable/WizC/PIC18/port.c | 43 +- portable/WizC/PIC18/portmacro.h | 234 ++++----- portable/oWatcom/16BitDOS/Flsh186/port.c | 21 +- portable/oWatcom/16BitDOS/Flsh186/portmacro.h | 1 + portable/oWatcom/16BitDOS/PC/port.c | 21 +- portable/oWatcom/16BitDOS/PC/portmacro.h | 1 + portable/oWatcom/16BitDOS/common/portasm.h | 1 + portable/oWatcom/16BitDOS/common/portcomn.c | 3 +- queue.c | 125 ++--- stream_buffer.c | 91 ++-- tasks.c | 289 +++++------ timers.c | 89 ++-- 385 files changed, 4714 insertions(+), 4338 deletions(-) diff --git a/croutine.c b/croutine.c index b2784bbd4..61520677a 100644 --- a/croutine.c +++ b/croutine.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #include "FreeRTOS.h" @@ -41,17 +42,17 @@ /* Lists for ready and blocked co-routines. --------------------*/ - static List_t pxReadyCoRoutineLists[ configMAX_CO_ROUTINE_PRIORITIES ]; /*< Prioritised ready co-routines. */ - static List_t xDelayedCoRoutineList1; /*< Delayed co-routines. */ - static List_t xDelayedCoRoutineList2; /*< Delayed co-routines (two lists are used - one for delays that have overflowed the current tick count. */ - static List_t * pxDelayedCoRoutineList = NULL; /*< Points to the delayed co-routine list currently being used. */ - static List_t * pxOverflowDelayedCoRoutineList = NULL; /*< Points to the delayed co-routine list currently being used to hold co-routines that have overflowed the current tick count. */ - static List_t xPendingReadyCoRoutineList; /*< Holds co-routines that have been readied by an external event. They cannot be added directly to the ready lists as the ready lists cannot be accessed by interrupts. */ + static List_t pxReadyCoRoutineLists[ configMAX_CO_ROUTINE_PRIORITIES ]; /*< Prioritised ready co-routines. */ + static List_t xDelayedCoRoutineList1; /*< Delayed co-routines. */ + static List_t xDelayedCoRoutineList2; /*< Delayed co-routines (two lists are used - one for delays that have overflowed the current tick count. */ + static List_t * pxDelayedCoRoutineList = NULL; /*< Points to the delayed co-routine list currently being used. */ + static List_t * pxOverflowDelayedCoRoutineList = NULL; /*< Points to the delayed co-routine list currently being used to hold co-routines that have overflowed the current tick count. */ + static List_t xPendingReadyCoRoutineList; /*< Holds co-routines that have been readied by an external event. They cannot be added directly to the ready lists as the ready lists cannot be accessed by interrupts. */ /* Other file private variables. --------------------------------*/ - CRCB_t * pxCurrentCoRoutine = NULL; + CRCB_t * pxCurrentCoRoutine = NULL; static UBaseType_t uxTopCoRoutineReadyPriority = 0; - static TickType_t xCoRoutineTickCount = 0, xLastTickCount = 0, xPassedTicks = 0; + static TickType_t xCoRoutineTickCount = 0, xLastTickCount = 0, xPassedTicks = 0; /* The initial state of the co-routine when it is created. */ #define corINITIAL_STATE ( 0 ) @@ -103,7 +104,7 @@ UBaseType_t uxIndex ) { BaseType_t xReturn; - CRCB_t * pxCoRoutine; + CRCB_t * pxCoRoutine; /* Allocate the memory that will store the co-routine control block. */ pxCoRoutine = ( CRCB_t * ) pvPortMalloc( sizeof( CRCB_t ) ); @@ -125,9 +126,9 @@ } /* Fill out the co-routine control block from the function parameters. */ - pxCoRoutine->uxState = corINITIAL_STATE; - pxCoRoutine->uxPriority = uxPriority; - pxCoRoutine->uxIndex = uxIndex; + pxCoRoutine->uxState = corINITIAL_STATE; + pxCoRoutine->uxPriority = uxPriority; + pxCoRoutine->uxIndex = uxIndex; pxCoRoutine->pxCoRoutineFunction = pxCoRoutineCode; /* Initialise all the other co-routine control block parameters. */ @@ -147,7 +148,7 @@ * list at the correct priority. */ prvAddCoRoutineToReadyQueue( pxCoRoutine ); - xReturn = pdPASS; + xReturn = pdPASS; } else { @@ -224,7 +225,7 @@ { CRCB_t * pxCRCB; - xPassedTicks = xTaskGetTickCount() - xLastTickCount; + xPassedTicks = xTaskGetTickCount() - xLastTickCount; while( xPassedTicks ) { @@ -238,8 +239,8 @@ /* Tick count has overflowed so we need to swap the delay lists. If there are * any items in pxDelayedCoRoutineList here then there is an error! */ - pxTemp = pxDelayedCoRoutineList; - pxDelayedCoRoutineList = pxOverflowDelayedCoRoutineList; + pxTemp = pxDelayedCoRoutineList; + pxDelayedCoRoutineList = pxOverflowDelayedCoRoutineList; pxOverflowDelayedCoRoutineList = pxTemp; } @@ -329,14 +330,14 @@ /* Start with pxDelayedCoRoutineList using list1 and the * pxOverflowDelayedCoRoutineList using list2. */ - pxDelayedCoRoutineList = &xDelayedCoRoutineList1; + pxDelayedCoRoutineList = &xDelayedCoRoutineList1; pxOverflowDelayedCoRoutineList = &xDelayedCoRoutineList2; } /*-----------------------------------------------------------*/ BaseType_t xCoRoutineRemoveFromEventList( const List_t * pxEventList ) { - CRCB_t * pxUnblockedCRCB; + CRCB_t * pxUnblockedCRCB; BaseType_t xReturn; /* This function is called from within an interrupt. It can only access diff --git a/event_groups.c b/event_groups.c index 55daaa39b..40fc42901 100644 --- a/event_groups.c +++ b/event_groups.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Standard includes. */ @@ -194,10 +195,10 @@ EventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToWaitFor, TickType_t xTicksToWait ) { - EventBits_t uxOriginalBitValue, uxReturn; - EventGroup_t * pxEventBits = xEventGroup; - BaseType_t xAlreadyYielded; - BaseType_t xTimeoutOccurred = pdFALSE; + EventBits_t uxOriginalBitValue, uxReturn; + EventGroup_t * pxEventBits = xEventGroup; + BaseType_t xAlreadyYielded; + BaseType_t xTimeoutOccurred = pdFALSE; configASSERT( ( uxBitsToWaitFor & eventEVENT_BITS_CONTROL_BYTES ) == 0 ); configASSERT( uxBitsToWaitFor != 0 ); @@ -216,13 +217,13 @@ EventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup, if( ( ( uxOriginalBitValue | uxBitsToSet ) & uxBitsToWaitFor ) == uxBitsToWaitFor ) { /* All the rendezvous bits are now set - no need to block. */ - uxReturn = ( uxOriginalBitValue | uxBitsToSet ); + uxReturn = ( uxOriginalBitValue | uxBitsToSet ); /* Rendezvous always clear the bits. They will have been cleared * already unless this is the only task in the rendezvous. */ pxEventBits->uxEventBits &= ~uxBitsToWaitFor; - xTicksToWait = 0; + xTicksToWait = 0; } else { @@ -245,7 +246,7 @@ EventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup, { /* The rendezvous bits were not set, but no block time was * specified - just return the current event bit value. */ - uxReturn = pxEventBits->uxEventBits; + uxReturn = pxEventBits->uxEventBits; xTimeoutOccurred = pdTRUE; } } @@ -267,7 +268,7 @@ EventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup, * point either the required bits were set or the block time expired. If * the required bits were set they will have been stored in the task's * event list item, and they should now be retrieved then cleared. */ - uxReturn = uxTaskResetEventItemValue(); + uxReturn = uxTaskResetEventItemValue(); if( ( uxReturn & eventUNBLOCKED_DUE_TO_BIT_SET ) == ( EventBits_t ) 0 ) { @@ -319,9 +320,9 @@ EventBits_t xEventGroupWaitBits( EventGroupHandle_t xEventGroup, TickType_t xTicksToWait ) { EventGroup_t * pxEventBits = xEventGroup; - EventBits_t uxReturn, uxControlBits = 0; - BaseType_t xWaitConditionMet, xAlreadyYielded; - BaseType_t xTimeoutOccurred = pdFALSE; + EventBits_t uxReturn, uxControlBits = 0; + BaseType_t xWaitConditionMet, xAlreadyYielded; + BaseType_t xTimeoutOccurred = pdFALSE; /* Check the user is not attempting to wait on the bits used by the kernel * itself, and that at least one bit is being requested. */ @@ -345,7 +346,7 @@ EventBits_t xEventGroupWaitBits( EventGroupHandle_t xEventGroup, { /* The wait condition has already been met so there is no need to * block. */ - uxReturn = uxCurrentEventBits; + uxReturn = uxCurrentEventBits; xTicksToWait = ( TickType_t ) 0; /* Clear the wait bits if requested to do so. */ @@ -362,7 +363,7 @@ EventBits_t xEventGroupWaitBits( EventGroupHandle_t xEventGroup, { /* The wait condition has not been met, but no block time was * specified, so just return the current value. */ - uxReturn = uxCurrentEventBits; + uxReturn = uxCurrentEventBits; xTimeoutOccurred = pdTRUE; } else @@ -419,14 +420,14 @@ EventBits_t xEventGroupWaitBits( EventGroupHandle_t xEventGroup, * point either the required bits were set or the block time expired. If * the required bits were set they will have been stored in the task's * event list item, and they should now be retrieved then cleared. */ - uxReturn = uxTaskResetEventItemValue(); + uxReturn = uxTaskResetEventItemValue(); if( ( uxReturn & eventUNBLOCKED_DUE_TO_BIT_SET ) == ( EventBits_t ) 0 ) { taskENTER_CRITICAL(); { /* The task timed out, just return the current event bit value. */ - uxReturn = pxEventBits->uxEventBits; + uxReturn = pxEventBits->uxEventBits; /* It is possible that the event bits were updated between this * task leaving the Blocked state and running again. */ @@ -472,7 +473,7 @@ EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear ) { EventGroup_t * pxEventBits = xEventGroup; - EventBits_t uxReturn; + EventBits_t uxReturn; /* Check the user is not attempting to clear the bits used by the kernel * itself. */ @@ -485,7 +486,7 @@ EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup, /* The value returned is the event group value prior to the bits being * cleared. */ - uxReturn = pxEventBits->uxEventBits; + uxReturn = pxEventBits->uxEventBits; /* Clear the bits. */ pxEventBits->uxEventBits &= ~uxBitsToClear; @@ -514,9 +515,9 @@ EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup, EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup ) { - UBaseType_t uxSavedInterruptStatus; + UBaseType_t uxSavedInterruptStatus; EventGroup_t const * const pxEventBits = xEventGroup; - EventBits_t uxReturn; + EventBits_t uxReturn; uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); { @@ -531,25 +532,25 @@ EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup ) EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet ) { - ListItem_t * pxListItem, * pxNext; + ListItem_t * pxListItem, * pxNext; ListItem_t const * pxListEnd; - List_t const * pxList; - EventBits_t uxBitsToClear = 0, uxBitsWaitedFor, uxControlBits; - EventGroup_t * pxEventBits = xEventGroup; - BaseType_t xMatchFound = pdFALSE; + List_t const * pxList; + EventBits_t uxBitsToClear = 0, uxBitsWaitedFor, uxControlBits; + EventGroup_t * pxEventBits = xEventGroup; + BaseType_t xMatchFound = pdFALSE; /* Check the user is not attempting to set the bits used by the kernel * itself. */ configASSERT( xEventGroup ); configASSERT( ( uxBitsToSet & eventEVENT_BITS_CONTROL_BYTES ) == 0 ); - pxList = &( pxEventBits->xTasksWaitingForBits ); + pxList = &( pxEventBits->xTasksWaitingForBits ); pxListEnd = listGET_END_MARKER( pxList ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */ vTaskSuspendAll(); { traceEVENT_GROUP_SET_BITS( xEventGroup, uxBitsToSet ); - pxListItem = listGET_HEAD_ENTRY( pxList ); + pxListItem = listGET_HEAD_ENTRY( pxList ); /* Set the bits. */ pxEventBits->uxEventBits |= uxBitsToSet; @@ -557,12 +558,12 @@ EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup, /* See if the new bit value should unblock any tasks. */ while( pxListItem != pxListEnd ) { - pxNext = listGET_NEXT( pxListItem ); - uxBitsWaitedFor = listGET_LIST_ITEM_VALUE( pxListItem ); - xMatchFound = pdFALSE; + pxNext = listGET_NEXT( pxListItem ); + uxBitsWaitedFor = listGET_LIST_ITEM_VALUE( pxListItem ); + xMatchFound = pdFALSE; /* Split the bits waited for from the control bits. */ - uxControlBits = uxBitsWaitedFor & eventEVENT_BITS_CONTROL_BYTES; + uxControlBits = uxBitsWaitedFor & eventEVENT_BITS_CONTROL_BYTES; uxBitsWaitedFor &= ~eventEVENT_BITS_CONTROL_BYTES; if( ( uxControlBits & eventWAIT_FOR_ALL_BITS ) == ( EventBits_t ) 0 ) @@ -610,7 +611,7 @@ EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup, /* Move onto the next list item. Note pxListItem->pxNext is not * used here as the list item may have been removed from the event list * and inserted into the ready/pending reading list. */ - pxListItem = pxNext; + pxListItem = pxNext; } /* Clear any bits that matched when the eventCLEAR_EVENTS_ON_EXIT_BIT @@ -625,7 +626,7 @@ EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup, void vEventGroupDelete( EventGroupHandle_t xEventGroup ) { - EventGroup_t * pxEventBits = xEventGroup; + EventGroup_t * pxEventBits = xEventGroup; const List_t * pxTasksWaitingForBits = &( pxEventBits->xTasksWaitingForBits ); vTaskSuspendAll(); @@ -741,7 +742,7 @@ static BaseType_t prvTestWaitCondition( const EventBits_t uxCurrentEventBits, UBaseType_t uxEventGroupGetNumber( void * xEventGroup ) { - UBaseType_t xReturn; + UBaseType_t xReturn; EventGroup_t const * pxEventBits = ( EventGroup_t * ) xEventGroup; /*lint !e9087 !e9079 EventGroupHandle_t is a pointer to an EventGroup_t, but EventGroupHandle_t is kept opaque outside of this file for data hiding purposes. */ if( xEventGroup == NULL ) diff --git a/include/FreeRTOS.h b/include/FreeRTOS.h index a18e09315..852187649 100644 --- a/include/FreeRTOS.h +++ b/include/FreeRTOS.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef INC_FREERTOS_H diff --git a/include/StackMacros.h b/include/StackMacros.h index c799d5bd6..c9a0a0524 100644 --- a/include/StackMacros.h +++ b/include/StackMacros.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef STACK_MACROS_H @@ -82,8 +83,8 @@ #define taskCHECK_FOR_STACK_OVERFLOW() \ { \ - const uint32_t * const pulStack = ( uint32_t * ) pxCurrentTCB->pxStack; \ - const uint32_t ulCheckValue = ( uint32_t ) 0xa5a5a5a5; \ + const uint32_t * const pulStack = ( uint32_t * ) pxCurrentTCB->pxStack; \ + const uint32_t ulCheckValue = ( uint32_t ) 0xa5a5a5a5; \ \ if( ( pulStack[ 0 ] != ulCheckValue ) || \ ( pulStack[ 1 ] != ulCheckValue ) || \ @@ -101,7 +102,7 @@ #define taskCHECK_FOR_STACK_OVERFLOW() \ { \ - int8_t * pcEndOfStack = ( int8_t * ) pxCurrentTCB->pxEndOfStack; \ + int8_t * pcEndOfStack = ( int8_t * ) pxCurrentTCB->pxEndOfStack; \ static const uint8_t ucExpectedStackBytes[] = { tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ diff --git a/include/atomic.h b/include/atomic.h index f66185f67..982bc2a6b 100644 --- a/include/atomic.h +++ b/include/atomic.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /** @@ -114,7 +115,7 @@ if( *pulDestination == ulComparand ) { *pulDestination = ulExchange; - ulReturnValue = ATOMIC_COMPARE_AND_SWAP_SUCCESS; + ulReturnValue = ATOMIC_COMPARE_AND_SWAP_SUCCESS; } else { @@ -146,7 +147,7 @@ ATOMIC_ENTER_CRITICAL(); { - pReturnValue = *ppvDestination; + pReturnValue = *ppvDestination; *ppvDestination = pvExchange; } ATOMIC_EXIT_CRITICAL(); @@ -182,7 +183,7 @@ if( *ppvDestination == pvComparand ) { *ppvDestination = pvExchange; - ulReturnValue = ATOMIC_COMPARE_AND_SWAP_SUCCESS; + ulReturnValue = ATOMIC_COMPARE_AND_SWAP_SUCCESS; } } ATOMIC_EXIT_CRITICAL(); @@ -211,7 +212,7 @@ ATOMIC_ENTER_CRITICAL(); { - ulCurrent = *pulAddend; + ulCurrent = *pulAddend; *pulAddend += ulCount; } ATOMIC_EXIT_CRITICAL(); @@ -239,7 +240,7 @@ ATOMIC_ENTER_CRITICAL(); { - ulCurrent = *pulAddend; + ulCurrent = *pulAddend; *pulAddend -= ulCount; } ATOMIC_EXIT_CRITICAL(); @@ -264,7 +265,7 @@ ATOMIC_ENTER_CRITICAL(); { - ulCurrent = *pulAddend; + ulCurrent = *pulAddend; *pulAddend += 1; } ATOMIC_EXIT_CRITICAL(); @@ -289,7 +290,7 @@ ATOMIC_ENTER_CRITICAL(); { - ulCurrent = *pulAddend; + ulCurrent = *pulAddend; *pulAddend -= 1; } ATOMIC_EXIT_CRITICAL(); @@ -317,7 +318,7 @@ ATOMIC_ENTER_CRITICAL(); { - ulCurrent = *pulDestination; + ulCurrent = *pulDestination; *pulDestination |= ulValue; } ATOMIC_EXIT_CRITICAL(); @@ -344,7 +345,7 @@ ATOMIC_ENTER_CRITICAL(); { - ulCurrent = *pulDestination; + ulCurrent = *pulDestination; *pulDestination &= ulValue; } ATOMIC_EXIT_CRITICAL(); @@ -371,7 +372,7 @@ ATOMIC_ENTER_CRITICAL(); { - ulCurrent = *pulDestination; + ulCurrent = *pulDestination; *pulDestination = ~( ulCurrent & ulValue ); } ATOMIC_EXIT_CRITICAL(); @@ -398,7 +399,7 @@ ATOMIC_ENTER_CRITICAL(); { - ulCurrent = *pulDestination; + ulCurrent = *pulDestination; *pulDestination ^= ulValue; } ATOMIC_EXIT_CRITICAL(); diff --git a/include/croutine.h b/include/croutine.h index 76c805bf0..83f0d98e9 100644 --- a/include/croutine.h +++ b/include/croutine.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef CO_ROUTINE_H diff --git a/include/deprecated_definitions.h b/include/deprecated_definitions.h index 456f6fd7c..aa2c6cc5b 100644 --- a/include/deprecated_definitions.h +++ b/include/deprecated_definitions.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef DEPRECATED_DEFINITIONS_H diff --git a/include/event_groups.h b/include/event_groups.h index 606b771ac..c9ab819fd 100644 --- a/include/event_groups.h +++ b/include/event_groups.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef EVENT_GROUPS_H diff --git a/include/list.h b/include/list.h index 0d0db52c8..9a23a8222 100644 --- a/include/list.h +++ b/include/list.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* @@ -122,8 +123,8 @@ /* Define macros that set the new structure members to known values. */ #define listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) ( pxItem )->xListItemIntegrityValue1 = pdINTEGRITY_CHECK_VALUE #define listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) ( pxItem )->xListItemIntegrityValue2 = pdINTEGRITY_CHECK_VALUE - #define listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList ) ( pxList )->xListIntegrityValue1 = pdINTEGRITY_CHECK_VALUE - #define listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList ) ( pxList )->xListIntegrityValue2 = pdINTEGRITY_CHECK_VALUE + #define listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList ) ( pxList )->xListIntegrityValue1 = pdINTEGRITY_CHECK_VALUE + #define listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList ) ( pxList )->xListIntegrityValue2 = pdINTEGRITY_CHECK_VALUE /* Define macros that will assert if one of the structure members does not * contain its expected value. */ @@ -283,7 +284,7 @@ { \ ( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext; \ } \ - ( pxTCB ) = ( pxConstList )->pxIndex->pvOwner; \ + ( pxTCB ) = ( pxConstList )->pxIndex->pvOwner; \ } diff --git a/include/message_buffer.h b/include/message_buffer.h index 53a1d714c..71dc691a0 100644 --- a/include/message_buffer.h +++ b/include/message_buffer.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ diff --git a/include/mpu_prototypes.h b/include/mpu_prototypes.h index 5f64fa8be..476850a1c 100644 --- a/include/mpu_prototypes.h +++ b/include/mpu_prototypes.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* diff --git a/include/mpu_wrappers.h b/include/mpu_wrappers.h index ca2ebe6a6..89e47aa16 100644 --- a/include/mpu_wrappers.h +++ b/include/mpu_wrappers.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef MPU_WRAPPERS_H diff --git a/include/portable.h b/include/portable.h index 4c1b5de20..4996424e6 100644 --- a/include/portable.h +++ b/include/portable.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- diff --git a/include/projdefs.h b/include/projdefs.h index 0abd64fb8..d421633c8 100644 --- a/include/projdefs.h +++ b/include/projdefs.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PROJDEFS_H diff --git a/include/queue.h b/include/queue.h index cb2d656f2..fd0e8ed90 100644 --- a/include/queue.h +++ b/include/queue.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ diff --git a/include/semphr.h b/include/semphr.h index 1b3d0dde4..21f3aff59 100644 --- a/include/semphr.h +++ b/include/semphr.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef SEMAPHORE_H diff --git a/include/stack_macros.h b/include/stack_macros.h index c2436365e..617e4d68f 100644 --- a/include/stack_macros.h +++ b/include/stack_macros.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef STACK_MACROS_H @@ -78,8 +79,8 @@ #define taskCHECK_FOR_STACK_OVERFLOW() \ { \ - const uint32_t * const pulStack = ( uint32_t * ) pxCurrentTCB->pxStack; \ - const uint32_t ulCheckValue = ( uint32_t ) 0xa5a5a5a5; \ + const uint32_t * const pulStack = ( uint32_t * ) pxCurrentTCB->pxStack; \ + const uint32_t ulCheckValue = ( uint32_t ) 0xa5a5a5a5; \ \ if( ( pulStack[ 0 ] != ulCheckValue ) || \ ( pulStack[ 1 ] != ulCheckValue ) || \ @@ -97,7 +98,7 @@ #define taskCHECK_FOR_STACK_OVERFLOW() \ { \ - int8_t * pcEndOfStack = ( int8_t * ) pxCurrentTCB->pxEndOfStack; \ + int8_t * pcEndOfStack = ( int8_t * ) pxCurrentTCB->pxEndOfStack; \ static const uint8_t ucExpectedStackBytes[] = { tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ diff --git a/include/stream_buffer.h b/include/stream_buffer.h index 8f2f97d8a..37b961ebf 100644 --- a/include/stream_buffer.h +++ b/include/stream_buffer.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* diff --git a/include/task.h b/include/task.h index e80bbb5ea..c3d290bfe 100644 --- a/include/task.h +++ b/include/task.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ diff --git a/include/timers.h b/include/timers.h index 26445d42a..9bdc5e21c 100644 --- a/include/timers.h +++ b/include/timers.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ diff --git a/list.c b/list.c index 6b9197cf9..2c873c93e 100644 --- a/list.c +++ b/list.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ @@ -38,7 +39,7 @@ void vListInitialise( List_t * const pxList ) /* The list structure contains a list item which is used to mark the * end of the list. To initialise the list the list end is inserted * as the only list entry. */ - pxList->pxIndex = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */ + pxList->pxIndex = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */ /* The list end value is the highest possible value in the list to * ensure it remains at the end of the list. */ @@ -46,10 +47,10 @@ void vListInitialise( List_t * const pxList ) /* The list end next and previous pointers point to itself so we know * when the list is empty. */ - pxList->xListEnd.pxNext = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */ + pxList->xListEnd.pxNext = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */ pxList->xListEnd.pxPrevious = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */ - pxList->uxNumberOfItems = ( UBaseType_t ) 0U; + pxList->uxNumberOfItems = ( UBaseType_t ) 0U; /* Write known values into the list if * configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ @@ -84,17 +85,17 @@ void vListInsertEnd( List_t * const pxList, /* Insert a new list item into pxList, but rather than sort the list, * makes the new list item the last item to be removed by a call to * listGET_OWNER_OF_NEXT_ENTRY(). */ - pxNewListItem->pxNext = pxIndex; - pxNewListItem->pxPrevious = pxIndex->pxPrevious; + pxNewListItem->pxNext = pxIndex; + pxNewListItem->pxPrevious = pxIndex->pxPrevious; /* Only used during decision coverage testing. */ mtCOVERAGE_TEST_DELAY(); pxIndex->pxPrevious->pxNext = pxNewListItem; - pxIndex->pxPrevious = pxNewListItem; + pxIndex->pxPrevious = pxNewListItem; /* Remember which list the item is in. */ - pxNewListItem->pxContainer = pxList; + pxNewListItem->pxContainer = pxList; ( pxList->uxNumberOfItems )++; } @@ -103,7 +104,7 @@ void vListInsertEnd( List_t * const pxList, void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem ) { - ListItem_t * pxIterator; + ListItem_t * pxIterator; const TickType_t xValueOfInsertion = pxNewListItem->xItemValue; /* Only effective when configASSERT() is also defined, these tests may catch @@ -155,14 +156,14 @@ void vListInsert( List_t * const pxList, } } - pxNewListItem->pxNext = pxIterator->pxNext; + pxNewListItem->pxNext = pxIterator->pxNext; pxNewListItem->pxNext->pxPrevious = pxNewListItem; - pxNewListItem->pxPrevious = pxIterator; - pxIterator->pxNext = pxNewListItem; + pxNewListItem->pxPrevious = pxIterator; + pxIterator->pxNext = pxNewListItem; /* Remember which list the item is in. This allows fast removal of the * item later. */ - pxNewListItem->pxContainer = pxList; + pxNewListItem->pxContainer = pxList; ( pxList->uxNumberOfItems )++; } @@ -190,7 +191,7 @@ UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove ) mtCOVERAGE_TEST_MARKER(); } - pxItemToRemove->pxContainer = NULL; + pxItemToRemove->pxContainer = NULL; ( pxList->uxNumberOfItems )--; return pxList->uxNumberOfItems; diff --git a/portable/ARMv8M/non_secure/port.c b/portable/ARMv8M/non_secure/port.c index 37f5d4812..3e42faba0 100644 --- a/portable/ARMv8M/non_secure/port.c +++ b/portable/ARMv8M/non_secure/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining @@ -349,7 +350,7 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV * @brief Each task maintains its own interrupt status in the critical nesting * variable. */ -static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL; +static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL; #if ( configENABLE_TRUSTZONE == 1 ) @@ -365,26 +366,26 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU /** * @brief The number of SysTick increments that make up one tick period. */ - static uint32_t ulTimerCountsForOneTick = 0; + static uint32_t ulTimerCountsForOneTick = 0; /** * @brief The maximum number of tick periods that can be suppressed is * limited by the 24 bit resolution of the SysTick timer. */ - static uint32_t xMaximumPossibleSuppressedTicks = 0; + static uint32_t xMaximumPossibleSuppressedTicks = 0; /** * @brief Compensate for the CPU cycles that pass while the SysTick is * stopped (low power functionality only). */ - static uint32_t ulStoppedTimerCompensation = 0; + static uint32_t ulStoppedTimerCompensation = 0; #endif /* configUSE_TICKLESS_IDLE */ /*-----------------------------------------------------------*/ #if ( configUSE_TICKLESS_IDLE == 1 ) __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ) { - uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; + uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; TickType_t xModifiableIdleTime; /* Make sure the SysTick reload value does not overflow the counter. */ @@ -402,7 +403,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU /* Calculate the reload value required to wait xExpectedIdleTime * tick periods. -1 is used because this code will execute part way * through one of the tick periods. */ - ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); + ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); if( ulReloadValue > ulStoppedTimerCompensation ) { @@ -421,14 +422,14 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU { /* Restart from whatever is left in the count register to complete * this tick period. */ - portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; + portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; /* Restart SysTick. */ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Reset the reload register to the value required for normal tick * periods. */ - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Re-enable interrupts - see comments above the cpsid instruction() * above. */ @@ -437,14 +438,14 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU else { /* Set the new reload value. */ - portNVIC_SYSTICK_LOAD_REG = ulReloadValue; + portNVIC_SYSTICK_LOAD_REG = ulReloadValue; /* Clear the SysTick count flag and set the count value back to * zero. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Restart SysTick. */ - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can * set its parameter to 0 to indicate that its implementation @@ -452,7 +453,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU * instruction, and so wfi should not be executed again. However, * the original expected idle time variable must remain unmodified, * so a copy is taken. */ - xModifiableIdleTime = xExpectedIdleTime; + xModifiableIdleTime = xExpectedIdleTime; configPRE_SLEEP_PROCESSING( xModifiableIdleTime ); if( xModifiableIdleTime > 0 ) @@ -486,7 +487,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU * best it can be, but using the tickless mode will inevitably * result in some tiny drift of the time maintained by the kernel * with respect to calendar time*/ - portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); /* Determine if the SysTick clock has already counted to zero and * been set back to the current reload value (the reload back being @@ -501,7 +502,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU * reloaded with ulReloadValue. Reset the * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick * period. */ - ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); + ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); /* Don't allow a tiny value, or values that have somehow * underflowed because the post sleep hook did something @@ -516,7 +517,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU /* As the pending tick will be processed as soon as this * function exits, the tick value maintained by the tick is * stepped forward by one less than the time spent waiting. */ - ulCompleteTickPeriods = xExpectedIdleTime - 1UL; + ulCompleteTickPeriods = xExpectedIdleTime - 1UL; } else { @@ -528,20 +529,20 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU /* How many complete tick periods passed while the processor * was waiting? */ - ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; + ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; /* The reload value is set to whatever fraction of a single tick * period remains. */ - portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; + portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; } /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard * value. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; vTaskStepTick( ulCompleteTickPeriods ); - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Exit with interrupts enabled. */ __asm volatile ( "cpsie i" ::: "memory" ); @@ -555,19 +556,19 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FU /* Calculate the constants required to configure the tick interrupt. */ #if ( configUSE_TICKLESS_IDLE == 1 ) { - ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); + ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick; - ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); + ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); } #endif /* configUSE_TICKLESS_IDLE */ /* Stop and reset the SysTick. */ - portNVIC_SYSTICK_CTRL_REG = 0UL; + portNVIC_SYSTICK_CTRL_REG = 0UL; portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Configure SysTick to interrupt at the requested rate. */ - portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; - portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; + portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT; } /*-----------------------------------------------------------*/ @@ -611,72 +612,72 @@ static void prvTaskExitError( void ) extern uint32_t * __unprivileged_flash_end__; extern uint32_t * __privileged_sram_start__; extern uint32_t * __privileged_sram_end__; - #else /* if defined( __ARMCC_VERSION ) */ + #else /* if defined( __ARMCC_VERSION ) */ /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __privileged_functions_start__[]; - extern uint32_t __privileged_functions_end__[]; - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - extern uint32_t __unprivileged_flash_start__[]; - extern uint32_t __unprivileged_flash_end__[]; - extern uint32_t __privileged_sram_start__[]; - extern uint32_t __privileged_sram_end__[]; + extern uint32_t __privileged_functions_start__[]; + extern uint32_t __privileged_functions_end__[]; + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; + extern uint32_t __unprivileged_flash_start__[]; + extern uint32_t __unprivileged_flash_end__[]; + extern uint32_t __privileged_sram_start__[]; + extern uint32_t __privileged_sram_end__[]; #endif /* defined( __ARMCC_VERSION ) */ /* Check that the MPU is present. */ if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE ) { /* MAIR0 - Index 0. */ - portMPU_MAIR0_REG |= ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK ); + portMPU_MAIR0_REG |= ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK ); /* MAIR0 - Index 1. */ - portMPU_MAIR0_REG |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK ); + portMPU_MAIR0_REG |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK ); /* Setup privileged flash as Read Only so that privileged tasks can * read it but not modify. */ - portMPU_RNR_REG = portPRIVILEGED_FLASH_REGION; - portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | - ( portMPU_REGION_NON_SHAREABLE ) | - ( portMPU_REGION_PRIVILEGED_READ_ONLY ); - portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_functions_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | - ( portMPU_RLAR_ATTR_INDEX0 ) | - ( portMPU_RLAR_REGION_ENABLE ); + portMPU_RNR_REG = portPRIVILEGED_FLASH_REGION; + portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | + ( portMPU_REGION_NON_SHAREABLE ) | + ( portMPU_REGION_PRIVILEGED_READ_ONLY ); + portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_functions_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | + ( portMPU_RLAR_ATTR_INDEX0 ) | + ( portMPU_RLAR_REGION_ENABLE ); /* Setup unprivileged flash as Read Only by both privileged and * unprivileged tasks. All tasks can read it but no-one can modify. */ - portMPU_RNR_REG = portUNPRIVILEGED_FLASH_REGION; - portMPU_RBAR_REG = ( ( ( uint32_t ) __unprivileged_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | - ( portMPU_REGION_NON_SHAREABLE ) | - ( portMPU_REGION_READ_ONLY ); - portMPU_RLAR_REG = ( ( ( uint32_t ) __unprivileged_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | - ( portMPU_RLAR_ATTR_INDEX0 ) | - ( portMPU_RLAR_REGION_ENABLE ); + portMPU_RNR_REG = portUNPRIVILEGED_FLASH_REGION; + portMPU_RBAR_REG = ( ( ( uint32_t ) __unprivileged_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | + ( portMPU_REGION_NON_SHAREABLE ) | + ( portMPU_REGION_READ_ONLY ); + portMPU_RLAR_REG = ( ( ( uint32_t ) __unprivileged_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | + ( portMPU_RLAR_ATTR_INDEX0 ) | + ( portMPU_RLAR_REGION_ENABLE ); /* Setup unprivileged syscalls flash as Read Only by both privileged * and unprivileged tasks. All tasks can read it but no-one can modify. */ - portMPU_RNR_REG = portUNPRIVILEGED_SYSCALLS_REGION; - portMPU_RBAR_REG = ( ( ( uint32_t ) __syscalls_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | - ( portMPU_REGION_NON_SHAREABLE ) | - ( portMPU_REGION_READ_ONLY ); - portMPU_RLAR_REG = ( ( ( uint32_t ) __syscalls_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | - ( portMPU_RLAR_ATTR_INDEX0 ) | - ( portMPU_RLAR_REGION_ENABLE ); + portMPU_RNR_REG = portUNPRIVILEGED_SYSCALLS_REGION; + portMPU_RBAR_REG = ( ( ( uint32_t ) __syscalls_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | + ( portMPU_REGION_NON_SHAREABLE ) | + ( portMPU_REGION_READ_ONLY ); + portMPU_RLAR_REG = ( ( ( uint32_t ) __syscalls_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | + ( portMPU_RLAR_ATTR_INDEX0 ) | + ( portMPU_RLAR_REGION_ENABLE ); /* Setup RAM containing kernel data for privileged access only. */ - portMPU_RNR_REG = portPRIVILEGED_RAM_REGION; - portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_sram_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | - ( portMPU_REGION_NON_SHAREABLE ) | - ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | - ( portMPU_REGION_EXECUTE_NEVER ); - portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_sram_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | - ( portMPU_RLAR_ATTR_INDEX0 ) | - ( portMPU_RLAR_REGION_ENABLE ); + portMPU_RNR_REG = portPRIVILEGED_RAM_REGION; + portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_sram_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | + ( portMPU_REGION_NON_SHAREABLE ) | + ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | + ( portMPU_REGION_EXECUTE_NEVER ); + portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_sram_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | + ( portMPU_RLAR_ATTR_INDEX0 ) | + ( portMPU_RLAR_REGION_ENABLE ); /* Enable mem fault. */ portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT; /* Enable MPU with privileged background access i.e. unmapped * regions have privileged access. */ - portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT ); + portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT ); } } #endif /* configENABLE_MPU */ @@ -771,24 +772,24 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO extern uint32_t * __syscalls_flash_end__; #else /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; #endif /* defined( __ARMCC_VERSION ) */ #endif /* configENABLE_MPU */ - uint32_t ulPC; + uint32_t ulPC; #if ( configENABLE_TRUSTZONE == 1 ) - uint32_t ulR0; + uint32_t ulR0; #if ( configENABLE_MPU == 1 ) - uint32_t ulControl, ulIsTaskPrivileged; + uint32_t ulControl, ulIsTaskPrivileged; #endif /* configENABLE_MPU */ #endif /* configENABLE_TRUSTZONE */ uint8_t ucSVCNumber; /* Register are stored on the stack in the following order - R0, R1, R2, R3, * R12, LR, PC, xPSR. */ - ulPC = pulCallerStackAddress[ 6 ]; + ulPC = pulCallerStackAddress[ 6 ]; ucSVCNumber = ( ( uint8_t * ) ulPC )[ -2 ]; switch( ucSVCNumber ) @@ -801,22 +802,22 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO ulR0 = pulCallerStackAddress[ 0 ]; #if ( configENABLE_MPU == 1 ) - { - /* Read the CONTROL register value. */ - __asm volatile ( "mrs %0, control" : "=r" ( ulControl ) ); + { + /* Read the CONTROL register value. */ + __asm volatile ( "mrs %0, control" : "=r" ( ulControl ) ); - /* The task that raised the SVC is privileged if Bit[0] - * in the CONTROL register is 0. */ - ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 ); + /* The task that raised the SVC is privileged if Bit[0] + * in the CONTROL register is 0. */ + ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 ); - /* Allocate and load a context for the secure task. */ - xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged ); - } - #else /* if ( configENABLE_MPU == 1 ) */ - { - /* Allocate and load a context for the secure task. */ - xSecureContext = SecureContext_AllocateContext( ulR0 ); - } + /* Allocate and load a context for the secure task. */ + xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged ); + } + #else /* if ( configENABLE_MPU == 1 ) */ + { + /* Allocate and load a context for the secure task. */ + xSecureContext = SecureContext_AllocateContext( ulR0 ); + } #endif /* configENABLE_MPU */ configASSERT( xSecureContext != NULL ); @@ -834,21 +835,21 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO case portSVC_START_SCHEDULER: #if ( configENABLE_TRUSTZONE == 1 ) - { - /* De-prioritize the non-secure exceptions so that the - * non-secure pendSV runs at the lowest priority. */ - SecureInit_DePrioritizeNSExceptions(); + { + /* De-prioritize the non-secure exceptions so that the + * non-secure pendSV runs at the lowest priority. */ + SecureInit_DePrioritizeNSExceptions(); - /* Initialize the secure context management system. */ - SecureContext_Init(); - } + /* Initialize the secure context management system. */ + SecureContext_Init(); + } #endif /* configENABLE_TRUSTZONE */ #if ( configENABLE_FPU == 1 ) - { - /* Setup the Floating Point Unit (FPU). */ - prvSetupFPU(); - } + { + /* Setup the Floating Point Unit (FPU). */ + prvSetupFPU(); + } #endif /* configENABLE_FPU */ /* Setup the context of the first task so that the first task starts @@ -881,12 +882,12 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO StackType_t * pxEndOfStack, TaskFunction_t pxCode, void * pvParameters, - BaseType_t xRunPrivileged ) /* PRIVILEGED_FUNCTION */ + BaseType_t xRunPrivileged ) /* PRIVILEGED_FUNCTION */ #else StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, StackType_t * pxEndOfStack, TaskFunction_t pxCode, - void * pvParameters ) /* PRIVILEGED_FUNCTION */ + void * pvParameters ) /* PRIVILEGED_FUNCTION */ #endif /* configENABLE_MPU */ { /* Simulate the stack frame as it would be created by a context switch @@ -1015,7 +1016,7 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */ vPortSetupTimerInterrupt(); /* Initialize the critical nesting count ready for the first task. */ - ulCriticalNesting = 0; + ulCriticalNesting = 0; /* Start the first task. */ vStartFirstTask(); @@ -1049,10 +1050,10 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ uint32_t ulStackDepth ) { uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber; - int32_t lIndex = 0; + int32_t lIndex = 0; /* Setup MAIR0. */ - xMPUSettings->ulMAIR0 = ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK ); + xMPUSettings->ulMAIR0 = ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK ); xMPUSettings->ulMAIR0 |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK ); /* This function is called automatically when the task is created - in @@ -1062,9 +1063,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ if( ulStackDepth > 0 ) { /* Define the region that allows access to the stack. */ - ulRegionStartAddress = ( ( uint32_t ) pxBottomOfStack ) & portMPU_RBAR_ADDRESS_MASK; - ulRegionEndAddress = ( uint32_t ) pxBottomOfStack + ( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) - 1; - ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; + ulRegionStartAddress = ( ( uint32_t ) pxBottomOfStack ) & portMPU_RBAR_ADDRESS_MASK; + ulRegionEndAddress = ( uint32_t ) pxBottomOfStack + ( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) - 1; + ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = ( ulRegionStartAddress ) | ( portMPU_REGION_NON_SHAREABLE ) | @@ -1087,9 +1088,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ /* Translate the generic region definition contained in xRegions * into the ARMv8 specific MPU settings that are then stored in * xMPUSettings. */ - ulRegionStartAddress = ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) & portMPU_RBAR_ADDRESS_MASK; - ulRegionEndAddress = ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1; - ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; + ulRegionStartAddress = ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) & portMPU_RBAR_ADDRESS_MASK; + ulRegionEndAddress = ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1; + ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; /* Start address. */ xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR = ( ulRegionStartAddress ) | @@ -1142,7 +1143,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ BaseType_t xPortIsInsideInterrupt( void ) { - uint32_t ulCurrentInterrupt; + uint32_t ulCurrentInterrupt; BaseType_t xReturn; /* Obtain the number of the currently executing interrupt. Interrupt Program diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c index 94e24169d..d9eb31935 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Standard includes. */ diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h index 060f91a66..747cdc766 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c index e683d1a9a..cf57e6e91 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Standard includes. */ diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h index 060f91a66..747cdc766 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c index 2759f4d7e..0c8cb0f0c 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Standard includes. */ diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h index 7ffbea17d..bb4d2495d 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c index 1a397bc1d..132fa4509 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Standard includes. */ diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h index 7ffbea17d..bb4d2495d 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h index 52cb22320..48e23e950 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h index a21737908..29697ba00 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h index 1c815550a..24f1e1455 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h index 1c815550a..24f1e1455 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/ARMv8M/non_secure/portasm.h b/portable/ARMv8M/non_secure/portasm.h index edb5bcfca..fdba1b177 100644 --- a/portable/ARMv8M/non_secure/portasm.h +++ b/portable/ARMv8M/non_secure/portasm.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef __PORT_ASM_H__ diff --git a/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c b/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c index d5be0026d..d7ef92b12 100644 --- a/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c +++ b/portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Secure context includes. */ diff --git a/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c b/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c index ea094ebf5..0187463ad 100644 --- a/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c +++ b/portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Secure context includes. */ diff --git a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port.c b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port.c index 24e3fef66..e2fb5ce74 100644 --- a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port.c +++ b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Secure context includes. */ diff --git a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port.c b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port.c index 24e3fef66..e2fb5ce74 100644 --- a/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port.c +++ b/portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Secure context includes. */ diff --git a/portable/ARMv8M/secure/context/secure_context.c b/portable/ARMv8M/secure/context/secure_context.c index 04f1e5622..5608c7240 100644 --- a/portable/ARMv8M/secure/context/secure_context.c +++ b/portable/ARMv8M/secure/context/secure_context.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Secure context includes. */ @@ -101,12 +102,12 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize ) #endif /* configENABLE_MPU */ { - uint8_t * pucStackMemory = NULL; - uint32_t ulIPSR; - SecureContextHandle_t xSecureContextHandle = NULL; + uint8_t * pucStackMemory = NULL; + uint32_t ulIPSR; + SecureContextHandle_t xSecureContextHandle = NULL; #if ( configENABLE_MPU == 1 ) - uint32_t * pulCurrentStackPointer = NULL; + uint32_t * pulCurrentStackPointer = NULL; #endif /* configENABLE_MPU */ /* Read the Interrupt Program Status Register (IPSR) value. */ @@ -143,7 +144,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) /* Store the correct CONTROL value for the task on the stack. * This value is programmed in the CONTROL register on * context switch. */ - pulCurrentStackPointer = ( uint32_t * ) xSecureContextHandle->pucStackStart; + pulCurrentStackPointer = ( uint32_t * ) xSecureContextHandle->pucStackStart; pulCurrentStackPointer--; if( ulIsTaskPrivileged ) diff --git a/portable/ARMv8M/secure/context/secure_context.h b/portable/ARMv8M/secure/context/secure_context.h index a5d2f2967..62ef6bb94 100644 --- a/portable/ARMv8M/secure/context/secure_context.h +++ b/portable/ARMv8M/secure/context/secure_context.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef __SECURE_CONTEXT_H__ diff --git a/portable/ARMv8M/secure/heap/secure_heap.c b/portable/ARMv8M/secure/heap/secure_heap.c index b71f06da9..76b6ee1c3 100644 --- a/portable/ARMv8M/secure/heap/secure_heap.c +++ b/portable/ARMv8M/secure/heap/secure_heap.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Standard includes. */ @@ -115,7 +116,7 @@ static BlockLink_t xStart, * pxEnd = NULL; * @brief Keeps track of the number of free bytes remaining, but says nothing * about fragmentation. */ -static size_t xFreeBytesRemaining = 0U; +static size_t xFreeBytesRemaining = 0U; static size_t xMinimumEverFreeBytesRemaining = 0U; /** @@ -125,61 +126,61 @@ static size_t xMinimumEverFreeBytesRemaining = 0U; * then the block belongs to the application. When the bit is free the block is * still part of the free heap space. */ -static size_t xBlockAllocatedBit = 0; +static size_t xBlockAllocatedBit = 0; /*-----------------------------------------------------------*/ static void prvHeapInit( void ) { BlockLink_t * pxFirstFreeBlock; - uint8_t * pucAlignedHeap; - size_t uxAddress; - size_t xTotalHeapSize = secureconfigTOTAL_HEAP_SIZE; + uint8_t * pucAlignedHeap; + size_t uxAddress; + size_t xTotalHeapSize = secureconfigTOTAL_HEAP_SIZE; /* Ensure the heap starts on a correctly aligned boundary. */ - uxAddress = ( size_t ) ucHeap; + uxAddress = ( size_t ) ucHeap; if( ( uxAddress & secureportBYTE_ALIGNMENT_MASK ) != 0 ) { - uxAddress += ( secureportBYTE_ALIGNMENT - 1 ); - uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK ); + uxAddress += ( secureportBYTE_ALIGNMENT - 1 ); + uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK ); xTotalHeapSize -= uxAddress - ( size_t ) ucHeap; } - pucAlignedHeap = ( uint8_t * ) uxAddress; + pucAlignedHeap = ( uint8_t * ) uxAddress; /* xStart is used to hold a pointer to the first item in the list of free * blocks. The void cast is used to prevent compiler warnings. */ - xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap; - xStart.xBlockSize = ( size_t ) 0; + xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap; + xStart.xBlockSize = ( size_t ) 0; /* pxEnd is used to mark the end of the list of free blocks and is inserted * at the end of the heap space. */ - uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize; - uxAddress -= xHeapStructSize; - uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK ); - pxEnd = ( void * ) uxAddress; - pxEnd->xBlockSize = 0; - pxEnd->pxNextFreeBlock = NULL; + uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize; + uxAddress -= xHeapStructSize; + uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK ); + pxEnd = ( void * ) uxAddress; + pxEnd->xBlockSize = 0; + pxEnd->pxNextFreeBlock = NULL; /* To start with there is a single free block that is sized to take up the * entire heap space, minus the space taken by pxEnd. */ - pxFirstFreeBlock = ( void * ) pucAlignedHeap; - pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock; + pxFirstFreeBlock = ( void * ) pucAlignedHeap; + pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock; pxFirstFreeBlock->pxNextFreeBlock = pxEnd; /* Only one block exists - and it covers the entire usable heap space. */ - xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize; - xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize; + xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize; + xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize; /* Work out the position of the top bit in a size_t variable. */ - xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * secureheapBITS_PER_BYTE ) - 1 ); + xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * secureheapBITS_PER_BYTE ) - 1 ); } /*-----------------------------------------------------------*/ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert ) { BlockLink_t * pxIterator; - uint8_t * puc; + uint8_t * puc; /* Iterate through the list until a block is found that has a higher address * than the block being inserted. */ @@ -195,7 +196,7 @@ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert ) if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert ) { pxIterator->xBlockSize += pxBlockToInsert->xBlockSize; - pxBlockToInsert = pxIterator; + pxBlockToInsert = pxIterator; } else { @@ -211,7 +212,7 @@ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert ) if( pxIterator->pxNextFreeBlock != pxEnd ) { /* Form one big block from the two blocks. */ - pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize; + pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize; pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock; } else @@ -242,7 +243,7 @@ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert ) void * pvPortMalloc( size_t xWantedSize ) { BlockLink_t * pxBlock, * pxPreviousBlock, * pxNewBlockLink; - void * pvReturn = NULL; + void * pvReturn = NULL; /* If this is the first call to malloc then the heap will require * initialisation to setup the list of free blocks. */ @@ -290,12 +291,12 @@ void * pvPortMalloc( size_t xWantedSize ) /* Traverse the list from the start (lowest address) block until * one of adequate size is found. */ pxPreviousBlock = &xStart; - pxBlock = xStart.pxNextFreeBlock; + pxBlock = xStart.pxNextFreeBlock; while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) ) { pxPreviousBlock = pxBlock; - pxBlock = pxBlock->pxNextFreeBlock; + pxBlock = pxBlock->pxNextFreeBlock; } /* If the end marker was reached then a block of adequate size was @@ -304,7 +305,7 @@ void * pvPortMalloc( size_t xWantedSize ) { /* Return the memory space pointed to - jumping over the * BlockLink_t structure at its start. */ - pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize ); + pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize ); /* This block is being returned for use so must be taken out * of the list of free blocks. */ @@ -318,13 +319,13 @@ void * pvPortMalloc( size_t xWantedSize ) * block following the number of bytes requested. The void * cast is used to prevent byte alignment warnings from the * compiler. */ - pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize ); + pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize ); secureportASSERT( ( ( ( size_t ) pxNewBlockLink ) & secureportBYTE_ALIGNMENT_MASK ) == 0 ); /* Calculate the sizes of two blocks split from the single * block. */ pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize; - pxBlock->xBlockSize = xWantedSize; + pxBlock->xBlockSize = xWantedSize; /* Insert the new block into the list of free blocks. */ prvInsertBlockIntoFreeList( pxNewBlockLink ); @@ -334,7 +335,7 @@ void * pvPortMalloc( size_t xWantedSize ) mtCOVERAGE_TEST_MARKER(); } - xFreeBytesRemaining -= pxBlock->xBlockSize; + xFreeBytesRemaining -= pxBlock->xBlockSize; if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining ) { @@ -347,8 +348,8 @@ void * pvPortMalloc( size_t xWantedSize ) /* The block is being returned - it is allocated and owned by * the application and has no "next" block. */ - pxBlock->xBlockSize |= xBlockAllocatedBit; - pxBlock->pxNextFreeBlock = NULL; + pxBlock->xBlockSize |= xBlockAllocatedBit; + pxBlock->pxNextFreeBlock = NULL; } else { @@ -388,14 +389,14 @@ void * pvPortMalloc( size_t xWantedSize ) void vPortFree( void * pv ) { - uint8_t * puc = ( uint8_t * ) pv; + uint8_t * puc = ( uint8_t * ) pv; BlockLink_t * pxLink; if( pv != NULL ) { /* The memory being freed will have an BlockLink_t structure immediately * before it. */ - puc -= xHeapStructSize; + puc -= xHeapStructSize; /* This casting is to keep the compiler from issuing warnings. */ pxLink = ( void * ) puc; diff --git a/portable/ARMv8M/secure/heap/secure_heap.h b/portable/ARMv8M/secure/heap/secure_heap.h index 7226fa26f..d5ddaa853 100644 --- a/portable/ARMv8M/secure/heap/secure_heap.h +++ b/portable/ARMv8M/secure/heap/secure_heap.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef __SECURE_HEAP_H__ diff --git a/portable/ARMv8M/secure/init/secure_init.c b/portable/ARMv8M/secure/init/secure_init.c index 5ffa9e613..6f0be2547 100644 --- a/portable/ARMv8M/secure/init/secure_init.c +++ b/portable/ARMv8M/secure/init/secure_init.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Standard includes. */ diff --git a/portable/ARMv8M/secure/init/secure_init.h b/portable/ARMv8M/secure/init/secure_init.h index 96ba9aa10..643873468 100644 --- a/portable/ARMv8M/secure/init/secure_init.h +++ b/portable/ARMv8M/secure/init/secure_init.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef __SECURE_INIT_H__ diff --git a/portable/ARMv8M/secure/macros/secure_port_macros.h b/portable/ARMv8M/secure/macros/secure_port_macros.h index f37655d48..d0ace6242 100644 --- a/portable/ARMv8M/secure/macros/secure_port_macros.h +++ b/portable/ARMv8M/secure/macros/secure_port_macros.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef __SECURE_PORT_MACROS_H__ diff --git a/portable/BCC/16BitDOS/Flsh186/port.c b/portable/BCC/16BitDOS/Flsh186/port.c index 4faed8bf6..e42366a3d 100644 --- a/portable/BCC/16BitDOS/Flsh186/port.c +++ b/portable/BCC/16BitDOS/Flsh186/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* @@ -188,7 +189,7 @@ void vPortEndScheduler( void ) static void prvExitFunction( void ) { const uint16_t usTimerDisable = 0x0000; - uint16_t usTimer0Control; + uint16_t usTimer0Control; /* Interrupts should be disabled here anyway - but no * harm in making sure. */ @@ -207,7 +208,7 @@ static void prvExitFunction( void ) portOUTPUT_WORD( portTIMER_1_CONTROL_REGISTER, usTimerDisable ); /* Restart the DOS tick. */ - usTimer0Control = portINPUT_WORD( portTIMER_0_CONTROL_REGISTER ); + usTimer0Control = portINPUT_WORD( portTIMER_0_CONTROL_REGISTER ); usTimer0Control |= portTIMER_INTERRUPT_ENABLE; portOUTPUT_WORD( portTIMER_0_CONTROL_REGISTER, usTimer0Control ); @@ -218,25 +219,25 @@ static void prvExitFunction( void ) static void prvSetTickFrequency( uint32_t ulTickRateHz ) { - const uint16_t usMaxCountRegister = 0xff5a; + const uint16_t usMaxCountRegister = 0xff5a; const uint16_t usTimerPriorityRegister = 0xff32; - const uint16_t usTimerEnable = 0xC000; - const uint16_t usRetrigger = 0x0001; - const uint16_t usTimerHighPriority = 0x0000; - uint16_t usTimer0Control; + const uint16_t usTimerEnable = 0xC000; + const uint16_t usRetrigger = 0x0001; + const uint16_t usTimerHighPriority = 0x0000; + uint16_t usTimer0Control; /* ( CPU frequency / 4 ) / clock 2 max count [inpw( 0xff62 ) = 7] */ - const uint32_t ulClockFrequency = ( uint32_t ) 0x7f31a0UL; + const uint32_t ulClockFrequency = ( uint32_t ) 0x7f31a0UL; - uint32_t ulTimerCount = ulClockFrequency / ulTickRateHz; + uint32_t ulTimerCount = ulClockFrequency / ulTickRateHz; portOUTPUT_WORD( portTIMER_1_CONTROL_REGISTER, usTimerEnable | portTIMER_INTERRUPT_ENABLE | usRetrigger ); portOUTPUT_WORD( usMaxCountRegister, ( uint16_t ) ulTimerCount ); portOUTPUT_WORD( usTimerPriorityRegister, usTimerHighPriority ); /* Stop the DOS tick - don't do this if you want to maintain a TOD clock. */ - usTimer0Control = portINPUT_WORD( portTIMER_0_CONTROL_REGISTER ); + usTimer0Control = portINPUT_WORD( portTIMER_0_CONTROL_REGISTER ); usTimer0Control &= ~portTIMER_INTERRUPT_ENABLE; portOUTPUT_WORD( portTIMER_0_CONTROL_REGISTER, usTimer0Control ); } diff --git a/portable/BCC/16BitDOS/Flsh186/prtmacro.h b/portable/BCC/16BitDOS/Flsh186/prtmacro.h index 8604b1a4e..cfd36e1ba 100644 --- a/portable/BCC/16BitDOS/Flsh186/prtmacro.h +++ b/portable/BCC/16BitDOS/Flsh186/prtmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/BCC/16BitDOS/PC/port.c b/portable/BCC/16BitDOS/PC/port.c index b3a31d675..da84dd871 100644 --- a/portable/BCC/16BitDOS/PC/port.c +++ b/portable/BCC/16BitDOS/PC/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* @@ -88,7 +89,7 @@ static void prvSetTickFrequencyDefault( void ); /*lint -e956 File scopes necessary here. */ /* Used to signal when to chain to the DOS tick, and when to just clear the PIC ourselves. */ -static int16_t sDOSTickCounter; +static int16_t sDOSTickCounter; /* Set true when the vectors are set so the scheduler will service the tick. */ static BaseType_t xSchedulerRunning = pdFALSE; @@ -113,8 +114,8 @@ BaseType_t xPortStartScheduler( void ) /* Remember what was on the interrupts we are going to use * so we can put them back later if required. */ - pxOldSwitchISR = _dos_getvect( portSWITCH_INT_NUMBER ); - pxOriginalTickISR = _dos_getvect( portTIMER_INT_NUMBER ); + pxOldSwitchISR = _dos_getvect( portSWITCH_INT_NUMBER ); + pxOriginalTickISR = _dos_getvect( portTIMER_INT_NUMBER ); pxOldSwitchISRPlus1 = _dos_getvect( portSWITCH_INT_NUMBER + 1 ); prvSetTickFrequency( configTICK_RATE_HZ ); @@ -144,7 +145,7 @@ BaseType_t xPortStartScheduler( void ) /* Setup a counter that is used to call the DOS interrupt as close * to it's original frequency as can be achieved given our chosen tick * frequency. */ - sDOSTickCounter = portTICKS_PER_DOS_TICK; + sDOSTickCounter = portTICKS_PER_DOS_TICK; /* Clean up function if we want to return to DOS. */ if( setjmp( xJumpBuf ) != 0 ) @@ -263,15 +264,15 @@ static void prvExitFunction( void ) static void prvSetTickFrequency( uint32_t ulTickRateHz ) { - const uint16_t usPIT_MODE = ( uint16_t ) 0x43; - const uint16_t usPIT0 = ( uint16_t ) 0x40; - const uint32_t ulPIT_CONST = ( uint32_t ) 1193180UL; + const uint16_t usPIT_MODE = ( uint16_t ) 0x43; + const uint16_t usPIT0 = ( uint16_t ) 0x40; + const uint32_t ulPIT_CONST = ( uint32_t ) 1193180UL; const uint16_t us8254_CTR0_MODE3 = ( uint16_t ) 0x36; - uint32_t ulOutput; + uint32_t ulOutput; /* Setup the 8245 to tick at the wanted frequency. */ portOUTPUT_BYTE( usPIT_MODE, us8254_CTR0_MODE3 ); - ulOutput = ulPIT_CONST / ulTickRateHz; + ulOutput = ulPIT_CONST / ulTickRateHz; portOUTPUT_BYTE( usPIT0, ( uint16_t ) ( ulOutput & ( uint32_t ) 0xff ) ); ulOutput >>= 8; portOUTPUT_BYTE( usPIT0, ( uint16_t ) ( ulOutput & ( uint32_t ) 0xff ) ); @@ -280,8 +281,8 @@ static void prvSetTickFrequency( uint32_t ulTickRateHz ) static void prvSetTickFrequencyDefault( void ) { - const uint16_t usPIT_MODE = ( uint16_t ) 0x43; - const uint16_t usPIT0 = ( uint16_t ) 0x40; + const uint16_t usPIT_MODE = ( uint16_t ) 0x43; + const uint16_t usPIT0 = ( uint16_t ) 0x40; const uint16_t us8254_CTR0_MODE3 = ( uint16_t ) 0x36; portOUTPUT_BYTE( usPIT_MODE, us8254_CTR0_MODE3 ); diff --git a/portable/BCC/16BitDOS/PC/prtmacro.h b/portable/BCC/16BitDOS/PC/prtmacro.h index 95208d3a5..f94ec2310 100644 --- a/portable/BCC/16BitDOS/PC/prtmacro.h +++ b/portable/BCC/16BitDOS/PC/prtmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/BCC/16BitDOS/common/portasm.h b/portable/BCC/16BitDOS/common/portasm.h index 5118bcfd2..45d13027c 100644 --- a/portable/BCC/16BitDOS/common/portasm.h +++ b/portable/BCC/16BitDOS/common/portasm.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORT_ASM_H diff --git a/portable/BCC/16BitDOS/common/portcomn.c b/portable/BCC/16BitDOS/common/portcomn.c index ec4c10c4a..593cf38b1 100644 --- a/portable/BCC/16BitDOS/common/portcomn.c +++ b/portable/BCC/16BitDOS/common/portcomn.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* diff --git a/portable/CCS/ARM_CM3/port.c b/portable/CCS/ARM_CM3/port.c index 2c1639348..9c62ab3c9 100644 --- a/portable/CCS/ARM_CM3/port.c +++ b/portable/CCS/ARM_CM3/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -116,17 +117,17 @@ static void prvTaskExitError( void ); /* Required to allow portasm.asm access the configMAX_SYSCALL_INTERRUPT_PRIORITY * setting. */ -const uint32_t ulMaxSyscallInterruptPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY; +const uint32_t ulMaxSyscallInterruptPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY; /* Each task maintains its own interrupt status in the critical nesting * variable. */ -static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; +static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; /* * The number of SysTick increments that make up one tick period. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t ulTimerCountsForOneTick = 0; + static uint32_t ulTimerCountsForOneTick = 0; #endif /* configUSE_TICKLESS_IDLE */ /* @@ -134,7 +135,7 @@ static UBaseType_t uxCriticalNesting = 0xaaaaa * 24 bit resolution of the SysTick timer. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t xMaximumPossibleSuppressedTicks = 0; + static uint32_t xMaximumPossibleSuppressedTicks = 0; #endif /* configUSE_TICKLESS_IDLE */ /* @@ -142,7 +143,7 @@ static UBaseType_t uxCriticalNesting = 0xaaaaa * power functionality only. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t ulStoppedTimerCompensation = 0; + static uint32_t ulStoppedTimerCompensation = 0; #endif /* configUSE_TICKLESS_IDLE */ /* @@ -151,8 +152,8 @@ static UBaseType_t uxCriticalNesting = 0xaaaaa * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY. */ #if ( configASSERT_DEFINED == 1 ) - static uint8_t ucMaxSysCallPriority = 0; - static uint32_t ulMaxPRIGROUPValue = 0; + static uint8_t ucMaxSysCallPriority = 0; + static uint32_t ulMaxPRIGROUPValue = 0; static const volatile uint8_t * const pcInterruptPriorityRegisters = ( uint8_t * ) portNVIC_IP_REGISTERS_OFFSET_16; #endif /* configASSERT_DEFINED */ @@ -212,9 +213,9 @@ BaseType_t xPortStartScheduler( void ) { #if ( configASSERT_DEFINED == 1 ) { - volatile uint32_t ulOriginalPriority; + volatile uint32_t ulOriginalPriority; volatile uint8_t * const pucFirstUserPriorityRegister = ( uint8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER ); - volatile uint8_t ucMaxPriorityValue; + volatile uint8_t ucMaxPriorityValue; /* Determine the maximum priority from which ISR safe FreeRTOS API * functions can be called. ISR safe functions are those that end in @@ -222,21 +223,21 @@ BaseType_t xPortStartScheduler( void ) * ensure interrupt entry is as fast and simple as possible. * * Save the interrupt priority value that is about to be clobbered. */ - ulOriginalPriority = *pucFirstUserPriorityRegister; + ulOriginalPriority = *pucFirstUserPriorityRegister; /* Determine the number of priority bits available. First write to all * possible bits. */ *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE; /* Read the value back to see how many bits stuck. */ - ucMaxPriorityValue = *pucFirstUserPriorityRegister; + ucMaxPriorityValue = *pucFirstUserPriorityRegister; /* Use the same mask on the maximum system call priority. */ - ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; + ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; /* Calculate the maximum acceptable priority group value for the number * of bits read back. */ - ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS; + ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS; while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE ) { @@ -264,8 +265,8 @@ BaseType_t xPortStartScheduler( void ) /* Shift the priority group value back to its position within the AIRCR * register. */ - ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; - ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; + ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; + ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; /* Restore the clobbered interrupt priority register to its original * value. */ @@ -282,7 +283,7 @@ BaseType_t xPortStartScheduler( void ) vPortSetupTimerInterrupt(); /* Initialise the critical nesting count ready for the first task. */ - uxCriticalNesting = 0; + uxCriticalNesting = 0; /* Start the first task. */ vPortStartFirstTask(); @@ -354,7 +355,7 @@ void xPortSysTickHandler( void ) #pragma WEAK( vPortSuppressTicksAndSleep ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ) { - uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; + uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; TickType_t xModifiableIdleTime; /* Make sure the SysTick reload value does not overflow the counter. */ @@ -372,7 +373,7 @@ void xPortSysTickHandler( void ) /* Calculate the reload value required to wait xExpectedIdleTime * tick periods. -1 is used because this code will execute part way * through one of the tick periods. */ - ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); + ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); if( ulReloadValue > ulStoppedTimerCompensation ) { @@ -391,14 +392,14 @@ void xPortSysTickHandler( void ) { /* Restart from whatever is left in the count register to complete * this tick period. */ - portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; + portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; /* Restart SysTick. */ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Reset the reload register to the value required for normal tick * periods. */ - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Re-enable interrupts - see comments above __disable_interrupt() * call above. */ @@ -407,21 +408,21 @@ void xPortSysTickHandler( void ) else { /* Set the new reload value. */ - portNVIC_SYSTICK_LOAD_REG = ulReloadValue; + portNVIC_SYSTICK_LOAD_REG = ulReloadValue; /* Clear the SysTick count flag and set the count value back to * zero. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Restart SysTick. */ - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can * set its parameter to 0 to indicate that its implementation contains * its own wait for interrupt or wait for event instruction, and so wfi * should not be executed again. However, the original expected idle * time variable must remain unmodified, so a copy is taken. */ - xModifiableIdleTime = xExpectedIdleTime; + xModifiableIdleTime = xExpectedIdleTime; configPRE_SLEEP_PROCESSING( xModifiableIdleTime ); if( xModifiableIdleTime > 0 ) @@ -455,7 +456,7 @@ void xPortSysTickHandler( void ) * be, but using the tickless mode will inevitably result in some tiny * drift of the time maintained by the kernel with respect to calendar * time*/ - portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); /* Determine if the SysTick clock has already counted to zero and * been set back to the current reload value (the reload back being @@ -470,7 +471,7 @@ void xPortSysTickHandler( void ) * reloaded with ulReloadValue. Reset the * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick * period. */ - ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); + ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); /* Don't allow a tiny value, or values that have somehow * underflowed because the post sleep hook did something @@ -485,7 +486,7 @@ void xPortSysTickHandler( void ) /* As the pending tick will be processed as soon as this * function exits, the tick value maintained by the tick is stepped * forward by one less than the time spent waiting. */ - ulCompleteTickPeriods = xExpectedIdleTime - 1UL; + ulCompleteTickPeriods = xExpectedIdleTime - 1UL; } else { @@ -497,20 +498,20 @@ void xPortSysTickHandler( void ) /* How many complete tick periods passed while the processor * was waiting? */ - ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; + ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; /* The reload value is set to whatever fraction of a single tick * period remains. */ - portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; + portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; } /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard * value. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; vTaskStepTick( ulCompleteTickPeriods ); - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Exit with interrupts enabled. */ __asm( " cpsie i"); @@ -530,19 +531,19 @@ void vPortSetupTimerInterrupt( void ) /* Calculate the constants required to configure the tick interrupt. */ #if ( configUSE_TICKLESS_IDLE == 1 ) { - ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); + ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick; - ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); + ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); } #endif /* configUSE_TICKLESS_IDLE */ /* Stop and clear the SysTick. */ - portNVIC_SYSTICK_CTRL_REG = 0UL; + portNVIC_SYSTICK_CTRL_REG = 0UL; portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Configure SysTick to interrupt at the requested rate. */ - portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; - portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT ); + portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT ); } /*-----------------------------------------------------------*/ @@ -552,7 +553,7 @@ void vPortSetupTimerInterrupt( void ) { extern uint32_t ulPortGetIPSR( void ); uint32_t ulCurrentInterrupt; - uint8_t ucCurrentPriority; + uint8_t ucCurrentPriority; ulCurrentInterrupt = ulPortGetIPSR(); diff --git a/portable/CCS/ARM_CM3/portmacro.h b/portable/CCS/ARM_CM3/portmacro.h index f1757869a..35ff73f1d 100644 --- a/portable/CCS/ARM_CM3/portmacro.h +++ b/portable/CCS/ARM_CM3/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ @@ -114,7 +115,7 @@ /*-----------------------------------------------------------*/ - #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __clz( ( uxReadyPriorities ) ) ) + #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __clz( ( uxReadyPriorities ) ) ) #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ /*-----------------------------------------------------------*/ diff --git a/portable/CCS/ARM_CM4F/port.c b/portable/CCS/ARM_CM4F/port.c index 7ea2079bc..f9c44436b 100644 --- a/portable/CCS/ARM_CM4F/port.c +++ b/portable/CCS/ARM_CM4F/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -130,17 +131,17 @@ static void prvTaskExitError( void ); /* Required to allow portasm.asm access the configMAX_SYSCALL_INTERRUPT_PRIORITY * setting. */ -const uint32_t ulMaxSyscallInterruptPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY; +const uint32_t ulMaxSyscallInterruptPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY; /* Each task maintains its own interrupt status in the critical nesting * variable. */ -static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; +static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; /* * The number of SysTick increments that make up one tick period. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t ulTimerCountsForOneTick = 0; + static uint32_t ulTimerCountsForOneTick = 0; #endif /* configUSE_TICKLESS_IDLE */ /* @@ -148,7 +149,7 @@ static UBaseType_t uxCriticalNesting = 0xaaaaa * 24 bit resolution of the SysTick timer. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t xMaximumPossibleSuppressedTicks = 0; + static uint32_t xMaximumPossibleSuppressedTicks = 0; #endif /* configUSE_TICKLESS_IDLE */ /* @@ -156,7 +157,7 @@ static UBaseType_t uxCriticalNesting = 0xaaaaa * power functionality only. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t ulStoppedTimerCompensation = 0; + static uint32_t ulStoppedTimerCompensation = 0; #endif /* configUSE_TICKLESS_IDLE */ /* @@ -165,8 +166,8 @@ static UBaseType_t uxCriticalNesting = 0xaaaaa * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY. */ #if ( configASSERT_DEFINED == 1 ) - static uint8_t ucMaxSysCallPriority = 0; - static uint32_t ulMaxPRIGROUPValue = 0; + static uint8_t ucMaxSysCallPriority = 0; + static uint32_t ulMaxPRIGROUPValue = 0; static const volatile uint8_t * const pcInterruptPriorityRegisters = ( uint8_t * ) portNVIC_IP_REGISTERS_OFFSET_16; #endif /* configASSERT_DEFINED */ @@ -231,9 +232,9 @@ BaseType_t xPortStartScheduler( void ) { #if ( configASSERT_DEFINED == 1 ) { - volatile uint32_t ulOriginalPriority; + volatile uint32_t ulOriginalPriority; volatile uint8_t * const pucFirstUserPriorityRegister = ( uint8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER ); - volatile uint8_t ucMaxPriorityValue; + volatile uint8_t ucMaxPriorityValue; /* Determine the maximum priority from which ISR safe FreeRTOS API * functions can be called. ISR safe functions are those that end in @@ -241,21 +242,21 @@ BaseType_t xPortStartScheduler( void ) * ensure interrupt entry is as fast and simple as possible. * * Save the interrupt priority value that is about to be clobbered. */ - ulOriginalPriority = *pucFirstUserPriorityRegister; + ulOriginalPriority = *pucFirstUserPriorityRegister; /* Determine the number of priority bits available. First write to all * possible bits. */ *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE; /* Read the value back to see how many bits stuck. */ - ucMaxPriorityValue = *pucFirstUserPriorityRegister; + ucMaxPriorityValue = *pucFirstUserPriorityRegister; /* Use the same mask on the maximum system call priority. */ - ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; + ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; /* Calculate the maximum acceptable priority group value for the number * of bits read back. */ - ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS; + ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS; while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE ) { @@ -283,8 +284,8 @@ BaseType_t xPortStartScheduler( void ) /* Shift the priority group value back to its position within the AIRCR * register. */ - ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; - ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; + ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; + ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; /* Restore the clobbered interrupt priority register to its original * value. */ @@ -301,13 +302,13 @@ BaseType_t xPortStartScheduler( void ) vPortSetupTimerInterrupt(); /* Initialise the critical nesting count ready for the first task. */ - uxCriticalNesting = 0; + uxCriticalNesting = 0; /* Ensure the VFP is enabled - it should be anyway. */ vPortEnableVFP(); /* Lazy save always. */ - *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS; + *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS; /* Start the first task. */ vPortStartFirstTask(); @@ -379,7 +380,7 @@ void xPortSysTickHandler( void ) #pragma WEAK( vPortSuppressTicksAndSleep ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ) { - uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; + uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; TickType_t xModifiableIdleTime; /* Make sure the SysTick reload value does not overflow the counter. */ @@ -397,7 +398,7 @@ void xPortSysTickHandler( void ) /* Calculate the reload value required to wait xExpectedIdleTime * tick periods. -1 is used because this code will execute part way * through one of the tick periods. */ - ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); + ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); if( ulReloadValue > ulStoppedTimerCompensation ) { @@ -416,14 +417,14 @@ void xPortSysTickHandler( void ) { /* Restart from whatever is left in the count register to complete * this tick period. */ - portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; + portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; /* Restart SysTick. */ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Reset the reload register to the value required for normal tick * periods. */ - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Re-enable interrupts - see comments above __disable_interrupt() * call above. */ @@ -432,21 +433,21 @@ void xPortSysTickHandler( void ) else { /* Set the new reload value. */ - portNVIC_SYSTICK_LOAD_REG = ulReloadValue; + portNVIC_SYSTICK_LOAD_REG = ulReloadValue; /* Clear the SysTick count flag and set the count value back to * zero. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Restart SysTick. */ - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can * set its parameter to 0 to indicate that its implementation contains * its own wait for interrupt or wait for event instruction, and so wfi * should not be executed again. However, the original expected idle * time variable must remain unmodified, so a copy is taken. */ - xModifiableIdleTime = xExpectedIdleTime; + xModifiableIdleTime = xExpectedIdleTime; configPRE_SLEEP_PROCESSING( xModifiableIdleTime ); if( xModifiableIdleTime > 0 ) @@ -480,7 +481,7 @@ void xPortSysTickHandler( void ) * be, but using the tickless mode will inevitably result in some tiny * drift of the time maintained by the kernel with respect to calendar * time*/ - portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); /* Determine if the SysTick clock has already counted to zero and * been set back to the current reload value (the reload back being @@ -495,7 +496,7 @@ void xPortSysTickHandler( void ) * reloaded with ulReloadValue. Reset the * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick * period. */ - ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); + ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); /* Don't allow a tiny value, or values that have somehow * underflowed because the post sleep hook did something @@ -510,7 +511,7 @@ void xPortSysTickHandler( void ) /* As the pending tick will be processed as soon as this * function exits, the tick value maintained by the tick is stepped * forward by one less than the time spent waiting. */ - ulCompleteTickPeriods = xExpectedIdleTime - 1UL; + ulCompleteTickPeriods = xExpectedIdleTime - 1UL; } else { @@ -522,20 +523,20 @@ void xPortSysTickHandler( void ) /* How many complete tick periods passed while the processor * was waiting? */ - ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; + ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; /* The reload value is set to whatever fraction of a single tick * period remains. */ - portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; + portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; } /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard * value. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; vTaskStepTick( ulCompleteTickPeriods ); - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Exit with interrupts enabled. */ __asm( " cpsie i"); @@ -555,19 +556,19 @@ void vPortSetupTimerInterrupt( void ) /* Calculate the constants required to configure the tick interrupt. */ #if ( configUSE_TICKLESS_IDLE == 1 ) { - ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); + ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick; - ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); + ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); } #endif /* configUSE_TICKLESS_IDLE */ /* Stop and clear the SysTick. */ - portNVIC_SYSTICK_CTRL_REG = 0UL; + portNVIC_SYSTICK_CTRL_REG = 0UL; portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Configure SysTick to interrupt at the requested rate. */ - portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; - portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT ); + portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT ); } /*-----------------------------------------------------------*/ @@ -577,7 +578,7 @@ void vPortSetupTimerInterrupt( void ) { extern uint32_t ulPortGetIPSR( void ); uint32_t ulCurrentInterrupt; - uint8_t ucCurrentPriority; + uint8_t ucCurrentPriority; ulCurrentInterrupt = ulPortGetIPSR(); diff --git a/portable/CCS/ARM_CM4F/portmacro.h b/portable/CCS/ARM_CM4F/portmacro.h index 4d99e768a..fbfaeab29 100644 --- a/portable/CCS/ARM_CM4F/portmacro.h +++ b/portable/CCS/ARM_CM4F/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ @@ -108,7 +109,7 @@ /*-----------------------------------------------------------*/ - #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __clz( ( uxReadyPriorities ) ) ) + #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __clz( ( uxReadyPriorities ) ) ) #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ /*-----------------------------------------------------------*/ diff --git a/portable/CCS/ARM_Cortex-R4/port.c b/portable/CCS/ARM_Cortex-R4/port.c index ca0ce953b..1f3f31c64 100644 --- a/portable/CCS/ARM_Cortex-R4/port.c +++ b/portable/CCS/ARM_Cortex-R4/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* FreeRTOS includes. */ @@ -31,7 +32,7 @@ /*-----------------------------------------------------------*/ /* Count of the critical section nesting depth. */ -uint32_t ulCriticalNesting = 9999; +uint32_t ulCriticalNesting = 9999; /*-----------------------------------------------------------*/ @@ -169,30 +170,30 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, static void prvSetupTimerInterrupt( void ) { /* Disable timer 0. */ - portRTI_GCTRL_REG &= 0xFFFFFFFEUL; + portRTI_GCTRL_REG &= 0xFFFFFFFEUL; /* Use the internal counter. */ - portRTI_TBCTRL_REG = 0x00000000U; + portRTI_TBCTRL_REG = 0x00000000U; /* COMPSEL0 will use the RTIFRC0 counter. */ - portRTI_COMPCTRL_REG = 0x00000000U; + portRTI_COMPCTRL_REG = 0x00000000U; /* Initialise the counter and the prescale counter registers. */ - portRTI_CNT0_UC0_REG = 0x00000000U; - portRTI_CNT0_FRC0_REG = 0x00000000U; + portRTI_CNT0_UC0_REG = 0x00000000U; + portRTI_CNT0_FRC0_REG = 0x00000000U; /* Set Prescalar for RTI clock. */ - portRTI_CNT0_CPUC0_REG = 0x00000001U; - portRTI_CNT0_COMP0_REG = ( configCPU_CLOCK_HZ / 2 ) / configTICK_RATE_HZ; - portRTI_CNT0_UDCP0_REG = ( configCPU_CLOCK_HZ / 2 ) / configTICK_RATE_HZ; + portRTI_CNT0_CPUC0_REG = 0x00000001U; + portRTI_CNT0_COMP0_REG = ( configCPU_CLOCK_HZ / 2 ) / configTICK_RATE_HZ; + portRTI_CNT0_UDCP0_REG = ( configCPU_CLOCK_HZ / 2 ) / configTICK_RATE_HZ; /* Clear interrupts. */ - portRTI_INTFLAG_REG = 0x0007000FU; + portRTI_INTFLAG_REG = 0x0007000FU; portRTI_CLEARINTENA_REG = 0x00070F0FU; /* Enable the compare 0 interrupt. */ - portRTI_SETINTENA_REG = 0x00000001U; - portRTI_GCTRL_REG |= 0x00000001U; + portRTI_SETINTENA_REG = 0x00000001U; + portRTI_GCTRL_REG |= 0x00000001U; } /*-----------------------------------------------------------*/ diff --git a/portable/CCS/ARM_Cortex-R4/portmacro.h b/portable/CCS/ARM_Cortex-R4/portmacro.h index 585545f1e..1536b0f44 100644 --- a/portable/CCS/ARM_Cortex-R4/portmacro.h +++ b/portable/CCS/ARM_Cortex-R4/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef __PORTMACRO_H__ @@ -103,7 +104,7 @@ extern void vPortYield( void ); /*-----------------------------------------------------------*/ - #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __clz( ( uxReadyPriorities ) ) ) + #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __clz( ( uxReadyPriorities ) ) ) #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ diff --git a/portable/CCS/MSP430X/data_model.h b/portable/CCS/MSP430X/data_model.h index f844ab327..6a0787cf8 100644 --- a/portable/CCS/MSP430X/data_model.h +++ b/portable/CCS/MSP430X/data_model.h @@ -22,6 +22,7 @@ * ; * http://www.FreeRTOS.org * ; * http://aws.amazon.com/freertos * ; * + * ; * 1 tab == 4 spaces! * ; */ .if $DEFINED( __LARGE_DATA_MODEL__ ) diff --git a/portable/CCS/MSP430X/port.c b/portable/CCS/MSP430X/port.c index 9a9115607..6e0d85787 100644 --- a/portable/CCS/MSP430X/port.c +++ b/portable/CCS/MSP430X/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Scheduler includes. */ @@ -91,25 +92,25 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, * and code model used. */ if( sizeof( pxCode ) == sizeof( uint16_t ) ) { - pusTopOfStack = ( uint16_t * ) pxTopOfStack; - ulTemp = ( uint32_t ) pxCode; + pusTopOfStack = ( uint16_t * ) pxTopOfStack; + ulTemp = ( uint32_t ) pxCode; *pusTopOfStack = ( uint16_t ) ulTemp; } else { /* Make room for a 20 bit value stored as a 32 bit value. */ - pusTopOfStack = ( uint16_t * ) pxTopOfStack; + pusTopOfStack = ( uint16_t * ) pxTopOfStack; pusTopOfStack--; - pulTopOfStack = ( uint32_t * ) pusTopOfStack; + pulTopOfStack = ( uint32_t * ) pusTopOfStack; *pulTopOfStack = ( uint32_t ) pxCode; } pusTopOfStack--; - *pusTopOfStack = portFLAGS_INT_ENABLED; - pusTopOfStack -= ( sizeof( StackType_t ) / 2 ); + *pusTopOfStack = portFLAGS_INT_ENABLED; + pusTopOfStack -= ( sizeof( StackType_t ) / 2 ); /* From here on the size of stacked items depends on the memory model. */ - pxTopOfStack = ( StackType_t * ) pusTopOfStack; + pxTopOfStack = ( StackType_t * ) pusTopOfStack; /* Next the general purpose registers. */ #ifdef PRELOAD_REGISTER_VALUES @@ -146,7 +147,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, /* A variable is used to keep track of the critical section nesting. * This variable has to be stored as part of the task context and is * initially set to zero. */ - *pxTopOfStack = ( StackType_t ) portNO_CRITICAL_SECTION_NESTING; + *pxTopOfStack = ( StackType_t ) portNO_CRITICAL_SECTION_NESTING; /* Return a pointer to the top of the stack we have generated so this can * be stored in the task control block for the task. */ diff --git a/portable/CCS/MSP430X/portmacro.h b/portable/CCS/MSP430X/portmacro.h index 2c2d64cdc..78612e3e6 100644 --- a/portable/CCS/MSP430X/portmacro.h +++ b/portable/CCS/MSP430X/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/CodeWarrior/ColdFire_V1/port.c b/portable/CodeWarrior/ColdFire_V1/port.c index 8b09b6720..21ebf14c4 100644 --- a/portable/CodeWarrior/ColdFire_V1/port.c +++ b/portable/CodeWarrior/ColdFire_V1/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Kernel includes. */ @@ -60,21 +61,21 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, }; - *pxTopOfStack = ( StackType_t ) 0xDEADBEEF; + *pxTopOfStack = ( StackType_t ) 0xDEADBEEF; pxTopOfStack--; /* Exception stack frame starts with the return address. */ - *pxTopOfStack = ( StackType_t ) pxCode; + *pxTopOfStack = ( StackType_t ) pxCode; pxTopOfStack--; - *pxTopOfStack = ( portINITIAL_FORMAT_VECTOR << 16UL ) | ( portINITIAL_STATUS_REGISTER ); + *pxTopOfStack = ( portINITIAL_FORMAT_VECTOR << 16UL ) | ( portINITIAL_STATUS_REGISTER ); pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x0; /*FP*/ - pxTopOfStack -= 14; /* A5 to D0. */ + *pxTopOfStack = ( StackType_t ) 0x0; /*FP*/ + pxTopOfStack -= 14; /* A5 to D0. */ /* Parameter in A0. */ - *( pxTopOfStack + 8 ) = ( StackType_t ) pvParameters; + *( pxTopOfStack + 8 ) = ( StackType_t ) pvParameters; /* A5 must be maintained as it is resurved by the compiler. */ *( pxTopOfStack + 13 ) = ulOriginalA5; @@ -102,10 +103,10 @@ BaseType_t xPortStartScheduler( void ) static void prvSetupTimerInterrupt( void ) { /* Prescale by 1 - ie no prescale. */ - RTCSC |= 8; + RTCSC |= 8; /* Compare match value. */ - RTCMOD = portRTC_CLOCK_HZ / configTICK_RATE_HZ; + RTCMOD = portRTC_CLOCK_HZ / configTICK_RATE_HZ; /* Enable the RTC to generate interrupts - interrupts are already disabled * when this code executes. */ @@ -172,7 +173,7 @@ void interrupt VectorNumber_Vrtc vPortTickISR( void ) uint32_t ulSavedInterruptMask; /* Clear the interrupt. */ - RTCSC |= RTCSC_RTIF_MASK; + RTCSC |= RTCSC_RTIF_MASK; /* Increment the RTOS tick. */ ulSavedInterruptMask = portSET_INTERRUPT_MASK_FROM_ISR(); diff --git a/portable/CodeWarrior/ColdFire_V1/portmacro.h b/portable/CodeWarrior/ColdFire_V1/portmacro.h index a4ad6f969..e5d783df7 100644 --- a/portable/CodeWarrior/ColdFire_V1/portmacro.h +++ b/portable/CodeWarrior/ColdFire_V1/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/CodeWarrior/ColdFire_V2/port.c b/portable/CodeWarrior/ColdFire_V2/port.c index 0c50f0f35..8616098b0 100644 --- a/portable/CodeWarrior/ColdFire_V2/port.c +++ b/portable/CodeWarrior/ColdFire_V2/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Kernel includes. */ @@ -142,7 +143,7 @@ void vPortYieldHandler( void ) ulSavedInterruptMask = portSET_INTERRUPT_MASK_FROM_ISR(); /* Note this will clear all forced interrupts - this is done for speed. */ - MCF_INTC0_INTFRCL = 0; + MCF_INTC0_INTFRCL = 0; vTaskSwitchContext(); portCLEAR_INTERRUPT_MASK_FROM_ISR( ulSavedInterruptMask ); } diff --git a/portable/CodeWarrior/ColdFire_V2/portmacro.h b/portable/CodeWarrior/ColdFire_V2/portmacro.h index 76f396d3c..e2eb0af42 100644 --- a/portable/CodeWarrior/ColdFire_V2/portmacro.h +++ b/portable/CodeWarrior/ColdFire_V2/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/CodeWarrior/HCS12/port.c b/portable/CodeWarrior/HCS12/port.c index acdef63e9..9069850d2 100644 --- a/portable/CodeWarrior/HCS12/port.c +++ b/portable/CodeWarrior/HCS12/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Scheduler includes. */ @@ -95,36 +96,36 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, /* The address of the task function is placed in the stack byte at a time. */ - *pxTopOfStack = ( StackType_t ) *( ( ( StackType_t * ) ( &pxCode ) ) + 1 ); + *pxTopOfStack = ( StackType_t ) *( ( ( StackType_t * ) ( &pxCode ) ) + 1 ); pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) *( ( ( StackType_t * ) ( &pxCode ) ) + 0 ); + *pxTopOfStack = ( StackType_t ) *( ( ( StackType_t * ) ( &pxCode ) ) + 0 ); pxTopOfStack--; /* Next are all the registers that form part of the task context. */ /* Y register */ - *pxTopOfStack = ( StackType_t ) 0xff; + *pxTopOfStack = ( StackType_t ) 0xff; pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0xee; + *pxTopOfStack = ( StackType_t ) 0xee; pxTopOfStack--; /* X register */ - *pxTopOfStack = ( StackType_t ) 0xdd; + *pxTopOfStack = ( StackType_t ) 0xdd; pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0xcc; + *pxTopOfStack = ( StackType_t ) 0xcc; pxTopOfStack--; /* A register contains parameter high byte. */ - *pxTopOfStack = ( StackType_t ) *( ( ( StackType_t * ) ( &pvParameters ) ) + 0 ); + *pxTopOfStack = ( StackType_t ) *( ( ( StackType_t * ) ( &pvParameters ) ) + 0 ); pxTopOfStack--; /* B register contains parameter low byte. */ - *pxTopOfStack = ( StackType_t ) *( ( ( StackType_t * ) ( &pvParameters ) ) + 1 ); + *pxTopOfStack = ( StackType_t ) *( ( ( StackType_t * ) ( &pvParameters ) ) + 1 ); pxTopOfStack--; /* CCR: Note that when the task starts interrupts will be enabled since * "I" bit of CCR is cleared */ - *pxTopOfStack = ( StackType_t ) 0x00; + *pxTopOfStack = ( StackType_t ) 0x00; pxTopOfStack--; #ifdef BANKED_MODEL @@ -135,7 +136,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, /* Finally the critical nesting depth is initialised with 0 (not within * a critical section). */ - *pxTopOfStack = ( StackType_t ) 0x00; + *pxTopOfStack = ( StackType_t ) 0x00; return pxTopOfStack; } diff --git a/portable/CodeWarrior/HCS12/portmacro.h b/portable/CodeWarrior/HCS12/portmacro.h index 6a5f1b063..05fa65e50 100644 --- a/portable/CodeWarrior/HCS12/portmacro.h +++ b/portable/CodeWarrior/HCS12/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ @@ -124,7 +125,7 @@ typedef unsigned char UBaseType_t; */ #define portRESTORE_CONTEXT() \ { \ - extern volatile void * pxCurrentTCB; \ + extern volatile void * pxCurrentTCB; \ extern volatile UBaseType_t uxCriticalNesting; \ \ __asm( "ldx pxCurrentTCB" ); \ @@ -142,7 +143,7 @@ typedef unsigned char UBaseType_t; */ #define portSAVE_CONTEXT() \ { \ - extern volatile void * pxCurrentTCB; \ + extern volatile void * pxCurrentTCB; \ extern volatile UBaseType_t uxCriticalNesting; \ \ __asm( "ldaa 0x30" ); /* 0x30 = PPAGE */ \ @@ -161,7 +162,7 @@ typedef unsigned char UBaseType_t; #define portRESTORE_CONTEXT() \ { \ - extern volatile void * pxCurrentTCB; \ + extern volatile void * pxCurrentTCB; \ extern volatile UBaseType_t uxCriticalNesting; \ \ __asm( "ldx pxCurrentTCB" ); \ @@ -172,7 +173,7 @@ typedef unsigned char UBaseType_t; #define portSAVE_CONTEXT() \ { \ - extern volatile void * pxCurrentTCB; \ + extern volatile void * pxCurrentTCB; \ extern volatile UBaseType_t uxCriticalNesting; \ \ __asm( "ldaa uxCriticalNesting" ); \ diff --git a/portable/Common/mpu_wrappers.c b/portable/Common/mpu_wrappers.c index 8dcb89d1b..5b478703c 100644 --- a/portable/Common/mpu_wrappers.c +++ b/portable/Common/mpu_wrappers.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* @@ -141,7 +142,7 @@ void vPortResetPrivilege( BaseType_t xRunningPrivileged ) StaticTask_t * const pxTaskBuffer ) /* FREERTOS_SYSTEM_CALL */ { TaskHandle_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); xReturn = xTaskCreateStatic( pxTaskCode, pcName, ulStackDepth, pvParameters, uxPriority, puxStackBuffer, pxTaskBuffer ); vPortResetPrivilege( xRunningPrivileged ); @@ -211,7 +212,7 @@ void MPU_vTaskAllocateMPURegions( TaskHandle_t xTask, UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t pxTask ) /* FREERTOS_SYSTEM_CALL */ { UBaseType_t uxReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); uxReturn = uxTaskPriorityGet( pxTask ); vPortResetPrivilege( xRunningPrivileged ); @@ -263,7 +264,7 @@ void MPU_vTaskAllocateMPURegions( TaskHandle_t xTask, TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) /* FREERTOS_SYSTEM_CALL */ { TaskHandle_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); xReturn = xTaskGetIdleTaskHandle(); vPortResetPrivilege( xRunningPrivileged ); @@ -328,7 +329,7 @@ TickType_t MPU_xTaskGetTickCount( void ) /* FREERTOS_SYSTEM_CALL */ UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) /* FREERTOS_SYSTEM_CALL */ { UBaseType_t uxReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); uxReturn = uxTaskGetNumberOfTasks(); vPortResetPrivilege( xRunningPrivileged ); @@ -338,7 +339,7 @@ UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) /* FREERTOS_SYSTEM_CALL */ char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* FREERTOS_SYSTEM_CALL */ { - char * pcReturn; + char * pcReturn; BaseType_t xRunningPrivileged = xPortRaisePrivilege(); pcReturn = pcTaskGetName( xTaskToQuery ); @@ -351,7 +352,7 @@ char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* FREERTOS_SYSTEM_CALL */ TaskHandle_t MPU_xTaskGetHandle( const char * pcNameToQuery ) /* FREERTOS_SYSTEM_CALL */ { TaskHandle_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); xReturn = xTaskGetHandle( pcNameToQuery ); vPortResetPrivilege( xRunningPrivileged ); @@ -385,7 +386,7 @@ char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* FREERTOS_SYSTEM_CALL */ #if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) ) uint32_t MPU_ulTaskGetIdleRunTimeCounter( void ) /* FREERTOS_SYSTEM_CALL */ { - uint32_t xReturn; + uint32_t xReturn; BaseType_t xRunningPrivileged = xPortRaisePrivilege(); xReturn = ulTaskGetIdleRunTimeCounter(); @@ -411,7 +412,7 @@ char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* FREERTOS_SYSTEM_CALL */ TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) /* FREERTOS_SYSTEM_CALL */ { TaskHookFunction_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); xReturn = xTaskGetApplicationTaskTag( xTask ); vPortResetPrivilege( xRunningPrivileged ); @@ -437,7 +438,7 @@ char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* FREERTOS_SYSTEM_CALL */ void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, BaseType_t xIndex ) /* FREERTOS_SYSTEM_CALL */ { - void * pvReturn; + void * pvReturn; BaseType_t xRunningPrivileged = xPortRaisePrivilege(); pvReturn = pvTaskGetThreadLocalStoragePointer( xTaskToQuery, xIndex ); @@ -467,7 +468,7 @@ char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* FREERTOS_SYSTEM_CALL */ uint32_t * pulTotalRunTime ) /* FREERTOS_SYSTEM_CALL */ { UBaseType_t uxReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); uxReturn = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, pulTotalRunTime ); vPortResetPrivilege( xRunningPrivileged ); @@ -491,7 +492,7 @@ BaseType_t MPU_xTaskCatchUpTicks( TickType_t xTicksToCatchUp ) /* FREERTOS_SYSTE UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) /* FREERTOS_SYSTEM_CALL */ { UBaseType_t uxReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); uxReturn = uxTaskGetStackHighWaterMark( xTask ); vPortResetPrivilege( xRunningPrivileged ); @@ -504,7 +505,7 @@ BaseType_t MPU_xTaskCatchUpTicks( TickType_t xTicksToCatchUp ) /* FREERTOS_SYSTE configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) /* FREERTOS_SYSTEM_CALL */ { configSTACK_DEPTH_TYPE uxReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); uxReturn = uxTaskGetStackHighWaterMark2( xTask ); vPortResetPrivilege( xRunningPrivileged ); @@ -517,7 +518,7 @@ BaseType_t MPU_xTaskCatchUpTicks( TickType_t xTicksToCatchUp ) /* FREERTOS_SYSTE TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) /* FREERTOS_SYSTEM_CALL */ { TaskHandle_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); xReturn = xTaskGetCurrentTaskHandle(); vPortResetPrivilege( xRunningPrivileged ); @@ -599,7 +600,7 @@ BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, BaseType_t xClearCountOnExit, TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */ { - uint32_t ulReturn; + uint32_t ulReturn; BaseType_t xRunningPrivileged = xPortRaisePrivilege(); ulReturn = ulTaskGenericNotifyTake( uxIndexToWaitOn, xClearCountOnExit, xTicksToWait ); @@ -628,7 +629,7 @@ BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, UBaseType_t uxIndexToClear, uint32_t ulBitsToClear ) /* FREERTOS_SYSTEM_CALL */ { - uint32_t ulReturn; + uint32_t ulReturn; BaseType_t xRunningPrivileged = xPortRaisePrivilege(); ulReturn = ulTaskGenericNotifyValueClear( xTask, uxIndexToClear, ulBitsToClear ); @@ -644,7 +645,7 @@ BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, uint8_t ucQueueType ) /* FREERTOS_SYSTEM_CALL */ { QueueHandle_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); xReturn = xQueueGenericCreate( uxQueueLength, uxItemSize, ucQueueType ); vPortResetPrivilege( xRunningPrivileged ); @@ -661,7 +662,7 @@ BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, const uint8_t ucQueueType ) /* FREERTOS_SYSTEM_CALL */ { QueueHandle_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); xReturn = xQueueGenericCreateStatic( uxQueueLength, uxItemSize, pucQueueStorage, pxStaticQueue, ucQueueType ); vPortResetPrivilege( xRunningPrivileged ); @@ -698,7 +699,7 @@ BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t pxQueue ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); UBaseType_t uxReturn; uxReturn = uxQueueMessagesWaiting( pxQueue ); @@ -709,7 +710,7 @@ UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t pxQueue ) /* FREERTO UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); UBaseType_t uxReturn; uxReturn = uxQueueSpacesAvailable( xQueue ); @@ -760,7 +761,7 @@ BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) /* FREERTOS_SYSTEM_CALL */ { BaseType_t xRunningPrivileged = xPortRaisePrivilege(); - void * xReturn; + void * xReturn; xReturn = xQueueGetMutexHolder( xSemaphore ); vPortResetPrivilege( xRunningPrivileged ); @@ -773,7 +774,7 @@ BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, QueueHandle_t MPU_xQueueCreateMutex( const uint8_t ucQueueType ) /* FREERTOS_SYSTEM_CALL */ { QueueHandle_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); xReturn = xQueueCreateMutex( ucQueueType ); vPortResetPrivilege( xRunningPrivileged ); @@ -787,7 +788,7 @@ BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, StaticQueue_t * pxStaticQueue ) /* FREERTOS_SYSTEM_CALL */ { QueueHandle_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); xReturn = xQueueCreateMutexStatic( ucQueueType, pxStaticQueue ); vPortResetPrivilege( xRunningPrivileged ); @@ -801,7 +802,7 @@ BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, UBaseType_t uxInitialCount ) /* FREERTOS_SYSTEM_CALL */ { QueueHandle_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); xReturn = xQueueCreateCountingSemaphore( uxCountValue, uxInitialCount ); vPortResetPrivilege( xRunningPrivileged ); @@ -817,7 +818,7 @@ BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, StaticQueue_t * pxStaticQueue ) /* FREERTOS_SYSTEM_CALL */ { QueueHandle_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); xReturn = xQueueCreateCountingSemaphoreStatic( uxMaxCount, uxInitialCount, pxStaticQueue ); vPortResetPrivilege( xRunningPrivileged ); @@ -857,7 +858,7 @@ BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, QueueSetHandle_t MPU_xQueueCreateSet( UBaseType_t uxEventQueueLength ) /* FREERTOS_SYSTEM_CALL */ { QueueSetHandle_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); xReturn = xQueueCreateSet( uxEventQueueLength ); vPortResetPrivilege( xRunningPrivileged ); @@ -871,7 +872,7 @@ BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, TickType_t xBlockTimeTicks ) /* FREERTOS_SYSTEM_CALL */ { QueueSetMemberHandle_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); xReturn = xQueueSelectFromSet( xQueueSet, xBlockTimeTicks ); vPortResetPrivilege( xRunningPrivileged ); @@ -936,7 +937,7 @@ BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, #if configQUEUE_REGISTRY_SIZE > 0 const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); const char * pcReturn; pcReturn = pcQueueGetName( xQueue ); @@ -960,7 +961,7 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ #if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) void * MPU_pvPortMalloc( size_t xSize ) /* FREERTOS_SYSTEM_CALL */ { - void * pvReturn; + void * pvReturn; BaseType_t xRunningPrivileged = xPortRaisePrivilege(); pvReturn = pvPortMalloc( xSize ); @@ -999,7 +1000,7 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ #if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) size_t MPU_xPortGetFreeHeapSize( void ) /* FREERTOS_SYSTEM_CALL */ { - size_t xReturn; + size_t xReturn; BaseType_t xRunningPrivileged = xPortRaisePrivilege(); xReturn = xPortGetFreeHeapSize(); @@ -1019,7 +1020,7 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ TimerCallbackFunction_t pxCallbackFunction ) /* FREERTOS_SYSTEM_CALL */ { TimerHandle_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); xReturn = xTimerCreate( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction ); vPortResetPrivilege( xRunningPrivileged ); @@ -1038,7 +1039,7 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ StaticTimer_t * pxTimerBuffer ) /* FREERTOS_SYSTEM_CALL */ { TimerHandle_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); xReturn = xTimerCreateStatic( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction, pxTimerBuffer ); vPortResetPrivilege( xRunningPrivileged ); @@ -1051,7 +1052,7 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ #if ( configUSE_TIMERS == 1 ) void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) /* FREERTOS_SYSTEM_CALL */ { - void * pvReturn; + void * pvReturn; BaseType_t xRunningPrivileged = xPortRaisePrivilege(); pvReturn = pvTimerGetTimerID( xTimer ); @@ -1092,7 +1093,7 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) /* FREERTOS_SYSTEM_CALL */ { TaskHandle_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); xReturn = xTimerGetTimerDaemonTaskHandle(); vPortResetPrivilege( xRunningPrivileged ); @@ -1134,7 +1135,7 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ #if ( configUSE_TIMERS == 1 ) UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) { - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); UBaseType_t uxReturn; uxReturn = uxTimerGetReloadMode( xTimer ); @@ -1148,7 +1149,7 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) /* FREERTOS_SYSTEM_CALL */ { const char * pcReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); pcReturn = pcTimerGetName( xTimer ); vPortResetPrivilege( xRunningPrivileged ); @@ -1208,7 +1209,7 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ EventGroupHandle_t MPU_xEventGroupCreate( void ) /* FREERTOS_SYSTEM_CALL */ { EventGroupHandle_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); xReturn = xEventGroupCreate(); vPortResetPrivilege( xRunningPrivileged ); @@ -1222,7 +1223,7 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */ EventGroupHandle_t MPU_xEventGroupCreateStatic( StaticEventGroup_t * pxEventGroupBuffer ) /* FREERTOS_SYSTEM_CALL */ { EventGroupHandle_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); xReturn = xEventGroupCreateStatic( pxEventGroupBuffer ); vPortResetPrivilege( xRunningPrivileged ); @@ -1239,7 +1240,7 @@ EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */ { EventBits_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); xReturn = xEventGroupWaitBits( xEventGroup, uxBitsToWaitFor, xClearOnExit, xWaitForAllBits, xTicksToWait ); vPortResetPrivilege( xRunningPrivileged ); @@ -1252,7 +1253,7 @@ EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear ) /* FREERTOS_SYSTEM_CALL */ { EventBits_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); xReturn = xEventGroupClearBits( xEventGroup, uxBitsToClear ); vPortResetPrivilege( xRunningPrivileged ); @@ -1265,7 +1266,7 @@ EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet ) /* FREERTOS_SYSTEM_CALL */ { EventBits_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); xReturn = xEventGroupSetBits( xEventGroup, uxBitsToSet ); vPortResetPrivilege( xRunningPrivileged ); @@ -1280,7 +1281,7 @@ EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */ { EventBits_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); xReturn = xEventGroupSync( xEventGroup, uxBitsToSet, uxBitsToWaitFor, xTicksToWait ); vPortResetPrivilege( xRunningPrivileged ); @@ -1303,7 +1304,7 @@ size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, size_t xDataLengthBytes, TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */ { - size_t xReturn; + size_t xReturn; BaseType_t xRunningPrivileged = xPortRaisePrivilege(); xReturn = xStreamBufferSend( xStreamBuffer, pvTxData, xDataLengthBytes, xTicksToWait ); @@ -1315,7 +1316,7 @@ size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) /* FREERTOS_SYSTEM_CALL */ { - size_t xReturn; + size_t xReturn; BaseType_t xRunningPrivileged = xPortRaisePrivilege(); xReturn = xStreamBufferNextMessageLengthBytes( xStreamBuffer ); @@ -1330,7 +1331,7 @@ size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, size_t xBufferLengthBytes, TickType_t xTicksToWait ) /* FREERTOS_SYSTEM_CALL */ { - size_t xReturn; + size_t xReturn; BaseType_t xRunningPrivileged = xPortRaisePrivilege(); xReturn = xStreamBufferReceive( xStreamBuffer, pvRxData, xBufferLengthBytes, xTicksToWait ); @@ -1387,7 +1388,7 @@ BaseType_t MPU_xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) /* FREER size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) /* FREERTOS_SYSTEM_CALL */ { - size_t xReturn; + size_t xReturn; BaseType_t xRunningPrivileged = xPortRaisePrivilege(); xReturn = xStreamBufferSpacesAvailable( xStreamBuffer ); @@ -1399,7 +1400,7 @@ size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) /* size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) /* FREERTOS_SYSTEM_CALL */ { - size_t xReturn; + size_t xReturn; BaseType_t xRunningPrivileged = xPortRaisePrivilege(); xReturn = xStreamBufferBytesAvailable( xStreamBuffer ); @@ -1428,7 +1429,7 @@ BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, BaseType_t xIsMessageBuffer ) /* FREERTOS_SYSTEM_CALL */ { StreamBufferHandle_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); xReturn = xStreamBufferGenericCreate( xBufferSizeBytes, xTriggerLevelBytes, xIsMessageBuffer ); vPortResetPrivilege( xRunningPrivileged ); @@ -1446,7 +1447,7 @@ BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, StaticStreamBuffer_t * const pxStaticStreamBuffer ) /* FREERTOS_SYSTEM_CALL */ { StreamBufferHandle_t xReturn; - BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); xReturn = xStreamBufferGenericCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, xIsMessageBuffer, pucStreamBufferStorageArea, pxStaticStreamBuffer ); vPortResetPrivilege( xRunningPrivileged ); diff --git a/portable/GCC/ARM7_AT91FR40008/port.c b/portable/GCC/ARM7_AT91FR40008/port.c index 15ca269d4..4697b4ea5 100644 --- a/portable/GCC/ARM7_AT91FR40008/port.c +++ b/portable/GCC/ARM7_AT91FR40008/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ @@ -179,16 +180,16 @@ static void prvSetupTimerInterrupt( void ) volatile uint32_t ulDummy; /* Enable clock to the tick timer... */ - AT91C_BASE_PS->PS_PCER = portTIMER_CLK_ENABLE_BIT; + AT91C_BASE_PS->PS_PCER = portTIMER_CLK_ENABLE_BIT; /* Stop the tick timer... */ - portTIMER_REG_BASE_PTR->TC_CCR = TC_CLKDIS; + portTIMER_REG_BASE_PTR->TC_CCR = TC_CLKDIS; /* Start with tick timer interrupts disabled... */ - portTIMER_REG_BASE_PTR->TC_IDR = 0xFFFFFFFF; + portTIMER_REG_BASE_PTR->TC_IDR = 0xFFFFFFFF; /* Clear any pending tick timer interrupts... */ - ulDummy = portTIMER_REG_BASE_PTR->TC_SR; + ulDummy = portTIMER_REG_BASE_PTR->TC_SR; /* Store interrupt handler function address in tick timer vector register... * The ISR installed depends on whether the preemptive or cooperative @@ -211,10 +212,10 @@ static void prvSetupTimerInterrupt( void ) /* Enable the tick timer interrupt... * * First at timer level */ - portTIMER_REG_BASE_PTR->TC_IER = TC_CPCS; + portTIMER_REG_BASE_PTR->TC_IER = TC_CPCS; /* Then at the AIC level. */ - AT91C_BASE_AIC->AIC_IECR = ( 1 << portTIMER_AIC_CHANNEL ); + AT91C_BASE_AIC->AIC_IECR = ( 1 << portTIMER_AIC_CHANNEL ); /* Calculate timer compare value to achieve the desired tick rate... */ if( ( configCPU_CLOCK_HZ / ( configTICK_RATE_HZ * 2 ) ) <= 0xFFFF ) @@ -222,17 +223,17 @@ static void prvSetupTimerInterrupt( void ) /* The tick rate is fast enough for us to use the faster timer input * clock (main clock / 2). */ portTIMER_REG_BASE_PTR->TC_CMR = TC_WAVE | TC_CLKS_MCK2 | TC_BURST_NONE | TC_CPCTRG; - portTIMER_REG_BASE_PTR->TC_RC = configCPU_CLOCK_HZ / ( configTICK_RATE_HZ * 2 ); + portTIMER_REG_BASE_PTR->TC_RC = configCPU_CLOCK_HZ / ( configTICK_RATE_HZ * 2 ); } else { /* We must use a slower timer input clock (main clock / 8) because the * tick rate is too slow for the faster input clock. */ portTIMER_REG_BASE_PTR->TC_CMR = TC_WAVE | TC_CLKS_MCK8 | TC_BURST_NONE | TC_CPCTRG; - portTIMER_REG_BASE_PTR->TC_RC = configCPU_CLOCK_HZ / ( configTICK_RATE_HZ * 8 ); + portTIMER_REG_BASE_PTR->TC_RC = configCPU_CLOCK_HZ / ( configTICK_RATE_HZ * 8 ); } /* Start tick timer... */ - portTIMER_REG_BASE_PTR->TC_CCR = TC_SWTRG | TC_CLKEN; + portTIMER_REG_BASE_PTR->TC_CCR = TC_SWTRG | TC_CLKEN; } /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM7_AT91FR40008/portISR.c b/portable/GCC/ARM7_AT91FR40008/portISR.c index 9dac184ab..7f4bb42cb 100644 --- a/portable/GCC/ARM7_AT91FR40008/portISR.c +++ b/portable/GCC/ARM7_AT91FR40008/portISR.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ @@ -111,7 +112,7 @@ void vPortYieldProcessor( void ) static volatile uint32_t ulDummy; /* Clear tick timer interrupt indication. */ - ulDummy = portTIMER_REG_BASE_PTR->TC_SR; + ulDummy = portTIMER_REG_BASE_PTR->TC_SR; xTaskIncrementTick(); @@ -134,7 +135,7 @@ void vPortYieldProcessor( void ) static volatile uint32_t ulDummy; /* Clear tick timer interrupt indication. */ - ulDummy = portTIMER_REG_BASE_PTR->TC_SR; + ulDummy = portTIMER_REG_BASE_PTR->TC_SR; /* Increment the RTOS tick count, then look for the highest priority * task that is ready to run. */ diff --git a/portable/GCC/ARM7_AT91FR40008/portmacro.h b/portable/GCC/ARM7_AT91FR40008/portmacro.h index 472e085d4..6eedc16c3 100644 --- a/portable/GCC/ARM7_AT91FR40008/portmacro.h +++ b/portable/GCC/ARM7_AT91FR40008/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* @@ -115,7 +116,7 @@ #define portRESTORE_CONTEXT() \ { \ extern volatile void * volatile pxCurrentTCB; \ - extern volatile uint32_t ulCriticalNesting; \ + extern volatile uint32_t ulCriticalNesting; \ \ /* Set the LR to the task stack. */ \ asm volatile ( \ @@ -152,7 +153,7 @@ #define portSAVE_CONTEXT() \ { \ extern volatile void * volatile pxCurrentTCB; \ - extern volatile uint32_t ulCriticalNesting; \ + extern volatile uint32_t ulCriticalNesting; \ \ /* Push R0 as we are going to use the register. */ \ asm volatile ( \ diff --git a/portable/GCC/ARM7_AT91SAM7S/AT91SAM7X256.h b/portable/GCC/ARM7_AT91SAM7S/AT91SAM7X256.h index 5e42014a9..51d5fcab9 100644 --- a/portable/GCC/ARM7_AT91SAM7S/AT91SAM7X256.h +++ b/portable/GCC/ARM7_AT91SAM7S/AT91SAM7X256.h @@ -2744,15 +2744,15 @@ typedef struct _AT91S_TDES { \ unsigned int mask; \ \ - mask = 0x1 << irq_id; \ + mask = 0x1 << irq_id; \ /* Disable the interrupt on the interrupt controller */ \ - AT91C_BASE_AIC->AIC_IDCR = mask; \ + AT91C_BASE_AIC->AIC_IDCR = mask; \ /* Save the interrupt handler routine pointer and the interrupt priority */ \ AT91C_BASE_AIC->AIC_SVR[ irq_id ] = ( unsigned int ) newHandler; \ /* Store the Source Mode Register */ \ AT91C_BASE_AIC->AIC_SMR[ irq_id ] = src_type | priority; \ /* Clear the interrupt on the interrupt controller */ \ - AT91C_BASE_AIC->AIC_ICCR = mask; \ + AT91C_BASE_AIC->AIC_ICCR = mask; \ } diff --git a/portable/GCC/ARM7_AT91SAM7S/ioat91sam7x256.h b/portable/GCC/ARM7_AT91SAM7S/ioat91sam7x256.h index 9bab5d359..654878227 100644 --- a/portable/GCC/ARM7_AT91SAM7S/ioat91sam7x256.h +++ b/portable/GCC/ARM7_AT91SAM7S/ioat91sam7x256.h @@ -2753,46 +2753,46 @@ typedef struct _AT91S_TDES /* - ***************************************************************************** */ /* - -------- AIC_SMR : (AIC Offset: 0x0) Control Register -------- */ #if 0 /*_RB_*/ - AT91C_AIC_PRIOR EQU( 0x7 << 0 ); + AT91C_AIC_PRIOR EQU( 0x7 << 0 ); - ( AIC ) Priority Level - AT91C_AIC_PRIOR_LOWEST EQU( 0x0 ); + AT91C_AIC_PRIOR_LOWEST EQU( 0x0 ); - ( AIC ) Lowest priority level - AT91C_AIC_PRIOR_HIGHEST EQU( 0x7 ); + AT91C_AIC_PRIOR_HIGHEST EQU( 0x7 ); - ( AIC ) Highest priority level - AT91C_AIC_SRCTYPE EQU( 0x3 << 5 ); + AT91C_AIC_SRCTYPE EQU( 0x3 << 5 ); - ( AIC ) Interrupt Source Type - AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL EQU( 0x0 << 5 ); + AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL EQU( 0x0 << 5 ); - ( AIC ) Internal Sources Code Label High - level Sensitive - AT91C_AIC_SRCTYPE_EXT_LOW_LEVEL EQU( 0x0 << 5 ); + AT91C_AIC_SRCTYPE_EXT_LOW_LEVEL EQU( 0x0 << 5 ); - ( AIC ) External Sources Code Label Low - level Sensitive AT91C_AIC_SRCTYPE_INT_POSITIVE_EDGE EQU( 0x1 << 5 ); - ( AIC ) Internal Sources Code Label Positive Edge triggered AT91C_AIC_SRCTYPE_EXT_NEGATIVE_EDGE EQU( 0x1 << 5 ); - ( AIC ) External Sources Code Label Negative Edge triggered - AT91C_AIC_SRCTYPE_HIGH_LEVEL EQU( 0x2 << 5 ); + AT91C_AIC_SRCTYPE_HIGH_LEVEL EQU( 0x2 << 5 ); - ( AIC ) Internal Or External Sources Code Label High - level Sensitive - AT91C_AIC_SRCTYPE_POSITIVE_EDGE EQU( 0x3 << 5 ); + AT91C_AIC_SRCTYPE_POSITIVE_EDGE EQU( 0x3 << 5 ); - ( AIC ) Internal Or External Sources Code Label Positive Edge triggered /* - -------- AIC_CISR : (AIC Offset: 0x114) AIC Core Interrupt Status Register -------- */ - AT91C_AIC_NFIQ EQU( 0x1 << 0 ); + AT91C_AIC_NFIQ EQU( 0x1 << 0 ); - ( AIC ) NFIQ Status - AT91C_AIC_NIRQ EQU( 0x1 << 1 ); + AT91C_AIC_NIRQ EQU( 0x1 << 1 ); - ( AIC ) NIRQ Status /* - -------- AIC_DCR : (AIC Offset: 0x138) AIC Debug Control Register (Protect) -------- */ - AT91C_AIC_DCR_PROT EQU( 0x1 << 0 ); + AT91C_AIC_DCR_PROT EQU( 0x1 << 0 ); - ( AIC ) Protection Mode - AT91C_AIC_DCR_GMSK EQU( 0x1 << 1 ); + AT91C_AIC_DCR_GMSK EQU( 0x1 << 1 ); - ( AIC ) General Mask #endif /* if 0 */ /* - ***************************************************************************** */ /* - SOFTWARE API DEFINITION FOR Peripheral DMA Controller */ /* - ***************************************************************************** */ /* - -------- PDC_PTCR : (PDC Offset: 0x20) PDC Transfer Control Register -------- */ -AT91C_PDC_RXTEN EQU( 0x1 << 0 ); +AT91C_PDC_RXTEN EQU( 0x1 << 0 ); - ( PDC ) Receiver Transfer Enable AT91C_PDC_RXTDIS EQU( 0x1 << 1 ); - ( PDC ) Receiver Transfer Disable - AT91C_PDC_TXTEN EQU( 0x1 << 8 ); + AT91C_PDC_TXTEN EQU( 0x1 << 8 ); - ( PDC ) Transmitter Transfer Enable AT91C_PDC_TXTDIS EQU( 0x1 << 9 ); - ( PDC ) Transmitter Transfer Disable @@ -2802,69 +2802,69 @@ AT91C_PDC_RXTEN EQU( 0x1 << 0 ); /* - SOFTWARE API DEFINITION FOR Debug Unit */ /* - ***************************************************************************** */ /* - -------- DBGU_CR : (DBGU Offset: 0x0) Debug Unit Control Register -------- */ - AT91C_US_RSTRX EQU( 0x1 << 2 ); + AT91C_US_RSTRX EQU( 0x1 << 2 ); - ( DBGU ) Reset Receiver - AT91C_US_RSTTX EQU( 0x1 << 3 ); + AT91C_US_RSTTX EQU( 0x1 << 3 ); - ( DBGU ) Reset Transmitter - AT91C_US_RXEN EQU( 0x1 << 4 ); + AT91C_US_RXEN EQU( 0x1 << 4 ); - ( DBGU ) Receiver Enable - AT91C_US_RXDIS EQU( 0x1 << 5 ); + AT91C_US_RXDIS EQU( 0x1 << 5 ); - ( DBGU ) Receiver Disable - AT91C_US_TXEN EQU( 0x1 << 6 ); + AT91C_US_TXEN EQU( 0x1 << 6 ); - ( DBGU ) Transmitter Enable - AT91C_US_TXDIS EQU( 0x1 << 7 ); + AT91C_US_TXDIS EQU( 0x1 << 7 ); - ( DBGU ) Transmitter Disable - AT91C_US_RSTSTA EQU( 0x1 << 8 ); + AT91C_US_RSTSTA EQU( 0x1 << 8 ); - ( DBGU ) Reset Status Bits /* - -------- DBGU_MR : (DBGU Offset: 0x4) Debug Unit Mode Register -------- */ - AT91C_US_PAR EQU( 0x7 << 9 ); + AT91C_US_PAR EQU( 0x7 << 9 ); - ( DBGU ) Parity type - AT91C_US_PAR_EVEN EQU( 0x0 << 9 ); + AT91C_US_PAR_EVEN EQU( 0x0 << 9 ); - ( DBGU ) Even Parity - AT91C_US_PAR_ODD EQU( 0x1 << 9 ); + AT91C_US_PAR_ODD EQU( 0x1 << 9 ); - ( DBGU ) Odd Parity - AT91C_US_PAR_SPACE EQU( 0x2 << 9 ); + AT91C_US_PAR_SPACE EQU( 0x2 << 9 ); - ( DBGU ) Parity forced to 0 ( Space ) - AT91C_US_PAR_MARK EQU( 0x3 << 9 ); + AT91C_US_PAR_MARK EQU( 0x3 << 9 ); - ( DBGU ) Parity forced to 1 ( Mark ) - AT91C_US_PAR_NONE EQU( 0x4 << 9 ); + AT91C_US_PAR_NONE EQU( 0x4 << 9 ); - ( DBGU ) No Parity - AT91C_US_PAR_MULTI_DROP EQU( 0x6 << 9 ); + AT91C_US_PAR_MULTI_DROP EQU( 0x6 << 9 ); - ( DBGU ) Multi - drop mode - AT91C_US_CHMODE EQU( 0x3 << 14 ); + AT91C_US_CHMODE EQU( 0x3 << 14 ); - ( DBGU ) Channel Mode - AT91C_US_CHMODE_NORMAL EQU( 0x0 << 14 ); + AT91C_US_CHMODE_NORMAL EQU( 0x0 << 14 ); - ( DBGU ) Normal Mode: The USART channel operates as an RX / TX USART. - AT91C_US_CHMODE_AUTO EQU( 0x1 << 14 ); + AT91C_US_CHMODE_AUTO EQU( 0x1 << 14 ); - ( DBGU ) Automatic Echo: Receiver Data Input is connected to the TXD pin. - AT91C_US_CHMODE_LOCAL EQU( 0x2 << 14 ); + AT91C_US_CHMODE_LOCAL EQU( 0x2 << 14 ); - ( DBGU ) Local Loopback: Transmitter Output Signal is connected to Receiver Input Signal. AT91C_US_CHMODE_REMOTE EQU( 0x3 << 14 ); - ( DBGU ) Remote Loopback: RXD pin is internally connected to TXD pin. /* - -------- DBGU_IER : (DBGU Offset: 0x8) Debug Unit Interrupt Enable Register -------- */ - AT91C_US_RXRDY EQU( 0x1 << 0 ); + AT91C_US_RXRDY EQU( 0x1 << 0 ); - ( DBGU ) RXRDY Interrupt - AT91C_US_TXRDY EQU( 0x1 << 1 ); + AT91C_US_TXRDY EQU( 0x1 << 1 ); - ( DBGU ) TXRDY Interrupt - AT91C_US_ENDRX EQU( 0x1 << 3 ); + AT91C_US_ENDRX EQU( 0x1 << 3 ); - ( DBGU ) End of Receive Transfer Interrupt - AT91C_US_ENDTX EQU( 0x1 << 4 ); + AT91C_US_ENDTX EQU( 0x1 << 4 ); - ( DBGU ) End of Transmit Interrupt - AT91C_US_OVRE EQU( 0x1 << 5 ); + AT91C_US_OVRE EQU( 0x1 << 5 ); - ( DBGU ) Overrun Interrupt - AT91C_US_FRAME EQU( 0x1 << 6 ); + AT91C_US_FRAME EQU( 0x1 << 6 ); - ( DBGU ) Framing Error Interrupt - AT91C_US_PARE EQU( 0x1 << 7 ); + AT91C_US_PARE EQU( 0x1 << 7 ); - ( DBGU ) Parity Error Interrupt - AT91C_US_TXEMPTY EQU( 0x1 << 9 ); + AT91C_US_TXEMPTY EQU( 0x1 << 9 ); - ( DBGU ) TXEMPTY Interrupt - AT91C_US_TXBUFE EQU( 0x1 << 11 ); + AT91C_US_TXBUFE EQU( 0x1 << 11 ); - ( DBGU ) TXBUFE Interrupt - AT91C_US_RXBUFF EQU( 0x1 << 12 ); + AT91C_US_RXBUFF EQU( 0x1 << 12 ); - ( DBGU ) RXBUFF Interrupt - AT91C_US_COMM_TX EQU( 0x1 << 30 ); + AT91C_US_COMM_TX EQU( 0x1 << 30 ); - ( DBGU ) COMM_TX Interrupt - AT91C_US_COMM_RX EQU( 0x1 << 31 ); + AT91C_US_COMM_RX EQU( 0x1 << 31 ); - ( DBGU ) COMM_RX Interrupt /* - -------- DBGU_IDR : (DBGU Offset: 0xc) Debug Unit Interrupt Disable Register -------- */ /* - -------- DBGU_IMR : (DBGU Offset: 0x10) Debug Unit Interrupt Mask Register -------- */ @@ -2881,54 +2881,54 @@ AT91C_PDC_RXTEN EQU( 0x1 << 0 ); /* - SOFTWARE API DEFINITION FOR Clock Generator Controler */ /* - ***************************************************************************** */ /* - -------- CKGR_MOR : (CKGR Offset: 0x0) Main Oscillator Register -------- */ - AT91C_CKGR_MOSCEN EQU( 0x1 << 0 ); + AT91C_CKGR_MOSCEN EQU( 0x1 << 0 ); - ( CKGR ) Main Oscillator Enable - AT91C_CKGR_OSCBYPASS EQU( 0x1 << 1 ); + AT91C_CKGR_OSCBYPASS EQU( 0x1 << 1 ); - ( CKGR ) Main Oscillator Bypass - AT91C_CKGR_OSCOUNT EQU( 0xFF << 8 ); + AT91C_CKGR_OSCOUNT EQU( 0xFF << 8 ); - ( CKGR ) Main Oscillator Start - up Time /* - -------- CKGR_MCFR : (CKGR Offset: 0x4) Main Clock Frequency Register -------- */ - AT91C_CKGR_MAINF EQU( 0xFFFF << 0 ); + AT91C_CKGR_MAINF EQU( 0xFFFF << 0 ); - ( CKGR ) Main Clock Frequency - AT91C_CKGR_MAINRDY EQU( 0x1 << 16 ); + AT91C_CKGR_MAINRDY EQU( 0x1 << 16 ); - ( CKGR ) Main Clock Ready /* - -------- CKGR_PLLR : (CKGR Offset: 0xc) PLL B Register -------- */ - AT91C_CKGR_DIV EQU( 0xFF << 0 ); + AT91C_CKGR_DIV EQU( 0xFF << 0 ); - ( CKGR ) Divider Selected - AT91C_CKGR_DIV_0 EQU( 0x0 ); + AT91C_CKGR_DIV_0 EQU( 0x0 ); - ( CKGR ) Divider output is 0 AT91C_CKGR_DIV_BYPASS EQU( 0x1 ); - ( CKGR ) Divider is bypassed - AT91C_CKGR_PLLCOUNT EQU( 0x3F << 8 ); + AT91C_CKGR_PLLCOUNT EQU( 0x3F << 8 ); - ( CKGR ) PLL Counter - AT91C_CKGR_OUT EQU( 0x3 << 14 ); + AT91C_CKGR_OUT EQU( 0x3 << 14 ); - ( CKGR ) PLL Output Frequency Range - AT91C_CKGR_OUT_0 EQU( 0x0 << 14 ); + AT91C_CKGR_OUT_0 EQU( 0x0 << 14 ); - ( CKGR ) Please refer to the PLL datasheet - AT91C_CKGR_OUT_1 EQU( 0x1 << 14 ); + AT91C_CKGR_OUT_1 EQU( 0x1 << 14 ); - ( CKGR ) Please refer to the PLL datasheet - AT91C_CKGR_OUT_2 EQU( 0x2 << 14 ); + AT91C_CKGR_OUT_2 EQU( 0x2 << 14 ); - ( CKGR ) Please refer to the PLL datasheet - AT91C_CKGR_OUT_3 EQU( 0x3 << 14 ); + AT91C_CKGR_OUT_3 EQU( 0x3 << 14 ); - ( CKGR ) Please refer to the PLL datasheet - AT91C_CKGR_MUL EQU( 0x7FF << 16 ); + AT91C_CKGR_MUL EQU( 0x7FF << 16 ); - ( CKGR ) PLL Multiplier - AT91C_CKGR_USBDIV EQU( 0x3 << 28 ); + AT91C_CKGR_USBDIV EQU( 0x3 << 28 ); - ( CKGR ) Divider for USB Clocks - AT91C_CKGR_USBDIV_0 EQU( 0x0 << 28 ); + AT91C_CKGR_USBDIV_0 EQU( 0x0 << 28 ); - ( CKGR ) Divider output is PLL clock output - AT91C_CKGR_USBDIV_1 EQU( 0x1 << 28 ); + AT91C_CKGR_USBDIV_1 EQU( 0x1 << 28 ); - ( CKGR ) Divider output is PLL clock output divided by 2 - AT91C_CKGR_USBDIV_2 EQU( 0x2 << 28 ); + AT91C_CKGR_USBDIV_2 EQU( 0x2 << 28 ); - ( CKGR ) Divider output is PLL clock output divided by 4 /* - ***************************************************************************** */ /* - SOFTWARE API DEFINITION FOR Power Management Controler */ /* - ***************************************************************************** */ /* - -------- PMC_SCER : (PMC Offset: 0x0) System Clock Enable Register -------- */ - AT91C_PMC_PCK EQU( 0x1 << 0 ); + AT91C_PMC_PCK EQU( 0x1 << 0 ); - ( PMC ) Processor Clock - AT91C_PMC_UDP EQU( 0x1 << 7 ); + AT91C_PMC_UDP EQU( 0x1 << 7 ); - ( PMC ) USB Device Port Clock AT91C_PMC_PCK0 EQU( 0x1 << 8 ); - ( PMC ) Programmable Clock Output @@ -2944,45 +2944,45 @@ AT91C_PDC_RXTEN EQU( 0x1 << 0 ); /* - -------- CKGR_MCFR : (PMC Offset: 0x24) Main Clock Frequency Register -------- */ /* - -------- CKGR_PLLR : (PMC Offset: 0x2c) PLL B Register -------- */ /* - -------- PMC_MCKR : (PMC Offset: 0x30) Master Clock Register -------- */ - AT91C_PMC_CSS EQU( 0x3 << 0 ); + AT91C_PMC_CSS EQU( 0x3 << 0 ); - ( PMC ) Programmable Clock Selection AT91C_PMC_CSS_SLOW_CLK EQU( 0x0 ); - ( PMC ) Slow Clock is selected AT91C_PMC_CSS_MAIN_CLK EQU( 0x1 ); - ( PMC ) Main Clock is selected - AT91C_PMC_CSS_PLL_CLK EQU( 0x3 ); + AT91C_PMC_CSS_PLL_CLK EQU( 0x3 ); - ( PMC ) Clock from PLL is selected - AT91C_PMC_PRES EQU( 0x7 << 2 ); + AT91C_PMC_PRES EQU( 0x7 << 2 ); - ( PMC ) Programmable Clock Prescaler - AT91C_PMC_PRES_CLK EQU( 0x0 << 2 ); + AT91C_PMC_PRES_CLK EQU( 0x0 << 2 ); - ( PMC ) Selected clock - AT91C_PMC_PRES_CLK_2 EQU( 0x1 << 2 ); + AT91C_PMC_PRES_CLK_2 EQU( 0x1 << 2 ); - ( PMC ) Selected clock divided by 2 - AT91C_PMC_PRES_CLK_4 EQU( 0x2 << 2 ); + AT91C_PMC_PRES_CLK_4 EQU( 0x2 << 2 ); - ( PMC ) Selected clock divided by 4 - AT91C_PMC_PRES_CLK_8 EQU( 0x3 << 2 ); + AT91C_PMC_PRES_CLK_8 EQU( 0x3 << 2 ); - ( PMC ) Selected clock divided by 8 - AT91C_PMC_PRES_CLK_16 EQU( 0x4 << 2 ); + AT91C_PMC_PRES_CLK_16 EQU( 0x4 << 2 ); - ( PMC ) Selected clock divided by 16 - AT91C_PMC_PRES_CLK_32 EQU( 0x5 << 2 ); + AT91C_PMC_PRES_CLK_32 EQU( 0x5 << 2 ); - ( PMC ) Selected clock divided by 32 - AT91C_PMC_PRES_CLK_64 EQU( 0x6 << 2 ); + AT91C_PMC_PRES_CLK_64 EQU( 0x6 << 2 ); - ( PMC ) Selected clock divided by 64 /* - -------- PMC_PCKR : (PMC Offset: 0x40) Programmable Clock Register -------- */ /* - -------- PMC_IER : (PMC Offset: 0x60) PMC Interrupt Enable Register -------- */ - AT91C_PMC_MOSCS EQU( 0x1 << 0 ); + AT91C_PMC_MOSCS EQU( 0x1 << 0 ); - ( PMC ) MOSC Status / Enable / Disable / Mask - AT91C_PMC_LOCK EQU( 0x1 << 2 ); + AT91C_PMC_LOCK EQU( 0x1 << 2 ); - ( PMC ) PLL Status / Enable / Disable / Mask - AT91C_PMC_MCKRDY EQU( 0x1 << 3 ); + AT91C_PMC_MCKRDY EQU( 0x1 << 3 ); - ( PMC ) MCK_RDY Status / Enable / Disable / Mask - AT91C_PMC_PCK0RDY EQU( 0x1 << 8 ); + AT91C_PMC_PCK0RDY EQU( 0x1 << 8 ); - ( PMC ) PCK0_RDY Status / Enable / Disable / Mask - AT91C_PMC_PCK1RDY EQU( 0x1 << 9 ); + AT91C_PMC_PCK1RDY EQU( 0x1 << 9 ); - ( PMC ) PCK1_RDY Status / Enable / Disable / Mask - AT91C_PMC_PCK2RDY EQU( 0x1 << 10 ); + AT91C_PMC_PCK2RDY EQU( 0x1 << 10 ); - ( PMC ) PCK2_RDY Status / Enable / Disable / Mask - AT91C_PMC_PCK3RDY EQU( 0x1 << 11 ); + AT91C_PMC_PCK3RDY EQU( 0x1 << 11 ); - ( PMC ) PCK3_RDY Status / Enable / Disable / Mask /* - -------- PMC_IDR : (PMC Offset: 0x64) PMC Interrupt Disable Register -------- */ /* - -------- PMC_SR : (PMC Offset: 0x68) PMC Status Register -------- */ @@ -2992,88 +2992,88 @@ AT91C_PDC_RXTEN EQU( 0x1 << 0 ); /* - SOFTWARE API DEFINITION FOR Reset Controller Interface */ /* - ***************************************************************************** */ /* - -------- RSTC_RCR : (RSTC Offset: 0x0) Reset Control Register -------- */ - AT91C_RSTC_PROCRST EQU( 0x1 << 0 ); + AT91C_RSTC_PROCRST EQU( 0x1 << 0 ); - ( RSTC ) Processor Reset - AT91C_RSTC_PERRST EQU( 0x1 << 2 ); + AT91C_RSTC_PERRST EQU( 0x1 << 2 ); - ( RSTC ) Peripheral Reset - AT91C_RSTC_EXTRST EQU( 0x1 << 3 ); + AT91C_RSTC_EXTRST EQU( 0x1 << 3 ); - ( RSTC ) External Reset - AT91C_RSTC_KEY EQU( 0xFF << 24 ); + AT91C_RSTC_KEY EQU( 0xFF << 24 ); - ( RSTC ) Password /* - -------- RSTC_RSR : (RSTC Offset: 0x4) Reset Status Register -------- */ - AT91C_RSTC_URSTS EQU( 0x1 << 0 ); + AT91C_RSTC_URSTS EQU( 0x1 << 0 ); - ( RSTC ) User Reset Status - AT91C_RSTC_BODSTS EQU( 0x1 << 1 ); + AT91C_RSTC_BODSTS EQU( 0x1 << 1 ); - ( RSTC ) Brownout Detection Status - AT91C_RSTC_RSTTYP EQU( 0x7 << 8 ); + AT91C_RSTC_RSTTYP EQU( 0x7 << 8 ); - ( RSTC ) Reset Type - AT91C_RSTC_RSTTYP_POWERUP EQU( 0x0 << 8 ); + AT91C_RSTC_RSTTYP_POWERUP EQU( 0x0 << 8 ); - ( RSTC ) Power - up Reset.VDDCORE rising. - AT91C_RSTC_RSTTYP_WAKEUP EQU( 0x1 << 8 ); + AT91C_RSTC_RSTTYP_WAKEUP EQU( 0x1 << 8 ); - ( RSTC ) WakeUp Reset.VDDCORE rising. AT91C_RSTC_RSTTYP_WATCHDOG EQU( 0x2 << 8 ); - ( RSTC ) Watchdog Reset.Watchdog overflow occured. AT91C_RSTC_RSTTYP_SOFTWARE EQU( 0x3 << 8 ); - ( RSTC ) Software Reset.Processor reset required by the software. - AT91C_RSTC_RSTTYP_USER EQU( 0x4 << 8 ); + AT91C_RSTC_RSTTYP_USER EQU( 0x4 << 8 ); - ( RSTC ) User Reset.NRST pin detected low. AT91C_RSTC_RSTTYP_BROWNOUT EQU( 0x5 << 8 ); - ( RSTC ) Brownout Reset occured. - AT91C_RSTC_NRSTL EQU( 0x1 << 16 ); + AT91C_RSTC_NRSTL EQU( 0x1 << 16 ); - ( RSTC ) NRST pin level - AT91C_RSTC_SRCMP EQU( 0x1 << 17 ); + AT91C_RSTC_SRCMP EQU( 0x1 << 17 ); - ( RSTC ) Software Reset Command in Progress. /* - -------- RSTC_RMR : (RSTC Offset: 0x8) Reset Mode Register -------- */ - AT91C_RSTC_URSTEN EQU( 0x1 << 0 ); + AT91C_RSTC_URSTEN EQU( 0x1 << 0 ); - ( RSTC ) User Reset Enable - AT91C_RSTC_URSTIEN EQU( 0x1 << 4 ); + AT91C_RSTC_URSTIEN EQU( 0x1 << 4 ); - ( RSTC ) User Reset Interrupt Enable - AT91C_RSTC_ERSTL EQU( 0xF << 8 ); + AT91C_RSTC_ERSTL EQU( 0xF << 8 ); - ( RSTC ) User Reset Enable - AT91C_RSTC_BODIEN EQU( 0x1 << 16 ); + AT91C_RSTC_BODIEN EQU( 0x1 << 16 ); - ( RSTC ) Brownout Detection Interrupt Enable /* - ***************************************************************************** */ /* - SOFTWARE API DEFINITION FOR Real Time Timer Controller Interface */ /* - ***************************************************************************** */ /* - -------- RTTC_RTMR : (RTTC Offset: 0x0) Real-time Mode Register -------- */ - AT91C_RTTC_RTPRES EQU( 0xFFFF << 0 ); + AT91C_RTTC_RTPRES EQU( 0xFFFF << 0 ); - ( RTTC ) Real - time Timer Prescaler Value - AT91C_RTTC_ALMIEN EQU( 0x1 << 16 ); + AT91C_RTTC_ALMIEN EQU( 0x1 << 16 ); - ( RTTC ) Alarm Interrupt Enable AT91C_RTTC_RTTINCIEN EQU( 0x1 << 17 ); - ( RTTC ) Real Time Timer Increment Interrupt Enable - AT91C_RTTC_RTTRST EQU( 0x1 << 18 ); + AT91C_RTTC_RTTRST EQU( 0x1 << 18 ); - ( RTTC ) Real Time Timer Restart /* - -------- RTTC_RTAR : (RTTC Offset: 0x4) Real-time Alarm Register -------- */ - AT91C_RTTC_ALMV EQU( 0x0 << 0 ); + AT91C_RTTC_ALMV EQU( 0x0 << 0 ); - ( RTTC ) Alarm Value /* - -------- RTTC_RTVR : (RTTC Offset: 0x8) Current Real-time Value Register -------- */ - AT91C_RTTC_CRTV EQU( 0x0 << 0 ); + AT91C_RTTC_CRTV EQU( 0x0 << 0 ); - ( RTTC ) Current Real - time Value /* - -------- RTTC_RTSR : (RTTC Offset: 0xc) Real-time Status Register -------- */ - AT91C_RTTC_ALMS EQU( 0x1 << 0 ); + AT91C_RTTC_ALMS EQU( 0x1 << 0 ); - ( RTTC ) Real - time Alarm Status - AT91C_RTTC_RTTINC EQU( 0x1 << 1 ); + AT91C_RTTC_RTTINC EQU( 0x1 << 1 ); - ( RTTC ) Real - time Timer Increment /* - ***************************************************************************** */ /* - SOFTWARE API DEFINITION FOR Periodic Interval Timer Controller Interface */ /* - ***************************************************************************** */ /* - -------- PITC_PIMR : (PITC Offset: 0x0) Periodic Interval Mode Register -------- */ - AT91C_PITC_PIV EQU( 0xFFFFF << 0 ); + AT91C_PITC_PIV EQU( 0xFFFFF << 0 ); - ( PITC ) Periodic Interval Value - AT91C_PITC_PITEN EQU( 0x1 << 24 ); + AT91C_PITC_PITEN EQU( 0x1 << 24 ); - ( PITC ) Periodic Interval Timer Enabled AT91C_PITC_PITIEN EQU( 0x1 << 25 ); - ( PITC ) Periodic Interval Timer Interrupt Enable /* - -------- PITC_PISR : (PITC Offset: 0x4) Periodic Interval Status Register -------- */ - AT91C_PITC_PITS EQU( 0x1 << 0 ); + AT91C_PITC_PITS EQU( 0x1 << 0 ); - ( PITC ) Periodic Interval Timer Status /* - -------- PITC_PIVR : (PITC Offset: 0x8) Periodic Interval Value Register -------- */ - AT91C_PITC_CPIV EQU( 0xFFFFF << 0 ); + AT91C_PITC_CPIV EQU( 0xFFFFF << 0 ); - ( PITC ) Current Periodic Interval Value - AT91C_PITC_PICNT EQU( 0xFFF << 20 ); + AT91C_PITC_PICNT EQU( 0xFFF << 20 ); - ( PITC ) Periodic Interval Counter /* - -------- PITC_PIIR : (PITC Offset: 0xc) Periodic Interval Image Register -------- */ @@ -3081,31 +3081,31 @@ AT91C_PDC_RXTEN EQU( 0x1 << 0 ); /* - SOFTWARE API DEFINITION FOR Watchdog Timer Controller Interface */ /* - ***************************************************************************** */ /* - -------- WDTC_WDCR : (WDTC Offset: 0x0) Periodic Interval Image Register -------- */ - AT91C_WDTC_WDRSTT EQU( 0x1 << 0 ); + AT91C_WDTC_WDRSTT EQU( 0x1 << 0 ); - ( WDTC ) Watchdog Restart - AT91C_WDTC_KEY EQU( 0xFF << 24 ); + AT91C_WDTC_KEY EQU( 0xFF << 24 ); - ( WDTC ) Watchdog KEY Password /* - -------- WDTC_WDMR : (WDTC Offset: 0x4) Watchdog Mode Register -------- */ - AT91C_WDTC_WDV EQU( 0xFFF << 0 ); + AT91C_WDTC_WDV EQU( 0xFFF << 0 ); - ( WDTC ) Watchdog Timer Restart - AT91C_WDTC_WDFIEN EQU( 0x1 << 12 ); + AT91C_WDTC_WDFIEN EQU( 0x1 << 12 ); - ( WDTC ) Watchdog Fault Interrupt Enable - AT91C_WDTC_WDRSTEN EQU( 0x1 << 13 ); + AT91C_WDTC_WDRSTEN EQU( 0x1 << 13 ); - ( WDTC ) Watchdog Reset Enable - AT91C_WDTC_WDRPROC EQU( 0x1 << 14 ); + AT91C_WDTC_WDRPROC EQU( 0x1 << 14 ); - ( WDTC ) Watchdog Timer Restart - AT91C_WDTC_WDDIS EQU( 0x1 << 15 ); + AT91C_WDTC_WDDIS EQU( 0x1 << 15 ); - ( WDTC ) Watchdog Disable - AT91C_WDTC_WDD EQU( 0xFFF << 16 ); + AT91C_WDTC_WDD EQU( 0xFFF << 16 ); - ( WDTC ) Watchdog Delta Value - AT91C_WDTC_WDDBGHLT EQU( 0x1 << 28 ); + AT91C_WDTC_WDDBGHLT EQU( 0x1 << 28 ); - ( WDTC ) Watchdog Debug Halt AT91C_WDTC_WDIDLEHLT EQU( 0x1 << 29 ); - ( WDTC ) Watchdog Idle Halt /* - -------- WDTC_WDSR : (WDTC Offset: 0x8) Watchdog Status Register -------- */ - AT91C_WDTC_WDUNF EQU( 0x1 << 0 ); + AT91C_WDTC_WDUNF EQU( 0x1 << 0 ); - ( WDTC ) Watchdog Underflow - AT91C_WDTC_WDERR EQU( 0x1 << 1 ); + AT91C_WDTC_WDERR EQU( 0x1 << 1 ); - ( WDTC ) Watchdog Error /* - ***************************************************************************** */ @@ -3119,214 +3119,214 @@ AT91C_PDC_RXTEN EQU( 0x1 << 0 ); /* - SOFTWARE API DEFINITION FOR Memory Controller Interface */ /* - ***************************************************************************** */ /* - -------- MC_RCR : (MC Offset: 0x0) MC Remap Control Register -------- */ - AT91C_MC_RCB EQU( 0x1 << 0 ); + AT91C_MC_RCB EQU( 0x1 << 0 ); - ( MC ) Remap Command Bit /* - -------- MC_ASR : (MC Offset: 0x4) MC Abort Status Register -------- */ - AT91C_MC_UNDADD EQU( 0x1 << 0 ); + AT91C_MC_UNDADD EQU( 0x1 << 0 ); - ( MC ) Undefined Addess Abort Status - AT91C_MC_MISADD EQU( 0x1 << 1 ); + AT91C_MC_MISADD EQU( 0x1 << 1 ); - ( MC ) Misaligned Addess Abort Status - AT91C_MC_ABTSZ EQU( 0x3 << 8 ); + AT91C_MC_ABTSZ EQU( 0x3 << 8 ); - ( MC ) Abort Size Status - AT91C_MC_ABTSZ_BYTE EQU( 0x0 << 8 ); + AT91C_MC_ABTSZ_BYTE EQU( 0x0 << 8 ); - ( MC ) Byte - AT91C_MC_ABTSZ_HWORD EQU( 0x1 << 8 ); + AT91C_MC_ABTSZ_HWORD EQU( 0x1 << 8 ); - ( MC ) Half - word - AT91C_MC_ABTSZ_WORD EQU( 0x2 << 8 ); + AT91C_MC_ABTSZ_WORD EQU( 0x2 << 8 ); - ( MC ) Word - AT91C_MC_ABTTYP EQU( 0x3 << 10 ); + AT91C_MC_ABTTYP EQU( 0x3 << 10 ); - ( MC ) Abort Type Status - AT91C_MC_ABTTYP_DATAR EQU( 0x0 << 10 ); + AT91C_MC_ABTTYP_DATAR EQU( 0x0 << 10 ); - ( MC ) Data Read - AT91C_MC_ABTTYP_DATAW EQU( 0x1 << 10 ); + AT91C_MC_ABTTYP_DATAW EQU( 0x1 << 10 ); - ( MC ) Data Write - AT91C_MC_ABTTYP_FETCH EQU( 0x2 << 10 ); + AT91C_MC_ABTTYP_FETCH EQU( 0x2 << 10 ); - ( MC ) Code Fetch - AT91C_MC_MST0 EQU( 0x1 << 16 ); + AT91C_MC_MST0 EQU( 0x1 << 16 ); - ( MC ) Master 0 Abort Source - AT91C_MC_MST1 EQU( 0x1 << 17 ); + AT91C_MC_MST1 EQU( 0x1 << 17 ); - ( MC ) Master 1 Abort Source - AT91C_MC_SVMST0 EQU( 0x1 << 24 ); + AT91C_MC_SVMST0 EQU( 0x1 << 24 ); - ( MC ) Saved Master 0 Abort Source - AT91C_MC_SVMST1 EQU( 0x1 << 25 ); + AT91C_MC_SVMST1 EQU( 0x1 << 25 ); - ( MC ) Saved Master 1 Abort Source /* - -------- MC_FMR : (MC Offset: 0x60) MC Flash Mode Register -------- */ - AT91C_MC_FRDY EQU( 0x1 << 0 ); + AT91C_MC_FRDY EQU( 0x1 << 0 ); - ( MC ) Flash Ready - AT91C_MC_LOCKE EQU( 0x1 << 2 ); + AT91C_MC_LOCKE EQU( 0x1 << 2 ); - ( MC ) Lock Error - AT91C_MC_PROGE EQU( 0x1 << 3 ); + AT91C_MC_PROGE EQU( 0x1 << 3 ); - ( MC ) Programming Error - AT91C_MC_NEBP EQU( 0x1 << 7 ); + AT91C_MC_NEBP EQU( 0x1 << 7 ); - ( MC ) No Erase Before Programming - AT91C_MC_FWS EQU( 0x3 << 8 ); + AT91C_MC_FWS EQU( 0x3 << 8 ); - ( MC ) Flash Wait State - AT91C_MC_FWS_0FWS EQU( 0x0 << 8 ); + AT91C_MC_FWS_0FWS EQU( 0x0 << 8 ); - ( MC ) 1 cycle for Read, 2 for Write operations - AT91C_MC_FWS_1FWS EQU( 0x1 << 8 ); + AT91C_MC_FWS_1FWS EQU( 0x1 << 8 ); - ( MC ) 2 cycles for Read, 3 for Write operations - AT91C_MC_FWS_2FWS EQU( 0x2 << 8 ); + AT91C_MC_FWS_2FWS EQU( 0x2 << 8 ); - ( MC ) 3 cycles for Read, 4 for Write operations - AT91C_MC_FWS_3FWS EQU( 0x3 << 8 ); + AT91C_MC_FWS_3FWS EQU( 0x3 << 8 ); - ( MC ) 4 cycles for Read, 4 for Write operations - AT91C_MC_FMCN EQU( 0xFF << 16 ); + AT91C_MC_FMCN EQU( 0xFF << 16 ); - ( MC ) Flash Microsecond Cycle Number /* - -------- MC_FCR : (MC Offset: 0x64) MC Flash Command Register -------- */ - AT91C_MC_FCMD EQU( 0xF << 0 ); + AT91C_MC_FCMD EQU( 0xF << 0 ); - ( MC ) Flash Command - AT91C_MC_FCMD_START_PROG EQU( 0x1 ); + AT91C_MC_FCMD_START_PROG EQU( 0x1 ); - ( MC ) Starts the programming of th epage specified by PAGEN. - AT91C_MC_FCMD_LOCK EQU( 0x2 ); + AT91C_MC_FCMD_LOCK EQU( 0x2 ); - ( MC ) Starts a lock sequence of the sector defined by the bits 4 to 7 of the field PAGEN. AT91C_MC_FCMD_PROG_AND_LOCK EQU( 0x3 ); - ( MC ) The lock sequence automatically happens after the programming sequence is completed. - AT91C_MC_FCMD_UNLOCK EQU( 0x4 ); + AT91C_MC_FCMD_UNLOCK EQU( 0x4 ); - ( MC ) Starts an unlock sequence of the sector defined by the bits 4 to 7 of the field PAGEN. - AT91C_MC_FCMD_ERASE_ALL EQU( 0x8 ); + AT91C_MC_FCMD_ERASE_ALL EQU( 0x8 ); - ( MC ) Starts the erase of the entire flash.If at least a page is locked, the command is cancelled. - AT91C_MC_FCMD_SET_GP_NVM EQU( 0xB ); + AT91C_MC_FCMD_SET_GP_NVM EQU( 0xB ); - ( MC ) Set General Purpose NVM bits. - AT91C_MC_FCMD_CLR_GP_NVM EQU( 0xD ); + AT91C_MC_FCMD_CLR_GP_NVM EQU( 0xD ); - ( MC ) Clear General Purpose NVM bits. - AT91C_MC_FCMD_SET_SECURITY EQU( 0xF ); + AT91C_MC_FCMD_SET_SECURITY EQU( 0xF ); - ( MC ) Set Security Bit. - AT91C_MC_PAGEN EQU( 0x3FF << 8 ); + AT91C_MC_PAGEN EQU( 0x3FF << 8 ); - ( MC ) Page Number - AT91C_MC_KEY EQU( 0xFF << 24 ); + AT91C_MC_KEY EQU( 0xFF << 24 ); - ( MC ) Writing Protect Key /* - -------- MC_FSR : (MC Offset: 0x68) MC Flash Command Register -------- */ - AT91C_MC_SECURITY EQU( 0x1 << 4 ); + AT91C_MC_SECURITY EQU( 0x1 << 4 ); - ( MC ) Security Bit Status - AT91C_MC_GPNVM0 EQU( 0x1 << 8 ); + AT91C_MC_GPNVM0 EQU( 0x1 << 8 ); - ( MC ) Sector 0 Lock Status - AT91C_MC_GPNVM1 EQU( 0x1 << 9 ); + AT91C_MC_GPNVM1 EQU( 0x1 << 9 ); - ( MC ) Sector 1 Lock Status - AT91C_MC_GPNVM2 EQU( 0x1 << 10 ); + AT91C_MC_GPNVM2 EQU( 0x1 << 10 ); - ( MC ) Sector 2 Lock Status - AT91C_MC_GPNVM3 EQU( 0x1 << 11 ); + AT91C_MC_GPNVM3 EQU( 0x1 << 11 ); - ( MC ) Sector 3 Lock Status - AT91C_MC_GPNVM4 EQU( 0x1 << 12 ); + AT91C_MC_GPNVM4 EQU( 0x1 << 12 ); - ( MC ) Sector 4 Lock Status - AT91C_MC_GPNVM5 EQU( 0x1 << 13 ); + AT91C_MC_GPNVM5 EQU( 0x1 << 13 ); - ( MC ) Sector 5 Lock Status - AT91C_MC_GPNVM6 EQU( 0x1 << 14 ); + AT91C_MC_GPNVM6 EQU( 0x1 << 14 ); - ( MC ) Sector 6 Lock Status - AT91C_MC_GPNVM7 EQU( 0x1 << 15 ); + AT91C_MC_GPNVM7 EQU( 0x1 << 15 ); - ( MC ) Sector 7 Lock Status - AT91C_MC_LOCKS0 EQU( 0x1 << 16 ); + AT91C_MC_LOCKS0 EQU( 0x1 << 16 ); - ( MC ) Sector 0 Lock Status - AT91C_MC_LOCKS1 EQU( 0x1 << 17 ); + AT91C_MC_LOCKS1 EQU( 0x1 << 17 ); - ( MC ) Sector 1 Lock Status - AT91C_MC_LOCKS2 EQU( 0x1 << 18 ); + AT91C_MC_LOCKS2 EQU( 0x1 << 18 ); - ( MC ) Sector 2 Lock Status - AT91C_MC_LOCKS3 EQU( 0x1 << 19 ); + AT91C_MC_LOCKS3 EQU( 0x1 << 19 ); - ( MC ) Sector 3 Lock Status - AT91C_MC_LOCKS4 EQU( 0x1 << 20 ); + AT91C_MC_LOCKS4 EQU( 0x1 << 20 ); - ( MC ) Sector 4 Lock Status - AT91C_MC_LOCKS5 EQU( 0x1 << 21 ); + AT91C_MC_LOCKS5 EQU( 0x1 << 21 ); - ( MC ) Sector 5 Lock Status - AT91C_MC_LOCKS6 EQU( 0x1 << 22 ); + AT91C_MC_LOCKS6 EQU( 0x1 << 22 ); - ( MC ) Sector 6 Lock Status - AT91C_MC_LOCKS7 EQU( 0x1 << 23 ); + AT91C_MC_LOCKS7 EQU( 0x1 << 23 ); - ( MC ) Sector 7 Lock Status - AT91C_MC_LOCKS8 EQU( 0x1 << 24 ); + AT91C_MC_LOCKS8 EQU( 0x1 << 24 ); - ( MC ) Sector 8 Lock Status - AT91C_MC_LOCKS9 EQU( 0x1 << 25 ); + AT91C_MC_LOCKS9 EQU( 0x1 << 25 ); - ( MC ) Sector 9 Lock Status - AT91C_MC_LOCKS10 EQU( 0x1 << 26 ); + AT91C_MC_LOCKS10 EQU( 0x1 << 26 ); - ( MC ) Sector 10 Lock Status - AT91C_MC_LOCKS11 EQU( 0x1 << 27 ); + AT91C_MC_LOCKS11 EQU( 0x1 << 27 ); - ( MC ) Sector 11 Lock Status - AT91C_MC_LOCKS12 EQU( 0x1 << 28 ); + AT91C_MC_LOCKS12 EQU( 0x1 << 28 ); - ( MC ) Sector 12 Lock Status - AT91C_MC_LOCKS13 EQU( 0x1 << 29 ); + AT91C_MC_LOCKS13 EQU( 0x1 << 29 ); - ( MC ) Sector 13 Lock Status - AT91C_MC_LOCKS14 EQU( 0x1 << 30 ); + AT91C_MC_LOCKS14 EQU( 0x1 << 30 ); - ( MC ) Sector 14 Lock Status - AT91C_MC_LOCKS15 EQU( 0x1 << 31 ); + AT91C_MC_LOCKS15 EQU( 0x1 << 31 ); - ( MC ) Sector 15 Lock Status /* - ***************************************************************************** */ /* - SOFTWARE API DEFINITION FOR Serial Parallel Interface */ /* - ***************************************************************************** */ /* - -------- SPI_CR : (SPI Offset: 0x0) SPI Control Register -------- */ - AT91C_SPI_SPIEN EQU( 0x1 << 0 ); + AT91C_SPI_SPIEN EQU( 0x1 << 0 ); - ( SPI ) SPI Enable - AT91C_SPI_SPIDIS EQU( 0x1 << 1 ); + AT91C_SPI_SPIDIS EQU( 0x1 << 1 ); - ( SPI ) SPI Disable - AT91C_SPI_SWRST EQU( 0x1 << 7 ); + AT91C_SPI_SWRST EQU( 0x1 << 7 ); - ( SPI ) SPI Software reset - AT91C_SPI_LASTXFER EQU( 0x1 << 24 ); + AT91C_SPI_LASTXFER EQU( 0x1 << 24 ); - ( SPI ) SPI Last Transfer /* - -------- SPI_MR : (SPI Offset: 0x4) SPI Mode Register -------- */ - AT91C_SPI_MSTR EQU( 0x1 << 0 ); + AT91C_SPI_MSTR EQU( 0x1 << 0 ); - ( SPI ) Master / Slave Mode - AT91C_SPI_PS EQU( 0x1 << 1 ); + AT91C_SPI_PS EQU( 0x1 << 1 ); - ( SPI ) Peripheral Select - AT91C_SPI_PS_FIXED EQU( 0x0 << 1 ); + AT91C_SPI_PS_FIXED EQU( 0x0 << 1 ); - ( SPI ) Fixed Peripheral Select AT91C_SPI_PS_VARIABLE EQU( 0x1 << 1 ); - ( SPI ) Variable Peripheral Select - AT91C_SPI_PCSDEC EQU( 0x1 << 2 ); + AT91C_SPI_PCSDEC EQU( 0x1 << 2 ); - ( SPI ) Chip Select Decode - AT91C_SPI_FDIV EQU( 0x1 << 3 ); + AT91C_SPI_FDIV EQU( 0x1 << 3 ); - ( SPI ) Clock Selection - AT91C_SPI_MODFDIS EQU( 0x1 << 4 ); + AT91C_SPI_MODFDIS EQU( 0x1 << 4 ); - ( SPI ) Mode Fault Detection - AT91C_SPI_LLB EQU( 0x1 << 7 ); + AT91C_SPI_LLB EQU( 0x1 << 7 ); - ( SPI ) Clock Selection - AT91C_SPI_PCS EQU( 0xF << 16 ); + AT91C_SPI_PCS EQU( 0xF << 16 ); - ( SPI ) Peripheral Chip Select - AT91C_SPI_DLYBCS EQU( 0xFF << 24 ); + AT91C_SPI_DLYBCS EQU( 0xFF << 24 ); - ( SPI ) Delay Between Chip Selects /* - -------- SPI_RDR : (SPI Offset: 0x8) Receive Data Register -------- */ - AT91C_SPI_RD EQU( 0xFFFF << 0 ); + AT91C_SPI_RD EQU( 0xFFFF << 0 ); - ( SPI ) Receive Data - AT91C_SPI_RPCS EQU( 0xF << 16 ); + AT91C_SPI_RPCS EQU( 0xF << 16 ); - ( SPI ) Peripheral Chip Select Status /* - -------- SPI_TDR : (SPI Offset: 0xc) Transmit Data Register -------- */ - AT91C_SPI_TD EQU( 0xFFFF << 0 ); + AT91C_SPI_TD EQU( 0xFFFF << 0 ); - ( SPI ) Transmit Data - AT91C_SPI_TPCS EQU( 0xF << 16 ); + AT91C_SPI_TPCS EQU( 0xF << 16 ); - ( SPI ) Peripheral Chip Select Status /* - -------- SPI_SR : (SPI Offset: 0x10) Status Register -------- */ - AT91C_SPI_RDRF EQU( 0x1 << 0 ); + AT91C_SPI_RDRF EQU( 0x1 << 0 ); - ( SPI ) Receive Data Register Full - AT91C_SPI_TDRE EQU( 0x1 << 1 ); + AT91C_SPI_TDRE EQU( 0x1 << 1 ); - ( SPI ) Transmit Data Register Empty - AT91C_SPI_MODF EQU( 0x1 << 2 ); + AT91C_SPI_MODF EQU( 0x1 << 2 ); - ( SPI ) Mode Fault Error - AT91C_SPI_OVRES EQU( 0x1 << 3 ); + AT91C_SPI_OVRES EQU( 0x1 << 3 ); - ( SPI ) Overrun Error Status - AT91C_SPI_ENDRX EQU( 0x1 << 4 ); + AT91C_SPI_ENDRX EQU( 0x1 << 4 ); - ( SPI ) End of Receiver Transfer - AT91C_SPI_ENDTX EQU( 0x1 << 5 ); + AT91C_SPI_ENDTX EQU( 0x1 << 5 ); - ( SPI ) End of Receiver Transfer - AT91C_SPI_RXBUFF EQU( 0x1 << 6 ); + AT91C_SPI_RXBUFF EQU( 0x1 << 6 ); - ( SPI ) RXBUFF Interrupt - AT91C_SPI_TXBUFE EQU( 0x1 << 7 ); + AT91C_SPI_TXBUFE EQU( 0x1 << 7 ); - ( SPI ) TXBUFE Interrupt - AT91C_SPI_NSSR EQU( 0x1 << 8 ); + AT91C_SPI_NSSR EQU( 0x1 << 8 ); - ( SPI ) NSSR Interrupt - AT91C_SPI_TXEMPTY EQU( 0x1 << 9 ); + AT91C_SPI_TXEMPTY EQU( 0x1 << 9 ); - ( SPI ) TXEMPTY Interrupt - AT91C_SPI_SPIENS EQU( 0x1 << 16 ); + AT91C_SPI_SPIENS EQU( 0x1 << 16 ); - ( SPI ) Enable Status /* - -------- SPI_IER : (SPI Offset: 0x14) Interrupt Enable Register -------- */ /* - -------- SPI_IDR : (SPI Offset: 0x18) Interrupt Disable Register -------- */ /* - -------- SPI_IMR : (SPI Offset: 0x1c) Interrupt Mask Register -------- */ /* - -------- SPI_CSR : (SPI Offset: 0x30) Chip Select Register -------- */ - AT91C_SPI_CPOL EQU( 0x1 << 0 ); + AT91C_SPI_CPOL EQU( 0x1 << 0 ); - ( SPI ) Clock Polarity - AT91C_SPI_NCPHA EQU( 0x1 << 1 ); + AT91C_SPI_NCPHA EQU( 0x1 << 1 ); - ( SPI ) Clock Phase - AT91C_SPI_CSAAT EQU( 0x1 << 3 ); + AT91C_SPI_CSAAT EQU( 0x1 << 3 ); - ( SPI ) Chip Select Active After Transfer - AT91C_SPI_BITS EQU( 0xF << 4 ); + AT91C_SPI_BITS EQU( 0xF << 4 ); - ( SPI ) Bits Per Transfer - AT91C_SPI_BITS_8 EQU( 0x0 << 4 ); + AT91C_SPI_BITS_8 EQU( 0x0 << 4 ); - ( SPI ) 8 Bits Per transfer - AT91C_SPI_BITS_9 EQU( 0x1 << 4 ); + AT91C_SPI_BITS_9 EQU( 0x1 << 4 ); - ( SPI ) 9 Bits Per transfer AT91C_SPI_BITS_10 EQU( 0x2 << 4 ); - ( SPI ) 10 Bits Per transfer @@ -3342,59 +3342,59 @@ AT91C_PDC_RXTEN EQU( 0x1 << 0 ); - ( SPI ) 15 Bits Per transfer AT91C_SPI_BITS_16 EQU( 0x8 << 4 ); - ( SPI ) 16 Bits Per transfer - AT91C_SPI_SCBR EQU( 0xFF << 8 ); + AT91C_SPI_SCBR EQU( 0xFF << 8 ); - ( SPI ) Serial Clock Baud Rate - AT91C_SPI_DLYBS EQU( 0xFF << 16 ); + AT91C_SPI_DLYBS EQU( 0xFF << 16 ); - ( SPI ) Delay Before SPCK - AT91C_SPI_DLYBCT EQU( 0xFF << 24 ); + AT91C_SPI_DLYBCT EQU( 0xFF << 24 ); - ( SPI ) Delay Between Consecutive Transfers /* - ***************************************************************************** */ /* - SOFTWARE API DEFINITION FOR Usart */ /* - ***************************************************************************** */ /* - -------- US_CR : (USART Offset: 0x0) Debug Unit Control Register -------- */ - AT91C_US_STTBRK EQU( 0x1 << 9 ); + AT91C_US_STTBRK EQU( 0x1 << 9 ); - ( USART ) Start Break - AT91C_US_STPBRK EQU( 0x1 << 10 ); + AT91C_US_STPBRK EQU( 0x1 << 10 ); - ( USART ) Stop Break - AT91C_US_STTTO EQU( 0x1 << 11 ); + AT91C_US_STTTO EQU( 0x1 << 11 ); - ( USART ) Start Time - out - AT91C_US_SENDA EQU( 0x1 << 12 ); + AT91C_US_SENDA EQU( 0x1 << 12 ); - ( USART ) Send Address - AT91C_US_RSTIT EQU( 0x1 << 13 ); + AT91C_US_RSTIT EQU( 0x1 << 13 ); - ( USART ) Reset Iterations - AT91C_US_RSTNACK EQU( 0x1 << 14 ); + AT91C_US_RSTNACK EQU( 0x1 << 14 ); - ( USART ) Reset Non Acknowledge - AT91C_US_RETTO EQU( 0x1 << 15 ); + AT91C_US_RETTO EQU( 0x1 << 15 ); - ( USART ) Rearm Time - out - AT91C_US_DTREN EQU( 0x1 << 16 ); + AT91C_US_DTREN EQU( 0x1 << 16 ); - ( USART ) Data Terminal ready Enable - AT91C_US_DTRDIS EQU( 0x1 << 17 ); + AT91C_US_DTRDIS EQU( 0x1 << 17 ); - ( USART ) Data Terminal ready Disable - AT91C_US_RTSEN EQU( 0x1 << 18 ); + AT91C_US_RTSEN EQU( 0x1 << 18 ); - ( USART ) Request to Send enable - AT91C_US_RTSDIS EQU( 0x1 << 19 ); + AT91C_US_RTSDIS EQU( 0x1 << 19 ); - ( USART ) Request to Send Disable /* - -------- US_MR : (USART Offset: 0x4) Debug Unit Mode Register -------- */ - AT91C_US_USMODE EQU( 0xF << 0 ); + AT91C_US_USMODE EQU( 0xF << 0 ); - ( USART ) Usart mode - AT91C_US_USMODE_NORMAL EQU( 0x0 ); + AT91C_US_USMODE_NORMAL EQU( 0x0 ); - ( USART ) Normal - AT91C_US_USMODE_RS485 EQU( 0x1 ); + AT91C_US_USMODE_RS485 EQU( 0x1 ); - ( USART ) RS485 - AT91C_US_USMODE_HWHSH EQU( 0x2 ); + AT91C_US_USMODE_HWHSH EQU( 0x2 ); - ( USART ) Hardware Handshaking - AT91C_US_USMODE_MODEM EQU( 0x3 ); + AT91C_US_USMODE_MODEM EQU( 0x3 ); - ( USART ) Modem AT91C_US_USMODE_ISO7816_0 EQU( 0x4 ); - ( USART ) ISO7816 protocol: T = 0 AT91C_US_USMODE_ISO7816_1 EQU( 0x6 ); - ( USART ) ISO7816 protocol: T = 1 - AT91C_US_USMODE_IRDA EQU( 0x8 ); + AT91C_US_USMODE_IRDA EQU( 0x8 ); - ( USART ) IrDA AT91C_US_USMODE_SWHSH EQU( 0xC ); - ( USART ) Software Handshaking - AT91C_US_CLKS EQU( 0x3 << 4 ); + AT91C_US_CLKS EQU( 0x3 << 4 ); - ( USART ) Clock Selection ( Baud Rate generator Input Clock AT91C_US_CLKS_CLOCK EQU( 0x0 << 4 ); -( USART ) Clock diff --git a/portable/GCC/ARM7_AT91SAM7S/lib_AT91SAM7X256.h b/portable/GCC/ARM7_AT91SAM7S/lib_AT91SAM7X256.h index 9d2e54e06..3c4fd7d6f 100644 --- a/portable/GCC/ARM7_AT91SAM7S/lib_AT91SAM7X256.h +++ b/portable/GCC/ARM7_AT91SAM7S/lib_AT91SAM7X256.h @@ -61,17 +61,17 @@ __inline unsigned int AT91F_AIC_ConfigureIt( AT91PS_AIC pAic, /* unsigned int oldHandler; unsigned int mask; - oldHandler = pAic->AIC_SVR[ irq_id ]; + oldHandler = pAic->AIC_SVR[ irq_id ]; - mask = 0x1 << irq_id; + mask = 0x1 << irq_id; /** Disable the interrupt on the interrupt controller */ - pAic->AIC_IDCR = mask; + pAic->AIC_IDCR = mask; /** Save the interrupt handler routine pointer and the interrupt priority */ pAic->AIC_SVR[ irq_id ] = ( unsigned int ) newHandler; /** Store the Source Mode Register */ pAic->AIC_SMR[ irq_id ] = src_type | priority; /** Clear the interrupt on the interrupt controller */ - pAic->AIC_ICCR = mask; + pAic->AIC_ICCR = mask; return oldHandler; } @@ -1123,8 +1123,8 @@ __inline unsigned int AT91F_PMC_GetMasterClock( AT91PS_PMC pPMC, /* \arg return AT91F_CKGR_GetMainClock( pCKGR, slowClock ) / prescaler; case AT91C_PMC_CSS_PLL_CLK: /* PLLB clock is selected */ - reg = pCKGR->CKGR_PLLR; - pllDivider = ( reg & AT91C_CKGR_DIV ); + reg = pCKGR->CKGR_PLLR; + pllDivider = ( reg & AT91C_CKGR_DIV ); pllMultiplier = ( ( reg & AT91C_CKGR_MUL ) >> 16 ) + 1; return AT91F_CKGR_GetMainClock( pCKGR, slowClock ) / pllDivider * pllMultiplier / prescaler; } @@ -1141,7 +1141,7 @@ __inline void AT91F_PMC_EnablePCK( AT91PS_PMC pPMC, /* \arg pointer to PMC cont unsigned int mode ) { pPMC->PMC_PCKR[ pck ] = mode; - pPMC->PMC_SCER = ( 1 << pck ) << 8; + pPMC->PMC_SCER = ( 1 << pck ) << 8; } /**---------------------------------------------------------------------------- */ @@ -1399,7 +1399,7 @@ __inline void AT91F_PITInit( AT91PS_PITC pPITC, unsigned int period, unsigned int pit_frequency ) { - pPITC->PITC_PIMR = period ? ( period * pit_frequency + 8 ) >> 4 : 0; /* +8 to avoid %10 and /10 */ + pPITC->PITC_PIMR = period ? ( period * pit_frequency + 8 ) >> 4 : 0; /* +8 to avoid %10 and /10 */ pPITC->PITC_PIMR |= AT91C_PITC_PITEN; } @@ -1768,16 +1768,16 @@ __inline void AT91F_SPI_Close( AT91PS_SPI pSPI ) /* \arg pointer to a SPI contro pSPI->SPI_CSR[ 3 ] = 0; /** Reset the SPI mode */ - pSPI->SPI_MR = 0; + pSPI->SPI_MR = 0; /** Disable all interrupts */ - pSPI->SPI_IDR = 0xFFFFFFFF; + pSPI->SPI_IDR = 0xFFFFFFFF; /** Abort the Peripheral Data Transfers */ AT91F_PDC_Close( ( AT91PS_PDC ) &( pSPI->SPI_RPR ) ); /** Disable receiver and transmitter and stop any activity immediately */ - pSPI->SPI_CR = AT91C_SPI_SPIDIS; + pSPI->SPI_CR = AT91C_SPI_SPIDIS; } /**---------------------------------------------------------------------------- */ @@ -1790,7 +1790,7 @@ __inline void AT91F_SPI_PutChar( AT91PS_SPI pSPI, { unsigned int value_for_cs; - value_for_cs = ( ~( 1 << cs_number ) ) & 0xF; /*Place a zero among a 4 ONEs number */ + value_for_cs = ( ~( 1 << cs_number ) ) & 0xF; /*Place a zero among a 4 ONEs number */ pSPI->SPI_TDR = ( character & 0xFFFF ) | ( value_for_cs << 16 ); } @@ -1955,7 +1955,7 @@ __inline void AT91F_US_Configure( AT91PS_USART pUSART, /* \arg pointer to a pUSART->US_IDR = ( unsigned int ) -1; /** Reset receiver and transmitter */ - pUSART->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX | AT91C_US_RXDIS | AT91C_US_TXDIS; + pUSART->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX | AT91C_US_RXDIS | AT91C_US_TXDIS; /** Define the baud rate divisor register */ AT91F_US_SetBaudrate( pUSART, mainClock, baudRate ); @@ -1967,7 +1967,7 @@ __inline void AT91F_US_Configure( AT91PS_USART pUSART, /* \arg pointer to a AT91F_PDC_Open( ( AT91PS_PDC ) &( pUSART->US_RPR ) ); /** Define the USART mode */ - pUSART->US_MR = mode; + pUSART->US_MR = mode; } /**---------------------------------------------------------------------------- */ @@ -2044,19 +2044,19 @@ __inline void AT91F_US_Close( AT91PS_USART pUSART ) /* \arg pointer to a USART c pUSART->US_BRGR = 0; /** Reset the USART mode */ - pUSART->US_MR = 0; + pUSART->US_MR = 0; /** Reset the Timeguard Register */ pUSART->US_TTGR = 0; /** Disable all interrupts */ - pUSART->US_IDR = 0xFFFFFFFF; + pUSART->US_IDR = 0xFFFFFFFF; /** Abort the Peripheral Data Transfers */ AT91F_PDC_Close( ( AT91PS_PDC ) &( pUSART->US_RPR ) ); /** Disable receiver and transmitter and stop any activity immediately */ - pUSART->US_CR = AT91C_US_TXDIS | AT91C_US_RXDIS | AT91C_US_RSTTX | AT91C_US_RSTRX; + pUSART->US_CR = AT91C_US_TXDIS | AT91C_US_RXDIS | AT91C_US_RSTTX | AT91C_US_RSTRX; } /**---------------------------------------------------------------------------- */ @@ -2230,10 +2230,10 @@ __inline void AT91F_SSC_Configure( AT91PS_SSC pSSC, /* \arg pointer to a unsigned int mode_tx ) /* \arg mode Register to be programmed */ { /** Disable interrupts */ - pSSC->SSC_IDR = ( unsigned int ) -1; + pSSC->SSC_IDR = ( unsigned int ) -1; /** Reset receiver and transmitter */ - pSSC->SSC_CR = AT91C_SSC_SWRST | AT91C_SSC_RXDIS | AT91C_SSC_TXDIS; + pSSC->SSC_CR = AT91C_SSC_SWRST | AT91C_SSC_RXDIS | AT91C_SSC_TXDIS; /** Define the Clock Mode Register */ AT91F_SSC_SetBaudrate( pSSC, syst_clock, baud_rate ); @@ -2407,10 +2407,10 @@ __inline void AT91F_TWI_Configure( AT91PS_TWI pTWI ) /* \arg pointer to a TWI co pTWI->TWI_IDR = ( unsigned int ) -1; /** Reset peripheral */ - pTWI->TWI_CR = AT91C_TWI_SWRST; + pTWI->TWI_CR = AT91C_TWI_SWRST; /** Set Master mode */ - pTWI->TWI_CR = AT91C_TWI_MSEN; + pTWI->TWI_CR = AT91C_TWI_MSEN; } /**---------------------------------------------------------------------------- */ @@ -2506,7 +2506,7 @@ __inline void AT91F_PWMC_CfgChannel( AT91PS_PWMC pPWM, /* \arg pointer to unsigned int period, /* \arg PWM period */ unsigned int duty ) /* \arg PWM duty cycle */ { - pPWM->PWMC_CH[ channelId ].PWMC_CMR = mode; + pPWM->PWMC_CH[ channelId ].PWMC_CMR = mode; pPWM->PWMC_CH[ channelId ].PWMC_CDTYR = duty; pPWM->PWMC_CH[ channelId ].PWMC_CPRDR = period; } @@ -3210,9 +3210,9 @@ __inline void AT91F_ADC_CfgTimings( AT91PS_ADC pADC, /* point { unsigned int prescal, startup, shtim; - prescal = mck_clock / ( 2 * adc_clock ) - 1; - startup = adc_clock * startup_time / 8 - 1; - shtim = adc_clock * sample_and_hold_time / 1000 - 1; + prescal = mck_clock / ( 2 * adc_clock ) - 1; + startup = adc_clock * startup_time / 8 - 1; + shtim = adc_clock * sample_and_hold_time / 1000 - 1; /** Write to the MR register */ pADC->ADC_MR = ( ( prescal << 8 ) & AT91C_ADC_PRESCAL ) | ( ( startup << 16 ) & AT91C_ADC_STARTUP ) | ( ( shtim << 24 ) & AT91C_ADC_SHTIM ); diff --git a/portable/GCC/ARM7_AT91SAM7S/port.c b/portable/GCC/ARM7_AT91SAM7S/port.c index 3d2f9331d..ca39e9b52 100644 --- a/portable/GCC/ARM7_AT91SAM7S/port.c +++ b/portable/GCC/ARM7_AT91SAM7S/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ @@ -198,7 +199,7 @@ static void prvSetupTimerInterrupt( void ) #endif /* Configure the PIT period. */ - pxPIT->PITC_PIMR = portPIT_ENABLE | portPIT_INT_ENABLE | portPIT_COUNTER_VALUE; + pxPIT->PITC_PIMR = portPIT_ENABLE | portPIT_INT_ENABLE | portPIT_COUNTER_VALUE; /* Enable the interrupt. Global interrupts are disables at this point so * this is safe. */ diff --git a/portable/GCC/ARM7_AT91SAM7S/portISR.c b/portable/GCC/ARM7_AT91SAM7S/portISR.c index 7eb0efa59..a8d9e00c5 100644 --- a/portable/GCC/ARM7_AT91SAM7S/portISR.c +++ b/portable/GCC/ARM7_AT91SAM7S/portISR.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ @@ -118,7 +119,7 @@ void vPortYieldProcessor( void ) xTaskIncrementTick(); /* Clear the PIT interrupt. */ - ulDummy = AT91C_BASE_PITC->PITC_PIVR; + ulDummy = AT91C_BASE_PITC->PITC_PIVR; /* End the interrupt in the AIC. */ AT91C_BASE_AIC->AIC_EOICR = ulDummy; diff --git a/portable/GCC/ARM7_AT91SAM7S/portmacro.h b/portable/GCC/ARM7_AT91SAM7S/portmacro.h index 3a97f811c..31aa43116 100644 --- a/portable/GCC/ARM7_AT91SAM7S/portmacro.h +++ b/portable/GCC/ARM7_AT91SAM7S/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* @@ -106,7 +107,7 @@ #define portRESTORE_CONTEXT() \ { \ extern volatile void * volatile pxCurrentTCB; \ - extern volatile uint32_t ulCriticalNesting; \ + extern volatile uint32_t ulCriticalNesting; \ \ /* Set the LR to the task stack. */ \ __asm volatile ( \ @@ -143,7 +144,7 @@ #define portSAVE_CONTEXT() \ { \ extern volatile void * volatile pxCurrentTCB; \ - extern volatile uint32_t ulCriticalNesting; \ + extern volatile uint32_t ulCriticalNesting; \ \ /* Push R0 as we are going to use the register. */ \ __asm volatile ( \ diff --git a/portable/GCC/ARM7_LPC2000/port.c b/portable/GCC/ARM7_LPC2000/port.c index 832c300b9..c30fec934 100644 --- a/portable/GCC/ARM7_LPC2000/port.c +++ b/portable/GCC/ARM7_LPC2000/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ @@ -186,7 +187,7 @@ static void prvSetupTimerInterrupt( void ) /* A 1ms tick does not require the use of the timer prescale. This is * defaulted to zero but can be used if necessary. */ - T0_PR = portPRESCALE_VALUE; + T0_PR = portPRESCALE_VALUE; /* Calculate the match value required for our wanted tick rate. */ ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ; @@ -198,23 +199,23 @@ static void prvSetupTimerInterrupt( void ) ulCompareMatch /= ( portPRESCALE_VALUE + 1 ); } #endif - T0_MR0 = ulCompareMatch; + T0_MR0 = ulCompareMatch; /* Generate tick with timer 0 compare match. */ - T0_MCR = portRESET_COUNT_ON_MATCH | portINTERRUPT_ON_MATCH; + T0_MCR = portRESET_COUNT_ON_MATCH | portINTERRUPT_ON_MATCH; /* Setup the VIC for the timer. */ - VICIntSelect &= ~( portTIMER_VIC_CHANNEL_BIT ); - VICIntEnable |= portTIMER_VIC_CHANNEL_BIT; + VICIntSelect &= ~( portTIMER_VIC_CHANNEL_BIT ); + VICIntEnable |= portTIMER_VIC_CHANNEL_BIT; /* The ISR installed depends on whether the preemptive or cooperative * scheduler is being used. */ - VICVectAddr0 = ( int32_t ) vTickISR; - VICVectCntl0 = portTIMER_VIC_CHANNEL | portTIMER_VIC_ENABLE; + VICVectAddr0 = ( int32_t ) vTickISR; + VICVectCntl0 = portTIMER_VIC_CHANNEL | portTIMER_VIC_ENABLE; /* Start the timer - interrupts are disabled when this function is called * so it is okay to do this here. */ - T0_TCR = portENABLE_TIMER; + T0_TCR = portENABLE_TIMER; } /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM7_LPC2000/portISR.c b/portable/GCC/ARM7_LPC2000/portISR.c index bfe40d562..8c57213a0 100644 --- a/portable/GCC/ARM7_LPC2000/portISR.c +++ b/portable/GCC/ARM7_LPC2000/portISR.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ @@ -128,7 +129,7 @@ void vTickISR( void ) ); /* Ready for the next interrupt. */ - T0_IR = portTIMER_MATCH_ISR_BIT; + T0_IR = portTIMER_MATCH_ISR_BIT; VICVectAddr = portCLEAR_VIC_INTERRUPT; /* Restore the context of the new task. */ diff --git a/portable/GCC/ARM7_LPC2000/portmacro.h b/portable/GCC/ARM7_LPC2000/portmacro.h index 327f42609..8b020214a 100644 --- a/portable/GCC/ARM7_LPC2000/portmacro.h +++ b/portable/GCC/ARM7_LPC2000/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H @@ -83,7 +84,7 @@ #define portRESTORE_CONTEXT() \ { \ extern volatile void * volatile pxCurrentTCB; \ - extern volatile uint32_t ulCriticalNesting; \ + extern volatile uint32_t ulCriticalNesting; \ \ /* Set the LR to the task stack. */ \ __asm volatile ( \ @@ -120,7 +121,7 @@ #define portSAVE_CONTEXT() \ { \ extern volatile void * volatile pxCurrentTCB; \ - extern volatile uint32_t ulCriticalNesting; \ + extern volatile uint32_t ulCriticalNesting; \ \ /* Push R0 as we are going to use the register. */ \ __asm volatile ( \ diff --git a/portable/GCC/ARM7_LPC23xx/port.c b/portable/GCC/ARM7_LPC23xx/port.c index 3a2fe03e8..56d8ed28e 100644 --- a/portable/GCC/ARM7_LPC23xx/port.c +++ b/portable/GCC/ARM7_LPC23xx/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ @@ -182,13 +183,13 @@ static void prvSetupTimerInterrupt( void ) { uint32_t ulCompareMatch; - PCLKSEL0 = ( PCLKSEL0 & ( ~( 0x3 << 2 ) ) ) | ( 0x01 << 2 ); - T0TCR = 2; /* Stop and reset the timer */ - T0CTCR = 0; /* Timer mode */ + PCLKSEL0 = ( PCLKSEL0 & ( ~( 0x3 << 2 ) ) ) | ( 0x01 << 2 ); + T0TCR = 2; /* Stop and reset the timer */ + T0CTCR = 0; /* Timer mode */ /* A 1ms tick does not require the use of the timer prescale. This is * defaulted to zero but can be used if necessary. */ - T0PR = portPRESCALE_VALUE; + T0PR = portPRESCALE_VALUE; /* Calculate the match value required for our wanted tick rate. */ ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ; @@ -200,13 +201,13 @@ static void prvSetupTimerInterrupt( void ) ulCompareMatch /= ( portPRESCALE_VALUE + 1 ); } #endif - T0MR1 = ulCompareMatch; + T0MR1 = ulCompareMatch; /* Generate tick with timer 0 compare match. */ - T0MCR = ( 3 << 3 ); /* Reset timer on match and generate interrupt */ + T0MCR = ( 3 << 3 ); /* Reset timer on match and generate interrupt */ /* Setup the VIC for the timer. */ - VICIntEnable = 0x00000010; + VICIntEnable = 0x00000010; /* The ISR installed depends on whether the preemptive or cooperative * scheduler is being used. */ @@ -222,10 +223,10 @@ static void prvSetupTimerInterrupt( void ) } #endif - VICVectCntl4 = 1; + VICVectCntl4 = 1; /* Start the timer - interrupts are disabled when this function is called * so it is okay to do this here. */ - T0TCR = portENABLE_TIMER; + T0TCR = portENABLE_TIMER; } /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM7_LPC23xx/portISR.c b/portable/GCC/ARM7_LPC23xx/portISR.c index 551b0ba10..b9f38e4ff 100644 --- a/portable/GCC/ARM7_LPC23xx/portISR.c +++ b/portable/GCC/ARM7_LPC23xx/portISR.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ @@ -103,7 +104,7 @@ void vPortYieldProcessor( void ) void vNonPreemptiveTick( void ) { xTaskIncrementTick(); - T0IR = 2; + T0IR = 2; VICVectAddr = portCLEAR_VIC_INTERRUPT; } @@ -129,7 +130,7 @@ void vPortYieldProcessor( void ) ); /* Ready for the next interrupt. */ - T0IR = 2; + T0IR = 2; VICVectAddr = portCLEAR_VIC_INTERRUPT; /* Restore the context of the new task. */ diff --git a/portable/GCC/ARM7_LPC23xx/portmacro.h b/portable/GCC/ARM7_LPC23xx/portmacro.h index 3a97f811c..31aa43116 100644 --- a/portable/GCC/ARM7_LPC23xx/portmacro.h +++ b/portable/GCC/ARM7_LPC23xx/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* @@ -106,7 +107,7 @@ #define portRESTORE_CONTEXT() \ { \ extern volatile void * volatile pxCurrentTCB; \ - extern volatile uint32_t ulCriticalNesting; \ + extern volatile uint32_t ulCriticalNesting; \ \ /* Set the LR to the task stack. */ \ __asm volatile ( \ @@ -143,7 +144,7 @@ #define portSAVE_CONTEXT() \ { \ extern volatile void * volatile pxCurrentTCB; \ - extern volatile uint32_t ulCriticalNesting; \ + extern volatile uint32_t ulCriticalNesting; \ \ /* Push R0 as we are going to use the register. */ \ __asm volatile ( \ diff --git a/portable/GCC/ARM_CA53_64_BIT/port.c b/portable/GCC/ARM_CA53_64_BIT/port.c index 920bed217..d53ccc7c6 100644 --- a/portable/GCC/ARM_CA53_64_BIT/port.c +++ b/portable/GCC/ARM_CA53_64_BIT/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Standard includes. */ @@ -146,23 +147,23 @@ extern void vPortRestoreTaskContext( void ); * a non zero value to ensure interrupts don't inadvertently become unmasked before * the scheduler starts. As it is stored as part of the task context it will * automatically be set to 0 when the first task is started. */ -volatile uint64_t ullCriticalNesting = 9999ULL; +volatile uint64_t ullCriticalNesting = 9999ULL; /* Saved as part of the task context. If ullPortTaskHasFPUContext is non-zero * then floating point context must be saved and restored for the task. */ -uint64_t ullPortTaskHasFPUContext = pdFALSE; +uint64_t ullPortTaskHasFPUContext = pdFALSE; /* Set to 1 to pend a context switch from an ISR. */ -uint64_t ullPortYieldRequired = pdFALSE; +uint64_t ullPortYieldRequired = pdFALSE; /* Counts the interrupt nesting depth. A context switch is only performed if * if the nesting depth is 0. */ -uint64_t ullPortInterruptNesting = 0; +uint64_t ullPortInterruptNesting = 0; /* Used in the ASM code. */ -__attribute__( ( used ) ) const uint64_t ullICCEOIR = portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS; -__attribute__( ( used ) ) const uint64_t ullICCIAR = portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS; -__attribute__( ( used ) ) const uint64_t ullICCPMR = portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS; +__attribute__( ( used ) ) const uint64_t ullICCEOIR = portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS; +__attribute__( ( used ) ) const uint64_t ullICCIAR = portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS; +__attribute__( ( used ) ) const uint64_t ullICCPMR = portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS; __attribute__( ( used ) ) const uint64_t ullMaxAPIPriorityMask = ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ); /*-----------------------------------------------------------*/ @@ -270,21 +271,21 @@ BaseType_t xPortStartScheduler( void ) #if ( configASSERT_DEFINED == 1 ) { - volatile uint32_t ulOriginalPriority; + volatile uint32_t ulOriginalPriority; volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( configINTERRUPT_CONTROLLER_BASE_ADDRESS + portINTERRUPT_PRIORITY_REGISTER_OFFSET ); - volatile uint8_t ucMaxPriorityValue; + volatile uint8_t ucMaxPriorityValue; /* Determine how many priority bits are implemented in the GIC. * * Save the interrupt priority value that is about to be clobbered. */ - ulOriginalPriority = *pucFirstUserPriorityRegister; + ulOriginalPriority = *pucFirstUserPriorityRegister; /* Determine the number of priority bits available. First write to * all possible bits. */ *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE; /* Read the value back to see how many bits stuck. */ - ucMaxPriorityValue = *pucFirstUserPriorityRegister; + ucMaxPriorityValue = *pucFirstUserPriorityRegister; /* Shift to the least significant bits. */ while( ( ucMaxPriorityValue & portBIT_0_SET ) != portBIT_0_SET ) @@ -473,7 +474,7 @@ UBaseType_t uxPortSetInterruptMask( void ) } else { - ulReturn = pdFALSE; + ulReturn = pdFALSE; portICCPMR_PRIORITY_MASK_REGISTER = ( uint32_t ) ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ); __asm volatile ( "dsb sy \n" "isb sy \n"::: "memory" ); diff --git a/portable/GCC/ARM_CA53_64_BIT/portmacro.h b/portable/GCC/ARM_CA53_64_BIT/portmacro.h index 06aa96621..5da5f22da 100644 --- a/portable/GCC/ARM_CA53_64_BIT/portmacro.h +++ b/portable/GCC/ARM_CA53_64_BIT/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H @@ -152,7 +153,7 @@ /*-----------------------------------------------------------*/ - #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __builtin_clz( uxReadyPriorities ) ) + #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __builtin_clz( uxReadyPriorities ) ) #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ diff --git a/portable/GCC/ARM_CA9/port.c b/portable/GCC/ARM_CA9/port.c index ca7a7fb88..e826b9fda 100644 --- a/portable/GCC/ARM_CA9/port.c +++ b/portable/GCC/ARM_CA9/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Standard includes. */ @@ -191,23 +192,23 @@ void vApplicationFPUSafeIRQHandler( uint32_t ulICCIAR ) __attribute__( ( weak ) * a non zero value to ensure interrupts don't inadvertently become unmasked before * the scheduler starts. As it is stored as part of the task context it will * automatically be set to 0 when the first task is started. */ -volatile uint32_t ulCriticalNesting = 9999UL; +volatile uint32_t ulCriticalNesting = 9999UL; /* Saved as part of the task context. If ulPortTaskHasFPUContext is non-zero then * a floating point context must be saved and restored for the task. */ volatile uint32_t ulPortTaskHasFPUContext = pdFALSE; /* Set to 1 to pend a context switch from an ISR. */ -volatile uint32_t ulPortYieldRequired = pdFALSE; +volatile uint32_t ulPortYieldRequired = pdFALSE; /* Counts the interrupt nesting depth. A context switch is only performed if * if the nesting depth is 0. */ -volatile uint32_t ulPortInterruptNesting = 0UL; +volatile uint32_t ulPortInterruptNesting = 0UL; /* Used in the asm file. */ -__attribute__( ( used ) ) const uint32_t ulICCIAR = portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS; -__attribute__( ( used ) ) const uint32_t ulICCEOIR = portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS; -__attribute__( ( used ) ) const uint32_t ulICCPMR = portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS; +__attribute__( ( used ) ) const uint32_t ulICCIAR = portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS; +__attribute__( ( used ) ) const uint32_t ulICCEOIR = portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS; +__attribute__( ( used ) ) const uint32_t ulICCPMR = portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS; __attribute__( ( used ) ) const uint32_t ulMaxAPIPriorityMask = ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ); /*-----------------------------------------------------------*/ @@ -291,11 +292,11 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, { /* The task will start with a floating point context. Leave enough * space for the registers - and ensure they are initialised to 0. */ - pxTopOfStack -= portFPU_REGISTER_WORDS; + pxTopOfStack -= portFPU_REGISTER_WORDS; memset( pxTopOfStack, 0x00, portFPU_REGISTER_WORDS * sizeof( StackType_t ) ); pxTopOfStack--; - *pxTopOfStack = pdTRUE; + *pxTopOfStack = pdTRUE; ulPortTaskHasFPUContext = pdTRUE; } #else /* if ( configUSE_TASK_FPU_SUPPORT == 1 ) */ @@ -331,21 +332,21 @@ BaseType_t xPortStartScheduler( void ) #if ( configASSERT_DEFINED == 1 ) { - volatile uint32_t ulOriginalPriority; + volatile uint32_t ulOriginalPriority; volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( configINTERRUPT_CONTROLLER_BASE_ADDRESS + portINTERRUPT_PRIORITY_REGISTER_OFFSET ); - volatile uint8_t ucMaxPriorityValue; + volatile uint8_t ucMaxPriorityValue; /* Determine how many priority bits are implemented in the GIC. * * Save the interrupt priority value that is about to be clobbered. */ - ulOriginalPriority = *pucFirstUserPriorityRegister; + ulOriginalPriority = *pucFirstUserPriorityRegister; /* Determine the number of priority bits available. First write to * all possible bits. */ *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE; /* Read the value back to see how many bits stuck. */ - ucMaxPriorityValue = *pucFirstUserPriorityRegister; + ucMaxPriorityValue = *pucFirstUserPriorityRegister; /* Shift to the least significant bits. */ while( ( ucMaxPriorityValue & portBIT_0_SET ) != portBIT_0_SET ) @@ -519,7 +520,7 @@ uint32_t ulPortSetInterruptMask( void ) } else { - ulReturn = pdFALSE; + ulReturn = pdFALSE; portICCPMR_PRIORITY_MASK_REGISTER = ( uint32_t ) ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ); __asm volatile ( "dsb \n" "isb \n"::: "memory" ); diff --git a/portable/GCC/ARM_CA9/portmacro.h b/portable/GCC/ARM_CA9/portmacro.h index a0e0a0810..9c6498ac3 100644 --- a/portable/GCC/ARM_CA9/portmacro.h +++ b/portable/GCC/ARM_CA9/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H @@ -149,7 +150,7 @@ /*-----------------------------------------------------------*/ - #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __builtin_clz( uxReadyPriorities ) ) + #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __builtin_clz( uxReadyPriorities ) ) #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ diff --git a/portable/GCC/ARM_CM0/port.c b/portable/GCC/ARM_CM0/port.c index b1bf3c184..06a176663 100644 --- a/portable/GCC/ARM_CM0/port.c +++ b/portable/GCC/ARM_CM0/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -97,7 +98,7 @@ static void prvTaskExitError( void ); /* Each task maintains its own interrupt status in the critical nesting * variable. */ -static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; +static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; /*-----------------------------------------------------------*/ @@ -105,7 +106,7 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; * The number of SysTick increments that make up one tick period. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t ulTimerCountsForOneTick = 0; + static uint32_t ulTimerCountsForOneTick = 0; #endif /* configUSE_TICKLESS_IDLE */ /* @@ -121,7 +122,7 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; * power functionality only. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t ulStoppedTimerCompensation = 0; + static uint32_t ulStoppedTimerCompensation = 0; #endif /* configUSE_TICKLESS_IDLE */ /*-----------------------------------------------------------*/ @@ -224,7 +225,7 @@ BaseType_t xPortStartScheduler( void ) vPortSetupTimerInterrupt(); /* Initialise the critical nesting count ready for the first task. */ - uxCriticalNesting = 0; + uxCriticalNesting = 0; /* Start the first task. */ vPortStartFirstTask(); @@ -380,19 +381,19 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* Calculate the constants required to configure the tick interrupt. */ #if ( configUSE_TICKLESS_IDLE == 1 ) { - ulTimerCountsForOneTick = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ); + ulTimerCountsForOneTick = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ); xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick; - ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR; + ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR; } #endif /* configUSE_TICKLESS_IDLE */ /* Stop and reset the SysTick. */ - portNVIC_SYSTICK_CTRL_REG = 0UL; + portNVIC_SYSTICK_CTRL_REG = 0UL; portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Configure SysTick to interrupt at the requested rate. */ - portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; - portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; + portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT; } /*-----------------------------------------------------------*/ @@ -400,7 +401,7 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ) { - uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; + uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; TickType_t xModifiableIdleTime; /* Make sure the SysTick reload value does not overflow the counter. */ @@ -418,7 +419,7 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* Calculate the reload value required to wait xExpectedIdleTime * tick periods. -1 is used because this code will execute part way * through one of the tick periods. */ - ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); + ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); if( ulReloadValue > ulStoppedTimerCompensation ) { @@ -437,14 +438,14 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) { /* Restart from whatever is left in the count register to complete * this tick period. */ - portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; + portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; /* Restart SysTick. */ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Reset the reload register to the value required for normal tick * periods. */ - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Re-enable interrupts - see comments above the cpsid instruction() * above. */ @@ -453,21 +454,21 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) else { /* Set the new reload value. */ - portNVIC_SYSTICK_LOAD_REG = ulReloadValue; + portNVIC_SYSTICK_LOAD_REG = ulReloadValue; /* Clear the SysTick count flag and set the count value back to * zero. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Restart SysTick. */ - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can * set its parameter to 0 to indicate that its implementation contains * its own wait for interrupt or wait for event instruction, and so wfi * should not be executed again. However, the original expected idle * time variable must remain unmodified, so a copy is taken. */ - xModifiableIdleTime = xExpectedIdleTime; + xModifiableIdleTime = xExpectedIdleTime; configPRE_SLEEP_PROCESSING( xModifiableIdleTime ); if( xModifiableIdleTime > 0 ) @@ -501,7 +502,7 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) * be, but using the tickless mode will inevitably result in some tiny * drift of the time maintained by the kernel with respect to calendar * time*/ - portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); /* Determine if the SysTick clock has already counted to zero and * been set back to the current reload value (the reload back being @@ -516,7 +517,7 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) * reloaded with ulReloadValue. Reset the * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick * period. */ - ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); + ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); /* Don't allow a tiny value, or values that have somehow * underflowed because the post sleep hook did something @@ -531,7 +532,7 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* As the pending tick will be processed as soon as this * function exits, the tick value maintained by the tick is stepped * forward by one less than the time spent waiting. */ - ulCompleteTickPeriods = xExpectedIdleTime - 1UL; + ulCompleteTickPeriods = xExpectedIdleTime - 1UL; } else { @@ -543,20 +544,20 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* How many complete tick periods passed while the processor * was waiting? */ - ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; + ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; /* The reload value is set to whatever fraction of a single tick * period remains. */ - portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; + portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; } /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard * value. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; vTaskStepTick( ulCompleteTickPeriods ); - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Exit with interrpts enabled. */ __asm volatile ( "cpsie i" ::: "memory" ); diff --git a/portable/GCC/ARM_CM0/portmacro.h b/portable/GCC/ARM_CM0/portmacro.h index 733d3bdbe..bd6e735e6 100644 --- a/portable/GCC/ARM_CM0/portmacro.h +++ b/portable/GCC/ARM_CM0/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ diff --git a/portable/GCC/ARM_CM23/non_secure/port.c b/portable/GCC/ARM_CM23/non_secure/port.c index 37f5d4812..3e42faba0 100644 --- a/portable/GCC/ARM_CM23/non_secure/port.c +++ b/portable/GCC/ARM_CM23/non_secure/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining @@ -349,7 +350,7 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV * @brief Each task maintains its own interrupt status in the critical nesting * variable. */ -static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL; +static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL; #if ( configENABLE_TRUSTZONE == 1 ) @@ -365,26 +366,26 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU /** * @brief The number of SysTick increments that make up one tick period. */ - static uint32_t ulTimerCountsForOneTick = 0; + static uint32_t ulTimerCountsForOneTick = 0; /** * @brief The maximum number of tick periods that can be suppressed is * limited by the 24 bit resolution of the SysTick timer. */ - static uint32_t xMaximumPossibleSuppressedTicks = 0; + static uint32_t xMaximumPossibleSuppressedTicks = 0; /** * @brief Compensate for the CPU cycles that pass while the SysTick is * stopped (low power functionality only). */ - static uint32_t ulStoppedTimerCompensation = 0; + static uint32_t ulStoppedTimerCompensation = 0; #endif /* configUSE_TICKLESS_IDLE */ /*-----------------------------------------------------------*/ #if ( configUSE_TICKLESS_IDLE == 1 ) __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ) { - uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; + uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; TickType_t xModifiableIdleTime; /* Make sure the SysTick reload value does not overflow the counter. */ @@ -402,7 +403,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU /* Calculate the reload value required to wait xExpectedIdleTime * tick periods. -1 is used because this code will execute part way * through one of the tick periods. */ - ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); + ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); if( ulReloadValue > ulStoppedTimerCompensation ) { @@ -421,14 +422,14 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU { /* Restart from whatever is left in the count register to complete * this tick period. */ - portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; + portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; /* Restart SysTick. */ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Reset the reload register to the value required for normal tick * periods. */ - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Re-enable interrupts - see comments above the cpsid instruction() * above. */ @@ -437,14 +438,14 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU else { /* Set the new reload value. */ - portNVIC_SYSTICK_LOAD_REG = ulReloadValue; + portNVIC_SYSTICK_LOAD_REG = ulReloadValue; /* Clear the SysTick count flag and set the count value back to * zero. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Restart SysTick. */ - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can * set its parameter to 0 to indicate that its implementation @@ -452,7 +453,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU * instruction, and so wfi should not be executed again. However, * the original expected idle time variable must remain unmodified, * so a copy is taken. */ - xModifiableIdleTime = xExpectedIdleTime; + xModifiableIdleTime = xExpectedIdleTime; configPRE_SLEEP_PROCESSING( xModifiableIdleTime ); if( xModifiableIdleTime > 0 ) @@ -486,7 +487,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU * best it can be, but using the tickless mode will inevitably * result in some tiny drift of the time maintained by the kernel * with respect to calendar time*/ - portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); /* Determine if the SysTick clock has already counted to zero and * been set back to the current reload value (the reload back being @@ -501,7 +502,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU * reloaded with ulReloadValue. Reset the * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick * period. */ - ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); + ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); /* Don't allow a tiny value, or values that have somehow * underflowed because the post sleep hook did something @@ -516,7 +517,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU /* As the pending tick will be processed as soon as this * function exits, the tick value maintained by the tick is * stepped forward by one less than the time spent waiting. */ - ulCompleteTickPeriods = xExpectedIdleTime - 1UL; + ulCompleteTickPeriods = xExpectedIdleTime - 1UL; } else { @@ -528,20 +529,20 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU /* How many complete tick periods passed while the processor * was waiting? */ - ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; + ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; /* The reload value is set to whatever fraction of a single tick * period remains. */ - portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; + portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; } /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard * value. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; vTaskStepTick( ulCompleteTickPeriods ); - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Exit with interrupts enabled. */ __asm volatile ( "cpsie i" ::: "memory" ); @@ -555,19 +556,19 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FU /* Calculate the constants required to configure the tick interrupt. */ #if ( configUSE_TICKLESS_IDLE == 1 ) { - ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); + ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick; - ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); + ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); } #endif /* configUSE_TICKLESS_IDLE */ /* Stop and reset the SysTick. */ - portNVIC_SYSTICK_CTRL_REG = 0UL; + portNVIC_SYSTICK_CTRL_REG = 0UL; portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Configure SysTick to interrupt at the requested rate. */ - portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; - portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; + portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT; } /*-----------------------------------------------------------*/ @@ -611,72 +612,72 @@ static void prvTaskExitError( void ) extern uint32_t * __unprivileged_flash_end__; extern uint32_t * __privileged_sram_start__; extern uint32_t * __privileged_sram_end__; - #else /* if defined( __ARMCC_VERSION ) */ + #else /* if defined( __ARMCC_VERSION ) */ /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __privileged_functions_start__[]; - extern uint32_t __privileged_functions_end__[]; - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - extern uint32_t __unprivileged_flash_start__[]; - extern uint32_t __unprivileged_flash_end__[]; - extern uint32_t __privileged_sram_start__[]; - extern uint32_t __privileged_sram_end__[]; + extern uint32_t __privileged_functions_start__[]; + extern uint32_t __privileged_functions_end__[]; + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; + extern uint32_t __unprivileged_flash_start__[]; + extern uint32_t __unprivileged_flash_end__[]; + extern uint32_t __privileged_sram_start__[]; + extern uint32_t __privileged_sram_end__[]; #endif /* defined( __ARMCC_VERSION ) */ /* Check that the MPU is present. */ if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE ) { /* MAIR0 - Index 0. */ - portMPU_MAIR0_REG |= ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK ); + portMPU_MAIR0_REG |= ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK ); /* MAIR0 - Index 1. */ - portMPU_MAIR0_REG |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK ); + portMPU_MAIR0_REG |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK ); /* Setup privileged flash as Read Only so that privileged tasks can * read it but not modify. */ - portMPU_RNR_REG = portPRIVILEGED_FLASH_REGION; - portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | - ( portMPU_REGION_NON_SHAREABLE ) | - ( portMPU_REGION_PRIVILEGED_READ_ONLY ); - portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_functions_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | - ( portMPU_RLAR_ATTR_INDEX0 ) | - ( portMPU_RLAR_REGION_ENABLE ); + portMPU_RNR_REG = portPRIVILEGED_FLASH_REGION; + portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | + ( portMPU_REGION_NON_SHAREABLE ) | + ( portMPU_REGION_PRIVILEGED_READ_ONLY ); + portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_functions_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | + ( portMPU_RLAR_ATTR_INDEX0 ) | + ( portMPU_RLAR_REGION_ENABLE ); /* Setup unprivileged flash as Read Only by both privileged and * unprivileged tasks. All tasks can read it but no-one can modify. */ - portMPU_RNR_REG = portUNPRIVILEGED_FLASH_REGION; - portMPU_RBAR_REG = ( ( ( uint32_t ) __unprivileged_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | - ( portMPU_REGION_NON_SHAREABLE ) | - ( portMPU_REGION_READ_ONLY ); - portMPU_RLAR_REG = ( ( ( uint32_t ) __unprivileged_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | - ( portMPU_RLAR_ATTR_INDEX0 ) | - ( portMPU_RLAR_REGION_ENABLE ); + portMPU_RNR_REG = portUNPRIVILEGED_FLASH_REGION; + portMPU_RBAR_REG = ( ( ( uint32_t ) __unprivileged_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | + ( portMPU_REGION_NON_SHAREABLE ) | + ( portMPU_REGION_READ_ONLY ); + portMPU_RLAR_REG = ( ( ( uint32_t ) __unprivileged_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | + ( portMPU_RLAR_ATTR_INDEX0 ) | + ( portMPU_RLAR_REGION_ENABLE ); /* Setup unprivileged syscalls flash as Read Only by both privileged * and unprivileged tasks. All tasks can read it but no-one can modify. */ - portMPU_RNR_REG = portUNPRIVILEGED_SYSCALLS_REGION; - portMPU_RBAR_REG = ( ( ( uint32_t ) __syscalls_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | - ( portMPU_REGION_NON_SHAREABLE ) | - ( portMPU_REGION_READ_ONLY ); - portMPU_RLAR_REG = ( ( ( uint32_t ) __syscalls_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | - ( portMPU_RLAR_ATTR_INDEX0 ) | - ( portMPU_RLAR_REGION_ENABLE ); + portMPU_RNR_REG = portUNPRIVILEGED_SYSCALLS_REGION; + portMPU_RBAR_REG = ( ( ( uint32_t ) __syscalls_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | + ( portMPU_REGION_NON_SHAREABLE ) | + ( portMPU_REGION_READ_ONLY ); + portMPU_RLAR_REG = ( ( ( uint32_t ) __syscalls_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | + ( portMPU_RLAR_ATTR_INDEX0 ) | + ( portMPU_RLAR_REGION_ENABLE ); /* Setup RAM containing kernel data for privileged access only. */ - portMPU_RNR_REG = portPRIVILEGED_RAM_REGION; - portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_sram_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | - ( portMPU_REGION_NON_SHAREABLE ) | - ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | - ( portMPU_REGION_EXECUTE_NEVER ); - portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_sram_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | - ( portMPU_RLAR_ATTR_INDEX0 ) | - ( portMPU_RLAR_REGION_ENABLE ); + portMPU_RNR_REG = portPRIVILEGED_RAM_REGION; + portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_sram_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | + ( portMPU_REGION_NON_SHAREABLE ) | + ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | + ( portMPU_REGION_EXECUTE_NEVER ); + portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_sram_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | + ( portMPU_RLAR_ATTR_INDEX0 ) | + ( portMPU_RLAR_REGION_ENABLE ); /* Enable mem fault. */ portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT; /* Enable MPU with privileged background access i.e. unmapped * regions have privileged access. */ - portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT ); + portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT ); } } #endif /* configENABLE_MPU */ @@ -771,24 +772,24 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO extern uint32_t * __syscalls_flash_end__; #else /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; #endif /* defined( __ARMCC_VERSION ) */ #endif /* configENABLE_MPU */ - uint32_t ulPC; + uint32_t ulPC; #if ( configENABLE_TRUSTZONE == 1 ) - uint32_t ulR0; + uint32_t ulR0; #if ( configENABLE_MPU == 1 ) - uint32_t ulControl, ulIsTaskPrivileged; + uint32_t ulControl, ulIsTaskPrivileged; #endif /* configENABLE_MPU */ #endif /* configENABLE_TRUSTZONE */ uint8_t ucSVCNumber; /* Register are stored on the stack in the following order - R0, R1, R2, R3, * R12, LR, PC, xPSR. */ - ulPC = pulCallerStackAddress[ 6 ]; + ulPC = pulCallerStackAddress[ 6 ]; ucSVCNumber = ( ( uint8_t * ) ulPC )[ -2 ]; switch( ucSVCNumber ) @@ -801,22 +802,22 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO ulR0 = pulCallerStackAddress[ 0 ]; #if ( configENABLE_MPU == 1 ) - { - /* Read the CONTROL register value. */ - __asm volatile ( "mrs %0, control" : "=r" ( ulControl ) ); + { + /* Read the CONTROL register value. */ + __asm volatile ( "mrs %0, control" : "=r" ( ulControl ) ); - /* The task that raised the SVC is privileged if Bit[0] - * in the CONTROL register is 0. */ - ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 ); + /* The task that raised the SVC is privileged if Bit[0] + * in the CONTROL register is 0. */ + ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 ); - /* Allocate and load a context for the secure task. */ - xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged ); - } - #else /* if ( configENABLE_MPU == 1 ) */ - { - /* Allocate and load a context for the secure task. */ - xSecureContext = SecureContext_AllocateContext( ulR0 ); - } + /* Allocate and load a context for the secure task. */ + xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged ); + } + #else /* if ( configENABLE_MPU == 1 ) */ + { + /* Allocate and load a context for the secure task. */ + xSecureContext = SecureContext_AllocateContext( ulR0 ); + } #endif /* configENABLE_MPU */ configASSERT( xSecureContext != NULL ); @@ -834,21 +835,21 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO case portSVC_START_SCHEDULER: #if ( configENABLE_TRUSTZONE == 1 ) - { - /* De-prioritize the non-secure exceptions so that the - * non-secure pendSV runs at the lowest priority. */ - SecureInit_DePrioritizeNSExceptions(); + { + /* De-prioritize the non-secure exceptions so that the + * non-secure pendSV runs at the lowest priority. */ + SecureInit_DePrioritizeNSExceptions(); - /* Initialize the secure context management system. */ - SecureContext_Init(); - } + /* Initialize the secure context management system. */ + SecureContext_Init(); + } #endif /* configENABLE_TRUSTZONE */ #if ( configENABLE_FPU == 1 ) - { - /* Setup the Floating Point Unit (FPU). */ - prvSetupFPU(); - } + { + /* Setup the Floating Point Unit (FPU). */ + prvSetupFPU(); + } #endif /* configENABLE_FPU */ /* Setup the context of the first task so that the first task starts @@ -881,12 +882,12 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO StackType_t * pxEndOfStack, TaskFunction_t pxCode, void * pvParameters, - BaseType_t xRunPrivileged ) /* PRIVILEGED_FUNCTION */ + BaseType_t xRunPrivileged ) /* PRIVILEGED_FUNCTION */ #else StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, StackType_t * pxEndOfStack, TaskFunction_t pxCode, - void * pvParameters ) /* PRIVILEGED_FUNCTION */ + void * pvParameters ) /* PRIVILEGED_FUNCTION */ #endif /* configENABLE_MPU */ { /* Simulate the stack frame as it would be created by a context switch @@ -1015,7 +1016,7 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */ vPortSetupTimerInterrupt(); /* Initialize the critical nesting count ready for the first task. */ - ulCriticalNesting = 0; + ulCriticalNesting = 0; /* Start the first task. */ vStartFirstTask(); @@ -1049,10 +1050,10 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ uint32_t ulStackDepth ) { uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber; - int32_t lIndex = 0; + int32_t lIndex = 0; /* Setup MAIR0. */ - xMPUSettings->ulMAIR0 = ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK ); + xMPUSettings->ulMAIR0 = ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK ); xMPUSettings->ulMAIR0 |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK ); /* This function is called automatically when the task is created - in @@ -1062,9 +1063,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ if( ulStackDepth > 0 ) { /* Define the region that allows access to the stack. */ - ulRegionStartAddress = ( ( uint32_t ) pxBottomOfStack ) & portMPU_RBAR_ADDRESS_MASK; - ulRegionEndAddress = ( uint32_t ) pxBottomOfStack + ( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) - 1; - ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; + ulRegionStartAddress = ( ( uint32_t ) pxBottomOfStack ) & portMPU_RBAR_ADDRESS_MASK; + ulRegionEndAddress = ( uint32_t ) pxBottomOfStack + ( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) - 1; + ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = ( ulRegionStartAddress ) | ( portMPU_REGION_NON_SHAREABLE ) | @@ -1087,9 +1088,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ /* Translate the generic region definition contained in xRegions * into the ARMv8 specific MPU settings that are then stored in * xMPUSettings. */ - ulRegionStartAddress = ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) & portMPU_RBAR_ADDRESS_MASK; - ulRegionEndAddress = ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1; - ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; + ulRegionStartAddress = ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) & portMPU_RBAR_ADDRESS_MASK; + ulRegionEndAddress = ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1; + ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; /* Start address. */ xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR = ( ulRegionStartAddress ) | @@ -1142,7 +1143,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ BaseType_t xPortIsInsideInterrupt( void ) { - uint32_t ulCurrentInterrupt; + uint32_t ulCurrentInterrupt; BaseType_t xReturn; /* Obtain the number of the currently executing interrupt. Interrupt Program diff --git a/portable/GCC/ARM_CM23/non_secure/portasm.c b/portable/GCC/ARM_CM23/non_secure/portasm.c index 94e24169d..d9eb31935 100644 --- a/portable/GCC/ARM_CM23/non_secure/portasm.c +++ b/portable/GCC/ARM_CM23/non_secure/portasm.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Standard includes. */ diff --git a/portable/GCC/ARM_CM23/non_secure/portasm.h b/portable/GCC/ARM_CM23/non_secure/portasm.h index edb5bcfca..fdba1b177 100644 --- a/portable/GCC/ARM_CM23/non_secure/portasm.h +++ b/portable/GCC/ARM_CM23/non_secure/portasm.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef __PORT_ASM_H__ diff --git a/portable/GCC/ARM_CM23/non_secure/portmacro.h b/portable/GCC/ARM_CM23/non_secure/portmacro.h index 060f91a66..747cdc766 100644 --- a/portable/GCC/ARM_CM23/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM23/non_secure/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/GCC/ARM_CM23/secure/secure_context.c b/portable/GCC/ARM_CM23/secure/secure_context.c index 04f1e5622..5608c7240 100644 --- a/portable/GCC/ARM_CM23/secure/secure_context.c +++ b/portable/GCC/ARM_CM23/secure/secure_context.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Secure context includes. */ @@ -101,12 +102,12 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize ) #endif /* configENABLE_MPU */ { - uint8_t * pucStackMemory = NULL; - uint32_t ulIPSR; - SecureContextHandle_t xSecureContextHandle = NULL; + uint8_t * pucStackMemory = NULL; + uint32_t ulIPSR; + SecureContextHandle_t xSecureContextHandle = NULL; #if ( configENABLE_MPU == 1 ) - uint32_t * pulCurrentStackPointer = NULL; + uint32_t * pulCurrentStackPointer = NULL; #endif /* configENABLE_MPU */ /* Read the Interrupt Program Status Register (IPSR) value. */ @@ -143,7 +144,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) /* Store the correct CONTROL value for the task on the stack. * This value is programmed in the CONTROL register on * context switch. */ - pulCurrentStackPointer = ( uint32_t * ) xSecureContextHandle->pucStackStart; + pulCurrentStackPointer = ( uint32_t * ) xSecureContextHandle->pucStackStart; pulCurrentStackPointer--; if( ulIsTaskPrivileged ) diff --git a/portable/GCC/ARM_CM23/secure/secure_context.h b/portable/GCC/ARM_CM23/secure/secure_context.h index a5d2f2967..62ef6bb94 100644 --- a/portable/GCC/ARM_CM23/secure/secure_context.h +++ b/portable/GCC/ARM_CM23/secure/secure_context.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef __SECURE_CONTEXT_H__ diff --git a/portable/GCC/ARM_CM23/secure/secure_context_port.c b/portable/GCC/ARM_CM23/secure/secure_context_port.c index d5be0026d..d7ef92b12 100644 --- a/portable/GCC/ARM_CM23/secure/secure_context_port.c +++ b/portable/GCC/ARM_CM23/secure/secure_context_port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Secure context includes. */ diff --git a/portable/GCC/ARM_CM23/secure/secure_heap.c b/portable/GCC/ARM_CM23/secure/secure_heap.c index b71f06da9..76b6ee1c3 100644 --- a/portable/GCC/ARM_CM23/secure/secure_heap.c +++ b/portable/GCC/ARM_CM23/secure/secure_heap.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Standard includes. */ @@ -115,7 +116,7 @@ static BlockLink_t xStart, * pxEnd = NULL; * @brief Keeps track of the number of free bytes remaining, but says nothing * about fragmentation. */ -static size_t xFreeBytesRemaining = 0U; +static size_t xFreeBytesRemaining = 0U; static size_t xMinimumEverFreeBytesRemaining = 0U; /** @@ -125,61 +126,61 @@ static size_t xMinimumEverFreeBytesRemaining = 0U; * then the block belongs to the application. When the bit is free the block is * still part of the free heap space. */ -static size_t xBlockAllocatedBit = 0; +static size_t xBlockAllocatedBit = 0; /*-----------------------------------------------------------*/ static void prvHeapInit( void ) { BlockLink_t * pxFirstFreeBlock; - uint8_t * pucAlignedHeap; - size_t uxAddress; - size_t xTotalHeapSize = secureconfigTOTAL_HEAP_SIZE; + uint8_t * pucAlignedHeap; + size_t uxAddress; + size_t xTotalHeapSize = secureconfigTOTAL_HEAP_SIZE; /* Ensure the heap starts on a correctly aligned boundary. */ - uxAddress = ( size_t ) ucHeap; + uxAddress = ( size_t ) ucHeap; if( ( uxAddress & secureportBYTE_ALIGNMENT_MASK ) != 0 ) { - uxAddress += ( secureportBYTE_ALIGNMENT - 1 ); - uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK ); + uxAddress += ( secureportBYTE_ALIGNMENT - 1 ); + uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK ); xTotalHeapSize -= uxAddress - ( size_t ) ucHeap; } - pucAlignedHeap = ( uint8_t * ) uxAddress; + pucAlignedHeap = ( uint8_t * ) uxAddress; /* xStart is used to hold a pointer to the first item in the list of free * blocks. The void cast is used to prevent compiler warnings. */ - xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap; - xStart.xBlockSize = ( size_t ) 0; + xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap; + xStart.xBlockSize = ( size_t ) 0; /* pxEnd is used to mark the end of the list of free blocks and is inserted * at the end of the heap space. */ - uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize; - uxAddress -= xHeapStructSize; - uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK ); - pxEnd = ( void * ) uxAddress; - pxEnd->xBlockSize = 0; - pxEnd->pxNextFreeBlock = NULL; + uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize; + uxAddress -= xHeapStructSize; + uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK ); + pxEnd = ( void * ) uxAddress; + pxEnd->xBlockSize = 0; + pxEnd->pxNextFreeBlock = NULL; /* To start with there is a single free block that is sized to take up the * entire heap space, minus the space taken by pxEnd. */ - pxFirstFreeBlock = ( void * ) pucAlignedHeap; - pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock; + pxFirstFreeBlock = ( void * ) pucAlignedHeap; + pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock; pxFirstFreeBlock->pxNextFreeBlock = pxEnd; /* Only one block exists - and it covers the entire usable heap space. */ - xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize; - xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize; + xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize; + xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize; /* Work out the position of the top bit in a size_t variable. */ - xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * secureheapBITS_PER_BYTE ) - 1 ); + xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * secureheapBITS_PER_BYTE ) - 1 ); } /*-----------------------------------------------------------*/ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert ) { BlockLink_t * pxIterator; - uint8_t * puc; + uint8_t * puc; /* Iterate through the list until a block is found that has a higher address * than the block being inserted. */ @@ -195,7 +196,7 @@ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert ) if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert ) { pxIterator->xBlockSize += pxBlockToInsert->xBlockSize; - pxBlockToInsert = pxIterator; + pxBlockToInsert = pxIterator; } else { @@ -211,7 +212,7 @@ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert ) if( pxIterator->pxNextFreeBlock != pxEnd ) { /* Form one big block from the two blocks. */ - pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize; + pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize; pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock; } else @@ -242,7 +243,7 @@ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert ) void * pvPortMalloc( size_t xWantedSize ) { BlockLink_t * pxBlock, * pxPreviousBlock, * pxNewBlockLink; - void * pvReturn = NULL; + void * pvReturn = NULL; /* If this is the first call to malloc then the heap will require * initialisation to setup the list of free blocks. */ @@ -290,12 +291,12 @@ void * pvPortMalloc( size_t xWantedSize ) /* Traverse the list from the start (lowest address) block until * one of adequate size is found. */ pxPreviousBlock = &xStart; - pxBlock = xStart.pxNextFreeBlock; + pxBlock = xStart.pxNextFreeBlock; while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) ) { pxPreviousBlock = pxBlock; - pxBlock = pxBlock->pxNextFreeBlock; + pxBlock = pxBlock->pxNextFreeBlock; } /* If the end marker was reached then a block of adequate size was @@ -304,7 +305,7 @@ void * pvPortMalloc( size_t xWantedSize ) { /* Return the memory space pointed to - jumping over the * BlockLink_t structure at its start. */ - pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize ); + pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize ); /* This block is being returned for use so must be taken out * of the list of free blocks. */ @@ -318,13 +319,13 @@ void * pvPortMalloc( size_t xWantedSize ) * block following the number of bytes requested. The void * cast is used to prevent byte alignment warnings from the * compiler. */ - pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize ); + pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize ); secureportASSERT( ( ( ( size_t ) pxNewBlockLink ) & secureportBYTE_ALIGNMENT_MASK ) == 0 ); /* Calculate the sizes of two blocks split from the single * block. */ pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize; - pxBlock->xBlockSize = xWantedSize; + pxBlock->xBlockSize = xWantedSize; /* Insert the new block into the list of free blocks. */ prvInsertBlockIntoFreeList( pxNewBlockLink ); @@ -334,7 +335,7 @@ void * pvPortMalloc( size_t xWantedSize ) mtCOVERAGE_TEST_MARKER(); } - xFreeBytesRemaining -= pxBlock->xBlockSize; + xFreeBytesRemaining -= pxBlock->xBlockSize; if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining ) { @@ -347,8 +348,8 @@ void * pvPortMalloc( size_t xWantedSize ) /* The block is being returned - it is allocated and owned by * the application and has no "next" block. */ - pxBlock->xBlockSize |= xBlockAllocatedBit; - pxBlock->pxNextFreeBlock = NULL; + pxBlock->xBlockSize |= xBlockAllocatedBit; + pxBlock->pxNextFreeBlock = NULL; } else { @@ -388,14 +389,14 @@ void * pvPortMalloc( size_t xWantedSize ) void vPortFree( void * pv ) { - uint8_t * puc = ( uint8_t * ) pv; + uint8_t * puc = ( uint8_t * ) pv; BlockLink_t * pxLink; if( pv != NULL ) { /* The memory being freed will have an BlockLink_t structure immediately * before it. */ - puc -= xHeapStructSize; + puc -= xHeapStructSize; /* This casting is to keep the compiler from issuing warnings. */ pxLink = ( void * ) puc; diff --git a/portable/GCC/ARM_CM23/secure/secure_heap.h b/portable/GCC/ARM_CM23/secure/secure_heap.h index 7226fa26f..d5ddaa853 100644 --- a/portable/GCC/ARM_CM23/secure/secure_heap.h +++ b/portable/GCC/ARM_CM23/secure/secure_heap.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef __SECURE_HEAP_H__ diff --git a/portable/GCC/ARM_CM23/secure/secure_init.c b/portable/GCC/ARM_CM23/secure/secure_init.c index 5ffa9e613..6f0be2547 100644 --- a/portable/GCC/ARM_CM23/secure/secure_init.c +++ b/portable/GCC/ARM_CM23/secure/secure_init.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Standard includes. */ diff --git a/portable/GCC/ARM_CM23/secure/secure_init.h b/portable/GCC/ARM_CM23/secure/secure_init.h index 96ba9aa10..643873468 100644 --- a/portable/GCC/ARM_CM23/secure/secure_init.h +++ b/portable/GCC/ARM_CM23/secure/secure_init.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef __SECURE_INIT_H__ diff --git a/portable/GCC/ARM_CM23/secure/secure_port_macros.h b/portable/GCC/ARM_CM23/secure/secure_port_macros.h index f37655d48..d0ace6242 100644 --- a/portable/GCC/ARM_CM23/secure/secure_port_macros.h +++ b/portable/GCC/ARM_CM23/secure/secure_port_macros.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef __SECURE_PORT_MACROS_H__ diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/port.c b/portable/GCC/ARM_CM23_NTZ/non_secure/port.c index 37f5d4812..3e42faba0 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining @@ -349,7 +350,7 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV * @brief Each task maintains its own interrupt status in the critical nesting * variable. */ -static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL; +static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL; #if ( configENABLE_TRUSTZONE == 1 ) @@ -365,26 +366,26 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU /** * @brief The number of SysTick increments that make up one tick period. */ - static uint32_t ulTimerCountsForOneTick = 0; + static uint32_t ulTimerCountsForOneTick = 0; /** * @brief The maximum number of tick periods that can be suppressed is * limited by the 24 bit resolution of the SysTick timer. */ - static uint32_t xMaximumPossibleSuppressedTicks = 0; + static uint32_t xMaximumPossibleSuppressedTicks = 0; /** * @brief Compensate for the CPU cycles that pass while the SysTick is * stopped (low power functionality only). */ - static uint32_t ulStoppedTimerCompensation = 0; + static uint32_t ulStoppedTimerCompensation = 0; #endif /* configUSE_TICKLESS_IDLE */ /*-----------------------------------------------------------*/ #if ( configUSE_TICKLESS_IDLE == 1 ) __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ) { - uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; + uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; TickType_t xModifiableIdleTime; /* Make sure the SysTick reload value does not overflow the counter. */ @@ -402,7 +403,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU /* Calculate the reload value required to wait xExpectedIdleTime * tick periods. -1 is used because this code will execute part way * through one of the tick periods. */ - ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); + ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); if( ulReloadValue > ulStoppedTimerCompensation ) { @@ -421,14 +422,14 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU { /* Restart from whatever is left in the count register to complete * this tick period. */ - portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; + portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; /* Restart SysTick. */ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Reset the reload register to the value required for normal tick * periods. */ - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Re-enable interrupts - see comments above the cpsid instruction() * above. */ @@ -437,14 +438,14 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU else { /* Set the new reload value. */ - portNVIC_SYSTICK_LOAD_REG = ulReloadValue; + portNVIC_SYSTICK_LOAD_REG = ulReloadValue; /* Clear the SysTick count flag and set the count value back to * zero. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Restart SysTick. */ - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can * set its parameter to 0 to indicate that its implementation @@ -452,7 +453,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU * instruction, and so wfi should not be executed again. However, * the original expected idle time variable must remain unmodified, * so a copy is taken. */ - xModifiableIdleTime = xExpectedIdleTime; + xModifiableIdleTime = xExpectedIdleTime; configPRE_SLEEP_PROCESSING( xModifiableIdleTime ); if( xModifiableIdleTime > 0 ) @@ -486,7 +487,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU * best it can be, but using the tickless mode will inevitably * result in some tiny drift of the time maintained by the kernel * with respect to calendar time*/ - portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); /* Determine if the SysTick clock has already counted to zero and * been set back to the current reload value (the reload back being @@ -501,7 +502,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU * reloaded with ulReloadValue. Reset the * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick * period. */ - ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); + ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); /* Don't allow a tiny value, or values that have somehow * underflowed because the post sleep hook did something @@ -516,7 +517,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU /* As the pending tick will be processed as soon as this * function exits, the tick value maintained by the tick is * stepped forward by one less than the time spent waiting. */ - ulCompleteTickPeriods = xExpectedIdleTime - 1UL; + ulCompleteTickPeriods = xExpectedIdleTime - 1UL; } else { @@ -528,20 +529,20 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU /* How many complete tick periods passed while the processor * was waiting? */ - ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; + ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; /* The reload value is set to whatever fraction of a single tick * period remains. */ - portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; + portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; } /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard * value. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; vTaskStepTick( ulCompleteTickPeriods ); - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Exit with interrupts enabled. */ __asm volatile ( "cpsie i" ::: "memory" ); @@ -555,19 +556,19 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FU /* Calculate the constants required to configure the tick interrupt. */ #if ( configUSE_TICKLESS_IDLE == 1 ) { - ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); + ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick; - ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); + ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); } #endif /* configUSE_TICKLESS_IDLE */ /* Stop and reset the SysTick. */ - portNVIC_SYSTICK_CTRL_REG = 0UL; + portNVIC_SYSTICK_CTRL_REG = 0UL; portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Configure SysTick to interrupt at the requested rate. */ - portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; - portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; + portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT; } /*-----------------------------------------------------------*/ @@ -611,72 +612,72 @@ static void prvTaskExitError( void ) extern uint32_t * __unprivileged_flash_end__; extern uint32_t * __privileged_sram_start__; extern uint32_t * __privileged_sram_end__; - #else /* if defined( __ARMCC_VERSION ) */ + #else /* if defined( __ARMCC_VERSION ) */ /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __privileged_functions_start__[]; - extern uint32_t __privileged_functions_end__[]; - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - extern uint32_t __unprivileged_flash_start__[]; - extern uint32_t __unprivileged_flash_end__[]; - extern uint32_t __privileged_sram_start__[]; - extern uint32_t __privileged_sram_end__[]; + extern uint32_t __privileged_functions_start__[]; + extern uint32_t __privileged_functions_end__[]; + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; + extern uint32_t __unprivileged_flash_start__[]; + extern uint32_t __unprivileged_flash_end__[]; + extern uint32_t __privileged_sram_start__[]; + extern uint32_t __privileged_sram_end__[]; #endif /* defined( __ARMCC_VERSION ) */ /* Check that the MPU is present. */ if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE ) { /* MAIR0 - Index 0. */ - portMPU_MAIR0_REG |= ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK ); + portMPU_MAIR0_REG |= ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK ); /* MAIR0 - Index 1. */ - portMPU_MAIR0_REG |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK ); + portMPU_MAIR0_REG |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK ); /* Setup privileged flash as Read Only so that privileged tasks can * read it but not modify. */ - portMPU_RNR_REG = portPRIVILEGED_FLASH_REGION; - portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | - ( portMPU_REGION_NON_SHAREABLE ) | - ( portMPU_REGION_PRIVILEGED_READ_ONLY ); - portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_functions_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | - ( portMPU_RLAR_ATTR_INDEX0 ) | - ( portMPU_RLAR_REGION_ENABLE ); + portMPU_RNR_REG = portPRIVILEGED_FLASH_REGION; + portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | + ( portMPU_REGION_NON_SHAREABLE ) | + ( portMPU_REGION_PRIVILEGED_READ_ONLY ); + portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_functions_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | + ( portMPU_RLAR_ATTR_INDEX0 ) | + ( portMPU_RLAR_REGION_ENABLE ); /* Setup unprivileged flash as Read Only by both privileged and * unprivileged tasks. All tasks can read it but no-one can modify. */ - portMPU_RNR_REG = portUNPRIVILEGED_FLASH_REGION; - portMPU_RBAR_REG = ( ( ( uint32_t ) __unprivileged_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | - ( portMPU_REGION_NON_SHAREABLE ) | - ( portMPU_REGION_READ_ONLY ); - portMPU_RLAR_REG = ( ( ( uint32_t ) __unprivileged_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | - ( portMPU_RLAR_ATTR_INDEX0 ) | - ( portMPU_RLAR_REGION_ENABLE ); + portMPU_RNR_REG = portUNPRIVILEGED_FLASH_REGION; + portMPU_RBAR_REG = ( ( ( uint32_t ) __unprivileged_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | + ( portMPU_REGION_NON_SHAREABLE ) | + ( portMPU_REGION_READ_ONLY ); + portMPU_RLAR_REG = ( ( ( uint32_t ) __unprivileged_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | + ( portMPU_RLAR_ATTR_INDEX0 ) | + ( portMPU_RLAR_REGION_ENABLE ); /* Setup unprivileged syscalls flash as Read Only by both privileged * and unprivileged tasks. All tasks can read it but no-one can modify. */ - portMPU_RNR_REG = portUNPRIVILEGED_SYSCALLS_REGION; - portMPU_RBAR_REG = ( ( ( uint32_t ) __syscalls_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | - ( portMPU_REGION_NON_SHAREABLE ) | - ( portMPU_REGION_READ_ONLY ); - portMPU_RLAR_REG = ( ( ( uint32_t ) __syscalls_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | - ( portMPU_RLAR_ATTR_INDEX0 ) | - ( portMPU_RLAR_REGION_ENABLE ); + portMPU_RNR_REG = portUNPRIVILEGED_SYSCALLS_REGION; + portMPU_RBAR_REG = ( ( ( uint32_t ) __syscalls_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | + ( portMPU_REGION_NON_SHAREABLE ) | + ( portMPU_REGION_READ_ONLY ); + portMPU_RLAR_REG = ( ( ( uint32_t ) __syscalls_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | + ( portMPU_RLAR_ATTR_INDEX0 ) | + ( portMPU_RLAR_REGION_ENABLE ); /* Setup RAM containing kernel data for privileged access only. */ - portMPU_RNR_REG = portPRIVILEGED_RAM_REGION; - portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_sram_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | - ( portMPU_REGION_NON_SHAREABLE ) | - ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | - ( portMPU_REGION_EXECUTE_NEVER ); - portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_sram_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | - ( portMPU_RLAR_ATTR_INDEX0 ) | - ( portMPU_RLAR_REGION_ENABLE ); + portMPU_RNR_REG = portPRIVILEGED_RAM_REGION; + portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_sram_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | + ( portMPU_REGION_NON_SHAREABLE ) | + ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | + ( portMPU_REGION_EXECUTE_NEVER ); + portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_sram_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | + ( portMPU_RLAR_ATTR_INDEX0 ) | + ( portMPU_RLAR_REGION_ENABLE ); /* Enable mem fault. */ portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT; /* Enable MPU with privileged background access i.e. unmapped * regions have privileged access. */ - portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT ); + portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT ); } } #endif /* configENABLE_MPU */ @@ -771,24 +772,24 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO extern uint32_t * __syscalls_flash_end__; #else /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; #endif /* defined( __ARMCC_VERSION ) */ #endif /* configENABLE_MPU */ - uint32_t ulPC; + uint32_t ulPC; #if ( configENABLE_TRUSTZONE == 1 ) - uint32_t ulR0; + uint32_t ulR0; #if ( configENABLE_MPU == 1 ) - uint32_t ulControl, ulIsTaskPrivileged; + uint32_t ulControl, ulIsTaskPrivileged; #endif /* configENABLE_MPU */ #endif /* configENABLE_TRUSTZONE */ uint8_t ucSVCNumber; /* Register are stored on the stack in the following order - R0, R1, R2, R3, * R12, LR, PC, xPSR. */ - ulPC = pulCallerStackAddress[ 6 ]; + ulPC = pulCallerStackAddress[ 6 ]; ucSVCNumber = ( ( uint8_t * ) ulPC )[ -2 ]; switch( ucSVCNumber ) @@ -801,22 +802,22 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO ulR0 = pulCallerStackAddress[ 0 ]; #if ( configENABLE_MPU == 1 ) - { - /* Read the CONTROL register value. */ - __asm volatile ( "mrs %0, control" : "=r" ( ulControl ) ); + { + /* Read the CONTROL register value. */ + __asm volatile ( "mrs %0, control" : "=r" ( ulControl ) ); - /* The task that raised the SVC is privileged if Bit[0] - * in the CONTROL register is 0. */ - ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 ); + /* The task that raised the SVC is privileged if Bit[0] + * in the CONTROL register is 0. */ + ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 ); - /* Allocate and load a context for the secure task. */ - xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged ); - } - #else /* if ( configENABLE_MPU == 1 ) */ - { - /* Allocate and load a context for the secure task. */ - xSecureContext = SecureContext_AllocateContext( ulR0 ); - } + /* Allocate and load a context for the secure task. */ + xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged ); + } + #else /* if ( configENABLE_MPU == 1 ) */ + { + /* Allocate and load a context for the secure task. */ + xSecureContext = SecureContext_AllocateContext( ulR0 ); + } #endif /* configENABLE_MPU */ configASSERT( xSecureContext != NULL ); @@ -834,21 +835,21 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO case portSVC_START_SCHEDULER: #if ( configENABLE_TRUSTZONE == 1 ) - { - /* De-prioritize the non-secure exceptions so that the - * non-secure pendSV runs at the lowest priority. */ - SecureInit_DePrioritizeNSExceptions(); + { + /* De-prioritize the non-secure exceptions so that the + * non-secure pendSV runs at the lowest priority. */ + SecureInit_DePrioritizeNSExceptions(); - /* Initialize the secure context management system. */ - SecureContext_Init(); - } + /* Initialize the secure context management system. */ + SecureContext_Init(); + } #endif /* configENABLE_TRUSTZONE */ #if ( configENABLE_FPU == 1 ) - { - /* Setup the Floating Point Unit (FPU). */ - prvSetupFPU(); - } + { + /* Setup the Floating Point Unit (FPU). */ + prvSetupFPU(); + } #endif /* configENABLE_FPU */ /* Setup the context of the first task so that the first task starts @@ -881,12 +882,12 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO StackType_t * pxEndOfStack, TaskFunction_t pxCode, void * pvParameters, - BaseType_t xRunPrivileged ) /* PRIVILEGED_FUNCTION */ + BaseType_t xRunPrivileged ) /* PRIVILEGED_FUNCTION */ #else StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, StackType_t * pxEndOfStack, TaskFunction_t pxCode, - void * pvParameters ) /* PRIVILEGED_FUNCTION */ + void * pvParameters ) /* PRIVILEGED_FUNCTION */ #endif /* configENABLE_MPU */ { /* Simulate the stack frame as it would be created by a context switch @@ -1015,7 +1016,7 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */ vPortSetupTimerInterrupt(); /* Initialize the critical nesting count ready for the first task. */ - ulCriticalNesting = 0; + ulCriticalNesting = 0; /* Start the first task. */ vStartFirstTask(); @@ -1049,10 +1050,10 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ uint32_t ulStackDepth ) { uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber; - int32_t lIndex = 0; + int32_t lIndex = 0; /* Setup MAIR0. */ - xMPUSettings->ulMAIR0 = ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK ); + xMPUSettings->ulMAIR0 = ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK ); xMPUSettings->ulMAIR0 |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK ); /* This function is called automatically when the task is created - in @@ -1062,9 +1063,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ if( ulStackDepth > 0 ) { /* Define the region that allows access to the stack. */ - ulRegionStartAddress = ( ( uint32_t ) pxBottomOfStack ) & portMPU_RBAR_ADDRESS_MASK; - ulRegionEndAddress = ( uint32_t ) pxBottomOfStack + ( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) - 1; - ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; + ulRegionStartAddress = ( ( uint32_t ) pxBottomOfStack ) & portMPU_RBAR_ADDRESS_MASK; + ulRegionEndAddress = ( uint32_t ) pxBottomOfStack + ( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) - 1; + ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = ( ulRegionStartAddress ) | ( portMPU_REGION_NON_SHAREABLE ) | @@ -1087,9 +1088,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ /* Translate the generic region definition contained in xRegions * into the ARMv8 specific MPU settings that are then stored in * xMPUSettings. */ - ulRegionStartAddress = ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) & portMPU_RBAR_ADDRESS_MASK; - ulRegionEndAddress = ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1; - ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; + ulRegionStartAddress = ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) & portMPU_RBAR_ADDRESS_MASK; + ulRegionEndAddress = ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1; + ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; /* Start address. */ xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR = ( ulRegionStartAddress ) | @@ -1142,7 +1143,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ BaseType_t xPortIsInsideInterrupt( void ) { - uint32_t ulCurrentInterrupt; + uint32_t ulCurrentInterrupt; BaseType_t xReturn; /* Obtain the number of the currently executing interrupt. Interrupt Program diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c b/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c index e683d1a9a..cf57e6e91 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Standard includes. */ diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h b/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h index edb5bcfca..fdba1b177 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef __PORT_ASM_H__ diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h b/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h index 060f91a66..747cdc766 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/GCC/ARM_CM3/port.c b/portable/GCC/ARM_CM3/port.c index 69b832238..58b832b3d 100644 --- a/portable/GCC/ARM_CM3/port.c +++ b/portable/GCC/ARM_CM3/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -130,13 +131,13 @@ static void prvTaskExitError( void ); /* Each task maintains its own interrupt status in the critical nesting * variable. */ -static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; +static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; /* * The number of SysTick increments that make up one tick period. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t ulTimerCountsForOneTick = 0; + static uint32_t ulTimerCountsForOneTick = 0; #endif /* configUSE_TICKLESS_IDLE */ /* @@ -144,7 +145,7 @@ static UBaseType_t uxCriticalNesting = 0xaaaaa * 24 bit resolution of the SysTick timer. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t xMaximumPossibleSuppressedTicks = 0; + static uint32_t xMaximumPossibleSuppressedTicks = 0; #endif /* configUSE_TICKLESS_IDLE */ /* @@ -152,7 +153,7 @@ static UBaseType_t uxCriticalNesting = 0xaaaaa * power functionality only. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t ulStoppedTimerCompensation = 0; + static uint32_t ulStoppedTimerCompensation = 0; #endif /* configUSE_TICKLESS_IDLE */ /* @@ -161,8 +162,8 @@ static UBaseType_t uxCriticalNesting = 0xaaaaa * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY. */ #if ( configASSERT_DEFINED == 1 ) - static uint8_t ucMaxSysCallPriority = 0; - static uint32_t ulMaxPRIGROUPValue = 0; + static uint8_t ucMaxSysCallPriority = 0; + static uint32_t ulMaxPRIGROUPValue = 0; static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16; #endif /* configASSERT_DEFINED */ @@ -266,9 +267,9 @@ BaseType_t xPortStartScheduler( void ) #if ( configASSERT_DEFINED == 1 ) { - volatile uint32_t ulOriginalPriority; + volatile uint32_t ulOriginalPriority; volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER ); - volatile uint8_t ucMaxPriorityValue; + volatile uint8_t ucMaxPriorityValue; /* Determine the maximum priority from which ISR safe FreeRTOS API * functions can be called. ISR safe functions are those that end in @@ -276,21 +277,21 @@ BaseType_t xPortStartScheduler( void ) * ensure interrupt entry is as fast and simple as possible. * * Save the interrupt priority value that is about to be clobbered. */ - ulOriginalPriority = *pucFirstUserPriorityRegister; + ulOriginalPriority = *pucFirstUserPriorityRegister; /* Determine the number of priority bits available. First write to all * possible bits. */ *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE; /* Read the value back to see how many bits stuck. */ - ucMaxPriorityValue = *pucFirstUserPriorityRegister; + ucMaxPriorityValue = *pucFirstUserPriorityRegister; /* Use the same mask on the maximum system call priority. */ - ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; + ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; /* Calculate the maximum acceptable priority group value for the number * of bits read back. */ - ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS; + ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS; while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE ) { @@ -318,8 +319,8 @@ BaseType_t xPortStartScheduler( void ) /* Shift the priority group value back to its position within the AIRCR * register. */ - ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; - ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; + ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; + ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; /* Restore the clobbered interrupt priority register to its original * value. */ @@ -336,7 +337,7 @@ BaseType_t xPortStartScheduler( void ) vPortSetupTimerInterrupt(); /* Initialise the critical nesting count ready for the first task. */ - uxCriticalNesting = 0; + uxCriticalNesting = 0; /* Start the first task. */ prvPortStartFirstTask(); @@ -453,7 +454,7 @@ void xPortSysTickHandler( void ) __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ) { - uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; + uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; TickType_t xModifiableIdleTime; /* Make sure the SysTick reload value does not overflow the counter. */ @@ -471,7 +472,7 @@ void xPortSysTickHandler( void ) /* Calculate the reload value required to wait xExpectedIdleTime * tick periods. -1 is used because this code will execute part way * through one of the tick periods. */ - ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); + ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); if( ulReloadValue > ulStoppedTimerCompensation ) { @@ -490,14 +491,14 @@ void xPortSysTickHandler( void ) { /* Restart from whatever is left in the count register to complete * this tick period. */ - portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; + portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; /* Restart SysTick. */ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Reset the reload register to the value required for normal tick * periods. */ - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Re-enable interrupts - see comments above the cpsid instruction() * above. */ @@ -506,21 +507,21 @@ void xPortSysTickHandler( void ) else { /* Set the new reload value. */ - portNVIC_SYSTICK_LOAD_REG = ulReloadValue; + portNVIC_SYSTICK_LOAD_REG = ulReloadValue; /* Clear the SysTick count flag and set the count value back to * zero. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Restart SysTick. */ - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can * set its parameter to 0 to indicate that its implementation contains * its own wait for interrupt or wait for event instruction, and so wfi * should not be executed again. However, the original expected idle * time variable must remain unmodified, so a copy is taken. */ - xModifiableIdleTime = xExpectedIdleTime; + xModifiableIdleTime = xExpectedIdleTime; configPRE_SLEEP_PROCESSING( xModifiableIdleTime ); if( xModifiableIdleTime > 0 ) @@ -554,7 +555,7 @@ void xPortSysTickHandler( void ) * be, but using the tickless mode will inevitably result in some tiny * drift of the time maintained by the kernel with respect to calendar * time*/ - portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); /* Determine if the SysTick clock has already counted to zero and * been set back to the current reload value (the reload back being @@ -569,7 +570,7 @@ void xPortSysTickHandler( void ) * reloaded with ulReloadValue. Reset the * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick * period. */ - ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); + ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); /* Don't allow a tiny value, or values that have somehow * underflowed because the post sleep hook did something @@ -584,7 +585,7 @@ void xPortSysTickHandler( void ) /* As the pending tick will be processed as soon as this * function exits, the tick value maintained by the tick is stepped * forward by one less than the time spent waiting. */ - ulCompleteTickPeriods = xExpectedIdleTime - 1UL; + ulCompleteTickPeriods = xExpectedIdleTime - 1UL; } else { @@ -596,20 +597,20 @@ void xPortSysTickHandler( void ) /* How many complete tick periods passed while the processor * was waiting? */ - ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; + ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; /* The reload value is set to whatever fraction of a single tick * period remains. */ - portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; + portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; } /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard * value. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; vTaskStepTick( ulCompleteTickPeriods ); - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Exit with interrupts enabled. */ __asm volatile ( "cpsie i" ::: "memory" ); @@ -628,19 +629,19 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* Calculate the constants required to configure the tick interrupt. */ #if ( configUSE_TICKLESS_IDLE == 1 ) { - ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); + ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick; - ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); + ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); } #endif /* configUSE_TICKLESS_IDLE */ /* Stop and clear the SysTick. */ - portNVIC_SYSTICK_CTRL_REG = 0UL; + portNVIC_SYSTICK_CTRL_REG = 0UL; portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Configure SysTick to interrupt at the requested rate. */ - portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; - portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT ); + portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT ); } /*-----------------------------------------------------------*/ @@ -649,7 +650,7 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) void vPortValidateInterruptPriority( void ) { uint32_t ulCurrentInterrupt; - uint8_t ucCurrentPriority; + uint8_t ucCurrentPriority; /* Obtain the number of the currently executing interrupt. */ __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" ); diff --git a/portable/GCC/ARM_CM3/portmacro.h b/portable/GCC/ARM_CM3/portmacro.h index a64b01a0b..acfed763c 100644 --- a/portable/GCC/ARM_CM3/portmacro.h +++ b/portable/GCC/ARM_CM3/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ @@ -147,7 +148,7 @@ /*-----------------------------------------------------------*/ - #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) ) + #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) ) #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ @@ -171,7 +172,7 @@ portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void ) { - uint32_t ulCurrentInterrupt; + uint32_t ulCurrentInterrupt; BaseType_t xReturn; /* Obtain the number of the currently executing interrupt. */ diff --git a/portable/GCC/ARM_CM33/non_secure/port.c b/portable/GCC/ARM_CM33/non_secure/port.c index 37f5d4812..3e42faba0 100644 --- a/portable/GCC/ARM_CM33/non_secure/port.c +++ b/portable/GCC/ARM_CM33/non_secure/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining @@ -349,7 +350,7 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV * @brief Each task maintains its own interrupt status in the critical nesting * variable. */ -static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL; +static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL; #if ( configENABLE_TRUSTZONE == 1 ) @@ -365,26 +366,26 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU /** * @brief The number of SysTick increments that make up one tick period. */ - static uint32_t ulTimerCountsForOneTick = 0; + static uint32_t ulTimerCountsForOneTick = 0; /** * @brief The maximum number of tick periods that can be suppressed is * limited by the 24 bit resolution of the SysTick timer. */ - static uint32_t xMaximumPossibleSuppressedTicks = 0; + static uint32_t xMaximumPossibleSuppressedTicks = 0; /** * @brief Compensate for the CPU cycles that pass while the SysTick is * stopped (low power functionality only). */ - static uint32_t ulStoppedTimerCompensation = 0; + static uint32_t ulStoppedTimerCompensation = 0; #endif /* configUSE_TICKLESS_IDLE */ /*-----------------------------------------------------------*/ #if ( configUSE_TICKLESS_IDLE == 1 ) __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ) { - uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; + uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; TickType_t xModifiableIdleTime; /* Make sure the SysTick reload value does not overflow the counter. */ @@ -402,7 +403,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU /* Calculate the reload value required to wait xExpectedIdleTime * tick periods. -1 is used because this code will execute part way * through one of the tick periods. */ - ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); + ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); if( ulReloadValue > ulStoppedTimerCompensation ) { @@ -421,14 +422,14 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU { /* Restart from whatever is left in the count register to complete * this tick period. */ - portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; + portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; /* Restart SysTick. */ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Reset the reload register to the value required for normal tick * periods. */ - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Re-enable interrupts - see comments above the cpsid instruction() * above. */ @@ -437,14 +438,14 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU else { /* Set the new reload value. */ - portNVIC_SYSTICK_LOAD_REG = ulReloadValue; + portNVIC_SYSTICK_LOAD_REG = ulReloadValue; /* Clear the SysTick count flag and set the count value back to * zero. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Restart SysTick. */ - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can * set its parameter to 0 to indicate that its implementation @@ -452,7 +453,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU * instruction, and so wfi should not be executed again. However, * the original expected idle time variable must remain unmodified, * so a copy is taken. */ - xModifiableIdleTime = xExpectedIdleTime; + xModifiableIdleTime = xExpectedIdleTime; configPRE_SLEEP_PROCESSING( xModifiableIdleTime ); if( xModifiableIdleTime > 0 ) @@ -486,7 +487,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU * best it can be, but using the tickless mode will inevitably * result in some tiny drift of the time maintained by the kernel * with respect to calendar time*/ - portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); /* Determine if the SysTick clock has already counted to zero and * been set back to the current reload value (the reload back being @@ -501,7 +502,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU * reloaded with ulReloadValue. Reset the * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick * period. */ - ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); + ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); /* Don't allow a tiny value, or values that have somehow * underflowed because the post sleep hook did something @@ -516,7 +517,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU /* As the pending tick will be processed as soon as this * function exits, the tick value maintained by the tick is * stepped forward by one less than the time spent waiting. */ - ulCompleteTickPeriods = xExpectedIdleTime - 1UL; + ulCompleteTickPeriods = xExpectedIdleTime - 1UL; } else { @@ -528,20 +529,20 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU /* How many complete tick periods passed while the processor * was waiting? */ - ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; + ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; /* The reload value is set to whatever fraction of a single tick * period remains. */ - portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; + portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; } /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard * value. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; vTaskStepTick( ulCompleteTickPeriods ); - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Exit with interrupts enabled. */ __asm volatile ( "cpsie i" ::: "memory" ); @@ -555,19 +556,19 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FU /* Calculate the constants required to configure the tick interrupt. */ #if ( configUSE_TICKLESS_IDLE == 1 ) { - ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); + ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick; - ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); + ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); } #endif /* configUSE_TICKLESS_IDLE */ /* Stop and reset the SysTick. */ - portNVIC_SYSTICK_CTRL_REG = 0UL; + portNVIC_SYSTICK_CTRL_REG = 0UL; portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Configure SysTick to interrupt at the requested rate. */ - portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; - portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; + portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT; } /*-----------------------------------------------------------*/ @@ -611,72 +612,72 @@ static void prvTaskExitError( void ) extern uint32_t * __unprivileged_flash_end__; extern uint32_t * __privileged_sram_start__; extern uint32_t * __privileged_sram_end__; - #else /* if defined( __ARMCC_VERSION ) */ + #else /* if defined( __ARMCC_VERSION ) */ /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __privileged_functions_start__[]; - extern uint32_t __privileged_functions_end__[]; - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - extern uint32_t __unprivileged_flash_start__[]; - extern uint32_t __unprivileged_flash_end__[]; - extern uint32_t __privileged_sram_start__[]; - extern uint32_t __privileged_sram_end__[]; + extern uint32_t __privileged_functions_start__[]; + extern uint32_t __privileged_functions_end__[]; + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; + extern uint32_t __unprivileged_flash_start__[]; + extern uint32_t __unprivileged_flash_end__[]; + extern uint32_t __privileged_sram_start__[]; + extern uint32_t __privileged_sram_end__[]; #endif /* defined( __ARMCC_VERSION ) */ /* Check that the MPU is present. */ if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE ) { /* MAIR0 - Index 0. */ - portMPU_MAIR0_REG |= ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK ); + portMPU_MAIR0_REG |= ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK ); /* MAIR0 - Index 1. */ - portMPU_MAIR0_REG |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK ); + portMPU_MAIR0_REG |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK ); /* Setup privileged flash as Read Only so that privileged tasks can * read it but not modify. */ - portMPU_RNR_REG = portPRIVILEGED_FLASH_REGION; - portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | - ( portMPU_REGION_NON_SHAREABLE ) | - ( portMPU_REGION_PRIVILEGED_READ_ONLY ); - portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_functions_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | - ( portMPU_RLAR_ATTR_INDEX0 ) | - ( portMPU_RLAR_REGION_ENABLE ); + portMPU_RNR_REG = portPRIVILEGED_FLASH_REGION; + portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | + ( portMPU_REGION_NON_SHAREABLE ) | + ( portMPU_REGION_PRIVILEGED_READ_ONLY ); + portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_functions_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | + ( portMPU_RLAR_ATTR_INDEX0 ) | + ( portMPU_RLAR_REGION_ENABLE ); /* Setup unprivileged flash as Read Only by both privileged and * unprivileged tasks. All tasks can read it but no-one can modify. */ - portMPU_RNR_REG = portUNPRIVILEGED_FLASH_REGION; - portMPU_RBAR_REG = ( ( ( uint32_t ) __unprivileged_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | - ( portMPU_REGION_NON_SHAREABLE ) | - ( portMPU_REGION_READ_ONLY ); - portMPU_RLAR_REG = ( ( ( uint32_t ) __unprivileged_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | - ( portMPU_RLAR_ATTR_INDEX0 ) | - ( portMPU_RLAR_REGION_ENABLE ); + portMPU_RNR_REG = portUNPRIVILEGED_FLASH_REGION; + portMPU_RBAR_REG = ( ( ( uint32_t ) __unprivileged_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | + ( portMPU_REGION_NON_SHAREABLE ) | + ( portMPU_REGION_READ_ONLY ); + portMPU_RLAR_REG = ( ( ( uint32_t ) __unprivileged_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | + ( portMPU_RLAR_ATTR_INDEX0 ) | + ( portMPU_RLAR_REGION_ENABLE ); /* Setup unprivileged syscalls flash as Read Only by both privileged * and unprivileged tasks. All tasks can read it but no-one can modify. */ - portMPU_RNR_REG = portUNPRIVILEGED_SYSCALLS_REGION; - portMPU_RBAR_REG = ( ( ( uint32_t ) __syscalls_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | - ( portMPU_REGION_NON_SHAREABLE ) | - ( portMPU_REGION_READ_ONLY ); - portMPU_RLAR_REG = ( ( ( uint32_t ) __syscalls_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | - ( portMPU_RLAR_ATTR_INDEX0 ) | - ( portMPU_RLAR_REGION_ENABLE ); + portMPU_RNR_REG = portUNPRIVILEGED_SYSCALLS_REGION; + portMPU_RBAR_REG = ( ( ( uint32_t ) __syscalls_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | + ( portMPU_REGION_NON_SHAREABLE ) | + ( portMPU_REGION_READ_ONLY ); + portMPU_RLAR_REG = ( ( ( uint32_t ) __syscalls_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | + ( portMPU_RLAR_ATTR_INDEX0 ) | + ( portMPU_RLAR_REGION_ENABLE ); /* Setup RAM containing kernel data for privileged access only. */ - portMPU_RNR_REG = portPRIVILEGED_RAM_REGION; - portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_sram_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | - ( portMPU_REGION_NON_SHAREABLE ) | - ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | - ( portMPU_REGION_EXECUTE_NEVER ); - portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_sram_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | - ( portMPU_RLAR_ATTR_INDEX0 ) | - ( portMPU_RLAR_REGION_ENABLE ); + portMPU_RNR_REG = portPRIVILEGED_RAM_REGION; + portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_sram_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | + ( portMPU_REGION_NON_SHAREABLE ) | + ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | + ( portMPU_REGION_EXECUTE_NEVER ); + portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_sram_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | + ( portMPU_RLAR_ATTR_INDEX0 ) | + ( portMPU_RLAR_REGION_ENABLE ); /* Enable mem fault. */ portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT; /* Enable MPU with privileged background access i.e. unmapped * regions have privileged access. */ - portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT ); + portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT ); } } #endif /* configENABLE_MPU */ @@ -771,24 +772,24 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO extern uint32_t * __syscalls_flash_end__; #else /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; #endif /* defined( __ARMCC_VERSION ) */ #endif /* configENABLE_MPU */ - uint32_t ulPC; + uint32_t ulPC; #if ( configENABLE_TRUSTZONE == 1 ) - uint32_t ulR0; + uint32_t ulR0; #if ( configENABLE_MPU == 1 ) - uint32_t ulControl, ulIsTaskPrivileged; + uint32_t ulControl, ulIsTaskPrivileged; #endif /* configENABLE_MPU */ #endif /* configENABLE_TRUSTZONE */ uint8_t ucSVCNumber; /* Register are stored on the stack in the following order - R0, R1, R2, R3, * R12, LR, PC, xPSR. */ - ulPC = pulCallerStackAddress[ 6 ]; + ulPC = pulCallerStackAddress[ 6 ]; ucSVCNumber = ( ( uint8_t * ) ulPC )[ -2 ]; switch( ucSVCNumber ) @@ -801,22 +802,22 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO ulR0 = pulCallerStackAddress[ 0 ]; #if ( configENABLE_MPU == 1 ) - { - /* Read the CONTROL register value. */ - __asm volatile ( "mrs %0, control" : "=r" ( ulControl ) ); + { + /* Read the CONTROL register value. */ + __asm volatile ( "mrs %0, control" : "=r" ( ulControl ) ); - /* The task that raised the SVC is privileged if Bit[0] - * in the CONTROL register is 0. */ - ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 ); + /* The task that raised the SVC is privileged if Bit[0] + * in the CONTROL register is 0. */ + ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 ); - /* Allocate and load a context for the secure task. */ - xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged ); - } - #else /* if ( configENABLE_MPU == 1 ) */ - { - /* Allocate and load a context for the secure task. */ - xSecureContext = SecureContext_AllocateContext( ulR0 ); - } + /* Allocate and load a context for the secure task. */ + xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged ); + } + #else /* if ( configENABLE_MPU == 1 ) */ + { + /* Allocate and load a context for the secure task. */ + xSecureContext = SecureContext_AllocateContext( ulR0 ); + } #endif /* configENABLE_MPU */ configASSERT( xSecureContext != NULL ); @@ -834,21 +835,21 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO case portSVC_START_SCHEDULER: #if ( configENABLE_TRUSTZONE == 1 ) - { - /* De-prioritize the non-secure exceptions so that the - * non-secure pendSV runs at the lowest priority. */ - SecureInit_DePrioritizeNSExceptions(); + { + /* De-prioritize the non-secure exceptions so that the + * non-secure pendSV runs at the lowest priority. */ + SecureInit_DePrioritizeNSExceptions(); - /* Initialize the secure context management system. */ - SecureContext_Init(); - } + /* Initialize the secure context management system. */ + SecureContext_Init(); + } #endif /* configENABLE_TRUSTZONE */ #if ( configENABLE_FPU == 1 ) - { - /* Setup the Floating Point Unit (FPU). */ - prvSetupFPU(); - } + { + /* Setup the Floating Point Unit (FPU). */ + prvSetupFPU(); + } #endif /* configENABLE_FPU */ /* Setup the context of the first task so that the first task starts @@ -881,12 +882,12 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO StackType_t * pxEndOfStack, TaskFunction_t pxCode, void * pvParameters, - BaseType_t xRunPrivileged ) /* PRIVILEGED_FUNCTION */ + BaseType_t xRunPrivileged ) /* PRIVILEGED_FUNCTION */ #else StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, StackType_t * pxEndOfStack, TaskFunction_t pxCode, - void * pvParameters ) /* PRIVILEGED_FUNCTION */ + void * pvParameters ) /* PRIVILEGED_FUNCTION */ #endif /* configENABLE_MPU */ { /* Simulate the stack frame as it would be created by a context switch @@ -1015,7 +1016,7 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */ vPortSetupTimerInterrupt(); /* Initialize the critical nesting count ready for the first task. */ - ulCriticalNesting = 0; + ulCriticalNesting = 0; /* Start the first task. */ vStartFirstTask(); @@ -1049,10 +1050,10 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ uint32_t ulStackDepth ) { uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber; - int32_t lIndex = 0; + int32_t lIndex = 0; /* Setup MAIR0. */ - xMPUSettings->ulMAIR0 = ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK ); + xMPUSettings->ulMAIR0 = ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK ); xMPUSettings->ulMAIR0 |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK ); /* This function is called automatically when the task is created - in @@ -1062,9 +1063,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ if( ulStackDepth > 0 ) { /* Define the region that allows access to the stack. */ - ulRegionStartAddress = ( ( uint32_t ) pxBottomOfStack ) & portMPU_RBAR_ADDRESS_MASK; - ulRegionEndAddress = ( uint32_t ) pxBottomOfStack + ( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) - 1; - ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; + ulRegionStartAddress = ( ( uint32_t ) pxBottomOfStack ) & portMPU_RBAR_ADDRESS_MASK; + ulRegionEndAddress = ( uint32_t ) pxBottomOfStack + ( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) - 1; + ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = ( ulRegionStartAddress ) | ( portMPU_REGION_NON_SHAREABLE ) | @@ -1087,9 +1088,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ /* Translate the generic region definition contained in xRegions * into the ARMv8 specific MPU settings that are then stored in * xMPUSettings. */ - ulRegionStartAddress = ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) & portMPU_RBAR_ADDRESS_MASK; - ulRegionEndAddress = ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1; - ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; + ulRegionStartAddress = ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) & portMPU_RBAR_ADDRESS_MASK; + ulRegionEndAddress = ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1; + ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; /* Start address. */ xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR = ( ulRegionStartAddress ) | @@ -1142,7 +1143,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ BaseType_t xPortIsInsideInterrupt( void ) { - uint32_t ulCurrentInterrupt; + uint32_t ulCurrentInterrupt; BaseType_t xReturn; /* Obtain the number of the currently executing interrupt. Interrupt Program diff --git a/portable/GCC/ARM_CM33/non_secure/portasm.c b/portable/GCC/ARM_CM33/non_secure/portasm.c index 2759f4d7e..0c8cb0f0c 100644 --- a/portable/GCC/ARM_CM33/non_secure/portasm.c +++ b/portable/GCC/ARM_CM33/non_secure/portasm.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Standard includes. */ diff --git a/portable/GCC/ARM_CM33/non_secure/portasm.h b/portable/GCC/ARM_CM33/non_secure/portasm.h index edb5bcfca..fdba1b177 100644 --- a/portable/GCC/ARM_CM33/non_secure/portasm.h +++ b/portable/GCC/ARM_CM33/non_secure/portasm.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef __PORT_ASM_H__ diff --git a/portable/GCC/ARM_CM33/non_secure/portmacro.h b/portable/GCC/ARM_CM33/non_secure/portmacro.h index 7ffbea17d..bb4d2495d 100644 --- a/portable/GCC/ARM_CM33/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM33/non_secure/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/GCC/ARM_CM33/secure/secure_context.c b/portable/GCC/ARM_CM33/secure/secure_context.c index 04f1e5622..5608c7240 100644 --- a/portable/GCC/ARM_CM33/secure/secure_context.c +++ b/portable/GCC/ARM_CM33/secure/secure_context.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Secure context includes. */ @@ -101,12 +102,12 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize ) #endif /* configENABLE_MPU */ { - uint8_t * pucStackMemory = NULL; - uint32_t ulIPSR; - SecureContextHandle_t xSecureContextHandle = NULL; + uint8_t * pucStackMemory = NULL; + uint32_t ulIPSR; + SecureContextHandle_t xSecureContextHandle = NULL; #if ( configENABLE_MPU == 1 ) - uint32_t * pulCurrentStackPointer = NULL; + uint32_t * pulCurrentStackPointer = NULL; #endif /* configENABLE_MPU */ /* Read the Interrupt Program Status Register (IPSR) value. */ @@ -143,7 +144,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) /* Store the correct CONTROL value for the task on the stack. * This value is programmed in the CONTROL register on * context switch. */ - pulCurrentStackPointer = ( uint32_t * ) xSecureContextHandle->pucStackStart; + pulCurrentStackPointer = ( uint32_t * ) xSecureContextHandle->pucStackStart; pulCurrentStackPointer--; if( ulIsTaskPrivileged ) diff --git a/portable/GCC/ARM_CM33/secure/secure_context.h b/portable/GCC/ARM_CM33/secure/secure_context.h index a5d2f2967..62ef6bb94 100644 --- a/portable/GCC/ARM_CM33/secure/secure_context.h +++ b/portable/GCC/ARM_CM33/secure/secure_context.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef __SECURE_CONTEXT_H__ diff --git a/portable/GCC/ARM_CM33/secure/secure_context_port.c b/portable/GCC/ARM_CM33/secure/secure_context_port.c index ea094ebf5..0187463ad 100644 --- a/portable/GCC/ARM_CM33/secure/secure_context_port.c +++ b/portable/GCC/ARM_CM33/secure/secure_context_port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Secure context includes. */ diff --git a/portable/GCC/ARM_CM33/secure/secure_heap.c b/portable/GCC/ARM_CM33/secure/secure_heap.c index b71f06da9..76b6ee1c3 100644 --- a/portable/GCC/ARM_CM33/secure/secure_heap.c +++ b/portable/GCC/ARM_CM33/secure/secure_heap.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Standard includes. */ @@ -115,7 +116,7 @@ static BlockLink_t xStart, * pxEnd = NULL; * @brief Keeps track of the number of free bytes remaining, but says nothing * about fragmentation. */ -static size_t xFreeBytesRemaining = 0U; +static size_t xFreeBytesRemaining = 0U; static size_t xMinimumEverFreeBytesRemaining = 0U; /** @@ -125,61 +126,61 @@ static size_t xMinimumEverFreeBytesRemaining = 0U; * then the block belongs to the application. When the bit is free the block is * still part of the free heap space. */ -static size_t xBlockAllocatedBit = 0; +static size_t xBlockAllocatedBit = 0; /*-----------------------------------------------------------*/ static void prvHeapInit( void ) { BlockLink_t * pxFirstFreeBlock; - uint8_t * pucAlignedHeap; - size_t uxAddress; - size_t xTotalHeapSize = secureconfigTOTAL_HEAP_SIZE; + uint8_t * pucAlignedHeap; + size_t uxAddress; + size_t xTotalHeapSize = secureconfigTOTAL_HEAP_SIZE; /* Ensure the heap starts on a correctly aligned boundary. */ - uxAddress = ( size_t ) ucHeap; + uxAddress = ( size_t ) ucHeap; if( ( uxAddress & secureportBYTE_ALIGNMENT_MASK ) != 0 ) { - uxAddress += ( secureportBYTE_ALIGNMENT - 1 ); - uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK ); + uxAddress += ( secureportBYTE_ALIGNMENT - 1 ); + uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK ); xTotalHeapSize -= uxAddress - ( size_t ) ucHeap; } - pucAlignedHeap = ( uint8_t * ) uxAddress; + pucAlignedHeap = ( uint8_t * ) uxAddress; /* xStart is used to hold a pointer to the first item in the list of free * blocks. The void cast is used to prevent compiler warnings. */ - xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap; - xStart.xBlockSize = ( size_t ) 0; + xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap; + xStart.xBlockSize = ( size_t ) 0; /* pxEnd is used to mark the end of the list of free blocks and is inserted * at the end of the heap space. */ - uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize; - uxAddress -= xHeapStructSize; - uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK ); - pxEnd = ( void * ) uxAddress; - pxEnd->xBlockSize = 0; - pxEnd->pxNextFreeBlock = NULL; + uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize; + uxAddress -= xHeapStructSize; + uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK ); + pxEnd = ( void * ) uxAddress; + pxEnd->xBlockSize = 0; + pxEnd->pxNextFreeBlock = NULL; /* To start with there is a single free block that is sized to take up the * entire heap space, minus the space taken by pxEnd. */ - pxFirstFreeBlock = ( void * ) pucAlignedHeap; - pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock; + pxFirstFreeBlock = ( void * ) pucAlignedHeap; + pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock; pxFirstFreeBlock->pxNextFreeBlock = pxEnd; /* Only one block exists - and it covers the entire usable heap space. */ - xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize; - xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize; + xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize; + xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize; /* Work out the position of the top bit in a size_t variable. */ - xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * secureheapBITS_PER_BYTE ) - 1 ); + xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * secureheapBITS_PER_BYTE ) - 1 ); } /*-----------------------------------------------------------*/ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert ) { BlockLink_t * pxIterator; - uint8_t * puc; + uint8_t * puc; /* Iterate through the list until a block is found that has a higher address * than the block being inserted. */ @@ -195,7 +196,7 @@ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert ) if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert ) { pxIterator->xBlockSize += pxBlockToInsert->xBlockSize; - pxBlockToInsert = pxIterator; + pxBlockToInsert = pxIterator; } else { @@ -211,7 +212,7 @@ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert ) if( pxIterator->pxNextFreeBlock != pxEnd ) { /* Form one big block from the two blocks. */ - pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize; + pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize; pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock; } else @@ -242,7 +243,7 @@ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert ) void * pvPortMalloc( size_t xWantedSize ) { BlockLink_t * pxBlock, * pxPreviousBlock, * pxNewBlockLink; - void * pvReturn = NULL; + void * pvReturn = NULL; /* If this is the first call to malloc then the heap will require * initialisation to setup the list of free blocks. */ @@ -290,12 +291,12 @@ void * pvPortMalloc( size_t xWantedSize ) /* Traverse the list from the start (lowest address) block until * one of adequate size is found. */ pxPreviousBlock = &xStart; - pxBlock = xStart.pxNextFreeBlock; + pxBlock = xStart.pxNextFreeBlock; while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) ) { pxPreviousBlock = pxBlock; - pxBlock = pxBlock->pxNextFreeBlock; + pxBlock = pxBlock->pxNextFreeBlock; } /* If the end marker was reached then a block of adequate size was @@ -304,7 +305,7 @@ void * pvPortMalloc( size_t xWantedSize ) { /* Return the memory space pointed to - jumping over the * BlockLink_t structure at its start. */ - pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize ); + pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize ); /* This block is being returned for use so must be taken out * of the list of free blocks. */ @@ -318,13 +319,13 @@ void * pvPortMalloc( size_t xWantedSize ) * block following the number of bytes requested. The void * cast is used to prevent byte alignment warnings from the * compiler. */ - pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize ); + pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize ); secureportASSERT( ( ( ( size_t ) pxNewBlockLink ) & secureportBYTE_ALIGNMENT_MASK ) == 0 ); /* Calculate the sizes of two blocks split from the single * block. */ pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize; - pxBlock->xBlockSize = xWantedSize; + pxBlock->xBlockSize = xWantedSize; /* Insert the new block into the list of free blocks. */ prvInsertBlockIntoFreeList( pxNewBlockLink ); @@ -334,7 +335,7 @@ void * pvPortMalloc( size_t xWantedSize ) mtCOVERAGE_TEST_MARKER(); } - xFreeBytesRemaining -= pxBlock->xBlockSize; + xFreeBytesRemaining -= pxBlock->xBlockSize; if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining ) { @@ -347,8 +348,8 @@ void * pvPortMalloc( size_t xWantedSize ) /* The block is being returned - it is allocated and owned by * the application and has no "next" block. */ - pxBlock->xBlockSize |= xBlockAllocatedBit; - pxBlock->pxNextFreeBlock = NULL; + pxBlock->xBlockSize |= xBlockAllocatedBit; + pxBlock->pxNextFreeBlock = NULL; } else { @@ -388,14 +389,14 @@ void * pvPortMalloc( size_t xWantedSize ) void vPortFree( void * pv ) { - uint8_t * puc = ( uint8_t * ) pv; + uint8_t * puc = ( uint8_t * ) pv; BlockLink_t * pxLink; if( pv != NULL ) { /* The memory being freed will have an BlockLink_t structure immediately * before it. */ - puc -= xHeapStructSize; + puc -= xHeapStructSize; /* This casting is to keep the compiler from issuing warnings. */ pxLink = ( void * ) puc; diff --git a/portable/GCC/ARM_CM33/secure/secure_heap.h b/portable/GCC/ARM_CM33/secure/secure_heap.h index 7226fa26f..d5ddaa853 100644 --- a/portable/GCC/ARM_CM33/secure/secure_heap.h +++ b/portable/GCC/ARM_CM33/secure/secure_heap.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef __SECURE_HEAP_H__ diff --git a/portable/GCC/ARM_CM33/secure/secure_init.c b/portable/GCC/ARM_CM33/secure/secure_init.c index 5ffa9e613..6f0be2547 100644 --- a/portable/GCC/ARM_CM33/secure/secure_init.c +++ b/portable/GCC/ARM_CM33/secure/secure_init.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Standard includes. */ diff --git a/portable/GCC/ARM_CM33/secure/secure_init.h b/portable/GCC/ARM_CM33/secure/secure_init.h index 96ba9aa10..643873468 100644 --- a/portable/GCC/ARM_CM33/secure/secure_init.h +++ b/portable/GCC/ARM_CM33/secure/secure_init.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef __SECURE_INIT_H__ diff --git a/portable/GCC/ARM_CM33/secure/secure_port_macros.h b/portable/GCC/ARM_CM33/secure/secure_port_macros.h index f37655d48..d0ace6242 100644 --- a/portable/GCC/ARM_CM33/secure/secure_port_macros.h +++ b/portable/GCC/ARM_CM33/secure/secure_port_macros.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef __SECURE_PORT_MACROS_H__ diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/port.c b/portable/GCC/ARM_CM33_NTZ/non_secure/port.c index 37f5d4812..3e42faba0 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining @@ -349,7 +350,7 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV * @brief Each task maintains its own interrupt status in the critical nesting * variable. */ -static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL; +static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL; #if ( configENABLE_TRUSTZONE == 1 ) @@ -365,26 +366,26 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU /** * @brief The number of SysTick increments that make up one tick period. */ - static uint32_t ulTimerCountsForOneTick = 0; + static uint32_t ulTimerCountsForOneTick = 0; /** * @brief The maximum number of tick periods that can be suppressed is * limited by the 24 bit resolution of the SysTick timer. */ - static uint32_t xMaximumPossibleSuppressedTicks = 0; + static uint32_t xMaximumPossibleSuppressedTicks = 0; /** * @brief Compensate for the CPU cycles that pass while the SysTick is * stopped (low power functionality only). */ - static uint32_t ulStoppedTimerCompensation = 0; + static uint32_t ulStoppedTimerCompensation = 0; #endif /* configUSE_TICKLESS_IDLE */ /*-----------------------------------------------------------*/ #if ( configUSE_TICKLESS_IDLE == 1 ) __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ) { - uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; + uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; TickType_t xModifiableIdleTime; /* Make sure the SysTick reload value does not overflow the counter. */ @@ -402,7 +403,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU /* Calculate the reload value required to wait xExpectedIdleTime * tick periods. -1 is used because this code will execute part way * through one of the tick periods. */ - ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); + ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); if( ulReloadValue > ulStoppedTimerCompensation ) { @@ -421,14 +422,14 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU { /* Restart from whatever is left in the count register to complete * this tick period. */ - portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; + portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; /* Restart SysTick. */ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Reset the reload register to the value required for normal tick * periods. */ - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Re-enable interrupts - see comments above the cpsid instruction() * above. */ @@ -437,14 +438,14 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU else { /* Set the new reload value. */ - portNVIC_SYSTICK_LOAD_REG = ulReloadValue; + portNVIC_SYSTICK_LOAD_REG = ulReloadValue; /* Clear the SysTick count flag and set the count value back to * zero. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Restart SysTick. */ - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can * set its parameter to 0 to indicate that its implementation @@ -452,7 +453,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU * instruction, and so wfi should not be executed again. However, * the original expected idle time variable must remain unmodified, * so a copy is taken. */ - xModifiableIdleTime = xExpectedIdleTime; + xModifiableIdleTime = xExpectedIdleTime; configPRE_SLEEP_PROCESSING( xModifiableIdleTime ); if( xModifiableIdleTime > 0 ) @@ -486,7 +487,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU * best it can be, but using the tickless mode will inevitably * result in some tiny drift of the time maintained by the kernel * with respect to calendar time*/ - portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); /* Determine if the SysTick clock has already counted to zero and * been set back to the current reload value (the reload back being @@ -501,7 +502,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU * reloaded with ulReloadValue. Reset the * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick * period. */ - ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); + ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); /* Don't allow a tiny value, or values that have somehow * underflowed because the post sleep hook did something @@ -516,7 +517,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU /* As the pending tick will be processed as soon as this * function exits, the tick value maintained by the tick is * stepped forward by one less than the time spent waiting. */ - ulCompleteTickPeriods = xExpectedIdleTime - 1UL; + ulCompleteTickPeriods = xExpectedIdleTime - 1UL; } else { @@ -528,20 +529,20 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU /* How many complete tick periods passed while the processor * was waiting? */ - ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; + ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; /* The reload value is set to whatever fraction of a single tick * period remains. */ - portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; + portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; } /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard * value. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; vTaskStepTick( ulCompleteTickPeriods ); - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Exit with interrupts enabled. */ __asm volatile ( "cpsie i" ::: "memory" ); @@ -555,19 +556,19 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FU /* Calculate the constants required to configure the tick interrupt. */ #if ( configUSE_TICKLESS_IDLE == 1 ) { - ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); + ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick; - ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); + ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); } #endif /* configUSE_TICKLESS_IDLE */ /* Stop and reset the SysTick. */ - portNVIC_SYSTICK_CTRL_REG = 0UL; + portNVIC_SYSTICK_CTRL_REG = 0UL; portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Configure SysTick to interrupt at the requested rate. */ - portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; - portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; + portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT; } /*-----------------------------------------------------------*/ @@ -611,72 +612,72 @@ static void prvTaskExitError( void ) extern uint32_t * __unprivileged_flash_end__; extern uint32_t * __privileged_sram_start__; extern uint32_t * __privileged_sram_end__; - #else /* if defined( __ARMCC_VERSION ) */ + #else /* if defined( __ARMCC_VERSION ) */ /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __privileged_functions_start__[]; - extern uint32_t __privileged_functions_end__[]; - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - extern uint32_t __unprivileged_flash_start__[]; - extern uint32_t __unprivileged_flash_end__[]; - extern uint32_t __privileged_sram_start__[]; - extern uint32_t __privileged_sram_end__[]; + extern uint32_t __privileged_functions_start__[]; + extern uint32_t __privileged_functions_end__[]; + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; + extern uint32_t __unprivileged_flash_start__[]; + extern uint32_t __unprivileged_flash_end__[]; + extern uint32_t __privileged_sram_start__[]; + extern uint32_t __privileged_sram_end__[]; #endif /* defined( __ARMCC_VERSION ) */ /* Check that the MPU is present. */ if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE ) { /* MAIR0 - Index 0. */ - portMPU_MAIR0_REG |= ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK ); + portMPU_MAIR0_REG |= ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK ); /* MAIR0 - Index 1. */ - portMPU_MAIR0_REG |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK ); + portMPU_MAIR0_REG |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK ); /* Setup privileged flash as Read Only so that privileged tasks can * read it but not modify. */ - portMPU_RNR_REG = portPRIVILEGED_FLASH_REGION; - portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | - ( portMPU_REGION_NON_SHAREABLE ) | - ( portMPU_REGION_PRIVILEGED_READ_ONLY ); - portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_functions_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | - ( portMPU_RLAR_ATTR_INDEX0 ) | - ( portMPU_RLAR_REGION_ENABLE ); + portMPU_RNR_REG = portPRIVILEGED_FLASH_REGION; + portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | + ( portMPU_REGION_NON_SHAREABLE ) | + ( portMPU_REGION_PRIVILEGED_READ_ONLY ); + portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_functions_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | + ( portMPU_RLAR_ATTR_INDEX0 ) | + ( portMPU_RLAR_REGION_ENABLE ); /* Setup unprivileged flash as Read Only by both privileged and * unprivileged tasks. All tasks can read it but no-one can modify. */ - portMPU_RNR_REG = portUNPRIVILEGED_FLASH_REGION; - portMPU_RBAR_REG = ( ( ( uint32_t ) __unprivileged_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | - ( portMPU_REGION_NON_SHAREABLE ) | - ( portMPU_REGION_READ_ONLY ); - portMPU_RLAR_REG = ( ( ( uint32_t ) __unprivileged_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | - ( portMPU_RLAR_ATTR_INDEX0 ) | - ( portMPU_RLAR_REGION_ENABLE ); + portMPU_RNR_REG = portUNPRIVILEGED_FLASH_REGION; + portMPU_RBAR_REG = ( ( ( uint32_t ) __unprivileged_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | + ( portMPU_REGION_NON_SHAREABLE ) | + ( portMPU_REGION_READ_ONLY ); + portMPU_RLAR_REG = ( ( ( uint32_t ) __unprivileged_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | + ( portMPU_RLAR_ATTR_INDEX0 ) | + ( portMPU_RLAR_REGION_ENABLE ); /* Setup unprivileged syscalls flash as Read Only by both privileged * and unprivileged tasks. All tasks can read it but no-one can modify. */ - portMPU_RNR_REG = portUNPRIVILEGED_SYSCALLS_REGION; - portMPU_RBAR_REG = ( ( ( uint32_t ) __syscalls_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | - ( portMPU_REGION_NON_SHAREABLE ) | - ( portMPU_REGION_READ_ONLY ); - portMPU_RLAR_REG = ( ( ( uint32_t ) __syscalls_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | - ( portMPU_RLAR_ATTR_INDEX0 ) | - ( portMPU_RLAR_REGION_ENABLE ); + portMPU_RNR_REG = portUNPRIVILEGED_SYSCALLS_REGION; + portMPU_RBAR_REG = ( ( ( uint32_t ) __syscalls_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | + ( portMPU_REGION_NON_SHAREABLE ) | + ( portMPU_REGION_READ_ONLY ); + portMPU_RLAR_REG = ( ( ( uint32_t ) __syscalls_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | + ( portMPU_RLAR_ATTR_INDEX0 ) | + ( portMPU_RLAR_REGION_ENABLE ); /* Setup RAM containing kernel data for privileged access only. */ - portMPU_RNR_REG = portPRIVILEGED_RAM_REGION; - portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_sram_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | - ( portMPU_REGION_NON_SHAREABLE ) | - ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | - ( portMPU_REGION_EXECUTE_NEVER ); - portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_sram_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | - ( portMPU_RLAR_ATTR_INDEX0 ) | - ( portMPU_RLAR_REGION_ENABLE ); + portMPU_RNR_REG = portPRIVILEGED_RAM_REGION; + portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_sram_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | + ( portMPU_REGION_NON_SHAREABLE ) | + ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | + ( portMPU_REGION_EXECUTE_NEVER ); + portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_sram_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | + ( portMPU_RLAR_ATTR_INDEX0 ) | + ( portMPU_RLAR_REGION_ENABLE ); /* Enable mem fault. */ portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT; /* Enable MPU with privileged background access i.e. unmapped * regions have privileged access. */ - portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT ); + portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT ); } } #endif /* configENABLE_MPU */ @@ -771,24 +772,24 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO extern uint32_t * __syscalls_flash_end__; #else /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; #endif /* defined( __ARMCC_VERSION ) */ #endif /* configENABLE_MPU */ - uint32_t ulPC; + uint32_t ulPC; #if ( configENABLE_TRUSTZONE == 1 ) - uint32_t ulR0; + uint32_t ulR0; #if ( configENABLE_MPU == 1 ) - uint32_t ulControl, ulIsTaskPrivileged; + uint32_t ulControl, ulIsTaskPrivileged; #endif /* configENABLE_MPU */ #endif /* configENABLE_TRUSTZONE */ uint8_t ucSVCNumber; /* Register are stored on the stack in the following order - R0, R1, R2, R3, * R12, LR, PC, xPSR. */ - ulPC = pulCallerStackAddress[ 6 ]; + ulPC = pulCallerStackAddress[ 6 ]; ucSVCNumber = ( ( uint8_t * ) ulPC )[ -2 ]; switch( ucSVCNumber ) @@ -801,22 +802,22 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO ulR0 = pulCallerStackAddress[ 0 ]; #if ( configENABLE_MPU == 1 ) - { - /* Read the CONTROL register value. */ - __asm volatile ( "mrs %0, control" : "=r" ( ulControl ) ); + { + /* Read the CONTROL register value. */ + __asm volatile ( "mrs %0, control" : "=r" ( ulControl ) ); - /* The task that raised the SVC is privileged if Bit[0] - * in the CONTROL register is 0. */ - ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 ); + /* The task that raised the SVC is privileged if Bit[0] + * in the CONTROL register is 0. */ + ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 ); - /* Allocate and load a context for the secure task. */ - xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged ); - } - #else /* if ( configENABLE_MPU == 1 ) */ - { - /* Allocate and load a context for the secure task. */ - xSecureContext = SecureContext_AllocateContext( ulR0 ); - } + /* Allocate and load a context for the secure task. */ + xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged ); + } + #else /* if ( configENABLE_MPU == 1 ) */ + { + /* Allocate and load a context for the secure task. */ + xSecureContext = SecureContext_AllocateContext( ulR0 ); + } #endif /* configENABLE_MPU */ configASSERT( xSecureContext != NULL ); @@ -834,21 +835,21 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO case portSVC_START_SCHEDULER: #if ( configENABLE_TRUSTZONE == 1 ) - { - /* De-prioritize the non-secure exceptions so that the - * non-secure pendSV runs at the lowest priority. */ - SecureInit_DePrioritizeNSExceptions(); + { + /* De-prioritize the non-secure exceptions so that the + * non-secure pendSV runs at the lowest priority. */ + SecureInit_DePrioritizeNSExceptions(); - /* Initialize the secure context management system. */ - SecureContext_Init(); - } + /* Initialize the secure context management system. */ + SecureContext_Init(); + } #endif /* configENABLE_TRUSTZONE */ #if ( configENABLE_FPU == 1 ) - { - /* Setup the Floating Point Unit (FPU). */ - prvSetupFPU(); - } + { + /* Setup the Floating Point Unit (FPU). */ + prvSetupFPU(); + } #endif /* configENABLE_FPU */ /* Setup the context of the first task so that the first task starts @@ -881,12 +882,12 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO StackType_t * pxEndOfStack, TaskFunction_t pxCode, void * pvParameters, - BaseType_t xRunPrivileged ) /* PRIVILEGED_FUNCTION */ + BaseType_t xRunPrivileged ) /* PRIVILEGED_FUNCTION */ #else StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, StackType_t * pxEndOfStack, TaskFunction_t pxCode, - void * pvParameters ) /* PRIVILEGED_FUNCTION */ + void * pvParameters ) /* PRIVILEGED_FUNCTION */ #endif /* configENABLE_MPU */ { /* Simulate the stack frame as it would be created by a context switch @@ -1015,7 +1016,7 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */ vPortSetupTimerInterrupt(); /* Initialize the critical nesting count ready for the first task. */ - ulCriticalNesting = 0; + ulCriticalNesting = 0; /* Start the first task. */ vStartFirstTask(); @@ -1049,10 +1050,10 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ uint32_t ulStackDepth ) { uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber; - int32_t lIndex = 0; + int32_t lIndex = 0; /* Setup MAIR0. */ - xMPUSettings->ulMAIR0 = ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK ); + xMPUSettings->ulMAIR0 = ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK ); xMPUSettings->ulMAIR0 |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK ); /* This function is called automatically when the task is created - in @@ -1062,9 +1063,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ if( ulStackDepth > 0 ) { /* Define the region that allows access to the stack. */ - ulRegionStartAddress = ( ( uint32_t ) pxBottomOfStack ) & portMPU_RBAR_ADDRESS_MASK; - ulRegionEndAddress = ( uint32_t ) pxBottomOfStack + ( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) - 1; - ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; + ulRegionStartAddress = ( ( uint32_t ) pxBottomOfStack ) & portMPU_RBAR_ADDRESS_MASK; + ulRegionEndAddress = ( uint32_t ) pxBottomOfStack + ( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) - 1; + ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = ( ulRegionStartAddress ) | ( portMPU_REGION_NON_SHAREABLE ) | @@ -1087,9 +1088,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ /* Translate the generic region definition contained in xRegions * into the ARMv8 specific MPU settings that are then stored in * xMPUSettings. */ - ulRegionStartAddress = ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) & portMPU_RBAR_ADDRESS_MASK; - ulRegionEndAddress = ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1; - ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; + ulRegionStartAddress = ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) & portMPU_RBAR_ADDRESS_MASK; + ulRegionEndAddress = ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1; + ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; /* Start address. */ xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR = ( ulRegionStartAddress ) | @@ -1142,7 +1143,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ BaseType_t xPortIsInsideInterrupt( void ) { - uint32_t ulCurrentInterrupt; + uint32_t ulCurrentInterrupt; BaseType_t xReturn; /* Obtain the number of the currently executing interrupt. Interrupt Program diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c b/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c index 1a397bc1d..132fa4509 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Standard includes. */ diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h b/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h index edb5bcfca..fdba1b177 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef __PORT_ASM_H__ diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h b/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h index 7ffbea17d..bb4d2495d 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/GCC/ARM_CM3_MPU/port.c b/portable/GCC/ARM_CM3_MPU/port.c index 0dc4f573f..6bd4db9d0 100644 --- a/portable/GCC/ARM_CM3_MPU/port.c +++ b/portable/GCC/ARM_CM3_MPU/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -174,7 +175,7 @@ extern void vPortResetPrivilege( BaseType_t xRunningPrivileged ); /* Each task maintains its own interrupt status in the critical nesting * variable. Note this is not saved as part of the task context as context * switches can only occur when uxCriticalNesting is zero. */ -static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; +static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; /* * Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure @@ -182,8 +183,8 @@ static UBaseType_t uxCriticalNesting = 0xaaaaa * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY. */ #if ( configASSERT_DEFINED == 1 ) - static uint8_t ucMaxSysCallPriority = 0; - static uint32_t ulMaxPRIGROUPValue = 0; + static uint8_t ucMaxSysCallPriority = 0; + static uint32_t ulMaxPRIGROUPValue = 0; static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16; #endif /* configASSERT_DEFINED */ /*-----------------------------------------------------------*/ @@ -242,7 +243,7 @@ void vPortSVCHandler( void ) static void prvSVCHandler( uint32_t * pulParam ) { - uint8_t ucSVCNumber; + uint8_t ucSVCNumber; uint32_t ulPC; #if ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) @@ -254,14 +255,14 @@ static void prvSVCHandler( uint32_t * pulParam ) extern uint32_t * __syscalls_flash_end__; #else /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; #endif /* #if defined( __ARMCC_VERSION ) */ #endif /* #if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */ /* The stack contains: r0, r1, r2, r3, r12, LR, PC and xPSR. The first * argument (r0) is pulParam[ 0 ]. */ - ulPC = pulParam[ portOFFSET_TO_PC ]; + ulPC = pulParam[ portOFFSET_TO_PC ]; ucSVCNumber = ( ( uint8_t * ) ulPC )[ -2 ]; switch( ucSVCNumber ) @@ -374,9 +375,9 @@ BaseType_t xPortStartScheduler( void ) #if ( configASSERT_DEFINED == 1 ) { - volatile uint32_t ulOriginalPriority; + volatile uint32_t ulOriginalPriority; volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER ); - volatile uint8_t ucMaxPriorityValue; + volatile uint8_t ucMaxPriorityValue; /* Determine the maximum priority from which ISR safe FreeRTOS API * functions can be called. ISR safe functions are those that end in @@ -384,21 +385,21 @@ BaseType_t xPortStartScheduler( void ) * to ensure interrupt entry is as fast and simple as possible. * * Save the interrupt priority value that is about to be clobbered. */ - ulOriginalPriority = *pucFirstUserPriorityRegister; + ulOriginalPriority = *pucFirstUserPriorityRegister; /* Determine the number of priority bits available. First write to all * possible bits. */ *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE; /* Read the value back to see how many bits stuck. */ - ucMaxPriorityValue = *pucFirstUserPriorityRegister; + ucMaxPriorityValue = *pucFirstUserPriorityRegister; /* Use the same mask on the maximum system call priority. */ - ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; + ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; /* Calculate the maximum acceptable priority group value for the number * of bits read back. */ - ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS; + ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS; while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE ) { @@ -426,8 +427,8 @@ BaseType_t xPortStartScheduler( void ) /* Shift the priority group value back to its position within the AIRCR * register. */ - ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; - ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; + ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; + ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; /* Restore the clobbered interrupt priority register to its original * value. */ @@ -449,7 +450,7 @@ BaseType_t xPortStartScheduler( void ) vPortSetupTimerInterrupt(); /* Initialise the critical nesting count ready for the first task. */ - uxCriticalNesting = 0; + uxCriticalNesting = 0; /* Start the first task. */ __asm volatile ( @@ -588,12 +589,12 @@ void xPortSysTickHandler( void ) __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) { /* Stop and clear the SysTick. */ - portNVIC_SYSTICK_CTRL_REG = 0UL; + portNVIC_SYSTICK_CTRL_REG = 0UL; portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Configure SysTick to interrupt at the requested rate. */ - portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; - portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE ); + portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE ); } /*-----------------------------------------------------------*/ @@ -614,10 +615,10 @@ static void prvSetupMPU( void ) ( portMPU_REGION_VALID ) | ( portUNPRIVILEGED_FLASH_REGION ); - portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_READ_ONLY ) | - ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | - ( prvGetMPURegionSizeSetting( ( uint32_t ) __FLASH_segment_end__ - ( uint32_t ) __FLASH_segment_start__ ) ) | - ( portMPU_REGION_ENABLE ); + portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_READ_ONLY ) | + ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | + ( prvGetMPURegionSizeSetting( ( uint32_t ) __FLASH_segment_end__ - ( uint32_t ) __FLASH_segment_start__ ) ) | + ( portMPU_REGION_ENABLE ); /* Setup the privileged flash for privileged only access. This is where * the kernel code is * placed. */ @@ -625,10 +626,10 @@ static void prvSetupMPU( void ) ( portMPU_REGION_VALID ) | ( portPRIVILEGED_FLASH_REGION ); - portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_PRIVILEGED_READ_ONLY ) | - ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | - ( prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_functions_end__ - ( uint32_t ) __privileged_functions_start__ ) ) | - ( portMPU_REGION_ENABLE ); + portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_PRIVILEGED_READ_ONLY ) | + ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | + ( prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_functions_end__ - ( uint32_t ) __privileged_functions_start__ ) ) | + ( portMPU_REGION_ENABLE ); /* Setup the privileged data RAM region. This is where the kernel data * is placed. */ @@ -636,10 +637,10 @@ static void prvSetupMPU( void ) ( portMPU_REGION_VALID ) | ( portPRIVILEGED_RAM_REGION ); - portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | - ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | - prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) | - ( portMPU_REGION_ENABLE ); + portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | + ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | + prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) | + ( portMPU_REGION_ENABLE ); /* By default allow everything to access the general peripherals. The * system peripherals and registers are protected. */ @@ -647,15 +648,15 @@ static void prvSetupMPU( void ) ( portMPU_REGION_VALID ) | ( portGENERAL_PERIPHERALS_REGION ); - portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) | - ( prvGetMPURegionSizeSetting( portPERIPHERALS_END_ADDRESS - portPERIPHERALS_START_ADDRESS ) ) | - ( portMPU_REGION_ENABLE ); + portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) | + ( prvGetMPURegionSizeSetting( portPERIPHERALS_END_ADDRESS - portPERIPHERALS_START_ADDRESS ) ) | + ( portMPU_REGION_ENABLE ); /* Enable the memory fault exception. */ - portNVIC_SYS_CTRL_STATE_REG |= portNVIC_MEM_FAULT_ENABLE; + portNVIC_SYS_CTRL_STATE_REG |= portNVIC_MEM_FAULT_ENABLE; /* Enable the MPU with the background region configured. */ - portMPU_CTRL_REG |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE ); + portMPU_CTRL_REG |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE ); } } /*-----------------------------------------------------------*/ @@ -723,8 +724,8 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, extern uint32_t __SRAM_segment_end__[]; extern uint32_t __privileged_data_start__[]; extern uint32_t __privileged_data_end__[]; - int32_t lIndex; - uint32_t ul; + int32_t lIndex; + uint32_t ul; if( xRegions == NULL ) { @@ -734,7 +735,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, ( portMPU_REGION_VALID ) | ( portSTACK_REGION ); - xMPUSettings->xRegion[ 0 ].ulRegionAttribute = + xMPUSettings->xRegion[ 0 ].ulRegionAttribute = ( portMPU_REGION_READ_WRITE ) | ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | ( prvGetMPURegionSizeSetting( ( uint32_t ) __SRAM_segment_end__ - ( uint32_t ) __SRAM_segment_start__ ) ) | @@ -747,7 +748,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, ( portMPU_REGION_VALID ) | ( portSTACK_REGION + 1 ); - xMPUSettings->xRegion[ 1 ].ulRegionAttribute = + xMPUSettings->xRegion[ 1 ].ulRegionAttribute = ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) | @@ -757,7 +758,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, for( ul = 2; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ ) { xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID; - xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL; + xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL; } } else @@ -774,7 +775,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, ( portMPU_REGION_VALID ) | ( portSTACK_REGION ); /* Region number. */ - xMPUSettings->xRegion[ 0 ].ulRegionAttribute = + xMPUSettings->xRegion[ 0 ].ulRegionAttribute = ( portMPU_REGION_READ_WRITE ) | /* Read and write. */ ( prvGetMPURegionSizeSetting( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) ) | ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | @@ -795,7 +796,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, ( portMPU_REGION_VALID ) | ( portSTACK_REGION + ul ); /* Region number. */ - xMPUSettings->xRegion[ ul ].ulRegionAttribute = + xMPUSettings->xRegion[ ul ].ulRegionAttribute = ( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) | ( xRegions[ lIndex ].ulParameters ) | ( portMPU_REGION_ENABLE ); @@ -804,7 +805,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, { /* Invalidate the region. */ xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID; - xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL; + xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL; } lIndex++; @@ -818,7 +819,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, void vPortValidateInterruptPriority( void ) { uint32_t ulCurrentInterrupt; - uint8_t ucCurrentPriority; + uint8_t ucCurrentPriority; /* Obtain the number of the currently executing interrupt. */ __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" ); diff --git a/portable/GCC/ARM_CM3_MPU/portmacro.h b/portable/GCC/ARM_CM3_MPU/portmacro.h index 426242014..3df29df08 100644 --- a/portable/GCC/ARM_CM3_MPU/portmacro.h +++ b/portable/GCC/ARM_CM3_MPU/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ @@ -132,7 +133,7 @@ #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) - #define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT + #define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ @@ -183,7 +184,7 @@ /*-----------------------------------------------------------*/ - #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) ) + #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) ) #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ @@ -228,7 +229,7 @@ portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void ) { - uint32_t ulCurrentInterrupt; + uint32_t ulCurrentInterrupt; BaseType_t xReturn; /* Obtain the number of the currently executing interrupt. */ diff --git a/portable/GCC/ARM_CM4F/port.c b/portable/GCC/ARM_CM4F/port.c index ef1bd2bd8..e9c2e8ac5 100644 --- a/portable/GCC/ARM_CM4F/port.c +++ b/portable/GCC/ARM_CM4F/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -143,13 +144,13 @@ static void prvTaskExitError( void ); /* Each task maintains its own interrupt status in the critical nesting * variable. */ -static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; +static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; /* * The number of SysTick increments that make up one tick period. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t ulTimerCountsForOneTick = 0; + static uint32_t ulTimerCountsForOneTick = 0; #endif /* configUSE_TICKLESS_IDLE */ /* @@ -157,7 +158,7 @@ static UBaseType_t uxCriticalNesting = 0xaaaaa * 24 bit resolution of the SysTick timer. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t xMaximumPossibleSuppressedTicks = 0; + static uint32_t xMaximumPossibleSuppressedTicks = 0; #endif /* configUSE_TICKLESS_IDLE */ /* @@ -165,7 +166,7 @@ static UBaseType_t uxCriticalNesting = 0xaaaaa * power functionality only. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t ulStoppedTimerCompensation = 0; + static uint32_t ulStoppedTimerCompensation = 0; #endif /* configUSE_TICKLESS_IDLE */ /* @@ -174,8 +175,8 @@ static UBaseType_t uxCriticalNesting = 0xaaaaa * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY. */ #if ( configASSERT_DEFINED == 1 ) - static uint8_t ucMaxSysCallPriority = 0; - static uint32_t ulMaxPRIGROUPValue = 0; + static uint8_t ucMaxSysCallPriority = 0; + static uint32_t ulMaxPRIGROUPValue = 0; static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16; #endif /* configASSERT_DEFINED */ @@ -302,9 +303,9 @@ BaseType_t xPortStartScheduler( void ) #if ( configASSERT_DEFINED == 1 ) { - volatile uint32_t ulOriginalPriority; + volatile uint32_t ulOriginalPriority; volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER ); - volatile uint8_t ucMaxPriorityValue; + volatile uint8_t ucMaxPriorityValue; /* Determine the maximum priority from which ISR safe FreeRTOS API * functions can be called. ISR safe functions are those that end in @@ -312,21 +313,21 @@ BaseType_t xPortStartScheduler( void ) * ensure interrupt entry is as fast and simple as possible. * * Save the interrupt priority value that is about to be clobbered. */ - ulOriginalPriority = *pucFirstUserPriorityRegister; + ulOriginalPriority = *pucFirstUserPriorityRegister; /* Determine the number of priority bits available. First write to all * possible bits. */ *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE; /* Read the value back to see how many bits stuck. */ - ucMaxPriorityValue = *pucFirstUserPriorityRegister; + ucMaxPriorityValue = *pucFirstUserPriorityRegister; /* Use the same mask on the maximum system call priority. */ - ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; + ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; /* Calculate the maximum acceptable priority group value for the number * of bits read back. */ - ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS; + ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS; while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE ) { @@ -354,8 +355,8 @@ BaseType_t xPortStartScheduler( void ) /* Shift the priority group value back to its position within the AIRCR * register. */ - ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; - ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; + ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; + ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; /* Restore the clobbered interrupt priority register to its original * value. */ @@ -372,13 +373,13 @@ BaseType_t xPortStartScheduler( void ) vPortSetupTimerInterrupt(); /* Initialise the critical nesting count ready for the first task. */ - uxCriticalNesting = 0; + uxCriticalNesting = 0; /* Ensure the VFP is enabled - it should be anyway. */ vPortEnableVFP(); /* Lazy save always. */ - *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS; + *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS; /* Start the first task. */ prvPortStartFirstTask(); @@ -515,7 +516,7 @@ void xPortSysTickHandler( void ) __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ) { - uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; + uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; TickType_t xModifiableIdleTime; /* Make sure the SysTick reload value does not overflow the counter. */ @@ -533,7 +534,7 @@ void xPortSysTickHandler( void ) /* Calculate the reload value required to wait xExpectedIdleTime * tick periods. -1 is used because this code will execute part way * through one of the tick periods. */ - ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); + ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); if( ulReloadValue > ulStoppedTimerCompensation ) { @@ -552,14 +553,14 @@ void xPortSysTickHandler( void ) { /* Restart from whatever is left in the count register to complete * this tick period. */ - portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; + portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; /* Restart SysTick. */ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Reset the reload register to the value required for normal tick * periods. */ - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Re-enable interrupts - see comments above the cpsid instruction() * above. */ @@ -568,21 +569,21 @@ void xPortSysTickHandler( void ) else { /* Set the new reload value. */ - portNVIC_SYSTICK_LOAD_REG = ulReloadValue; + portNVIC_SYSTICK_LOAD_REG = ulReloadValue; /* Clear the SysTick count flag and set the count value back to * zero. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Restart SysTick. */ - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can * set its parameter to 0 to indicate that its implementation contains * its own wait for interrupt or wait for event instruction, and so wfi * should not be executed again. However, the original expected idle * time variable must remain unmodified, so a copy is taken. */ - xModifiableIdleTime = xExpectedIdleTime; + xModifiableIdleTime = xExpectedIdleTime; configPRE_SLEEP_PROCESSING( xModifiableIdleTime ); if( xModifiableIdleTime > 0 ) @@ -616,7 +617,7 @@ void xPortSysTickHandler( void ) * be, but using the tickless mode will inevitably result in some tiny * drift of the time maintained by the kernel with respect to calendar * time*/ - portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); /* Determine if the SysTick clock has already counted to zero and * been set back to the current reload value (the reload back being @@ -631,7 +632,7 @@ void xPortSysTickHandler( void ) * reloaded with ulReloadValue. Reset the * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick * period. */ - ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); + ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); /* Don't allow a tiny value, or values that have somehow * underflowed because the post sleep hook did something @@ -646,7 +647,7 @@ void xPortSysTickHandler( void ) /* As the pending tick will be processed as soon as this * function exits, the tick value maintained by the tick is stepped * forward by one less than the time spent waiting. */ - ulCompleteTickPeriods = xExpectedIdleTime - 1UL; + ulCompleteTickPeriods = xExpectedIdleTime - 1UL; } else { @@ -658,20 +659,20 @@ void xPortSysTickHandler( void ) /* How many complete tick periods passed while the processor * was waiting? */ - ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; + ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; /* The reload value is set to whatever fraction of a single tick * period remains. */ - portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; + portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; } /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard * value. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; vTaskStepTick( ulCompleteTickPeriods ); - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Exit with interrupts enabled. */ __asm volatile ( "cpsie i" ::: "memory" ); @@ -690,19 +691,19 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* Calculate the constants required to configure the tick interrupt. */ #if ( configUSE_TICKLESS_IDLE == 1 ) { - ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); + ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick; - ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); + ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); } #endif /* configUSE_TICKLESS_IDLE */ /* Stop and clear the SysTick. */ - portNVIC_SYSTICK_CTRL_REG = 0UL; + portNVIC_SYSTICK_CTRL_REG = 0UL; portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Configure SysTick to interrupt at the requested rate. */ - portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; - portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT ); + portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT ); } /*-----------------------------------------------------------*/ @@ -727,7 +728,7 @@ static void vPortEnableVFP( void ) void vPortValidateInterruptPriority( void ) { uint32_t ulCurrentInterrupt; - uint8_t ucCurrentPriority; + uint8_t ucCurrentPriority; /* Obtain the number of the currently executing interrupt. */ __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" ); diff --git a/portable/GCC/ARM_CM4F/portmacro.h b/portable/GCC/ARM_CM4F/portmacro.h index 719f3fd50..07f08de9a 100644 --- a/portable/GCC/ARM_CM4F/portmacro.h +++ b/portable/GCC/ARM_CM4F/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ @@ -147,7 +148,7 @@ /*-----------------------------------------------------------*/ - #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) ) + #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) ) #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ @@ -169,7 +170,7 @@ portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void ) { - uint32_t ulCurrentInterrupt; + uint32_t ulCurrentInterrupt; BaseType_t xReturn; /* Obtain the number of the currently executing interrupt. */ diff --git a/portable/GCC/ARM_CM4_MPU/port.c b/portable/GCC/ARM_CM4_MPU/port.c index ba07a1254..59446feb2 100644 --- a/portable/GCC/ARM_CM4_MPU/port.c +++ b/portable/GCC/ARM_CM4_MPU/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -187,7 +188,7 @@ extern void vPortResetPrivilege( BaseType_t xRunningPrivileged ); /* Each task maintains its own interrupt status in the critical nesting * variable. Note this is not saved as part of the task context as context * switches can only occur when uxCriticalNesting is zero. */ -static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; +static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; /* * Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure @@ -195,8 +196,8 @@ static UBaseType_t uxCriticalNesting = 0xaaaaa * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY. */ #if ( configASSERT_DEFINED == 1 ) - static uint8_t ucMaxSysCallPriority = 0; - static uint32_t ulMaxPRIGROUPValue = 0; + static uint8_t ucMaxSysCallPriority = 0; + static uint32_t ulMaxPRIGROUPValue = 0; static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16; #endif /* configASSERT_DEFINED */ @@ -262,7 +263,7 @@ void vPortSVCHandler( void ) static void prvSVCHandler( uint32_t * pulParam ) { - uint8_t ucSVCNumber; + uint8_t ucSVCNumber; uint32_t ulPC; #if ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) @@ -274,14 +275,14 @@ static void prvSVCHandler( uint32_t * pulParam ) extern uint32_t * __syscalls_flash_end__; #else /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; #endif /* #if defined( __ARMCC_VERSION ) */ #endif /* #if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */ /* The stack contains: r0, r1, r2, r3, r12, LR, PC and xPSR. The first * argument (r0) is pulParam[ 0 ]. */ - ulPC = pulParam[ portOFFSET_TO_PC ]; + ulPC = pulParam[ portOFFSET_TO_PC ]; ucSVCNumber = ( ( uint8_t * ) ulPC )[ -2 ]; switch( ucSVCNumber ) @@ -392,9 +393,9 @@ BaseType_t xPortStartScheduler( void ) #if ( configASSERT_DEFINED == 1 ) { - volatile uint32_t ulOriginalPriority; + volatile uint32_t ulOriginalPriority; volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER ); - volatile uint8_t ucMaxPriorityValue; + volatile uint8_t ucMaxPriorityValue; /* Determine the maximum priority from which ISR safe FreeRTOS API * functions can be called. ISR safe functions are those that end in @@ -402,21 +403,21 @@ BaseType_t xPortStartScheduler( void ) * ensure interrupt entry is as fast and simple as possible. * * Save the interrupt priority value that is about to be clobbered. */ - ulOriginalPriority = *pucFirstUserPriorityRegister; + ulOriginalPriority = *pucFirstUserPriorityRegister; /* Determine the number of priority bits available. First write to all * possible bits. */ *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE; /* Read the value back to see how many bits stuck. */ - ucMaxPriorityValue = *pucFirstUserPriorityRegister; + ucMaxPriorityValue = *pucFirstUserPriorityRegister; /* Use the same mask on the maximum system call priority. */ - ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; + ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; /* Calculate the maximum acceptable priority group value for the number * of bits read back. */ - ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS; + ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS; while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE ) { @@ -444,8 +445,8 @@ BaseType_t xPortStartScheduler( void ) /* Shift the priority group value back to its position within the AIRCR * register. */ - ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; - ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; + ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; + ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; /* Restore the clobbered interrupt priority register to its original * value. */ @@ -467,13 +468,13 @@ BaseType_t xPortStartScheduler( void ) vPortSetupTimerInterrupt(); /* Initialise the critical nesting count ready for the first task. */ - uxCriticalNesting = 0; + uxCriticalNesting = 0; /* Ensure the VFP is enabled - it should be anyway. */ vPortEnableVFP(); /* Lazy save always. */ - *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS; + *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS; /* Start the first task. This also clears the bit that indicates the FPU is * in use in case the FPU was used before the scheduler was started - which @@ -626,12 +627,12 @@ void xPortSysTickHandler( void ) __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) { /* Stop and clear the SysTick. */ - portNVIC_SYSTICK_CTRL_REG = 0UL; + portNVIC_SYSTICK_CTRL_REG = 0UL; portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Configure SysTick to interrupt at the requested rate. */ - portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; - portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE ); + portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE ); } /*-----------------------------------------------------------*/ @@ -665,12 +666,12 @@ static void prvSetupMPU( void ) extern uint32_t * __privileged_data_end__; #else /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __privileged_functions_start__[]; - extern uint32_t __privileged_functions_end__[]; - extern uint32_t __FLASH_segment_start__[]; - extern uint32_t __FLASH_segment_end__[]; - extern uint32_t __privileged_data_start__[]; - extern uint32_t __privileged_data_end__[]; + extern uint32_t __privileged_functions_start__[]; + extern uint32_t __privileged_functions_end__[]; + extern uint32_t __FLASH_segment_start__[]; + extern uint32_t __FLASH_segment_end__[]; + extern uint32_t __privileged_data_start__[]; + extern uint32_t __privileged_data_end__[]; #endif /* if defined( __ARMCC_VERSION ) */ /* Check the expected MPU is present. */ @@ -681,10 +682,10 @@ static void prvSetupMPU( void ) ( portMPU_REGION_VALID ) | ( portUNPRIVILEGED_FLASH_REGION ); - portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_READ_ONLY ) | - ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | - ( prvGetMPURegionSizeSetting( ( uint32_t ) __FLASH_segment_end__ - ( uint32_t ) __FLASH_segment_start__ ) ) | - ( portMPU_REGION_ENABLE ); + portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_READ_ONLY ) | + ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | + ( prvGetMPURegionSizeSetting( ( uint32_t ) __FLASH_segment_end__ - ( uint32_t ) __FLASH_segment_start__ ) ) | + ( portMPU_REGION_ENABLE ); /* Setup the privileged flash for privileged only access. This is where * the kernel code is placed. */ @@ -692,10 +693,10 @@ static void prvSetupMPU( void ) ( portMPU_REGION_VALID ) | ( portPRIVILEGED_FLASH_REGION ); - portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_PRIVILEGED_READ_ONLY ) | - ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | - ( prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_functions_end__ - ( uint32_t ) __privileged_functions_start__ ) ) | - ( portMPU_REGION_ENABLE ); + portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_PRIVILEGED_READ_ONLY ) | + ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | + ( prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_functions_end__ - ( uint32_t ) __privileged_functions_start__ ) ) | + ( portMPU_REGION_ENABLE ); /* Setup the privileged data RAM region. This is where the kernel data * is placed. */ @@ -703,10 +704,10 @@ static void prvSetupMPU( void ) ( portMPU_REGION_VALID ) | ( portPRIVILEGED_RAM_REGION ); - portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | - ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | - prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) | - ( portMPU_REGION_ENABLE ); + portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | + ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | + prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) | + ( portMPU_REGION_ENABLE ); /* By default allow everything to access the general peripherals. The * system peripherals and registers are protected. */ @@ -714,15 +715,15 @@ static void prvSetupMPU( void ) ( portMPU_REGION_VALID ) | ( portGENERAL_PERIPHERALS_REGION ); - portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) | - ( prvGetMPURegionSizeSetting( portPERIPHERALS_END_ADDRESS - portPERIPHERALS_START_ADDRESS ) ) | - ( portMPU_REGION_ENABLE ); + portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) | + ( prvGetMPURegionSizeSetting( portPERIPHERALS_END_ADDRESS - portPERIPHERALS_START_ADDRESS ) ) | + ( portMPU_REGION_ENABLE ); /* Enable the memory fault exception. */ - portNVIC_SYS_CTRL_STATE_REG |= portNVIC_MEM_FAULT_ENABLE; + portNVIC_SYS_CTRL_STATE_REG |= portNVIC_MEM_FAULT_ENABLE; /* Enable the MPU with the background region configured. */ - portMPU_CTRL_REG |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE ); + portMPU_CTRL_REG |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE ); } } /*-----------------------------------------------------------*/ @@ -796,14 +797,14 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, extern uint32_t * __privileged_data_end__; #else /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __SRAM_segment_start__[]; - extern uint32_t __SRAM_segment_end__[]; - extern uint32_t __privileged_data_start__[]; - extern uint32_t __privileged_data_end__[]; + extern uint32_t __SRAM_segment_start__[]; + extern uint32_t __SRAM_segment_end__[]; + extern uint32_t __privileged_data_start__[]; + extern uint32_t __privileged_data_end__[]; #endif /* if defined( __ARMCC_VERSION ) */ - int32_t lIndex; - uint32_t ul; + int32_t lIndex; + uint32_t ul; if( xRegions == NULL ) { @@ -813,7 +814,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, ( portMPU_REGION_VALID ) | ( portSTACK_REGION ); - xMPUSettings->xRegion[ 0 ].ulRegionAttribute = + xMPUSettings->xRegion[ 0 ].ulRegionAttribute = ( portMPU_REGION_READ_WRITE ) | ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | ( prvGetMPURegionSizeSetting( ( uint32_t ) __SRAM_segment_end__ - ( uint32_t ) __SRAM_segment_start__ ) ) | @@ -826,7 +827,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, ( portMPU_REGION_VALID ) | ( portSTACK_REGION + 1 ); - xMPUSettings->xRegion[ 1 ].ulRegionAttribute = + xMPUSettings->xRegion[ 1 ].ulRegionAttribute = ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) | @@ -836,7 +837,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, for( ul = 2; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ ) { xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID; - xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL; + xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL; } } else @@ -853,7 +854,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, ( portMPU_REGION_VALID ) | ( portSTACK_REGION ); /* Region number. */ - xMPUSettings->xRegion[ 0 ].ulRegionAttribute = + xMPUSettings->xRegion[ 0 ].ulRegionAttribute = ( portMPU_REGION_READ_WRITE ) | /* Read and write. */ ( prvGetMPURegionSizeSetting( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) ) | ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | @@ -874,7 +875,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, ( portMPU_REGION_VALID ) | ( portSTACK_REGION + ul ); /* Region number. */ - xMPUSettings->xRegion[ ul ].ulRegionAttribute = + xMPUSettings->xRegion[ ul ].ulRegionAttribute = ( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) | ( xRegions[ lIndex ].ulParameters ) | ( portMPU_REGION_ENABLE ); @@ -883,7 +884,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, { /* Invalidate the region. */ xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID; - xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL; + xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL; } lIndex++; @@ -897,7 +898,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, void vPortValidateInterruptPriority( void ) { uint32_t ulCurrentInterrupt; - uint8_t ucCurrentPriority; + uint8_t ucCurrentPriority; /* Obtain the number of the currently executing interrupt. */ __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" ); diff --git a/portable/GCC/ARM_CM4_MPU/portmacro.h b/portable/GCC/ARM_CM4_MPU/portmacro.h index 426242014..3df29df08 100644 --- a/portable/GCC/ARM_CM4_MPU/portmacro.h +++ b/portable/GCC/ARM_CM4_MPU/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ @@ -132,7 +133,7 @@ #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) - #define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT + #define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ @@ -183,7 +184,7 @@ /*-----------------------------------------------------------*/ - #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) ) + #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) ) #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ @@ -228,7 +229,7 @@ portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void ) { - uint32_t ulCurrentInterrupt; + uint32_t ulCurrentInterrupt; BaseType_t xReturn; /* Obtain the number of the currently executing interrupt. */ diff --git a/portable/GCC/ARM_CM7/r0p1/port.c b/portable/GCC/ARM_CM7/r0p1/port.c index d969e5b20..b8395564e 100644 --- a/portable/GCC/ARM_CM7/r0p1/port.c +++ b/portable/GCC/ARM_CM7/r0p1/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -137,13 +138,13 @@ static void prvTaskExitError( void ); /* Each task maintains its own interrupt status in the critical nesting * variable. */ -static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; +static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; /* * The number of SysTick increments that make up one tick period. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t ulTimerCountsForOneTick = 0; + static uint32_t ulTimerCountsForOneTick = 0; #endif /* configUSE_TICKLESS_IDLE */ /* @@ -151,7 +152,7 @@ static UBaseType_t uxCriticalNesting = 0xaaaaa * 24 bit resolution of the SysTick timer. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t xMaximumPossibleSuppressedTicks = 0; + static uint32_t xMaximumPossibleSuppressedTicks = 0; #endif /* configUSE_TICKLESS_IDLE */ /* @@ -159,7 +160,7 @@ static UBaseType_t uxCriticalNesting = 0xaaaaa * power functionality only. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t ulStoppedTimerCompensation = 0; + static uint32_t ulStoppedTimerCompensation = 0; #endif /* configUSE_TICKLESS_IDLE */ /* @@ -168,8 +169,8 @@ static UBaseType_t uxCriticalNesting = 0xaaaaa * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY. */ #if ( configASSERT_DEFINED == 1 ) - static uint8_t ucMaxSysCallPriority = 0; - static uint32_t ulMaxPRIGROUPValue = 0; + static uint8_t ucMaxSysCallPriority = 0; + static uint32_t ulMaxPRIGROUPValue = 0; static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16; #endif /* configASSERT_DEFINED */ @@ -290,9 +291,9 @@ BaseType_t xPortStartScheduler( void ) #if ( configASSERT_DEFINED == 1 ) { - volatile uint32_t ulOriginalPriority; + volatile uint32_t ulOriginalPriority; volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER ); - volatile uint8_t ucMaxPriorityValue; + volatile uint8_t ucMaxPriorityValue; /* Determine the maximum priority from which ISR safe FreeRTOS API * functions can be called. ISR safe functions are those that end in @@ -300,21 +301,21 @@ BaseType_t xPortStartScheduler( void ) * ensure interrupt entry is as fast and simple as possible. * * Save the interrupt priority value that is about to be clobbered. */ - ulOriginalPriority = *pucFirstUserPriorityRegister; + ulOriginalPriority = *pucFirstUserPriorityRegister; /* Determine the number of priority bits available. First write to all * possible bits. */ *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE; /* Read the value back to see how many bits stuck. */ - ucMaxPriorityValue = *pucFirstUserPriorityRegister; + ucMaxPriorityValue = *pucFirstUserPriorityRegister; /* Use the same mask on the maximum system call priority. */ - ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; + ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; /* Calculate the maximum acceptable priority group value for the number * of bits read back. */ - ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS; + ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS; while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE ) { @@ -342,8 +343,8 @@ BaseType_t xPortStartScheduler( void ) /* Shift the priority group value back to its position within the AIRCR * register. */ - ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; - ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; + ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; + ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; /* Restore the clobbered interrupt priority register to its original * value. */ @@ -360,13 +361,13 @@ BaseType_t xPortStartScheduler( void ) vPortSetupTimerInterrupt(); /* Initialise the critical nesting count ready for the first task. */ - uxCriticalNesting = 0; + uxCriticalNesting = 0; /* Ensure the VFP is enabled - it should be anyway. */ vPortEnableVFP(); /* Lazy save always. */ - *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS; + *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS; /* Start the first task. */ prvPortStartFirstTask(); @@ -505,7 +506,7 @@ void xPortSysTickHandler( void ) __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ) { - uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; + uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; TickType_t xModifiableIdleTime; /* Make sure the SysTick reload value does not overflow the counter. */ @@ -523,7 +524,7 @@ void xPortSysTickHandler( void ) /* Calculate the reload value required to wait xExpectedIdleTime * tick periods. -1 is used because this code will execute part way * through one of the tick periods. */ - ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); + ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); if( ulReloadValue > ulStoppedTimerCompensation ) { @@ -542,14 +543,14 @@ void xPortSysTickHandler( void ) { /* Restart from whatever is left in the count register to complete * this tick period. */ - portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; + portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; /* Restart SysTick. */ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Reset the reload register to the value required for normal tick * periods. */ - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Re-enable interrupts - see comments above the cpsid instruction() * above. */ @@ -558,21 +559,21 @@ void xPortSysTickHandler( void ) else { /* Set the new reload value. */ - portNVIC_SYSTICK_LOAD_REG = ulReloadValue; + portNVIC_SYSTICK_LOAD_REG = ulReloadValue; /* Clear the SysTick count flag and set the count value back to * zero. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Restart SysTick. */ - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can * set its parameter to 0 to indicate that its implementation contains * its own wait for interrupt or wait for event instruction, and so wfi * should not be executed again. However, the original expected idle * time variable must remain unmodified, so a copy is taken. */ - xModifiableIdleTime = xExpectedIdleTime; + xModifiableIdleTime = xExpectedIdleTime; configPRE_SLEEP_PROCESSING( xModifiableIdleTime ); if( xModifiableIdleTime > 0 ) @@ -606,7 +607,7 @@ void xPortSysTickHandler( void ) * be, but using the tickless mode will inevitably result in some tiny * drift of the time maintained by the kernel with respect to calendar * time*/ - portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); /* Determine if the SysTick clock has already counted to zero and * been set back to the current reload value (the reload back being @@ -621,7 +622,7 @@ void xPortSysTickHandler( void ) * reloaded with ulReloadValue. Reset the * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick * period. */ - ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); + ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); /* Don't allow a tiny value, or values that have somehow * underflowed because the post sleep hook did something @@ -636,7 +637,7 @@ void xPortSysTickHandler( void ) /* As the pending tick will be processed as soon as this * function exits, the tick value maintained by the tick is stepped * forward by one less than the time spent waiting. */ - ulCompleteTickPeriods = xExpectedIdleTime - 1UL; + ulCompleteTickPeriods = xExpectedIdleTime - 1UL; } else { @@ -648,20 +649,20 @@ void xPortSysTickHandler( void ) /* How many complete tick periods passed while the processor * was waiting? */ - ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; + ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; /* The reload value is set to whatever fraction of a single tick * period remains. */ - portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; + portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; } /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard * value. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; vTaskStepTick( ulCompleteTickPeriods ); - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Exit with interrupts enabled. */ __asm volatile ( "cpsie i" ::: "memory" ); @@ -680,19 +681,19 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* Calculate the constants required to configure the tick interrupt. */ #if ( configUSE_TICKLESS_IDLE == 1 ) { - ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); + ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick; - ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); + ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); } #endif /* configUSE_TICKLESS_IDLE */ /* Stop and clear the SysTick. */ - portNVIC_SYSTICK_CTRL_REG = 0UL; + portNVIC_SYSTICK_CTRL_REG = 0UL; portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Configure SysTick to interrupt at the requested rate. */ - portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; - portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT ); + portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT ); } /*-----------------------------------------------------------*/ @@ -717,7 +718,7 @@ static void vPortEnableVFP( void ) void vPortValidateInterruptPriority( void ) { uint32_t ulCurrentInterrupt; - uint8_t ucCurrentPriority; + uint8_t ucCurrentPriority; /* Obtain the number of the currently executing interrupt. */ __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" ); diff --git a/portable/GCC/ARM_CM7/r0p1/portmacro.h b/portable/GCC/ARM_CM7/r0p1/portmacro.h index 4e336ec58..a65d627b6 100644 --- a/portable/GCC/ARM_CM7/r0p1/portmacro.h +++ b/portable/GCC/ARM_CM7/r0p1/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ @@ -147,7 +148,7 @@ /*-----------------------------------------------------------*/ - #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) ) + #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) ) #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ @@ -169,7 +170,7 @@ portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void ) { - uint32_t ulCurrentInterrupt; + uint32_t ulCurrentInterrupt; BaseType_t xReturn; /* Obtain the number of the currently executing interrupt. */ diff --git a/portable/GCC/ARM_CR5/port.c b/portable/GCC/ARM_CR5/port.c index 4ce8af965..418020f9d 100644 --- a/portable/GCC/ARM_CR5/port.c +++ b/portable/GCC/ARM_CR5/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Standard includes. */ @@ -166,23 +167,23 @@ static void prvTaskExitError( void ); * a non zero value to ensure interrupts don't inadvertently become unmasked before * the scheduler starts. As it is stored as part of the task context it will * automatically be set to 0 when the first task is started. */ -volatile uint32_t ulCriticalNesting = 9999UL; +volatile uint32_t ulCriticalNesting = 9999UL; /* Saved as part of the task context. If ulPortTaskHasFPUContext is non-zero then * a floating point context must be saved and restored for the task. */ -uint32_t ulPortTaskHasFPUContext = pdFALSE; +uint32_t ulPortTaskHasFPUContext = pdFALSE; /* Set to 1 to pend a context switch from an ISR. */ -uint32_t ulPortYieldRequired = pdFALSE; +uint32_t ulPortYieldRequired = pdFALSE; /* Counts the interrupt nesting depth. A context switch is only performed if * if the nesting depth is 0. */ -uint32_t ulPortInterruptNesting = 0UL; +uint32_t ulPortInterruptNesting = 0UL; /* Used in asm code. */ -__attribute__( ( used ) ) const uint32_t ulICCIAR = portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS; -__attribute__( ( used ) ) const uint32_t ulICCEOIR = portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS; -__attribute__( ( used ) ) const uint32_t ulICCPMR = portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS; +__attribute__( ( used ) ) const uint32_t ulICCIAR = portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS; +__attribute__( ( used ) ) const uint32_t ulICCEOIR = portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS; +__attribute__( ( used ) ) const uint32_t ulICCPMR = portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS; __attribute__( ( used ) ) const uint32_t ulMaxAPIPriorityMask = ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ); /*-----------------------------------------------------------*/ @@ -287,21 +288,21 @@ BaseType_t xPortStartScheduler( void ) #if ( configASSERT_DEFINED == 1 ) { - volatile uint32_t ulOriginalPriority; + volatile uint32_t ulOriginalPriority; volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( configINTERRUPT_CONTROLLER_BASE_ADDRESS + portINTERRUPT_PRIORITY_REGISTER_OFFSET ); - volatile uint8_t ucMaxPriorityValue; + volatile uint8_t ucMaxPriorityValue; /* Determine how many priority bits are implemented in the GIC. * * Save the interrupt priority value that is about to be clobbered. */ - ulOriginalPriority = *pucFirstUserPriorityRegister; + ulOriginalPriority = *pucFirstUserPriorityRegister; /* Determine the number of priority bits available. First write to * all possible bits. */ *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE; /* Read the value back to see how many bits stuck. */ - ucMaxPriorityValue = *pucFirstUserPriorityRegister; + ucMaxPriorityValue = *pucFirstUserPriorityRegister; /* Shift to the least significant bits. */ while( ( ucMaxPriorityValue & portBIT_0_SET ) != portBIT_0_SET ) @@ -479,7 +480,7 @@ uint32_t ulPortSetInterruptMask( void ) } else { - ulReturn = pdFALSE; + ulReturn = pdFALSE; portICCPMR_PRIORITY_MASK_REGISTER = ( uint32_t ) ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ); __asm volatile ( "dsb \n" "isb \n"::: "memory" ); diff --git a/portable/GCC/ARM_CR5/portmacro.h b/portable/GCC/ARM_CR5/portmacro.h index 01a8b289d..1688b6a64 100644 --- a/portable/GCC/ARM_CR5/portmacro.h +++ b/portable/GCC/ARM_CR5/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H @@ -135,7 +136,7 @@ /*-----------------------------------------------------------*/ - #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __builtin_clz( uxReadyPriorities ) ) + #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __builtin_clz( uxReadyPriorities ) ) #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ diff --git a/portable/GCC/ARM_CRx_No_GIC/port.c b/portable/GCC/ARM_CRx_No_GIC/port.c index 726b5b0b6..a06fc75f1 100644 --- a/portable/GCC/ARM_CRx_No_GIC/port.c +++ b/portable/GCC/ARM_CRx_No_GIC/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Standard includes. */ @@ -98,18 +99,18 @@ static void prvTaskExitError( void ); * a non zero value to ensure interrupts don't inadvertently become unmasked before * the scheduler starts. As it is stored as part of the task context it will * automatically be set to 0 when the first task is started. */ -volatile uint32_t ulCriticalNesting = 9999UL; +volatile uint32_t ulCriticalNesting = 9999UL; /* Saved as part of the task context. If ulPortTaskHasFPUContext is non-zero then * a floating point context must be saved and restored for the task. */ volatile uint32_t ulPortTaskHasFPUContext = pdFALSE; /* Set to 1 to pend a context switch from an ISR. */ -volatile uint32_t ulPortYieldRequired = pdFALSE; +volatile uint32_t ulPortYieldRequired = pdFALSE; /* Counts the interrupt nesting depth. A context switch is only performed if * if the nesting depth is 0. */ -volatile uint32_t ulPortInterruptNesting = 0UL; +volatile uint32_t ulPortInterruptNesting = 0UL; /* Used in the asm file to clear an interrupt. */ __attribute__( ( used ) ) const uint32_t ulICCEOIR = configEOI_ADDRESS; diff --git a/portable/GCC/ARM_CRx_No_GIC/portmacro.h b/portable/GCC/ARM_CRx_No_GIC/portmacro.h index 1e742367f..f8b41dc24 100644 --- a/portable/GCC/ARM_CRx_No_GIC/portmacro.h +++ b/portable/GCC/ARM_CRx_No_GIC/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H @@ -165,7 +166,7 @@ /*-----------------------------------------------------------*/ - #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __builtin_clz( uxReadyPriorities ) ) + #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __builtin_clz( uxReadyPriorities ) ) #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ diff --git a/portable/GCC/ATMega323/port.c b/portable/GCC/ATMega323/port.c index a84356a55..5bbf01226 100644 --- a/portable/GCC/ATMega323/port.c +++ b/portable/GCC/ATMega323/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* @@ -204,11 +205,11 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, /* The start of the task code will be popped off the stack last, so place * it on first. */ - usAddress = ( uint16_t ) pxCode; + usAddress = ( uint16_t ) pxCode; *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff ); pxTopOfStack--; - usAddress >>= 8; + usAddress >>= 8; *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff ); pxTopOfStack--; @@ -271,11 +272,11 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, pxTopOfStack--; /* Place the parameter on the stack in the expected location. */ - usAddress = ( uint16_t ) pvParameters; + usAddress = ( uint16_t ) pvParameters; *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff ); pxTopOfStack--; - usAddress >>= 8; + usAddress >>= 8; *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff ); pxTopOfStack--; @@ -365,36 +366,36 @@ void vPortYieldFromTick( void ) static void prvSetupTimerInterrupt( void ) { uint32_t ulCompareMatch; - uint8_t ucHighByte, ucLowByte; + uint8_t ucHighByte, ucLowByte; /* Using 16bit timer 1 to generate the tick. Correct fuses must be * selected for the configCPU_CLOCK_HZ clock. */ - ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ; + ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ; /* We only have 16 bits so have to scale to get our required tick rate. */ - ulCompareMatch /= portCLOCK_PRESCALER; + ulCompareMatch /= portCLOCK_PRESCALER; /* Adjust for correct value. */ - ulCompareMatch -= ( uint32_t ) 1; + ulCompareMatch -= ( uint32_t ) 1; /* Setup compare match value for compare match A. Interrupts are disabled * before this is called so we need not worry here. */ - ucLowByte = ( uint8_t ) ( ulCompareMatch & ( uint32_t ) 0xff ); + ucLowByte = ( uint8_t ) ( ulCompareMatch & ( uint32_t ) 0xff ); ulCompareMatch >>= 8; - ucHighByte = ( uint8_t ) ( ulCompareMatch & ( uint32_t ) 0xff ); - OCR1AH = ucHighByte; - OCR1AL = ucLowByte; + ucHighByte = ( uint8_t ) ( ulCompareMatch & ( uint32_t ) 0xff ); + OCR1AH = ucHighByte; + OCR1AL = ucLowByte; /* Setup clock source and compare match behaviour. */ - ucLowByte = portCLEAR_COUNTER_ON_MATCH | portPRESCALE_64; - TCCR1B = ucLowByte; + ucLowByte = portCLEAR_COUNTER_ON_MATCH | portPRESCALE_64; + TCCR1B = ucLowByte; /* Enable the interrupt - this is okay as interrupt are currently globally * disabled. */ - ucLowByte = TIMSK; - ucLowByte |= portCOMPARE_MATCH_A_INTERRUPT_ENABLE; - TIMSK = ucLowByte; + ucLowByte = TIMSK; + ucLowByte |= portCOMPARE_MATCH_A_INTERRUPT_ENABLE; + TIMSK = ucLowByte; } /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ATMega323/portmacro.h b/portable/GCC/ATMega323/portmacro.h index 1cda0096a..90b34c7ca 100644 --- a/portable/GCC/ATMega323/portmacro.h +++ b/portable/GCC/ATMega323/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* diff --git a/portable/GCC/AVR32_UC3/port.c b/portable/GCC/AVR32_UC3/port.c index 88054e10f..fbb33f305 100644 --- a/portable/GCC/AVR32_UC3/port.c +++ b/portable/GCC/AVR32_UC3/port.c @@ -37,6 +37,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ @@ -87,11 +88,11 @@ static void prvSetupTimerInterrupt( void ); void _init_startup( void ) { /* Import the Exception Vector Base Address. */ - extern void _evba; + extern void _evba; #if configHEAP_INIT - extern void __heap_start__; - extern void __heap_end__; + extern void __heap_start__; + extern void __heap_end__; BaseType_t * pxMem; #endif @@ -287,7 +288,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, *pxTopOfStack-- = ( StackType_t ) 0x05050505; /* R5 */ *pxTopOfStack-- = ( StackType_t ) 0x06060606; /* R6 */ *pxTopOfStack-- = ( StackType_t ) 0x07070707; /* R7 */ - *pxTopOfStack = ( StackType_t ) portNO_CRITICAL_NESTING; /* ulCriticalNesting */ + *pxTopOfStack = ( StackType_t ) portNO_CRITICAL_NESTING; /* ulCriticalNesting */ return pxTopOfStack; } @@ -321,7 +322,7 @@ void vPortEndScheduler( void ) { uint32_t lCycles; - lCycles = Get_system_register( AVR32_COUNT ); + lCycles = Get_system_register( AVR32_COUNT ); lCycles += ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ); /* If lCycles ends up to be 0, make it 1 so that the COMPARE and exception */ @@ -338,7 +339,7 @@ void vPortEndScheduler( void ) { uint32_t lCycles, lCount; - lCycles = Get_system_register( AVR32_COMPARE ); + lCycles = Get_system_register( AVR32_COMPARE ); lCycles += ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ); /* If lCycles ends up to be 0, make it 1 so that the COMPARE and exception */ @@ -348,7 +349,7 @@ void vPortEndScheduler( void ) lCycles++; } - lCount = Get_system_register( AVR32_COUNT ); + lCount = Get_system_register( AVR32_COUNT ); if( lCycles < lCount ) { /* We missed a tick, recover for the next. */ @@ -369,10 +370,10 @@ void vPortEndScheduler( void ) static void prvSetupTimerInterrupt( void ) { #if ( configTICK_USE_TC == 1 ) - volatile avr32_tc_t * tc = &AVR32_TC; + volatile avr32_tc_t * tc = &AVR32_TC; /* Options for waveform genration. */ - tc_waveform_opt_t waveform_opt = + tc_waveform_opt_t waveform_opt = { .channel = configTICK_TC_CHANNEL, /* Channel selection. */ @@ -398,7 +399,7 @@ static void prvSetupTimerInterrupt( void ) .tcclks = TC_CLOCK_SOURCE_TC2 /* Internal source clock 2. */ }; - tc_interrupt_t tc_interrupt = + tc_interrupt_t tc_interrupt = { .etrgs = 0, .ldrbs = 0, diff --git a/portable/GCC/AVR32_UC3/portmacro.h b/portable/GCC/AVR32_UC3/portmacro.h index a85e88884..f6720040f 100644 --- a/portable/GCC/AVR32_UC3/portmacro.h +++ b/portable/GCC/AVR32_UC3/portmacro.h @@ -37,6 +37,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ @@ -160,7 +161,7 @@ */ #define portRESTORE_CONTEXT() \ { \ - extern volatile uint32_t ulCriticalNesting; \ + extern volatile uint32_t ulCriticalNesting; \ extern volatile void * volatile pxCurrentTCB; \ \ __asm__ __volatile__ ( \ @@ -266,7 +267,7 @@ */ #define portSAVE_CONTEXT_OS_INT() \ { \ - extern volatile uint32_t ulCriticalNesting; \ + extern volatile uint32_t ulCriticalNesting; \ extern volatile void * volatile pxCurrentTCB; \ \ /* When we come here */ \ @@ -318,7 +319,7 @@ */ #define portRESTORE_CONTEXT_OS_INT() \ { \ - extern volatile uint32_t ulCriticalNesting; \ + extern volatile uint32_t ulCriticalNesting; \ extern volatile void * volatile pxCurrentTCB; \ \ /* Check if INT0 or higher were being handled (case where the OS tick interrupted another */ \ @@ -384,7 +385,7 @@ */ #define portSAVE_CONTEXT_SCALL() \ { \ - extern volatile uint32_t ulCriticalNesting; \ + extern volatile uint32_t ulCriticalNesting; \ extern volatile void * volatile pxCurrentTCB; \ \ /* Warning: the stack layout after SCALL doesn't match the one after an interrupt. */ \ @@ -451,7 +452,7 @@ */ #define portRESTORE_CONTEXT_SCALL() \ { \ - extern volatile uint32_t ulCriticalNesting; \ + extern volatile uint32_t ulCriticalNesting; \ extern volatile void * volatile pxCurrentTCB; \ \ /* Restore all registers */ \ @@ -543,7 +544,7 @@ */ #define portENTER_SWITCHING_ISR() \ { \ - extern volatile uint32_t ulCriticalNesting; \ + extern volatile uint32_t ulCriticalNesting; \ extern volatile void * volatile pxCurrentTCB; \ \ /* When we come here */ \ @@ -591,7 +592,7 @@ */ #define portEXIT_SWITCHING_ISR() \ { \ - extern volatile uint32_t ulCriticalNesting; \ + extern volatile uint32_t ulCriticalNesting; \ extern volatile void * volatile pxCurrentTCB; \ \ __asm__ __volatile__ ( \ diff --git a/portable/GCC/CORTUS_APS3/port.c b/portable/GCC/CORTUS_APS3/port.c index 36b5f8780..e14f7f005 100644 --- a/portable/GCC/CORTUS_APS3/port.c +++ b/portable/GCC/CORTUS_APS3/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Standard includes. */ @@ -53,7 +54,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, { /* Make space on the stack for the context - this leaves a couple of spaces * empty. */ - pxTopOfStack -= 20; + pxTopOfStack -= 20; /* Fill the registers with known values to assist debugging. */ pxTopOfStack[ 16 ] = 0; @@ -63,16 +64,16 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, pxTopOfStack[ 12 ] = 0x00000000UL; /* R14. */ pxTopOfStack[ 11 ] = 0x0d0d0d0dUL; pxTopOfStack[ 10 ] = 0x0c0c0c0cUL; - pxTopOfStack[ 9 ] = 0x0b0b0b0bUL; - pxTopOfStack[ 8 ] = 0x0a0a0a0aUL; - pxTopOfStack[ 7 ] = 0x09090909UL; - pxTopOfStack[ 6 ] = 0x08080808UL; - pxTopOfStack[ 5 ] = 0x07070707UL; - pxTopOfStack[ 4 ] = 0x06060606UL; - pxTopOfStack[ 3 ] = 0x05050505UL; - pxTopOfStack[ 2 ] = 0x04040404UL; - pxTopOfStack[ 1 ] = 0x03030303UL; - pxTopOfStack[ 0 ] = ( uint32_t ) pvParameters; + pxTopOfStack[ 9 ] = 0x0b0b0b0bUL; + pxTopOfStack[ 8 ] = 0x0a0a0a0aUL; + pxTopOfStack[ 7 ] = 0x09090909UL; + pxTopOfStack[ 6 ] = 0x08080808UL; + pxTopOfStack[ 5 ] = 0x07070707UL; + pxTopOfStack[ 4 ] = 0x06060606UL; + pxTopOfStack[ 3 ] = 0x05050505UL; + pxTopOfStack[ 2 ] = 0x04040404UL; + pxTopOfStack[ 1 ] = 0x03030303UL; + pxTopOfStack[ 0 ] = ( uint32_t ) pvParameters; return pxTopOfStack; } @@ -97,9 +98,9 @@ BaseType_t xPortStartScheduler( void ) static void prvSetupTimerInterrupt( void ) { /* Enable timer interrupts */ - counter1->reload = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1; - counter1->value = counter1->reload; - counter1->mask = 1; + counter1->reload = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1; + counter1->value = counter1->reload; + counter1->mask = 1; /* Set the IRQ Handler priority and enable it. */ irq[ IRQ_COUNTER1 ].ien = 1; diff --git a/portable/GCC/CORTUS_APS3/portmacro.h b/portable/GCC/CORTUS_APS3/portmacro.h index 1951ebf80..1788ebbb7 100644 --- a/portable/GCC/CORTUS_APS3/portmacro.h +++ b/portable/GCC/CORTUS_APS3/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/GCC/ColdFire_V2/port.c b/portable/GCC/ColdFire_V2/port.c index 886a3024c..4e1f51b28 100644 --- a/portable/GCC/ColdFire_V2/port.c +++ b/portable/GCC/ColdFire_V2/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Kernel includes. */ @@ -125,7 +126,7 @@ void vPortYieldHandler( void ) ulSavedInterruptMask = portSET_INTERRUPT_MASK_FROM_ISR(); /* Note this will clear all forced interrupts - this is done for speed. */ - MCF_INTC0_INTFRCL = 0; + MCF_INTC0_INTFRCL = 0; vTaskSwitchContext(); portCLEAR_INTERRUPT_MASK_FROM_ISR( ulSavedInterruptMask ); } diff --git a/portable/GCC/ColdFire_V2/portmacro.h b/portable/GCC/ColdFire_V2/portmacro.h index dae082f39..99b4d407c 100644 --- a/portable/GCC/ColdFire_V2/portmacro.h +++ b/portable/GCC/ColdFire_V2/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/GCC/H8S2329/port.c b/portable/GCC/H8S2329/port.c index 5a20808d3..4cf4570c8 100644 --- a/portable/GCC/H8S2329/port.c +++ b/portable/GCC/H8S2329/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Scheduler includes. */ @@ -69,7 +70,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, uint32_t ulValue; /* This requires an even address. */ - ulValue = ( uint32_t ) pxTopOfStack; + ulValue = ( uint32_t ) pxTopOfStack; if( ulValue & 1UL ) { @@ -89,15 +90,15 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, /* The initial stack mimics an interrupt stack. First there is the program * counter (24 bits). */ - ulValue = ( uint32_t ) pxCode; + ulValue = ( uint32_t ) pxCode; pxTopOfStack--; *pxTopOfStack = ( StackType_t ) ( ulValue & 0xff ); pxTopOfStack--; - ulValue >>= 8UL; + ulValue >>= 8UL; *pxTopOfStack = ( StackType_t ) ( ulValue & 0xff ); pxTopOfStack--; - ulValue >>= 8UL; + ulValue >>= 8UL; *pxTopOfStack = ( StackType_t ) ( ulValue & 0xff ); /* Followed by the CCR. */ @@ -119,18 +120,18 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, *pxTopOfStack = 0x66; /* ER0 */ - ulValue = ( uint32_t ) pvParameters; + ulValue = ( uint32_t ) pvParameters; pxTopOfStack--; *pxTopOfStack = ( StackType_t ) ( ulValue & 0xff ); pxTopOfStack--; - ulValue >>= 8UL; + ulValue >>= 8UL; *pxTopOfStack = ( StackType_t ) ( ulValue & 0xff ); pxTopOfStack--; - ulValue >>= 8UL; + ulValue >>= 8UL; *pxTopOfStack = ( StackType_t ) ( ulValue & 0xff ); pxTopOfStack--; - ulValue >>= 8UL; + ulValue >>= 8UL; *pxTopOfStack = ( StackType_t ) ( ulValue & 0xff ); /* ER1 */ @@ -289,14 +290,14 @@ static void prvSetupTimerInterrupt( void ) MSTPCR &= ~portMSTP13; /* Configure timer 1. */ - TCR1 = portCLEAR_ON_TGRA_COMPARE_MATCH | portCLOCK_DIV_64; + TCR1 = portCLEAR_ON_TGRA_COMPARE_MATCH | portCLOCK_DIV_64; /* Configure the compare match value for a tick of configTICK_RATE_HZ. */ - TGR1A = ulCompareMatch; + TGR1A = ulCompareMatch; /* Start the timer and enable the interrupt - we can do this here as * interrupts are globally disabled when this function is called. */ - TIER1 |= portTGRA_INTERRUPT_ENABLE; - TSTR |= portTIMER_CHANNEL; + TIER1 |= portTGRA_INTERRUPT_ENABLE; + TSTR |= portTIMER_CHANNEL; } /*-----------------------------------------------------------*/ diff --git a/portable/GCC/H8S2329/portmacro.h b/portable/GCC/H8S2329/portmacro.h index f1b30e053..6d7fbc71f 100644 --- a/portable/GCC/H8S2329/portmacro.h +++ b/portable/GCC/H8S2329/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ diff --git a/portable/GCC/HCS12/port.c b/portable/GCC/HCS12/port.c index 75817d39a..086074fbc 100644 --- a/portable/GCC/HCS12/port.c +++ b/portable/GCC/HCS12/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* GCC/HCS12 port by Jefferson L Smith, 2005 */ @@ -82,28 +83,28 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, /* The address of the task function is placed in the stack byte at a time. */ - *pxTopOfStack = ( StackType_t ) *( ( ( StackType_t * ) ( &pxCode ) ) + 1 ); - *--pxTopOfStack = ( StackType_t ) *( ( ( StackType_t * ) ( &pxCode ) ) + 0 ); + *pxTopOfStack = ( StackType_t ) *( ( ( StackType_t * ) ( &pxCode ) ) + 1 ); + *--pxTopOfStack = ( StackType_t ) *( ( ( StackType_t * ) ( &pxCode ) ) + 0 ); /* Next are all the registers that form part of the task context. */ /* Y register */ - *--pxTopOfStack = ( StackType_t ) 0xff; - *--pxTopOfStack = ( StackType_t ) 0xee; + *--pxTopOfStack = ( StackType_t ) 0xff; + *--pxTopOfStack = ( StackType_t ) 0xee; /* X register */ - *--pxTopOfStack = ( StackType_t ) 0xdd; - *--pxTopOfStack = ( StackType_t ) 0xcc; + *--pxTopOfStack = ( StackType_t ) 0xdd; + *--pxTopOfStack = ( StackType_t ) 0xcc; /* A register contains parameter high byte. */ - *--pxTopOfStack = ( StackType_t ) *( ( ( StackType_t * ) ( &pvParameters ) ) + 0 ); + *--pxTopOfStack = ( StackType_t ) *( ( ( StackType_t * ) ( &pvParameters ) ) + 0 ); /* B register contains parameter low byte. */ - *--pxTopOfStack = ( StackType_t ) *( ( ( StackType_t * ) ( &pvParameters ) ) + 1 ); + *--pxTopOfStack = ( StackType_t ) *( ( ( StackType_t * ) ( &pvParameters ) ) + 1 ); /* CCR: Note that when the task starts interrupts will be enabled since * "I" bit of CCR is cleared */ - *--pxTopOfStack = ( StackType_t ) 0x80; /* keeps Stop disabled (MCU default) */ + *--pxTopOfStack = ( StackType_t ) 0x80; /* keeps Stop disabled (MCU default) */ /* tmp softregs used by GCC. Values right now don't matter. */ __asm( "\n\ @@ -122,7 +123,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, /* The critical nesting depth is initialised with 0 (meaning not in * a critical section). */ - *--pxTopOfStack = ( StackType_t ) 0x00; + *--pxTopOfStack = ( StackType_t ) 0x00; return pxTopOfStack; @@ -139,7 +140,7 @@ static void prvSetupTimerInterrupt( void ) { /* Enable hardware RTI timer */ /* Ignores configTICK_RATE_HZ */ - RTICTL = 0x50; /* 16 MHz xtal: 976.56 Hz, 1024mS */ + RTICTL = 0x50; /* 16 MHz xtal: 976.56 Hz, 1024mS */ CRGINT |= 0x80; /* RTIE */ } /*-----------------------------------------------------------*/ diff --git a/portable/GCC/HCS12/portmacro.h b/portable/GCC/HCS12/portmacro.h index 36e25acfc..6689b3eda 100644 --- a/portable/GCC/HCS12/portmacro.h +++ b/portable/GCC/HCS12/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ diff --git a/portable/GCC/IA32_flat/ISR_Support.h b/portable/GCC/IA32_flat/ISR_Support.h index 01adca2d1..82765ddee 100644 --- a/portable/GCC/IA32_flat/ISR_Support.h +++ b/portable/GCC/IA32_flat/ISR_Support.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ .extern ulTopOfSystemStack diff --git a/portable/GCC/IA32_flat/port.c b/portable/GCC/IA32_flat/port.c index 6f16a6122..41b5220d6 100644 --- a/portable/GCC/IA32_flat/port.c +++ b/portable/GCC/IA32_flat/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Standard includes. */ @@ -138,7 +139,7 @@ static BaseType_t prvCheckValidityOfVectorNumber( uint32_t ulVectorNumber ); * variable must be initialised to a non zero value to ensure interrupts don't * inadvertently become unmasked before the scheduler starts. It is set to zero * before the first task starts executing. */ -volatile uint32_t ulCriticalNesting = 9999UL; +volatile uint32_t ulCriticalNesting = 9999UL; /* A structure used to map the various fields of an IDT entry into separate * structure members. */ @@ -171,7 +172,7 @@ static __attribute__( ( aligned( 32 ) ) ) IDTEntry_t xInterruptDescriptorTable[ /* A table in which application defined interrupt handlers are stored. These * are called by the central interrupt handler if a common interrupt entry * point it used. */ - static ISR_Handler_t xInterruptHandlerTable[ portNUM_VECTORS ] = { NULL }; + static ISR_Handler_t xInterruptHandlerTable[ portNUM_VECTORS ] = { NULL }; #endif /* configUSE_COMMON_INTERRUPT_ENTRY_POINT */ @@ -180,26 +181,26 @@ static __attribute__( ( aligned( 32 ) ) ) IDTEntry_t xInterruptDescriptorTable[ /* Saved as part of the task context. If pucPortTaskFPUContextBuffer is NULL * then the task does not have an FPU context. If pucPortTaskFPUContextBuffer is * not NULL then it points to a buffer into which the FPU context can be saved. */ - uint8_t * pucPortTaskFPUContextBuffer __attribute__( ( used ) ) = pdFALSE; + uint8_t * pucPortTaskFPUContextBuffer __attribute__( ( used ) ) = pdFALSE; #endif /* configSUPPORT_FPU */ /* The stack used by interrupt handlers. */ -static uint32_t ulSystemStack[ configISR_STACK_SIZE ] __attribute__( ( used ) ) = { 0 }; +static uint32_t ulSystemStack[ configISR_STACK_SIZE ] __attribute__( ( used ) ) = { 0 }; /* Don't use the very top of the system stack so the return address * appears as 0 if the debugger tries to unwind the stack. */ -volatile uint32_t ulTopOfSystemStack __attribute__( ( used ) ) = ( uint32_t ) &( ulSystemStack[ configISR_STACK_SIZE - 5 ] ); +volatile uint32_t ulTopOfSystemStack __attribute__( ( used ) ) = ( uint32_t ) &( ulSystemStack[ configISR_STACK_SIZE - 5 ] ); /* If a yield is requested from an interrupt or from a critical section then * the yield is not performed immediately, and ulPortYieldPending is set to pdTRUE * instead to indicate the yield should be performed at the end of the interrupt * when the critical section is exited. */ -volatile uint32_t ulPortYieldPending __attribute__( ( used ) ) = pdFALSE; +volatile uint32_t ulPortYieldPending __attribute__( ( used ) ) = pdFALSE; /* Counts the interrupt nesting depth. Used to know when to switch to the * interrupt/system stack and when to save/restore a complete context. */ -volatile uint32_t ulInterruptNesting __attribute__( ( used ) ) = 0; +volatile uint32_t ulInterruptNesting __attribute__( ( used ) ) = 0; /*-----------------------------------------------------------*/ @@ -286,20 +287,20 @@ static void prvSetInterruptGate( uint8_t ucNumber, uint16_t usCodeSegment; uint32_t ulBase = ( uint32_t ) pxHandlerFunction; - xInterruptDescriptorTable[ ucNumber ].usISRLow = ( uint16_t ) ( ulBase & USHRT_MAX ); - xInterruptDescriptorTable[ ucNumber ].usISRHigh = ( uint16_t ) ( ( ulBase >> 16UL ) & USHRT_MAX ); + xInterruptDescriptorTable[ ucNumber ].usISRLow = ( uint16_t ) ( ulBase & USHRT_MAX ); + xInterruptDescriptorTable[ ucNumber ].usISRHigh = ( uint16_t ) ( ( ulBase >> 16UL ) & USHRT_MAX ); /* When the flat model is used the CS will never change. */ __asm volatile ( "mov %%cs, %0" : "=r" ( usCodeSegment ) ); xInterruptDescriptorTable[ ucNumber ].usSegmentSelector = usCodeSegment; - xInterruptDescriptorTable[ ucNumber ].ucZero = 0; - xInterruptDescriptorTable[ ucNumber ].ucFlags = ucFlags; + xInterruptDescriptorTable[ ucNumber ].ucZero = 0; + xInterruptDescriptorTable[ ucNumber ].ucFlags = ucFlags; } /*-----------------------------------------------------------*/ void vPortSetupIDT( void ) { - uint32_t ulNum; + uint32_t ulNum; IDTPointer_t xIDT; #if ( configUSE_COMMON_INTERRUPT_ENTRY_POINT == 1 ) @@ -316,7 +317,7 @@ void vPortSetupIDT( void ) #endif /* configUSE_COMMON_INTERRUPT_ENTRY_POINT */ /* Set IDT address. */ - xIDT.ulTableBase = ( uint32_t ) xInterruptDescriptorTable; + xIDT.ulTableBase = ( uint32_t ) xInterruptDescriptorTable; xIDT.usTableLimit = sizeof( xInterruptDescriptorTable ) - 1; /* Set IDT in CPU. */ @@ -347,13 +348,13 @@ static void prvSetupTimerInterrupt( void ) extern void vPortAPICSpuriousHandler( void ); /* Initialise LAPIC to a well known state. */ - portAPIC_LDR = 0xFFFFFFFF; - portAPIC_LDR = ( ( portAPIC_LDR & 0x00FFFFFF ) | 0x00000001 ); - portAPIC_LVT_TIMER = portAPIC_DISABLE; - portAPIC_LVT_PERF = portAPIC_NMI; - portAPIC_LVT_LINT0 = portAPIC_DISABLE; - portAPIC_LVT_LINT1 = portAPIC_DISABLE; - portAPIC_TASK_PRIORITY = 0; + portAPIC_LDR = 0xFFFFFFFF; + portAPIC_LDR = ( ( portAPIC_LDR & 0x00FFFFFF ) | 0x00000001 ); + portAPIC_LVT_TIMER = portAPIC_DISABLE; + portAPIC_LVT_PERF = portAPIC_NMI; + portAPIC_LVT_LINT0 = portAPIC_DISABLE; + portAPIC_LVT_LINT1 = portAPIC_DISABLE; + portAPIC_TASK_PRIORITY = 0; /* Install APIC timer ISR vector. */ prvSetInterruptGate( ( uint8_t ) portAPIC_TIMER_INT_VECTOR, vPortTimerHandler, portIDT_FLAGS ); @@ -368,13 +369,13 @@ static void prvSetupTimerInterrupt( void ) prvSetInterruptGate( ( uint8_t ) portAPIC_SPURIOUS_INT_VECTOR, vPortAPICSpuriousHandler, portIDT_FLAGS ); /* Enable the APIC, mapping the spurious interrupt at the same time. */ - portAPIC_SPURIOUS_INT = portAPIC_SPURIOUS_INT_VECTOR | portAPIC_ENABLE_BIT; + portAPIC_SPURIOUS_INT = portAPIC_SPURIOUS_INT_VECTOR | portAPIC_ENABLE_BIT; /* Set timer error vector. */ - portAPIC_LVT_ERROR = portAPIC_LVT_ERROR_VECTOR; + portAPIC_LVT_ERROR = portAPIC_LVT_ERROR_VECTOR; /* Set the interrupt frequency. */ - portAPIC_TMRDIV = portAPIC_DIV_16; + portAPIC_TMRDIV = portAPIC_DIV_16; portAPIC_TIMER_INITIAL_COUNT = ( ( configCPU_CLOCK_HZ >> 4UL ) / configTICK_RATE_HZ ) - 1UL; } /*-----------------------------------------------------------*/ @@ -404,13 +405,13 @@ BaseType_t xPortStartScheduler( void ) /* Make sure the stack used by interrupts is aligned. */ ulTopOfSystemStack &= ~portBYTE_ALIGNMENT_MASK; - ulCriticalNesting = 0; + ulCriticalNesting = 0; /* Enable LAPIC Counter.*/ - portAPIC_LVT_TIMER = portAPIC_TIMER_PERIODIC | portAPIC_TIMER_INT_VECTOR; + portAPIC_LVT_TIMER = portAPIC_TIMER_PERIODIC | portAPIC_TIMER_INT_VECTOR; /* Sometimes needed. */ - portAPIC_TMRDIV = portAPIC_DIV_16; + portAPIC_TMRDIV = portAPIC_DIV_16; /* Should not return from the following function as the scheduler will then * be executing the tasks. */ @@ -506,7 +507,7 @@ uint32_t ulPortSetInterruptMask( void ) #else { /* Return original mask. */ - ulOriginalMask = portAPIC_TASK_PRIORITY; + ulOriginalMask = portAPIC_TASK_PRIORITY; portAPIC_TASK_PRIORITY = portMAX_API_CALL_PRIORITY; configASSERT( portAPIC_TASK_PRIORITY == portMAX_API_CALL_PRIORITY ); } @@ -556,7 +557,7 @@ void vPortAPICErrorHandler( void ) volatile uint32_t ulErrorStatus = 0; portAPIC_ERROR_STATUS = 0; - ulErrorStatus = portAPIC_ERROR_STATUS; + ulErrorStatus = portAPIC_ERROR_STATUS; ( void ) ulErrorStatus; /* Force an assert. */ diff --git a/portable/GCC/IA32_flat/portmacro.h b/portable/GCC/IA32_flat/portmacro.h index c52485979..404185841 100644 --- a/portable/GCC/IA32_flat/portmacro.h +++ b/portable/GCC/IA32_flat/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/GCC/MCF5235/port.c b/portable/GCC/MCF5235/port.c index 647ffd755..58b2569c2 100644 --- a/portable/GCC/MCF5235/port.c +++ b/portable/GCC/MCF5235/port.c @@ -253,20 +253,20 @@ BaseType_t xPortStartScheduler( void ) /* Add entry in vector table for yield system call. */ portVECTOR_TABLE[ portVECTOR_SYSCALL ] = prvPortYield; /* Add entry in vector table for periodic timer. */ - portVECTOR_TABLE[ portVECTOR_TIMER ] = prvPortPreemptiveTick; + portVECTOR_TABLE[ portVECTOR_TIMER ] = prvPortPreemptiveTick; /* Configure the timer for the system clock. */ if( configTICK_RATE_HZ > 0 ) { /* Configure prescaler */ - MCF_PIT_PCSR0 = MCF_PIT_PCSR_PRE( 0x9 ) | MCF_PIT_PCSR_RLD | MCF_PIT_PCSR_OVW; + MCF_PIT_PCSR0 = MCF_PIT_PCSR_PRE( 0x9 ) | MCF_PIT_PCSR_RLD | MCF_PIT_PCSR_OVW; /* Initialize the periodic timer interrupt. */ - MCF_PIT_PMR0 = MCF_PIT_MODULUS_REGISTER( configTICK_RATE_HZ ); + MCF_PIT_PMR0 = MCF_PIT_MODULUS_REGISTER( configTICK_RATE_HZ ); /* Configure interrupt priority and level and unmask interrupt. */ MCF_INTC0_ICR36 = MCF_INTC0_ICRn_IL( 0x1 ) | MCF_INTC0_ICRn_IP( 0x1 ); MCF_INTC0_IMRH &= ~( MCF_INTC0_IMRH_INT_MASK36 | MCF_INTC0_IMRH_MASKALL ); /* Enable interrupts */ - MCF_PIT_PCSR0 |= MCF_PIT_PCSR_PIE | MCF_PIT_PCSR_EN | MCF_PIT_PCSR_PIF; + MCF_PIT_PCSR0 |= MCF_PIT_PCSR_PIE | MCF_PIT_PCSR_EN | MCF_PIT_PCSR_PIF; } /* Restore the context of the first task that is going to run. */ diff --git a/portable/GCC/MSP430F449/port.c b/portable/GCC/MSP430F449/port.c index 9f4607f4c..04927e72a 100644 --- a/portable/GCC/MSP430F449/port.c +++ b/portable/GCC/MSP430F449/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* @@ -260,25 +261,25 @@ void vPortYield( void ) static void prvSetupTimerInterrupt( void ) { /* Ensure the timer is stopped. */ - TACTL = 0; + TACTL = 0; /* Run the timer of the ACLK. */ - TACTL = TASSEL_1; + TACTL = TASSEL_1; /* Clear everything to start with. */ - TACTL |= TACLR; + TACTL |= TACLR; /* Set the compare match value according to the tick rate we want. */ - TACCR0 = portACLK_FREQUENCY_HZ / configTICK_RATE_HZ; + TACCR0 = portACLK_FREQUENCY_HZ / configTICK_RATE_HZ; /* Enable the interrupts. */ TACCTL0 = CCIE; /* Start up clean. */ - TACTL |= TACLR; + TACTL |= TACLR; /* Up mode. */ - TACTL |= MC_1; + TACTL |= MC_1; } /*-----------------------------------------------------------*/ diff --git a/portable/GCC/MSP430F449/portmacro.h b/portable/GCC/MSP430F449/portmacro.h index 454027038..66d4f1c82 100644 --- a/portable/GCC/MSP430F449/portmacro.h +++ b/portable/GCC/MSP430F449/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/GCC/MicroBlaze/port.c b/portable/GCC/MicroBlaze/port.c index 9ddca70a3..3c7025713 100644 --- a/portable/GCC/MicroBlaze/port.c +++ b/portable/GCC/MicroBlaze/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -67,7 +68,7 @@ volatile UBaseType_t uxCriticalNesting = portINITIAL_NESTING_VALUE; /* To limit the amount of stack required by each task, this port uses a * separate stack for interrupts. */ -uint32_t * pulISRStack; +uint32_t * pulISRStack; /*-----------------------------------------------------------*/ @@ -88,8 +89,8 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, TaskFunction_t pxCode, void * pvParameters ) { - extern void * _SDA2_BASE_, * _SDA_BASE_; - const uint32_t ulR2 = ( uint32_t ) &_SDA2_BASE_; + extern void * _SDA2_BASE_, * _SDA_BASE_; + const uint32_t ulR2 = ( uint32_t ) &_SDA2_BASE_; const uint32_t ulR13 = ( uint32_t ) &_SDA_BASE_; /* Place a few bytes of known values on the bottom of the stack. @@ -248,9 +249,9 @@ void vPortYield( void ) */ static void prvSetupTimerInterrupt( void ) { - XTmrCtr xTimer; + XTmrCtr xTimer; const uint32_t ulCounterValue = configCPU_CLOCK_HZ / configTICK_RATE_HZ; - UBaseType_t uxMask; + UBaseType_t uxMask; /* The OPB timer1 is used to generate the tick. Use the provided library * functions to enable the timer and set the tick frequency. */ @@ -261,7 +262,7 @@ static void prvSetupTimerInterrupt( void ) /* Set the timer interrupt enable bit while maintaining the other bit * states. */ - uxMask = XIntc_In32( ( XPAR_OPB_INTC_0_BASEADDR + XIN_IER_OFFSET ) ); + uxMask = XIntc_In32( ( XPAR_OPB_INTC_0_BASEADDR + XIN_IER_OFFSET ) ); uxMask |= XPAR_OPB_TIMER_1_INTERRUPT_MASK; XIntc_Out32( ( XPAR_OPB_INTC_0_BASEADDR + XIN_IER_OFFSET ), ( uxMask ) ); @@ -287,15 +288,15 @@ void vTaskISRHandler( void ) if( ulPending < XPAR_INTC_MAX_NUM_INTR_INPUTS ) { static XIntc_VectorTableEntry * pxTablePtr; - static XIntc_Config * pxConfig; - static uint32_t ulInterruptMask; + static XIntc_Config * pxConfig; + static uint32_t ulInterruptMask; ulInterruptMask = ( uint32_t ) 1 << ulPending; /* Get the configuration data using the device ID */ - pxConfig = &XIntc_ConfigTable[ ( uint32_t ) XPAR_INTC_SINGLE_DEVICE_ID ]; + pxConfig = &XIntc_ConfigTable[ ( uint32_t ) XPAR_INTC_SINGLE_DEVICE_ID ]; - pxTablePtr = &( pxConfig->HandlerTable[ ulPending ] ); + pxTablePtr = &( pxConfig->HandlerTable[ ulPending ] ); if( pxConfig->AckBeforeService & ( ulInterruptMask ) ) { diff --git a/portable/GCC/MicroBlaze/portmacro.h b/portable/GCC/MicroBlaze/portmacro.h index f317120e3..486d61f0c 100644 --- a/portable/GCC/MicroBlaze/portmacro.h +++ b/portable/GCC/MicroBlaze/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/GCC/MicroBlazeV8/port.c b/portable/GCC/MicroBlazeV8/port.c index 38a76d842..edd518605 100644 --- a/portable/GCC/MicroBlazeV8/port.c +++ b/portable/GCC/MicroBlazeV8/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -73,7 +74,7 @@ static int32_t prvEnsureInterruptControllerIsInitialised( void ); /* Counts the nesting depth of calls to portENTER_CRITICAL(). Each task * maintains its own count, so this variable is saved as part of the task * context. */ -volatile UBaseType_t uxCriticalNesting = portINITIAL_NESTING_VALUE; +volatile UBaseType_t uxCriticalNesting = portINITIAL_NESTING_VALUE; /* This port uses a separate stack for interrupts. This prevents the stack of * every task needing to be large enough to hold an entire interrupt stack on top @@ -92,7 +93,7 @@ volatile uint32_t ulTaskSwitchRequested = 0UL; /* The instance of the interrupt controller used by this port. This is required * by the Xilinx library API functions. */ -static XIntc xInterruptControllerInstance; +static XIntc xInterruptControllerInstance; /*-----------------------------------------------------------*/ @@ -106,18 +107,18 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, TaskFunction_t pxCode, void * pvParameters ) { - extern void * _SDA2_BASE_, * _SDA_BASE_; - const uint32_t ulR2 = ( uint32_t ) &_SDA2_BASE_; + extern void * _SDA2_BASE_, * _SDA_BASE_; + const uint32_t ulR2 = ( uint32_t ) &_SDA2_BASE_; const uint32_t ulR13 = ( uint32_t ) &_SDA_BASE_; /* Place a few bytes of known values on the bottom of the stack. * This is essential for the Microblaze port and these lines must * not be omitted. */ - *pxTopOfStack = ( StackType_t ) 0x00000000; + *pxTopOfStack = ( StackType_t ) 0x00000000; pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x00000000; + *pxTopOfStack = ( StackType_t ) 0x00000000; pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x00000000; + *pxTopOfStack = ( StackType_t ) 0x00000000; pxTopOfStack--; #if ( XPAR_MICROBLAZE_USE_FPU != 0 ) @@ -129,7 +130,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, /* The MSR value placed in the initial task context should have interrupts * disabled. Each task will enable interrupts automatically when it enters * the running state for the first time. */ - *pxTopOfStack = mfmsr() & ~portMSR_IE; + *pxTopOfStack = mfmsr() & ~portMSR_IE; #if ( MICROBLAZE_EXCEPTIONS_ENABLED == 1 ) { @@ -142,20 +143,20 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, /* First stack an initial value for the critical section nesting. This * is initialised to zero. */ - *pxTopOfStack = ( StackType_t ) 0x00; + *pxTopOfStack = ( StackType_t ) 0x00; /* R0 is always zero. */ /* R1 is the SP. */ /* Place an initial value for all the general purpose registers. */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) ulR2; /* R2 - read only small data area. */ + *pxTopOfStack = ( StackType_t ) ulR2; /* R2 - read only small data area. */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x03; /* R3 - return values and temporaries. */ + *pxTopOfStack = ( StackType_t ) 0x03; /* R3 - return values and temporaries. */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x04; /* R4 - return values and temporaries. */ + *pxTopOfStack = ( StackType_t ) 0x04; /* R4 - return values and temporaries. */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pvParameters; /* R5 contains the function call parameters. */ + *pxTopOfStack = ( StackType_t ) pvParameters; /* R5 contains the function call parameters. */ #ifdef portPRE_LOAD_STACK_FOR_DEBUGGING pxTopOfStack--; @@ -177,11 +178,11 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, pxTopOfStack -= 8; #endif /* ifdef portPRE_LOAD_STACK_FOR_DEBUGGING */ - *pxTopOfStack = ( StackType_t ) ulR13; /* R13 - read/write small data area. */ + *pxTopOfStack = ( StackType_t ) ulR13; /* R13 - read/write small data area. */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* R14 - return address for interrupt. */ + *pxTopOfStack = ( StackType_t ) pxCode; /* R14 - return address for interrupt. */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) NULL; /* R15 - return address for subroutine. */ + *pxTopOfStack = ( StackType_t ) NULL; /* R15 - return address for subroutine. */ #ifdef portPRE_LOAD_STACK_FOR_DEBUGGING pxTopOfStack--; @@ -195,7 +196,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, pxTopOfStack -= 4; #endif - *pxTopOfStack = ( StackType_t ) 0x00; /* R19 - must be saved across function calls. Callee-save. Seems to be interpreted as the frame pointer. */ + *pxTopOfStack = ( StackType_t ) 0x00; /* R19 - must be saved across function calls. Callee-save. Seems to be interpreted as the frame pointer. */ #ifdef portPRE_LOAD_STACK_FOR_DEBUGGING pxTopOfStack--; @@ -250,7 +251,7 @@ BaseType_t xPortStartScheduler( void ) vApplicationSetupTimerInterrupt(); /* Reuse the stack from main() as the stack for the interrupts/exceptions. */ - pulISRStack = ( uint32_t * ) _stack; + pulISRStack = ( uint32_t * ) _stack; /* Ensure there is enough space for the functions called from the interrupt * service routines to write back into the stack frame of the caller. */ @@ -360,7 +361,7 @@ BaseType_t xPortInstallInterruptHandler( uint8_t ucInterruptID, static int32_t prvEnsureInterruptControllerIsInitialised( void ) { static int32_t lInterruptControllerInitialised = pdFALSE; - int32_t lReturn; + int32_t lReturn; /* Ensure the interrupt controller instance variable is initialised before * it is used, and that the initialisation only happens once. */ diff --git a/portable/GCC/MicroBlazeV8/port_exceptions.c b/portable/GCC/MicroBlazeV8/port_exceptions.c index c90e5a1a9..6d798cce3 100644 --- a/portable/GCC/MicroBlazeV8/port_exceptions.c +++ b/portable/GCC/MicroBlazeV8/port_exceptions.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Scheduler includes. */ @@ -107,55 +108,55 @@ /* First fill in the name and handle of the task that was in the Running * state when the exception occurred. */ - xRegisterDump.xCurrentTaskHandle = pxCurrentTCB; - xRegisterDump.pcCurrentTaskName = pcTaskGetName( NULL ); + xRegisterDump.xCurrentTaskHandle = pxCurrentTCB; + xRegisterDump.pcCurrentTaskName = pcTaskGetName( NULL ); configASSERT( pulStackPointerOnFunctionEntry ); /* Obtain the values of registers that were stacked prior to this function * being called, and may have changed since they were stacked. */ - xRegisterDump.ulR3 = pulStackPointerOnFunctionEntry[ portexR3_STACK_OFFSET ]; - xRegisterDump.ulR4 = pulStackPointerOnFunctionEntry[ portexR4_STACK_OFFSET ]; - xRegisterDump.ulR5 = pulStackPointerOnFunctionEntry[ portexR5_STACK_OFFSET ]; - xRegisterDump.ulR6 = pulStackPointerOnFunctionEntry[ portexR6_STACK_OFFSET ]; - xRegisterDump.ulR7 = pulStackPointerOnFunctionEntry[ portexR7_STACK_OFFSET ]; - xRegisterDump.ulR8 = pulStackPointerOnFunctionEntry[ portexR8_STACK_OFFSET ]; - xRegisterDump.ulR9 = pulStackPointerOnFunctionEntry[ portexR9_STACK_OFFSET ]; - xRegisterDump.ulR10 = pulStackPointerOnFunctionEntry[ portexR10_STACK_OFFSET ]; - xRegisterDump.ulR11 = pulStackPointerOnFunctionEntry[ portexR11_STACK_OFFSET ]; - xRegisterDump.ulR12 = pulStackPointerOnFunctionEntry[ portexR12_STACK_OFFSET ]; + xRegisterDump.ulR3 = pulStackPointerOnFunctionEntry[ portexR3_STACK_OFFSET ]; + xRegisterDump.ulR4 = pulStackPointerOnFunctionEntry[ portexR4_STACK_OFFSET ]; + xRegisterDump.ulR5 = pulStackPointerOnFunctionEntry[ portexR5_STACK_OFFSET ]; + xRegisterDump.ulR6 = pulStackPointerOnFunctionEntry[ portexR6_STACK_OFFSET ]; + xRegisterDump.ulR7 = pulStackPointerOnFunctionEntry[ portexR7_STACK_OFFSET ]; + xRegisterDump.ulR8 = pulStackPointerOnFunctionEntry[ portexR8_STACK_OFFSET ]; + xRegisterDump.ulR9 = pulStackPointerOnFunctionEntry[ portexR9_STACK_OFFSET ]; + xRegisterDump.ulR10 = pulStackPointerOnFunctionEntry[ portexR10_STACK_OFFSET ]; + xRegisterDump.ulR11 = pulStackPointerOnFunctionEntry[ portexR11_STACK_OFFSET ]; + xRegisterDump.ulR12 = pulStackPointerOnFunctionEntry[ portexR12_STACK_OFFSET ]; xRegisterDump.ulR15_return_address_from_subroutine = pulStackPointerOnFunctionEntry[ portexR15_STACK_OFFSET ]; - xRegisterDump.ulR18 = pulStackPointerOnFunctionEntry[ portexR18_STACK_OFFSET ]; - xRegisterDump.ulR19 = pulStackPointerOnFunctionEntry[ portexR19_STACK_OFFSET ]; - xRegisterDump.ulMSR = pulStackPointerOnFunctionEntry[ portexMSR_STACK_OFFSET ]; + xRegisterDump.ulR18 = pulStackPointerOnFunctionEntry[ portexR18_STACK_OFFSET ]; + xRegisterDump.ulR19 = pulStackPointerOnFunctionEntry[ portexR19_STACK_OFFSET ]; + xRegisterDump.ulMSR = pulStackPointerOnFunctionEntry[ portexMSR_STACK_OFFSET ]; /* Obtain the value of all other registers. */ - xRegisterDump.ulR2_small_data_area = mfgpr( R2 ); - xRegisterDump.ulR13_read_write_small_data_area = mfgpr( R13 ); - xRegisterDump.ulR14_return_address_from_interrupt = mfgpr( R14 ); - xRegisterDump.ulR16_return_address_from_trap = mfgpr( R16 ); + xRegisterDump.ulR2_small_data_area = mfgpr( R2 ); + xRegisterDump.ulR13_read_write_small_data_area = mfgpr( R13 ); + xRegisterDump.ulR14_return_address_from_interrupt = mfgpr( R14 ); + xRegisterDump.ulR16_return_address_from_trap = mfgpr( R16 ); xRegisterDump.ulR17_return_address_from_exceptions = mfgpr( R17 ); - xRegisterDump.ulR20 = mfgpr( R20 ); - xRegisterDump.ulR21 = mfgpr( R21 ); - xRegisterDump.ulR22 = mfgpr( R22 ); - xRegisterDump.ulR23 = mfgpr( R23 ); - xRegisterDump.ulR24 = mfgpr( R24 ); - xRegisterDump.ulR25 = mfgpr( R25 ); - xRegisterDump.ulR26 = mfgpr( R26 ); - xRegisterDump.ulR27 = mfgpr( R27 ); - xRegisterDump.ulR28 = mfgpr( R28 ); - xRegisterDump.ulR29 = mfgpr( R29 ); - xRegisterDump.ulR30 = mfgpr( R30 ); - xRegisterDump.ulR31 = mfgpr( R31 ); - xRegisterDump.ulR1_SP = ( ( uint32_t ) pulStackPointerOnFunctionEntry ) + portexASM_HANDLER_STACK_FRAME_SIZE; - xRegisterDump.ulEAR = mfear(); - xRegisterDump.ulESR = mfesr(); - xRegisterDump.ulEDR = mfedr(); + xRegisterDump.ulR20 = mfgpr( R20 ); + xRegisterDump.ulR21 = mfgpr( R21 ); + xRegisterDump.ulR22 = mfgpr( R22 ); + xRegisterDump.ulR23 = mfgpr( R23 ); + xRegisterDump.ulR24 = mfgpr( R24 ); + xRegisterDump.ulR25 = mfgpr( R25 ); + xRegisterDump.ulR26 = mfgpr( R26 ); + xRegisterDump.ulR27 = mfgpr( R27 ); + xRegisterDump.ulR28 = mfgpr( R28 ); + xRegisterDump.ulR29 = mfgpr( R29 ); + xRegisterDump.ulR30 = mfgpr( R30 ); + xRegisterDump.ulR31 = mfgpr( R31 ); + xRegisterDump.ulR1_SP = ( ( uint32_t ) pulStackPointerOnFunctionEntry ) + portexASM_HANDLER_STACK_FRAME_SIZE; + xRegisterDump.ulEAR = mfear(); + xRegisterDump.ulESR = mfesr(); + xRegisterDump.ulEDR = mfedr(); /* Move the saved program counter back to the instruction that was executed * when the exception occurred. This is only valid for certain types of * exception. */ - xRegisterDump.ulPC = xRegisterDump.ulR17_return_address_from_exceptions - portexINSTRUCTION_SIZE; + xRegisterDump.ulPC = xRegisterDump.ulR17_return_address_from_exceptions - portexINSTRUCTION_SIZE; #if ( XPAR_MICROBLAZE_USE_FPU != 0 ) { @@ -173,31 +174,31 @@ switch( ( uint32_t ) pvExceptionID ) { case XEXC_ID_FSL: - xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_FSL"; + xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_FSL"; break; case XEXC_ID_UNALIGNED_ACCESS: - xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_UNALIGNED_ACCESS"; + xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_UNALIGNED_ACCESS"; break; case XEXC_ID_ILLEGAL_OPCODE: - xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_ILLEGAL_OPCODE"; + xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_ILLEGAL_OPCODE"; break; case XEXC_ID_M_AXI_I_EXCEPTION: - xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_M_AXI_I_EXCEPTION or XEXC_ID_IPLB_EXCEPTION"; + xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_M_AXI_I_EXCEPTION or XEXC_ID_IPLB_EXCEPTION"; break; case XEXC_ID_M_AXI_D_EXCEPTION: - xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_M_AXI_D_EXCEPTION or XEXC_ID_DPLB_EXCEPTION"; + xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_M_AXI_D_EXCEPTION or XEXC_ID_DPLB_EXCEPTION"; break; case XEXC_ID_DIV_BY_ZERO: - xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_DIV_BY_ZERO"; + xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_DIV_BY_ZERO"; break; case XEXC_ID_STACK_VIOLATION: - xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_STACK_VIOLATION or XEXC_ID_MMU"; + xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_STACK_VIOLATION or XEXC_ID_MMU"; break; #if ( XPAR_MICROBLAZE_USE_FPU != 0 ) diff --git a/portable/GCC/MicroBlazeV8/portmacro.h b/portable/GCC/MicroBlazeV8/portmacro.h index 7a80272db..5b5840e46 100644 --- a/portable/GCC/MicroBlazeV8/portmacro.h +++ b/portable/GCC/MicroBlazeV8/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H @@ -115,7 +116,7 @@ * vTaskSwitchContext() being made from a single interrupt, as a single interrupt * can result in multiple peripherals being serviced. */ extern volatile uint32_t ulTaskSwitchRequested; - #define portYIELD_FROM_ISR( x ) if( ( x ) != pdFALSE ) ulTaskSwitchRequested = 1 + #define portYIELD_FROM_ISR( x ) if( ( x ) != pdFALSE ) ulTaskSwitchRequested = 1 #if ( configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 ) @@ -140,7 +141,7 @@ /*-----------------------------------------------------------*/ - #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) ) + #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) ) #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ diff --git a/portable/GCC/MicroBlazeV9/port.c b/portable/GCC/MicroBlazeV9/port.c index d0e16bbee..996728798 100644 --- a/portable/GCC/MicroBlazeV9/port.c +++ b/portable/GCC/MicroBlazeV9/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -74,7 +75,7 @@ static int32_t prvEnsureInterruptControllerIsInitialised( void ); /* Counts the nesting depth of calls to portENTER_CRITICAL(). Each task * maintains its own count, so this variable is saved as part of the task * context. */ -volatile UBaseType_t uxCriticalNesting = portINITIAL_NESTING_VALUE; +volatile UBaseType_t uxCriticalNesting = portINITIAL_NESTING_VALUE; /* This port uses a separate stack for interrupts. This prevents the stack of * every task needing to be large enough to hold an entire interrupt stack on top @@ -93,7 +94,7 @@ volatile uint32_t ulTaskSwitchRequested = 0UL; /* The instance of the interrupt controller used by this port. This is required * by the Xilinx library API functions. */ -static XIntc xInterruptControllerInstance; +static XIntc xInterruptControllerInstance; /*-----------------------------------------------------------*/ @@ -107,19 +108,19 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, TaskFunction_t pxCode, void * pvParameters ) { - extern void * _SDA2_BASE_, * _SDA_BASE_; - const uint32_t ulR2 = ( uint32_t ) &_SDA2_BASE_; + extern void * _SDA2_BASE_, * _SDA_BASE_; + const uint32_t ulR2 = ( uint32_t ) &_SDA2_BASE_; const uint32_t ulR13 = ( uint32_t ) &_SDA_BASE_; extern void _start1( void ); /* Place a few bytes of known values on the bottom of the stack. * This is essential for the Microblaze port and these lines must * not be omitted. */ - *pxTopOfStack = ( StackType_t ) 0x00000000; + *pxTopOfStack = ( StackType_t ) 0x00000000; pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x00000000; + *pxTopOfStack = ( StackType_t ) 0x00000000; pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x00000000; + *pxTopOfStack = ( StackType_t ) 0x00000000; pxTopOfStack--; #if ( XPAR_MICROBLAZE_USE_FPU != 0 ) @@ -131,7 +132,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, /* The MSR value placed in the initial task context should have interrupts * disabled. Each task will enable interrupts automatically when it enters * the running state for the first time. */ - *pxTopOfStack = mfmsr() & ~portMSR_IE; + *pxTopOfStack = mfmsr() & ~portMSR_IE; #if ( MICROBLAZE_EXCEPTIONS_ENABLED == 1 ) { @@ -144,20 +145,20 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, /* First stack an initial value for the critical section nesting. This * is initialised to zero. */ - *pxTopOfStack = ( StackType_t ) 0x00; + *pxTopOfStack = ( StackType_t ) 0x00; /* R0 is always zero. */ /* R1 is the SP. */ /* Place an initial value for all the general purpose registers. */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) ulR2; /* R2 - read only small data area. */ + *pxTopOfStack = ( StackType_t ) ulR2; /* R2 - read only small data area. */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x03; /* R3 - return values and temporaries. */ + *pxTopOfStack = ( StackType_t ) 0x03; /* R3 - return values and temporaries. */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x04; /* R4 - return values and temporaries. */ + *pxTopOfStack = ( StackType_t ) 0x04; /* R4 - return values and temporaries. */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pvParameters; /* R5 contains the function call parameters. */ + *pxTopOfStack = ( StackType_t ) pvParameters; /* R5 contains the function call parameters. */ #ifdef portPRE_LOAD_STACK_FOR_DEBUGGING pxTopOfStack--; @@ -179,11 +180,11 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, pxTopOfStack -= 8; #endif /* ifdef portPRE_LOAD_STACK_FOR_DEBUGGING */ - *pxTopOfStack = ( StackType_t ) ulR13; /* R13 - read/write small data area. */ + *pxTopOfStack = ( StackType_t ) ulR13; /* R13 - read/write small data area. */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* R14 - return address for interrupt. */ + *pxTopOfStack = ( StackType_t ) pxCode; /* R14 - return address for interrupt. */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) _start1; /* R15 - return address for subroutine. */ + *pxTopOfStack = ( StackType_t ) _start1; /* R15 - return address for subroutine. */ #ifdef portPRE_LOAD_STACK_FOR_DEBUGGING pxTopOfStack--; @@ -197,7 +198,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, pxTopOfStack -= 4; #endif - *pxTopOfStack = ( StackType_t ) 0x00; /* R19 - must be saved across function calls. Callee-save. Seems to be interpreted as the frame pointer. */ + *pxTopOfStack = ( StackType_t ) 0x00; /* R19 - must be saved across function calls. Callee-save. Seems to be interpreted as the frame pointer. */ #ifdef portPRE_LOAD_STACK_FOR_DEBUGGING pxTopOfStack--; @@ -252,7 +253,7 @@ BaseType_t xPortStartScheduler( void ) vApplicationSetupTimerInterrupt(); /* Reuse the stack from main() as the stack for the interrupts/exceptions. */ - pulISRStack = ( uint32_t * ) _stack; + pulISRStack = ( uint32_t * ) _stack; /* Ensure there is enough space for the functions called from the interrupt * service routines to write back into the stack frame of the caller. */ @@ -368,7 +369,7 @@ BaseType_t xPortInstallInterruptHandler( uint8_t ucInterruptID, static int32_t prvEnsureInterruptControllerIsInitialised( void ) { static int32_t lInterruptControllerInitialised = pdFALSE; - int32_t lReturn; + int32_t lReturn; /* Ensure the interrupt controller instance variable is initialised before * it is used, and that the initialisation only happens once. */ diff --git a/portable/GCC/MicroBlazeV9/port_exceptions.c b/portable/GCC/MicroBlazeV9/port_exceptions.c index c90e5a1a9..6d798cce3 100644 --- a/portable/GCC/MicroBlazeV9/port_exceptions.c +++ b/portable/GCC/MicroBlazeV9/port_exceptions.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Scheduler includes. */ @@ -107,55 +108,55 @@ /* First fill in the name and handle of the task that was in the Running * state when the exception occurred. */ - xRegisterDump.xCurrentTaskHandle = pxCurrentTCB; - xRegisterDump.pcCurrentTaskName = pcTaskGetName( NULL ); + xRegisterDump.xCurrentTaskHandle = pxCurrentTCB; + xRegisterDump.pcCurrentTaskName = pcTaskGetName( NULL ); configASSERT( pulStackPointerOnFunctionEntry ); /* Obtain the values of registers that were stacked prior to this function * being called, and may have changed since they were stacked. */ - xRegisterDump.ulR3 = pulStackPointerOnFunctionEntry[ portexR3_STACK_OFFSET ]; - xRegisterDump.ulR4 = pulStackPointerOnFunctionEntry[ portexR4_STACK_OFFSET ]; - xRegisterDump.ulR5 = pulStackPointerOnFunctionEntry[ portexR5_STACK_OFFSET ]; - xRegisterDump.ulR6 = pulStackPointerOnFunctionEntry[ portexR6_STACK_OFFSET ]; - xRegisterDump.ulR7 = pulStackPointerOnFunctionEntry[ portexR7_STACK_OFFSET ]; - xRegisterDump.ulR8 = pulStackPointerOnFunctionEntry[ portexR8_STACK_OFFSET ]; - xRegisterDump.ulR9 = pulStackPointerOnFunctionEntry[ portexR9_STACK_OFFSET ]; - xRegisterDump.ulR10 = pulStackPointerOnFunctionEntry[ portexR10_STACK_OFFSET ]; - xRegisterDump.ulR11 = pulStackPointerOnFunctionEntry[ portexR11_STACK_OFFSET ]; - xRegisterDump.ulR12 = pulStackPointerOnFunctionEntry[ portexR12_STACK_OFFSET ]; + xRegisterDump.ulR3 = pulStackPointerOnFunctionEntry[ portexR3_STACK_OFFSET ]; + xRegisterDump.ulR4 = pulStackPointerOnFunctionEntry[ portexR4_STACK_OFFSET ]; + xRegisterDump.ulR5 = pulStackPointerOnFunctionEntry[ portexR5_STACK_OFFSET ]; + xRegisterDump.ulR6 = pulStackPointerOnFunctionEntry[ portexR6_STACK_OFFSET ]; + xRegisterDump.ulR7 = pulStackPointerOnFunctionEntry[ portexR7_STACK_OFFSET ]; + xRegisterDump.ulR8 = pulStackPointerOnFunctionEntry[ portexR8_STACK_OFFSET ]; + xRegisterDump.ulR9 = pulStackPointerOnFunctionEntry[ portexR9_STACK_OFFSET ]; + xRegisterDump.ulR10 = pulStackPointerOnFunctionEntry[ portexR10_STACK_OFFSET ]; + xRegisterDump.ulR11 = pulStackPointerOnFunctionEntry[ portexR11_STACK_OFFSET ]; + xRegisterDump.ulR12 = pulStackPointerOnFunctionEntry[ portexR12_STACK_OFFSET ]; xRegisterDump.ulR15_return_address_from_subroutine = pulStackPointerOnFunctionEntry[ portexR15_STACK_OFFSET ]; - xRegisterDump.ulR18 = pulStackPointerOnFunctionEntry[ portexR18_STACK_OFFSET ]; - xRegisterDump.ulR19 = pulStackPointerOnFunctionEntry[ portexR19_STACK_OFFSET ]; - xRegisterDump.ulMSR = pulStackPointerOnFunctionEntry[ portexMSR_STACK_OFFSET ]; + xRegisterDump.ulR18 = pulStackPointerOnFunctionEntry[ portexR18_STACK_OFFSET ]; + xRegisterDump.ulR19 = pulStackPointerOnFunctionEntry[ portexR19_STACK_OFFSET ]; + xRegisterDump.ulMSR = pulStackPointerOnFunctionEntry[ portexMSR_STACK_OFFSET ]; /* Obtain the value of all other registers. */ - xRegisterDump.ulR2_small_data_area = mfgpr( R2 ); - xRegisterDump.ulR13_read_write_small_data_area = mfgpr( R13 ); - xRegisterDump.ulR14_return_address_from_interrupt = mfgpr( R14 ); - xRegisterDump.ulR16_return_address_from_trap = mfgpr( R16 ); + xRegisterDump.ulR2_small_data_area = mfgpr( R2 ); + xRegisterDump.ulR13_read_write_small_data_area = mfgpr( R13 ); + xRegisterDump.ulR14_return_address_from_interrupt = mfgpr( R14 ); + xRegisterDump.ulR16_return_address_from_trap = mfgpr( R16 ); xRegisterDump.ulR17_return_address_from_exceptions = mfgpr( R17 ); - xRegisterDump.ulR20 = mfgpr( R20 ); - xRegisterDump.ulR21 = mfgpr( R21 ); - xRegisterDump.ulR22 = mfgpr( R22 ); - xRegisterDump.ulR23 = mfgpr( R23 ); - xRegisterDump.ulR24 = mfgpr( R24 ); - xRegisterDump.ulR25 = mfgpr( R25 ); - xRegisterDump.ulR26 = mfgpr( R26 ); - xRegisterDump.ulR27 = mfgpr( R27 ); - xRegisterDump.ulR28 = mfgpr( R28 ); - xRegisterDump.ulR29 = mfgpr( R29 ); - xRegisterDump.ulR30 = mfgpr( R30 ); - xRegisterDump.ulR31 = mfgpr( R31 ); - xRegisterDump.ulR1_SP = ( ( uint32_t ) pulStackPointerOnFunctionEntry ) + portexASM_HANDLER_STACK_FRAME_SIZE; - xRegisterDump.ulEAR = mfear(); - xRegisterDump.ulESR = mfesr(); - xRegisterDump.ulEDR = mfedr(); + xRegisterDump.ulR20 = mfgpr( R20 ); + xRegisterDump.ulR21 = mfgpr( R21 ); + xRegisterDump.ulR22 = mfgpr( R22 ); + xRegisterDump.ulR23 = mfgpr( R23 ); + xRegisterDump.ulR24 = mfgpr( R24 ); + xRegisterDump.ulR25 = mfgpr( R25 ); + xRegisterDump.ulR26 = mfgpr( R26 ); + xRegisterDump.ulR27 = mfgpr( R27 ); + xRegisterDump.ulR28 = mfgpr( R28 ); + xRegisterDump.ulR29 = mfgpr( R29 ); + xRegisterDump.ulR30 = mfgpr( R30 ); + xRegisterDump.ulR31 = mfgpr( R31 ); + xRegisterDump.ulR1_SP = ( ( uint32_t ) pulStackPointerOnFunctionEntry ) + portexASM_HANDLER_STACK_FRAME_SIZE; + xRegisterDump.ulEAR = mfear(); + xRegisterDump.ulESR = mfesr(); + xRegisterDump.ulEDR = mfedr(); /* Move the saved program counter back to the instruction that was executed * when the exception occurred. This is only valid for certain types of * exception. */ - xRegisterDump.ulPC = xRegisterDump.ulR17_return_address_from_exceptions - portexINSTRUCTION_SIZE; + xRegisterDump.ulPC = xRegisterDump.ulR17_return_address_from_exceptions - portexINSTRUCTION_SIZE; #if ( XPAR_MICROBLAZE_USE_FPU != 0 ) { @@ -173,31 +174,31 @@ switch( ( uint32_t ) pvExceptionID ) { case XEXC_ID_FSL: - xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_FSL"; + xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_FSL"; break; case XEXC_ID_UNALIGNED_ACCESS: - xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_UNALIGNED_ACCESS"; + xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_UNALIGNED_ACCESS"; break; case XEXC_ID_ILLEGAL_OPCODE: - xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_ILLEGAL_OPCODE"; + xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_ILLEGAL_OPCODE"; break; case XEXC_ID_M_AXI_I_EXCEPTION: - xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_M_AXI_I_EXCEPTION or XEXC_ID_IPLB_EXCEPTION"; + xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_M_AXI_I_EXCEPTION or XEXC_ID_IPLB_EXCEPTION"; break; case XEXC_ID_M_AXI_D_EXCEPTION: - xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_M_AXI_D_EXCEPTION or XEXC_ID_DPLB_EXCEPTION"; + xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_M_AXI_D_EXCEPTION or XEXC_ID_DPLB_EXCEPTION"; break; case XEXC_ID_DIV_BY_ZERO: - xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_DIV_BY_ZERO"; + xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_DIV_BY_ZERO"; break; case XEXC_ID_STACK_VIOLATION: - xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_STACK_VIOLATION or XEXC_ID_MMU"; + xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_STACK_VIOLATION or XEXC_ID_MMU"; break; #if ( XPAR_MICROBLAZE_USE_FPU != 0 ) diff --git a/portable/GCC/MicroBlazeV9/portmacro.h b/portable/GCC/MicroBlazeV9/portmacro.h index 7a80272db..5b5840e46 100644 --- a/portable/GCC/MicroBlazeV9/portmacro.h +++ b/portable/GCC/MicroBlazeV9/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H @@ -115,7 +116,7 @@ * vTaskSwitchContext() being made from a single interrupt, as a single interrupt * can result in multiple peripherals being serviced. */ extern volatile uint32_t ulTaskSwitchRequested; - #define portYIELD_FROM_ISR( x ) if( ( x ) != pdFALSE ) ulTaskSwitchRequested = 1 + #define portYIELD_FROM_ISR( x ) if( ( x ) != pdFALSE ) ulTaskSwitchRequested = 1 #if ( configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 ) @@ -140,7 +141,7 @@ /*-----------------------------------------------------------*/ - #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) ) + #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) ) #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ diff --git a/portable/GCC/NiosII/port.c b/portable/GCC/NiosII/port.c index fe78f0ea7..845d50c46 100644 --- a/portable/GCC/NiosII/port.c +++ b/portable/GCC/NiosII/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -73,7 +74,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, void * pvParameters ) { StackType_t * pxFramePointer = pxTopOfStack - 1; - StackType_t xGlobalPointer; + StackType_t xGlobalPointer; prvReadGp( &xGlobalPointer ); @@ -181,7 +182,7 @@ int alt_irq_register( alt_u32 id, void * context, void ( * handler )( void *, alt_u32 ) ) { - int rc = -EINVAL; + int rc = -EINVAL; alt_irq_context status; if( id < ALT_NIRQ ) @@ -192,12 +193,12 @@ int alt_irq_register( alt_u32 id, * state. */ - status = alt_irq_disable_all(); + status = alt_irq_disable_all(); alt_irq[ id ].handler = handler; alt_irq[ id ].context = context; - rc = ( handler ) ? alt_irq_enable( id ) : alt_irq_disable( id ); + rc = ( handler ) ? alt_irq_enable( id ) : alt_irq_disable( id ); /* alt_irq_enable_all(status); This line is removed to prevent the interrupt from being immediately enabled. */ } diff --git a/portable/GCC/NiosII/portmacro.h b/portable/GCC/NiosII/portmacro.h index d8424eb99..7263e192d 100644 --- a/portable/GCC/NiosII/portmacro.h +++ b/portable/GCC/NiosII/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/GCC/PPC405_Xilinx/FPU_Macros.h b/portable/GCC/PPC405_Xilinx/FPU_Macros.h index f4b4b90bf..891cd7b01 100644 --- a/portable/GCC/PPC405_Xilinx/FPU_Macros.h +++ b/portable/GCC/PPC405_Xilinx/FPU_Macros.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* When switching out a task, if the task tag contains a buffer address then diff --git a/portable/GCC/PPC405_Xilinx/port.c b/portable/GCC/PPC405_Xilinx/port.c index fe51a7ea9..5891ecf7d 100644 --- a/portable/GCC/PPC405_Xilinx/port.c +++ b/portable/GCC/PPC405_Xilinx/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -187,9 +188,9 @@ static void prvSetupTimerInterrupt( void ) void vPortISRHandler( void * pvNullDoNotUse ) { - uint32_t ulInterruptStatus, ulInterruptMask = 1UL; - BaseType_t xInterruptNumber; - XIntc_Config * pxInterruptController; + uint32_t ulInterruptStatus, ulInterruptMask = 1UL; + BaseType_t xInterruptNumber; + XIntc_Config * pxInterruptController; XIntc_VectorTableEntry * pxTable; /* Just to remove compiler warning. */ @@ -200,7 +201,7 @@ void vPortISRHandler( void * pvNullDoNotUse ) pxInterruptController = &XIntc_ConfigTable[ XPAR_XPS_INTC_0_DEVICE_ID ]; /* Which interrupts are pending? */ - ulInterruptStatus = XIntc_mGetIntrStatus( pxInterruptController->BaseAddress ); + ulInterruptStatus = XIntc_mGetIntrStatus( pxInterruptController->BaseAddress ); for( xInterruptNumber = 0; xInterruptNumber < XPAR_INTC_MAX_NUM_INTR_INPUTS; xInterruptNumber++ ) { @@ -215,7 +216,7 @@ void vPortISRHandler( void * pvNullDoNotUse ) } /* Check the next interrupt. */ - ulInterruptMask <<= 0x01UL; + ulInterruptMask <<= 0x01UL; ulInterruptStatus >>= 0x01UL; /* Have we serviced all interrupts? */ diff --git a/portable/GCC/PPC405_Xilinx/portmacro.h b/portable/GCC/PPC405_Xilinx/portmacro.h index 1df9dad07..298500e88 100644 --- a/portable/GCC/PPC405_Xilinx/portmacro.h +++ b/portable/GCC/PPC405_Xilinx/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/GCC/PPC440_Xilinx/FPU_Macros.h b/portable/GCC/PPC440_Xilinx/FPU_Macros.h index f4b4b90bf..891cd7b01 100644 --- a/portable/GCC/PPC440_Xilinx/FPU_Macros.h +++ b/portable/GCC/PPC440_Xilinx/FPU_Macros.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* When switching out a task, if the task tag contains a buffer address then diff --git a/portable/GCC/PPC440_Xilinx/port.c b/portable/GCC/PPC440_Xilinx/port.c index 536cf6d23..46660e09d 100644 --- a/portable/GCC/PPC440_Xilinx/port.c +++ b/portable/GCC/PPC440_Xilinx/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -187,9 +188,9 @@ static void prvSetupTimerInterrupt( void ) void vPortISRHandler( void * pvNullDoNotUse ) { - uint32_t ulInterruptStatus, ulInterruptMask = 1UL; - BaseType_t xInterruptNumber; - XIntc_Config * pxInterruptController; + uint32_t ulInterruptStatus, ulInterruptMask = 1UL; + BaseType_t xInterruptNumber; + XIntc_Config * pxInterruptController; XIntc_VectorTableEntry * pxTable; /* Just to remove compiler warning. */ @@ -200,7 +201,7 @@ void vPortISRHandler( void * pvNullDoNotUse ) pxInterruptController = &XIntc_ConfigTable[ XPAR_XPS_INTC_0_DEVICE_ID ]; /* Which interrupts are pending? */ - ulInterruptStatus = XIntc_mGetIntrStatus( pxInterruptController->BaseAddress ); + ulInterruptStatus = XIntc_mGetIntrStatus( pxInterruptController->BaseAddress ); for( xInterruptNumber = 0; xInterruptNumber < XPAR_INTC_MAX_NUM_INTR_INPUTS; xInterruptNumber++ ) { @@ -215,7 +216,7 @@ void vPortISRHandler( void * pvNullDoNotUse ) } /* Check the next interrupt. */ - ulInterruptMask <<= 0x01UL; + ulInterruptMask <<= 0x01UL; ulInterruptStatus >>= 0x01UL; /* Have we serviced all interrupts? */ diff --git a/portable/GCC/PPC440_Xilinx/portmacro.h b/portable/GCC/PPC440_Xilinx/portmacro.h index 1df9dad07..298500e88 100644 --- a/portable/GCC/PPC440_Xilinx/portmacro.h +++ b/portable/GCC/PPC440_Xilinx/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h b/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h index cc7f05fa3..d882d6088 100644 --- a/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h +++ b/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h @@ -24,6 +24,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* diff --git a/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h b/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h index 7a4b0825a..babff6ac5 100644 --- a/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h +++ b/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* diff --git a/portable/GCC/RISC-V/port.c b/portable/GCC/RISC-V/port.c index 3ce5490f0..799ad1db0 100644 --- a/portable/GCC/RISC-V/port.c +++ b/portable/GCC/RISC-V/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -66,7 +67,7 @@ * interrupt stack after the scheduler has started. */ #ifdef configISR_STACK_SIZE_WORDS static __attribute__( ( aligned( 16 ) ) ) StackType_t xISRStack[ configISR_STACK_SIZE_WORDS ] = { 0 }; - const StackType_t xISRStackTop = ( StackType_t ) &( xISRStack[ configISR_STACK_SIZE_WORDS & ~portBYTE_ALIGNMENT_MASK ] ); + const StackType_t xISRStackTop = ( StackType_t ) &( xISRStack[ configISR_STACK_SIZE_WORDS & ~portBYTE_ALIGNMENT_MASK ] ); /* Don't use 0xa5 as the stack fill bytes as that is used by the kernerl for * the task stacks, and so will legitimately appear in many positions within @@ -74,7 +75,7 @@ #define portISR_STACK_FILL_BYTE 0xee #else extern const uint32_t __freertos_irq_stack_top[]; - const StackType_t xISRStackTop = ( StackType_t ) __freertos_irq_stack_top; + const StackType_t xISRStackTop = ( StackType_t ) __freertos_irq_stack_top; #endif /* @@ -87,11 +88,11 @@ void vPortSetupTimerInterrupt( void ) __attribute__( ( weak ) ); /*-----------------------------------------------------------*/ /* Used to program the machine timer compare register. */ -uint64_t ullNextTime = 0ULL; -const uint64_t * pullNextTime = &ullNextTime; -const size_t uxTimerIncrementsForOneTick = ( size_t ) ( ( configCPU_CLOCK_HZ ) / ( configTICK_RATE_HZ ) );/* Assumes increment won't go over 32-bits. */ -uint32_t const ullMachineTimerCompareRegisterBase = configMTIMECMP_BASE_ADDRESS; -volatile uint64_t * pullMachineTimerCompareRegister = NULL; +uint64_t ullNextTime = 0ULL; +const uint64_t * pullNextTime = &ullNextTime; +const size_t uxTimerIncrementsForOneTick = ( size_t ) ( ( configCPU_CLOCK_HZ ) / ( configTICK_RATE_HZ ) ); /* Assumes increment won't go over 32-bits. */ +uint32_t const ullMachineTimerCompareRegisterBase = configMTIMECMP_BASE_ADDRESS; +volatile uint64_t * pullMachineTimerCompareRegister = NULL; /* Set configCHECK_FOR_STACK_OVERFLOW to 3 to add ISR stack checking to task * stack checking. A problem in the ISR stack will trigger an assert, not call the @@ -100,7 +101,7 @@ volatile uint64_t * pullMachineTimerCompareRegister = NULL; #if defined( configISR_STACK_SIZE_WORDS ) && ( configCHECK_FOR_STACK_OVERFLOW > 2 ) #warning This path not tested, or even compiled yet. - static const uint8_t ucExpectedStackBytes[] = + static const uint8_t ucExpectedStackBytes[] = { portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \ portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \ @@ -121,29 +122,29 @@ volatile uint64_t * pullMachineTimerCompareRegister = NULL; void vPortSetupTimerInterrupt( void ) { - uint32_t ulCurrentTimeHigh, ulCurrentTimeLow; + uint32_t ulCurrentTimeHigh, ulCurrentTimeLow; volatile uint32_t * const pulTimeHigh = ( volatile uint32_t * const ) ( ( configMTIME_BASE_ADDRESS ) + 4UL ); /* 8-byte typer so high 32-bit word is 4 bytes up. */ - volatile uint32_t * const pulTimeLow = ( volatile uint32_t * const ) ( configMTIME_BASE_ADDRESS ); - volatile uint32_t ulHartId; + volatile uint32_t * const pulTimeLow = ( volatile uint32_t * const ) ( configMTIME_BASE_ADDRESS ); + volatile uint32_t ulHartId; __asm volatile ( "csrr %0, mhartid" : "=r" ( ulHartId ) ); - pullMachineTimerCompareRegister = ( volatile uint64_t * ) ( ullMachineTimerCompareRegisterBase + ( ulHartId * sizeof( uint64_t ) ) ); + pullMachineTimerCompareRegister = ( volatile uint64_t * ) ( ullMachineTimerCompareRegisterBase + ( ulHartId * sizeof( uint64_t ) ) ); do { ulCurrentTimeHigh = *pulTimeHigh; - ulCurrentTimeLow = *pulTimeLow; + ulCurrentTimeLow = *pulTimeLow; } while( ulCurrentTimeHigh != *pulTimeHigh ); - ullNextTime = ( uint64_t ) ulCurrentTimeHigh; - ullNextTime <<= 32ULL; /* High 4-byte word is 32-bits up. */ - ullNextTime |= ( uint64_t ) ulCurrentTimeLow; - ullNextTime += ( uint64_t ) uxTimerIncrementsForOneTick; + ullNextTime = ( uint64_t ) ulCurrentTimeHigh; + ullNextTime <<= 32ULL; /* High 4-byte word is 32-bits up. */ + ullNextTime |= ( uint64_t ) ulCurrentTimeLow; + ullNextTime += ( uint64_t ) uxTimerIncrementsForOneTick; *pullMachineTimerCompareRegister = ullNextTime; /* Prepare the time to use after the next tick interrupt. */ - ullNextTime += ( uint64_t ) uxTimerIncrementsForOneTick; + ullNextTime += ( uint64_t ) uxTimerIncrementsForOneTick; } #endif /* ( configMTIME_BASE_ADDRESS != 0 ) && ( configMTIME_BASE_ADDRESS != 0 ) */ diff --git a/portable/GCC/RISC-V/portmacro.h b/portable/GCC/RISC-V/portmacro.h index 2c058eee2..968bc421d 100644 --- a/portable/GCC/RISC-V/portmacro.h +++ b/portable/GCC/RISC-V/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ @@ -128,7 +129,7 @@ /*-----------------------------------------------------------*/ - #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - __builtin_clz( uxReadyPriorities ) ) + #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - __builtin_clz( uxReadyPriorities ) ) #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ diff --git a/portable/GCC/RL78/isr_support.h b/portable/GCC/RL78/isr_support.h index b698781de..e804c3f59 100644 --- a/portable/GCC/RL78/isr_support.h +++ b/portable/GCC/RL78/isr_support.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Variables used by scheduler */ diff --git a/portable/GCC/RL78/port.c b/portable/GCC/RL78/port.c index f2e2fbb78..82b51be1b 100644 --- a/portable/GCC/RL78/port.c +++ b/portable/GCC/RL78/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Scheduler includes. */ @@ -89,15 +90,15 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, pxTopOfStack--; /* Write in the parameter value. */ - pulLocal = ( uint32_t * ) pxTopOfStack; - *pulLocal = ( StackType_t ) pvParameters; + pulLocal = ( uint32_t * ) pxTopOfStack; + *pulLocal = ( StackType_t ) pvParameters; pxTopOfStack--; /* The return address, leaving space for the first two bytes of the * 32-bit value. */ pxTopOfStack--; - pulLocal = ( uint32_t * ) pxTopOfStack; - *pulLocal = ( uint32_t ) 0; + pulLocal = ( uint32_t * ) pxTopOfStack; + *pulLocal = ( uint32_t ) 0; pxTopOfStack--; /* The start address / PSW value is also written in as a 32bit value, @@ -105,8 +106,8 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, pxTopOfStack--; /* Task function start address combined with the PSW. */ - pulLocal = ( uint32_t * ) pxTopOfStack; - *pulLocal = ( ( ( uint32_t ) pxCode ) | ( portPSW << 24UL ) ); + pulLocal = ( uint32_t * ) pxTopOfStack; + *pulLocal = ( ( ( uint32_t ) pxCode ) | ( portPSW << 24UL ) ); pxTopOfStack--; /* An initial value for the AX register. */ @@ -158,7 +159,7 @@ void vPortEndScheduler( void ) __attribute__( ( weak ) ) void vApplicationSetupTimerInterrupt( void ) { - const uint16_t usClockHz = 15000UL; /* Internal clock. */ + const uint16_t usClockHz = 15000UL; /* Internal clock. */ const uint16_t usCompareMatch = ( usClockHz / configTICK_RATE_HZ ) + 1UL; /* Use the internal 15K clock. */ @@ -170,19 +171,19 @@ __attribute__( ( weak ) ) void vApplicationSetupTimerInterrupt( void ) RTCEN = ( unsigned char ) 1U; /* Disable INTIT interrupt. */ - ITMK = ( unsigned char ) 1; + ITMK = ( unsigned char ) 1; /* Disable ITMC operation. */ - ITMC = ( unsigned char ) 0x0000; + ITMC = ( unsigned char ) 0x0000; /* Clear INIT interrupt. */ - ITIF = ( unsigned char ) 0; + ITIF = ( unsigned char ) 0; /* Set interval and enable interrupt operation. */ - ITMC = usCompareMatch | 0x8000U; + ITMC = usCompareMatch | 0x8000U; /* Enable INTIT interrupt. */ - ITMK = ( unsigned char ) 0; + ITMK = ( unsigned char ) 0; } #endif /* ifdef RTCEN */ @@ -195,13 +196,13 @@ __attribute__( ( weak ) ) void vApplicationSetupTimerInterrupt( void ) TMKAMK = ( unsigned char ) 1; /* Disable ITMC operation. */ - ITMC = ( unsigned char ) 0x0000; + ITMC = ( unsigned char ) 0x0000; /* Clear INIT interrupt. */ TMKAIF = ( unsigned char ) 0; /* Set interval and enable interrupt operation. */ - ITMC = usCompareMatch | 0x8000U; + ITMC = usCompareMatch | 0x8000U; /* Enable INTIT interrupt. */ TMKAMK = ( unsigned char ) 0; diff --git a/portable/GCC/RL78/portmacro.h b/portable/GCC/RL78/portmacro.h index dbbf1313c..4c595883d 100644 --- a/portable/GCC/RL78/portmacro.h +++ b/portable/GCC/RL78/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/GCC/RX100/port.c b/portable/GCC/RX100/port.c index 1430bfe22..1c6d16cbf 100644 --- a/portable/GCC/RX100/port.c +++ b/portable/GCC/RX100/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -121,10 +122,10 @@ static void prvSetupTimerInterrupt( void ); /*-----------------------------------------------------------*/ /* Used in the context save and restore code. */ -extern void * pxCurrentTCB; +extern void * pxCurrentTCB; /* Calculate how many clock increments make up a single tick period. */ -static const uint32_t ulMatchValueForOneTick = ( ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) / configTICK_RATE_HZ ); +static const uint32_t ulMatchValueForOneTick = ( ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) / configTICK_RATE_HZ ); #if configUSE_TICKLESS_IDLE == 1 @@ -137,7 +138,7 @@ static const uint32_t ulMatchValueForOneTick = ( ( configPERIPHER /* Flag set from the tick interrupt to allow the sleep processing to know if * sleep mode was exited because of a tick interrupt, or an interrupt * generated by something else. */ - static volatile uint32_t ulTickFlag = pdFALSE; + static volatile uint32_t ulTickFlag = pdFALSE; /* The CMT counter is stopped temporarily each time it is re-programmed. * The following constant offsets the CMT counter match value by the number of @@ -145,7 +146,7 @@ static const uint32_t ulMatchValueForOneTick = ( ( configPERIPHER * compensate for the lost time. The large difference between the divided CMT * clock and the CPU clock means it is likely ulStoppedTimerCompensation will * equal zero - and be optimised away. */ - static const uint32_t ulStoppedTimerCompensation = 100UL / ( configCPU_CLOCK_HZ / ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) ); + static const uint32_t ulStoppedTimerCompensation = 100UL / ( configCPU_CLOCK_HZ / ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) ); #endif /* if configUSE_TICKLESS_IDLE == 1 */ @@ -239,7 +240,7 @@ BaseType_t xPortStartScheduler( void ) _IEN( _ICU_SWINT ) = 1; /* Ensure the software interrupt is clear. */ - _IR( _ICU_SWINT ) = 0; + _IR( _ICU_SWINT ) = 0; /* Ensure the software interrupt is set to the kernel priority. */ _IPR( _ICU_SWINT ) = configKERNEL_INTERRUPT_PRIORITY; @@ -456,19 +457,19 @@ void vPortSetIPL( uint32_t ulNewIPL ) static void prvSetupTimerInterrupt( void ) { /* Unlock. */ - SYSTEM.PRCR.WORD = portUNLOCK_KEY; + SYSTEM.PRCR.WORD = portUNLOCK_KEY; /* Enable CMT0. */ - MSTP( CMT0 ) = 0; + MSTP( CMT0 ) = 0; /* Lock again. */ - SYSTEM.PRCR.WORD = portLOCK_KEY; + SYSTEM.PRCR.WORD = portLOCK_KEY; /* Interrupt on compare match. */ - CMT0.CMCR.BIT.CMIE = 1; + CMT0.CMCR.BIT.CMIE = 1; /* Set the compare match value. */ - CMT0.CMCOR = ( uint16_t ) ulMatchValueForOneTick; + CMT0.CMCOR = ( uint16_t ) ulMatchValueForOneTick; /* Divide the PCLK. */ #if portCLOCK_DIVISOR == 512 @@ -494,10 +495,10 @@ static void prvSetupTimerInterrupt( void ) #endif /* if portCLOCK_DIVISOR == 512 */ /* Enable the interrupt... */ - _IEN( _CMT0_CMI0 ) = 1; + _IEN( _CMT0_CMI0 ) = 1; /* ...and set its priority to the application defined kernel priority. */ - _IPR( _CMT0_CMI0 ) = configKERNEL_INTERRUPT_PRIORITY; + _IPR( _CMT0_CMI0 ) = configKERNEL_INTERRUPT_PRIORITY; /* Start the timer. */ CMT.CMSTR0.BIT.STR0 = 1; @@ -530,7 +531,7 @@ static void prvSetupTimerInterrupt( void ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ) { - uint32_t ulMatchValue, ulCompleteTickPeriods, ulCurrentCount; + uint32_t ulMatchValue, ulCompleteTickPeriods, ulCurrentCount; eSleepModeStatus eSleepAction; /* THIS FUNCTION IS CALLED WITH THE SCHEDULER SUSPENDED. */ @@ -543,7 +544,7 @@ static void prvSetupTimerInterrupt( void ) /* Calculate the reload value required to wait xExpectedIdleTime tick * periods. */ - ulMatchValue = ulMatchValueForOneTick * xExpectedIdleTime; + ulMatchValue = ulMatchValueForOneTick * xExpectedIdleTime; if( ulMatchValue > ulStoppedTimerCompensation ) { @@ -570,12 +571,12 @@ static void prvSetupTimerInterrupt( void ) /* The tick flag is set to false before sleeping. If it is true when * sleep mode is exited then sleep mode was probably exited because the * tick was suppressed for the entire xExpectedIdleTime period. */ - ulTickFlag = pdFALSE; + ulTickFlag = pdFALSE; /* If a context switch is pending then abandon the low power entry as * the context switch might have been pended by an external interrupt that * requires processing. */ - eSleepAction = eTaskConfirmSleepModeStatus(); + eSleepAction = eTaskConfirmSleepModeStatus(); if( eSleepAction == eAbortSleep ) { @@ -586,42 +587,42 @@ static void prvSetupTimerInterrupt( void ) else if( eSleepAction == eNoTasksWaitingTimeout ) { /* Protection off. */ - SYSTEM.PRCR.WORD = portUNLOCK_KEY; + SYSTEM.PRCR.WORD = portUNLOCK_KEY; /* Ready for software standby with all clocks stopped. */ SYSTEM.SBYCR.BIT.SSBY = 1; /* Protection on. */ - SYSTEM.PRCR.WORD = portLOCK_KEY; + SYSTEM.PRCR.WORD = portLOCK_KEY; /* Sleep until something happens. Calling prvSleep() will * automatically reset the i bit in the PSW. */ prvSleep( xExpectedIdleTime ); /* Restart the CMT. */ - CMT.CMSTR0.BIT.STR0 = 1; + CMT.CMSTR0.BIT.STR0 = 1; } else { /* Protection off. */ - SYSTEM.PRCR.WORD = portUNLOCK_KEY; + SYSTEM.PRCR.WORD = portUNLOCK_KEY; /* Ready for deep sleep mode. */ - SYSTEM.MSTPCRC.BIT.DSLPE = 1; + SYSTEM.MSTPCRC.BIT.DSLPE = 1; SYSTEM.MSTPCRA.BIT.MSTPA28 = 1; - SYSTEM.SBYCR.BIT.SSBY = 0; + SYSTEM.SBYCR.BIT.SSBY = 0; /* Protection on. */ - SYSTEM.PRCR.WORD = portLOCK_KEY; + SYSTEM.PRCR.WORD = portLOCK_KEY; /* Adjust the match value to take into account that the current * time slice is already partially complete. */ - ulMatchValue -= ( uint32_t ) CMT0.CMCNT; - CMT0.CMCOR = ( uint16_t ) ulMatchValue; + ulMatchValue -= ( uint32_t ) CMT0.CMCNT; + CMT0.CMCOR = ( uint16_t ) ulMatchValue; /* Restart the CMT to count up to the new match value. */ - CMT0.CMCNT = 0; - CMT.CMSTR0.BIT.STR0 = 1; + CMT0.CMCNT = 0; + CMT.CMSTR0.BIT.STR0 = 1; /* Sleep until something happens. Calling prvSleep() will * automatically reset the i bit in the PSW. */ @@ -631,14 +632,14 @@ static void prvSetupTimerInterrupt( void ) * accounted for as best it can be, but using the tickless mode will * inevitably result in some tiny drift of the time maintained by the * kernel with respect to calendar time. */ - CMT.CMSTR0.BIT.STR0 = 0; + CMT.CMSTR0.BIT.STR0 = 0; while( CMT.CMSTR0.BIT.STR0 == 1 ) { /* Nothing to do here. */ } - ulCurrentCount = ( uint32_t ) CMT0.CMCNT; + ulCurrentCount = ( uint32_t ) CMT0.CMCNT; if( ulTickFlag != pdFALSE ) { @@ -647,8 +648,8 @@ static void prvSetupTimerInterrupt( void ) * tick processing will not occur until after this function has * exited. Reset the match value with whatever remains of this * tick period. */ - ulMatchValue = ulMatchValueForOneTick - ulCurrentCount; - CMT0.CMCOR = ( uint16_t ) ulMatchValue; + ulMatchValue = ulMatchValueForOneTick - ulCurrentCount; + CMT0.CMCOR = ( uint16_t ) ulMatchValue; /* The tick interrupt handler will already have pended the tick * processing in the kernel. As the pending tick will be @@ -667,15 +668,15 @@ static void prvSetupTimerInterrupt( void ) /* The match value is set to whatever fraction of a single tick * period remains. */ - ulMatchValue = ulCurrentCount - ( ulCompleteTickPeriods * ulMatchValueForOneTick ); - CMT0.CMCOR = ( uint16_t ) ulMatchValue; + ulMatchValue = ulCurrentCount - ( ulCompleteTickPeriods * ulMatchValueForOneTick ); + CMT0.CMCOR = ( uint16_t ) ulMatchValue; } /* Restart the CMT so it runs up to the match value. The match value * will get set to the value required to generate exactly one tick period * the next time the CMT interrupt executes. */ - CMT0.CMCNT = 0; - CMT.CMSTR0.BIT.STR0 = 1; + CMT0.CMCNT = 0; + CMT.CMSTR0.BIT.STR0 = 1; /* Wind the tick forward by the number of tick periods that the CPU * remained in a low power state. */ diff --git a/portable/GCC/RX100/portmacro.h b/portable/GCC/RX100/portmacro.h index 1f40209f8..fb356e844 100644 --- a/portable/GCC/RX100/portmacro.h +++ b/portable/GCC/RX100/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ diff --git a/portable/GCC/RX600/port.c b/portable/GCC/RX600/port.c index 631ec7c18..15f2a6ca3 100644 --- a/portable/GCC/RX600/port.c +++ b/portable/GCC/RX600/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -163,7 +164,7 @@ BaseType_t xPortStartScheduler( void ) _IEN( _ICU_SWINT ) = 1; /* Ensure the software interrupt is clear. */ - _IR( _ICU_SWINT ) = 0; + _IR( _ICU_SWINT ) = 0; /* Ensure the software interrupt is set to the kernel priority. */ _IPR( _ICU_SWINT ) = configKERNEL_INTERRUPT_PRIORITY; diff --git a/portable/GCC/RX600/portmacro.h b/portable/GCC/RX600/portmacro.h index 6bb0edb09..46b88afd1 100644 --- a/portable/GCC/RX600/portmacro.h +++ b/portable/GCC/RX600/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ diff --git a/portable/GCC/RX600v2/port.c b/portable/GCC/RX600v2/port.c index 20e4fcbbd..520bc7ad7 100644 --- a/portable/GCC/RX600v2/port.c +++ b/portable/GCC/RX600v2/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -171,7 +172,7 @@ BaseType_t xPortStartScheduler( void ) _IEN( _ICU_SWINT ) = 1; /* Ensure the software interrupt is clear. */ - _IR( _ICU_SWINT ) = 0; + _IR( _ICU_SWINT ) = 0; /* Ensure the software interrupt is set to the kernel priority. */ _IPR( _ICU_SWINT ) = configKERNEL_INTERRUPT_PRIORITY; diff --git a/portable/GCC/RX600v2/portmacro.h b/portable/GCC/RX600v2/portmacro.h index 6bb0edb09..46b88afd1 100644 --- a/portable/GCC/RX600v2/portmacro.h +++ b/portable/GCC/RX600v2/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ diff --git a/portable/GCC/STR75x/port.c b/portable/GCC/STR75x/port.c index 78bc22d73..e219669e8 100644 --- a/portable/GCC/STR75x/port.c +++ b/portable/GCC/STR75x/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -164,19 +165,19 @@ void vPortEndScheduler( void ) static void prvSetupTimerInterrupt( void ) { EIC_IRQInitTypeDef EIC_IRQInitStructure; - TB_InitTypeDef TB_InitStructure; + TB_InitTypeDef TB_InitStructure; /* Setup the EIC for the TB. */ - EIC_IRQInitStructure.EIC_IRQChannelCmd = ENABLE; - EIC_IRQInitStructure.EIC_IRQChannel = TB_IRQChannel; + EIC_IRQInitStructure.EIC_IRQChannelCmd = ENABLE; + EIC_IRQInitStructure.EIC_IRQChannel = TB_IRQChannel; EIC_IRQInitStructure.EIC_IRQChannelPriority = 1; EIC_IRQInit( &EIC_IRQInitStructure ); /* Setup the TB for the generation of the tick interrupt. */ - TB_InitStructure.TB_Mode = TB_Mode_Timing; - TB_InitStructure.TB_CounterMode = TB_CounterMode_Down; - TB_InitStructure.TB_Prescaler = portPRESCALE - 1; - TB_InitStructure.TB_AutoReload = ( ( configCPU_CLOCK_HZ / portPRESCALE ) / configTICK_RATE_HZ ); + TB_InitStructure.TB_Mode = TB_Mode_Timing; + TB_InitStructure.TB_CounterMode = TB_CounterMode_Down; + TB_InitStructure.TB_Prescaler = portPRESCALE - 1; + TB_InitStructure.TB_AutoReload = ( ( configCPU_CLOCK_HZ / portPRESCALE ) / configTICK_RATE_HZ ); TB_Init( &TB_InitStructure ); /* Enable TB Update interrupt */ diff --git a/portable/GCC/STR75x/portISR.c b/portable/GCC/STR75x/portISR.c index b2d60e97b..28e57382c 100644 --- a/portable/GCC/STR75x/portISR.c +++ b/portable/GCC/STR75x/portISR.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ diff --git a/portable/GCC/STR75x/portmacro.h b/portable/GCC/STR75x/portmacro.h index f217eace2..adab88c98 100644 --- a/portable/GCC/STR75x/portmacro.h +++ b/portable/GCC/STR75x/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ diff --git a/portable/GCC/TriCore_1782/port.c b/portable/GCC/TriCore_1782/port.c index 8b06fb6eb..fdc3ec957 100644 --- a/portable/GCC/TriCore_1782/port.c +++ b/portable/GCC/TriCore_1782/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Standard includes. */ @@ -90,7 +91,7 @@ static void prvInterruptYield( int iTrapIdentification ); extern volatile uint32_t * pxCurrentTCB; /* Precalculate the compare match value at compile time. */ -static const uint32_t ulCompareMatchValue = ( configPERIPHERAL_CLOCK_HZ / configTICK_RATE_HZ ); +static const uint32_t ulCompareMatchValue = ( configPERIPHERAL_CLOCK_HZ / configTICK_RATE_HZ ); /*-----------------------------------------------------------*/ @@ -170,7 +171,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, pulLowerCSA[ 0 ] = ( portINITIAL_PCXI_UPPER_CONTEXT_WORD | ( uint32_t ) portADDRESS_TO_CSA( pulUpperCSA ) ); /* Save the link to the CSA in the top of stack. */ - pxTopOfStack = ( uint32_t * ) portADDRESS_TO_CSA( pulLowerCSA ); + pxTopOfStack = ( uint32_t * ) portADDRESS_TO_CSA( pulLowerCSA ); /* DSync to ensure that buffering is not a problem. */ _dsync(); @@ -182,7 +183,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, int32_t xPortStartScheduler( void ) { extern void vTrapInstallHandlers( void ); - uint32_t ulMFCR = 0UL; + uint32_t ulMFCR = 0UL; uint32_t * pulUpperCSA = NULL; uint32_t * pulLowerCSA = NULL; @@ -222,15 +223,15 @@ int32_t xPortStartScheduler( void ) /* Clear the PSW.CDC to enable the use of an RFE without it generating an * exception because this code is not genuinely in an exception. */ - ulMFCR = __MFCR( $PSW ); - ulMFCR &= portRESTORE_PSW_MASK; + ulMFCR = __MFCR( $PSW ); + ulMFCR &= portRESTORE_PSW_MASK; _dsync(); _mtcr( $PSW, ulMFCR ); _isync(); /* Finally, perform the equivalent of a portRESTORE_CONTEXT() */ - pulLowerCSA = portCSA_TO_ADDRESS( ( *pxCurrentTCB ) ); - pulUpperCSA = portCSA_TO_ADDRESS( pulLowerCSA[ 0 ] ); + pulLowerCSA = portCSA_TO_ADDRESS( ( *pxCurrentTCB ) ); + pulUpperCSA = portCSA_TO_ADDRESS( pulLowerCSA[ 0 ] ); _dsync(); _mtcr( $PCXI, *pxCurrentTCB ); _isync(); @@ -266,18 +267,18 @@ static void prvSetupTimerInterrupt( void ) STM_CMCON.reg |= ( 0x1fUL - __CLZ( configPERIPHERAL_CLOCK_HZ / configTICK_RATE_HZ ) ); /* Take into account the current time so a tick doesn't happen immediately. */ - STM_CMP0.reg = ulCompareMatchValue + STM_TIM0.reg; + STM_CMP0.reg = ulCompareMatchValue + STM_TIM0.reg; if( 0 != _install_int_handler( configKERNEL_INTERRUPT_PRIORITY, prvSystemTickHandler, 0 ) ) { /* Set-up the interrupt. */ - STM_SRC0.reg = ( configKERNEL_INTERRUPT_PRIORITY | 0x00005000UL ); + STM_SRC0.reg = ( configKERNEL_INTERRUPT_PRIORITY | 0x00005000UL ); /* Enable the Interrupt. */ STM_ISRR.reg &= ~( 0x03UL ); STM_ISRR.reg |= 0x1UL; STM_ISRR.reg &= ~( 0x07UL ); - STM_ICR.reg |= 0x1UL; + STM_ICR.reg |= 0x1UL; } else { @@ -289,17 +290,17 @@ static void prvSetupTimerInterrupt( void ) static void prvSystemTickHandler( int iArg ) { - uint32_t ulSavedInterruptMask; + uint32_t ulSavedInterruptMask; uint32_t * pxUpperCSA = NULL; - uint32_t xUpperCSA = 0UL; + uint32_t xUpperCSA = 0UL; extern volatile uint32_t * pxCurrentTCB; - int32_t lYieldRequired; + int32_t lYieldRequired; /* Just to avoid compiler warnings about unused parameters. */ ( void ) iArg; /* Clear the interrupt source. */ - STM_ISRR.reg = 1UL; + STM_ISRR.reg = 1UL; /* Reload the Compare Match register for X ticks into the future. * @@ -318,7 +319,7 @@ static void prvSystemTickHandler( int iArg ) * Changing the tick source to a timer that has an automatic reset on compare * match (such as a GPTA timer) will reduce the maximum possible additional * period to exactly 1 times the desired period. */ - STM_CMP0.reg += ulCompareMatchValue; + STM_CMP0.reg += ulCompareMatchValue; /* Kernel API calls require Critical Sections. */ ulSavedInterruptMask = portSET_INTERRUPT_MASK_FROM_ISR(); @@ -351,11 +352,11 @@ static void prvSystemTickHandler( int iArg ) * enabled/disabled. */ _disable(); _dsync(); - xUpperCSA = __MFCR( $PCXI ); - pxUpperCSA = portCSA_TO_ADDRESS( xUpperCSA ); - *pxCurrentTCB = pxUpperCSA[ 0 ]; + xUpperCSA = __MFCR( $PCXI ); + pxUpperCSA = portCSA_TO_ADDRESS( xUpperCSA ); + *pxCurrentTCB = pxUpperCSA[ 0 ]; vTaskSwitchContext(); - pxUpperCSA[ 0 ] = *pxCurrentTCB; + pxUpperCSA[ 0 ] = *pxCurrentTCB; CPU_SRC0.bits.SETR = 0; _isync(); } @@ -382,18 +383,18 @@ static void prvSystemTickHandler( int iArg ) */ void vPortReclaimCSA( uint32_t * pxTCB ) { - uint32_t pxHeadCSA, pxTailCSA, pxFreeCSA; + uint32_t pxHeadCSA, pxTailCSA, pxFreeCSA; uint32_t * pulNextCSA; /* A pointer to the first CSA in the list of CSAs consumed by the task is * stored in the first element of the tasks TCB structure (where the stack * pointer would be on a traditional stack based architecture). */ - pxHeadCSA = ( *pxTCB ) & portCSA_FCX_MASK; + pxHeadCSA = ( *pxTCB ) & portCSA_FCX_MASK; /* Mask off everything in the CSA link field other than the address. If * the address is NULL, then the CSA is not linking anywhere and there is * nothing to do. */ - pxTailCSA = pxHeadCSA; + pxTailCSA = pxHeadCSA; /* Convert the link value to contain just a raw address and store this * in a local variable. */ @@ -411,17 +412,17 @@ void vPortReclaimCSA( uint32_t * pxTCB ) pulNextCSA[ 0 ] = pulNextCSA[ 0 ] & portCSA_FCX_MASK; /* Move the pointer to point to the next CSA in the list. */ - pxTailCSA = pulNextCSA[ 0 ]; + pxTailCSA = pulNextCSA[ 0 ]; /* Update the local pointer to the CSA. */ - pulNextCSA = portCSA_TO_ADDRESS( pxTailCSA ); + pulNextCSA = portCSA_TO_ADDRESS( pxTailCSA ); } _disable(); { /* Look up the current free CSA head. */ _dsync(); - pxFreeCSA = __MFCR( $FCX ); + pxFreeCSA = __MFCR( $FCX ); /* Join the current Free onto the Tail of what is being reclaimed. */ portCSA_TO_ADDRESS( pxTailCSA )[ 0 ] = pxFreeCSA; @@ -444,7 +445,7 @@ void vPortEndScheduler( void ) static void prvTrapYield( int iTrapIdentification ) { uint32_t * pxUpperCSA = NULL; - uint32_t xUpperCSA = 0UL; + uint32_t xUpperCSA = 0UL; extern volatile uint32_t * pxCurrentTCB; switch( iTrapIdentification ) @@ -472,11 +473,11 @@ static void prvTrapYield( int iTrapIdentification ) * enabled/disabled. */ _disable(); _dsync(); - xUpperCSA = __MFCR( $PCXI ); - pxUpperCSA = portCSA_TO_ADDRESS( xUpperCSA ); - *pxCurrentTCB = pxUpperCSA[ 0 ]; + xUpperCSA = __MFCR( $PCXI ); + pxUpperCSA = portCSA_TO_ADDRESS( xUpperCSA ); + *pxCurrentTCB = pxUpperCSA[ 0 ]; vTaskSwitchContext(); - pxUpperCSA[ 0 ] = *pxCurrentTCB; + pxUpperCSA[ 0 ] = *pxCurrentTCB; CPU_SRC0.bits.SETR = 0; _isync(); break; @@ -492,7 +493,7 @@ static void prvTrapYield( int iTrapIdentification ) static void prvInterruptYield( int iId ) { uint32_t * pxUpperCSA = NULL; - uint32_t xUpperCSA = 0UL; + uint32_t xUpperCSA = 0UL; extern volatile uint32_t * pxCurrentTCB; /* Just to remove compiler warnings. */ @@ -519,11 +520,11 @@ static void prvInterruptYield( int iId ) * enabled/disabled. */ _disable(); _dsync(); - xUpperCSA = __MFCR( $PCXI ); - pxUpperCSA = portCSA_TO_ADDRESS( xUpperCSA ); - *pxCurrentTCB = pxUpperCSA[ 0 ]; + xUpperCSA = __MFCR( $PCXI ); + pxUpperCSA = portCSA_TO_ADDRESS( xUpperCSA ); + *pxCurrentTCB = pxUpperCSA[ 0 ]; vTaskSwitchContext(); - pxUpperCSA[ 0 ] = *pxCurrentTCB; + pxUpperCSA[ 0 ] = *pxCurrentTCB; CPU_SRC0.bits.SETR = 0; _isync(); } diff --git a/portable/GCC/TriCore_1782/portmacro.h b/portable/GCC/TriCore_1782/portmacro.h index 3ac22ab4e..4feea70b7 100644 --- a/portable/GCC/TriCore_1782/portmacro.h +++ b/portable/GCC/TriCore_1782/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H @@ -113,7 +114,7 @@ { \ uint32_t ulICR; \ _disable(); \ - ulICR = __MFCR( $ICR ); /* Get current ICR value. */ \ + ulICR = __MFCR( $ICR ); /* Get current ICR value. */ \ ulICR &= ~portCCPN_MASK; /* Clear down mask bits. */ \ ulICR |= configMAX_SYSCALL_INTERRUPT_PRIORITY; /* Set mask bits to required priority mask. */ \ _mtcr( $ICR, ulICR ); /* Write back updated ICR. */ \ @@ -126,7 +127,7 @@ { \ uint32_t ulICR; \ _disable(); \ - ulICR = __MFCR( $ICR ); /* Get current ICR value. */ \ + ulICR = __MFCR( $ICR ); /* Get current ICR value. */ \ ulICR &= ~portCCPN_MASK; /* Clear down mask bits. */ \ _mtcr( $ICR, ulICR ); /* Write back updated ICR. */ \ _isync(); \ @@ -138,7 +139,7 @@ { \ uint32_t ulICR; \ _disable(); \ - ulICR = __MFCR( $ICR ); /* Get current ICR value. */ \ + ulICR = __MFCR( $ICR ); /* Get current ICR value. */ \ ulICR &= ~portCCPN_MASK; /* Clear down mask bits. */ \ ulICR |= uxSavedMaskValue; /* Set mask bits to previously saved mask value. */ \ _mtcr( $ICR, ulICR ); /* Write back updated ICR. */ \ diff --git a/portable/GCC/TriCore_1782/porttrap.c b/portable/GCC/TriCore_1782/porttrap.c index a1f709a14..94e5eae1c 100644 --- a/portable/GCC/TriCore_1782/porttrap.c +++ b/portable/GCC/TriCore_1782/porttrap.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Kernel includes. */ diff --git a/portable/IAR/78K0R/ISR_Support.h b/portable/IAR/78K0R/ISR_Support.h index 57c063c83..38f45d61f 100644 --- a/portable/IAR/78K0R/ISR_Support.h +++ b/portable/IAR/78K0R/ISR_Support.h @@ -22,6 +22,7 @@ * ; * http://www.FreeRTOS.org * ; * http://aws.amazon.com/freertos * ; * + * ; * 1 tab == 4 spaces! * ; */ #include "FreeRTOSConfig.h" @@ -42,7 +43,7 @@ Saves the context of the general purpose registers, CS and ES( only in far ; memory mode ) registers the usCriticalNesting Value and the Stack Pointer ; -of the active Task onto the task stack +of the active Task onto the task stack ; ------------------------------------------------------------------------------ portSAVE_CONTEXT MACRO @@ -50,19 +51,19 @@ portSAVE_CONTEXT MACRO PUSH AX; Save AX Register to stack. PUSH HL -MOV A, CS; +MOV A, CS; Save CS register. - XCH A, X + XCH A, X MOV A, ES; Save ES register. PUSH AX -PUSH DE; +PUSH DE; Save the remaining general purpose registers. PUSH BC -MOVW AX, usCriticalNesting; +MOVW AX, usCriticalNesting; Save the usCriticalNesting value. PUSH AX -MOVW AX, pxCurrentTCB; +MOVW AX, pxCurrentTCB; Save the Stack pointer. MOVW HL, AX MOVW AX, SP @@ -74,13 +75,13 @@ MOVW AX, SP ; ------------------------------------------------------------------------------ ; -portRESTORE_CONTEXT MACRO +portRESTORE_CONTEXT MACRO ; Restores the task Stack Pointer then use this to restore usCriticalNesting, ; -general purpose registers and the CS and ES( only in far memory mode ) +general purpose registers and the CS and ES( only in far memory mode ) ; -of the selected task from the task stack +of the selected task from the task stack ; ------------------------------------------------------------------------------ portRESTORE_CONTEXT MACRO @@ -95,16 +96,16 @@ Restore usCriticalNesting value. POP BC; Restore the necessary general purpose registers. POP DE -POP AX; +POP AX; Restore the ES register. - MOV ES, A + MOV ES, A XCH A, X; Restore the CS register. - MOV CS, A + MOV CS, A POP HL; Restore general purpose register HL. - POP AX; + POP AX; Restore AX. - ENDM + ENDM ; ------------------------------------------------------------------------------ diff --git a/portable/IAR/78K0R/port.c b/portable/IAR/78K0R/port.c index 396ba5c38..50d454d67 100644 --- a/portable/IAR/78K0R/port.c +++ b/portable/IAR/78K0R/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Standard includes. */ @@ -93,8 +94,8 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, pxTopOfStack--; /* Write in the parameter value. */ - pulLocal = ( uint32_t * ) pxTopOfStack; - *pulLocal = ( uint32_t ) pvParameters; + pulLocal = ( uint32_t * ) pxTopOfStack; + *pulLocal = ( uint32_t ) pvParameters; pxTopOfStack--; /* These values are just spacers. The return address of the function @@ -109,8 +110,8 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, pxTopOfStack--; /* Task function start address combined with the PSW. */ - pulLocal = ( uint32_t * ) pxTopOfStack; - *pulLocal = ( ( ( uint32_t ) pxCode ) | ( portPSW << 24UL ) ); + pulLocal = ( uint32_t * ) pxTopOfStack; + *pulLocal = ( ( ( uint32_t ) pxCode ) | ( portPSW << 24UL ) ); pxTopOfStack--; /* An initial value for the AX register. */ @@ -125,8 +126,8 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, pxTopOfStack--; /* Task function start address combined with the PSW. */ - pulLocal = ( uint32_t * ) pxTopOfStack; - *pulLocal = ( ( ( uint32_t ) pxCode ) | ( portPSW << 24UL ) ); + pulLocal = ( uint32_t * ) pxTopOfStack; + *pulLocal = ( ( ( uint32_t ) pxCode ) | ( portPSW << 24UL ) ); pxTopOfStack--; /* The parameter is passed in AX. */ @@ -185,41 +186,41 @@ static void prvSetupTimerInterrupt( void ) /* Setup channel 5 of the TAU to generate the tick interrupt. */ /* First the Timer Array Unit has to be enabled. */ - TAU0EN = 1; + TAU0EN = 1; /* To configure the Timer Array Unit all Channels have to first be stopped. */ - TT0 = 0xff; + TT0 = 0xff; /* Interrupt of Timer Array Unit Channel 5 is disabled to set the interrupt * priority. */ - TMMK05 = 1; + TMMK05 = 1; /* Clear Timer Array Unit Channel 5 interrupt flag. */ - TMIF05 = 0; + TMIF05 = 0; /* Set Timer Array Unit Channel 5 interrupt priority */ TMPR005 = 0; TMPR105 = 0; /* Set Timer Array Unit Channel 5 Mode as interval timer. */ - TMR05 = 0x0000; + TMR05 = 0x0000; /* Set the compare match value according to the tick rate we want. */ - TDR05 = ( TickType_t ) ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ); + TDR05 = ( TickType_t ) ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ); /* Set Timer Array Unit Channel 5 output mode */ - TOM0 &= ~0x0020; + TOM0 &= ~0x0020; /* Set Timer Array Unit Channel 5 output level */ - TOL0 &= ~0x0020; + TOL0 &= ~0x0020; /* Set Timer Array Unit Channel 5 output enable */ - TOE0 &= ~0x0020; + TOE0 &= ~0x0020; /* Interrupt of Timer Array Unit Channel 5 enabled */ - TMMK05 = 0; + TMMK05 = 0; /* Start Timer Array Unit Channel 5.*/ - TS0 |= 0x0020; + TS0 |= 0x0020; } /*-----------------------------------------------------------*/ diff --git a/portable/IAR/78K0R/portmacro.h b/portable/IAR/78K0R/portmacro.h index 61d91dd96..a30323bc6 100644 --- a/portable/IAR/78K0R/portmacro.h +++ b/portable/IAR/78K0R/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/IAR/ARM_CA5_No_GIC/port.c b/portable/IAR/ARM_CA5_No_GIC/port.c index 4f149913e..38f7bb3c0 100644 --- a/portable/IAR/ARM_CA5_No_GIC/port.c +++ b/portable/IAR/ARM_CA5_No_GIC/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* IAR includes. */ @@ -89,18 +90,18 @@ static void prvTaskExitError( void ); * a non zero value to ensure interrupts don't inadvertently become unmasked before * the scheduler starts. As it is stored as part of the task context it will * automatically be set to 0 when the first task is started. */ -volatile uint32_t ulCriticalNesting = 9999UL; +volatile uint32_t ulCriticalNesting = 9999UL; /* Saved as part of the task context. If ulPortTaskHasFPUContext is non-zero * then a floating point context must be saved and restored for the task. */ -uint32_t ulPortTaskHasFPUContext = pdFALSE; +uint32_t ulPortTaskHasFPUContext = pdFALSE; /* Set to 1 to pend a context switch from an ISR. */ -uint32_t ulPortYieldRequired = pdFALSE; +uint32_t ulPortYieldRequired = pdFALSE; /* Counts the interrupt nesting depth. A context switch is only performed if * if the nesting depth is 0. */ -uint32_t ulPortInterruptNesting = 0UL; +uint32_t ulPortInterruptNesting = 0UL; /*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CA5_No_GIC/portASM.h b/portable/IAR/ARM_CA5_No_GIC/portASM.h index 3c2e1de41..ebc9f01db 100644 --- a/portable/IAR/ARM_CA5_No_GIC/portASM.h +++ b/portable/IAR/ARM_CA5_No_GIC/portASM.h @@ -22,6 +22,7 @@ * ; * http://www.FreeRTOS.org * ; * http://aws.amazon.com/freertos * ; * + * ; * 1 tab == 4 spaces! * ; */ EXTERN vTaskSwitchContext @@ -33,12 +34,12 @@ EXTERN ulAsmAPIPriorityMask portSAVE_CONTEXT macro ; -Save the LR and SPSR onto the system mode stack before switching to +Save the LR and SPSR onto the system mode stack before switching to ; system mode to save the remaining system mode registers -SRSDB sp !, # SYS_MODE - CPS # SYS_MODE - PUSH { R0 - R12, R14 } +SRSDB sp !, # SYS_MODE + CPS # SYS_MODE + PUSH { R0 - R12, R14 } ; Push the critical nesting count @@ -65,7 +66,7 @@ PUSHNE { R1 } ; Save ulPortTaskHasFPUContext itself - PUSH { R3 } + PUSH { R3 } ; Save the stack pointer in the TCB @@ -81,8 +82,8 @@ portRESTORE_CONTEXT macro ; Set the SP to point to the stack of the task being restored. - LDR R0, = pxCurrentTCB - LDR R1, [ R0 ] + LDR R0, = pxCurrentTCB + LDR R1, [ R0 ] LDR SP, [ R1 ] ; @@ -121,6 +122,6 @@ POP Return to the task code, loading CPSR on the way.CPSR has the interrupt ; enable bit set appropriately for the task about to execute. - RFEIA sp ! + RFEIA sp ! endm diff --git a/portable/IAR/ARM_CA5_No_GIC/portmacro.h b/portable/IAR/ARM_CA5_No_GIC/portmacro.h index 183c2ba98..4c5584cd6 100644 --- a/portable/IAR/ARM_CA5_No_GIC/portmacro.h +++ b/portable/IAR/ARM_CA5_No_GIC/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H @@ -138,7 +139,7 @@ /*-----------------------------------------------------------*/ - #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __CLZ( uxReadyPriorities ) ) + #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __CLZ( uxReadyPriorities ) ) #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ diff --git a/portable/IAR/ARM_CA9/port.c b/portable/IAR/ARM_CA9/port.c index e7fc160e0..416be8e0e 100644 --- a/portable/IAR/ARM_CA9/port.c +++ b/portable/IAR/ARM_CA9/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Standard includes. */ @@ -139,18 +140,18 @@ static void prvTaskExitError( void ); * a non zero value to ensure interrupts don't inadvertently become unmasked before * the scheduler starts. As it is stored as part of the task context it will * automatically be set to 0 when the first task is started. */ -volatile uint32_t ulCriticalNesting = 9999UL; +volatile uint32_t ulCriticalNesting = 9999UL; /* Saved as part of the task context. If ulPortTaskHasFPUContext is non-zero * then a floating point context must be saved and restored for the task. */ -uint32_t ulPortTaskHasFPUContext = pdFALSE; +uint32_t ulPortTaskHasFPUContext = pdFALSE; /* Set to 1 to pend a context switch from an ISR. */ -uint32_t ulPortYieldRequired = pdFALSE; +uint32_t ulPortYieldRequired = pdFALSE; /* Counts the interrupt nesting depth. A context switch is only performed if * if the nesting depth is 0. */ -uint32_t ulPortInterruptNesting = 0UL; +uint32_t ulPortInterruptNesting = 0UL; /*-----------------------------------------------------------*/ @@ -392,7 +393,7 @@ uint32_t ulPortSetInterruptMask( void ) } else { - ulReturn = pdFALSE; + ulReturn = pdFALSE; portICCPMR_PRIORITY_MASK_REGISTER = ( uint32_t ) ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ); __asm( "DSB \n" "ISB \n"); diff --git a/portable/IAR/ARM_CA9/portASM.h b/portable/IAR/ARM_CA9/portASM.h index 124c6ddc9..827b01f90 100644 --- a/portable/IAR/ARM_CA9/portASM.h +++ b/portable/IAR/ARM_CA9/portASM.h @@ -22,6 +22,7 @@ * ; * http://www.FreeRTOS.org * ; * http://aws.amazon.com/freertos * ; * + * ; * 1 tab == 4 spaces! * ; */ EXTERN vTaskSwitchContext @@ -33,12 +34,12 @@ EXTERN ulAsmAPIPriorityMask portSAVE_CONTEXT macro ; -Save the LR and SPSR onto the system mode stack before switching to +Save the LR and SPSR onto the system mode stack before switching to ; system mode to save the remaining system mode registers -SRSDB sp !, # SYS_MODE - CPS # SYS_MODE - PUSH { R0 - R12, R14 } +SRSDB sp !, # SYS_MODE + CPS # SYS_MODE + PUSH { R0 - R12, R14 } ; Push the critical nesting count @@ -63,7 +64,7 @@ PUSHNE { R1 } ; Save ulPortTaskHasFPUContext itself - PUSH { R3 } + PUSH { R3 } ; Save the stack pointer in the TCB @@ -79,8 +80,8 @@ portRESTORE_CONTEXT macro ; Set the SP to point to the stack of the task being restored. - LDR R0, = pxCurrentTCB - LDR R1, [ R0 ] + LDR R0, = pxCurrentTCB + LDR R1, [ R0 ] LDR SP, [ R1 ] ; diff --git a/portable/IAR/ARM_CA9/portmacro.h b/portable/IAR/ARM_CA9/portmacro.h index 272f30edc..343fffcbc 100644 --- a/portable/IAR/ARM_CA9/portmacro.h +++ b/portable/IAR/ARM_CA9/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H @@ -143,7 +144,7 @@ /*-----------------------------------------------------------*/ - #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __CLZ( uxReadyPriorities ) ) + #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __CLZ( uxReadyPriorities ) ) #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ diff --git a/portable/IAR/ARM_CM0/port.c b/portable/IAR/ARM_CM0/port.c index 52703a356..6a43d18b3 100644 --- a/portable/IAR/ARM_CM0/port.c +++ b/portable/IAR/ARM_CM0/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -61,7 +62,7 @@ /* Each task maintains its own interrupt status in the critical nesting * variable. */ -static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; +static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; /* The systick is a 24-bit counter. */ #define portMAX_24_BIT_NUMBER ( 0xffffffUL ) @@ -75,7 +76,7 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; /* The number of SysTick increments that make up one tick period. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t ulTimerCountsForOneTick = 0; + static uint32_t ulTimerCountsForOneTick = 0; #endif /* configUSE_TICKLESS_IDLE */ /* The maximum number of tick periods that can be suppressed is limited by the @@ -87,7 +88,7 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; /* Compensate for the CPU cycles that pass while the SysTick is stopped (low * power functionality only. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t ulStoppedTimerCompensation = 0; + static uint32_t ulStoppedTimerCompensation = 0; #endif /* configUSE_TICKLESS_IDLE */ /* @@ -169,7 +170,7 @@ BaseType_t xPortStartScheduler( void ) vPortSetupTimerInterrupt(); /* Initialise the critical nesting count ready for the first task. */ - uxCriticalNesting = 0; + uxCriticalNesting = 0; /* Start the first task. */ vPortStartFirstTask(); @@ -246,19 +247,19 @@ void vPortSetupTimerInterrupt( void ) /* Calculate the constants required to configure the tick interrupt. */ #if ( configUSE_TICKLESS_IDLE == 1 ) { - ulTimerCountsForOneTick = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ); + ulTimerCountsForOneTick = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ); xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick; - ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR; + ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR; } #endif /* configUSE_TICKLESS_IDLE */ /* Stop and reset the SysTick. */ - portNVIC_SYSTICK_CTRL_REG = 0UL; + portNVIC_SYSTICK_CTRL_REG = 0UL; portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Configure SysTick to interrupt at the requested rate. */ - portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; - portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; + portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT; } /*-----------------------------------------------------------*/ @@ -266,7 +267,7 @@ void vPortSetupTimerInterrupt( void ) __weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ) { - uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; + uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; TickType_t xModifiableIdleTime; /* Make sure the SysTick reload value does not overflow the counter. */ @@ -284,7 +285,7 @@ void vPortSetupTimerInterrupt( void ) /* Calculate the reload value required to wait xExpectedIdleTime * tick periods. -1 is used because this code will execute part way * through one of the tick periods. */ - ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); + ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); if( ulReloadValue > ulStoppedTimerCompensation ) { @@ -303,14 +304,14 @@ void vPortSetupTimerInterrupt( void ) { /* Restart from whatever is left in the count register to complete * this tick period. */ - portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; + portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; /* Restart SysTick. */ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Reset the reload register to the value required for normal tick * periods. */ - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Re-enable interrupts - see comments above __disable_interrupt() * call above. */ @@ -319,21 +320,21 @@ void vPortSetupTimerInterrupt( void ) else { /* Set the new reload value. */ - portNVIC_SYSTICK_LOAD_REG = ulReloadValue; + portNVIC_SYSTICK_LOAD_REG = ulReloadValue; /* Clear the SysTick count flag and set the count value back to * zero. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Restart SysTick. */ - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can * set its parameter to 0 to indicate that its implementation contains * its own wait for interrupt or wait for event instruction, and so wfi * should not be executed again. However, the original expected idle * time variable must remain unmodified, so a copy is taken. */ - xModifiableIdleTime = xExpectedIdleTime; + xModifiableIdleTime = xExpectedIdleTime; configPRE_SLEEP_PROCESSING( xModifiableIdleTime ); if( xModifiableIdleTime > 0 ) @@ -367,7 +368,7 @@ void vPortSetupTimerInterrupt( void ) * be, but using the tickless mode will inevitably result in some tiny * drift of the time maintained by the kernel with respect to calendar * time*/ - portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); /* Determine if the SysTick clock has already counted to zero and * been set back to the current reload value (the reload back being @@ -382,7 +383,7 @@ void vPortSetupTimerInterrupt( void ) * reloaded with ulReloadValue. Reset the * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick * period. */ - ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); + ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); /* Don't allow a tiny value, or values that have somehow * underflowed because the post sleep hook did something @@ -397,7 +398,7 @@ void vPortSetupTimerInterrupt( void ) /* As the pending tick will be processed as soon as this * function exits, the tick value maintained by the tick is stepped * forward by one less than the time spent waiting. */ - ulCompleteTickPeriods = xExpectedIdleTime - 1UL; + ulCompleteTickPeriods = xExpectedIdleTime - 1UL; } else { @@ -409,20 +410,20 @@ void vPortSetupTimerInterrupt( void ) /* How many complete tick periods passed while the processor * was waiting? */ - ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; + ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; /* The reload value is set to whatever fraction of a single tick * period remains. */ - portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; + portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; } /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard * value. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; vTaskStepTick( ulCompleteTickPeriods ); - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Exit with interrpts enabled. */ __enable_interrupt(); diff --git a/portable/IAR/ARM_CM0/portmacro.h b/portable/IAR/ARM_CM0/portmacro.h index 35afcd38a..ced7a8109 100644 --- a/portable/IAR/ARM_CM0/portmacro.h +++ b/portable/IAR/ARM_CM0/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ diff --git a/portable/IAR/ARM_CM23/non_secure/port.c b/portable/IAR/ARM_CM23/non_secure/port.c index 37f5d4812..3e42faba0 100644 --- a/portable/IAR/ARM_CM23/non_secure/port.c +++ b/portable/IAR/ARM_CM23/non_secure/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining @@ -349,7 +350,7 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV * @brief Each task maintains its own interrupt status in the critical nesting * variable. */ -static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL; +static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL; #if ( configENABLE_TRUSTZONE == 1 ) @@ -365,26 +366,26 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU /** * @brief The number of SysTick increments that make up one tick period. */ - static uint32_t ulTimerCountsForOneTick = 0; + static uint32_t ulTimerCountsForOneTick = 0; /** * @brief The maximum number of tick periods that can be suppressed is * limited by the 24 bit resolution of the SysTick timer. */ - static uint32_t xMaximumPossibleSuppressedTicks = 0; + static uint32_t xMaximumPossibleSuppressedTicks = 0; /** * @brief Compensate for the CPU cycles that pass while the SysTick is * stopped (low power functionality only). */ - static uint32_t ulStoppedTimerCompensation = 0; + static uint32_t ulStoppedTimerCompensation = 0; #endif /* configUSE_TICKLESS_IDLE */ /*-----------------------------------------------------------*/ #if ( configUSE_TICKLESS_IDLE == 1 ) __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ) { - uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; + uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; TickType_t xModifiableIdleTime; /* Make sure the SysTick reload value does not overflow the counter. */ @@ -402,7 +403,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU /* Calculate the reload value required to wait xExpectedIdleTime * tick periods. -1 is used because this code will execute part way * through one of the tick periods. */ - ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); + ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); if( ulReloadValue > ulStoppedTimerCompensation ) { @@ -421,14 +422,14 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU { /* Restart from whatever is left in the count register to complete * this tick period. */ - portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; + portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; /* Restart SysTick. */ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Reset the reload register to the value required for normal tick * periods. */ - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Re-enable interrupts - see comments above the cpsid instruction() * above. */ @@ -437,14 +438,14 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU else { /* Set the new reload value. */ - portNVIC_SYSTICK_LOAD_REG = ulReloadValue; + portNVIC_SYSTICK_LOAD_REG = ulReloadValue; /* Clear the SysTick count flag and set the count value back to * zero. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Restart SysTick. */ - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can * set its parameter to 0 to indicate that its implementation @@ -452,7 +453,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU * instruction, and so wfi should not be executed again. However, * the original expected idle time variable must remain unmodified, * so a copy is taken. */ - xModifiableIdleTime = xExpectedIdleTime; + xModifiableIdleTime = xExpectedIdleTime; configPRE_SLEEP_PROCESSING( xModifiableIdleTime ); if( xModifiableIdleTime > 0 ) @@ -486,7 +487,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU * best it can be, but using the tickless mode will inevitably * result in some tiny drift of the time maintained by the kernel * with respect to calendar time*/ - portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); /* Determine if the SysTick clock has already counted to zero and * been set back to the current reload value (the reload back being @@ -501,7 +502,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU * reloaded with ulReloadValue. Reset the * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick * period. */ - ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); + ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); /* Don't allow a tiny value, or values that have somehow * underflowed because the post sleep hook did something @@ -516,7 +517,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU /* As the pending tick will be processed as soon as this * function exits, the tick value maintained by the tick is * stepped forward by one less than the time spent waiting. */ - ulCompleteTickPeriods = xExpectedIdleTime - 1UL; + ulCompleteTickPeriods = xExpectedIdleTime - 1UL; } else { @@ -528,20 +529,20 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU /* How many complete tick periods passed while the processor * was waiting? */ - ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; + ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; /* The reload value is set to whatever fraction of a single tick * period remains. */ - portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; + portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; } /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard * value. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; vTaskStepTick( ulCompleteTickPeriods ); - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Exit with interrupts enabled. */ __asm volatile ( "cpsie i" ::: "memory" ); @@ -555,19 +556,19 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FU /* Calculate the constants required to configure the tick interrupt. */ #if ( configUSE_TICKLESS_IDLE == 1 ) { - ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); + ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick; - ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); + ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); } #endif /* configUSE_TICKLESS_IDLE */ /* Stop and reset the SysTick. */ - portNVIC_SYSTICK_CTRL_REG = 0UL; + portNVIC_SYSTICK_CTRL_REG = 0UL; portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Configure SysTick to interrupt at the requested rate. */ - portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; - portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; + portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT; } /*-----------------------------------------------------------*/ @@ -611,72 +612,72 @@ static void prvTaskExitError( void ) extern uint32_t * __unprivileged_flash_end__; extern uint32_t * __privileged_sram_start__; extern uint32_t * __privileged_sram_end__; - #else /* if defined( __ARMCC_VERSION ) */ + #else /* if defined( __ARMCC_VERSION ) */ /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __privileged_functions_start__[]; - extern uint32_t __privileged_functions_end__[]; - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - extern uint32_t __unprivileged_flash_start__[]; - extern uint32_t __unprivileged_flash_end__[]; - extern uint32_t __privileged_sram_start__[]; - extern uint32_t __privileged_sram_end__[]; + extern uint32_t __privileged_functions_start__[]; + extern uint32_t __privileged_functions_end__[]; + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; + extern uint32_t __unprivileged_flash_start__[]; + extern uint32_t __unprivileged_flash_end__[]; + extern uint32_t __privileged_sram_start__[]; + extern uint32_t __privileged_sram_end__[]; #endif /* defined( __ARMCC_VERSION ) */ /* Check that the MPU is present. */ if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE ) { /* MAIR0 - Index 0. */ - portMPU_MAIR0_REG |= ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK ); + portMPU_MAIR0_REG |= ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK ); /* MAIR0 - Index 1. */ - portMPU_MAIR0_REG |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK ); + portMPU_MAIR0_REG |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK ); /* Setup privileged flash as Read Only so that privileged tasks can * read it but not modify. */ - portMPU_RNR_REG = portPRIVILEGED_FLASH_REGION; - portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | - ( portMPU_REGION_NON_SHAREABLE ) | - ( portMPU_REGION_PRIVILEGED_READ_ONLY ); - portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_functions_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | - ( portMPU_RLAR_ATTR_INDEX0 ) | - ( portMPU_RLAR_REGION_ENABLE ); + portMPU_RNR_REG = portPRIVILEGED_FLASH_REGION; + portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | + ( portMPU_REGION_NON_SHAREABLE ) | + ( portMPU_REGION_PRIVILEGED_READ_ONLY ); + portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_functions_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | + ( portMPU_RLAR_ATTR_INDEX0 ) | + ( portMPU_RLAR_REGION_ENABLE ); /* Setup unprivileged flash as Read Only by both privileged and * unprivileged tasks. All tasks can read it but no-one can modify. */ - portMPU_RNR_REG = portUNPRIVILEGED_FLASH_REGION; - portMPU_RBAR_REG = ( ( ( uint32_t ) __unprivileged_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | - ( portMPU_REGION_NON_SHAREABLE ) | - ( portMPU_REGION_READ_ONLY ); - portMPU_RLAR_REG = ( ( ( uint32_t ) __unprivileged_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | - ( portMPU_RLAR_ATTR_INDEX0 ) | - ( portMPU_RLAR_REGION_ENABLE ); + portMPU_RNR_REG = portUNPRIVILEGED_FLASH_REGION; + portMPU_RBAR_REG = ( ( ( uint32_t ) __unprivileged_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | + ( portMPU_REGION_NON_SHAREABLE ) | + ( portMPU_REGION_READ_ONLY ); + portMPU_RLAR_REG = ( ( ( uint32_t ) __unprivileged_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | + ( portMPU_RLAR_ATTR_INDEX0 ) | + ( portMPU_RLAR_REGION_ENABLE ); /* Setup unprivileged syscalls flash as Read Only by both privileged * and unprivileged tasks. All tasks can read it but no-one can modify. */ - portMPU_RNR_REG = portUNPRIVILEGED_SYSCALLS_REGION; - portMPU_RBAR_REG = ( ( ( uint32_t ) __syscalls_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | - ( portMPU_REGION_NON_SHAREABLE ) | - ( portMPU_REGION_READ_ONLY ); - portMPU_RLAR_REG = ( ( ( uint32_t ) __syscalls_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | - ( portMPU_RLAR_ATTR_INDEX0 ) | - ( portMPU_RLAR_REGION_ENABLE ); + portMPU_RNR_REG = portUNPRIVILEGED_SYSCALLS_REGION; + portMPU_RBAR_REG = ( ( ( uint32_t ) __syscalls_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | + ( portMPU_REGION_NON_SHAREABLE ) | + ( portMPU_REGION_READ_ONLY ); + portMPU_RLAR_REG = ( ( ( uint32_t ) __syscalls_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | + ( portMPU_RLAR_ATTR_INDEX0 ) | + ( portMPU_RLAR_REGION_ENABLE ); /* Setup RAM containing kernel data for privileged access only. */ - portMPU_RNR_REG = portPRIVILEGED_RAM_REGION; - portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_sram_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | - ( portMPU_REGION_NON_SHAREABLE ) | - ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | - ( portMPU_REGION_EXECUTE_NEVER ); - portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_sram_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | - ( portMPU_RLAR_ATTR_INDEX0 ) | - ( portMPU_RLAR_REGION_ENABLE ); + portMPU_RNR_REG = portPRIVILEGED_RAM_REGION; + portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_sram_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | + ( portMPU_REGION_NON_SHAREABLE ) | + ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | + ( portMPU_REGION_EXECUTE_NEVER ); + portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_sram_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | + ( portMPU_RLAR_ATTR_INDEX0 ) | + ( portMPU_RLAR_REGION_ENABLE ); /* Enable mem fault. */ portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT; /* Enable MPU with privileged background access i.e. unmapped * regions have privileged access. */ - portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT ); + portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT ); } } #endif /* configENABLE_MPU */ @@ -771,24 +772,24 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO extern uint32_t * __syscalls_flash_end__; #else /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; #endif /* defined( __ARMCC_VERSION ) */ #endif /* configENABLE_MPU */ - uint32_t ulPC; + uint32_t ulPC; #if ( configENABLE_TRUSTZONE == 1 ) - uint32_t ulR0; + uint32_t ulR0; #if ( configENABLE_MPU == 1 ) - uint32_t ulControl, ulIsTaskPrivileged; + uint32_t ulControl, ulIsTaskPrivileged; #endif /* configENABLE_MPU */ #endif /* configENABLE_TRUSTZONE */ uint8_t ucSVCNumber; /* Register are stored on the stack in the following order - R0, R1, R2, R3, * R12, LR, PC, xPSR. */ - ulPC = pulCallerStackAddress[ 6 ]; + ulPC = pulCallerStackAddress[ 6 ]; ucSVCNumber = ( ( uint8_t * ) ulPC )[ -2 ]; switch( ucSVCNumber ) @@ -801,22 +802,22 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO ulR0 = pulCallerStackAddress[ 0 ]; #if ( configENABLE_MPU == 1 ) - { - /* Read the CONTROL register value. */ - __asm volatile ( "mrs %0, control" : "=r" ( ulControl ) ); + { + /* Read the CONTROL register value. */ + __asm volatile ( "mrs %0, control" : "=r" ( ulControl ) ); - /* The task that raised the SVC is privileged if Bit[0] - * in the CONTROL register is 0. */ - ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 ); + /* The task that raised the SVC is privileged if Bit[0] + * in the CONTROL register is 0. */ + ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 ); - /* Allocate and load a context for the secure task. */ - xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged ); - } - #else /* if ( configENABLE_MPU == 1 ) */ - { - /* Allocate and load a context for the secure task. */ - xSecureContext = SecureContext_AllocateContext( ulR0 ); - } + /* Allocate and load a context for the secure task. */ + xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged ); + } + #else /* if ( configENABLE_MPU == 1 ) */ + { + /* Allocate and load a context for the secure task. */ + xSecureContext = SecureContext_AllocateContext( ulR0 ); + } #endif /* configENABLE_MPU */ configASSERT( xSecureContext != NULL ); @@ -834,21 +835,21 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO case portSVC_START_SCHEDULER: #if ( configENABLE_TRUSTZONE == 1 ) - { - /* De-prioritize the non-secure exceptions so that the - * non-secure pendSV runs at the lowest priority. */ - SecureInit_DePrioritizeNSExceptions(); + { + /* De-prioritize the non-secure exceptions so that the + * non-secure pendSV runs at the lowest priority. */ + SecureInit_DePrioritizeNSExceptions(); - /* Initialize the secure context management system. */ - SecureContext_Init(); - } + /* Initialize the secure context management system. */ + SecureContext_Init(); + } #endif /* configENABLE_TRUSTZONE */ #if ( configENABLE_FPU == 1 ) - { - /* Setup the Floating Point Unit (FPU). */ - prvSetupFPU(); - } + { + /* Setup the Floating Point Unit (FPU). */ + prvSetupFPU(); + } #endif /* configENABLE_FPU */ /* Setup the context of the first task so that the first task starts @@ -881,12 +882,12 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO StackType_t * pxEndOfStack, TaskFunction_t pxCode, void * pvParameters, - BaseType_t xRunPrivileged ) /* PRIVILEGED_FUNCTION */ + BaseType_t xRunPrivileged ) /* PRIVILEGED_FUNCTION */ #else StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, StackType_t * pxEndOfStack, TaskFunction_t pxCode, - void * pvParameters ) /* PRIVILEGED_FUNCTION */ + void * pvParameters ) /* PRIVILEGED_FUNCTION */ #endif /* configENABLE_MPU */ { /* Simulate the stack frame as it would be created by a context switch @@ -1015,7 +1016,7 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */ vPortSetupTimerInterrupt(); /* Initialize the critical nesting count ready for the first task. */ - ulCriticalNesting = 0; + ulCriticalNesting = 0; /* Start the first task. */ vStartFirstTask(); @@ -1049,10 +1050,10 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ uint32_t ulStackDepth ) { uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber; - int32_t lIndex = 0; + int32_t lIndex = 0; /* Setup MAIR0. */ - xMPUSettings->ulMAIR0 = ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK ); + xMPUSettings->ulMAIR0 = ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK ); xMPUSettings->ulMAIR0 |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK ); /* This function is called automatically when the task is created - in @@ -1062,9 +1063,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ if( ulStackDepth > 0 ) { /* Define the region that allows access to the stack. */ - ulRegionStartAddress = ( ( uint32_t ) pxBottomOfStack ) & portMPU_RBAR_ADDRESS_MASK; - ulRegionEndAddress = ( uint32_t ) pxBottomOfStack + ( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) - 1; - ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; + ulRegionStartAddress = ( ( uint32_t ) pxBottomOfStack ) & portMPU_RBAR_ADDRESS_MASK; + ulRegionEndAddress = ( uint32_t ) pxBottomOfStack + ( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) - 1; + ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = ( ulRegionStartAddress ) | ( portMPU_REGION_NON_SHAREABLE ) | @@ -1087,9 +1088,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ /* Translate the generic region definition contained in xRegions * into the ARMv8 specific MPU settings that are then stored in * xMPUSettings. */ - ulRegionStartAddress = ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) & portMPU_RBAR_ADDRESS_MASK; - ulRegionEndAddress = ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1; - ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; + ulRegionStartAddress = ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) & portMPU_RBAR_ADDRESS_MASK; + ulRegionEndAddress = ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1; + ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; /* Start address. */ xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR = ( ulRegionStartAddress ) | @@ -1142,7 +1143,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ BaseType_t xPortIsInsideInterrupt( void ) { - uint32_t ulCurrentInterrupt; + uint32_t ulCurrentInterrupt; BaseType_t xReturn; /* Obtain the number of the currently executing interrupt. Interrupt Program diff --git a/portable/IAR/ARM_CM23/non_secure/portasm.h b/portable/IAR/ARM_CM23/non_secure/portasm.h index edb5bcfca..fdba1b177 100644 --- a/portable/IAR/ARM_CM23/non_secure/portasm.h +++ b/portable/IAR/ARM_CM23/non_secure/portasm.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef __PORT_ASM_H__ diff --git a/portable/IAR/ARM_CM23/non_secure/portmacro.h b/portable/IAR/ARM_CM23/non_secure/portmacro.h index 52cb22320..48e23e950 100644 --- a/portable/IAR/ARM_CM23/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM23/non_secure/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/IAR/ARM_CM23/secure/secure_context.c b/portable/IAR/ARM_CM23/secure/secure_context.c index 04f1e5622..5608c7240 100644 --- a/portable/IAR/ARM_CM23/secure/secure_context.c +++ b/portable/IAR/ARM_CM23/secure/secure_context.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Secure context includes. */ @@ -101,12 +102,12 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize ) #endif /* configENABLE_MPU */ { - uint8_t * pucStackMemory = NULL; - uint32_t ulIPSR; - SecureContextHandle_t xSecureContextHandle = NULL; + uint8_t * pucStackMemory = NULL; + uint32_t ulIPSR; + SecureContextHandle_t xSecureContextHandle = NULL; #if ( configENABLE_MPU == 1 ) - uint32_t * pulCurrentStackPointer = NULL; + uint32_t * pulCurrentStackPointer = NULL; #endif /* configENABLE_MPU */ /* Read the Interrupt Program Status Register (IPSR) value. */ @@ -143,7 +144,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) /* Store the correct CONTROL value for the task on the stack. * This value is programmed in the CONTROL register on * context switch. */ - pulCurrentStackPointer = ( uint32_t * ) xSecureContextHandle->pucStackStart; + pulCurrentStackPointer = ( uint32_t * ) xSecureContextHandle->pucStackStart; pulCurrentStackPointer--; if( ulIsTaskPrivileged ) diff --git a/portable/IAR/ARM_CM23/secure/secure_context.h b/portable/IAR/ARM_CM23/secure/secure_context.h index a5d2f2967..62ef6bb94 100644 --- a/portable/IAR/ARM_CM23/secure/secure_context.h +++ b/portable/IAR/ARM_CM23/secure/secure_context.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef __SECURE_CONTEXT_H__ diff --git a/portable/IAR/ARM_CM23/secure/secure_context_port.c b/portable/IAR/ARM_CM23/secure/secure_context_port.c index 24e3fef66..e2fb5ce74 100644 --- a/portable/IAR/ARM_CM23/secure/secure_context_port.c +++ b/portable/IAR/ARM_CM23/secure/secure_context_port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Secure context includes. */ diff --git a/portable/IAR/ARM_CM23/secure/secure_heap.c b/portable/IAR/ARM_CM23/secure/secure_heap.c index b71f06da9..76b6ee1c3 100644 --- a/portable/IAR/ARM_CM23/secure/secure_heap.c +++ b/portable/IAR/ARM_CM23/secure/secure_heap.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Standard includes. */ @@ -115,7 +116,7 @@ static BlockLink_t xStart, * pxEnd = NULL; * @brief Keeps track of the number of free bytes remaining, but says nothing * about fragmentation. */ -static size_t xFreeBytesRemaining = 0U; +static size_t xFreeBytesRemaining = 0U; static size_t xMinimumEverFreeBytesRemaining = 0U; /** @@ -125,61 +126,61 @@ static size_t xMinimumEverFreeBytesRemaining = 0U; * then the block belongs to the application. When the bit is free the block is * still part of the free heap space. */ -static size_t xBlockAllocatedBit = 0; +static size_t xBlockAllocatedBit = 0; /*-----------------------------------------------------------*/ static void prvHeapInit( void ) { BlockLink_t * pxFirstFreeBlock; - uint8_t * pucAlignedHeap; - size_t uxAddress; - size_t xTotalHeapSize = secureconfigTOTAL_HEAP_SIZE; + uint8_t * pucAlignedHeap; + size_t uxAddress; + size_t xTotalHeapSize = secureconfigTOTAL_HEAP_SIZE; /* Ensure the heap starts on a correctly aligned boundary. */ - uxAddress = ( size_t ) ucHeap; + uxAddress = ( size_t ) ucHeap; if( ( uxAddress & secureportBYTE_ALIGNMENT_MASK ) != 0 ) { - uxAddress += ( secureportBYTE_ALIGNMENT - 1 ); - uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK ); + uxAddress += ( secureportBYTE_ALIGNMENT - 1 ); + uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK ); xTotalHeapSize -= uxAddress - ( size_t ) ucHeap; } - pucAlignedHeap = ( uint8_t * ) uxAddress; + pucAlignedHeap = ( uint8_t * ) uxAddress; /* xStart is used to hold a pointer to the first item in the list of free * blocks. The void cast is used to prevent compiler warnings. */ - xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap; - xStart.xBlockSize = ( size_t ) 0; + xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap; + xStart.xBlockSize = ( size_t ) 0; /* pxEnd is used to mark the end of the list of free blocks and is inserted * at the end of the heap space. */ - uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize; - uxAddress -= xHeapStructSize; - uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK ); - pxEnd = ( void * ) uxAddress; - pxEnd->xBlockSize = 0; - pxEnd->pxNextFreeBlock = NULL; + uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize; + uxAddress -= xHeapStructSize; + uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK ); + pxEnd = ( void * ) uxAddress; + pxEnd->xBlockSize = 0; + pxEnd->pxNextFreeBlock = NULL; /* To start with there is a single free block that is sized to take up the * entire heap space, minus the space taken by pxEnd. */ - pxFirstFreeBlock = ( void * ) pucAlignedHeap; - pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock; + pxFirstFreeBlock = ( void * ) pucAlignedHeap; + pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock; pxFirstFreeBlock->pxNextFreeBlock = pxEnd; /* Only one block exists - and it covers the entire usable heap space. */ - xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize; - xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize; + xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize; + xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize; /* Work out the position of the top bit in a size_t variable. */ - xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * secureheapBITS_PER_BYTE ) - 1 ); + xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * secureheapBITS_PER_BYTE ) - 1 ); } /*-----------------------------------------------------------*/ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert ) { BlockLink_t * pxIterator; - uint8_t * puc; + uint8_t * puc; /* Iterate through the list until a block is found that has a higher address * than the block being inserted. */ @@ -195,7 +196,7 @@ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert ) if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert ) { pxIterator->xBlockSize += pxBlockToInsert->xBlockSize; - pxBlockToInsert = pxIterator; + pxBlockToInsert = pxIterator; } else { @@ -211,7 +212,7 @@ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert ) if( pxIterator->pxNextFreeBlock != pxEnd ) { /* Form one big block from the two blocks. */ - pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize; + pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize; pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock; } else @@ -242,7 +243,7 @@ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert ) void * pvPortMalloc( size_t xWantedSize ) { BlockLink_t * pxBlock, * pxPreviousBlock, * pxNewBlockLink; - void * pvReturn = NULL; + void * pvReturn = NULL; /* If this is the first call to malloc then the heap will require * initialisation to setup the list of free blocks. */ @@ -290,12 +291,12 @@ void * pvPortMalloc( size_t xWantedSize ) /* Traverse the list from the start (lowest address) block until * one of adequate size is found. */ pxPreviousBlock = &xStart; - pxBlock = xStart.pxNextFreeBlock; + pxBlock = xStart.pxNextFreeBlock; while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) ) { pxPreviousBlock = pxBlock; - pxBlock = pxBlock->pxNextFreeBlock; + pxBlock = pxBlock->pxNextFreeBlock; } /* If the end marker was reached then a block of adequate size was @@ -304,7 +305,7 @@ void * pvPortMalloc( size_t xWantedSize ) { /* Return the memory space pointed to - jumping over the * BlockLink_t structure at its start. */ - pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize ); + pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize ); /* This block is being returned for use so must be taken out * of the list of free blocks. */ @@ -318,13 +319,13 @@ void * pvPortMalloc( size_t xWantedSize ) * block following the number of bytes requested. The void * cast is used to prevent byte alignment warnings from the * compiler. */ - pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize ); + pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize ); secureportASSERT( ( ( ( size_t ) pxNewBlockLink ) & secureportBYTE_ALIGNMENT_MASK ) == 0 ); /* Calculate the sizes of two blocks split from the single * block. */ pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize; - pxBlock->xBlockSize = xWantedSize; + pxBlock->xBlockSize = xWantedSize; /* Insert the new block into the list of free blocks. */ prvInsertBlockIntoFreeList( pxNewBlockLink ); @@ -334,7 +335,7 @@ void * pvPortMalloc( size_t xWantedSize ) mtCOVERAGE_TEST_MARKER(); } - xFreeBytesRemaining -= pxBlock->xBlockSize; + xFreeBytesRemaining -= pxBlock->xBlockSize; if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining ) { @@ -347,8 +348,8 @@ void * pvPortMalloc( size_t xWantedSize ) /* The block is being returned - it is allocated and owned by * the application and has no "next" block. */ - pxBlock->xBlockSize |= xBlockAllocatedBit; - pxBlock->pxNextFreeBlock = NULL; + pxBlock->xBlockSize |= xBlockAllocatedBit; + pxBlock->pxNextFreeBlock = NULL; } else { @@ -388,14 +389,14 @@ void * pvPortMalloc( size_t xWantedSize ) void vPortFree( void * pv ) { - uint8_t * puc = ( uint8_t * ) pv; + uint8_t * puc = ( uint8_t * ) pv; BlockLink_t * pxLink; if( pv != NULL ) { /* The memory being freed will have an BlockLink_t structure immediately * before it. */ - puc -= xHeapStructSize; + puc -= xHeapStructSize; /* This casting is to keep the compiler from issuing warnings. */ pxLink = ( void * ) puc; diff --git a/portable/IAR/ARM_CM23/secure/secure_heap.h b/portable/IAR/ARM_CM23/secure/secure_heap.h index 7226fa26f..d5ddaa853 100644 --- a/portable/IAR/ARM_CM23/secure/secure_heap.h +++ b/portable/IAR/ARM_CM23/secure/secure_heap.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef __SECURE_HEAP_H__ diff --git a/portable/IAR/ARM_CM23/secure/secure_init.c b/portable/IAR/ARM_CM23/secure/secure_init.c index 5ffa9e613..6f0be2547 100644 --- a/portable/IAR/ARM_CM23/secure/secure_init.c +++ b/portable/IAR/ARM_CM23/secure/secure_init.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Standard includes. */ diff --git a/portable/IAR/ARM_CM23/secure/secure_init.h b/portable/IAR/ARM_CM23/secure/secure_init.h index 96ba9aa10..643873468 100644 --- a/portable/IAR/ARM_CM23/secure/secure_init.h +++ b/portable/IAR/ARM_CM23/secure/secure_init.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef __SECURE_INIT_H__ diff --git a/portable/IAR/ARM_CM23/secure/secure_port_macros.h b/portable/IAR/ARM_CM23/secure/secure_port_macros.h index f37655d48..d0ace6242 100644 --- a/portable/IAR/ARM_CM23/secure/secure_port_macros.h +++ b/portable/IAR/ARM_CM23/secure/secure_port_macros.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef __SECURE_PORT_MACROS_H__ diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/port.c b/portable/IAR/ARM_CM23_NTZ/non_secure/port.c index 37f5d4812..3e42faba0 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining @@ -349,7 +350,7 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV * @brief Each task maintains its own interrupt status in the critical nesting * variable. */ -static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL; +static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL; #if ( configENABLE_TRUSTZONE == 1 ) @@ -365,26 +366,26 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU /** * @brief The number of SysTick increments that make up one tick period. */ - static uint32_t ulTimerCountsForOneTick = 0; + static uint32_t ulTimerCountsForOneTick = 0; /** * @brief The maximum number of tick periods that can be suppressed is * limited by the 24 bit resolution of the SysTick timer. */ - static uint32_t xMaximumPossibleSuppressedTicks = 0; + static uint32_t xMaximumPossibleSuppressedTicks = 0; /** * @brief Compensate for the CPU cycles that pass while the SysTick is * stopped (low power functionality only). */ - static uint32_t ulStoppedTimerCompensation = 0; + static uint32_t ulStoppedTimerCompensation = 0; #endif /* configUSE_TICKLESS_IDLE */ /*-----------------------------------------------------------*/ #if ( configUSE_TICKLESS_IDLE == 1 ) __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ) { - uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; + uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; TickType_t xModifiableIdleTime; /* Make sure the SysTick reload value does not overflow the counter. */ @@ -402,7 +403,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU /* Calculate the reload value required to wait xExpectedIdleTime * tick periods. -1 is used because this code will execute part way * through one of the tick periods. */ - ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); + ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); if( ulReloadValue > ulStoppedTimerCompensation ) { @@ -421,14 +422,14 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU { /* Restart from whatever is left in the count register to complete * this tick period. */ - portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; + portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; /* Restart SysTick. */ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Reset the reload register to the value required for normal tick * periods. */ - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Re-enable interrupts - see comments above the cpsid instruction() * above. */ @@ -437,14 +438,14 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU else { /* Set the new reload value. */ - portNVIC_SYSTICK_LOAD_REG = ulReloadValue; + portNVIC_SYSTICK_LOAD_REG = ulReloadValue; /* Clear the SysTick count flag and set the count value back to * zero. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Restart SysTick. */ - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can * set its parameter to 0 to indicate that its implementation @@ -452,7 +453,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU * instruction, and so wfi should not be executed again. However, * the original expected idle time variable must remain unmodified, * so a copy is taken. */ - xModifiableIdleTime = xExpectedIdleTime; + xModifiableIdleTime = xExpectedIdleTime; configPRE_SLEEP_PROCESSING( xModifiableIdleTime ); if( xModifiableIdleTime > 0 ) @@ -486,7 +487,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU * best it can be, but using the tickless mode will inevitably * result in some tiny drift of the time maintained by the kernel * with respect to calendar time*/ - portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); /* Determine if the SysTick clock has already counted to zero and * been set back to the current reload value (the reload back being @@ -501,7 +502,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU * reloaded with ulReloadValue. Reset the * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick * period. */ - ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); + ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); /* Don't allow a tiny value, or values that have somehow * underflowed because the post sleep hook did something @@ -516,7 +517,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU /* As the pending tick will be processed as soon as this * function exits, the tick value maintained by the tick is * stepped forward by one less than the time spent waiting. */ - ulCompleteTickPeriods = xExpectedIdleTime - 1UL; + ulCompleteTickPeriods = xExpectedIdleTime - 1UL; } else { @@ -528,20 +529,20 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU /* How many complete tick periods passed while the processor * was waiting? */ - ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; + ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; /* The reload value is set to whatever fraction of a single tick * period remains. */ - portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; + portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; } /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard * value. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; vTaskStepTick( ulCompleteTickPeriods ); - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Exit with interrupts enabled. */ __asm volatile ( "cpsie i" ::: "memory" ); @@ -555,19 +556,19 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FU /* Calculate the constants required to configure the tick interrupt. */ #if ( configUSE_TICKLESS_IDLE == 1 ) { - ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); + ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick; - ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); + ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); } #endif /* configUSE_TICKLESS_IDLE */ /* Stop and reset the SysTick. */ - portNVIC_SYSTICK_CTRL_REG = 0UL; + portNVIC_SYSTICK_CTRL_REG = 0UL; portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Configure SysTick to interrupt at the requested rate. */ - portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; - portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; + portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT; } /*-----------------------------------------------------------*/ @@ -611,72 +612,72 @@ static void prvTaskExitError( void ) extern uint32_t * __unprivileged_flash_end__; extern uint32_t * __privileged_sram_start__; extern uint32_t * __privileged_sram_end__; - #else /* if defined( __ARMCC_VERSION ) */ + #else /* if defined( __ARMCC_VERSION ) */ /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __privileged_functions_start__[]; - extern uint32_t __privileged_functions_end__[]; - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - extern uint32_t __unprivileged_flash_start__[]; - extern uint32_t __unprivileged_flash_end__[]; - extern uint32_t __privileged_sram_start__[]; - extern uint32_t __privileged_sram_end__[]; + extern uint32_t __privileged_functions_start__[]; + extern uint32_t __privileged_functions_end__[]; + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; + extern uint32_t __unprivileged_flash_start__[]; + extern uint32_t __unprivileged_flash_end__[]; + extern uint32_t __privileged_sram_start__[]; + extern uint32_t __privileged_sram_end__[]; #endif /* defined( __ARMCC_VERSION ) */ /* Check that the MPU is present. */ if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE ) { /* MAIR0 - Index 0. */ - portMPU_MAIR0_REG |= ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK ); + portMPU_MAIR0_REG |= ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK ); /* MAIR0 - Index 1. */ - portMPU_MAIR0_REG |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK ); + portMPU_MAIR0_REG |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK ); /* Setup privileged flash as Read Only so that privileged tasks can * read it but not modify. */ - portMPU_RNR_REG = portPRIVILEGED_FLASH_REGION; - portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | - ( portMPU_REGION_NON_SHAREABLE ) | - ( portMPU_REGION_PRIVILEGED_READ_ONLY ); - portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_functions_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | - ( portMPU_RLAR_ATTR_INDEX0 ) | - ( portMPU_RLAR_REGION_ENABLE ); + portMPU_RNR_REG = portPRIVILEGED_FLASH_REGION; + portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | + ( portMPU_REGION_NON_SHAREABLE ) | + ( portMPU_REGION_PRIVILEGED_READ_ONLY ); + portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_functions_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | + ( portMPU_RLAR_ATTR_INDEX0 ) | + ( portMPU_RLAR_REGION_ENABLE ); /* Setup unprivileged flash as Read Only by both privileged and * unprivileged tasks. All tasks can read it but no-one can modify. */ - portMPU_RNR_REG = portUNPRIVILEGED_FLASH_REGION; - portMPU_RBAR_REG = ( ( ( uint32_t ) __unprivileged_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | - ( portMPU_REGION_NON_SHAREABLE ) | - ( portMPU_REGION_READ_ONLY ); - portMPU_RLAR_REG = ( ( ( uint32_t ) __unprivileged_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | - ( portMPU_RLAR_ATTR_INDEX0 ) | - ( portMPU_RLAR_REGION_ENABLE ); + portMPU_RNR_REG = portUNPRIVILEGED_FLASH_REGION; + portMPU_RBAR_REG = ( ( ( uint32_t ) __unprivileged_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | + ( portMPU_REGION_NON_SHAREABLE ) | + ( portMPU_REGION_READ_ONLY ); + portMPU_RLAR_REG = ( ( ( uint32_t ) __unprivileged_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | + ( portMPU_RLAR_ATTR_INDEX0 ) | + ( portMPU_RLAR_REGION_ENABLE ); /* Setup unprivileged syscalls flash as Read Only by both privileged * and unprivileged tasks. All tasks can read it but no-one can modify. */ - portMPU_RNR_REG = portUNPRIVILEGED_SYSCALLS_REGION; - portMPU_RBAR_REG = ( ( ( uint32_t ) __syscalls_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | - ( portMPU_REGION_NON_SHAREABLE ) | - ( portMPU_REGION_READ_ONLY ); - portMPU_RLAR_REG = ( ( ( uint32_t ) __syscalls_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | - ( portMPU_RLAR_ATTR_INDEX0 ) | - ( portMPU_RLAR_REGION_ENABLE ); + portMPU_RNR_REG = portUNPRIVILEGED_SYSCALLS_REGION; + portMPU_RBAR_REG = ( ( ( uint32_t ) __syscalls_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | + ( portMPU_REGION_NON_SHAREABLE ) | + ( portMPU_REGION_READ_ONLY ); + portMPU_RLAR_REG = ( ( ( uint32_t ) __syscalls_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | + ( portMPU_RLAR_ATTR_INDEX0 ) | + ( portMPU_RLAR_REGION_ENABLE ); /* Setup RAM containing kernel data for privileged access only. */ - portMPU_RNR_REG = portPRIVILEGED_RAM_REGION; - portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_sram_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | - ( portMPU_REGION_NON_SHAREABLE ) | - ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | - ( portMPU_REGION_EXECUTE_NEVER ); - portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_sram_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | - ( portMPU_RLAR_ATTR_INDEX0 ) | - ( portMPU_RLAR_REGION_ENABLE ); + portMPU_RNR_REG = portPRIVILEGED_RAM_REGION; + portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_sram_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | + ( portMPU_REGION_NON_SHAREABLE ) | + ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | + ( portMPU_REGION_EXECUTE_NEVER ); + portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_sram_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | + ( portMPU_RLAR_ATTR_INDEX0 ) | + ( portMPU_RLAR_REGION_ENABLE ); /* Enable mem fault. */ portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT; /* Enable MPU with privileged background access i.e. unmapped * regions have privileged access. */ - portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT ); + portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT ); } } #endif /* configENABLE_MPU */ @@ -771,24 +772,24 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO extern uint32_t * __syscalls_flash_end__; #else /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; #endif /* defined( __ARMCC_VERSION ) */ #endif /* configENABLE_MPU */ - uint32_t ulPC; + uint32_t ulPC; #if ( configENABLE_TRUSTZONE == 1 ) - uint32_t ulR0; + uint32_t ulR0; #if ( configENABLE_MPU == 1 ) - uint32_t ulControl, ulIsTaskPrivileged; + uint32_t ulControl, ulIsTaskPrivileged; #endif /* configENABLE_MPU */ #endif /* configENABLE_TRUSTZONE */ uint8_t ucSVCNumber; /* Register are stored on the stack in the following order - R0, R1, R2, R3, * R12, LR, PC, xPSR. */ - ulPC = pulCallerStackAddress[ 6 ]; + ulPC = pulCallerStackAddress[ 6 ]; ucSVCNumber = ( ( uint8_t * ) ulPC )[ -2 ]; switch( ucSVCNumber ) @@ -801,22 +802,22 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO ulR0 = pulCallerStackAddress[ 0 ]; #if ( configENABLE_MPU == 1 ) - { - /* Read the CONTROL register value. */ - __asm volatile ( "mrs %0, control" : "=r" ( ulControl ) ); + { + /* Read the CONTROL register value. */ + __asm volatile ( "mrs %0, control" : "=r" ( ulControl ) ); - /* The task that raised the SVC is privileged if Bit[0] - * in the CONTROL register is 0. */ - ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 ); + /* The task that raised the SVC is privileged if Bit[0] + * in the CONTROL register is 0. */ + ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 ); - /* Allocate and load a context for the secure task. */ - xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged ); - } - #else /* if ( configENABLE_MPU == 1 ) */ - { - /* Allocate and load a context for the secure task. */ - xSecureContext = SecureContext_AllocateContext( ulR0 ); - } + /* Allocate and load a context for the secure task. */ + xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged ); + } + #else /* if ( configENABLE_MPU == 1 ) */ + { + /* Allocate and load a context for the secure task. */ + xSecureContext = SecureContext_AllocateContext( ulR0 ); + } #endif /* configENABLE_MPU */ configASSERT( xSecureContext != NULL ); @@ -834,21 +835,21 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO case portSVC_START_SCHEDULER: #if ( configENABLE_TRUSTZONE == 1 ) - { - /* De-prioritize the non-secure exceptions so that the - * non-secure pendSV runs at the lowest priority. */ - SecureInit_DePrioritizeNSExceptions(); + { + /* De-prioritize the non-secure exceptions so that the + * non-secure pendSV runs at the lowest priority. */ + SecureInit_DePrioritizeNSExceptions(); - /* Initialize the secure context management system. */ - SecureContext_Init(); - } + /* Initialize the secure context management system. */ + SecureContext_Init(); + } #endif /* configENABLE_TRUSTZONE */ #if ( configENABLE_FPU == 1 ) - { - /* Setup the Floating Point Unit (FPU). */ - prvSetupFPU(); - } + { + /* Setup the Floating Point Unit (FPU). */ + prvSetupFPU(); + } #endif /* configENABLE_FPU */ /* Setup the context of the first task so that the first task starts @@ -881,12 +882,12 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO StackType_t * pxEndOfStack, TaskFunction_t pxCode, void * pvParameters, - BaseType_t xRunPrivileged ) /* PRIVILEGED_FUNCTION */ + BaseType_t xRunPrivileged ) /* PRIVILEGED_FUNCTION */ #else StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, StackType_t * pxEndOfStack, TaskFunction_t pxCode, - void * pvParameters ) /* PRIVILEGED_FUNCTION */ + void * pvParameters ) /* PRIVILEGED_FUNCTION */ #endif /* configENABLE_MPU */ { /* Simulate the stack frame as it would be created by a context switch @@ -1015,7 +1016,7 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */ vPortSetupTimerInterrupt(); /* Initialize the critical nesting count ready for the first task. */ - ulCriticalNesting = 0; + ulCriticalNesting = 0; /* Start the first task. */ vStartFirstTask(); @@ -1049,10 +1050,10 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ uint32_t ulStackDepth ) { uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber; - int32_t lIndex = 0; + int32_t lIndex = 0; /* Setup MAIR0. */ - xMPUSettings->ulMAIR0 = ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK ); + xMPUSettings->ulMAIR0 = ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK ); xMPUSettings->ulMAIR0 |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK ); /* This function is called automatically when the task is created - in @@ -1062,9 +1063,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ if( ulStackDepth > 0 ) { /* Define the region that allows access to the stack. */ - ulRegionStartAddress = ( ( uint32_t ) pxBottomOfStack ) & portMPU_RBAR_ADDRESS_MASK; - ulRegionEndAddress = ( uint32_t ) pxBottomOfStack + ( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) - 1; - ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; + ulRegionStartAddress = ( ( uint32_t ) pxBottomOfStack ) & portMPU_RBAR_ADDRESS_MASK; + ulRegionEndAddress = ( uint32_t ) pxBottomOfStack + ( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) - 1; + ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = ( ulRegionStartAddress ) | ( portMPU_REGION_NON_SHAREABLE ) | @@ -1087,9 +1088,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ /* Translate the generic region definition contained in xRegions * into the ARMv8 specific MPU settings that are then stored in * xMPUSettings. */ - ulRegionStartAddress = ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) & portMPU_RBAR_ADDRESS_MASK; - ulRegionEndAddress = ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1; - ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; + ulRegionStartAddress = ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) & portMPU_RBAR_ADDRESS_MASK; + ulRegionEndAddress = ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1; + ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; /* Start address. */ xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR = ( ulRegionStartAddress ) | @@ -1142,7 +1143,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ BaseType_t xPortIsInsideInterrupt( void ) { - uint32_t ulCurrentInterrupt; + uint32_t ulCurrentInterrupt; BaseType_t xReturn; /* Obtain the number of the currently executing interrupt. Interrupt Program diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h b/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h index edb5bcfca..fdba1b177 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef __PORT_ASM_H__ diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h b/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h index a21737908..29697ba00 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/IAR/ARM_CM3/port.c b/portable/IAR/ARM_CM3/port.c index 39daa184d..9ce3b2147 100644 --- a/portable/IAR/ARM_CM3/port.c +++ b/portable/IAR/ARM_CM3/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -126,13 +127,13 @@ static void prvTaskExitError( void ); /* Each task maintains its own interrupt status in the critical nesting * variable. */ -static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; +static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; /* * The number of SysTick increments that make up one tick period. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t ulTimerCountsForOneTick = 0; + static uint32_t ulTimerCountsForOneTick = 0; #endif /* configUSE_TICKLESS_IDLE */ /* @@ -140,7 +141,7 @@ static UBaseType_t uxCriticalNesting = 0xaaaaa * 24 bit resolution of the SysTick timer. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t xMaximumPossibleSuppressedTicks = 0; + static uint32_t xMaximumPossibleSuppressedTicks = 0; #endif /* configUSE_TICKLESS_IDLE */ /* @@ -148,7 +149,7 @@ static UBaseType_t uxCriticalNesting = 0xaaaaa * power functionality only. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t ulStoppedTimerCompensation = 0; + static uint32_t ulStoppedTimerCompensation = 0; #endif /* configUSE_TICKLESS_IDLE */ /* @@ -157,8 +158,8 @@ static UBaseType_t uxCriticalNesting = 0xaaaaa * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY. */ #if ( configASSERT_DEFINED == 1 ) - static uint8_t ucMaxSysCallPriority = 0; - static uint32_t ulMaxPRIGROUPValue = 0; + static uint8_t ucMaxSysCallPriority = 0; + static uint32_t ulMaxPRIGROUPValue = 0; static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16; #endif /* configASSERT_DEFINED */ @@ -215,9 +216,9 @@ BaseType_t xPortStartScheduler( void ) #if ( configASSERT_DEFINED == 1 ) { - volatile uint32_t ulOriginalPriority; + volatile uint32_t ulOriginalPriority; volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER ); - volatile uint8_t ucMaxPriorityValue; + volatile uint8_t ucMaxPriorityValue; /* Determine the maximum priority from which ISR safe FreeRTOS API * functions can be called. ISR safe functions are those that end in @@ -225,21 +226,21 @@ BaseType_t xPortStartScheduler( void ) * ensure interrupt entry is as fast and simple as possible. * * Save the interrupt priority value that is about to be clobbered. */ - ulOriginalPriority = *pucFirstUserPriorityRegister; + ulOriginalPriority = *pucFirstUserPriorityRegister; /* Determine the number of priority bits available. First write to all * possible bits. */ *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE; /* Read the value back to see how many bits stuck. */ - ucMaxPriorityValue = *pucFirstUserPriorityRegister; + ucMaxPriorityValue = *pucFirstUserPriorityRegister; /* Use the same mask on the maximum system call priority. */ - ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; + ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; /* Calculate the maximum acceptable priority group value for the number * of bits read back. */ - ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS; + ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS; while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE ) { @@ -267,8 +268,8 @@ BaseType_t xPortStartScheduler( void ) /* Shift the priority group value back to its position within the AIRCR * register. */ - ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; - ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; + ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; + ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; /* Restore the clobbered interrupt priority register to its original * value. */ @@ -285,7 +286,7 @@ BaseType_t xPortStartScheduler( void ) vPortSetupTimerInterrupt(); /* Initialise the critical nesting count ready for the first task. */ - uxCriticalNesting = 0; + uxCriticalNesting = 0; /* Start the first task. */ vPortStartFirstTask(); @@ -356,7 +357,7 @@ void xPortSysTickHandler( void ) __weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ) { - uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; + uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; TickType_t xModifiableIdleTime; /* Make sure the SysTick reload value does not overflow the counter. */ @@ -374,7 +375,7 @@ void xPortSysTickHandler( void ) /* Calculate the reload value required to wait xExpectedIdleTime * tick periods. -1 is used because this code will execute part way * through one of the tick periods. */ - ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); + ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); if( ulReloadValue > ulStoppedTimerCompensation ) { @@ -393,14 +394,14 @@ void xPortSysTickHandler( void ) { /* Restart from whatever is left in the count register to complete * this tick period. */ - portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; + portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; /* Restart SysTick. */ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Reset the reload register to the value required for normal tick * periods. */ - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Re-enable interrupts - see comments above __disable_interrupt() * call above. */ @@ -409,21 +410,21 @@ void xPortSysTickHandler( void ) else { /* Set the new reload value. */ - portNVIC_SYSTICK_LOAD_REG = ulReloadValue; + portNVIC_SYSTICK_LOAD_REG = ulReloadValue; /* Clear the SysTick count flag and set the count value back to * zero. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Restart SysTick. */ - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can * set its parameter to 0 to indicate that its implementation contains * its own wait for interrupt or wait for event instruction, and so wfi * should not be executed again. However, the original expected idle * time variable must remain unmodified, so a copy is taken. */ - xModifiableIdleTime = xExpectedIdleTime; + xModifiableIdleTime = xExpectedIdleTime; configPRE_SLEEP_PROCESSING( xModifiableIdleTime ); if( xModifiableIdleTime > 0 ) @@ -457,7 +458,7 @@ void xPortSysTickHandler( void ) * be, but using the tickless mode will inevitably result in some tiny * drift of the time maintained by the kernel with respect to calendar * time*/ - portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); /* Determine if the SysTick clock has already counted to zero and * been set back to the current reload value (the reload back being @@ -472,7 +473,7 @@ void xPortSysTickHandler( void ) * reloaded with ulReloadValue. Reset the * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick * period. */ - ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); + ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); /* Don't allow a tiny value, or values that have somehow * underflowed because the post sleep hook did something @@ -487,7 +488,7 @@ void xPortSysTickHandler( void ) /* As the pending tick will be processed as soon as this * function exits, the tick value maintained by the tick is stepped * forward by one less than the time spent waiting. */ - ulCompleteTickPeriods = xExpectedIdleTime - 1UL; + ulCompleteTickPeriods = xExpectedIdleTime - 1UL; } else { @@ -499,20 +500,20 @@ void xPortSysTickHandler( void ) /* How many complete tick periods passed while the processor * was waiting? */ - ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; + ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; /* The reload value is set to whatever fraction of a single tick * period remains. */ - portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; + portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; } /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard * value. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; vTaskStepTick( ulCompleteTickPeriods ); - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Exit with interrupts enabled. */ __enable_interrupt(); @@ -531,19 +532,19 @@ __weak void vPortSetupTimerInterrupt( void ) /* Calculate the constants required to configure the tick interrupt. */ #if ( configUSE_TICKLESS_IDLE == 1 ) { - ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); + ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick; - ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); + ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); } #endif /* configUSE_TICKLESS_IDLE */ /* Stop and clear the SysTick. */ - portNVIC_SYSTICK_CTRL_REG = 0UL; + portNVIC_SYSTICK_CTRL_REG = 0UL; portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Configure SysTick to interrupt at the requested rate. */ - portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; - portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT ); + portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT ); } /*-----------------------------------------------------------*/ @@ -552,7 +553,7 @@ __weak void vPortSetupTimerInterrupt( void ) void vPortValidateInterruptPriority( void ) { uint32_t ulCurrentInterrupt; - uint8_t ucCurrentPriority; + uint8_t ucCurrentPriority; /* Obtain the number of the currently executing interrupt. */ __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" ); diff --git a/portable/IAR/ARM_CM3/portmacro.h b/portable/IAR/ARM_CM3/portmacro.h index 82c62c831..7cdaf9287 100644 --- a/portable/IAR/ARM_CM3/portmacro.h +++ b/portable/IAR/ARM_CM3/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ @@ -117,7 +118,7 @@ /*-----------------------------------------------------------*/ - #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( ( uint32_t ) __CLZ( ( uxReadyPriorities ) ) ) ) + #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( ( uint32_t ) __CLZ( ( uxReadyPriorities ) ) ) ) #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ /*-----------------------------------------------------------*/ @@ -173,7 +174,7 @@ portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void ) { - uint32_t ulCurrentInterrupt; + uint32_t ulCurrentInterrupt; BaseType_t xReturn; /* Obtain the number of the currently executing interrupt. */ diff --git a/portable/IAR/ARM_CM33/non_secure/port.c b/portable/IAR/ARM_CM33/non_secure/port.c index 37f5d4812..3e42faba0 100644 --- a/portable/IAR/ARM_CM33/non_secure/port.c +++ b/portable/IAR/ARM_CM33/non_secure/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining @@ -349,7 +350,7 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV * @brief Each task maintains its own interrupt status in the critical nesting * variable. */ -static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL; +static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL; #if ( configENABLE_TRUSTZONE == 1 ) @@ -365,26 +366,26 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU /** * @brief The number of SysTick increments that make up one tick period. */ - static uint32_t ulTimerCountsForOneTick = 0; + static uint32_t ulTimerCountsForOneTick = 0; /** * @brief The maximum number of tick periods that can be suppressed is * limited by the 24 bit resolution of the SysTick timer. */ - static uint32_t xMaximumPossibleSuppressedTicks = 0; + static uint32_t xMaximumPossibleSuppressedTicks = 0; /** * @brief Compensate for the CPU cycles that pass while the SysTick is * stopped (low power functionality only). */ - static uint32_t ulStoppedTimerCompensation = 0; + static uint32_t ulStoppedTimerCompensation = 0; #endif /* configUSE_TICKLESS_IDLE */ /*-----------------------------------------------------------*/ #if ( configUSE_TICKLESS_IDLE == 1 ) __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ) { - uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; + uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; TickType_t xModifiableIdleTime; /* Make sure the SysTick reload value does not overflow the counter. */ @@ -402,7 +403,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU /* Calculate the reload value required to wait xExpectedIdleTime * tick periods. -1 is used because this code will execute part way * through one of the tick periods. */ - ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); + ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); if( ulReloadValue > ulStoppedTimerCompensation ) { @@ -421,14 +422,14 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU { /* Restart from whatever is left in the count register to complete * this tick period. */ - portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; + portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; /* Restart SysTick. */ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Reset the reload register to the value required for normal tick * periods. */ - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Re-enable interrupts - see comments above the cpsid instruction() * above. */ @@ -437,14 +438,14 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU else { /* Set the new reload value. */ - portNVIC_SYSTICK_LOAD_REG = ulReloadValue; + portNVIC_SYSTICK_LOAD_REG = ulReloadValue; /* Clear the SysTick count flag and set the count value back to * zero. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Restart SysTick. */ - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can * set its parameter to 0 to indicate that its implementation @@ -452,7 +453,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU * instruction, and so wfi should not be executed again. However, * the original expected idle time variable must remain unmodified, * so a copy is taken. */ - xModifiableIdleTime = xExpectedIdleTime; + xModifiableIdleTime = xExpectedIdleTime; configPRE_SLEEP_PROCESSING( xModifiableIdleTime ); if( xModifiableIdleTime > 0 ) @@ -486,7 +487,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU * best it can be, but using the tickless mode will inevitably * result in some tiny drift of the time maintained by the kernel * with respect to calendar time*/ - portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); /* Determine if the SysTick clock has already counted to zero and * been set back to the current reload value (the reload back being @@ -501,7 +502,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU * reloaded with ulReloadValue. Reset the * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick * period. */ - ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); + ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); /* Don't allow a tiny value, or values that have somehow * underflowed because the post sleep hook did something @@ -516,7 +517,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU /* As the pending tick will be processed as soon as this * function exits, the tick value maintained by the tick is * stepped forward by one less than the time spent waiting. */ - ulCompleteTickPeriods = xExpectedIdleTime - 1UL; + ulCompleteTickPeriods = xExpectedIdleTime - 1UL; } else { @@ -528,20 +529,20 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU /* How many complete tick periods passed while the processor * was waiting? */ - ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; + ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; /* The reload value is set to whatever fraction of a single tick * period remains. */ - portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; + portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; } /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard * value. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; vTaskStepTick( ulCompleteTickPeriods ); - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Exit with interrupts enabled. */ __asm volatile ( "cpsie i" ::: "memory" ); @@ -555,19 +556,19 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FU /* Calculate the constants required to configure the tick interrupt. */ #if ( configUSE_TICKLESS_IDLE == 1 ) { - ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); + ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick; - ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); + ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); } #endif /* configUSE_TICKLESS_IDLE */ /* Stop and reset the SysTick. */ - portNVIC_SYSTICK_CTRL_REG = 0UL; + portNVIC_SYSTICK_CTRL_REG = 0UL; portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Configure SysTick to interrupt at the requested rate. */ - portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; - portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; + portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT; } /*-----------------------------------------------------------*/ @@ -611,72 +612,72 @@ static void prvTaskExitError( void ) extern uint32_t * __unprivileged_flash_end__; extern uint32_t * __privileged_sram_start__; extern uint32_t * __privileged_sram_end__; - #else /* if defined( __ARMCC_VERSION ) */ + #else /* if defined( __ARMCC_VERSION ) */ /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __privileged_functions_start__[]; - extern uint32_t __privileged_functions_end__[]; - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - extern uint32_t __unprivileged_flash_start__[]; - extern uint32_t __unprivileged_flash_end__[]; - extern uint32_t __privileged_sram_start__[]; - extern uint32_t __privileged_sram_end__[]; + extern uint32_t __privileged_functions_start__[]; + extern uint32_t __privileged_functions_end__[]; + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; + extern uint32_t __unprivileged_flash_start__[]; + extern uint32_t __unprivileged_flash_end__[]; + extern uint32_t __privileged_sram_start__[]; + extern uint32_t __privileged_sram_end__[]; #endif /* defined( __ARMCC_VERSION ) */ /* Check that the MPU is present. */ if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE ) { /* MAIR0 - Index 0. */ - portMPU_MAIR0_REG |= ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK ); + portMPU_MAIR0_REG |= ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK ); /* MAIR0 - Index 1. */ - portMPU_MAIR0_REG |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK ); + portMPU_MAIR0_REG |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK ); /* Setup privileged flash as Read Only so that privileged tasks can * read it but not modify. */ - portMPU_RNR_REG = portPRIVILEGED_FLASH_REGION; - portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | - ( portMPU_REGION_NON_SHAREABLE ) | - ( portMPU_REGION_PRIVILEGED_READ_ONLY ); - portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_functions_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | - ( portMPU_RLAR_ATTR_INDEX0 ) | - ( portMPU_RLAR_REGION_ENABLE ); + portMPU_RNR_REG = portPRIVILEGED_FLASH_REGION; + portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | + ( portMPU_REGION_NON_SHAREABLE ) | + ( portMPU_REGION_PRIVILEGED_READ_ONLY ); + portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_functions_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | + ( portMPU_RLAR_ATTR_INDEX0 ) | + ( portMPU_RLAR_REGION_ENABLE ); /* Setup unprivileged flash as Read Only by both privileged and * unprivileged tasks. All tasks can read it but no-one can modify. */ - portMPU_RNR_REG = portUNPRIVILEGED_FLASH_REGION; - portMPU_RBAR_REG = ( ( ( uint32_t ) __unprivileged_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | - ( portMPU_REGION_NON_SHAREABLE ) | - ( portMPU_REGION_READ_ONLY ); - portMPU_RLAR_REG = ( ( ( uint32_t ) __unprivileged_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | - ( portMPU_RLAR_ATTR_INDEX0 ) | - ( portMPU_RLAR_REGION_ENABLE ); + portMPU_RNR_REG = portUNPRIVILEGED_FLASH_REGION; + portMPU_RBAR_REG = ( ( ( uint32_t ) __unprivileged_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | + ( portMPU_REGION_NON_SHAREABLE ) | + ( portMPU_REGION_READ_ONLY ); + portMPU_RLAR_REG = ( ( ( uint32_t ) __unprivileged_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | + ( portMPU_RLAR_ATTR_INDEX0 ) | + ( portMPU_RLAR_REGION_ENABLE ); /* Setup unprivileged syscalls flash as Read Only by both privileged * and unprivileged tasks. All tasks can read it but no-one can modify. */ - portMPU_RNR_REG = portUNPRIVILEGED_SYSCALLS_REGION; - portMPU_RBAR_REG = ( ( ( uint32_t ) __syscalls_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | - ( portMPU_REGION_NON_SHAREABLE ) | - ( portMPU_REGION_READ_ONLY ); - portMPU_RLAR_REG = ( ( ( uint32_t ) __syscalls_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | - ( portMPU_RLAR_ATTR_INDEX0 ) | - ( portMPU_RLAR_REGION_ENABLE ); + portMPU_RNR_REG = portUNPRIVILEGED_SYSCALLS_REGION; + portMPU_RBAR_REG = ( ( ( uint32_t ) __syscalls_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | + ( portMPU_REGION_NON_SHAREABLE ) | + ( portMPU_REGION_READ_ONLY ); + portMPU_RLAR_REG = ( ( ( uint32_t ) __syscalls_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | + ( portMPU_RLAR_ATTR_INDEX0 ) | + ( portMPU_RLAR_REGION_ENABLE ); /* Setup RAM containing kernel data for privileged access only. */ - portMPU_RNR_REG = portPRIVILEGED_RAM_REGION; - portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_sram_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | - ( portMPU_REGION_NON_SHAREABLE ) | - ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | - ( portMPU_REGION_EXECUTE_NEVER ); - portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_sram_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | - ( portMPU_RLAR_ATTR_INDEX0 ) | - ( portMPU_RLAR_REGION_ENABLE ); + portMPU_RNR_REG = portPRIVILEGED_RAM_REGION; + portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_sram_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | + ( portMPU_REGION_NON_SHAREABLE ) | + ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | + ( portMPU_REGION_EXECUTE_NEVER ); + portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_sram_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | + ( portMPU_RLAR_ATTR_INDEX0 ) | + ( portMPU_RLAR_REGION_ENABLE ); /* Enable mem fault. */ portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT; /* Enable MPU with privileged background access i.e. unmapped * regions have privileged access. */ - portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT ); + portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT ); } } #endif /* configENABLE_MPU */ @@ -771,24 +772,24 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO extern uint32_t * __syscalls_flash_end__; #else /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; #endif /* defined( __ARMCC_VERSION ) */ #endif /* configENABLE_MPU */ - uint32_t ulPC; + uint32_t ulPC; #if ( configENABLE_TRUSTZONE == 1 ) - uint32_t ulR0; + uint32_t ulR0; #if ( configENABLE_MPU == 1 ) - uint32_t ulControl, ulIsTaskPrivileged; + uint32_t ulControl, ulIsTaskPrivileged; #endif /* configENABLE_MPU */ #endif /* configENABLE_TRUSTZONE */ uint8_t ucSVCNumber; /* Register are stored on the stack in the following order - R0, R1, R2, R3, * R12, LR, PC, xPSR. */ - ulPC = pulCallerStackAddress[ 6 ]; + ulPC = pulCallerStackAddress[ 6 ]; ucSVCNumber = ( ( uint8_t * ) ulPC )[ -2 ]; switch( ucSVCNumber ) @@ -801,22 +802,22 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO ulR0 = pulCallerStackAddress[ 0 ]; #if ( configENABLE_MPU == 1 ) - { - /* Read the CONTROL register value. */ - __asm volatile ( "mrs %0, control" : "=r" ( ulControl ) ); + { + /* Read the CONTROL register value. */ + __asm volatile ( "mrs %0, control" : "=r" ( ulControl ) ); - /* The task that raised the SVC is privileged if Bit[0] - * in the CONTROL register is 0. */ - ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 ); + /* The task that raised the SVC is privileged if Bit[0] + * in the CONTROL register is 0. */ + ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 ); - /* Allocate and load a context for the secure task. */ - xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged ); - } - #else /* if ( configENABLE_MPU == 1 ) */ - { - /* Allocate and load a context for the secure task. */ - xSecureContext = SecureContext_AllocateContext( ulR0 ); - } + /* Allocate and load a context for the secure task. */ + xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged ); + } + #else /* if ( configENABLE_MPU == 1 ) */ + { + /* Allocate and load a context for the secure task. */ + xSecureContext = SecureContext_AllocateContext( ulR0 ); + } #endif /* configENABLE_MPU */ configASSERT( xSecureContext != NULL ); @@ -834,21 +835,21 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO case portSVC_START_SCHEDULER: #if ( configENABLE_TRUSTZONE == 1 ) - { - /* De-prioritize the non-secure exceptions so that the - * non-secure pendSV runs at the lowest priority. */ - SecureInit_DePrioritizeNSExceptions(); + { + /* De-prioritize the non-secure exceptions so that the + * non-secure pendSV runs at the lowest priority. */ + SecureInit_DePrioritizeNSExceptions(); - /* Initialize the secure context management system. */ - SecureContext_Init(); - } + /* Initialize the secure context management system. */ + SecureContext_Init(); + } #endif /* configENABLE_TRUSTZONE */ #if ( configENABLE_FPU == 1 ) - { - /* Setup the Floating Point Unit (FPU). */ - prvSetupFPU(); - } + { + /* Setup the Floating Point Unit (FPU). */ + prvSetupFPU(); + } #endif /* configENABLE_FPU */ /* Setup the context of the first task so that the first task starts @@ -881,12 +882,12 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO StackType_t * pxEndOfStack, TaskFunction_t pxCode, void * pvParameters, - BaseType_t xRunPrivileged ) /* PRIVILEGED_FUNCTION */ + BaseType_t xRunPrivileged ) /* PRIVILEGED_FUNCTION */ #else StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, StackType_t * pxEndOfStack, TaskFunction_t pxCode, - void * pvParameters ) /* PRIVILEGED_FUNCTION */ + void * pvParameters ) /* PRIVILEGED_FUNCTION */ #endif /* configENABLE_MPU */ { /* Simulate the stack frame as it would be created by a context switch @@ -1015,7 +1016,7 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */ vPortSetupTimerInterrupt(); /* Initialize the critical nesting count ready for the first task. */ - ulCriticalNesting = 0; + ulCriticalNesting = 0; /* Start the first task. */ vStartFirstTask(); @@ -1049,10 +1050,10 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ uint32_t ulStackDepth ) { uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber; - int32_t lIndex = 0; + int32_t lIndex = 0; /* Setup MAIR0. */ - xMPUSettings->ulMAIR0 = ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK ); + xMPUSettings->ulMAIR0 = ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK ); xMPUSettings->ulMAIR0 |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK ); /* This function is called automatically when the task is created - in @@ -1062,9 +1063,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ if( ulStackDepth > 0 ) { /* Define the region that allows access to the stack. */ - ulRegionStartAddress = ( ( uint32_t ) pxBottomOfStack ) & portMPU_RBAR_ADDRESS_MASK; - ulRegionEndAddress = ( uint32_t ) pxBottomOfStack + ( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) - 1; - ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; + ulRegionStartAddress = ( ( uint32_t ) pxBottomOfStack ) & portMPU_RBAR_ADDRESS_MASK; + ulRegionEndAddress = ( uint32_t ) pxBottomOfStack + ( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) - 1; + ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = ( ulRegionStartAddress ) | ( portMPU_REGION_NON_SHAREABLE ) | @@ -1087,9 +1088,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ /* Translate the generic region definition contained in xRegions * into the ARMv8 specific MPU settings that are then stored in * xMPUSettings. */ - ulRegionStartAddress = ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) & portMPU_RBAR_ADDRESS_MASK; - ulRegionEndAddress = ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1; - ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; + ulRegionStartAddress = ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) & portMPU_RBAR_ADDRESS_MASK; + ulRegionEndAddress = ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1; + ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; /* Start address. */ xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR = ( ulRegionStartAddress ) | @@ -1142,7 +1143,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ BaseType_t xPortIsInsideInterrupt( void ) { - uint32_t ulCurrentInterrupt; + uint32_t ulCurrentInterrupt; BaseType_t xReturn; /* Obtain the number of the currently executing interrupt. Interrupt Program diff --git a/portable/IAR/ARM_CM33/non_secure/portasm.h b/portable/IAR/ARM_CM33/non_secure/portasm.h index edb5bcfca..fdba1b177 100644 --- a/portable/IAR/ARM_CM33/non_secure/portasm.h +++ b/portable/IAR/ARM_CM33/non_secure/portasm.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef __PORT_ASM_H__ diff --git a/portable/IAR/ARM_CM33/non_secure/portmacro.h b/portable/IAR/ARM_CM33/non_secure/portmacro.h index 1c815550a..24f1e1455 100644 --- a/portable/IAR/ARM_CM33/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM33/non_secure/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/IAR/ARM_CM33/secure/secure_context.c b/portable/IAR/ARM_CM33/secure/secure_context.c index 04f1e5622..5608c7240 100644 --- a/portable/IAR/ARM_CM33/secure/secure_context.c +++ b/portable/IAR/ARM_CM33/secure/secure_context.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Secure context includes. */ @@ -101,12 +102,12 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize ) #endif /* configENABLE_MPU */ { - uint8_t * pucStackMemory = NULL; - uint32_t ulIPSR; - SecureContextHandle_t xSecureContextHandle = NULL; + uint8_t * pucStackMemory = NULL; + uint32_t ulIPSR; + SecureContextHandle_t xSecureContextHandle = NULL; #if ( configENABLE_MPU == 1 ) - uint32_t * pulCurrentStackPointer = NULL; + uint32_t * pulCurrentStackPointer = NULL; #endif /* configENABLE_MPU */ /* Read the Interrupt Program Status Register (IPSR) value. */ @@ -143,7 +144,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) /* Store the correct CONTROL value for the task on the stack. * This value is programmed in the CONTROL register on * context switch. */ - pulCurrentStackPointer = ( uint32_t * ) xSecureContextHandle->pucStackStart; + pulCurrentStackPointer = ( uint32_t * ) xSecureContextHandle->pucStackStart; pulCurrentStackPointer--; if( ulIsTaskPrivileged ) diff --git a/portable/IAR/ARM_CM33/secure/secure_context.h b/portable/IAR/ARM_CM33/secure/secure_context.h index a5d2f2967..62ef6bb94 100644 --- a/portable/IAR/ARM_CM33/secure/secure_context.h +++ b/portable/IAR/ARM_CM33/secure/secure_context.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef __SECURE_CONTEXT_H__ diff --git a/portable/IAR/ARM_CM33/secure/secure_context_port.c b/portable/IAR/ARM_CM33/secure/secure_context_port.c index 24e3fef66..e2fb5ce74 100644 --- a/portable/IAR/ARM_CM33/secure/secure_context_port.c +++ b/portable/IAR/ARM_CM33/secure/secure_context_port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Secure context includes. */ diff --git a/portable/IAR/ARM_CM33/secure/secure_heap.c b/portable/IAR/ARM_CM33/secure/secure_heap.c index b71f06da9..76b6ee1c3 100644 --- a/portable/IAR/ARM_CM33/secure/secure_heap.c +++ b/portable/IAR/ARM_CM33/secure/secure_heap.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Standard includes. */ @@ -115,7 +116,7 @@ static BlockLink_t xStart, * pxEnd = NULL; * @brief Keeps track of the number of free bytes remaining, but says nothing * about fragmentation. */ -static size_t xFreeBytesRemaining = 0U; +static size_t xFreeBytesRemaining = 0U; static size_t xMinimumEverFreeBytesRemaining = 0U; /** @@ -125,61 +126,61 @@ static size_t xMinimumEverFreeBytesRemaining = 0U; * then the block belongs to the application. When the bit is free the block is * still part of the free heap space. */ -static size_t xBlockAllocatedBit = 0; +static size_t xBlockAllocatedBit = 0; /*-----------------------------------------------------------*/ static void prvHeapInit( void ) { BlockLink_t * pxFirstFreeBlock; - uint8_t * pucAlignedHeap; - size_t uxAddress; - size_t xTotalHeapSize = secureconfigTOTAL_HEAP_SIZE; + uint8_t * pucAlignedHeap; + size_t uxAddress; + size_t xTotalHeapSize = secureconfigTOTAL_HEAP_SIZE; /* Ensure the heap starts on a correctly aligned boundary. */ - uxAddress = ( size_t ) ucHeap; + uxAddress = ( size_t ) ucHeap; if( ( uxAddress & secureportBYTE_ALIGNMENT_MASK ) != 0 ) { - uxAddress += ( secureportBYTE_ALIGNMENT - 1 ); - uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK ); + uxAddress += ( secureportBYTE_ALIGNMENT - 1 ); + uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK ); xTotalHeapSize -= uxAddress - ( size_t ) ucHeap; } - pucAlignedHeap = ( uint8_t * ) uxAddress; + pucAlignedHeap = ( uint8_t * ) uxAddress; /* xStart is used to hold a pointer to the first item in the list of free * blocks. The void cast is used to prevent compiler warnings. */ - xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap; - xStart.xBlockSize = ( size_t ) 0; + xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap; + xStart.xBlockSize = ( size_t ) 0; /* pxEnd is used to mark the end of the list of free blocks and is inserted * at the end of the heap space. */ - uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize; - uxAddress -= xHeapStructSize; - uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK ); - pxEnd = ( void * ) uxAddress; - pxEnd->xBlockSize = 0; - pxEnd->pxNextFreeBlock = NULL; + uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize; + uxAddress -= xHeapStructSize; + uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK ); + pxEnd = ( void * ) uxAddress; + pxEnd->xBlockSize = 0; + pxEnd->pxNextFreeBlock = NULL; /* To start with there is a single free block that is sized to take up the * entire heap space, minus the space taken by pxEnd. */ - pxFirstFreeBlock = ( void * ) pucAlignedHeap; - pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock; + pxFirstFreeBlock = ( void * ) pucAlignedHeap; + pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock; pxFirstFreeBlock->pxNextFreeBlock = pxEnd; /* Only one block exists - and it covers the entire usable heap space. */ - xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize; - xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize; + xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize; + xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize; /* Work out the position of the top bit in a size_t variable. */ - xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * secureheapBITS_PER_BYTE ) - 1 ); + xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * secureheapBITS_PER_BYTE ) - 1 ); } /*-----------------------------------------------------------*/ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert ) { BlockLink_t * pxIterator; - uint8_t * puc; + uint8_t * puc; /* Iterate through the list until a block is found that has a higher address * than the block being inserted. */ @@ -195,7 +196,7 @@ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert ) if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert ) { pxIterator->xBlockSize += pxBlockToInsert->xBlockSize; - pxBlockToInsert = pxIterator; + pxBlockToInsert = pxIterator; } else { @@ -211,7 +212,7 @@ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert ) if( pxIterator->pxNextFreeBlock != pxEnd ) { /* Form one big block from the two blocks. */ - pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize; + pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize; pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock; } else @@ -242,7 +243,7 @@ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert ) void * pvPortMalloc( size_t xWantedSize ) { BlockLink_t * pxBlock, * pxPreviousBlock, * pxNewBlockLink; - void * pvReturn = NULL; + void * pvReturn = NULL; /* If this is the first call to malloc then the heap will require * initialisation to setup the list of free blocks. */ @@ -290,12 +291,12 @@ void * pvPortMalloc( size_t xWantedSize ) /* Traverse the list from the start (lowest address) block until * one of adequate size is found. */ pxPreviousBlock = &xStart; - pxBlock = xStart.pxNextFreeBlock; + pxBlock = xStart.pxNextFreeBlock; while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) ) { pxPreviousBlock = pxBlock; - pxBlock = pxBlock->pxNextFreeBlock; + pxBlock = pxBlock->pxNextFreeBlock; } /* If the end marker was reached then a block of adequate size was @@ -304,7 +305,7 @@ void * pvPortMalloc( size_t xWantedSize ) { /* Return the memory space pointed to - jumping over the * BlockLink_t structure at its start. */ - pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize ); + pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize ); /* This block is being returned for use so must be taken out * of the list of free blocks. */ @@ -318,13 +319,13 @@ void * pvPortMalloc( size_t xWantedSize ) * block following the number of bytes requested. The void * cast is used to prevent byte alignment warnings from the * compiler. */ - pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize ); + pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize ); secureportASSERT( ( ( ( size_t ) pxNewBlockLink ) & secureportBYTE_ALIGNMENT_MASK ) == 0 ); /* Calculate the sizes of two blocks split from the single * block. */ pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize; - pxBlock->xBlockSize = xWantedSize; + pxBlock->xBlockSize = xWantedSize; /* Insert the new block into the list of free blocks. */ prvInsertBlockIntoFreeList( pxNewBlockLink ); @@ -334,7 +335,7 @@ void * pvPortMalloc( size_t xWantedSize ) mtCOVERAGE_TEST_MARKER(); } - xFreeBytesRemaining -= pxBlock->xBlockSize; + xFreeBytesRemaining -= pxBlock->xBlockSize; if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining ) { @@ -347,8 +348,8 @@ void * pvPortMalloc( size_t xWantedSize ) /* The block is being returned - it is allocated and owned by * the application and has no "next" block. */ - pxBlock->xBlockSize |= xBlockAllocatedBit; - pxBlock->pxNextFreeBlock = NULL; + pxBlock->xBlockSize |= xBlockAllocatedBit; + pxBlock->pxNextFreeBlock = NULL; } else { @@ -388,14 +389,14 @@ void * pvPortMalloc( size_t xWantedSize ) void vPortFree( void * pv ) { - uint8_t * puc = ( uint8_t * ) pv; + uint8_t * puc = ( uint8_t * ) pv; BlockLink_t * pxLink; if( pv != NULL ) { /* The memory being freed will have an BlockLink_t structure immediately * before it. */ - puc -= xHeapStructSize; + puc -= xHeapStructSize; /* This casting is to keep the compiler from issuing warnings. */ pxLink = ( void * ) puc; diff --git a/portable/IAR/ARM_CM33/secure/secure_heap.h b/portable/IAR/ARM_CM33/secure/secure_heap.h index 7226fa26f..d5ddaa853 100644 --- a/portable/IAR/ARM_CM33/secure/secure_heap.h +++ b/portable/IAR/ARM_CM33/secure/secure_heap.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef __SECURE_HEAP_H__ diff --git a/portable/IAR/ARM_CM33/secure/secure_init.c b/portable/IAR/ARM_CM33/secure/secure_init.c index 5ffa9e613..6f0be2547 100644 --- a/portable/IAR/ARM_CM33/secure/secure_init.c +++ b/portable/IAR/ARM_CM33/secure/secure_init.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Standard includes. */ diff --git a/portable/IAR/ARM_CM33/secure/secure_init.h b/portable/IAR/ARM_CM33/secure/secure_init.h index 96ba9aa10..643873468 100644 --- a/portable/IAR/ARM_CM33/secure/secure_init.h +++ b/portable/IAR/ARM_CM33/secure/secure_init.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef __SECURE_INIT_H__ diff --git a/portable/IAR/ARM_CM33/secure/secure_port_macros.h b/portable/IAR/ARM_CM33/secure/secure_port_macros.h index f37655d48..d0ace6242 100644 --- a/portable/IAR/ARM_CM33/secure/secure_port_macros.h +++ b/portable/IAR/ARM_CM33/secure/secure_port_macros.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef __SECURE_PORT_MACROS_H__ diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/port.c b/portable/IAR/ARM_CM33_NTZ/non_secure/port.c index 37f5d4812..3e42faba0 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining @@ -349,7 +350,7 @@ portDONT_DISCARD void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) PRIV * @brief Each task maintains its own interrupt status in the critical nesting * variable. */ -static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL; +static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL; #if ( configENABLE_TRUSTZONE == 1 ) @@ -365,26 +366,26 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU /** * @brief The number of SysTick increments that make up one tick period. */ - static uint32_t ulTimerCountsForOneTick = 0; + static uint32_t ulTimerCountsForOneTick = 0; /** * @brief The maximum number of tick periods that can be suppressed is * limited by the 24 bit resolution of the SysTick timer. */ - static uint32_t xMaximumPossibleSuppressedTicks = 0; + static uint32_t xMaximumPossibleSuppressedTicks = 0; /** * @brief Compensate for the CPU cycles that pass while the SysTick is * stopped (low power functionality only). */ - static uint32_t ulStoppedTimerCompensation = 0; + static uint32_t ulStoppedTimerCompensation = 0; #endif /* configUSE_TICKLESS_IDLE */ /*-----------------------------------------------------------*/ #if ( configUSE_TICKLESS_IDLE == 1 ) __attribute__( ( weak ) ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ) { - uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; + uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; TickType_t xModifiableIdleTime; /* Make sure the SysTick reload value does not overflow the counter. */ @@ -402,7 +403,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU /* Calculate the reload value required to wait xExpectedIdleTime * tick periods. -1 is used because this code will execute part way * through one of the tick periods. */ - ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); + ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); if( ulReloadValue > ulStoppedTimerCompensation ) { @@ -421,14 +422,14 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU { /* Restart from whatever is left in the count register to complete * this tick period. */ - portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; + portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; /* Restart SysTick. */ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Reset the reload register to the value required for normal tick * periods. */ - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Re-enable interrupts - see comments above the cpsid instruction() * above. */ @@ -437,14 +438,14 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU else { /* Set the new reload value. */ - portNVIC_SYSTICK_LOAD_REG = ulReloadValue; + portNVIC_SYSTICK_LOAD_REG = ulReloadValue; /* Clear the SysTick count flag and set the count value back to * zero. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Restart SysTick. */ - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can * set its parameter to 0 to indicate that its implementation @@ -452,7 +453,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU * instruction, and so wfi should not be executed again. However, * the original expected idle time variable must remain unmodified, * so a copy is taken. */ - xModifiableIdleTime = xExpectedIdleTime; + xModifiableIdleTime = xExpectedIdleTime; configPRE_SLEEP_PROCESSING( xModifiableIdleTime ); if( xModifiableIdleTime > 0 ) @@ -486,7 +487,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU * best it can be, but using the tickless mode will inevitably * result in some tiny drift of the time maintained by the kernel * with respect to calendar time*/ - portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); /* Determine if the SysTick clock has already counted to zero and * been set back to the current reload value (the reload back being @@ -501,7 +502,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU * reloaded with ulReloadValue. Reset the * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick * period. */ - ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); + ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); /* Don't allow a tiny value, or values that have somehow * underflowed because the post sleep hook did something @@ -516,7 +517,7 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU /* As the pending tick will be processed as soon as this * function exits, the tick value maintained by the tick is * stepped forward by one less than the time spent waiting. */ - ulCompleteTickPeriods = xExpectedIdleTime - 1UL; + ulCompleteTickPeriods = xExpectedIdleTime - 1UL; } else { @@ -528,20 +529,20 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaU /* How many complete tick periods passed while the processor * was waiting? */ - ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; + ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; /* The reload value is set to whatever fraction of a single tick * period remains. */ - portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; + portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; } /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard * value. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; vTaskStepTick( ulCompleteTickPeriods ); - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Exit with interrupts enabled. */ __asm volatile ( "cpsie i" ::: "memory" ); @@ -555,19 +556,19 @@ __attribute__( ( weak ) ) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FU /* Calculate the constants required to configure the tick interrupt. */ #if ( configUSE_TICKLESS_IDLE == 1 ) { - ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); + ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick; - ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); + ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); } #endif /* configUSE_TICKLESS_IDLE */ /* Stop and reset the SysTick. */ - portNVIC_SYSTICK_CTRL_REG = 0UL; + portNVIC_SYSTICK_CTRL_REG = 0UL; portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Configure SysTick to interrupt at the requested rate. */ - portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; - portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; + portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT; } /*-----------------------------------------------------------*/ @@ -611,72 +612,72 @@ static void prvTaskExitError( void ) extern uint32_t * __unprivileged_flash_end__; extern uint32_t * __privileged_sram_start__; extern uint32_t * __privileged_sram_end__; - #else /* if defined( __ARMCC_VERSION ) */ + #else /* if defined( __ARMCC_VERSION ) */ /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __privileged_functions_start__[]; - extern uint32_t __privileged_functions_end__[]; - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; - extern uint32_t __unprivileged_flash_start__[]; - extern uint32_t __unprivileged_flash_end__[]; - extern uint32_t __privileged_sram_start__[]; - extern uint32_t __privileged_sram_end__[]; + extern uint32_t __privileged_functions_start__[]; + extern uint32_t __privileged_functions_end__[]; + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; + extern uint32_t __unprivileged_flash_start__[]; + extern uint32_t __unprivileged_flash_end__[]; + extern uint32_t __privileged_sram_start__[]; + extern uint32_t __privileged_sram_end__[]; #endif /* defined( __ARMCC_VERSION ) */ /* Check that the MPU is present. */ if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE ) { /* MAIR0 - Index 0. */ - portMPU_MAIR0_REG |= ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK ); + portMPU_MAIR0_REG |= ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK ); /* MAIR0 - Index 1. */ - portMPU_MAIR0_REG |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK ); + portMPU_MAIR0_REG |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK ); /* Setup privileged flash as Read Only so that privileged tasks can * read it but not modify. */ - portMPU_RNR_REG = portPRIVILEGED_FLASH_REGION; - portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | - ( portMPU_REGION_NON_SHAREABLE ) | - ( portMPU_REGION_PRIVILEGED_READ_ONLY ); - portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_functions_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | - ( portMPU_RLAR_ATTR_INDEX0 ) | - ( portMPU_RLAR_REGION_ENABLE ); + portMPU_RNR_REG = portPRIVILEGED_FLASH_REGION; + portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | + ( portMPU_REGION_NON_SHAREABLE ) | + ( portMPU_REGION_PRIVILEGED_READ_ONLY ); + portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_functions_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | + ( portMPU_RLAR_ATTR_INDEX0 ) | + ( portMPU_RLAR_REGION_ENABLE ); /* Setup unprivileged flash as Read Only by both privileged and * unprivileged tasks. All tasks can read it but no-one can modify. */ - portMPU_RNR_REG = portUNPRIVILEGED_FLASH_REGION; - portMPU_RBAR_REG = ( ( ( uint32_t ) __unprivileged_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | - ( portMPU_REGION_NON_SHAREABLE ) | - ( portMPU_REGION_READ_ONLY ); - portMPU_RLAR_REG = ( ( ( uint32_t ) __unprivileged_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | - ( portMPU_RLAR_ATTR_INDEX0 ) | - ( portMPU_RLAR_REGION_ENABLE ); + portMPU_RNR_REG = portUNPRIVILEGED_FLASH_REGION; + portMPU_RBAR_REG = ( ( ( uint32_t ) __unprivileged_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | + ( portMPU_REGION_NON_SHAREABLE ) | + ( portMPU_REGION_READ_ONLY ); + portMPU_RLAR_REG = ( ( ( uint32_t ) __unprivileged_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | + ( portMPU_RLAR_ATTR_INDEX0 ) | + ( portMPU_RLAR_REGION_ENABLE ); /* Setup unprivileged syscalls flash as Read Only by both privileged * and unprivileged tasks. All tasks can read it but no-one can modify. */ - portMPU_RNR_REG = portUNPRIVILEGED_SYSCALLS_REGION; - portMPU_RBAR_REG = ( ( ( uint32_t ) __syscalls_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | - ( portMPU_REGION_NON_SHAREABLE ) | - ( portMPU_REGION_READ_ONLY ); - portMPU_RLAR_REG = ( ( ( uint32_t ) __syscalls_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | - ( portMPU_RLAR_ATTR_INDEX0 ) | - ( portMPU_RLAR_REGION_ENABLE ); + portMPU_RNR_REG = portUNPRIVILEGED_SYSCALLS_REGION; + portMPU_RBAR_REG = ( ( ( uint32_t ) __syscalls_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | + ( portMPU_REGION_NON_SHAREABLE ) | + ( portMPU_REGION_READ_ONLY ); + portMPU_RLAR_REG = ( ( ( uint32_t ) __syscalls_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | + ( portMPU_RLAR_ATTR_INDEX0 ) | + ( portMPU_RLAR_REGION_ENABLE ); /* Setup RAM containing kernel data for privileged access only. */ - portMPU_RNR_REG = portPRIVILEGED_RAM_REGION; - portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_sram_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | - ( portMPU_REGION_NON_SHAREABLE ) | - ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | - ( portMPU_REGION_EXECUTE_NEVER ); - portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_sram_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | - ( portMPU_RLAR_ATTR_INDEX0 ) | - ( portMPU_RLAR_REGION_ENABLE ); + portMPU_RNR_REG = portPRIVILEGED_RAM_REGION; + portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_sram_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | + ( portMPU_REGION_NON_SHAREABLE ) | + ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | + ( portMPU_REGION_EXECUTE_NEVER ); + portMPU_RLAR_REG = ( ( ( uint32_t ) __privileged_sram_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | + ( portMPU_RLAR_ATTR_INDEX0 ) | + ( portMPU_RLAR_REGION_ENABLE ); /* Enable mem fault. */ portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT; /* Enable MPU with privileged background access i.e. unmapped * regions have privileged access. */ - portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT ); + portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT ); } } #endif /* configENABLE_MPU */ @@ -771,24 +772,24 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO extern uint32_t * __syscalls_flash_end__; #else /* Declaration when these variable are exported from linker scripts. */ - extern uint32_t __syscalls_flash_start__[]; - extern uint32_t __syscalls_flash_end__[]; + extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; #endif /* defined( __ARMCC_VERSION ) */ #endif /* configENABLE_MPU */ - uint32_t ulPC; + uint32_t ulPC; #if ( configENABLE_TRUSTZONE == 1 ) - uint32_t ulR0; + uint32_t ulR0; #if ( configENABLE_MPU == 1 ) - uint32_t ulControl, ulIsTaskPrivileged; + uint32_t ulControl, ulIsTaskPrivileged; #endif /* configENABLE_MPU */ #endif /* configENABLE_TRUSTZONE */ uint8_t ucSVCNumber; /* Register are stored on the stack in the following order - R0, R1, R2, R3, * R12, LR, PC, xPSR. */ - ulPC = pulCallerStackAddress[ 6 ]; + ulPC = pulCallerStackAddress[ 6 ]; ucSVCNumber = ( ( uint8_t * ) ulPC )[ -2 ]; switch( ucSVCNumber ) @@ -801,22 +802,22 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO ulR0 = pulCallerStackAddress[ 0 ]; #if ( configENABLE_MPU == 1 ) - { - /* Read the CONTROL register value. */ - __asm volatile ( "mrs %0, control" : "=r" ( ulControl ) ); + { + /* Read the CONTROL register value. */ + __asm volatile ( "mrs %0, control" : "=r" ( ulControl ) ); - /* The task that raised the SVC is privileged if Bit[0] - * in the CONTROL register is 0. */ - ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 ); + /* The task that raised the SVC is privileged if Bit[0] + * in the CONTROL register is 0. */ + ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 ); - /* Allocate and load a context for the secure task. */ - xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged ); - } - #else /* if ( configENABLE_MPU == 1 ) */ - { - /* Allocate and load a context for the secure task. */ - xSecureContext = SecureContext_AllocateContext( ulR0 ); - } + /* Allocate and load a context for the secure task. */ + xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged ); + } + #else /* if ( configENABLE_MPU == 1 ) */ + { + /* Allocate and load a context for the secure task. */ + xSecureContext = SecureContext_AllocateContext( ulR0 ); + } #endif /* configENABLE_MPU */ configASSERT( xSecureContext != NULL ); @@ -834,21 +835,21 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO case portSVC_START_SCHEDULER: #if ( configENABLE_TRUSTZONE == 1 ) - { - /* De-prioritize the non-secure exceptions so that the - * non-secure pendSV runs at the lowest priority. */ - SecureInit_DePrioritizeNSExceptions(); + { + /* De-prioritize the non-secure exceptions so that the + * non-secure pendSV runs at the lowest priority. */ + SecureInit_DePrioritizeNSExceptions(); - /* Initialize the secure context management system. */ - SecureContext_Init(); - } + /* Initialize the secure context management system. */ + SecureContext_Init(); + } #endif /* configENABLE_TRUSTZONE */ #if ( configENABLE_FPU == 1 ) - { - /* Setup the Floating Point Unit (FPU). */ - prvSetupFPU(); - } + { + /* Setup the Floating Point Unit (FPU). */ + prvSetupFPU(); + } #endif /* configENABLE_FPU */ /* Setup the context of the first task so that the first task starts @@ -881,12 +882,12 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO StackType_t * pxEndOfStack, TaskFunction_t pxCode, void * pvParameters, - BaseType_t xRunPrivileged ) /* PRIVILEGED_FUNCTION */ + BaseType_t xRunPrivileged ) /* PRIVILEGED_FUNCTION */ #else StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, StackType_t * pxEndOfStack, TaskFunction_t pxCode, - void * pvParameters ) /* PRIVILEGED_FUNCTION */ + void * pvParameters ) /* PRIVILEGED_FUNCTION */ #endif /* configENABLE_MPU */ { /* Simulate the stack frame as it would be created by a context switch @@ -1015,7 +1016,7 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */ vPortSetupTimerInterrupt(); /* Initialize the critical nesting count ready for the first task. */ - ulCriticalNesting = 0; + ulCriticalNesting = 0; /* Start the first task. */ vStartFirstTask(); @@ -1049,10 +1050,10 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ uint32_t ulStackDepth ) { uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber; - int32_t lIndex = 0; + int32_t lIndex = 0; /* Setup MAIR0. */ - xMPUSettings->ulMAIR0 = ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK ); + xMPUSettings->ulMAIR0 = ( ( portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE << portMPU_MAIR_ATTR0_POS ) & portMPU_MAIR_ATTR0_MASK ); xMPUSettings->ulMAIR0 |= ( ( portMPU_DEVICE_MEMORY_nGnRE << portMPU_MAIR_ATTR1_POS ) & portMPU_MAIR_ATTR1_MASK ); /* This function is called automatically when the task is created - in @@ -1062,9 +1063,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ if( ulStackDepth > 0 ) { /* Define the region that allows access to the stack. */ - ulRegionStartAddress = ( ( uint32_t ) pxBottomOfStack ) & portMPU_RBAR_ADDRESS_MASK; - ulRegionEndAddress = ( uint32_t ) pxBottomOfStack + ( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) - 1; - ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; + ulRegionStartAddress = ( ( uint32_t ) pxBottomOfStack ) & portMPU_RBAR_ADDRESS_MASK; + ulRegionEndAddress = ( uint32_t ) pxBottomOfStack + ( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) - 1; + ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = ( ulRegionStartAddress ) | ( portMPU_REGION_NON_SHAREABLE ) | @@ -1087,9 +1088,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ /* Translate the generic region definition contained in xRegions * into the ARMv8 specific MPU settings that are then stored in * xMPUSettings. */ - ulRegionStartAddress = ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) & portMPU_RBAR_ADDRESS_MASK; - ulRegionEndAddress = ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1; - ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; + ulRegionStartAddress = ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) & portMPU_RBAR_ADDRESS_MASK; + ulRegionEndAddress = ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1; + ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; /* Start address. */ xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRBAR = ( ulRegionStartAddress ) | @@ -1142,7 +1143,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ BaseType_t xPortIsInsideInterrupt( void ) { - uint32_t ulCurrentInterrupt; + uint32_t ulCurrentInterrupt; BaseType_t xReturn; /* Obtain the number of the currently executing interrupt. Interrupt Program diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h b/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h index edb5bcfca..fdba1b177 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef __PORT_ASM_H__ diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h b/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h index 1c815550a..24f1e1455 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/IAR/ARM_CM4F/port.c b/portable/IAR/ARM_CM4F/port.c index ca3ae9035..003f0ea70 100644 --- a/portable/IAR/ARM_CM4F/port.c +++ b/portable/IAR/ARM_CM4F/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -139,13 +140,13 @@ static void prvTaskExitError( void ); /* Each task maintains its own interrupt status in the critical nesting * variable. */ -static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; +static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; /* * The number of SysTick increments that make up one tick period. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t ulTimerCountsForOneTick = 0; + static uint32_t ulTimerCountsForOneTick = 0; #endif /* configUSE_TICKLESS_IDLE */ /* @@ -153,7 +154,7 @@ static UBaseType_t uxCriticalNesting = 0xaaaaa * 24 bit resolution of the SysTick timer. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t xMaximumPossibleSuppressedTicks = 0; + static uint32_t xMaximumPossibleSuppressedTicks = 0; #endif /* configUSE_TICKLESS_IDLE */ /* @@ -161,7 +162,7 @@ static UBaseType_t uxCriticalNesting = 0xaaaaa * power functionality only. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t ulStoppedTimerCompensation = 0; + static uint32_t ulStoppedTimerCompensation = 0; #endif /* configUSE_TICKLESS_IDLE */ /* @@ -170,8 +171,8 @@ static UBaseType_t uxCriticalNesting = 0xaaaaa * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY. */ #if ( configASSERT_DEFINED == 1 ) - static uint8_t ucMaxSysCallPriority = 0; - static uint32_t ulMaxPRIGROUPValue = 0; + static uint8_t ucMaxSysCallPriority = 0; + static uint32_t ulMaxPRIGROUPValue = 0; static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16; #endif /* configASSERT_DEFINED */ @@ -246,9 +247,9 @@ BaseType_t xPortStartScheduler( void ) #if ( configASSERT_DEFINED == 1 ) { - volatile uint32_t ulOriginalPriority; + volatile uint32_t ulOriginalPriority; volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER ); - volatile uint8_t ucMaxPriorityValue; + volatile uint8_t ucMaxPriorityValue; /* Determine the maximum priority from which ISR safe FreeRTOS API * functions can be called. ISR safe functions are those that end in @@ -256,21 +257,21 @@ BaseType_t xPortStartScheduler( void ) * ensure interrupt entry is as fast and simple as possible. * * Save the interrupt priority value that is about to be clobbered. */ - ulOriginalPriority = *pucFirstUserPriorityRegister; + ulOriginalPriority = *pucFirstUserPriorityRegister; /* Determine the number of priority bits available. First write to all * possible bits. */ *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE; /* Read the value back to see how many bits stuck. */ - ucMaxPriorityValue = *pucFirstUserPriorityRegister; + ucMaxPriorityValue = *pucFirstUserPriorityRegister; /* Use the same mask on the maximum system call priority. */ - ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; + ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; /* Calculate the maximum acceptable priority group value for the number * of bits read back. */ - ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS; + ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS; while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE ) { @@ -298,8 +299,8 @@ BaseType_t xPortStartScheduler( void ) /* Shift the priority group value back to its position within the AIRCR * register. */ - ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; - ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; + ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; + ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; /* Restore the clobbered interrupt priority register to its original * value. */ @@ -316,13 +317,13 @@ BaseType_t xPortStartScheduler( void ) vPortSetupTimerInterrupt(); /* Initialise the critical nesting count ready for the first task. */ - uxCriticalNesting = 0; + uxCriticalNesting = 0; /* Ensure the VFP is enabled - it should be anyway. */ vPortEnableVFP(); /* Lazy save always. */ - *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS; + *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS; /* Start the first task. */ vPortStartFirstTask(); @@ -393,7 +394,7 @@ void xPortSysTickHandler( void ) __weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ) { - uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; + uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; TickType_t xModifiableIdleTime; /* Make sure the SysTick reload value does not overflow the counter. */ @@ -411,7 +412,7 @@ void xPortSysTickHandler( void ) /* Calculate the reload value required to wait xExpectedIdleTime * tick periods. -1 is used because this code will execute part way * through one of the tick periods. */ - ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); + ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); if( ulReloadValue > ulStoppedTimerCompensation ) { @@ -430,14 +431,14 @@ void xPortSysTickHandler( void ) { /* Restart from whatever is left in the count register to complete * this tick period. */ - portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; + portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; /* Restart SysTick. */ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Reset the reload register to the value required for normal tick * periods. */ - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Re-enable interrupts - see comments above __disable_interrupt() * call above. */ @@ -446,21 +447,21 @@ void xPortSysTickHandler( void ) else { /* Set the new reload value. */ - portNVIC_SYSTICK_LOAD_REG = ulReloadValue; + portNVIC_SYSTICK_LOAD_REG = ulReloadValue; /* Clear the SysTick count flag and set the count value back to * zero. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Restart SysTick. */ - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can * set its parameter to 0 to indicate that its implementation contains * its own wait for interrupt or wait for event instruction, and so wfi * should not be executed again. However, the original expected idle * time variable must remain unmodified, so a copy is taken. */ - xModifiableIdleTime = xExpectedIdleTime; + xModifiableIdleTime = xExpectedIdleTime; configPRE_SLEEP_PROCESSING( xModifiableIdleTime ); if( xModifiableIdleTime > 0 ) @@ -494,7 +495,7 @@ void xPortSysTickHandler( void ) * be, but using the tickless mode will inevitably result in some tiny * drift of the time maintained by the kernel with respect to calendar * time*/ - portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); /* Determine if the SysTick clock has already counted to zero and * been set back to the current reload value (the reload back being @@ -509,7 +510,7 @@ void xPortSysTickHandler( void ) * reloaded with ulReloadValue. Reset the * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick * period. */ - ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); + ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); /* Don't allow a tiny value, or values that have somehow * underflowed because the post sleep hook did something @@ -524,7 +525,7 @@ void xPortSysTickHandler( void ) /* As the pending tick will be processed as soon as this * function exits, the tick value maintained by the tick is stepped * forward by one less than the time spent waiting. */ - ulCompleteTickPeriods = xExpectedIdleTime - 1UL; + ulCompleteTickPeriods = xExpectedIdleTime - 1UL; } else { @@ -536,20 +537,20 @@ void xPortSysTickHandler( void ) /* How many complete tick periods passed while the processor * was waiting? */ - ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; + ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; /* The reload value is set to whatever fraction of a single tick * period remains. */ - portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; + portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; } /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard * value. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; vTaskStepTick( ulCompleteTickPeriods ); - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Exit with interrupts enabled. */ __enable_interrupt(); @@ -568,19 +569,19 @@ __weak void vPortSetupTimerInterrupt( void ) /* Calculate the constants required to configure the tick interrupt. */ #if ( configUSE_TICKLESS_IDLE == 1 ) { - ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); + ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick; - ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); + ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); } #endif /* configUSE_TICKLESS_IDLE */ /* Stop and clear the SysTick. */ - portNVIC_SYSTICK_CTRL_REG = 0UL; + portNVIC_SYSTICK_CTRL_REG = 0UL; portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Configure SysTick to interrupt at the requested rate. */ - portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; - portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT ); + portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT ); } /*-----------------------------------------------------------*/ @@ -589,7 +590,7 @@ __weak void vPortSetupTimerInterrupt( void ) void vPortValidateInterruptPriority( void ) { uint32_t ulCurrentInterrupt; - uint8_t ucCurrentPriority; + uint8_t ucCurrentPriority; /* Obtain the number of the currently executing interrupt. */ __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" ); diff --git a/portable/IAR/ARM_CM4F/portmacro.h b/portable/IAR/ARM_CM4F/portmacro.h index 2991da8f2..65a37c0c0 100644 --- a/portable/IAR/ARM_CM4F/portmacro.h +++ b/portable/IAR/ARM_CM4F/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H @@ -116,7 +117,7 @@ /*-----------------------------------------------------------*/ - #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( ( uint32_t ) __CLZ( ( uxReadyPriorities ) ) ) ) + #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( ( uint32_t ) __CLZ( ( uxReadyPriorities ) ) ) ) #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ /*-----------------------------------------------------------*/ @@ -172,7 +173,7 @@ portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void ) { - uint32_t ulCurrentInterrupt; + uint32_t ulCurrentInterrupt; BaseType_t xReturn; /* Obtain the number of the currently executing interrupt. */ diff --git a/portable/IAR/ARM_CM4F_MPU/port.c b/portable/IAR/ARM_CM4F_MPU/port.c index 71b06fbac..75362ee61 100644 --- a/portable/IAR/ARM_CM4F_MPU/port.c +++ b/portable/IAR/ARM_CM4F_MPU/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -199,7 +200,7 @@ extern void vPortResetPrivilege( BaseType_t xRunningPrivileged ); /* Each task maintains its own interrupt status in the critical nesting * variable. */ -static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; +static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; /* * Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure @@ -207,8 +208,8 @@ static UBaseType_t uxCriticalNesting = 0xaaaaa * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY. */ #if ( configASSERT_DEFINED == 1 ) - static uint8_t ucMaxSysCallPriority = 0; - static uint32_t ulMaxPRIGROUPValue = 0; + static uint8_t ucMaxSysCallPriority = 0; + static uint32_t ulMaxPRIGROUPValue = 0; static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16; #endif /* configASSERT_DEFINED */ @@ -261,8 +262,8 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, void vPortSVCHandler_C( uint32_t * pulParam ) { - uint8_t ucSVCNumber; - uint32_t ulPC; + uint8_t ucSVCNumber; + uint32_t ulPC; #if ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) extern uint32_t __syscalls_flash_start__[]; @@ -271,7 +272,7 @@ void vPortSVCHandler_C( uint32_t * pulParam ) /* The stack contains: r0, r1, r2, r3, r12, LR, PC and xPSR. The first * argument (r0) is pulParam[ 0 ]. */ - ulPC = pulParam[ portOFFSET_TO_PC ]; + ulPC = pulParam[ portOFFSET_TO_PC ]; ucSVCNumber = ( ( uint8_t * ) ulPC )[ -2 ]; switch( ucSVCNumber ) @@ -346,9 +347,9 @@ BaseType_t xPortStartScheduler( void ) #if ( configASSERT_DEFINED == 1 ) { - volatile uint32_t ulOriginalPriority; + volatile uint32_t ulOriginalPriority; volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER ); - volatile uint8_t ucMaxPriorityValue; + volatile uint8_t ucMaxPriorityValue; /* Determine the maximum priority from which ISR safe FreeRTOS API * functions can be called. ISR safe functions are those that end in @@ -356,21 +357,21 @@ BaseType_t xPortStartScheduler( void ) * ensure interrupt entry is as fast and simple as possible. * * Save the interrupt priority value that is about to be clobbered. */ - ulOriginalPriority = *pucFirstUserPriorityRegister; + ulOriginalPriority = *pucFirstUserPriorityRegister; /* Determine the number of priority bits available. First write to all * possible bits. */ *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE; /* Read the value back to see how many bits stuck. */ - ucMaxPriorityValue = *pucFirstUserPriorityRegister; + ucMaxPriorityValue = *pucFirstUserPriorityRegister; /* Use the same mask on the maximum system call priority. */ - ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; + ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; /* Calculate the maximum acceptable priority group value for the number * of bits read back. */ - ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS; + ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS; while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE ) { @@ -398,8 +399,8 @@ BaseType_t xPortStartScheduler( void ) /* Shift the priority group value back to its position within the AIRCR * register. */ - ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; - ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; + ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; + ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; /* Restore the clobbered interrupt priority register to its original * value. */ @@ -419,13 +420,13 @@ BaseType_t xPortStartScheduler( void ) vPortSetupTimerInterrupt(); /* Initialise the critical nesting count ready for the first task. */ - uxCriticalNesting = 0; + uxCriticalNesting = 0; /* Ensure the VFP is enabled - it should be anyway. */ vPortEnableVFP(); /* Lazy save always. */ - *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS; + *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS; /* Start the first task. */ vPortStartFirstTask(); @@ -508,12 +509,12 @@ void xPortSysTickHandler( void ) __weak void vPortSetupTimerInterrupt( void ) { /* Stop and clear the SysTick. */ - portNVIC_SYSTICK_CTRL_REG = 0UL; + portNVIC_SYSTICK_CTRL_REG = 0UL; portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Configure SysTick to interrupt at the requested rate. */ - portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; - portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT ); + portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT ); } /*-----------------------------------------------------------*/ @@ -534,10 +535,10 @@ static void prvSetupMPU( void ) ( portMPU_REGION_VALID ) | ( portUNPRIVILEGED_FLASH_REGION ); - portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_READ_ONLY ) | - ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | - ( prvGetMPURegionSizeSetting( ( uint32_t ) __FLASH_segment_end__ - ( uint32_t ) __FLASH_segment_start__ ) ) | - ( portMPU_REGION_ENABLE ); + portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_READ_ONLY ) | + ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | + ( prvGetMPURegionSizeSetting( ( uint32_t ) __FLASH_segment_end__ - ( uint32_t ) __FLASH_segment_start__ ) ) | + ( portMPU_REGION_ENABLE ); /* Setup the privileged flash for privileged only access. This is where * the kernel code is placed. */ @@ -545,10 +546,10 @@ static void prvSetupMPU( void ) ( portMPU_REGION_VALID ) | ( portPRIVILEGED_FLASH_REGION ); - portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_PRIVILEGED_READ_ONLY ) | - ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | - ( prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_functions_end__ - ( uint32_t ) __privileged_functions_start__ ) ) | - ( portMPU_REGION_ENABLE ); + portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_PRIVILEGED_READ_ONLY ) | + ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | + ( prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_functions_end__ - ( uint32_t ) __privileged_functions_start__ ) ) | + ( portMPU_REGION_ENABLE ); /* Setup the privileged data RAM region. This is where the kernel data * is placed. */ @@ -556,10 +557,10 @@ static void prvSetupMPU( void ) ( portMPU_REGION_VALID ) | ( portPRIVILEGED_RAM_REGION ); - portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | - ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | - prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) | - ( portMPU_REGION_ENABLE ); + portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | + ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | + prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) | + ( portMPU_REGION_ENABLE ); /* By default allow everything to access the general peripherals. The * system peripherals and registers are protected. */ @@ -567,15 +568,15 @@ static void prvSetupMPU( void ) ( portMPU_REGION_VALID ) | ( portGENERAL_PERIPHERALS_REGION ); - portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) | - ( prvGetMPURegionSizeSetting( portPERIPHERALS_END_ADDRESS - portPERIPHERALS_START_ADDRESS ) ) | - ( portMPU_REGION_ENABLE ); + portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) | + ( prvGetMPURegionSizeSetting( portPERIPHERALS_END_ADDRESS - portPERIPHERALS_START_ADDRESS ) ) | + ( portMPU_REGION_ENABLE ); /* Enable the memory fault exception. */ - portNVIC_SYS_CTRL_STATE_REG |= portNVIC_MEM_FAULT_ENABLE; + portNVIC_SYS_CTRL_STATE_REG |= portNVIC_MEM_FAULT_ENABLE; /* Enable the MPU with the background region configured. */ - portMPU_CTRL_REG |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE ); + portMPU_CTRL_REG |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE ); } } /*-----------------------------------------------------------*/ @@ -613,8 +614,8 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, extern uint32_t __SRAM_segment_end__[]; extern uint32_t __privileged_data_start__[]; extern uint32_t __privileged_data_end__[]; - int32_t lIndex; - uint32_t ul; + int32_t lIndex; + uint32_t ul; if( xRegions == NULL ) { @@ -624,7 +625,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, ( portMPU_REGION_VALID ) | ( portSTACK_REGION ); - xMPUSettings->xRegion[ 0 ].ulRegionAttribute = + xMPUSettings->xRegion[ 0 ].ulRegionAttribute = ( portMPU_REGION_READ_WRITE ) | ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | ( prvGetMPURegionSizeSetting( ( uint32_t ) __SRAM_segment_end__ - ( uint32_t ) __SRAM_segment_start__ ) ) | @@ -637,7 +638,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, ( portMPU_REGION_VALID ) | ( portSTACK_REGION + 1 ); - xMPUSettings->xRegion[ 1 ].ulRegionAttribute = + xMPUSettings->xRegion[ 1 ].ulRegionAttribute = ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) | @@ -647,7 +648,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, for( ul = 2; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ ) { xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID; - xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL; + xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL; } } else @@ -664,7 +665,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, ( portMPU_REGION_VALID ) | ( portSTACK_REGION ); /* Region number. */ - xMPUSettings->xRegion[ 0 ].ulRegionAttribute = + xMPUSettings->xRegion[ 0 ].ulRegionAttribute = ( portMPU_REGION_READ_WRITE ) | /* Read and write. */ ( prvGetMPURegionSizeSetting( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) ) | ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | @@ -685,7 +686,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, ( portMPU_REGION_VALID ) | ( portSTACK_REGION + ul ); /* Region number. */ - xMPUSettings->xRegion[ ul ].ulRegionAttribute = + xMPUSettings->xRegion[ ul ].ulRegionAttribute = ( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) | ( xRegions[ lIndex ].ulParameters ) | ( portMPU_REGION_ENABLE ); @@ -694,7 +695,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, { /* Invalidate the region. */ xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID; - xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL; + xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL; } lIndex++; @@ -708,7 +709,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, void vPortValidateInterruptPriority( void ) { uint32_t ulCurrentInterrupt; - uint8_t ucCurrentPriority; + uint8_t ucCurrentPriority; /* Obtain the number of the currently executing interrupt. */ __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" ); diff --git a/portable/IAR/ARM_CM4F_MPU/portmacro.h b/portable/IAR/ARM_CM4F_MPU/portmacro.h index e1fccb047..d73c3f2d3 100644 --- a/portable/IAR/ARM_CM4F_MPU/portmacro.h +++ b/portable/IAR/ARM_CM4F_MPU/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ @@ -153,7 +154,7 @@ /*-----------------------------------------------------------*/ - #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( ( uint32_t ) __CLZ( ( uxReadyPriorities ) ) ) ) + #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( ( uint32_t ) __CLZ( ( uxReadyPriorities ) ) ) ) #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ /*-----------------------------------------------------------*/ @@ -201,7 +202,7 @@ portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void ) { - uint32_t ulCurrentInterrupt; + uint32_t ulCurrentInterrupt; BaseType_t xReturn; /* Obtain the number of the currently executing interrupt. */ diff --git a/portable/IAR/ARM_CM7/r0p1/port.c b/portable/IAR/ARM_CM7/r0p1/port.c index e1201c13f..6fe789406 100644 --- a/portable/IAR/ARM_CM7/r0p1/port.c +++ b/portable/IAR/ARM_CM7/r0p1/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -133,13 +134,13 @@ static void prvTaskExitError( void ); /* Each task maintains its own interrupt status in the critical nesting * variable. */ -static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; +static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; /* * The number of SysTick increments that make up one tick period. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t ulTimerCountsForOneTick = 0; + static uint32_t ulTimerCountsForOneTick = 0; #endif /* configUSE_TICKLESS_IDLE */ /* @@ -147,7 +148,7 @@ static UBaseType_t uxCriticalNesting = 0xaaaaa * 24 bit resolution of the SysTick timer. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t xMaximumPossibleSuppressedTicks = 0; + static uint32_t xMaximumPossibleSuppressedTicks = 0; #endif /* configUSE_TICKLESS_IDLE */ /* @@ -155,7 +156,7 @@ static UBaseType_t uxCriticalNesting = 0xaaaaa * power functionality only. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t ulStoppedTimerCompensation = 0; + static uint32_t ulStoppedTimerCompensation = 0; #endif /* configUSE_TICKLESS_IDLE */ /* @@ -164,8 +165,8 @@ static UBaseType_t uxCriticalNesting = 0xaaaaa * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY. */ #if ( configASSERT_DEFINED == 1 ) - static uint8_t ucMaxSysCallPriority = 0; - static uint32_t ulMaxPRIGROUPValue = 0; + static uint8_t ucMaxSysCallPriority = 0; + static uint32_t ulMaxPRIGROUPValue = 0; static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16; #endif /* configASSERT_DEFINED */ @@ -234,9 +235,9 @@ BaseType_t xPortStartScheduler( void ) #if ( configASSERT_DEFINED == 1 ) { - volatile uint32_t ulOriginalPriority; + volatile uint32_t ulOriginalPriority; volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER ); - volatile uint8_t ucMaxPriorityValue; + volatile uint8_t ucMaxPriorityValue; /* Determine the maximum priority from which ISR safe FreeRTOS API * functions can be called. ISR safe functions are those that end in @@ -244,21 +245,21 @@ BaseType_t xPortStartScheduler( void ) * ensure interrupt entry is as fast and simple as possible. * * Save the interrupt priority value that is about to be clobbered. */ - ulOriginalPriority = *pucFirstUserPriorityRegister; + ulOriginalPriority = *pucFirstUserPriorityRegister; /* Determine the number of priority bits available. First write to all * possible bits. */ *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE; /* Read the value back to see how many bits stuck. */ - ucMaxPriorityValue = *pucFirstUserPriorityRegister; + ucMaxPriorityValue = *pucFirstUserPriorityRegister; /* Use the same mask on the maximum system call priority. */ - ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; + ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; /* Calculate the maximum acceptable priority group value for the number * of bits read back. */ - ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS; + ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS; while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE ) { @@ -286,8 +287,8 @@ BaseType_t xPortStartScheduler( void ) /* Shift the priority group value back to its position within the AIRCR * register. */ - ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; - ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; + ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; + ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; /* Restore the clobbered interrupt priority register to its original * value. */ @@ -304,13 +305,13 @@ BaseType_t xPortStartScheduler( void ) vPortSetupTimerInterrupt(); /* Initialise the critical nesting count ready for the first task. */ - uxCriticalNesting = 0; + uxCriticalNesting = 0; /* Ensure the VFP is enabled - it should be anyway. */ vPortEnableVFP(); /* Lazy save always. */ - *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS; + *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS; /* Start the first task. */ vPortStartFirstTask(); @@ -381,7 +382,7 @@ void xPortSysTickHandler( void ) __weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ) { - uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; + uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; TickType_t xModifiableIdleTime; /* Make sure the SysTick reload value does not overflow the counter. */ @@ -399,7 +400,7 @@ void xPortSysTickHandler( void ) /* Calculate the reload value required to wait xExpectedIdleTime * tick periods. -1 is used because this code will execute part way * through one of the tick periods. */ - ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); + ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); if( ulReloadValue > ulStoppedTimerCompensation ) { @@ -418,14 +419,14 @@ void xPortSysTickHandler( void ) { /* Restart from whatever is left in the count register to complete * this tick period. */ - portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; + portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; /* Restart SysTick. */ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Reset the reload register to the value required for normal tick * periods. */ - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Re-enable interrupts - see comments above __disable_interrupt() * call above. */ @@ -434,21 +435,21 @@ void xPortSysTickHandler( void ) else { /* Set the new reload value. */ - portNVIC_SYSTICK_LOAD_REG = ulReloadValue; + portNVIC_SYSTICK_LOAD_REG = ulReloadValue; /* Clear the SysTick count flag and set the count value back to * zero. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Restart SysTick. */ - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can * set its parameter to 0 to indicate that its implementation contains * its own wait for interrupt or wait for event instruction, and so wfi * should not be executed again. However, the original expected idle * time variable must remain unmodified, so a copy is taken. */ - xModifiableIdleTime = xExpectedIdleTime; + xModifiableIdleTime = xExpectedIdleTime; configPRE_SLEEP_PROCESSING( xModifiableIdleTime ); if( xModifiableIdleTime > 0 ) @@ -482,7 +483,7 @@ void xPortSysTickHandler( void ) * be, but using the tickless mode will inevitably result in some tiny * drift of the time maintained by the kernel with respect to calendar * time*/ - portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); /* Determine if the SysTick clock has already counted to zero and * been set back to the current reload value (the reload back being @@ -497,7 +498,7 @@ void xPortSysTickHandler( void ) * reloaded with ulReloadValue. Reset the * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick * period. */ - ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); + ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); /* Don't allow a tiny value, or values that have somehow * underflowed because the post sleep hook did something @@ -512,7 +513,7 @@ void xPortSysTickHandler( void ) /* As the pending tick will be processed as soon as this * function exits, the tick value maintained by the tick is stepped * forward by one less than the time spent waiting. */ - ulCompleteTickPeriods = xExpectedIdleTime - 1UL; + ulCompleteTickPeriods = xExpectedIdleTime - 1UL; } else { @@ -524,20 +525,20 @@ void xPortSysTickHandler( void ) /* How many complete tick periods passed while the processor * was waiting? */ - ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; + ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; /* The reload value is set to whatever fraction of a single tick * period remains. */ - portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; + portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; } /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard * value. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; vTaskStepTick( ulCompleteTickPeriods ); - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Exit with interrupts enabled. */ __enable_interrupt(); @@ -556,19 +557,19 @@ __weak void vPortSetupTimerInterrupt( void ) /* Calculate the constants required to configure the tick interrupt. */ #if ( configUSE_TICKLESS_IDLE == 1 ) { - ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); + ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick; - ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); + ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); } #endif /* configUSE_TICKLESS_IDLE */ /* Stop and clear the SysTick. */ - portNVIC_SYSTICK_CTRL_REG = 0UL; + portNVIC_SYSTICK_CTRL_REG = 0UL; portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Configure SysTick to interrupt at the requested rate. */ - portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; - portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT ); + portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT ); } /*-----------------------------------------------------------*/ @@ -577,7 +578,7 @@ __weak void vPortSetupTimerInterrupt( void ) void vPortValidateInterruptPriority( void ) { uint32_t ulCurrentInterrupt; - uint8_t ucCurrentPriority; + uint8_t ucCurrentPriority; /* Obtain the number of the currently executing interrupt. */ __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" ); diff --git a/portable/IAR/ARM_CM7/r0p1/portmacro.h b/portable/IAR/ARM_CM7/r0p1/portmacro.h index 2be61170f..cecd2867a 100644 --- a/portable/IAR/ARM_CM7/r0p1/portmacro.h +++ b/portable/IAR/ARM_CM7/r0p1/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H @@ -116,7 +117,7 @@ /*-----------------------------------------------------------*/ - #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( ( uint32_t ) __CLZ( ( uxReadyPriorities ) ) ) ) + #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( ( uint32_t ) __CLZ( ( uxReadyPriorities ) ) ) ) #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ /*-----------------------------------------------------------*/ @@ -175,7 +176,7 @@ portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void ) { - uint32_t ulCurrentInterrupt; + uint32_t ulCurrentInterrupt; BaseType_t xReturn; /* Obtain the number of the currently executing interrupt. */ diff --git a/portable/IAR/ARM_CRx_No_GIC/port.c b/portable/IAR/ARM_CRx_No_GIC/port.c index 1f66dac04..d436fc56d 100644 --- a/portable/IAR/ARM_CRx_No_GIC/port.c +++ b/portable/IAR/ARM_CRx_No_GIC/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Standard includes. */ @@ -98,18 +99,18 @@ static void prvTaskExitError( void ); * a non zero value to ensure interrupts don't inadvertently become unmasked before * the scheduler starts. As it is stored as part of the task context it will * automatically be set to 0 when the first task is started. */ -volatile uint32_t ulCriticalNesting = 9999UL; +volatile uint32_t ulCriticalNesting = 9999UL; /* Saved as part of the task context. If ulPortTaskHasFPUContext is non-zero then * a floating point context must be saved and restored for the task. */ volatile uint32_t ulPortTaskHasFPUContext = pdFALSE; /* Set to 1 to pend a context switch from an ISR. */ -volatile uint32_t ulPortYieldRequired = pdFALSE; +volatile uint32_t ulPortYieldRequired = pdFALSE; /* Counts the interrupt nesting depth. A context switch is only performed if * if the nesting depth is 0. */ -volatile uint32_t ulPortInterruptNesting = 0UL; +volatile uint32_t ulPortInterruptNesting = 0UL; /*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CRx_No_GIC/portmacro.h b/portable/IAR/ARM_CRx_No_GIC/portmacro.h index 148a959a9..7ffd835d9 100644 --- a/portable/IAR/ARM_CRx_No_GIC/portmacro.h +++ b/portable/IAR/ARM_CRx_No_GIC/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H @@ -161,7 +162,7 @@ /*-----------------------------------------------------------*/ - #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __CLZ( uxReadyPriorities ) ) + #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __CLZ( uxReadyPriorities ) ) #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ diff --git a/portable/IAR/ATMega323/port.c b/portable/IAR/ATMega323/port.c index 6837e5427..3f448864d 100644 --- a/portable/IAR/ATMega323/port.c +++ b/portable/IAR/ATMega323/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #include @@ -73,22 +74,22 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, TaskFunction_t pxCode, void * pvParameters ) { - uint16_t usAddress; + uint16_t usAddress; StackType_t * pxTopOfHardwareStack; /* Place a few bytes of known values on the bottom of the stack. * This is just useful for debugging. */ - *pxTopOfStack = 0x11; + *pxTopOfStack = 0x11; pxTopOfStack--; - *pxTopOfStack = 0x22; + *pxTopOfStack = 0x22; pxTopOfStack--; - *pxTopOfStack = 0x33; + *pxTopOfStack = 0x33; pxTopOfStack--; /* Remember where the top of the hardware stack is - this is required * below. */ - pxTopOfHardwareStack = pxTopOfStack; + pxTopOfHardwareStack = pxTopOfStack; /* Simulate how the stack would look after a call to vPortYield(). */ @@ -112,19 +113,19 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, * * The first part of the stack is the hardware stack. Place the start * address of the task on the hardware stack. */ - usAddress = ( uint16_t ) pxCode; - *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff ); + usAddress = ( uint16_t ) pxCode; + *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff ); pxTopOfStack--; - usAddress >>= 8; - *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff ); + usAddress >>= 8; + *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff ); pxTopOfStack--; /* Leave enough space for the hardware stack before starting the software * stack. The '- 2' is because we have already used two spaces for the * address of the start of the task. */ - pxTopOfStack -= ( configCALL_STACK_SIZE - 2 ); + pxTopOfStack -= ( configCALL_STACK_SIZE - 2 ); @@ -132,98 +133,98 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, * portSAVE_CONTEXT places the flags on the stack immediately after r0 * to ensure the interrupts get disabled as soon as possible, and so ensuring * the stack use is minimal should a context switch interrupt occur. */ - *pxTopOfStack = ( StackType_t ) 0x00; /* R0 */ + *pxTopOfStack = ( StackType_t ) 0x00; /* R0 */ pxTopOfStack--; - *pxTopOfStack = portFLAGS_INT_ENABLED; + *pxTopOfStack = portFLAGS_INT_ENABLED; pxTopOfStack--; /* Next place the address of the hardware stack. This is required so * the AVR stack pointer can be restored to point to the hardware stack. */ pxTopOfHardwareStack -= portBYTES_USED_BY_RETURN_ADDRESS; - usAddress = ( uint16_t ) pxTopOfHardwareStack; + usAddress = ( uint16_t ) pxTopOfHardwareStack; /* SPL */ - *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff ); + *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff ); pxTopOfStack--; /* SPH */ - usAddress >>= 8; - *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff ); + usAddress >>= 8; + *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff ); pxTopOfStack--; /* Now the remaining registers. */ - *pxTopOfStack = ( StackType_t ) 0x01; /* R1 */ + *pxTopOfStack = ( StackType_t ) 0x01; /* R1 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x02; /* R2 */ + *pxTopOfStack = ( StackType_t ) 0x02; /* R2 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x03; /* R3 */ + *pxTopOfStack = ( StackType_t ) 0x03; /* R3 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x04; /* R4 */ + *pxTopOfStack = ( StackType_t ) 0x04; /* R4 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x05; /* R5 */ + *pxTopOfStack = ( StackType_t ) 0x05; /* R5 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x06; /* R6 */ + *pxTopOfStack = ( StackType_t ) 0x06; /* R6 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x07; /* R7 */ + *pxTopOfStack = ( StackType_t ) 0x07; /* R7 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x08; /* R8 */ + *pxTopOfStack = ( StackType_t ) 0x08; /* R8 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x09; /* R9 */ + *pxTopOfStack = ( StackType_t ) 0x09; /* R9 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x10; /* R10 */ + *pxTopOfStack = ( StackType_t ) 0x10; /* R10 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x11; /* R11 */ + *pxTopOfStack = ( StackType_t ) 0x11; /* R11 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x12; /* R12 */ + *pxTopOfStack = ( StackType_t ) 0x12; /* R12 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x13; /* R13 */ + *pxTopOfStack = ( StackType_t ) 0x13; /* R13 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x14; /* R14 */ + *pxTopOfStack = ( StackType_t ) 0x14; /* R14 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x15; /* R15 */ + *pxTopOfStack = ( StackType_t ) 0x15; /* R15 */ pxTopOfStack--; /* Place the parameter on the stack in the expected location. */ - usAddress = ( uint16_t ) pvParameters; - *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff ); + usAddress = ( uint16_t ) pvParameters; + *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff ); pxTopOfStack--; - usAddress >>= 8; - *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff ); + usAddress >>= 8; + *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff ); pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x18; /* R18 */ + *pxTopOfStack = ( StackType_t ) 0x18; /* R18 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x19; /* R19 */ + *pxTopOfStack = ( StackType_t ) 0x19; /* R19 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x20; /* R20 */ + *pxTopOfStack = ( StackType_t ) 0x20; /* R20 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x21; /* R21 */ + *pxTopOfStack = ( StackType_t ) 0x21; /* R21 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x22; /* R22 */ + *pxTopOfStack = ( StackType_t ) 0x22; /* R22 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x23; /* R23 */ + *pxTopOfStack = ( StackType_t ) 0x23; /* R23 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x24; /* R24 */ + *pxTopOfStack = ( StackType_t ) 0x24; /* R24 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x25; /* R25 */ + *pxTopOfStack = ( StackType_t ) 0x25; /* R25 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x26; /* R26 X */ + *pxTopOfStack = ( StackType_t ) 0x26; /* R26 X */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x27; /* R27 */ + *pxTopOfStack = ( StackType_t ) 0x27; /* R27 */ pxTopOfStack--; /* The Y register is not stored as it is used as the software stack and * gets saved into the task control block. */ - *pxTopOfStack = ( StackType_t ) 0x30; /* R30 Z */ + *pxTopOfStack = ( StackType_t ) 0x30; /* R30 Z */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x031; /* R31 */ + *pxTopOfStack = ( StackType_t ) 0x031; /* R31 */ pxTopOfStack--; - *pxTopOfStack = portNO_CRITICAL_NESTING; /* Critical nesting is zero when the task starts. */ + *pxTopOfStack = portNO_CRITICAL_NESTING; /* Critical nesting is zero when the task starts. */ /*lint +e950 +e611 +e923 */ @@ -259,34 +260,34 @@ void vPortEndScheduler( void ) static void prvSetupTimerInterrupt( void ) { uint32_t ulCompareMatch; - uint8_t ucHighByte, ucLowByte; + uint8_t ucHighByte, ucLowByte; /* Using 16bit timer 1 to generate the tick. Correct fuses must be * selected for the configCPU_CLOCK_HZ clock. */ - ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ; + ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ; /* We only have 16 bits so have to scale to get our required tick rate. */ - ulCompareMatch /= portCLOCK_PRESCALER; + ulCompareMatch /= portCLOCK_PRESCALER; /* Adjust for correct value. */ - ulCompareMatch -= ( uint32_t ) 1; + ulCompareMatch -= ( uint32_t ) 1; /* Setup compare match value for compare match A. Interrupts are disabled * before this is called so we need not worry here. */ - ucLowByte = ( uint8_t ) ( ulCompareMatch & ( uint32_t ) 0xff ); + ucLowByte = ( uint8_t ) ( ulCompareMatch & ( uint32_t ) 0xff ); ulCompareMatch >>= 8; - ucHighByte = ( uint8_t ) ( ulCompareMatch & ( uint32_t ) 0xff ); - OCR1AH = ucHighByte; - OCR1AL = ucLowByte; + ucHighByte = ( uint8_t ) ( ulCompareMatch & ( uint32_t ) 0xff ); + OCR1AH = ucHighByte; + OCR1AL = ucLowByte; /* Setup clock source and compare match behaviour. */ - ucLowByte = portCLEAR_COUNTER_ON_MATCH | portPRESCALE_64; - TCCR1B = ucLowByte; + ucLowByte = portCLEAR_COUNTER_ON_MATCH | portPRESCALE_64; + TCCR1B = ucLowByte; /* Enable the interrupt - this is okay as interrupt are currently globally * disabled. */ - TIMSK |= portCOMPARE_MATCH_A_INTERRUPT_ENABLE; + TIMSK |= portCOMPARE_MATCH_A_INTERRUPT_ENABLE; } /*-----------------------------------------------------------*/ diff --git a/portable/IAR/ATMega323/portmacro.h b/portable/IAR/ATMega323/portmacro.h index 84d35fcea..df8358fbe 100644 --- a/portable/IAR/ATMega323/portmacro.h +++ b/portable/IAR/ATMega323/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* diff --git a/portable/IAR/AVR32_UC3/port.c b/portable/IAR/AVR32_UC3/port.c index 60fbb3dc9..5b4e0e968 100644 --- a/portable/IAR/AVR32_UC3/port.c +++ b/portable/IAR/AVR32_UC3/port.c @@ -37,6 +37,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ @@ -107,13 +108,13 @@ int __low_level_init( void ) /* Code section present if and only if the debug trace is activated. */ #if configDBG { - static const gpio_map_t DBG_USART_GPIO_MAP = + static const gpio_map_t DBG_USART_GPIO_MAP = { { configDBG_USART_RX_PIN, configDBG_USART_RX_FUNCTION }, { configDBG_USART_TX_PIN, configDBG_USART_TX_FUNCTION } }; - static const usart_options_t DBG_USART_OPTIONS = + static const usart_options_t DBG_USART_OPTIONS = { .baudrate = configDBG_USART_BAUDRATE, .charlength = 8, @@ -258,7 +259,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, *pxTopOfStack-- = ( StackType_t ) 0x05050505; /* R5 */ *pxTopOfStack-- = ( StackType_t ) 0x06060606; /* R6 */ *pxTopOfStack-- = ( StackType_t ) 0x07070707; /* R7 */ - *pxTopOfStack = ( StackType_t ) portNO_CRITICAL_NESTING; /* ulCriticalNesting */ + *pxTopOfStack = ( StackType_t ) portNO_CRITICAL_NESTING; /* ulCriticalNesting */ return pxTopOfStack; } @@ -292,7 +293,7 @@ void vPortEndScheduler( void ) { uint32_t lCycles; - lCycles = Get_system_register( AVR32_COUNT ); + lCycles = Get_system_register( AVR32_COUNT ); lCycles += ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ); /* If lCycles ends up to be 0, make it 1 so that the COMPARE and exception */ @@ -310,7 +311,7 @@ void vPortEndScheduler( void ) { uint32_t lCycles, lCount; - lCycles = Get_system_register( AVR32_COMPARE ); + lCycles = Get_system_register( AVR32_COMPARE ); lCycles += ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ); /* If lCycles ends up to be 0, make it 1 so that the COMPARE and exception */ @@ -320,7 +321,7 @@ void vPortEndScheduler( void ) lCycles++; } - lCount = Get_system_register( AVR32_COUNT ); + lCount = Get_system_register( AVR32_COUNT ); if( lCycles < lCount ) { /* We missed a tick, recover for the next. */ @@ -342,10 +343,10 @@ void vPortEndScheduler( void ) static void prvSetupTimerInterrupt( void ) { #if ( configTICK_USE_TC == 1 ) - volatile avr32_tc_t * tc = &AVR32_TC; + volatile avr32_tc_t * tc = &AVR32_TC; /* Options for waveform genration. */ - tc_waveform_opt_t waveform_opt = + tc_waveform_opt_t waveform_opt = { .channel = configTICK_TC_CHANNEL, /* Channel selection. */ @@ -371,7 +372,7 @@ static void prvSetupTimerInterrupt( void ) .tcclks = TC_CLOCK_SOURCE_TC2 /* Internal source clock 2. */ }; - tc_interrupt_t tc_interrupt = + tc_interrupt_t tc_interrupt = { .etrgs = 0, .ldrbs = 0, diff --git a/portable/IAR/AVR32_UC3/portmacro.h b/portable/IAR/AVR32_UC3/portmacro.h index c3eb7042f..27f5e6c22 100644 --- a/portable/IAR/AVR32_UC3/portmacro.h +++ b/portable/IAR/AVR32_UC3/portmacro.h @@ -37,6 +37,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ @@ -162,7 +163,7 @@ */ #define portRESTORE_CONTEXT() \ { \ - extern volatile uint32_t ulCriticalNesting; \ + extern volatile uint32_t ulCriticalNesting; \ extern volatile void * volatile pxCurrentTCB; \ \ __asm__ __volatile__ ( \ @@ -268,7 +269,7 @@ */ #define portSAVE_CONTEXT_OS_INT() \ { \ - extern volatile uint32_t ulCriticalNesting; \ + extern volatile uint32_t ulCriticalNesting; \ extern volatile void * volatile pxCurrentTCB; \ \ /* When we come here */ \ @@ -316,7 +317,7 @@ */ #define portRESTORE_CONTEXT_OS_INT() \ { \ - extern volatile uint32_t ulCriticalNesting; \ + extern volatile uint32_t ulCriticalNesting; \ extern volatile void * volatile pxCurrentTCB; \ \ /* Check if INT0 or higher were being handled (case where the OS tick interrupted another */ \ @@ -380,7 +381,7 @@ */ #define portSAVE_CONTEXT_SCALL() \ { \ - extern volatile uint32_t ulCriticalNesting; \ + extern volatile uint32_t ulCriticalNesting; \ extern volatile void * volatile pxCurrentTCB; \ \ /* Warning: the stack layout after SCALL doesn't match the one after an interrupt. */ \ @@ -443,7 +444,7 @@ */ #define portRESTORE_CONTEXT_SCALL() \ { \ - extern volatile uint32_t ulCriticalNesting; \ + extern volatile uint32_t ulCriticalNesting; \ extern volatile void * volatile pxCurrentTCB; \ \ /* Restore all registers */ \ @@ -535,7 +536,7 @@ */ #define portENTER_SWITCHING_ISR() \ { \ - extern volatile uint32_t ulCriticalNesting; \ + extern volatile uint32_t ulCriticalNesting; \ extern volatile void * volatile pxCurrentTCB; \ \ /* When we come here */ \ @@ -580,7 +581,7 @@ */ #define portEXIT_SWITCHING_ISR() \ { \ - extern volatile uint32_t ulCriticalNesting; \ + extern volatile uint32_t ulCriticalNesting; \ extern volatile void * volatile pxCurrentTCB; \ \ __asm__ __volatile__ ( \ diff --git a/portable/IAR/AtmelSAM7S64/ISR_Support.h b/portable/IAR/AtmelSAM7S64/ISR_Support.h index ea7f6de5c..72f4b1589 100644 --- a/portable/IAR/AtmelSAM7S64/ISR_Support.h +++ b/portable/IAR/AtmelSAM7S64/ISR_Support.h @@ -22,24 +22,25 @@ * ; * http://www.FreeRTOS.org * ; * http://aws.amazon.com/freertos * ; * + * ; * 1 tab == 4 spaces! * ; */ EXTERN pxCurrentTCB -EXTERN ulCriticalNesting +EXTERN ulCriticalNesting ; -Context save and restore macro definitions +Context save and restore macro definitions ; portSAVE_CONTEXT MACRO ; Push R0 as we are going to use the register. - STMDB SP !, { R0 } + STMDB SP !, { R0 } ; Set R0 to point to the task stack pointer. - STMDB SP, { SP } ^ + STMDB SP, { SP } ^ NOP SUB SP, SP, # 4 LDMIA SP !, { R0 } @@ -51,7 +52,7 @@ Push the return address onto the stack. ; Now we have saved LR we can use it instead of R0. - MOV LR, R0 + MOV LR, R0 ; Pop R0 so we can save it onto the system mode stack. @@ -108,7 +109,7 @@ Restore all system mode registers for the task. NOP ; -Restore the return address. +Restore the return address. LDR LR, [ LR, # + 60 ] ; diff --git a/portable/IAR/AtmelSAM7S64/lib_AT91SAM7S64.h b/portable/IAR/AtmelSAM7S64/lib_AT91SAM7S64.h index 5f37523ed..eaa230176 100644 --- a/portable/IAR/AtmelSAM7S64/lib_AT91SAM7S64.h +++ b/portable/IAR/AtmelSAM7S64/lib_AT91SAM7S64.h @@ -459,10 +459,10 @@ __inline void AT91F_SSC_Configure( AT91PS_SSC pSSC, /* \arg pointer to a unsigned int mode_tx ) /* \arg mode Register to be programmed */ { /** Disable interrupts */ - pSSC->SSC_IDR = ( unsigned int ) -1; + pSSC->SSC_IDR = ( unsigned int ) -1; /** Reset receiver and transmitter */ - pSSC->SSC_CR = AT91C_SSC_SWRST | AT91C_SSC_RXDIS | AT91C_SSC_TXDIS; + pSSC->SSC_CR = AT91C_SSC_SWRST | AT91C_SSC_RXDIS | AT91C_SSC_TXDIS; /** Define the Clock Mode Register */ AT91F_SSC_SetBaudrate( pSSC, syst_clock, baud_rate ); @@ -753,16 +753,16 @@ __inline void AT91F_SPI_Close( AT91PS_SPI pSPI ) /* \arg pointer to a SPI contro pSPI->SPI_CSR[ 3 ] = 0; /** Reset the SPI mode */ - pSPI->SPI_MR = 0; + pSPI->SPI_MR = 0; /** Disable all interrupts */ - pSPI->SPI_IDR = 0xFFFFFFFF; + pSPI->SPI_IDR = 0xFFFFFFFF; /** Abort the Peripheral Data Transfers */ AT91F_PDC_Close( ( AT91PS_PDC ) &( pSPI->SPI_RPR ) ); /** Disable receiver and transmitter and stop any activity immediately */ - pSPI->SPI_CR = AT91C_SPI_SPIDIS; + pSPI->SPI_CR = AT91C_SPI_SPIDIS; } /**---------------------------------------------------------------------------- */ @@ -775,7 +775,7 @@ __inline void AT91F_SPI_PutChar( AT91PS_SPI pSPI, { unsigned int value_for_cs; - value_for_cs = ( ~( 1 << cs_number ) ) & 0xF; /*Place a zero among a 4 ONEs number */ + value_for_cs = ( ~( 1 << cs_number ) ) & 0xF; /*Place a zero among a 4 ONEs number */ pSPI->SPI_TDR = ( character & 0xFFFF ) | ( value_for_cs << 16 ); } @@ -881,7 +881,7 @@ __inline void AT91F_PWMC_CfgChannel( AT91PS_PWMC pPWM, /* \arg pointer to unsigned int period, /* \arg PWM period */ unsigned int duty ) /* \arg PWM duty cycle */ { - pPWM->PWMC_CH[ channelId ].PWMC_CMR = mode; + pPWM->PWMC_CH[ channelId ].PWMC_CMR = mode; pPWM->PWMC_CH[ channelId ].PWMC_CDTYR = duty; pPWM->PWMC_CH[ channelId ].PWMC_CPRDR = period; } @@ -1132,8 +1132,8 @@ __inline unsigned int AT91F_PMC_GetMasterClock( AT91PS_PMC pPMC, /* \arg return AT91F_CKGR_GetMainClock( pCKGR, slowClock ) / prescaler; case AT91C_PMC_CSS_PLL_CLK: /* PLLB clock is selected */ - reg = pCKGR->CKGR_PLLR; - pllDivider = ( reg & AT91C_CKGR_DIV ); + reg = pCKGR->CKGR_PLLR; + pllDivider = ( reg & AT91C_CKGR_DIV ); pllMultiplier = ( ( reg & AT91C_CKGR_MUL ) >> 16 ) + 1; return AT91F_CKGR_GetMainClock( pCKGR, slowClock ) / pllDivider * pllMultiplier / prescaler; } @@ -1150,7 +1150,7 @@ __inline void AT91F_PMC_EnablePCK( AT91PS_PMC pPMC, /* \arg pointer to PMC cont unsigned int mode ) { pPMC->PMC_PCKR[ pck ] = mode; - pPMC->PMC_SCER = ( 1 << pck ) << 8; + pPMC->PMC_SCER = ( 1 << pck ) << 8; } /**---------------------------------------------------------------------------- */ @@ -1321,9 +1321,9 @@ __inline void AT91F_ADC_CfgTimings( AT91PS_ADC pADC, /* point { unsigned int prescal, startup, shtim; - prescal = mck_clock / ( 2 * adc_clock ) - 1; - startup = adc_clock * startup_time / 8 - 1; - shtim = adc_clock * sample_and_hold_time / 1000 - 1; + prescal = mck_clock / ( 2 * adc_clock ) - 1; + startup = adc_clock * startup_time / 8 - 1; + shtim = adc_clock * sample_and_hold_time / 1000 - 1; /** Write to the MR register */ pADC->ADC_MR = ( ( prescal << 8 ) & AT91C_ADC_PRESCAL ) | ( ( startup << 16 ) & AT91C_ADC_STARTUP ) | ( ( shtim << 24 ) & AT91C_ADC_SHTIM ); @@ -1987,10 +1987,10 @@ __inline void AT91F_TWI_Configure( AT91PS_TWI pTWI ) /* \arg pointer to a TWI co pTWI->TWI_IDR = ( unsigned int ) -1; /** Reset peripheral */ - pTWI->TWI_CR = AT91C_TWI_SWRST; + pTWI->TWI_CR = AT91C_TWI_SWRST; /** Set Master mode */ - pTWI->TWI_CR = AT91C_TWI_MSEN | AT91C_TWI_SVDIS; + pTWI->TWI_CR = AT91C_TWI_MSEN | AT91C_TWI_SVDIS; } /**---------------------------------------------------------------------------- */ @@ -2145,7 +2145,7 @@ __inline void AT91F_US_Configure( AT91PS_USART pUSART, /* \arg pointer to a pUSART->US_IDR = ( unsigned int ) -1; /** Reset receiver and transmitter */ - pUSART->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX | AT91C_US_RXDIS | AT91C_US_TXDIS; + pUSART->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX | AT91C_US_RXDIS | AT91C_US_TXDIS; /** Define the baud rate divisor register */ AT91F_US_SetBaudrate( pUSART, mainClock, baudRate ); @@ -2157,7 +2157,7 @@ __inline void AT91F_US_Configure( AT91PS_USART pUSART, /* \arg pointer to a AT91F_PDC_Open( ( AT91PS_PDC ) &( pUSART->US_RPR ) ); /** Define the USART mode */ - pUSART->US_MR = mode; + pUSART->US_MR = mode; } /**---------------------------------------------------------------------------- */ @@ -2234,19 +2234,19 @@ __inline void AT91F_US_Close( AT91PS_USART pUSART ) /* \arg pointer to a USART c pUSART->US_BRGR = 0; /** Reset the USART mode */ - pUSART->US_MR = 0; + pUSART->US_MR = 0; /** Reset the Timeguard Register */ pUSART->US_TTGR = 0; /** Disable all interrupts */ - pUSART->US_IDR = 0xFFFFFFFF; + pUSART->US_IDR = 0xFFFFFFFF; /** Abort the Peripheral Data Transfers */ AT91F_PDC_Close( ( AT91PS_PDC ) &( pUSART->US_RPR ) ); /** Disable receiver and transmitter and stop any activity immediately */ - pUSART->US_CR = AT91C_US_TXDIS | AT91C_US_RXDIS | AT91C_US_RSTTX | AT91C_US_RSTRX; + pUSART->US_CR = AT91C_US_TXDIS | AT91C_US_RXDIS | AT91C_US_RSTTX | AT91C_US_RSTRX; } /**---------------------------------------------------------------------------- */ @@ -2542,17 +2542,17 @@ __inline unsigned int AT91F_AIC_ConfigureIt( AT91PS_AIC pAic, /* unsigned int oldHandler; unsigned int mask; - oldHandler = pAic->AIC_SVR[ irq_id ]; + oldHandler = pAic->AIC_SVR[ irq_id ]; - mask = 0x1 << irq_id; + mask = 0x1 << irq_id; /** Disable the interrupt on the interrupt controller */ - pAic->AIC_IDCR = mask; + pAic->AIC_IDCR = mask; /** Save the interrupt handler routine pointer and the interrupt priority */ pAic->AIC_SVR[ irq_id ] = ( unsigned int ) newHandler; /** Store the Source Mode Register */ pAic->AIC_SMR[ irq_id ] = src_type | priority; /** Clear the interrupt on the interrupt controller */ - pAic->AIC_ICCR = mask; + pAic->AIC_ICCR = mask; return oldHandler; } diff --git a/portable/IAR/AtmelSAM7S64/lib_AT91SAM7X128.h b/portable/IAR/AtmelSAM7S64/lib_AT91SAM7X128.h index 72d1b938a..3b2bdf051 100644 --- a/portable/IAR/AtmelSAM7S64/lib_AT91SAM7X128.h +++ b/portable/IAR/AtmelSAM7S64/lib_AT91SAM7X128.h @@ -61,17 +61,17 @@ __inline unsigned int AT91F_AIC_ConfigureIt( AT91PS_AIC pAic, /* unsigned int oldHandler; unsigned int mask; - oldHandler = pAic->AIC_SVR[ irq_id ]; + oldHandler = pAic->AIC_SVR[ irq_id ]; - mask = 0x1 << irq_id; + mask = 0x1 << irq_id; /** Disable the interrupt on the interrupt controller */ - pAic->AIC_IDCR = mask; + pAic->AIC_IDCR = mask; /** Save the interrupt handler routine pointer and the interrupt priority */ pAic->AIC_SVR[ irq_id ] = ( unsigned int ) newHandler; /** Store the Source Mode Register */ pAic->AIC_SMR[ irq_id ] = src_type | priority; /** Clear the interrupt on the interrupt controller */ - pAic->AIC_ICCR = mask; + pAic->AIC_ICCR = mask; return oldHandler; } @@ -1123,8 +1123,8 @@ __inline unsigned int AT91F_PMC_GetMasterClock( AT91PS_PMC pPMC, /* \arg return AT91F_CKGR_GetMainClock( pCKGR, slowClock ) / prescaler; case AT91C_PMC_CSS_PLL_CLK: /* PLLB clock is selected */ - reg = pCKGR->CKGR_PLLR; - pllDivider = ( reg & AT91C_CKGR_DIV ); + reg = pCKGR->CKGR_PLLR; + pllDivider = ( reg & AT91C_CKGR_DIV ); pllMultiplier = ( ( reg & AT91C_CKGR_MUL ) >> 16 ) + 1; return AT91F_CKGR_GetMainClock( pCKGR, slowClock ) / pllDivider * pllMultiplier / prescaler; } @@ -1141,7 +1141,7 @@ __inline void AT91F_PMC_EnablePCK( AT91PS_PMC pPMC, /* \arg pointer to PMC cont unsigned int mode ) { pPMC->PMC_PCKR[ pck ] = mode; - pPMC->PMC_SCER = ( 1 << pck ) << 8; + pPMC->PMC_SCER = ( 1 << pck ) << 8; } /**---------------------------------------------------------------------------- */ @@ -1399,7 +1399,7 @@ __inline void AT91F_PITInit( AT91PS_PITC pPITC, unsigned int period, unsigned int pit_frequency ) { - pPITC->PITC_PIMR = period ? ( period * pit_frequency + 8 ) >> 4 : 0; /* +8 to avoid %10 and /10 */ + pPITC->PITC_PIMR = period ? ( period * pit_frequency + 8 ) >> 4 : 0; /* +8 to avoid %10 and /10 */ pPITC->PITC_PIMR |= AT91C_PITC_PITEN; } @@ -1768,16 +1768,16 @@ __inline void AT91F_SPI_Close( AT91PS_SPI pSPI ) /* \arg pointer to a SPI contro pSPI->SPI_CSR[ 3 ] = 0; /** Reset the SPI mode */ - pSPI->SPI_MR = 0; + pSPI->SPI_MR = 0; /** Disable all interrupts */ - pSPI->SPI_IDR = 0xFFFFFFFF; + pSPI->SPI_IDR = 0xFFFFFFFF; /** Abort the Peripheral Data Transfers */ AT91F_PDC_Close( ( AT91PS_PDC ) &( pSPI->SPI_RPR ) ); /** Disable receiver and transmitter and stop any activity immediately */ - pSPI->SPI_CR = AT91C_SPI_SPIDIS; + pSPI->SPI_CR = AT91C_SPI_SPIDIS; } /**---------------------------------------------------------------------------- */ @@ -1790,7 +1790,7 @@ __inline void AT91F_SPI_PutChar( AT91PS_SPI pSPI, { unsigned int value_for_cs; - value_for_cs = ( ~( 1 << cs_number ) ) & 0xF; /*Place a zero among a 4 ONEs number */ + value_for_cs = ( ~( 1 << cs_number ) ) & 0xF; /*Place a zero among a 4 ONEs number */ pSPI->SPI_TDR = ( character & 0xFFFF ) | ( value_for_cs << 16 ); } @@ -1955,7 +1955,7 @@ __inline void AT91F_US_Configure( AT91PS_USART pUSART, /* \arg pointer to a pUSART->US_IDR = ( unsigned int ) -1; /** Reset receiver and transmitter */ - pUSART->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX | AT91C_US_RXDIS | AT91C_US_TXDIS; + pUSART->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX | AT91C_US_RXDIS | AT91C_US_TXDIS; /** Define the baud rate divisor register */ AT91F_US_SetBaudrate( pUSART, mainClock, baudRate ); @@ -1967,7 +1967,7 @@ __inline void AT91F_US_Configure( AT91PS_USART pUSART, /* \arg pointer to a AT91F_PDC_Open( ( AT91PS_PDC ) &( pUSART->US_RPR ) ); /** Define the USART mode */ - pUSART->US_MR = mode; + pUSART->US_MR = mode; } /**---------------------------------------------------------------------------- */ @@ -2044,19 +2044,19 @@ __inline void AT91F_US_Close( AT91PS_USART pUSART ) /* \arg pointer to a USART c pUSART->US_BRGR = 0; /** Reset the USART mode */ - pUSART->US_MR = 0; + pUSART->US_MR = 0; /** Reset the Timeguard Register */ pUSART->US_TTGR = 0; /** Disable all interrupts */ - pUSART->US_IDR = 0xFFFFFFFF; + pUSART->US_IDR = 0xFFFFFFFF; /** Abort the Peripheral Data Transfers */ AT91F_PDC_Close( ( AT91PS_PDC ) &( pUSART->US_RPR ) ); /** Disable receiver and transmitter and stop any activity immediately */ - pUSART->US_CR = AT91C_US_TXDIS | AT91C_US_RXDIS | AT91C_US_RSTTX | AT91C_US_RSTRX; + pUSART->US_CR = AT91C_US_TXDIS | AT91C_US_RXDIS | AT91C_US_RSTTX | AT91C_US_RSTRX; } /**---------------------------------------------------------------------------- */ @@ -2230,10 +2230,10 @@ __inline void AT91F_SSC_Configure( AT91PS_SSC pSSC, /* \arg pointer to a unsigned int mode_tx ) /* \arg mode Register to be programmed */ { /** Disable interrupts */ - pSSC->SSC_IDR = ( unsigned int ) -1; + pSSC->SSC_IDR = ( unsigned int ) -1; /** Reset receiver and transmitter */ - pSSC->SSC_CR = AT91C_SSC_SWRST | AT91C_SSC_RXDIS | AT91C_SSC_TXDIS; + pSSC->SSC_CR = AT91C_SSC_SWRST | AT91C_SSC_RXDIS | AT91C_SSC_TXDIS; /** Define the Clock Mode Register */ AT91F_SSC_SetBaudrate( pSSC, syst_clock, baud_rate ); @@ -2407,10 +2407,10 @@ __inline void AT91F_TWI_Configure( AT91PS_TWI pTWI ) /* \arg pointer to a TWI co pTWI->TWI_IDR = ( unsigned int ) -1; /** Reset peripheral */ - pTWI->TWI_CR = AT91C_TWI_SWRST; + pTWI->TWI_CR = AT91C_TWI_SWRST; /** Set Master mode */ - pTWI->TWI_CR = AT91C_TWI_MSEN; + pTWI->TWI_CR = AT91C_TWI_MSEN; } /**---------------------------------------------------------------------------- */ @@ -2506,7 +2506,7 @@ __inline void AT91F_PWMC_CfgChannel( AT91PS_PWMC pPWM, /* \arg pointer to unsigned int period, /* \arg PWM period */ unsigned int duty ) /* \arg PWM duty cycle */ { - pPWM->PWMC_CH[ channelId ].PWMC_CMR = mode; + pPWM->PWMC_CH[ channelId ].PWMC_CMR = mode; pPWM->PWMC_CH[ channelId ].PWMC_CDTYR = duty; pPWM->PWMC_CH[ channelId ].PWMC_CPRDR = period; } @@ -3210,9 +3210,9 @@ __inline void AT91F_ADC_CfgTimings( AT91PS_ADC pADC, /* point { unsigned int prescal, startup, shtim; - prescal = mck_clock / ( 2 * adc_clock ) - 1; - startup = adc_clock * startup_time / 8 - 1; - shtim = adc_clock * sample_and_hold_time / 1000 - 1; + prescal = mck_clock / ( 2 * adc_clock ) - 1; + startup = adc_clock * startup_time / 8 - 1; + shtim = adc_clock * sample_and_hold_time / 1000 - 1; /** Write to the MR register */ pADC->ADC_MR = ( ( prescal << 8 ) & AT91C_ADC_PRESCAL ) | ( ( startup << 16 ) & AT91C_ADC_STARTUP ) | ( ( shtim << 24 ) & AT91C_ADC_SHTIM ); diff --git a/portable/IAR/AtmelSAM7S64/lib_AT91SAM7X256.h b/portable/IAR/AtmelSAM7S64/lib_AT91SAM7X256.h index 9d2e54e06..3c4fd7d6f 100644 --- a/portable/IAR/AtmelSAM7S64/lib_AT91SAM7X256.h +++ b/portable/IAR/AtmelSAM7S64/lib_AT91SAM7X256.h @@ -61,17 +61,17 @@ __inline unsigned int AT91F_AIC_ConfigureIt( AT91PS_AIC pAic, /* unsigned int oldHandler; unsigned int mask; - oldHandler = pAic->AIC_SVR[ irq_id ]; + oldHandler = pAic->AIC_SVR[ irq_id ]; - mask = 0x1 << irq_id; + mask = 0x1 << irq_id; /** Disable the interrupt on the interrupt controller */ - pAic->AIC_IDCR = mask; + pAic->AIC_IDCR = mask; /** Save the interrupt handler routine pointer and the interrupt priority */ pAic->AIC_SVR[ irq_id ] = ( unsigned int ) newHandler; /** Store the Source Mode Register */ pAic->AIC_SMR[ irq_id ] = src_type | priority; /** Clear the interrupt on the interrupt controller */ - pAic->AIC_ICCR = mask; + pAic->AIC_ICCR = mask; return oldHandler; } @@ -1123,8 +1123,8 @@ __inline unsigned int AT91F_PMC_GetMasterClock( AT91PS_PMC pPMC, /* \arg return AT91F_CKGR_GetMainClock( pCKGR, slowClock ) / prescaler; case AT91C_PMC_CSS_PLL_CLK: /* PLLB clock is selected */ - reg = pCKGR->CKGR_PLLR; - pllDivider = ( reg & AT91C_CKGR_DIV ); + reg = pCKGR->CKGR_PLLR; + pllDivider = ( reg & AT91C_CKGR_DIV ); pllMultiplier = ( ( reg & AT91C_CKGR_MUL ) >> 16 ) + 1; return AT91F_CKGR_GetMainClock( pCKGR, slowClock ) / pllDivider * pllMultiplier / prescaler; } @@ -1141,7 +1141,7 @@ __inline void AT91F_PMC_EnablePCK( AT91PS_PMC pPMC, /* \arg pointer to PMC cont unsigned int mode ) { pPMC->PMC_PCKR[ pck ] = mode; - pPMC->PMC_SCER = ( 1 << pck ) << 8; + pPMC->PMC_SCER = ( 1 << pck ) << 8; } /**---------------------------------------------------------------------------- */ @@ -1399,7 +1399,7 @@ __inline void AT91F_PITInit( AT91PS_PITC pPITC, unsigned int period, unsigned int pit_frequency ) { - pPITC->PITC_PIMR = period ? ( period * pit_frequency + 8 ) >> 4 : 0; /* +8 to avoid %10 and /10 */ + pPITC->PITC_PIMR = period ? ( period * pit_frequency + 8 ) >> 4 : 0; /* +8 to avoid %10 and /10 */ pPITC->PITC_PIMR |= AT91C_PITC_PITEN; } @@ -1768,16 +1768,16 @@ __inline void AT91F_SPI_Close( AT91PS_SPI pSPI ) /* \arg pointer to a SPI contro pSPI->SPI_CSR[ 3 ] = 0; /** Reset the SPI mode */ - pSPI->SPI_MR = 0; + pSPI->SPI_MR = 0; /** Disable all interrupts */ - pSPI->SPI_IDR = 0xFFFFFFFF; + pSPI->SPI_IDR = 0xFFFFFFFF; /** Abort the Peripheral Data Transfers */ AT91F_PDC_Close( ( AT91PS_PDC ) &( pSPI->SPI_RPR ) ); /** Disable receiver and transmitter and stop any activity immediately */ - pSPI->SPI_CR = AT91C_SPI_SPIDIS; + pSPI->SPI_CR = AT91C_SPI_SPIDIS; } /**---------------------------------------------------------------------------- */ @@ -1790,7 +1790,7 @@ __inline void AT91F_SPI_PutChar( AT91PS_SPI pSPI, { unsigned int value_for_cs; - value_for_cs = ( ~( 1 << cs_number ) ) & 0xF; /*Place a zero among a 4 ONEs number */ + value_for_cs = ( ~( 1 << cs_number ) ) & 0xF; /*Place a zero among a 4 ONEs number */ pSPI->SPI_TDR = ( character & 0xFFFF ) | ( value_for_cs << 16 ); } @@ -1955,7 +1955,7 @@ __inline void AT91F_US_Configure( AT91PS_USART pUSART, /* \arg pointer to a pUSART->US_IDR = ( unsigned int ) -1; /** Reset receiver and transmitter */ - pUSART->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX | AT91C_US_RXDIS | AT91C_US_TXDIS; + pUSART->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX | AT91C_US_RXDIS | AT91C_US_TXDIS; /** Define the baud rate divisor register */ AT91F_US_SetBaudrate( pUSART, mainClock, baudRate ); @@ -1967,7 +1967,7 @@ __inline void AT91F_US_Configure( AT91PS_USART pUSART, /* \arg pointer to a AT91F_PDC_Open( ( AT91PS_PDC ) &( pUSART->US_RPR ) ); /** Define the USART mode */ - pUSART->US_MR = mode; + pUSART->US_MR = mode; } /**---------------------------------------------------------------------------- */ @@ -2044,19 +2044,19 @@ __inline void AT91F_US_Close( AT91PS_USART pUSART ) /* \arg pointer to a USART c pUSART->US_BRGR = 0; /** Reset the USART mode */ - pUSART->US_MR = 0; + pUSART->US_MR = 0; /** Reset the Timeguard Register */ pUSART->US_TTGR = 0; /** Disable all interrupts */ - pUSART->US_IDR = 0xFFFFFFFF; + pUSART->US_IDR = 0xFFFFFFFF; /** Abort the Peripheral Data Transfers */ AT91F_PDC_Close( ( AT91PS_PDC ) &( pUSART->US_RPR ) ); /** Disable receiver and transmitter and stop any activity immediately */ - pUSART->US_CR = AT91C_US_TXDIS | AT91C_US_RXDIS | AT91C_US_RSTTX | AT91C_US_RSTRX; + pUSART->US_CR = AT91C_US_TXDIS | AT91C_US_RXDIS | AT91C_US_RSTTX | AT91C_US_RSTRX; } /**---------------------------------------------------------------------------- */ @@ -2230,10 +2230,10 @@ __inline void AT91F_SSC_Configure( AT91PS_SSC pSSC, /* \arg pointer to a unsigned int mode_tx ) /* \arg mode Register to be programmed */ { /** Disable interrupts */ - pSSC->SSC_IDR = ( unsigned int ) -1; + pSSC->SSC_IDR = ( unsigned int ) -1; /** Reset receiver and transmitter */ - pSSC->SSC_CR = AT91C_SSC_SWRST | AT91C_SSC_RXDIS | AT91C_SSC_TXDIS; + pSSC->SSC_CR = AT91C_SSC_SWRST | AT91C_SSC_RXDIS | AT91C_SSC_TXDIS; /** Define the Clock Mode Register */ AT91F_SSC_SetBaudrate( pSSC, syst_clock, baud_rate ); @@ -2407,10 +2407,10 @@ __inline void AT91F_TWI_Configure( AT91PS_TWI pTWI ) /* \arg pointer to a TWI co pTWI->TWI_IDR = ( unsigned int ) -1; /** Reset peripheral */ - pTWI->TWI_CR = AT91C_TWI_SWRST; + pTWI->TWI_CR = AT91C_TWI_SWRST; /** Set Master mode */ - pTWI->TWI_CR = AT91C_TWI_MSEN; + pTWI->TWI_CR = AT91C_TWI_MSEN; } /**---------------------------------------------------------------------------- */ @@ -2506,7 +2506,7 @@ __inline void AT91F_PWMC_CfgChannel( AT91PS_PWMC pPWM, /* \arg pointer to unsigned int period, /* \arg PWM period */ unsigned int duty ) /* \arg PWM duty cycle */ { - pPWM->PWMC_CH[ channelId ].PWMC_CMR = mode; + pPWM->PWMC_CH[ channelId ].PWMC_CMR = mode; pPWM->PWMC_CH[ channelId ].PWMC_CDTYR = duty; pPWM->PWMC_CH[ channelId ].PWMC_CPRDR = period; } @@ -3210,9 +3210,9 @@ __inline void AT91F_ADC_CfgTimings( AT91PS_ADC pADC, /* point { unsigned int prescal, startup, shtim; - prescal = mck_clock / ( 2 * adc_clock ) - 1; - startup = adc_clock * startup_time / 8 - 1; - shtim = adc_clock * sample_and_hold_time / 1000 - 1; + prescal = mck_clock / ( 2 * adc_clock ) - 1; + startup = adc_clock * startup_time / 8 - 1; + shtim = adc_clock * sample_and_hold_time / 1000 - 1; /** Write to the MR register */ pADC->ADC_MR = ( ( prescal << 8 ) & AT91C_ADC_PRESCAL ) | ( ( startup << 16 ) & AT91C_ADC_STARTUP ) | ( ( shtim << 24 ) & AT91C_ADC_SHTIM ); diff --git a/portable/IAR/AtmelSAM7S64/port.c b/portable/IAR/AtmelSAM7S64/port.c index dd4b9c626..0ad6ba7ad 100644 --- a/portable/IAR/AtmelSAM7S64/port.c +++ b/portable/IAR/AtmelSAM7S64/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -183,7 +184,7 @@ void vPortEndScheduler( void ) xTaskIncrementTick(); /* Clear the PIT interrupt. */ - ulDummy = AT91C_BASE_PITC->PITC_PIVR; + ulDummy = AT91C_BASE_PITC->PITC_PIVR; /* End the interrupt in the AIC. */ AT91C_BASE_AIC->AIC_EOICR = ulDummy; diff --git a/portable/IAR/AtmelSAM7S64/portmacro.h b/portable/IAR/AtmelSAM7S64/portmacro.h index 338eae0d0..f40f45741 100644 --- a/portable/IAR/AtmelSAM7S64/portmacro.h +++ b/portable/IAR/AtmelSAM7S64/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ diff --git a/portable/IAR/AtmelSAM9XE/ISR_Support.h b/portable/IAR/AtmelSAM9XE/ISR_Support.h index a04a9fbe3..338d052c3 100644 --- a/portable/IAR/AtmelSAM9XE/ISR_Support.h +++ b/portable/IAR/AtmelSAM9XE/ISR_Support.h @@ -1,19 +1,19 @@ EXTERN pxCurrentTCB -EXTERN ulCriticalNesting +EXTERN ulCriticalNesting ; -Context save and restore macro definitions +Context save and restore macro definitions ; portSAVE_CONTEXT MACRO ; Push R0 as we are going to use the register. - STMDB SP !, { R0 } + STMDB SP !, { R0 } ; Set R0 to point to the task stack pointer. - STMDB SP, { SP } ^ + STMDB SP, { SP } ^ NOP SUB SP, SP, # 4 LDMIA SP !, { R0 } @@ -25,7 +25,7 @@ Push the return address onto the stack. ; Now we have saved LR we can use it instead of R0. - MOV LR, R0 + MOV LR, R0 ; Pop R0 so we can save it onto the system mode stack. @@ -82,7 +82,7 @@ Restore all system mode registers for the task. NOP ; -Restore the return address. +Restore the return address. LDR LR, [ LR, # + 60 ] ; diff --git a/portable/IAR/AtmelSAM9XE/port.c b/portable/IAR/AtmelSAM9XE/port.c index 7929104fc..f96e5763c 100644 --- a/portable/IAR/AtmelSAM9XE/port.c +++ b/portable/IAR/AtmelSAM9XE/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- diff --git a/portable/IAR/AtmelSAM9XE/portmacro.h b/portable/IAR/AtmelSAM9XE/portmacro.h index 658b91a31..c659756bd 100644 --- a/portable/IAR/AtmelSAM9XE/portmacro.h +++ b/portable/IAR/AtmelSAM9XE/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ diff --git a/portable/IAR/LPC2000/ISR_Support.h b/portable/IAR/LPC2000/ISR_Support.h index ea7f6de5c..72f4b1589 100644 --- a/portable/IAR/LPC2000/ISR_Support.h +++ b/portable/IAR/LPC2000/ISR_Support.h @@ -22,24 +22,25 @@ * ; * http://www.FreeRTOS.org * ; * http://aws.amazon.com/freertos * ; * + * ; * 1 tab == 4 spaces! * ; */ EXTERN pxCurrentTCB -EXTERN ulCriticalNesting +EXTERN ulCriticalNesting ; -Context save and restore macro definitions +Context save and restore macro definitions ; portSAVE_CONTEXT MACRO ; Push R0 as we are going to use the register. - STMDB SP !, { R0 } + STMDB SP !, { R0 } ; Set R0 to point to the task stack pointer. - STMDB SP, { SP } ^ + STMDB SP, { SP } ^ NOP SUB SP, SP, # 4 LDMIA SP !, { R0 } @@ -51,7 +52,7 @@ Push the return address onto the stack. ; Now we have saved LR we can use it instead of R0. - MOV LR, R0 + MOV LR, R0 ; Pop R0 so we can save it onto the system mode stack. @@ -108,7 +109,7 @@ Restore all system mode registers for the task. NOP ; -Restore the return address. +Restore the return address. LDR LR, [ LR, # + 60 ] ; diff --git a/portable/IAR/LPC2000/port.c b/portable/IAR/LPC2000/port.c index 941a8e3a2..768262606 100644 --- a/portable/IAR/LPC2000/port.c +++ b/portable/IAR/LPC2000/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -201,7 +202,7 @@ void vPortEndScheduler( void ) xTaskIncrementTick(); /* Ready for the next interrupt. */ - T0IR = portTIMER_MATCH_ISR_BIT; + T0IR = portTIMER_MATCH_ISR_BIT; VICVectAddr = portCLEAR_VIC_INTERRUPT; } @@ -222,7 +223,7 @@ void vPortEndScheduler( void ) } /* Ready for the next interrupt. */ - T0IR = portTIMER_MATCH_ISR_BIT; + T0IR = portTIMER_MATCH_ISR_BIT; VICVectAddr = portCLEAR_VIC_INTERRUPT; } @@ -236,7 +237,7 @@ static void prvSetupTimerInterrupt( void ) /* A 1ms tick does not require the use of the timer prescale. This is * defaulted to zero but can be used if necessary. */ - T0PR = portPRESCALE_VALUE; + T0PR = portPRESCALE_VALUE; /* Calculate the match value required for our wanted tick rate. */ ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ; @@ -249,14 +250,14 @@ static void prvSetupTimerInterrupt( void ) } #endif - T0MR0 = ulCompareMatch; + T0MR0 = ulCompareMatch; /* Generate tick with timer 0 compare match. */ - T0MCR = portRESET_COUNT_ON_MATCH | portINTERRUPT_ON_MATCH; + T0MCR = portRESET_COUNT_ON_MATCH | portINTERRUPT_ON_MATCH; /* Setup the VIC for the timer. */ - VICIntSelect &= ~( portTIMER_VIC_CHANNEL_BIT ); - VICIntEnable |= portTIMER_VIC_CHANNEL_BIT; + VICIntSelect &= ~( portTIMER_VIC_CHANNEL_BIT ); + VICIntEnable |= portTIMER_VIC_CHANNEL_BIT; /* The ISR installed depends on whether the preemptive or cooperative * scheduler is being used. */ @@ -274,11 +275,11 @@ static void prvSetupTimerInterrupt( void ) } #endif /* if configUSE_PREEMPTION == 1 */ - VICVectCntl0 = portTIMER_VIC_CHANNEL | portTIMER_VIC_ENABLE; + VICVectCntl0 = portTIMER_VIC_CHANNEL | portTIMER_VIC_ENABLE; /* Start the timer - interrupts are disabled when this function is called * so it is okay to do this here. */ - T0TCR = portENABLE_TIMER; + T0TCR = portENABLE_TIMER; } /*-----------------------------------------------------------*/ diff --git a/portable/IAR/LPC2000/portmacro.h b/portable/IAR/LPC2000/portmacro.h index 62df450e0..3133d8da8 100644 --- a/portable/IAR/LPC2000/portmacro.h +++ b/portable/IAR/LPC2000/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ diff --git a/portable/IAR/MSP430/port.c b/portable/IAR/MSP430/port.c index ac75cb672..229cf060d 100644 --- a/portable/IAR/MSP430/port.c +++ b/portable/IAR/MSP430/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Scheduler includes. */ @@ -148,24 +149,24 @@ void vPortEndScheduler( void ) void vPortSetupTimerInterrupt( void ) { /* Ensure the timer is stopped. */ - TACTL = 0; + TACTL = 0; /* Run the timer of the ACLK. */ - TACTL = TASSEL_1; + TACTL = TASSEL_1; /* Clear everything to start with. */ - TACTL |= TACLR; + TACTL |= TACLR; /* Set the compare match value according to the tick rate we want. */ - TACCR0 = portACLK_FREQUENCY_HZ / configTICK_RATE_HZ; + TACCR0 = portACLK_FREQUENCY_HZ / configTICK_RATE_HZ; /* Enable the interrupts. */ TACCTL0 = CCIE; /* Start up clean. */ - TACTL |= TACLR; + TACTL |= TACLR; /* Up mode. */ - TACTL |= MC_1; + TACTL |= MC_1; } /*-----------------------------------------------------------*/ diff --git a/portable/IAR/MSP430/portasm.h b/portable/IAR/MSP430/portasm.h index 8f984dd74..0873b6a29 100644 --- a/portable/IAR/MSP430/portasm.h +++ b/portable/IAR/MSP430/portasm.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTASM_H diff --git a/portable/IAR/MSP430/portmacro.h b/portable/IAR/MSP430/portmacro.h index 1239cdf48..9e957f8b8 100644 --- a/portable/IAR/MSP430/portmacro.h +++ b/portable/IAR/MSP430/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/IAR/MSP430X/data_model.h b/portable/IAR/MSP430X/data_model.h index 00ef5de9c..875cc3f60 100644 --- a/portable/IAR/MSP430X/data_model.h +++ b/portable/IAR/MSP430X/data_model.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef DATA_MODEL_H diff --git a/portable/IAR/MSP430X/port.c b/portable/IAR/MSP430X/port.c index 2e2b6953a..873ac7164 100644 --- a/portable/IAR/MSP430X/port.c +++ b/portable/IAR/MSP430X/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Scheduler includes. */ @@ -102,15 +103,15 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, pulTopOfStack = ( uint32_t * ) pxTopOfStack; } - *pulTopOfStack = ( uint32_t ) pxCode; + *pulTopOfStack = ( uint32_t ) pxCode; - pusTopOfStack = ( uint16_t * ) pulTopOfStack; + pusTopOfStack = ( uint16_t * ) pulTopOfStack; pusTopOfStack--; - *pusTopOfStack = portFLAGS_INT_ENABLED; - pusTopOfStack -= ( sizeof( StackType_t ) / 2 ); + *pusTopOfStack = portFLAGS_INT_ENABLED; + pusTopOfStack -= ( sizeof( StackType_t ) / 2 ); /* From here on the size of stacked items depends on the memory model. */ - pxTopOfStack = ( StackType_t * ) pusTopOfStack; + pxTopOfStack = ( StackType_t * ) pusTopOfStack; /* Next the general purpose registers. */ #ifdef PRELOAD_REGISTER_VALUES @@ -148,7 +149,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, /* A variable is used to keep track of the critical section nesting. * This variable has to be stored as part of the task context and is * initially set to zero. */ - *pxTopOfStack = ( StackType_t ) portNO_CRITICAL_SECTION_NESTING; + *pxTopOfStack = ( StackType_t ) portNO_CRITICAL_SECTION_NESTING; /* Return a pointer to the top of the stack we have generated so this can * be stored in the task control block for the task. */ diff --git a/portable/IAR/MSP430X/portmacro.h b/portable/IAR/MSP430X/portmacro.h index 7cd2b7818..708601c4d 100644 --- a/portable/IAR/MSP430X/portmacro.h +++ b/portable/IAR/MSP430X/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h b/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h index 982db92c4..1877057e1 100644 --- a/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h +++ b/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* diff --git a/portable/IAR/RISC-V/port.c b/portable/IAR/RISC-V/port.c index 601e77cc0..3d7327100 100644 --- a/portable/IAR/RISC-V/port.c +++ b/portable/IAR/RISC-V/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -66,7 +67,7 @@ * interrupt stack after the scheduler has started. */ #ifdef configISR_STACK_SIZE_WORDS static __attribute__( ( aligned( 16 ) ) ) StackType_t xISRStack[ configISR_STACK_SIZE_WORDS ] = { 0 }; - const StackType_t xISRStackTop = ( StackType_t ) &( xISRStack[ configISR_STACK_SIZE_WORDS & ~portBYTE_ALIGNMENT_MASK ] ); + const StackType_t xISRStackTop = ( StackType_t ) &( xISRStack[ configISR_STACK_SIZE_WORDS & ~portBYTE_ALIGNMENT_MASK ] ); /* Don't use 0xa5 as the stack fill bytes as that is used by the kernerl for * the task stacks, and so will legitimately appear in many positions within @@ -74,7 +75,7 @@ #define portISR_STACK_FILL_BYTE 0xee #else extern const uint32_t __freertos_irq_stack_top[]; - const StackType_t xISRStackTop = ( StackType_t ) __freertos_irq_stack_top; + const StackType_t xISRStackTop = ( StackType_t ) __freertos_irq_stack_top; #endif /* @@ -87,11 +88,11 @@ void vPortSetupTimerInterrupt( void ) __attribute__( ( weak ) ); /*-----------------------------------------------------------*/ /* Used to program the machine timer compare register. */ -uint64_t ullNextTime = 0ULL; -const uint64_t * pullNextTime = &ullNextTime; -const size_t uxTimerIncrementsForOneTick = ( size_t ) ( ( configCPU_CLOCK_HZ ) / ( configTICK_RATE_HZ ) );/* Assumes increment won't go over 32-bits. */ -uint32_t const ullMachineTimerCompareRegisterBase = configMTIMECMP_BASE_ADDRESS; -volatile uint64_t * pullMachineTimerCompareRegister = NULL; +uint64_t ullNextTime = 0ULL; +const uint64_t * pullNextTime = &ullNextTime; +const size_t uxTimerIncrementsForOneTick = ( size_t ) ( ( configCPU_CLOCK_HZ ) / ( configTICK_RATE_HZ ) ); /* Assumes increment won't go over 32-bits. */ +uint32_t const ullMachineTimerCompareRegisterBase = configMTIMECMP_BASE_ADDRESS; +volatile uint64_t * pullMachineTimerCompareRegister = NULL; /* Set configCHECK_FOR_STACK_OVERFLOW to 3 to add ISR stack checking to task * stack checking. A problem in the ISR stack will trigger an assert, not call the @@ -100,7 +101,7 @@ volatile uint64_t * pullMachineTimerCompareRegister = NULL; #if defined( configISR_STACK_SIZE_WORDS ) && ( configCHECK_FOR_STACK_OVERFLOW > 2 ) #warning This path not tested, or even compiled yet. - static const uint8_t ucExpectedStackBytes[] = + static const uint8_t ucExpectedStackBytes[] = { portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \ portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \ @@ -121,29 +122,29 @@ volatile uint64_t * pullMachineTimerCompareRegister = NULL; void vPortSetupTimerInterrupt( void ) { - uint32_t ulCurrentTimeHigh, ulCurrentTimeLow; + uint32_t ulCurrentTimeHigh, ulCurrentTimeLow; volatile uint32_t * const pulTimeHigh = ( uint32_t * ) ( ( configMTIME_BASE_ADDRESS ) + 4UL ); /* 8-byte typer so high 32-bit word is 4 bytes up. */ - volatile uint32_t * const pulTimeLow = ( uint32_t * ) ( configMTIME_BASE_ADDRESS ); - volatile uint32_t ulHartId; + volatile uint32_t * const pulTimeLow = ( uint32_t * ) ( configMTIME_BASE_ADDRESS ); + volatile uint32_t ulHartId; __asm volatile ( "csrr %0, 0xf14" : "=r" ( ulHartId ) ); /* 0xf14 is hartid. */ - pullMachineTimerCompareRegister = ( volatile uint64_t * ) ( ullMachineTimerCompareRegisterBase + ( ulHartId * sizeof( uint64_t ) ) ); + pullMachineTimerCompareRegister = ( volatile uint64_t * ) ( ullMachineTimerCompareRegisterBase + ( ulHartId * sizeof( uint64_t ) ) ); do { ulCurrentTimeHigh = *pulTimeHigh; - ulCurrentTimeLow = *pulTimeLow; + ulCurrentTimeLow = *pulTimeLow; } while( ulCurrentTimeHigh != *pulTimeHigh ); - ullNextTime = ( uint64_t ) ulCurrentTimeHigh; - ullNextTime <<= 32ULL; /* High 4-byte word is 32-bits up. */ - ullNextTime |= ( uint64_t ) ulCurrentTimeLow; - ullNextTime += ( uint64_t ) uxTimerIncrementsForOneTick; + ullNextTime = ( uint64_t ) ulCurrentTimeHigh; + ullNextTime <<= 32ULL; /* High 4-byte word is 32-bits up. */ + ullNextTime |= ( uint64_t ) ulCurrentTimeLow; + ullNextTime += ( uint64_t ) uxTimerIncrementsForOneTick; *pullMachineTimerCompareRegister = ullNextTime; /* Prepare the time to use after the next tick interrupt. */ - ullNextTime += ( uint64_t ) uxTimerIncrementsForOneTick; + ullNextTime += ( uint64_t ) uxTimerIncrementsForOneTick; } #endif /* ( configMTIME_BASE_ADDRESS != 0 ) && ( configMTIME_BASE_ADDRESS != 0 ) */ diff --git a/portable/IAR/RISC-V/portmacro.h b/portable/IAR/RISC-V/portmacro.h index 6131f6275..e43fbadb4 100644 --- a/portable/IAR/RISC-V/portmacro.h +++ b/portable/IAR/RISC-V/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ diff --git a/portable/IAR/RL78/ISR_Support.h b/portable/IAR/RL78/ISR_Support.h index a8d8b0ba0..e48401b9d 100644 --- a/portable/IAR/RL78/ISR_Support.h +++ b/portable/IAR/RL78/ISR_Support.h @@ -22,6 +22,7 @@ * ; * http://www.FreeRTOS.org * ; * http://aws.amazon.com/freertos * ; * + * ; * 1 tab == 4 spaces! * ; */ @@ -43,7 +44,7 @@ Saves the context of the general purpose registers, CS and ES( only in far ; memory mode ) registers the usCriticalNesting Value and the Stack Pointer ; -of the active Task onto the task stack +of the active Task onto the task stack ; ------------------------------------------------------------------------------ portSAVE_CONTEXT MACRO @@ -51,19 +52,19 @@ portSAVE_CONTEXT MACRO PUSH AX; Save AX Register to stack. PUSH HL -MOV A, CS; +MOV A, CS; Save CS register. - XCH A, X + XCH A, X MOV A, ES; Save ES register. PUSH AX -PUSH DE; +PUSH DE; Save the remaining general purpose registers. PUSH BC -MOVW AX, usCriticalNesting; +MOVW AX, usCriticalNesting; Save the usCriticalNesting value. PUSH AX -MOVW AX, pxCurrentTCB; +MOVW AX, pxCurrentTCB; Save the Stack pointer. MOVW HL, AX MOVW AX, SP @@ -75,13 +76,13 @@ MOVW AX, SP ; ------------------------------------------------------------------------------ ; -portRESTORE_CONTEXT MACRO +portRESTORE_CONTEXT MACRO ; Restores the task Stack Pointer then use this to restore usCriticalNesting, ; -general purpose registers and the CS and ES( only in far memory mode ) +general purpose registers and the CS and ES( only in far memory mode ) ; -of the selected task from the task stack +of the selected task from the task stack ; ------------------------------------------------------------------------------ portRESTORE_CONTEXT MACRO @@ -96,16 +97,16 @@ Restore usCriticalNesting value. POP BC; Restore the necessary general purpose registers. POP DE -POP AX; +POP AX; Restore the ES register. - MOV ES, A + MOV ES, A XCH A, X; Restore the CS register. - MOV CS, A + MOV CS, A POP HL; Restore general purpose register HL. - POP AX; + POP AX; Restore AX. - ENDM + ENDM ; ------------------------------------------------------------------------------ diff --git a/portable/IAR/RL78/port.c b/portable/IAR/RL78/port.c index ddf4057a4..3af615221 100644 --- a/portable/IAR/RL78/port.c +++ b/portable/IAR/RL78/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Scheduler includes. */ @@ -112,16 +113,16 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, pxTopOfStack--; /* Write in the parameter value. */ - pulLocal = ( uint32_t * ) pxTopOfStack; - *pulLocal = ( uint32_t ) pvParameters; + pulLocal = ( uint32_t * ) pxTopOfStack; + *pulLocal = ( uint32_t ) pvParameters; pxTopOfStack--; /* The return address, leaving space for the first two bytes of the * 32-bit value. See the comments above the prvTaskExitError() prototype * at the top of this file. */ pxTopOfStack--; - pulLocal = ( uint32_t * ) pxTopOfStack; - *pulLocal = ( uint32_t ) prvTaskExitError; + pulLocal = ( uint32_t * ) pxTopOfStack; + *pulLocal = ( uint32_t ) prvTaskExitError; pxTopOfStack--; /* The start address / PSW value is also written in as a 32-bit value, @@ -129,8 +130,8 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, pxTopOfStack--; /* Task function start address combined with the PSW. */ - pulLocal = ( uint32_t * ) pxTopOfStack; - *pulLocal = ( ( ( uint32_t ) pxCode ) | ( portPSW << 24UL ) ); + pulLocal = ( uint32_t * ) pxTopOfStack; + *pulLocal = ( ( ( uint32_t ) pxCode ) | ( portPSW << 24UL ) ); pxTopOfStack--; /* An initial value for the AX register. */ @@ -143,8 +144,8 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, * 32-bit value. See the comments above the prvTaskExitError() prototype * at the top of this file. */ pxTopOfStack--; - pulLocal = ( uint32_t * ) pxTopOfStack; - *pulLocal = ( uint32_t ) prvTaskExitError; + pulLocal = ( uint32_t * ) pxTopOfStack; + *pulLocal = ( uint32_t ) prvTaskExitError; pxTopOfStack--; /* Task function. Again as it is written as a 32-bit value a space is @@ -152,8 +153,8 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, pxTopOfStack--; /* Task function start address combined with the PSW. */ - pulLocal = ( uint32_t * ) pxTopOfStack; - *pulLocal = ( ( ( uint32_t ) pxCode ) | ( portPSW << 24UL ) ); + pulLocal = ( uint32_t * ) pxTopOfStack; + *pulLocal = ( ( ( uint32_t ) pxCode ) | ( portPSW << 24UL ) ); pxTopOfStack--; /* The parameter is passed in AX. */ @@ -231,7 +232,7 @@ void vPortEndScheduler( void ) static void prvSetupTimerInterrupt( void ) { - const uint16_t usClockHz = 15000UL; /* Internal clock. */ + const uint16_t usClockHz = 15000UL; /* Internal clock. */ const uint16_t usCompareMatch = ( usClockHz / configTICK_RATE_HZ ) + 1UL; /* Use the internal 15K clock. */ @@ -243,19 +244,19 @@ static void prvSetupTimerInterrupt( void ) RTCEN = ( uint8_t ) 1U; /* Disable INTIT interrupt. */ - ITMK = ( uint8_t ) 1; + ITMK = ( uint8_t ) 1; /* Disable ITMC operation. */ - ITMC = ( uint8_t ) 0x0000; + ITMC = ( uint8_t ) 0x0000; /* Clear INIT interrupt. */ - ITIF = ( uint8_t ) 0; + ITIF = ( uint8_t ) 0; /* Set interval and enable interrupt operation. */ - ITMC = usCompareMatch | 0x8000U; + ITMC = usCompareMatch | 0x8000U; /* Enable INTIT interrupt. */ - ITMK = ( uint8_t ) 0; + ITMK = ( uint8_t ) 0; } #endif /* ifdef RTCEN */ @@ -268,13 +269,13 @@ static void prvSetupTimerInterrupt( void ) TMKAMK = ( uint8_t ) 1; /* Disable ITMC operation. */ - ITMC = ( uint8_t ) 0x0000; + ITMC = ( uint8_t ) 0x0000; /* Clear INIT interrupt. */ TMKAIF = ( uint8_t ) 0; /* Set interval and enable interrupt operation. */ - ITMC = usCompareMatch | 0x8000U; + ITMC = usCompareMatch | 0x8000U; /* Enable INTIT interrupt. */ TMKAMK = ( uint8_t ) 0; diff --git a/portable/IAR/RL78/portmacro.h b/portable/IAR/RL78/portmacro.h index 97c1197b1..d667daefa 100644 --- a/portable/IAR/RL78/portmacro.h +++ b/portable/IAR/RL78/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/IAR/RX100/port.c b/portable/IAR/RX100/port.c index f444c55c9..65acbf49e 100644 --- a/portable/IAR/RX100/port.c +++ b/portable/IAR/RX100/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -112,7 +113,7 @@ extern void * pxCurrentTCB; /*-----------------------------------------------------------*/ /* Calculate how many clock increments make up a single tick period. */ -static const uint32_t ulMatchValueForOneTick = ( ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) / configTICK_RATE_HZ ); +static const uint32_t ulMatchValueForOneTick = ( ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) / configTICK_RATE_HZ ); #if configUSE_TICKLESS_IDLE == 1 @@ -125,7 +126,7 @@ static const uint32_t ulMatchValueForOneTick = ( ( configPERIPHER /* Flag set from the tick interrupt to allow the sleep processing to know if * sleep mode was exited because of a tick interrupt, or an interrupt * generated by something else. */ - static volatile uint32_t ulTickFlag = pdFALSE; + static volatile uint32_t ulTickFlag = pdFALSE; /* The CMT counter is stopped temporarily each time it is re-programmed. * The following constant offsets the CMT counter match value by the number of @@ -133,7 +134,7 @@ static const uint32_t ulMatchValueForOneTick = ( ( configPERIPHER * compensate for the lost time. The large difference between the divided CMT * clock and the CPU clock means it is likely ulStoppedTimerCompensation will * equal zero - and be optimised away. */ - static const uint32_t ulStoppedTimerCompensation = 100UL / ( configCPU_CLOCK_HZ / ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) ); + static const uint32_t ulStoppedTimerCompensation = 100UL / ( configCPU_CLOCK_HZ / ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) ); #endif /* if configUSE_TICKLESS_IDLE == 1 */ @@ -227,7 +228,7 @@ BaseType_t xPortStartScheduler( void ) _IEN( _ICU_SWINT ) = 1; /* Ensure the software interrupt is clear. */ - _IR( _ICU_SWINT ) = 0; + _IR( _ICU_SWINT ) = 0; /* Ensure the software interrupt is set to the kernel priority. */ _IPR( _ICU_SWINT ) = configKERNEL_INTERRUPT_PRIORITY; @@ -290,19 +291,19 @@ void vPortEndScheduler( void ) static void prvSetupTimerInterrupt( void ) { /* Unlock. */ - SYSTEM.PRCR.WORD = portUNLOCK_KEY; + SYSTEM.PRCR.WORD = portUNLOCK_KEY; /* Enable CMT0. */ - MSTP( CMT0 ) = 0; + MSTP( CMT0 ) = 0; /* Lock again. */ - SYSTEM.PRCR.WORD = portLOCK_KEY; + SYSTEM.PRCR.WORD = portLOCK_KEY; /* Interrupt on compare match. */ - CMT0.CMCR.BIT.CMIE = 1; + CMT0.CMCR.BIT.CMIE = 1; /* Set the compare match value. */ - CMT0.CMCOR = ( uint16_t ) ulMatchValueForOneTick; + CMT0.CMCOR = ( uint16_t ) ulMatchValueForOneTick; /* Divide the PCLK. */ #if portCLOCK_DIVISOR == 512 @@ -329,10 +330,10 @@ static void prvSetupTimerInterrupt( void ) /* Enable the interrupt... */ - _IEN( _CMT0_CMI0 ) = 1; + _IEN( _CMT0_CMI0 ) = 1; /* ...and set its priority to the application defined kernel priority. */ - _IPR( _CMT0_CMI0 ) = configKERNEL_INTERRUPT_PRIORITY; + _IPR( _CMT0_CMI0 ) = configKERNEL_INTERRUPT_PRIORITY; /* Start the timer. */ CMT.CMSTR0.BIT.STR0 = 1; @@ -365,7 +366,7 @@ static void prvSetupTimerInterrupt( void ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ) { - uint32_t ulMatchValue, ulCompleteTickPeriods, ulCurrentCount; + uint32_t ulMatchValue, ulCompleteTickPeriods, ulCurrentCount; eSleepModeStatus eSleepAction; /* THIS FUNCTION IS CALLED WITH THE SCHEDULER SUSPENDED. */ @@ -378,7 +379,7 @@ static void prvSetupTimerInterrupt( void ) /* Calculate the reload value required to wait xExpectedIdleTime tick * periods. */ - ulMatchValue = ulMatchValueForOneTick * xExpectedIdleTime; + ulMatchValue = ulMatchValueForOneTick * xExpectedIdleTime; if( ulMatchValue > ulStoppedTimerCompensation ) { @@ -405,12 +406,12 @@ static void prvSetupTimerInterrupt( void ) /* The tick flag is set to false before sleeping. If it is true when * sleep mode is exited then sleep mode was probably exited because the * tick was suppressed for the entire xExpectedIdleTime period. */ - ulTickFlag = pdFALSE; + ulTickFlag = pdFALSE; /* If a context switch is pending then abandon the low power entry as * the context switch might have been pended by an external interrupt that * requires processing. */ - eSleepAction = eTaskConfirmSleepModeStatus(); + eSleepAction = eTaskConfirmSleepModeStatus(); if( eSleepAction == eAbortSleep ) { @@ -421,42 +422,42 @@ static void prvSetupTimerInterrupt( void ) else if( eSleepAction == eNoTasksWaitingTimeout ) { /* Protection off. */ - SYSTEM.PRCR.WORD = portUNLOCK_KEY; + SYSTEM.PRCR.WORD = portUNLOCK_KEY; /* Ready for software standby with all clocks stopped. */ SYSTEM.SBYCR.BIT.SSBY = 1; /* Protection on. */ - SYSTEM.PRCR.WORD = portLOCK_KEY; + SYSTEM.PRCR.WORD = portLOCK_KEY; /* Sleep until something happens. Calling prvSleep() will * automatically reset the i bit in the PSW. */ prvSleep( xExpectedIdleTime ); /* Restart the CMT. */ - CMT.CMSTR0.BIT.STR0 = 1; + CMT.CMSTR0.BIT.STR0 = 1; } else { /* Protection off. */ - SYSTEM.PRCR.WORD = portUNLOCK_KEY; + SYSTEM.PRCR.WORD = portUNLOCK_KEY; /* Ready for deep sleep mode. */ - SYSTEM.MSTPCRC.BIT.DSLPE = 1; + SYSTEM.MSTPCRC.BIT.DSLPE = 1; SYSTEM.MSTPCRA.BIT.MSTPA28 = 1; - SYSTEM.SBYCR.BIT.SSBY = 0; + SYSTEM.SBYCR.BIT.SSBY = 0; /* Protection on. */ - SYSTEM.PRCR.WORD = portLOCK_KEY; + SYSTEM.PRCR.WORD = portLOCK_KEY; /* Adjust the match value to take into account that the current * time slice is already partially complete. */ - ulMatchValue -= ( uint32_t ) CMT0.CMCNT; - CMT0.CMCOR = ( uint16_t ) ulMatchValue; + ulMatchValue -= ( uint32_t ) CMT0.CMCNT; + CMT0.CMCOR = ( uint16_t ) ulMatchValue; /* Restart the CMT to count up to the new match value. */ - CMT0.CMCNT = 0; - CMT.CMSTR0.BIT.STR0 = 1; + CMT0.CMCNT = 0; + CMT.CMSTR0.BIT.STR0 = 1; /* Sleep until something happens. Calling prvSleep() will * automatically reset the i bit in the PSW. */ @@ -466,14 +467,14 @@ static void prvSetupTimerInterrupt( void ) * accounted for as best it can be, but using the tickless mode will * inevitably result in some tiny drift of the time maintained by the * kernel with respect to calendar time. */ - CMT.CMSTR0.BIT.STR0 = 0; + CMT.CMSTR0.BIT.STR0 = 0; while( CMT.CMSTR0.BIT.STR0 == 1 ) { /* Nothing to do here. */ } - ulCurrentCount = ( uint32_t ) CMT0.CMCNT; + ulCurrentCount = ( uint32_t ) CMT0.CMCNT; if( ulTickFlag != pdFALSE ) { @@ -482,8 +483,8 @@ static void prvSetupTimerInterrupt( void ) * tick processing will not occur until after this function has * exited. Reset the match value with whatever remains of this * tick period. */ - ulMatchValue = ulMatchValueForOneTick - ulCurrentCount; - CMT0.CMCOR = ( uint16_t ) ulMatchValue; + ulMatchValue = ulMatchValueForOneTick - ulCurrentCount; + CMT0.CMCOR = ( uint16_t ) ulMatchValue; /* The tick interrupt handler will already have pended the tick * processing in the kernel. As the pending tick will be @@ -502,15 +503,15 @@ static void prvSetupTimerInterrupt( void ) /* The match value is set to whatever fraction of a single tick * period remains. */ - ulMatchValue = ulCurrentCount - ( ulCompleteTickPeriods * ulMatchValueForOneTick ); - CMT0.CMCOR = ( uint16_t ) ulMatchValue; + ulMatchValue = ulCurrentCount - ( ulCompleteTickPeriods * ulMatchValueForOneTick ); + CMT0.CMCOR = ( uint16_t ) ulMatchValue; } /* Restart the CMT so it runs up to the match value. The match value * will get set to the value required to generate exactly one tick period * the next time the CMT interrupt executes. */ - CMT0.CMCNT = 0; - CMT.CMSTR0.BIT.STR0 = 1; + CMT0.CMCNT = 0; + CMT.CMSTR0.BIT.STR0 = 1; /* Wind the tick forward by the number of tick periods that the CPU * remained in a low power state. */ diff --git a/portable/IAR/RX100/portmacro.h b/portable/IAR/RX100/portmacro.h index 637817d2b..99da58981 100644 --- a/portable/IAR/RX100/portmacro.h +++ b/portable/IAR/RX100/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ diff --git a/portable/IAR/RX600/port.c b/portable/IAR/RX600/port.c index 517d77f53..a413d0191 100644 --- a/portable/IAR/RX600/port.c +++ b/portable/IAR/RX600/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -149,7 +150,7 @@ BaseType_t xPortStartScheduler( void ) _IEN( _ICU_SWINT ) = 1; /* Ensure the software interrupt is clear. */ - _IR( _ICU_SWINT ) = 0; + _IR( _ICU_SWINT ) = 0; /* Ensure the software interrupt is set to the kernel priority. */ _IPR( _ICU_SWINT ) = configKERNEL_INTERRUPT_PRIORITY; diff --git a/portable/IAR/RX600/portmacro.h b/portable/IAR/RX600/portmacro.h index e8e74118b..3d3018501 100644 --- a/portable/IAR/RX600/portmacro.h +++ b/portable/IAR/RX600/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ diff --git a/portable/IAR/RXv2/port.c b/portable/IAR/RXv2/port.c index 6725acfd7..267ef18af 100644 --- a/portable/IAR/RXv2/port.c +++ b/portable/IAR/RXv2/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -157,7 +158,7 @@ BaseType_t xPortStartScheduler( void ) _IEN( _ICU_SWINT ) = 1; /* Ensure the software interrupt is clear. */ - _IR( _ICU_SWINT ) = 0; + _IR( _ICU_SWINT ) = 0; /* Ensure the software interrupt is set to the kernel priority. */ _IPR( _ICU_SWINT ) = configKERNEL_INTERRUPT_PRIORITY; diff --git a/portable/IAR/RXv2/portmacro.h b/portable/IAR/RXv2/portmacro.h index 5cd63bed8..354c1a95c 100644 --- a/portable/IAR/RXv2/portmacro.h +++ b/portable/IAR/RXv2/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ diff --git a/portable/IAR/STR71x/ISR_Support.h b/portable/IAR/STR71x/ISR_Support.h index ea7f6de5c..72f4b1589 100644 --- a/portable/IAR/STR71x/ISR_Support.h +++ b/portable/IAR/STR71x/ISR_Support.h @@ -22,24 +22,25 @@ * ; * http://www.FreeRTOS.org * ; * http://aws.amazon.com/freertos * ; * + * ; * 1 tab == 4 spaces! * ; */ EXTERN pxCurrentTCB -EXTERN ulCriticalNesting +EXTERN ulCriticalNesting ; -Context save and restore macro definitions +Context save and restore macro definitions ; portSAVE_CONTEXT MACRO ; Push R0 as we are going to use the register. - STMDB SP !, { R0 } + STMDB SP !, { R0 } ; Set R0 to point to the task stack pointer. - STMDB SP, { SP } ^ + STMDB SP, { SP } ^ NOP SUB SP, SP, # 4 LDMIA SP !, { R0 } @@ -51,7 +52,7 @@ Push the return address onto the stack. ; Now we have saved LR we can use it instead of R0. - MOV LR, R0 + MOV LR, R0 ; Pop R0 so we can save it onto the system mode stack. @@ -108,7 +109,7 @@ Restore all system mode registers for the task. NOP ; -Restore the return address. +Restore the return address. LDR LR, [ LR, # + 60 ] ; diff --git a/portable/IAR/STR71x/port.c b/portable/IAR/STR71x/port.c index c09e24464..96570d7a1 100644 --- a/portable/IAR/STR71x/port.c +++ b/portable/IAR/STR71x/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- diff --git a/portable/IAR/STR71x/portmacro.h b/portable/IAR/STR71x/portmacro.h index 980eabdf6..59b3526fa 100644 --- a/portable/IAR/STR71x/portmacro.h +++ b/portable/IAR/STR71x/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ diff --git a/portable/IAR/STR75x/ISR_Support.h b/portable/IAR/STR75x/ISR_Support.h index ea7f6de5c..72f4b1589 100644 --- a/portable/IAR/STR75x/ISR_Support.h +++ b/portable/IAR/STR75x/ISR_Support.h @@ -22,24 +22,25 @@ * ; * http://www.FreeRTOS.org * ; * http://aws.amazon.com/freertos * ; * + * ; * 1 tab == 4 spaces! * ; */ EXTERN pxCurrentTCB -EXTERN ulCriticalNesting +EXTERN ulCriticalNesting ; -Context save and restore macro definitions +Context save and restore macro definitions ; portSAVE_CONTEXT MACRO ; Push R0 as we are going to use the register. - STMDB SP !, { R0 } + STMDB SP !, { R0 } ; Set R0 to point to the task stack pointer. - STMDB SP, { SP } ^ + STMDB SP, { SP } ^ NOP SUB SP, SP, # 4 LDMIA SP !, { R0 } @@ -51,7 +52,7 @@ Push the return address onto the stack. ; Now we have saved LR we can use it instead of R0. - MOV LR, R0 + MOV LR, R0 ; Pop R0 so we can save it onto the system mode stack. @@ -108,7 +109,7 @@ Restore all system mode registers for the task. NOP ; -Restore the return address. +Restore the return address. LDR LR, [ LR, # + 60 ] ; diff --git a/portable/IAR/STR75x/port.c b/portable/IAR/STR75x/port.c index 7de562442..fe0fbd220 100644 --- a/portable/IAR/STR75x/port.c +++ b/portable/IAR/STR75x/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -176,19 +177,19 @@ __arm void vPortPreemptiveTick( void ) static void prvSetupTimerInterrupt( void ) { EIC_IRQInitTypeDef EIC_IRQInitStructure; - TB_InitTypeDef TB_InitStructure; + TB_InitTypeDef TB_InitStructure; /* Setup the EIC for the TB. */ - EIC_IRQInitStructure.EIC_IRQChannelCmd = ENABLE; - EIC_IRQInitStructure.EIC_IRQChannel = TB_IRQChannel; + EIC_IRQInitStructure.EIC_IRQChannelCmd = ENABLE; + EIC_IRQInitStructure.EIC_IRQChannel = TB_IRQChannel; EIC_IRQInitStructure.EIC_IRQChannelPriority = 1; EIC_IRQInit( &EIC_IRQInitStructure ); /* Setup the TB for the generation of the tick interrupt. */ - TB_InitStructure.TB_Mode = TB_Mode_Timing; - TB_InitStructure.TB_CounterMode = TB_CounterMode_Down; - TB_InitStructure.TB_Prescaler = portPRESCALE - 1; - TB_InitStructure.TB_AutoReload = ( ( configCPU_CLOCK_HZ / portPRESCALE ) / configTICK_RATE_HZ ); + TB_InitStructure.TB_Mode = TB_Mode_Timing; + TB_InitStructure.TB_CounterMode = TB_CounterMode_Down; + TB_InitStructure.TB_Prescaler = portPRESCALE - 1; + TB_InitStructure.TB_AutoReload = ( ( configCPU_CLOCK_HZ / portPRESCALE ) / configTICK_RATE_HZ ); TB_Init( &TB_InitStructure ); /* Enable TB Update interrupt */ diff --git a/portable/IAR/STR75x/portmacro.h b/portable/IAR/STR75x/portmacro.h index 73fbc2d9a..21f11cad8 100644 --- a/portable/IAR/STR75x/portmacro.h +++ b/portable/IAR/STR75x/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ diff --git a/portable/IAR/STR91x/ISR_Support.h b/portable/IAR/STR91x/ISR_Support.h index 8f51a529a..335216004 100644 --- a/portable/IAR/STR91x/ISR_Support.h +++ b/portable/IAR/STR91x/ISR_Support.h @@ -22,24 +22,25 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ EXTERN pxCurrentTCB -EXTERN ulCriticalNesting +EXTERN ulCriticalNesting ; -Context save and restore macro definitions +Context save and restore macro definitions ; portSAVE_CONTEXT MACRO ; Push R0 as we are going to use the register. - STMDB SP !, { R0 } + STMDB SP !, { R0 } ; Set R0 to point to the task stack pointer. - STMDB SP, { SP } ^ + STMDB SP, { SP } ^ NOP SUB SP, SP, # 4 LDMIA SP !, { R0 } @@ -51,7 +52,7 @@ Push the return address onto the stack. ; Now we have saved LR we can use it instead of R0. - MOV LR, R0 + MOV LR, R0 ; Pop R0 so we can save it onto the system mode stack. @@ -108,7 +109,7 @@ Restore all system mode registers for the task. NOP ; -Restore the return address. +Restore the return address. LDR LR, [ LR, # + 60 ] ; diff --git a/portable/IAR/STR91x/port.c b/portable/IAR/STR91x/port.c index c3d8409d2..5e643e463 100644 --- a/portable/IAR/STR91x/port.c +++ b/portable/IAR/STR91x/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -216,8 +217,8 @@ void vPortEndScheduler( void ) /* This function is copied from the ST STR7 library and is * copyright STMicroelectronics. Reproduced with permission. */ - u32 b0; - u16 a0; + u32 b0; + u16 a0; int32_t err, err_min = n; *a = a0 = ( ( n - 1 ) / 65536ul ) + 1; @@ -225,7 +226,7 @@ void vPortEndScheduler( void ) for( ; *a <= 256; ( *a )++ ) { - *b = n / *a; + *b = n / *a; err = ( int32_t ) *a * ( int32_t ) *b - ( int32_t ) n; if( abs( err ) > ( *a / 2 ) ) @@ -237,8 +238,8 @@ void vPortEndScheduler( void ) if( abs( err ) < abs( err_min ) ) { err_min = err; - a0 = *a; - b0 = *b; + a0 = *a; + b0 = *b; if( err == 0 ) { @@ -255,8 +256,8 @@ void vPortEndScheduler( void ) static void prvSetupTimerInterrupt( void ) { WDG_InitTypeDef xWdg; - uint16_t a; - uint32_t n = configCPU_PERIPH_HZ / configTICK_RATE_HZ, b; + uint16_t a; + uint32_t n = configCPU_PERIPH_HZ / configTICK_RATE_HZ, b; /* Configure the watchdog as a free running timer that generates a * periodic interrupt. */ @@ -266,7 +267,7 @@ void vPortEndScheduler( void ) WDG_StructInit( &xWdg ); prvFindFactors( n, &a, &b ); xWdg.WDG_Prescaler = a - 1; - xWdg.WDG_Preload = b - 1; + xWdg.WDG_Preload = b - 1; WDG_Init( &xWdg ); WDG_ITConfig( ENABLE ); @@ -275,8 +276,8 @@ void vPortEndScheduler( void ) VIC_ITCmd( WDG_ITLine, ENABLE ); /* Install the default handlers for both VIC's. */ - VIC0->DVAR = ( uint32_t ) prvDefaultHandler; - VIC1->DVAR = ( uint32_t ) prvDefaultHandler; + VIC0->DVAR = ( uint32_t ) prvDefaultHandler; + VIC1->DVAR = ( uint32_t ) prvDefaultHandler; WDG_Cmd( ENABLE ); } @@ -306,8 +307,8 @@ void vPortEndScheduler( void ) /* This function is copied from the ST STR7 library and is * copyright STMicroelectronics. Reproduced with permission. */ - u16 b0; - u8 a0; + u16 b0; + u8 a0; int32_t err, err_min = n; @@ -316,7 +317,7 @@ void vPortEndScheduler( void ) for( ; *a <= 256; ( *a )++ ) { - *b = n / *a; + *b = n / *a; err = ( int32_t ) *a * ( int32_t ) *b - ( int32_t ) n; if( abs( err ) > ( *a / 2 ) ) @@ -328,8 +329,8 @@ void vPortEndScheduler( void ) if( abs( err ) < abs( err_min ) ) { err_min = err; - a0 = *a; - b0 = *b; + a0 = *a; + b0 = *b; if( err == 0 ) { @@ -345,9 +346,9 @@ void vPortEndScheduler( void ) static void prvSetupTimerInterrupt( void ) { - uint8_t a; - uint16_t b; - uint32_t n = configCPU_PERIPH_HZ / configTICK_RATE_HZ; + uint8_t a; + uint16_t b; + uint32_t n = configCPU_PERIPH_HZ / configTICK_RATE_HZ; TIM_InitTypeDef timer; @@ -356,12 +357,12 @@ void vPortEndScheduler( void ) TIM_StructInit( &timer ); prvFindFactors( n, &a, &b ); - timer.TIM_Mode = TIM_OCM_CHANNEL_1; - timer.TIM_OC1_Modes = TIM_TIMING; - timer.TIM_Clock_Source = TIM_CLK_APB; - timer.TIM_Clock_Edge = TIM_CLK_EDGE_RISING; - timer.TIM_Prescaler = a - 1; - timer.TIM_Pulse_Level_1 = TIM_HIGH; + timer.TIM_Mode = TIM_OCM_CHANNEL_1; + timer.TIM_OC1_Modes = TIM_TIMING; + timer.TIM_Clock_Source = TIM_CLK_APB; + timer.TIM_Clock_Edge = TIM_CLK_EDGE_RISING; + timer.TIM_Prescaler = a - 1; + timer.TIM_Pulse_Level_1 = TIM_HIGH; timer.TIM_Pulse_Length_1 = s_nPulseLength = b - 1; TIM_Init( TIM2, &timer ); @@ -371,8 +372,8 @@ void vPortEndScheduler( void ) VIC_ITCmd( TIM2_ITLine, ENABLE ); /* Install the default handlers for both VIC's. */ - VIC0->DVAR = ( uint32_t ) prvDefaultHandler; - VIC1->DVAR = ( uint32_t ) prvDefaultHandler; + VIC0->DVAR = ( uint32_t ) prvDefaultHandler; + VIC1->DVAR = ( uint32_t ) prvDefaultHandler; TIM_CounterCmd( TIM2, TIM_CLEAR ); TIM_CounterCmd( TIM2, TIM_START ); @@ -392,7 +393,7 @@ void vPortEndScheduler( void ) } /* Clear the interrupt in the watchdog. */ - TIM2->SR &= ~TIM_FLAG_OC1; + TIM2->SR &= ~TIM_FLAG_OC1; } #endif /* USE_WATCHDOG_TICK */ diff --git a/portable/IAR/STR91x/portmacro.h b/portable/IAR/STR91x/portmacro.h index bca060acb..010d39e6c 100644 --- a/portable/IAR/STR91x/portmacro.h +++ b/portable/IAR/STR91x/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ diff --git a/portable/IAR/V850ES/ISR_Support.h b/portable/IAR/V850ES/ISR_Support.h index 06431339f..7a1361e96 100644 --- a/portable/IAR/V850ES/ISR_Support.h +++ b/portable/IAR/V850ES/ISR_Support.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ EXTERN pxCurrentTCB @@ -35,20 +36,20 @@ Context save and restore macro definitions portSAVE_CONTEXT MACRO - add - 0x0C, sp; + add - 0x0C, sp; prepare stack to save necessary values -st.w lp, 8[ sp ]; +st.w lp, 8[ sp ]; store LP to stack - stsr 0, r31 + stsr 0, r31 st.w lp, 4[ sp ]; store EIPC to stack - stsr 1, lp + stsr 1, lp st.w lp, 0[ sp ]; store EIPSW to stack #if configDATA_MODE == 1; Using the Tiny data model prepare { r20, r21, r22, r23, r24, r25, r26, r27, r28, r29, r30 }, 76, sp; save general purpose registers - sst.w r19, 72[ ep ] + sst.w r19, 72[ ep ] sst.w r18, 68[ ep ] sst.w r17, 64[ ep ] sst.w r16, 60[ ep ] @@ -87,11 +88,11 @@ sst.w r2, 8[ ep ] sst.w r1, 4[ ep ] MOVHI hi1( usCriticalNesting ), r0, r1; save usCriticalNesting value to stack -ld.w lw1( usCriticalNesting )[ r1 ], r2 +ld.w lw1( usCriticalNesting )[ r1 ], r2 sst.w r2, 0[ ep ] MOVHI hi1( pxCurrentTCB ), r0, r1; save SP to top of current TCB -ld.w lw1( pxCurrentTCB )[ r1 ], r2 +ld.w lw1( pxCurrentTCB )[ r1 ], r2 st.w sp, 0[ r2 ] ENDM @@ -100,11 +101,11 @@ portRESTORE_CONTEXT MACRO MOVHI hi1( pxCurrentTCB ), r0, r1; get Stackpointer address -ld.w lw1( pxCurrentTCB )[ r1 ], sp +ld.w lw1( pxCurrentTCB )[ r1 ], sp MOV sp, r1 ld.w 0[ r1 ], sp; load stackpointer -MOV sp, ep; +MOV sp, ep; set stack pointer to element pointer sld.w 0[ ep ], r1; load usCriticalNesting value from stack @@ -157,7 +158,7 @@ restore EIPC from stack ldsr lp, 0 ld.w 8[ sp ], lp; restore LP from stack - add 0x0C, sp; + add 0x0C, sp; set SP to right position RETI diff --git a/portable/IAR/V850ES/port.c b/portable/IAR/V850ES/port.c index 038a509d5..0b2c2d52c 100644 --- a/portable/IAR/V850ES/port.c +++ b/portable/IAR/V850ES/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Standard includes. */ @@ -44,7 +45,7 @@ typedef void TCB_t; extern volatile TCB_t * volatile pxCurrentTCB; /* Keeps track of the nesting level of critical sections. */ -volatile StackType_t usCriticalNesting = portINITIAL_CRITICAL_NESTING; +volatile StackType_t usCriticalNesting = portINITIAL_CRITICAL_NESTING; /*-----------------------------------------------------------*/ /* Sets up the timer to generate the tick interrupt. */ @@ -55,75 +56,75 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, TaskFunction_t pxCode, void * pvParameters ) { - *pxTopOfStack = ( StackType_t ) pxCode; /* Task function start address */ + *pxTopOfStack = ( StackType_t ) pxCode; /* Task function start address */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pxCode; /* Task function start address */ + *pxTopOfStack = ( StackType_t ) pxCode; /* Task function start address */ pxTopOfStack--; - *pxTopOfStack = portPSW; /* Initial PSW value */ + *pxTopOfStack = portPSW; /* Initial PSW value */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x20202020; /* Initial Value of R20 */ + *pxTopOfStack = ( StackType_t ) 0x20202020; /* Initial Value of R20 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x21212121; /* Initial Value of R21 */ + *pxTopOfStack = ( StackType_t ) 0x21212121; /* Initial Value of R21 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x22222222; /* Initial Value of R22 */ + *pxTopOfStack = ( StackType_t ) 0x22222222; /* Initial Value of R22 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x23232323; /* Initial Value of R23 */ + *pxTopOfStack = ( StackType_t ) 0x23232323; /* Initial Value of R23 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x24242424; /* Initial Value of R24 */ + *pxTopOfStack = ( StackType_t ) 0x24242424; /* Initial Value of R24 */ pxTopOfStack--; #if ( __DATA_MODEL__ == 0 ) || ( __DATA_MODEL__ == 1 ) *pxTopOfStack = ( StackType_t ) 0x25252525; /* Initial Value of R25 */ pxTopOfStack--; #endif /* configDATA_MODE */ - *pxTopOfStack = ( StackType_t ) 0x26262626; /* Initial Value of R26 */ + *pxTopOfStack = ( StackType_t ) 0x26262626; /* Initial Value of R26 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x27272727; /* Initial Value of R27 */ + *pxTopOfStack = ( StackType_t ) 0x27272727; /* Initial Value of R27 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x28282828; /* Initial Value of R28 */ + *pxTopOfStack = ( StackType_t ) 0x28282828; /* Initial Value of R28 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x29292929; /* Initial Value of R29 */ + *pxTopOfStack = ( StackType_t ) 0x29292929; /* Initial Value of R29 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x30303030; /* Initial Value of R30 */ + *pxTopOfStack = ( StackType_t ) 0x30303030; /* Initial Value of R30 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x19191919; /* Initial Value of R19 */ + *pxTopOfStack = ( StackType_t ) 0x19191919; /* Initial Value of R19 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x18181818; /* Initial Value of R18 */ + *pxTopOfStack = ( StackType_t ) 0x18181818; /* Initial Value of R18 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x17171717; /* Initial Value of R17 */ + *pxTopOfStack = ( StackType_t ) 0x17171717; /* Initial Value of R17 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x16161616; /* Initial Value of R16 */ + *pxTopOfStack = ( StackType_t ) 0x16161616; /* Initial Value of R16 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x15151515; /* Initial Value of R15 */ + *pxTopOfStack = ( StackType_t ) 0x15151515; /* Initial Value of R15 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x14141414; /* Initial Value of R14 */ + *pxTopOfStack = ( StackType_t ) 0x14141414; /* Initial Value of R14 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x13131313; /* Initial Value of R13 */ + *pxTopOfStack = ( StackType_t ) 0x13131313; /* Initial Value of R13 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x12121212; /* Initial Value of R12 */ + *pxTopOfStack = ( StackType_t ) 0x12121212; /* Initial Value of R12 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x11111111; /* Initial Value of R11 */ + *pxTopOfStack = ( StackType_t ) 0x11111111; /* Initial Value of R11 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x10101010; /* Initial Value of R10 */ + *pxTopOfStack = ( StackType_t ) 0x10101010; /* Initial Value of R10 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x99999999; /* Initial Value of R09 */ + *pxTopOfStack = ( StackType_t ) 0x99999999; /* Initial Value of R09 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x88888888; /* Initial Value of R08 */ + *pxTopOfStack = ( StackType_t ) 0x88888888; /* Initial Value of R08 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x77777777; /* Initial Value of R07 */ + *pxTopOfStack = ( StackType_t ) 0x77777777; /* Initial Value of R07 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x66666666; /* Initial Value of R06 */ + *pxTopOfStack = ( StackType_t ) 0x66666666; /* Initial Value of R06 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) 0x55555555; /* Initial Value of R05 */ + *pxTopOfStack = ( StackType_t ) 0x55555555; /* Initial Value of R05 */ pxTopOfStack--; #if __DATA_MODEL__ == 0 || __DATA_MODEL__ == 1 *pxTopOfStack = ( StackType_t ) 0x44444444; /* Initial Value of R04 */ pxTopOfStack--; #endif /* configDATA_MODE */ - *pxTopOfStack = ( StackType_t ) 0x22222222; /* Initial Value of R02 */ + *pxTopOfStack = ( StackType_t ) 0x22222222; /* Initial Value of R02 */ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) pvParameters; /* R1 is expected to hold the function parameter*/ + *pxTopOfStack = ( StackType_t ) pvParameters; /* R1 is expected to hold the function parameter*/ pxTopOfStack--; - *pxTopOfStack = ( StackType_t ) portNO_CRITICAL_SECTION_NESTING; + *pxTopOfStack = ( StackType_t ) portNO_CRITICAL_SECTION_NESTING; /* * Return a pointer to the top of the stack we have generated so this can @@ -159,9 +160,9 @@ void vPortEndScheduler( void ) */ static void prvSetupTimerInterrupt( void ) { - TM0CE = 0; /* TMM0 operation disable */ - TM0EQMK0 = 1; /* INTTM0EQ0 interrupt disable */ - TM0EQIF0 = 0; /* clear INTTM0EQ0 interrupt flag */ + TM0CE = 0; /* TMM0 operation disable */ + TM0EQMK0 = 1; /* INTTM0EQ0 interrupt disable */ + TM0EQIF0 = 0; /* clear INTTM0EQ0 interrupt flag */ #ifdef __IAR_V850ES_Fx3__ { @@ -174,9 +175,9 @@ static void prvSetupTimerInterrupt( void ) #endif TM0EQIC0 &= 0xF8; - TM0CTL0 = 0x00; - TM0EQIF0 = 0; /* clear INTTM0EQ0 interrupt flag */ - TM0EQMK0 = 0; /* INTTM0EQ0 interrupt enable */ - TM0CE = 1; /* TMM0 operation enable */ + TM0CTL0 = 0x00; + TM0EQIF0 = 0; /* clear INTTM0EQ0 interrupt flag */ + TM0EQMK0 = 0; /* INTTM0EQ0 interrupt enable */ + TM0CE = 1; /* TMM0 operation enable */ } /*-----------------------------------------------------------*/ diff --git a/portable/IAR/V850ES/portmacro.h b/portable/IAR/V850ES/portmacro.h index 4b2ccafb5..f0a58710d 100644 --- a/portable/IAR/V850ES/portmacro.h +++ b/portable/IAR/V850ES/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/MPLAB/PIC18F/port.c b/portable/MPLAB/PIC18F/port.c index 15c67a3ed..f85f5b75e 100644 --- a/portable/MPLAB/PIC18F/port.c +++ b/portable/MPLAB/PIC18F/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* @@ -346,7 +347,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, void * pvParameters ) { uint32_t ulAddress; - uint8_t ucBlock; + uint8_t ucBlock; /* Place a few bytes of known values on the bottom of the stack. * This is just useful for debugging. */ @@ -364,11 +365,11 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, * * First store the function parameters. This is where the task will expect to * find them when it starts running. */ - ulAddress = ( uint32_t ) pvParameters; + ulAddress = ( uint32_t ) pvParameters; *pxTopOfStack = ( StackType_t ) ( ulAddress & ( uint32_t ) 0x00ff ); pxTopOfStack++; - ulAddress >>= 8; + ulAddress >>= 8; *pxTopOfStack = ( StackType_t ) ( ulAddress & ( uint32_t ) 0x00ff ); pxTopOfStack++; @@ -446,17 +447,17 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, /* The only function return address so far is the address of the * task. */ - ulAddress = ( uint32_t ) pxCode; + ulAddress = ( uint32_t ) pxCode; /* TOS low. */ *pxTopOfStack = ( StackType_t ) ( ulAddress & ( uint32_t ) 0x00ff ); pxTopOfStack++; - ulAddress >>= 8; + ulAddress >>= 8; /* TOS high. */ *pxTopOfStack = ( StackType_t ) ( ulAddress & ( uint32_t ) 0x00ff ); pxTopOfStack++; - ulAddress >>= 8; + ulAddress >>= 8; /* TOS even higher. */ *pxTopOfStack = ( StackType_t ) ( ulAddress & ( uint32_t ) 0x00ff ); @@ -581,8 +582,8 @@ static void prvTickISR( void ) static void prvSetupTimerInterrupt( void ) { const uint32_t ulConstCompareValue = ( ( configCPU_CLOCK_HZ / portTIMER_FOSC_SCALE ) / configTICK_RATE_HZ ); - uint32_t ulCompareValue; - uint8_t ucByte; + uint32_t ulCompareValue; + uint8_t ucByte; /* Interrupts are disabled when this function is called. * @@ -590,24 +591,24 @@ static void prvSetupTimerInterrupt( void ) * 1. * * Clear the time count then setup timer. */ - TMR1H = ( uint8_t ) 0x00; - TMR1L = ( uint8_t ) 0x00; + TMR1H = ( uint8_t ) 0x00; + TMR1L = ( uint8_t ) 0x00; /* Set the compare match value. */ - ulCompareValue = ulConstCompareValue; - CCPR1L = ( uint8_t ) ( ulCompareValue & ( uint32_t ) 0xff ); - ulCompareValue >>= ( uint32_t ) 8; - CCPR1H = ( uint8_t ) ( ulCompareValue & ( uint32_t ) 0xff ); + ulCompareValue = ulConstCompareValue; + CCPR1L = ( uint8_t ) ( ulCompareValue & ( uint32_t ) 0xff ); + ulCompareValue >>= ( uint32_t ) 8; + CCPR1H = ( uint8_t ) ( ulCompareValue & ( uint32_t ) 0xff ); CCP1CONbits.CCP1M0 = portBIT_SET; /*< Compare match mode. */ CCP1CONbits.CCP1M1 = portBIT_SET; /*< Compare match mode. */ CCP1CONbits.CCP1M2 = portBIT_CLEAR; /*< Compare match mode. */ CCP1CONbits.CCP1M3 = portBIT_SET; /*< Compare match mode. */ - PIE1bits.CCP1IE = portBIT_SET; /*< Interrupt enable. */ + PIE1bits.CCP1IE = portBIT_SET; /*< Interrupt enable. */ /* We are only going to use the global interrupt bit, so set the peripheral * bit to true. */ - INTCONbits.GIEL = portBIT_SET; + INTCONbits.GIEL = portBIT_SET; /* Provided library function for setting up the timer that will produce the * tick. */ diff --git a/portable/MPLAB/PIC18F/portmacro.h b/portable/MPLAB/PIC18F/portmacro.h index c75984fc4..fa3f74757 100644 --- a/portable/MPLAB/PIC18F/portmacro.h +++ b/portable/MPLAB/PIC18F/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H @@ -71,9 +72,9 @@ typedef unsigned char UBaseType_t; #define portENABLE_INTERRUPTS() INTCONbits.GIEH = 1; /* Push the INTCON register onto the stack, then disable interrupts. */ -#define portENTER_CRITICAL() \ - POSTINC1 = INTCON; \ - INTCONbits.GIEH = 0; +#define portENTER_CRITICAL() \ + POSTINC1 = INTCON; \ + INTCONbits.GIEH = 0; /* Retrieve the INTCON register from the stack, and enable interrupts * if they were saved as being enabled. Don't modify any other bits diff --git a/portable/MPLAB/PIC24_dsPIC/port.c b/portable/MPLAB/PIC24_dsPIC/port.c index e9e1088b3..46d1843fb 100644 --- a/portable/MPLAB/PIC24_dsPIC/port.c +++ b/portable/MPLAB/PIC24_dsPIC/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* @@ -162,8 +163,8 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, TaskFunction_t pxCode, void * pvParameters ) { - uint16_t usCode; - UBaseType_t i; + uint16_t usCode; + UBaseType_t i; const StackType_t xInitialStack[] = { @@ -203,22 +204,22 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, /* Setup the stack as if a yield had occurred. * * Save the low bytes of the program counter. */ - usCode = ( uint16_t ) pxCode; - *pxTopOfStack = ( StackType_t ) usCode; + usCode = ( uint16_t ) pxCode; + *pxTopOfStack = ( StackType_t ) usCode; pxTopOfStack++; /* Save the high byte of the program counter. This will always be zero * here as it is passed in a 16bit pointer. If the address is greater than * 16 bits then the pointer will point to a jump table. */ - *pxTopOfStack = ( StackType_t ) 0; + *pxTopOfStack = ( StackType_t ) 0; pxTopOfStack++; /* Status register with interrupts enabled. */ - *pxTopOfStack = portINITIAL_SR; + *pxTopOfStack = portINITIAL_SR; pxTopOfStack++; /* Parameters are passed in W0. */ - *pxTopOfStack = ( StackType_t ) pvParameters; + *pxTopOfStack = ( StackType_t ) pvParameters; pxTopOfStack++; for( i = 0; i < ( sizeof( xInitialStack ) / sizeof( StackType_t ) ); i++ ) @@ -227,7 +228,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, pxTopOfStack++; } - *pxTopOfStack = CORCON; + *pxTopOfStack = CORCON; pxTopOfStack++; #if defined( __HAS_EDS__ ) @@ -241,7 +242,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, #endif /* __HAS_EDS__ */ /* Finally the critical nesting depth. */ - *pxTopOfStack = 0x00; + *pxTopOfStack = 0x00; pxTopOfStack++; return pxTopOfStack; @@ -280,26 +281,26 @@ __attribute__( ( weak ) ) void vApplicationSetupTickTimerInterrupt( void ) const uint32_t ulCompareMatch = ( ( configCPU_CLOCK_HZ / portTIMER_PRESCALE ) / configTICK_RATE_HZ ) - 1; /* Prescale of 8. */ - T1CON = 0; - TMR1 = 0; + T1CON = 0; + TMR1 = 0; - PR1 = ( uint16_t ) ulCompareMatch; + PR1 = ( uint16_t ) ulCompareMatch; /* Setup timer 1 interrupt priority. */ - IPC0bits.T1IP = configKERNEL_INTERRUPT_PRIORITY; + IPC0bits.T1IP = configKERNEL_INTERRUPT_PRIORITY; /* Clear the interrupt as a starting condition. */ - IFS0bits.T1IF = 0; + IFS0bits.T1IF = 0; /* Enable the interrupt. */ - IEC0bits.T1IE = 1; + IEC0bits.T1IE = 1; /* Setup the prescale value. */ T1CONbits.TCKPS0 = 1; T1CONbits.TCKPS1 = 0; /* Start the timer. */ - T1CONbits.TON = 1; + T1CONbits.TON = 1; } /*-----------------------------------------------------------*/ diff --git a/portable/MPLAB/PIC24_dsPIC/portmacro.h b/portable/MPLAB/PIC24_dsPIC/portmacro.h index 17e670747..a1ab91ff9 100644 --- a/portable/MPLAB/PIC24_dsPIC/portmacro.h +++ b/portable/MPLAB/PIC24_dsPIC/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/MPLAB/PIC32MEC14xx/ISR_Support.h b/portable/MPLAB/PIC32MEC14xx/ISR_Support.h index feb0517b0..fadf12d1a 100644 --- a/portable/MPLAB/PIC32MEC14xx/ISR_Support.h +++ b/portable/MPLAB/PIC32MEC14xx/ISR_Support.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #include "FreeRTOSConfig.h" diff --git a/portable/MPLAB/PIC32MEC14xx/port.c b/portable/MPLAB/PIC32MEC14xx/port.c index 802e81859..eaf189b77 100644 --- a/portable/MPLAB/PIC32MEC14xx/port.c +++ b/portable/MPLAB/PIC32MEC14xx/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -113,7 +114,7 @@ * the ISR stack. */ #define portISR_STACK_FILL_BYTE 0xee - static const uint8_t ucExpectedStackBytes[] = + static const uint8_t ucExpectedStackBytes[] = { portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \ portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \ @@ -140,17 +141,17 @@ static void prvTaskExitError( void ); /* Records the interrupt nesting depth. This is initialised to one as it is * decremented to 0 when the first task starts. */ -volatile UBaseType_t uxInterruptNesting = 0x01; +volatile UBaseType_t uxInterruptNesting = 0x01; /* Stores the task stack pointer when a switch is made to use the system stack. */ -UBaseType_t uxSavedTaskStackPointer = 0; +UBaseType_t uxSavedTaskStackPointer = 0; /* The stack used by interrupt service routines that cause a context switch. */ -StackType_t xISRStack[ configISR_STACK_SIZE ] = { 0 }; +StackType_t xISRStack[ configISR_STACK_SIZE ] = { 0 }; /* The top of stack value ensures there is enough space to store 6 registers on * the callers stack, as some functions seem to want to do this. */ -const StackType_t * const xISRStackTop = &( xISRStack[ configISR_STACK_SIZE - 7 ] ); +const StackType_t * const xISRStackTop = &( xISRStack[ configISR_STACK_SIZE - 7 ] ); /*-----------------------------------------------------------*/ @@ -232,17 +233,17 @@ __attribute__( ( weak ) ) void vApplicationSetupTickTimerInterrupt( void ) configASSERT( ulPreload != 0UL ); /* Configure the RTOS timer. */ - portMMCR_RTMR_CONTROL = 0ul; - portMMCR_RTMR_PRELOAD = ulPreload; + portMMCR_RTMR_CONTROL = 0ul; + portMMCR_RTMR_PRELOAD = ulPreload; /* Configure interrupts from the RTOS timer. */ - portMMCR_JTVIC_GIRQ23_SRC = ( portGIRQ23_RTOS_TIMER_MASK ); + portMMCR_JTVIC_GIRQ23_SRC = ( portGIRQ23_RTOS_TIMER_MASK ); portMMCR_JTVIC_GIRQ23_PRIA &= ~( 0x0Ful << 16 ); portMMCR_JTVIC_GIRQ23_PRIA |= ( ( portIPL_TO_CODE( configKERNEL_INTERRUPT_PRIORITY ) ) << 16 ); portMMCR_JTVIC_GIRQ23_SETEN = ( portGIRQ23_RTOS_TIMER_MASK ); /* Enable the RTOS timer. */ - portMMCR_RTMR_CONTROL = 0x0Fu; + portMMCR_RTMR_CONTROL = 0x0Fu; } /*-----------------------------------------------------------*/ @@ -267,7 +268,7 @@ BaseType_t xPortStartScheduler( void ) #endif /* configCHECK_FOR_STACK_OVERFLOW > 2 */ /* Clear the software interrupt flag. */ - portMMCR_JTVIC_GIRQ24_SRC = ( portGIRQ24_M14K_SOFTIRQ0_MASK ); + portMMCR_JTVIC_GIRQ24_SRC = ( portGIRQ24_M14K_SOFTIRQ0_MASK ); /* Set software timer priority. Each GIRQn has one nibble containing its * priority */ @@ -283,7 +284,7 @@ BaseType_t xPortStartScheduler( void ) /* Start the highest priority task that has been created so far. Its stack * location is loaded into uxSavedTaskStackPointer. */ - uxSavedTaskStackPointer = *( UBaseType_t * ) pxCurrentTCB; + uxSavedTaskStackPointer = *( UBaseType_t * ) pxCurrentTCB; vPortStartFirstTask(); /* Should never get here as the tasks will now be executing! Call the task @@ -299,14 +300,14 @@ BaseType_t xPortStartScheduler( void ) void vPortIncrementTick( void ) { UBaseType_t uxSavedStatus; - uint32_t ulCause; + uint32_t ulCause; uxSavedStatus = uxPortSetInterruptMaskFromISR(); { if( xTaskIncrementTick() != pdFALSE ) { /* Pend a context switch. */ - ulCause = ulPortGetCP0Cause(); + ulCause = ulPortGetCP0Cause(); ulCause |= ( 1ul << 8UL ); vPortSetCP0Cause( ulCause ); } diff --git a/portable/MPLAB/PIC32MEC14xx/portmacro.h b/portable/MPLAB/PIC32MEC14xx/portmacro.h index 8ab08ef39..ba05ed731 100644 --- a/portable/MPLAB/PIC32MEC14xx/portmacro.h +++ b/portable/MPLAB/PIC32MEC14xx/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H @@ -161,19 +162,19 @@ { \ uint32_t ulStatus; \ /* Mask interrupts at and below the kernel interrupt priority. */ \ - ulStatus = ulPortGetCP0Status(); \ + ulStatus = ulPortGetCP0Status(); \ ulStatus &= ~portALL_IPL_BITS; \ vPortSetCP0Status( ( ulStatus | ( configMAX_SYSCALL_INTERRUPT_PRIORITY << portIPL_SHIFT ) ) ); \ } #endif /* configASSERT */ - #define portENABLE_INTERRUPTS() \ - { \ - uint32_t ulStatus; \ - /* Unmask all interrupts. */ \ - ulStatus = ulPortGetCP0Status(); \ - ulStatus &= ~portALL_IPL_BITS; \ - vPortSetCP0Status( ulStatus ); \ + #define portENABLE_INTERRUPTS() \ + { \ + uint32_t ulStatus; \ + /* Unmask all interrupts. */ \ + ulStatus = ulPortGetCP0Status(); \ + ulStatus &= ~portALL_IPL_BITS; \ + vPortSetCP0Status( ulStatus ); \ } @@ -205,7 +206,7 @@ /*-----------------------------------------------------------*/ - #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - _clz( ( uxReadyPriorities ) ) ) + #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - _clz( ( uxReadyPriorities ) ) ) #endif /* taskRECORD_READY_PRIORITY */ @@ -217,7 +218,7 @@ { \ uint32_t ulCause; \ /* Trigger software interrupt. */ \ - ulCause = ulPortGetCP0Cause(); \ + ulCause = ulPortGetCP0Cause(); \ ulCause |= portSW0_BIT; \ vPortSetCP0Cause( ulCause ); \ } diff --git a/portable/MPLAB/PIC32MX/ISR_Support.h b/portable/MPLAB/PIC32MX/ISR_Support.h index 333a52429..c826faf27 100644 --- a/portable/MPLAB/PIC32MX/ISR_Support.h +++ b/portable/MPLAB/PIC32MX/ISR_Support.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #include "FreeRTOSConfig.h" diff --git a/portable/MPLAB/PIC32MX/port.c b/portable/MPLAB/PIC32MX/port.c index 57b6eefed..38ac85a80 100644 --- a/portable/MPLAB/PIC32MX/port.c +++ b/portable/MPLAB/PIC32MX/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -71,7 +72,7 @@ */ #ifndef configTICK_INTERRUPT_VECTOR #define configTICK_INTERRUPT_VECTOR _TIMER_1_VECTOR - #define configCLEAR_TICK_TIMER_INTERRUPT() IFS0CLR = _IFS0_T1IF_MASK + #define configCLEAR_TICK_TIMER_INTERRUPT() IFS0CLR = _IFS0_T1IF_MASK #else #ifndef configCLEAR_TICK_TIMER_INTERRUPT #error If configTICK_INTERRUPT_VECTOR is defined in application code then configCLEAR_TICK_TIMER_INTERRUPT must also be defined in application code. @@ -141,17 +142,17 @@ static void prvTaskExitError( void ); /* Records the interrupt nesting depth. This is initialised to one as it is * decremented to 0 when the first task starts. */ -volatile UBaseType_t uxInterruptNesting = 0x01; +volatile UBaseType_t uxInterruptNesting = 0x01; /* Stores the task stack pointer when a switch is made to use the system stack. */ -UBaseType_t uxSavedTaskStackPointer = 0; +UBaseType_t uxSavedTaskStackPointer = 0; /* The stack used by interrupt service routines that cause a context switch. */ __attribute__( ( aligned( 8 ) ) ) StackType_t xISRStack[ configISR_STACK_SIZE ] = { 0 }; /* The top of stack value ensures there is enough space to store 6 registers on * the callers stack, as some functions seem to want to do this. */ -const StackType_t * const xISRStackTop = &( xISRStack[ ( configISR_STACK_SIZE & ~portBYTE_ALIGNMENT_MASK ) - 8 ] ); +const StackType_t * const xISRStackTop = &( xISRStack[ ( configISR_STACK_SIZE & ~portBYTE_ALIGNMENT_MASK ) - 8 ] ); /*-----------------------------------------------------------*/ @@ -220,19 +221,19 @@ __attribute__( ( weak ) ) void vApplicationSetupTickTimerInterrupt( void ) { const uint32_t ulCompareMatch = ( ( configPERIPHERAL_CLOCK_HZ / portTIMER_PRESCALE ) / configTICK_RATE_HZ ) - 1; - T1CON = 0x0000; + T1CON = 0x0000; T1CONbits.TCKPS = portPRESCALE_BITS; - PR1 = ulCompareMatch; - IPC1bits.T1IP = configKERNEL_INTERRUPT_PRIORITY; + PR1 = ulCompareMatch; + IPC1bits.T1IP = configKERNEL_INTERRUPT_PRIORITY; /* Clear the interrupt as a starting condition. */ - IFS0bits.T1IF = 0; + IFS0bits.T1IF = 0; /* Enable the interrupt. */ - IEC0bits.T1IE = 1; + IEC0bits.T1IE = 1; /* Start the timer. */ - T1CONbits.TON = 1; + T1CONbits.TON = 1; } /*-----------------------------------------------------------*/ @@ -257,15 +258,15 @@ BaseType_t xPortStartScheduler( void ) #endif /* configCHECK_FOR_STACK_OVERFLOW > 2 */ /* Clear the software interrupt flag. */ - IFS0CLR = _IFS0_CS0IF_MASK; + IFS0CLR = _IFS0_CS0IF_MASK; /* Set software timer priority. */ - IPC0CLR = _IPC0_CS0IP_MASK; - IPC0SET = ( configKERNEL_INTERRUPT_PRIORITY << _IPC0_CS0IP_POSITION ); + IPC0CLR = _IPC0_CS0IP_MASK; + IPC0SET = ( configKERNEL_INTERRUPT_PRIORITY << _IPC0_CS0IP_POSITION ); /* Enable software interrupt. */ - IEC0CLR = _IEC0_CS0IE_MASK; - IEC0SET = 1 << _IEC0_CS0IE_POSITION; + IEC0CLR = _IEC0_CS0IE_MASK; + IEC0SET = 1 << _IEC0_CS0IE_POSITION; /* Setup the timer to generate the tick. Interrupts will have been * disabled by the time we get here. */ diff --git a/portable/MPLAB/PIC32MX/portmacro.h b/portable/MPLAB/PIC32MX/portmacro.h index 4a7ebf0fe..8b683fd00 100644 --- a/portable/MPLAB/PIC32MX/portmacro.h +++ b/portable/MPLAB/PIC32MX/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H @@ -110,7 +111,7 @@ uint32_t ulStatus; \ \ /* Mask interrupts at and below the kernel interrupt priority. */ \ - ulStatus = _CP0_GET_STATUS(); \ + ulStatus = _CP0_GET_STATUS(); \ ulStatus &= ~portALL_IPL_BITS; \ _CP0_SET_STATUS( ( ulStatus | ( configMAX_SYSCALL_INTERRUPT_PRIORITY << portIPL_SHIFT ) ) ); \ } @@ -121,7 +122,7 @@ uint32_t ulStatus; \ \ /* Unmask all interrupts. */ \ - ulStatus = _CP0_GET_STATUS(); \ + ulStatus = _CP0_GET_STATUS(); \ ulStatus &= ~portALL_IPL_BITS; \ _CP0_SET_STATUS( ulStatus ); \ } @@ -155,7 +156,7 @@ /*-----------------------------------------------------------*/ - #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - _clz( ( uxReadyPriorities ) ) ) + #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - _clz( ( uxReadyPriorities ) ) ) #endif /* taskRECORD_READY_PRIORITY */ @@ -168,7 +169,7 @@ uint32_t ulCause; \ \ /* Trigger software interrupt. */ \ - ulCause = _CP0_GET_CAUSE(); \ + ulCause = _CP0_GET_CAUSE(); \ ulCause |= portSW0_BIT; \ _CP0_SET_CAUSE( ulCause ); \ } diff --git a/portable/MPLAB/PIC32MZ/ISR_Support.h b/portable/MPLAB/PIC32MZ/ISR_Support.h index 6a3a968ec..8cf035d9d 100644 --- a/portable/MPLAB/PIC32MZ/ISR_Support.h +++ b/portable/MPLAB/PIC32MZ/ISR_Support.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #include "FreeRTOSConfig.h" @@ -164,7 +165,7 @@ sw k1, portSTATUS_STACK_LOCATION( sp ) /* Prepare to enable interrupts above the current priority. */ srl k0, k0, 0xa ins k1, k0, 10, 7 -srl k0, k0, 0x7 /* This copies the MSB of the IPL, but it would be an error if it was set anyway. */ +srl k0, k0, 0x7 /* This copies the MSB of the IPL, but it would be an error if it was set anyway. */ ins k1, k0, 18, 1 ins k1, zero, 1, 4 @@ -395,7 +396,7 @@ sw k1, 0 ( k0 ) beq zero, zero, 2f nop - 1 : /* Restore the STATUS and EPC registers */ + 1 : /* Restore the STATUS and EPC registers */ lw k0, portSTATUS_STACK_LOCATION( s5 ) lw k1, portEPC_STACK_LOCATION( s5 ) @@ -404,7 +405,7 @@ sw k1, 0 ( k0 ) add sp, zero, s5 lw s5, 40 ( sp ) - 2 : /* Adjust the stack pointer */ + 2 : /* Adjust the stack pointer */ addiu sp, sp, portCONTEXT_SIZE #else /* if ( __mips_hard_float == 1 ) && ( configUSE_TASK_FPU_SUPPORT == 1 ) */ diff --git a/portable/MPLAB/PIC32MZ/port.c b/portable/MPLAB/PIC32MZ/port.c index e43430a8e..444aaecfe 100644 --- a/portable/MPLAB/PIC32MZ/port.c +++ b/portable/MPLAB/PIC32MZ/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -93,7 +94,7 @@ */ #ifndef configTICK_INTERRUPT_VECTOR #define configTICK_INTERRUPT_VECTOR _TIMER_1_VECTOR - #define configCLEAR_TICK_TIMER_INTERRUPT() IFS0CLR = _IFS0_T1IF_MASK + #define configCLEAR_TICK_TIMER_INTERRUPT() IFS0CLR = _IFS0_T1IF_MASK #else #ifndef configCLEAR_TICK_TIMER_INTERRUPT #error If configTICK_INTERRUPT_VECTOR is defined in application code then configCLEAR_TICK_TIMER_INTERRUPT must also be defined in application code. @@ -146,10 +147,10 @@ static void prvTaskExitError( void ); /* Records the interrupt nesting depth. This is initialised to one as it is * decremented to 0 when the first task starts. */ -volatile UBaseType_t uxInterruptNesting = 0x01; +volatile UBaseType_t uxInterruptNesting = 0x01; /* Stores the task stack pointer when a switch is made to use the system stack. */ -UBaseType_t uxSavedTaskStackPointer = 0; +UBaseType_t uxSavedTaskStackPointer = 0; /* The stack used by interrupt service routines that cause a context switch. */ __attribute__( ( aligned( 8 ) ) ) StackType_t xISRStack[ configISR_STACK_SIZE ] = { 0 }; @@ -158,12 +159,12 @@ __attribute__( ( aligned( 8 ) ) ) StackType_t xISRStack[ configISR_STACK_SIZE ] * the callers stack, as some functions seem to want to do this. 8 byte alignment * is required to allow double word floating point stack pushes generated by the * compiler. */ -const StackType_t * const xISRStackTop = &( xISRStack[ ( configISR_STACK_SIZE & ~portBYTE_ALIGNMENT_MASK ) - 8 ] ); +const StackType_t * const xISRStackTop = &( xISRStack[ ( configISR_STACK_SIZE & ~portBYTE_ALIGNMENT_MASK ) - 8 ] ); /* Saved as part of the task context. Set to pdFALSE if the task does not * require an FPU context. */ #if ( __mips_hard_float == 1 ) && ( configUSE_TASK_FPU_SUPPORT == 1 ) - uint32_t ulTaskHasFPUContext = 0; + uint32_t ulTaskHasFPUContext = 0; #endif /*-----------------------------------------------------------*/ @@ -239,19 +240,19 @@ __attribute__( ( weak ) ) void vApplicationSetupTickTimerInterrupt( void ) { const uint32_t ulCompareMatch = ( ( configPERIPHERAL_CLOCK_HZ / portTIMER_PRESCALE ) / configTICK_RATE_HZ ) - 1UL; - T1CON = 0x0000; + T1CON = 0x0000; T1CONbits.TCKPS = portPRESCALE_BITS; - PR1 = ulCompareMatch; - IPC1bits.T1IP = configKERNEL_INTERRUPT_PRIORITY; + PR1 = ulCompareMatch; + IPC1bits.T1IP = configKERNEL_INTERRUPT_PRIORITY; /* Clear the interrupt as a starting condition. */ - IFS0bits.T1IF = 0; + IFS0bits.T1IF = 0; /* Enable the interrupt. */ - IEC0bits.T1IE = 1; + IEC0bits.T1IE = 1; /* Start the timer. */ - T1CONbits.TON = 1; + T1CONbits.TON = 1; } /*-----------------------------------------------------------*/ @@ -276,15 +277,15 @@ BaseType_t xPortStartScheduler( void ) #endif /* configCHECK_FOR_STACK_OVERFLOW > 2 */ /* Clear the software interrupt flag. */ - IFS0CLR = _IFS0_CS0IF_MASK; + IFS0CLR = _IFS0_CS0IF_MASK; /* Set software timer priority. */ - IPC0CLR = _IPC0_CS0IP_MASK; - IPC0SET = ( configKERNEL_INTERRUPT_PRIORITY << _IPC0_CS0IP_POSITION ); + IPC0CLR = _IPC0_CS0IP_MASK; + IPC0SET = ( configKERNEL_INTERRUPT_PRIORITY << _IPC0_CS0IP_POSITION ); /* Enable software interrupt. */ - IEC0CLR = _IEC0_CS0IE_MASK; - IEC0SET = 1 << _IEC0_CS0IE_POSITION; + IEC0CLR = _IEC0_CS0IE_MASK; + IEC0SET = 1 << _IEC0_CS0IE_POSITION; /* Setup the timer to generate the tick. Interrupts will have been * disabled by the time we get here. */ diff --git a/portable/MPLAB/PIC32MZ/portmacro.h b/portable/MPLAB/PIC32MZ/portmacro.h index 37139dd13..d78844077 100644 --- a/portable/MPLAB/PIC32MZ/portmacro.h +++ b/portable/MPLAB/PIC32MZ/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H @@ -113,7 +114,7 @@ uint32_t ulStatus; \ \ /* Mask interrupts at and below the kernel interrupt priority. */ \ - ulStatus = _CP0_GET_STATUS(); \ + ulStatus = _CP0_GET_STATUS(); \ ulStatus &= ~portALL_IPL_BITS; \ _CP0_SET_STATUS( ( ulStatus | ( configMAX_SYSCALL_INTERRUPT_PRIORITY << portIPL_SHIFT ) ) ); \ } @@ -124,7 +125,7 @@ uint32_t ulStatus; \ \ /* Unmask all interrupts. */ \ - ulStatus = _CP0_GET_STATUS(); \ + ulStatus = _CP0_GET_STATUS(); \ ulStatus &= ~portALL_IPL_BITS; \ _CP0_SET_STATUS( ulStatus ); \ } @@ -167,7 +168,7 @@ /*-----------------------------------------------------------*/ - #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - _clz( ( uxReadyPriorities ) ) ) + #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - _clz( ( uxReadyPriorities ) ) ) #endif /* taskRECORD_READY_PRIORITY */ @@ -180,7 +181,7 @@ uint32_t ulCause; \ \ /* Trigger software interrupt. */ \ - ulCause = _CP0_GET_CAUSE(); \ + ulCause = _CP0_GET_CAUSE(); \ ulCause |= portSW0_BIT; \ _CP0_SET_CAUSE( ulCause ); \ } diff --git a/portable/MSVC-MingW/port.c b/portable/MSVC-MingW/port.c index 6dd33229d..79cca4985 100644 --- a/portable/MSVC-MingW/port.c +++ b/portable/MSVC-MingW/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Standard includes. */ @@ -125,20 +126,20 @@ static volatile uint32_t ulCriticalNesting = 9999UL; /* Handlers for all the simulated software interrupts. The first two positions * are used for the Yield and Tick interrupts so are handled slightly differently, * all the other interrupts can be user defined. */ -static uint32_t (* ulIsrHandler[ portMAX_INTERRUPTS ])( void ) = { 0 }; +static uint32_t (* ulIsrHandler[ portMAX_INTERRUPTS ])( void ) = { 0 }; /* Pointer to the TCB of the currently executing task. */ extern void * volatile pxCurrentTCB; /* Used to ensure nothing is processed during the startup sequence. */ -static BaseType_t xPortRunning = pdFALSE; +static BaseType_t xPortRunning = pdFALSE; /*-----------------------------------------------------------*/ static DWORD WINAPI prvSimulatedPeripheralTimer( LPVOID lpParameter ) { TickType_t xMinimumWindowsBlockTime; - TIMECAPS xTimeCaps; + TIMECAPS xTimeCaps; /* Set the timer resolution to the maximum possible. */ if( timeGetDevCaps( &xTimeCaps, sizeof( xTimeCaps ) ) == MMSYSERR_NOERROR ) @@ -227,8 +228,8 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, void * pvParameters ) { ThreadState_t * pxThreadState = NULL; - int8_t * pcTopOfStack = ( int8_t * ) pxTopOfStack; - const SIZE_T xStackSize = 1024; /* Set the size to a small number which will get rounded up to the minimum possible. */ + int8_t * pcTopOfStack = ( int8_t * ) pxTopOfStack; + const SIZE_T xStackSize = 1024; /* Set the size to a small number which will get rounded up to the minimum possible. */ /* In this simulated case a stack is not initialised, but instead a thread * is created that will execute the task being created. The thread handles @@ -236,7 +237,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, * the stack that was created for the task - so the stack buffer is still * used, just not in the conventional way. It will not be used for anything * other than holding this structure. */ - pxThreadState = ( ThreadState_t * ) ( pcTopOfStack - sizeof( ThreadState_t ) ); + pxThreadState = ( ThreadState_t * ) ( pcTopOfStack - sizeof( ThreadState_t ) ); /* Create the event used to prevent the thread from executing past its yield * point if the SuspendThread() call that suspends the thread does not take @@ -247,7 +248,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, NULL ); /* No name. */ /* Create the thread itself. */ - pxThreadState->pvThread = CreateThread( NULL, xStackSize, ( LPTHREAD_START_ROUTINE ) pxCode, pvParameters, CREATE_SUSPENDED | STACK_SIZE_PARAM_IS_A_RESERVATION, NULL ); + pxThreadState->pvThread = CreateThread( NULL, xStackSize, ( LPTHREAD_START_ROUTINE ) pxCode, pvParameters, CREATE_SUSPENDED | STACK_SIZE_PARAM_IS_A_RESERVATION, NULL ); configASSERT( pxThreadState->pvThread ); /* See comment where TerminateThread() is called. */ SetThreadAffinityMask( pxThreadState->pvThread, 0x01 ); SetThreadPriorityBoost( pxThreadState->pvThread, TRUE ); @@ -259,10 +260,10 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, BaseType_t xPortStartScheduler( void ) { - void * pvHandle = NULL; - int32_t lSuccess; + void * pvHandle = NULL; + int32_t lSuccess; ThreadState_t * pxThreadState = NULL; - SYSTEM_INFO xSystemInfo; + SYSTEM_INFO xSystemInfo; /* This port runs windows threads with extremely high priority. All the * threads execute on the same core - to prevent locking up the host only start @@ -276,7 +277,7 @@ BaseType_t xPortStartScheduler( void ) } else { - lSuccess = pdPASS; + lSuccess = pdPASS; /* The highest priority class is used to [try to] prevent other Windows * activity interfering with FreeRTOS timing too much. */ @@ -292,7 +293,7 @@ BaseType_t xPortStartScheduler( void ) /* Create the events and mutexes that are used to synchronise all the * threads. */ pvInterruptEventMutex = CreateMutex( NULL, FALSE, NULL ); - pvInterruptEvent = CreateEvent( NULL, FALSE, FALSE, NULL ); + pvInterruptEvent = CreateEvent( NULL, FALSE, FALSE, NULL ); if( ( pvInterruptEventMutex == NULL ) || ( pvInterruptEvent == NULL ) ) { @@ -302,7 +303,7 @@ BaseType_t xPortStartScheduler( void ) /* Set the priority of this thread such that it is above the priority of * the threads that run tasks. This higher priority is required to ensure * simulated interrupts take priority over tasks. */ - pvHandle = GetCurrentThread(); + pvHandle = GetCurrentThread(); if( pvHandle == NULL ) { @@ -327,7 +328,7 @@ BaseType_t xPortStartScheduler( void ) * tick interrupts. The priority is set below that of the simulated * interrupt handler so the interrupt event mutex is used for the * handshake / overrun protection. */ - pvHandle = CreateThread( NULL, 0, prvSimulatedPeripheralTimer, NULL, CREATE_SUSPENDED, NULL ); + pvHandle = CreateThread( NULL, 0, prvSimulatedPeripheralTimer, NULL, CREATE_SUSPENDED, NULL ); if( pvHandle != NULL ) { @@ -339,7 +340,7 @@ BaseType_t xPortStartScheduler( void ) /* Start the highest priority task by obtaining its associated thread * state structure, in which is stored the thread handle. */ - pxThreadState = ( ThreadState_t * ) *( ( size_t * ) pxCurrentTCB ); + pxThreadState = ( ThreadState_t * ) *( ( size_t * ) pxCurrentTCB ); ulCriticalNesting = portNO_CRITICAL_NESTING; /* Start the first task. */ @@ -377,23 +378,23 @@ static uint32_t prvProcessTickInterrupt( void ) static void prvProcessSimulatedInterrupts( void ) { - uint32_t ulSwitchRequired, i; + uint32_t ulSwitchRequired, i; ThreadState_t * pxThreadState; - void * pvObjectList[ 2 ]; - CONTEXT xContext; + void * pvObjectList[ 2 ]; + CONTEXT xContext; /* Going to block on the mutex that ensured exclusive access to the simulated * interrupt objects, and the event that signals that a simulated interrupt * should be processed. */ - pvObjectList[ 0 ] = pvInterruptEventMutex; - pvObjectList[ 1 ] = pvInterruptEvent; + pvObjectList[ 0 ] = pvInterruptEventMutex; + pvObjectList[ 1 ] = pvInterruptEvent; /* Create a pending tick to ensure the first task is started as soon as * this thread pends. */ ulPendingInterrupts |= ( 1 << portINTERRUPT_TICK ); SetEvent( pvInterruptEvent ); - xPortRunning = pdTRUE; + xPortRunning = pdTRUE; for( ; ; ) { @@ -457,7 +458,7 @@ static void prvProcessSimulatedInterrupts( void ) * or yielding then the task will block on a yield event after the * yield operation in case the 'suspend' operation doesn't take * effect immediately. */ - pxThreadState = ( ThreadState_t * ) *( ( size_t * ) pvOldCurrentTCB ); + pxThreadState = ( ThreadState_t * ) *( ( size_t * ) pvOldCurrentTCB ); SuspendThread( pxThreadState->pvThread ); /* Ensure the thread is actually suspended by performing a @@ -472,7 +473,7 @@ static void prvProcessSimulatedInterrupts( void ) /* Obtain the state of the task now selected to enter the * Running state. */ - pxThreadState = ( ThreadState_t * ) ( *( size_t * ) pxCurrentTCB ); + pxThreadState = ( ThreadState_t * ) ( *( size_t * ) pxCurrentTCB ); /* pxThreadState->pvThread can be NULL if the task deleted * itself - but a deleted task should never be resumed here. */ @@ -489,7 +490,7 @@ static void prvProcessSimulatedInterrupts( void ) * valid for it to do so. Signaling the event is benign in the case that * the task was switched out asynchronously by an interrupt as the event * is reset before the task blocks on it. */ - pxThreadState = ( ThreadState_t * ) ( *( size_t * ) pxCurrentTCB ); + pxThreadState = ( ThreadState_t * ) ( *( size_t * ) pxCurrentTCB ); SetEvent( pxThreadState->pvYieldEvent ); ReleaseMutex( pvInterruptEventMutex ); } @@ -499,7 +500,7 @@ static void prvProcessSimulatedInterrupts( void ) void vPortDeleteThread( void * pvTaskToDelete ) { ThreadState_t * pxThreadState; - uint32_t ulErrorCode; + uint32_t ulErrorCode; /* Remove compiler warnings if configASSERT() is not defined. */ ( void ) ulErrorCode; @@ -534,15 +535,15 @@ void vPortCloseRunningThread( void * pvTaskToDelete, volatile BaseType_t * pxPendYield ) { ThreadState_t * pxThreadState; - void * pvThread; - uint32_t ulErrorCode; + void * pvThread; + uint32_t ulErrorCode; /* Remove compiler warnings if configASSERT() is not defined. */ ( void ) ulErrorCode; /* Find the handle of the thread being deleted. */ - pxThreadState = ( ThreadState_t * ) ( *( size_t * ) pvTaskToDelete ); - pvThread = pxThreadState->pvThread; + pxThreadState = ( ThreadState_t * ) ( *( size_t * ) pvTaskToDelete ); + pvThread = pxThreadState->pvThread; /* Raise the Windows priority of the thread to ensure the FreeRTOS scheduler * does not run and swap it out before it is closed. If that were to happen @@ -552,14 +553,14 @@ void vPortCloseRunningThread( void * pvTaskToDelete, /* This function will not return, therefore a yield is set as pending to * ensure a context switch occurs away from this thread on the next tick. */ - *pxPendYield = pdTRUE; + *pxPendYield = pdTRUE; /* Mark the thread associated with this task as invalid so * vPortDeleteThread() does not try to terminate it. */ pxThreadState->pvThread = NULL; /* Close the thread. */ - ulErrorCode = CloseHandle( pvThread ); + ulErrorCode = CloseHandle( pvThread ); configASSERT( ulErrorCode ); /* This is called from a critical section, which must be exited before the diff --git a/portable/MSVC-MingW/portmacro.h b/portable/MSVC-MingW/portmacro.h index c61fc548b..c2a528e58 100644 --- a/portable/MSVC-MingW/portmacro.h +++ b/portable/MSVC-MingW/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/MemMang/heap_1.c b/portable/MemMang/heap_1.c index 4206b8142..54bb66532 100644 --- a/portable/MemMang/heap_1.c +++ b/portable/MemMang/heap_1.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ @@ -62,13 +63,13 @@ #endif /* configAPPLICATION_ALLOCATED_HEAP */ /* Index into the ucHeap array. */ -static size_t xNextFreeByte = ( size_t ) 0; +static size_t xNextFreeByte = ( size_t ) 0; /*-----------------------------------------------------------*/ void * pvPortMalloc( size_t xWantedSize ) { - void * pvReturn = NULL; + void * pvReturn = NULL; static uint8_t * pucAlignedHeap = NULL; /* Ensure that blocks are always aligned to the required number of bytes. */ @@ -96,7 +97,7 @@ void * pvPortMalloc( size_t xWantedSize ) { /* Return the next free byte then increment the index past this * block. */ - pvReturn = pucAlignedHeap + xNextFreeByte; + pvReturn = pucAlignedHeap + xNextFreeByte; xNextFreeByte += xWantedSize; } diff --git a/portable/MemMang/heap_2.c b/portable/MemMang/heap_2.c index fd05a51a3..dd12a0fd8 100644 --- a/portable/MemMang/heap_2.c +++ b/portable/MemMang/heap_2.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* @@ -81,11 +82,11 @@ static const uint16_t heapSTRUCT_SIZE = ( ( sizeof( BlockLink_t ) + ( portBYTE_A #define heapMINIMUM_BLOCK_SIZE ( ( size_t ) ( heapSTRUCT_SIZE * 2 ) ) /* Create a couple of list links to mark the start and end of the list. */ -static BlockLink_t xStart, xEnd; +static BlockLink_t xStart, xEnd; /* Keeps track of the number of free bytes remaining, but says nothing about * fragmentation. */ -static size_t xFreeBytesRemaining = configADJUSTED_HEAP_SIZE; +static size_t xFreeBytesRemaining = configADJUSTED_HEAP_SIZE; /* STATIC FUNCTIONS ARE DEFINED AS MACROS TO MINIMIZE THE FUNCTION CALL DEPTH. */ @@ -99,7 +100,7 @@ static size_t xFreeBytesRemaining = configADJUSTED_HEAP_SIZE; BlockLink_t * pxIterator; \ size_t xBlockSize; \ \ - xBlockSize = pxBlockToInsert->xBlockSize; \ + xBlockSize = pxBlockToInsert->xBlockSize; \ \ /* Iterate through the list until a block is found that has a larger size */ \ /* than the block we are inserting. */ \ @@ -111,15 +112,15 @@ static size_t xFreeBytesRemaining = configADJUSTED_HEAP_SIZE; /* Update the list to include the block being inserted in the correct */ \ /* position. */ \ pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock; \ - pxIterator->pxNextFreeBlock = pxBlockToInsert; \ + pxIterator->pxNextFreeBlock = pxBlockToInsert; \ } /*-----------------------------------------------------------*/ void * pvPortMalloc( size_t xWantedSize ) { - BlockLink_t * pxBlock, * pxPreviousBlock, * pxNewBlockLink; + BlockLink_t * pxBlock, * pxPreviousBlock, * pxNewBlockLink; static BaseType_t xHeapHasBeenInitialised = pdFALSE; - void * pvReturn = NULL; + void * pvReturn = NULL; vTaskSuspendAll(); { @@ -150,12 +151,12 @@ void * pvPortMalloc( size_t xWantedSize ) /* Blocks are stored in byte order - traverse the list from the start * (smallest) block until one of adequate size is found. */ pxPreviousBlock = &xStart; - pxBlock = xStart.pxNextFreeBlock; + pxBlock = xStart.pxNextFreeBlock; while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) ) { pxPreviousBlock = pxBlock; - pxBlock = pxBlock->pxNextFreeBlock; + pxBlock = pxBlock->pxNextFreeBlock; } /* If we found the end marker then a block of adequate size was not found. */ @@ -163,7 +164,7 @@ void * pvPortMalloc( size_t xWantedSize ) { /* Return the memory space - jumping over the BlockLink_t structure * at its start. */ - pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + heapSTRUCT_SIZE ); + pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + heapSTRUCT_SIZE ); /* This block is being returned for use so must be taken out of the * list of free blocks. */ @@ -175,18 +176,18 @@ void * pvPortMalloc( size_t xWantedSize ) /* This block is to be split into two. Create a new block * following the number of bytes requested. The void cast is * used to prevent byte alignment warnings from the compiler. */ - pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize ); + pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize ); /* Calculate the sizes of two blocks split from the single * block. */ pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize; - pxBlock->xBlockSize = xWantedSize; + pxBlock->xBlockSize = xWantedSize; /* Insert the new block into the list of free blocks. */ prvInsertBlockIntoFreeList( ( pxNewBlockLink ) ); } - xFreeBytesRemaining -= pxBlock->xBlockSize; + xFreeBytesRemaining -= pxBlock->xBlockSize; } } @@ -210,14 +211,14 @@ void * pvPortMalloc( size_t xWantedSize ) void vPortFree( void * pv ) { - uint8_t * puc = ( uint8_t * ) pv; + uint8_t * puc = ( uint8_t * ) pv; BlockLink_t * pxLink; if( pv != NULL ) { /* The memory being freed will have an BlockLink_t structure immediately * before it. */ - puc -= heapSTRUCT_SIZE; + puc -= heapSTRUCT_SIZE; /* This unexpected casting is to keep some compilers from issuing * byte alignment warnings. */ @@ -250,24 +251,24 @@ void vPortInitialiseBlocks( void ) static void prvHeapInit( void ) { BlockLink_t * pxFirstFreeBlock; - uint8_t * pucAlignedHeap; + uint8_t * pucAlignedHeap; /* Ensure the heap starts on a correctly aligned boundary. */ - pucAlignedHeap = ( uint8_t * ) ( ( ( portPOINTER_SIZE_TYPE ) & ucHeap[ portBYTE_ALIGNMENT ] ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) ); + pucAlignedHeap = ( uint8_t * ) ( ( ( portPOINTER_SIZE_TYPE ) & ucHeap[ portBYTE_ALIGNMENT ] ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) ); /* xStart is used to hold a pointer to the first item in the list of free * blocks. The void cast is used to prevent compiler warnings. */ - xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap; - xStart.xBlockSize = ( size_t ) 0; + xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap; + xStart.xBlockSize = ( size_t ) 0; /* xEnd is used to mark the end of the list of free blocks. */ - xEnd.xBlockSize = configADJUSTED_HEAP_SIZE; - xEnd.pxNextFreeBlock = NULL; + xEnd.xBlockSize = configADJUSTED_HEAP_SIZE; + xEnd.pxNextFreeBlock = NULL; /* To start with there is a single free block that is sized to take up the * entire heap space. */ - pxFirstFreeBlock = ( void * ) pucAlignedHeap; - pxFirstFreeBlock->xBlockSize = configADJUSTED_HEAP_SIZE; + pxFirstFreeBlock = ( void * ) pucAlignedHeap; + pxFirstFreeBlock->xBlockSize = configADJUSTED_HEAP_SIZE; pxFirstFreeBlock->pxNextFreeBlock = &xEnd; } /*-----------------------------------------------------------*/ diff --git a/portable/MemMang/heap_3.c b/portable/MemMang/heap_3.c index 12c3f6d86..57c6954d7 100644 --- a/portable/MemMang/heap_3.c +++ b/portable/MemMang/heap_3.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ diff --git a/portable/MemMang/heap_4.c b/portable/MemMang/heap_4.c index f4b68b922..157c217f7 100644 --- a/portable/MemMang/heap_4.c +++ b/portable/MemMang/heap_4.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* @@ -95,27 +96,27 @@ static void prvHeapInit( void ); static const size_t xHeapStructSize = ( sizeof( BlockLink_t ) + ( ( size_t ) ( portBYTE_ALIGNMENT - 1 ) ) ) & ~( ( size_t ) portBYTE_ALIGNMENT_MASK ); /* Create a couple of list links to mark the start and end of the list. */ -static BlockLink_t xStart, * pxEnd = NULL; +static BlockLink_t xStart, * pxEnd = NULL; /* Keeps track of the number of calls to allocate and free memory as well as the * number of free bytes remaining, but says nothing about fragmentation. */ -static size_t xFreeBytesRemaining = 0U; -static size_t xMinimumEverFreeBytesRemaining = 0U; -static size_t xNumberOfSuccessfulAllocations = 0; -static size_t xNumberOfSuccessfulFrees = 0; +static size_t xFreeBytesRemaining = 0U; +static size_t xMinimumEverFreeBytesRemaining = 0U; +static size_t xNumberOfSuccessfulAllocations = 0; +static size_t xNumberOfSuccessfulFrees = 0; /* Gets set to the top bit of an size_t type. When this bit in the xBlockSize * member of an BlockLink_t structure is set then the block belongs to the * application. When the bit is free the block is still part of the free heap * space. */ -static size_t xBlockAllocatedBit = 0; +static size_t xBlockAllocatedBit = 0; /*-----------------------------------------------------------*/ void * pvPortMalloc( size_t xWantedSize ) { BlockLink_t * pxBlock, * pxPreviousBlock, * pxNewBlockLink; - void * pvReturn = NULL; + void * pvReturn = NULL; vTaskSuspendAll(); { @@ -165,12 +166,12 @@ void * pvPortMalloc( size_t xWantedSize ) /* Traverse the list from the start (lowest address) block until * one of adequate size is found. */ pxPreviousBlock = &xStart; - pxBlock = xStart.pxNextFreeBlock; + pxBlock = xStart.pxNextFreeBlock; while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) ) { pxPreviousBlock = pxBlock; - pxBlock = pxBlock->pxNextFreeBlock; + pxBlock = pxBlock->pxNextFreeBlock; } /* If the end marker was reached then a block of adequate size @@ -179,7 +180,7 @@ void * pvPortMalloc( size_t xWantedSize ) { /* Return the memory space pointed to - jumping over the * BlockLink_t structure at its start. */ - pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize ); + pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize ); /* This block is being returned for use so must be taken out * of the list of free blocks. */ @@ -193,13 +194,13 @@ void * pvPortMalloc( size_t xWantedSize ) * block following the number of bytes requested. The void * cast is used to prevent byte alignment warnings from the * compiler. */ - pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize ); + pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize ); configASSERT( ( ( ( size_t ) pxNewBlockLink ) & portBYTE_ALIGNMENT_MASK ) == 0 ); /* Calculate the sizes of two blocks split from the * single block. */ pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize; - pxBlock->xBlockSize = xWantedSize; + pxBlock->xBlockSize = xWantedSize; /* Insert the new block into the list of free blocks. */ prvInsertBlockIntoFreeList( pxNewBlockLink ); @@ -209,7 +210,7 @@ void * pvPortMalloc( size_t xWantedSize ) mtCOVERAGE_TEST_MARKER(); } - xFreeBytesRemaining -= pxBlock->xBlockSize; + xFreeBytesRemaining -= pxBlock->xBlockSize; if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining ) { @@ -222,8 +223,8 @@ void * pvPortMalloc( size_t xWantedSize ) /* The block is being returned - it is allocated and owned * by the application and has no "next" block. */ - pxBlock->xBlockSize |= xBlockAllocatedBit; - pxBlock->pxNextFreeBlock = NULL; + pxBlock->xBlockSize |= xBlockAllocatedBit; + pxBlock->pxNextFreeBlock = NULL; xNumberOfSuccessfulAllocations++; } else @@ -266,14 +267,14 @@ void * pvPortMalloc( size_t xWantedSize ) void vPortFree( void * pv ) { - uint8_t * puc = ( uint8_t * ) pv; + uint8_t * puc = ( uint8_t * ) pv; BlockLink_t * pxLink; if( pv != NULL ) { /* The memory being freed will have an BlockLink_t structure immediately * before it. */ - puc -= xHeapStructSize; + puc -= xHeapStructSize; /* This casting is to keep the compiler from issuing warnings. */ pxLink = ( void * ) puc; @@ -334,55 +335,55 @@ void vPortInitialiseBlocks( void ) static void prvHeapInit( void ) { BlockLink_t * pxFirstFreeBlock; - uint8_t * pucAlignedHeap; - size_t uxAddress; - size_t xTotalHeapSize = configTOTAL_HEAP_SIZE; + uint8_t * pucAlignedHeap; + size_t uxAddress; + size_t xTotalHeapSize = configTOTAL_HEAP_SIZE; /* Ensure the heap starts on a correctly aligned boundary. */ - uxAddress = ( size_t ) ucHeap; + uxAddress = ( size_t ) ucHeap; if( ( uxAddress & portBYTE_ALIGNMENT_MASK ) != 0 ) { - uxAddress += ( portBYTE_ALIGNMENT - 1 ); - uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK ); + uxAddress += ( portBYTE_ALIGNMENT - 1 ); + uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK ); xTotalHeapSize -= uxAddress - ( size_t ) ucHeap; } - pucAlignedHeap = ( uint8_t * ) uxAddress; + pucAlignedHeap = ( uint8_t * ) uxAddress; /* xStart is used to hold a pointer to the first item in the list of free * blocks. The void cast is used to prevent compiler warnings. */ - xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap; - xStart.xBlockSize = ( size_t ) 0; + xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap; + xStart.xBlockSize = ( size_t ) 0; /* pxEnd is used to mark the end of the list of free blocks and is inserted * at the end of the heap space. */ - uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize; - uxAddress -= xHeapStructSize; - uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK ); - pxEnd = ( void * ) uxAddress; - pxEnd->xBlockSize = 0; - pxEnd->pxNextFreeBlock = NULL; + uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize; + uxAddress -= xHeapStructSize; + uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK ); + pxEnd = ( void * ) uxAddress; + pxEnd->xBlockSize = 0; + pxEnd->pxNextFreeBlock = NULL; /* To start with there is a single free block that is sized to take up the * entire heap space, minus the space taken by pxEnd. */ - pxFirstFreeBlock = ( void * ) pucAlignedHeap; - pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock; + pxFirstFreeBlock = ( void * ) pucAlignedHeap; + pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock; pxFirstFreeBlock->pxNextFreeBlock = pxEnd; /* Only one block exists - and it covers the entire usable heap space. */ - xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize; - xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize; + xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize; + xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize; /* Work out the position of the top bit in a size_t variable. */ - xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * heapBITS_PER_BYTE ) - 1 ); + xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * heapBITS_PER_BYTE ) - 1 ); } /*-----------------------------------------------------------*/ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert ) { BlockLink_t * pxIterator; - uint8_t * puc; + uint8_t * puc; /* Iterate through the list until a block is found that has a higher address * than the block being inserted. */ @@ -398,7 +399,7 @@ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert ) if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert ) { pxIterator->xBlockSize += pxBlockToInsert->xBlockSize; - pxBlockToInsert = pxIterator; + pxBlockToInsert = pxIterator; } else { @@ -414,7 +415,7 @@ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert ) if( pxIterator->pxNextFreeBlock != pxEnd ) { /* Form one big block from the two blocks. */ - pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize; + pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize; pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock; } else @@ -445,7 +446,7 @@ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert ) void vPortGetHeapStats( HeapStats_t * pxHeapStats ) { BlockLink_t * pxBlock; - size_t xBlocks = 0, xMaxSize = 0, xMinSize = portMAX_DELAY; /* portMAX_DELAY used as a portable way of getting the maximum value. */ + size_t xBlocks = 0, xMaxSize = 0, xMinSize = portMAX_DELAY; /* portMAX_DELAY used as a portable way of getting the maximum value. */ vTaskSuspendAll(); { @@ -479,15 +480,15 @@ void vPortGetHeapStats( HeapStats_t * pxHeapStats ) } ( void ) xTaskResumeAll(); - pxHeapStats->xSizeOfLargestFreeBlockInBytes = xMaxSize; + pxHeapStats->xSizeOfLargestFreeBlockInBytes = xMaxSize; pxHeapStats->xSizeOfSmallestFreeBlockInBytes = xMinSize; - pxHeapStats->xNumberOfFreeBlocks = xBlocks; + pxHeapStats->xNumberOfFreeBlocks = xBlocks; taskENTER_CRITICAL(); { - pxHeapStats->xAvailableHeapSpaceInBytes = xFreeBytesRemaining; + pxHeapStats->xAvailableHeapSpaceInBytes = xFreeBytesRemaining; pxHeapStats->xNumberOfSuccessfulAllocations = xNumberOfSuccessfulAllocations; - pxHeapStats->xNumberOfSuccessfulFrees = xNumberOfSuccessfulFrees; + pxHeapStats->xNumberOfSuccessfulFrees = xNumberOfSuccessfulFrees; pxHeapStats->xMinimumEverFreeBytesRemaining = xMinimumEverFreeBytesRemaining; } taskEXIT_CRITICAL(); diff --git a/portable/MemMang/heap_5.c b/portable/MemMang/heap_5.c index 76771ed0d..2e58c7902 100644 --- a/portable/MemMang/heap_5.c +++ b/portable/MemMang/heap_5.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* @@ -113,27 +114,27 @@ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert ); static const size_t xHeapStructSize = ( sizeof( BlockLink_t ) + ( ( size_t ) ( portBYTE_ALIGNMENT - 1 ) ) ) & ~( ( size_t ) portBYTE_ALIGNMENT_MASK ); /* Create a couple of list links to mark the start and end of the list. */ -static BlockLink_t xStart, * pxEnd = NULL; +static BlockLink_t xStart, * pxEnd = NULL; /* Keeps track of the number of calls to allocate and free memory as well as the * number of free bytes remaining, but says nothing about fragmentation. */ -static size_t xFreeBytesRemaining = 0U; -static size_t xMinimumEverFreeBytesRemaining = 0U; -static size_t xNumberOfSuccessfulAllocations = 0; -static size_t xNumberOfSuccessfulFrees = 0; +static size_t xFreeBytesRemaining = 0U; +static size_t xMinimumEverFreeBytesRemaining = 0U; +static size_t xNumberOfSuccessfulAllocations = 0; +static size_t xNumberOfSuccessfulFrees = 0; /* Gets set to the top bit of an size_t type. When this bit in the xBlockSize * member of an BlockLink_t structure is set then the block belongs to the * application. When the bit is free the block is still part of the free heap * space. */ -static size_t xBlockAllocatedBit = 0; +static size_t xBlockAllocatedBit = 0; /*-----------------------------------------------------------*/ void * pvPortMalloc( size_t xWantedSize ) { BlockLink_t * pxBlock, * pxPreviousBlock, * pxNewBlockLink; - void * pvReturn = NULL; + void * pvReturn = NULL; /* The heap must be initialised before the first call to * prvPortMalloc(). */ @@ -175,12 +176,12 @@ void * pvPortMalloc( size_t xWantedSize ) /* Traverse the list from the start (lowest address) block until * one of adequate size is found. */ pxPreviousBlock = &xStart; - pxBlock = xStart.pxNextFreeBlock; + pxBlock = xStart.pxNextFreeBlock; while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) ) { pxPreviousBlock = pxBlock; - pxBlock = pxBlock->pxNextFreeBlock; + pxBlock = pxBlock->pxNextFreeBlock; } /* If the end marker was reached then a block of adequate size @@ -189,7 +190,7 @@ void * pvPortMalloc( size_t xWantedSize ) { /* Return the memory space pointed to - jumping over the * BlockLink_t structure at its start. */ - pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize ); + pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize ); /* This block is being returned for use so must be taken out * of the list of free blocks. */ @@ -203,12 +204,12 @@ void * pvPortMalloc( size_t xWantedSize ) * block following the number of bytes requested. The void * cast is used to prevent byte alignment warnings from the * compiler. */ - pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize ); + pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize ); /* Calculate the sizes of two blocks split from the * single block. */ pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize; - pxBlock->xBlockSize = xWantedSize; + pxBlock->xBlockSize = xWantedSize; /* Insert the new block into the list of free blocks. */ prvInsertBlockIntoFreeList( ( pxNewBlockLink ) ); @@ -218,7 +219,7 @@ void * pvPortMalloc( size_t xWantedSize ) mtCOVERAGE_TEST_MARKER(); } - xFreeBytesRemaining -= pxBlock->xBlockSize; + xFreeBytesRemaining -= pxBlock->xBlockSize; if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining ) { @@ -231,8 +232,8 @@ void * pvPortMalloc( size_t xWantedSize ) /* The block is being returned - it is allocated and owned * by the application and has no "next" block. */ - pxBlock->xBlockSize |= xBlockAllocatedBit; - pxBlock->pxNextFreeBlock = NULL; + pxBlock->xBlockSize |= xBlockAllocatedBit; + pxBlock->pxNextFreeBlock = NULL; xNumberOfSuccessfulAllocations++; } else @@ -274,14 +275,14 @@ void * pvPortMalloc( size_t xWantedSize ) void vPortFree( void * pv ) { - uint8_t * puc = ( uint8_t * ) pv; + uint8_t * puc = ( uint8_t * ) pv; BlockLink_t * pxLink; if( pv != NULL ) { /* The memory being freed will have an BlockLink_t structure immediately * before it. */ - puc -= xHeapStructSize; + puc -= xHeapStructSize; /* This casting is to keep the compiler from issuing warnings. */ pxLink = ( void * ) puc; @@ -336,7 +337,7 @@ size_t xPortGetMinimumEverFreeHeapSize( void ) static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert ) { BlockLink_t * pxIterator; - uint8_t * puc; + uint8_t * puc; /* Iterate through the list until a block is found that has a higher address * than the block being inserted. */ @@ -352,7 +353,7 @@ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert ) if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert ) { pxIterator->xBlockSize += pxBlockToInsert->xBlockSize; - pxBlockToInsert = pxIterator; + pxBlockToInsert = pxIterator; } else { @@ -368,7 +369,7 @@ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert ) if( pxIterator->pxNextFreeBlock != pxEnd ) { /* Form one big block from the two blocks. */ - pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize; + pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize; pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock; } else @@ -398,35 +399,35 @@ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert ) void vPortDefineHeapRegions( const HeapRegion_t * const pxHeapRegions ) { - BlockLink_t * pxFirstFreeBlockInRegion = NULL, * pxPreviousFreeBlock; - size_t xAlignedHeap; - size_t xTotalRegionSize, xTotalHeapSize = 0; - BaseType_t xDefinedRegions = 0; - size_t xAddress; + BlockLink_t * pxFirstFreeBlockInRegion = NULL, * pxPreviousFreeBlock; + size_t xAlignedHeap; + size_t xTotalRegionSize, xTotalHeapSize = 0; + BaseType_t xDefinedRegions = 0; + size_t xAddress; const HeapRegion_t * pxHeapRegion; /* Can only call once! */ configASSERT( pxEnd == NULL ); - pxHeapRegion = &( pxHeapRegions[ xDefinedRegions ] ); + pxHeapRegion = &( pxHeapRegions[ xDefinedRegions ] ); while( pxHeapRegion->xSizeInBytes > 0 ) { - xTotalRegionSize = pxHeapRegion->xSizeInBytes; + xTotalRegionSize = pxHeapRegion->xSizeInBytes; /* Ensure the heap region starts on a correctly aligned boundary. */ - xAddress = ( size_t ) pxHeapRegion->pucStartAddress; + xAddress = ( size_t ) pxHeapRegion->pucStartAddress; if( ( xAddress & portBYTE_ALIGNMENT_MASK ) != 0 ) { - xAddress += ( portBYTE_ALIGNMENT - 1 ); - xAddress &= ~portBYTE_ALIGNMENT_MASK; + xAddress += ( portBYTE_ALIGNMENT - 1 ); + xAddress &= ~portBYTE_ALIGNMENT_MASK; /* Adjust the size for the bytes lost to alignment. */ xTotalRegionSize -= xAddress - ( size_t ) pxHeapRegion->pucStartAddress; } - xAlignedHeap = xAddress; + xAlignedHeap = xAddress; /* Set xStart if it has not already been set. */ if( xDefinedRegions == 0 ) @@ -434,7 +435,7 @@ void vPortDefineHeapRegions( const HeapRegion_t * const pxHeapRegions ) /* xStart is used to hold a pointer to the first item in the list of * free blocks. The void cast is used to prevent compiler warnings. */ xStart.pxNextFreeBlock = ( BlockLink_t * ) xAlignedHeap; - xStart.xBlockSize = ( size_t ) 0; + xStart.xBlockSize = ( size_t ) 0; } else { @@ -448,22 +449,22 @@ void vPortDefineHeapRegions( const HeapRegion_t * const pxHeapRegions ) /* Remember the location of the end marker in the previous region, if * any. */ - pxPreviousFreeBlock = pxEnd; + pxPreviousFreeBlock = pxEnd; /* pxEnd is used to mark the end of the list of free blocks and is * inserted at the end of the region space. */ - xAddress = xAlignedHeap + xTotalRegionSize; - xAddress -= xHeapStructSize; - xAddress &= ~portBYTE_ALIGNMENT_MASK; - pxEnd = ( BlockLink_t * ) xAddress; - pxEnd->xBlockSize = 0; - pxEnd->pxNextFreeBlock = NULL; + xAddress = xAlignedHeap + xTotalRegionSize; + xAddress -= xHeapStructSize; + xAddress &= ~portBYTE_ALIGNMENT_MASK; + pxEnd = ( BlockLink_t * ) xAddress; + pxEnd->xBlockSize = 0; + pxEnd->pxNextFreeBlock = NULL; /* To start with there is a single free block in this region that is * sized to take up the entire heap region minus the space taken by the * free block structure. */ - pxFirstFreeBlockInRegion = ( BlockLink_t * ) xAlignedHeap; - pxFirstFreeBlockInRegion->xBlockSize = xAddress - ( size_t ) pxFirstFreeBlockInRegion; + pxFirstFreeBlockInRegion = ( BlockLink_t * ) xAlignedHeap; + pxFirstFreeBlockInRegion->xBlockSize = xAddress - ( size_t ) pxFirstFreeBlockInRegion; pxFirstFreeBlockInRegion->pxNextFreeBlock = pxEnd; /* If this is not the first region that makes up the entire heap space @@ -473,28 +474,28 @@ void vPortDefineHeapRegions( const HeapRegion_t * const pxHeapRegions ) pxPreviousFreeBlock->pxNextFreeBlock = pxFirstFreeBlockInRegion; } - xTotalHeapSize += pxFirstFreeBlockInRegion->xBlockSize; + xTotalHeapSize += pxFirstFreeBlockInRegion->xBlockSize; /* Move onto the next HeapRegion_t structure. */ xDefinedRegions++; - pxHeapRegion = &( pxHeapRegions[ xDefinedRegions ] ); + pxHeapRegion = &( pxHeapRegions[ xDefinedRegions ] ); } xMinimumEverFreeBytesRemaining = xTotalHeapSize; - xFreeBytesRemaining = xTotalHeapSize; + xFreeBytesRemaining = xTotalHeapSize; /* Check something was actually defined before it is accessed. */ configASSERT( xTotalHeapSize ); /* Work out the position of the top bit in a size_t variable. */ - xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * heapBITS_PER_BYTE ) - 1 ); + xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * heapBITS_PER_BYTE ) - 1 ); } /*-----------------------------------------------------------*/ void vPortGetHeapStats( HeapStats_t * pxHeapStats ) { BlockLink_t * pxBlock; - size_t xBlocks = 0, xMaxSize = 0, xMinSize = portMAX_DELAY; /* portMAX_DELAY used as a portable way of getting the maximum value. */ + size_t xBlocks = 0, xMaxSize = 0, xMinSize = portMAX_DELAY; /* portMAX_DELAY used as a portable way of getting the maximum value. */ vTaskSuspendAll(); { @@ -534,15 +535,15 @@ void vPortGetHeapStats( HeapStats_t * pxHeapStats ) } ( void ) xTaskResumeAll(); - pxHeapStats->xSizeOfLargestFreeBlockInBytes = xMaxSize; + pxHeapStats->xSizeOfLargestFreeBlockInBytes = xMaxSize; pxHeapStats->xSizeOfSmallestFreeBlockInBytes = xMinSize; - pxHeapStats->xNumberOfFreeBlocks = xBlocks; + pxHeapStats->xNumberOfFreeBlocks = xBlocks; taskENTER_CRITICAL(); { - pxHeapStats->xAvailableHeapSpaceInBytes = xFreeBytesRemaining; + pxHeapStats->xAvailableHeapSpaceInBytes = xFreeBytesRemaining; pxHeapStats->xNumberOfSuccessfulAllocations = xNumberOfSuccessfulAllocations; - pxHeapStats->xNumberOfSuccessfulFrees = xNumberOfSuccessfulFrees; + pxHeapStats->xNumberOfSuccessfulFrees = xNumberOfSuccessfulFrees; pxHeapStats->xMinimumEverFreeBytesRemaining = xMinimumEverFreeBytesRemaining; } taskEXIT_CRITICAL(); diff --git a/portable/MikroC/ARM_CM4F/port.c b/portable/MikroC/ARM_CM4F/port.c index 2766807ce..b6dfd0342 100644 --- a/portable/MikroC/ARM_CM4F/port.c +++ b/portable/MikroC/ARM_CM4F/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -114,11 +115,11 @@ #define control 20 /* From port.c. */ -extern void * pxCurrentTCB; +extern void * pxCurrentTCB; /* Each task maintains its own interrupt status in the critical nesting * variable. */ -static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; +static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; /* * Setup the timer to generate the tick interrupts. The implementation in this @@ -155,7 +156,7 @@ static void prvTaskExitError( void ); * The number of SysTick increments that make up one tick period. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t ulTimerCountsForOneTick = 0; + static uint32_t ulTimerCountsForOneTick = 0; #endif /* configUSE_TICKLESS_IDLE */ /* @@ -171,7 +172,7 @@ static void prvTaskExitError( void ); * power functionality only. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t ulStoppedTimerCompensation = 0; + static uint32_t ulStoppedTimerCompensation = 0; #endif /* configUSE_TICKLESS_IDLE */ /* @@ -180,8 +181,8 @@ static void prvTaskExitError( void ); * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY. */ #if ( configASSERT_DEFINED == 1 ) - static uint8_t ucMaxSysCallPriority = 0; - static uint32_t ulMaxPRIGROUPValue = 0; + static uint8_t ucMaxSysCallPriority = 0; + static uint32_t ulMaxPRIGROUPValue = 0; #endif /* configASSERT_DEFINED */ /*-----------------------------------------------------------*/ @@ -293,9 +294,9 @@ BaseType_t xPortStartScheduler( void ) #if ( configASSERT_DEFINED == 1 ) { - volatile uint32_t ulOriginalPriority; + volatile uint32_t ulOriginalPriority; volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER ); - volatile uint8_t ucMaxPriorityValue; + volatile uint8_t ucMaxPriorityValue; /* Determine the maximum priority from which ISR safe FreeRTOS API * functions can be called. ISR safe functions are those that end in @@ -303,25 +304,25 @@ BaseType_t xPortStartScheduler( void ) * ensure interrupt entry is as fast and simple as possible. * * Save the interrupt priority value that is about to be clobbered. */ - ulOriginalPriority = *pucFirstUserPriorityRegister; + ulOriginalPriority = *pucFirstUserPriorityRegister; /* Determine the number of priority bits available. First write to all * possible bits. */ *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE; /* Read the value back to see how many bits stuck. */ - ucMaxPriorityValue = *pucFirstUserPriorityRegister; + ucMaxPriorityValue = *pucFirstUserPriorityRegister; /* The kernel interrupt priority should be set to the lowest * priority. */ configASSERT( ucMaxPriorityValue == ( configKERNEL_INTERRUPT_PRIORITY & ucMaxPriorityValue ) ); /* Use the same mask on the maximum system call priority. */ - ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; + ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; /* Calculate the maximum acceptable priority group value for the number * of bits read back. */ - ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS; + ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS; while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE ) { @@ -349,8 +350,8 @@ BaseType_t xPortStartScheduler( void ) /* Shift the priority group value back to its position within the AIRCR * register. */ - ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; - ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; + ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; + ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; /* Restore the clobbered interrupt priority register to its original * value. */ @@ -367,13 +368,13 @@ BaseType_t xPortStartScheduler( void ) vPortSetupTimerInterrupt(); /* Initialise the critical nesting count ready for the first task. */ - uxCriticalNesting = 0; + uxCriticalNesting = 0; /* Ensure the VFP is enabled - it should be anyway. */ vPortEnableVFP(); /* Lazy save always. */ - *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS; + *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS; /* Start the first task. */ prvPortStartFirstTask(); @@ -436,7 +437,7 @@ void xPortPendSVHandler( void ) iv IVT_INT_PendSV ics ICS_OFF * from the stack pointer by the function prologue. */ add sp, sp, # 4 #endif - mrs r0, psp + mrs r0, psp isb ldr r3, = _pxCurrentTCB /* Get the location of the current TCB. */ @@ -502,7 +503,7 @@ void xPortSysTickHandler( void ) iv IVT_INT_SysTick ics ICS_AUTO void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ) { - uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; + uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; TickType_t xModifiableIdleTime; /* Make sure the SysTick reload value does not overflow the counter. */ @@ -520,7 +521,7 @@ void xPortSysTickHandler( void ) iv IVT_INT_SysTick ics ICS_AUTO /* Calculate the reload value required to wait xExpectedIdleTime * tick periods. -1 is used because this code will execute part way * through one of the tick periods. */ - ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); + ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); if( ulReloadValue > ulStoppedTimerCompensation ) { @@ -545,14 +546,14 @@ void xPortSysTickHandler( void ) iv IVT_INT_SysTick ics ICS_AUTO { /* Restart from whatever is left in the count register to complete * this tick period. */ - portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; + portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; /* Restart SysTick. */ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Reset the reload register to the value required for normal tick * periods. */ - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Re-enable interrupts - see comments above the cpsid instruction() * above. */ @@ -563,21 +564,21 @@ void xPortSysTickHandler( void ) iv IVT_INT_SysTick ics ICS_AUTO else { /* Set the new reload value. */ - portNVIC_SYSTICK_LOAD_REG = ulReloadValue; + portNVIC_SYSTICK_LOAD_REG = ulReloadValue; /* Clear the SysTick count flag and set the count value back to * zero. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Restart SysTick. */ - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can * set its parameter to 0 to indicate that its implementation contains * its own wait for interrupt or wait for event instruction, and so wfi * should not be executed again. However, the original expected idle * time variable must remain unmodified, so a copy is taken. */ - xModifiableIdleTime = xExpectedIdleTime; + xModifiableIdleTime = xExpectedIdleTime; configPRE_SLEEP_PROCESSING( xModifiableIdleTime ); if( xModifiableIdleTime > 0 ) @@ -629,7 +630,7 @@ void xPortSysTickHandler( void ) iv IVT_INT_SysTick ics ICS_AUTO * be, but using the tickless mode will inevitably result in some tiny * drift of the time maintained by the kernel with respect to calendar * time*/ - portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); /* Determine if the SysTick clock has already counted to zero and * been set back to the current reload value (the reload back being @@ -644,7 +645,7 @@ void xPortSysTickHandler( void ) iv IVT_INT_SysTick ics ICS_AUTO * reloaded with ulReloadValue. Reset the * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick * period. */ - ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); + ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); /* Don't allow a tiny value, or values that have somehow * underflowed because the post sleep hook did something @@ -659,7 +660,7 @@ void xPortSysTickHandler( void ) iv IVT_INT_SysTick ics ICS_AUTO /* As the pending tick will be processed as soon as this * function exits, the tick value maintained by the tick is stepped * forward by one less than the time spent waiting. */ - ulCompleteTickPeriods = xExpectedIdleTime - 1UL; + ulCompleteTickPeriods = xExpectedIdleTime - 1UL; } else { @@ -671,20 +672,20 @@ void xPortSysTickHandler( void ) iv IVT_INT_SysTick ics ICS_AUTO /* How many complete tick periods passed while the processor * was waiting? */ - ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; + ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; /* The reload value is set to whatever fraction of a single tick * period remains. */ - portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; + portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; } /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard * value. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; vTaskStepTick( ulCompleteTickPeriods ); - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Exit with interrupts enabled. */ __asm { @@ -707,19 +708,19 @@ void xPortSysTickHandler( void ) iv IVT_INT_SysTick ics ICS_AUTO /* Calculate the constants required to configure the tick interrupt. */ #if ( configUSE_TICKLESS_IDLE == 1 ) { - ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); + ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick; - ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); + ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); } #endif /* configUSE_TICKLESS_IDLE */ /* Reset SysTick. */ - portNVIC_SYSTICK_CTRL_REG = 0UL; + portNVIC_SYSTICK_CTRL_REG = 0UL; portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Configure SysTick to interrupt at the requested rate. */ - portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; - portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT ); + portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT ); } #endif /* configOVERRIDE_DEFAULT_TICK_CONFIGURATION */ @@ -766,7 +767,7 @@ BaseType_t xPortIsInsideInterrupt( void ) * ulCurrentInterrupt, so ulCurrentInterrupt getting corrupted cannot lead to * an invalid interrupt priority being missed. */ uint32_t ulCurrentInterrupt; - uint8_t ucCurrentPriority; + uint8_t ucCurrentPriority; void vPortValidateInterruptPriority( void ) { /* Obtain the number of the currently executing interrupt. */ diff --git a/portable/MikroC/ARM_CM4F/portmacro.h b/portable/MikroC/ARM_CM4F/portmacro.h index 09508ce51..e3dcc571a 100644 --- a/portable/MikroC/ARM_CM4F/portmacro.h +++ b/portable/MikroC/ARM_CM4F/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H @@ -151,7 +152,7 @@ /*-----------------------------------------------------------*/ - #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) ) + #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) ) #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ diff --git a/portable/Paradigm/Tern_EE/large_untested/port.c b/portable/Paradigm/Tern_EE/large_untested/port.c index 487a54792..a7c6d8bcb 100644 --- a/portable/Paradigm/Tern_EE/large_untested/port.c +++ b/portable/Paradigm/Tern_EE/large_untested/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ diff --git a/portable/Paradigm/Tern_EE/large_untested/portasm.h b/portable/Paradigm/Tern_EE/large_untested/portasm.h index b56cd4cea..c4266fd20 100644 --- a/portable/Paradigm/Tern_EE/large_untested/portasm.h +++ b/portable/Paradigm/Tern_EE/large_untested/portasm.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ typedef void TCB_t; diff --git a/portable/Paradigm/Tern_EE/large_untested/portmacro.h b/portable/Paradigm/Tern_EE/large_untested/portmacro.h index dfc7d7fbb..6f0824f98 100644 --- a/portable/Paradigm/Tern_EE/large_untested/portmacro.h +++ b/portable/Paradigm/Tern_EE/large_untested/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/Paradigm/Tern_EE/small/port.c b/portable/Paradigm/Tern_EE/small/port.c index 8eb6f3bef..c1eae4368 100644 --- a/portable/Paradigm/Tern_EE/small/port.c +++ b/portable/Paradigm/Tern_EE/small/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ @@ -200,7 +201,7 @@ void vPortEndScheduler( void ) static void prvSetupTimerInterrupt( void ) { const uint32_t ulCompareValue = portTIMER_COMPARE; - uint16_t usTimerCompare; + uint16_t usTimerCompare; usTimerCompare = ( uint16_t ) ( ulCompareValue >> 4 ); t2_init( portENABLE_TIMER, portPRESCALE_VALUE, NULL ); diff --git a/portable/Paradigm/Tern_EE/small/portasm.h b/portable/Paradigm/Tern_EE/small/portasm.h index fe0f37491..055089a7e 100644 --- a/portable/Paradigm/Tern_EE/small/portasm.h +++ b/portable/Paradigm/Tern_EE/small/portasm.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORT_ASM_H diff --git a/portable/Paradigm/Tern_EE/small/portmacro.h b/portable/Paradigm/Tern_EE/small/portmacro.h index f907761b2..bebd15498 100644 --- a/portable/Paradigm/Tern_EE/small/portmacro.h +++ b/portable/Paradigm/Tern_EE/small/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/RVDS/ARM7_LPC21xx/port.c b/portable/RVDS/ARM7_LPC21xx/port.c index a8e28e68d..5b9c4c97e 100644 --- a/portable/RVDS/ARM7_LPC21xx/port.c +++ b/portable/RVDS/ARM7_LPC21xx/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ @@ -192,7 +193,7 @@ void vPortEndScheduler( void ) * to run - but a context switch is not performed. */ xTaskIncrementTick(); - T0IR = portTIMER_MATCH_ISR_BIT; /* Clear the timer event */ + T0IR = portTIMER_MATCH_ISR_BIT; /* Clear the timer event */ VICVectAddr = portCLEAR_VIC_INTERRUPT; /* Acknowledge the Interrupt */ } @@ -217,7 +218,7 @@ static void prvSetupTimerInterrupt( void ) /* A 1ms tick does not require the use of the timer prescale. This is * defaulted to zero but can be used if necessary. */ - T0PR = portPRESCALE_VALUE; + T0PR = portPRESCALE_VALUE; /* Calculate the match value required for our wanted tick rate. */ ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ; @@ -230,14 +231,14 @@ static void prvSetupTimerInterrupt( void ) } #endif - T0MR0 = ulCompareMatch; + T0MR0 = ulCompareMatch; /* Generate tick with timer 0 compare match. */ - T0MCR = portRESET_COUNT_ON_MATCH | portINTERRUPT_ON_MATCH; + T0MCR = portRESET_COUNT_ON_MATCH | portINTERRUPT_ON_MATCH; /* Setup the VIC for the timer. */ - VICIntSelect &= ~( portTIMER_VIC_CHANNEL_BIT ); - VICIntEnable |= portTIMER_VIC_CHANNEL_BIT; + VICIntSelect &= ~( portTIMER_VIC_CHANNEL_BIT ); + VICIntEnable |= portTIMER_VIC_CHANNEL_BIT; /* The ISR installed depends on whether the preemptive or cooperative * scheduler is being used. */ @@ -251,11 +252,11 @@ static void prvSetupTimerInterrupt( void ) } #endif - VICVectCntl0 = portTIMER_VIC_CHANNEL | portTIMER_VIC_ENABLE; + VICVectCntl0 = portTIMER_VIC_CHANNEL | portTIMER_VIC_ENABLE; /* Start the timer - interrupts are disabled when this function is called * so it is okay to do this here. */ - T0TCR = portENABLE_TIMER; + T0TCR = portENABLE_TIMER; } /*-----------------------------------------------------------*/ diff --git a/portable/RVDS/ARM7_LPC21xx/portmacro.h b/portable/RVDS/ARM7_LPC21xx/portmacro.h index 00292f9a4..3aed9823e 100644 --- a/portable/RVDS/ARM7_LPC21xx/portmacro.h +++ b/portable/RVDS/ARM7_LPC21xx/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ diff --git a/portable/RVDS/ARM_CA9/port.c b/portable/RVDS/ARM_CA9/port.c index 9f97f3c1e..e7c418dbb 100644 --- a/portable/RVDS/ARM_CA9/port.c +++ b/portable/RVDS/ARM_CA9/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Standard includes. */ @@ -183,14 +184,14 @@ uint32_t ulAsmAPIPriorityMask __attribute__( ( at( configMAX_API_CALL_INTERRUPT_ /* Saved as part of the task context. If ulPortTaskHasFPUContext is non-zero then * a floating point context must be saved and restored for the task. */ -uint32_t ulPortTaskHasFPUContext = pdFALSE; +uint32_t ulPortTaskHasFPUContext = pdFALSE; /* Set to 1 to pend a context switch from an ISR. */ -uint32_t ulPortYieldRequired = pdFALSE; +uint32_t ulPortYieldRequired = pdFALSE; /* Counts the interrupt nesting depth. A context switch is only performed if * if the nesting depth is 0. */ -uint32_t ulPortInterruptNesting = 0UL; +uint32_t ulPortInterruptNesting = 0UL; /*-----------------------------------------------------------*/ @@ -430,7 +431,7 @@ uint32_t ulPortSetInterruptMask( void ) } else { - ulReturn = pdFALSE; + ulReturn = pdFALSE; portICCPMR_PRIORITY_MASK_REGISTER = ( uint32_t ) ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT ); __asm( "DSB \n" "ISB \n"); diff --git a/portable/RVDS/ARM_CA9/portmacro.h b/portable/RVDS/ARM_CA9/portmacro.h index 4fc3e574a..f71deb1c8 100644 --- a/portable/RVDS/ARM_CA9/portmacro.h +++ b/portable/RVDS/ARM_CA9/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H @@ -143,7 +144,7 @@ /*-----------------------------------------------------------*/ - #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __clz( uxReadyPriorities ) ) + #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __clz( uxReadyPriorities ) ) #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ diff --git a/portable/RVDS/ARM_CM0/port.c b/portable/RVDS/ARM_CM0/port.c index 48a536da1..a1e9fefc6 100644 --- a/portable/RVDS/ARM_CM0/port.c +++ b/portable/RVDS/ARM_CM0/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -74,11 +75,11 @@ /* Each task maintains its own interrupt status in the critical nesting * variable. */ -static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; +static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; /* The number of SysTick increments that make up one tick period. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t ulTimerCountsForOneTick = 0; + static uint32_t ulTimerCountsForOneTick = 0; #endif /* configUSE_TICKLESS_IDLE */ /* The maximum number of tick periods that can be suppressed is limited by the @@ -91,7 +92,7 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; * power functionality only. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t ulStoppedTimerCompensation = 0; + static uint32_t ulStoppedTimerCompensation = 0; #endif /* configUSE_TICKLESS_IDLE */ /* @@ -217,7 +218,7 @@ BaseType_t xPortStartScheduler( void ) vPortSetupTimerInterrupt(); /* Initialise the critical nesting count ready for the first task. */ - uxCriticalNesting = 0; + uxCriticalNesting = 0; /* Start the first task. */ prvPortStartFirstTask(); @@ -314,11 +315,11 @@ __asm void xPortPendSVHandler( void ) cpsid i bl vTaskSwitchContext cpsie i - pop { + pop { r2, r3 } /* lr goes in r3. r2 now holds tcb pointer. */ - ldr r1, [ r2 ] + ldr r1, [ r2 ] ldr r0, [ r1 ] /* The first item in pxCurrentTCB is the task top of stack. */ adds r0, # 16 /* Move to the high registers. */ ldmia r0 !, { @@ -368,18 +369,18 @@ void xPortSysTickHandler( void ) { /* Calculate the constants required to configure the tick interrupt. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - ulTimerCountsForOneTick = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ); + ulTimerCountsForOneTick = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ); xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick; - ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR; + ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR; #endif /* configUSE_TICKLESS_IDLE */ /* Stop and reset the SysTick. */ - portNVIC_SYSTICK_CTRL_REG = 0UL; - portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; + portNVIC_SYSTICK_CTRL_REG = 0UL; + portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Configure SysTick to interrupt at the requested rate. */ - portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; - portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; + portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT; } #endif /* configOVERRIDE_DEFAULT_TICK_CONFIGURATION */ @@ -389,7 +390,7 @@ void xPortSysTickHandler( void ) __weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ) { - uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; + uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; TickType_t xModifiableIdleTime; /* Make sure the SysTick reload value does not overflow the counter. */ @@ -407,7 +408,7 @@ void xPortSysTickHandler( void ) /* Calculate the reload value required to wait xExpectedIdleTime * tick periods. -1 is used because this code will execute part way * through one of the tick periods. */ - ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); + ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); if( ulReloadValue > ulStoppedTimerCompensation ) { @@ -426,14 +427,14 @@ void xPortSysTickHandler( void ) { /* Restart from whatever is left in the count register to complete * this tick period. */ - portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; + portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; /* Restart SysTick. */ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Reset the reload register to the value required for normal tick * periods. */ - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Re-enable interrupts - see comments above __disable_irq() call * above. */ @@ -442,21 +443,21 @@ void xPortSysTickHandler( void ) else { /* Set the new reload value. */ - portNVIC_SYSTICK_LOAD_REG = ulReloadValue; + portNVIC_SYSTICK_LOAD_REG = ulReloadValue; /* Clear the SysTick count flag and set the count value back to * zero. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Restart SysTick. */ - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can * set its parameter to 0 to indicate that its implementation contains * its own wait for interrupt or wait for event instruction, and so wfi * should not be executed again. However, the original expected idle * time variable must remain unmodified, so a copy is taken. */ - xModifiableIdleTime = xExpectedIdleTime; + xModifiableIdleTime = xExpectedIdleTime; configPRE_SLEEP_PROCESSING( xModifiableIdleTime ); if( xModifiableIdleTime > 0 ) @@ -490,7 +491,7 @@ void xPortSysTickHandler( void ) * be, but using the tickless mode will inevitably result in some tiny * drift of the time maintained by the kernel with respect to calendar * time*/ - portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); /* Determine if the SysTick clock has already counted to zero and * been set back to the current reload value (the reload back being @@ -505,7 +506,7 @@ void xPortSysTickHandler( void ) * reloaded with ulReloadValue. Reset the * portNVIC_SYSTICK_LOAD with whatever remains of this tick * period. */ - ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); + ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); /* Don't allow a tiny value, or values that have somehow * underflowed because the post sleep hook did something @@ -520,7 +521,7 @@ void xPortSysTickHandler( void ) /* As the pending tick will be processed as soon as this * function exits, the tick value maintained by the tick is stepped * forward by one less than the time spent waiting. */ - ulCompleteTickPeriods = xExpectedIdleTime - 1UL; + ulCompleteTickPeriods = xExpectedIdleTime - 1UL; } else { @@ -532,20 +533,20 @@ void xPortSysTickHandler( void ) /* How many complete tick periods passed while the processor * was waiting? */ - ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; + ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; /* The reload value is set to whatever fraction of a single tick * period remains. */ - portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; + portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; } /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD * again, then set portNVIC_SYSTICK_LOAD back to its standard * value. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; vTaskStepTick( ulCompleteTickPeriods ); - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Exit with interrpts enabled. */ __enable_irq(); diff --git a/portable/RVDS/ARM_CM0/portmacro.h b/portable/RVDS/ARM_CM0/portmacro.h index 292387a14..ba171cc77 100644 --- a/portable/RVDS/ARM_CM0/portmacro.h +++ b/portable/RVDS/ARM_CM0/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ diff --git a/portable/RVDS/ARM_CM3/port.c b/portable/RVDS/ARM_CM3/port.c index e3ba34dbe..c29b98a00 100644 --- a/portable/RVDS/ARM_CM3/port.c +++ b/portable/RVDS/ARM_CM3/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -131,13 +132,13 @@ static void prvTaskExitError( void ); /* Each task maintains its own interrupt status in the critical nesting * variable. */ -static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; +static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; /* * The number of SysTick increments that make up one tick period. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t ulTimerCountsForOneTick = 0; + static uint32_t ulTimerCountsForOneTick = 0; #endif /* configUSE_TICKLESS_IDLE */ /* @@ -145,7 +146,7 @@ static UBaseType_t uxCriticalNesting = 0xaaaaa * 24 bit resolution of the SysTick timer. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t xMaximumPossibleSuppressedTicks = 0; + static uint32_t xMaximumPossibleSuppressedTicks = 0; #endif /* configUSE_TICKLESS_IDLE */ /* @@ -153,7 +154,7 @@ static UBaseType_t uxCriticalNesting = 0xaaaaa * power functionality only. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t ulStoppedTimerCompensation = 0; + static uint32_t ulStoppedTimerCompensation = 0; #endif /* configUSE_TICKLESS_IDLE */ /* @@ -162,8 +163,8 @@ static UBaseType_t uxCriticalNesting = 0xaaaaa * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY. */ #if ( configASSERT_DEFINED == 1 ) - static uint8_t ucMaxSysCallPriority = 0; - static uint32_t ulMaxPRIGROUPValue = 0; + static uint8_t ucMaxSysCallPriority = 0; + static uint32_t ulMaxPRIGROUPValue = 0; static const volatile uint8_t * const pcInterruptPriorityRegisters = ( uint8_t * ) portNVIC_IP_REGISTERS_OFFSET_16; #endif /* configASSERT_DEFINED */ @@ -259,9 +260,9 @@ BaseType_t xPortStartScheduler( void ) { #if ( configASSERT_DEFINED == 1 ) { - volatile uint32_t ulOriginalPriority; + volatile uint32_t ulOriginalPriority; volatile uint8_t * const pucFirstUserPriorityRegister = ( uint8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER ); - volatile uint8_t ucMaxPriorityValue; + volatile uint8_t ucMaxPriorityValue; /* Determine the maximum priority from which ISR safe FreeRTOS API * functions can be called. ISR safe functions are those that end in @@ -269,25 +270,25 @@ BaseType_t xPortStartScheduler( void ) * ensure interrupt entry is as fast and simple as possible. * * Save the interrupt priority value that is about to be clobbered. */ - ulOriginalPriority = *pucFirstUserPriorityRegister; + ulOriginalPriority = *pucFirstUserPriorityRegister; /* Determine the number of priority bits available. First write to all * possible bits. */ *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE; /* Read the value back to see how many bits stuck. */ - ucMaxPriorityValue = *pucFirstUserPriorityRegister; + ucMaxPriorityValue = *pucFirstUserPriorityRegister; /* The kernel interrupt priority should be set to the lowest * priority. */ configASSERT( ucMaxPriorityValue == ( configKERNEL_INTERRUPT_PRIORITY & ucMaxPriorityValue ) ); /* Use the same mask on the maximum system call priority. */ - ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; + ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; /* Calculate the maximum acceptable priority group value for the number * of bits read back. */ - ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS; + ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS; while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE ) { @@ -315,8 +316,8 @@ BaseType_t xPortStartScheduler( void ) /* Shift the priority group value back to its position within the AIRCR * register. */ - ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; - ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; + ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; + ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; /* Restore the clobbered interrupt priority register to its original * value. */ @@ -334,7 +335,7 @@ BaseType_t xPortStartScheduler( void ) vPortSetupTimerInterrupt(); /* Initialise the critical nesting count ready for the first task. */ - uxCriticalNesting = 0; + uxCriticalNesting = 0; /* Start the first task. */ prvStartFirstTask(); @@ -389,7 +390,7 @@ __asm void xPortPendSVHandler( void ) PRESERVE8 - mrs r0, psp + mrs r0, psp isb ldr r3, = pxCurrentTCB /* Get the location of the current TCB. */ @@ -422,7 +423,7 @@ __asm void xPortPendSVHandler( void ) msr psp, r0 isb bx r14 - nop + nop } /*-----------------------------------------------------------*/ @@ -452,7 +453,7 @@ void xPortSysTickHandler( void ) __weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ) { - uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; + uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; TickType_t xModifiableIdleTime; /* Make sure the SysTick reload value does not overflow the counter. */ @@ -470,7 +471,7 @@ void xPortSysTickHandler( void ) /* Calculate the reload value required to wait xExpectedIdleTime * tick periods. -1 is used because this code will execute part way * through one of the tick periods. */ - ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); + ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); if( ulReloadValue > ulStoppedTimerCompensation ) { @@ -489,14 +490,14 @@ void xPortSysTickHandler( void ) { /* Restart from whatever is left in the count register to complete * this tick period. */ - portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; + portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; /* Restart SysTick. */ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Reset the reload register to the value required for normal tick * periods. */ - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Re-enable interrupts - see comments above __disable_irq() call * above. */ @@ -505,21 +506,21 @@ void xPortSysTickHandler( void ) else { /* Set the new reload value. */ - portNVIC_SYSTICK_LOAD_REG = ulReloadValue; + portNVIC_SYSTICK_LOAD_REG = ulReloadValue; /* Clear the SysTick count flag and set the count value back to * zero. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Restart SysTick. */ - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can * set its parameter to 0 to indicate that its implementation contains * its own wait for interrupt or wait for event instruction, and so wfi * should not be executed again. However, the original expected idle * time variable must remain unmodified, so a copy is taken. */ - xModifiableIdleTime = xExpectedIdleTime; + xModifiableIdleTime = xExpectedIdleTime; configPRE_SLEEP_PROCESSING( xModifiableIdleTime ); if( xModifiableIdleTime > 0 ) @@ -553,7 +554,7 @@ void xPortSysTickHandler( void ) * be, but using the tickless mode will inevitably result in some tiny * drift of the time maintained by the kernel with respect to calendar * time*/ - portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); /* Determine if the SysTick clock has already counted to zero and * been set back to the current reload value (the reload back being @@ -568,7 +569,7 @@ void xPortSysTickHandler( void ) * reloaded with ulReloadValue. Reset the * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick * period. */ - ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); + ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); /* Don't allow a tiny value, or values that have somehow * underflowed because the post sleep hook did something @@ -583,7 +584,7 @@ void xPortSysTickHandler( void ) /* As the pending tick will be processed as soon as this * function exits, the tick value maintained by the tick is stepped * forward by one less than the time spent waiting. */ - ulCompleteTickPeriods = xExpectedIdleTime - 1UL; + ulCompleteTickPeriods = xExpectedIdleTime - 1UL; } else { @@ -595,20 +596,20 @@ void xPortSysTickHandler( void ) /* How many complete tick periods passed while the processor * was waiting? */ - ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; + ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; /* The reload value is set to whatever fraction of a single tick * period remains. */ - portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; + portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; } /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard * value. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; vTaskStepTick( ulCompleteTickPeriods ); - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Exit with interrupts enabled. */ __enable_irq(); @@ -630,19 +631,19 @@ void xPortSysTickHandler( void ) /* Calculate the constants required to configure the tick interrupt. */ #if ( configUSE_TICKLESS_IDLE == 1 ) { - ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); + ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick; - ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); + ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); } #endif /* configUSE_TICKLESS_IDLE */ /* Stop and clear the SysTick. */ - portNVIC_SYSTICK_CTRL_REG = 0UL; + portNVIC_SYSTICK_CTRL_REG = 0UL; portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Configure SysTick to interrupt at the requested rate. */ - portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; - portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT ); + portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT ); } #endif /* configOVERRIDE_DEFAULT_TICK_CONFIGURATION */ @@ -662,7 +663,7 @@ __asm uint32_t vPortGetIPSR( void ) void vPortValidateInterruptPriority( void ) { uint32_t ulCurrentInterrupt; - uint8_t ucCurrentPriority; + uint8_t ucCurrentPriority; /* Obtain the number of the currently executing interrupt. */ ulCurrentInterrupt = vPortGetIPSR(); diff --git a/portable/RVDS/ARM_CM3/portmacro.h b/portable/RVDS/ARM_CM3/portmacro.h index a44cc7eeb..b24328a43 100644 --- a/portable/RVDS/ARM_CM3/portmacro.h +++ b/portable/RVDS/ARM_CM3/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ @@ -135,7 +136,7 @@ /*-----------------------------------------------------------*/ - #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __clz( ( uxReadyPriorities ) ) ) + #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __clz( ( uxReadyPriorities ) ) ) #endif /* taskRECORD_READY_PRIORITY */ /*-----------------------------------------------------------*/ @@ -221,7 +222,7 @@ static portFORCE_INLINE BaseType_t xPortIsInsideInterrupt( void ) { - uint32_t ulCurrentInterrupt; + uint32_t ulCurrentInterrupt; BaseType_t xReturn; /* Obtain the number of the currently executing interrupt. */ diff --git a/portable/RVDS/ARM_CM4F/port.c b/portable/RVDS/ARM_CM4F/port.c index ba2787596..e3f06b956 100644 --- a/portable/RVDS/ARM_CM4F/port.c +++ b/portable/RVDS/ARM_CM4F/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -147,13 +148,13 @@ static void prvTaskExitError( void ); /* Each task maintains its own interrupt status in the critical nesting * variable. */ -static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; +static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; /* * The number of SysTick increments that make up one tick period. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t ulTimerCountsForOneTick = 0; + static uint32_t ulTimerCountsForOneTick = 0; #endif /* configUSE_TICKLESS_IDLE */ /* @@ -161,7 +162,7 @@ static UBaseType_t uxCriticalNesting = 0xaaaaa * 24 bit resolution of the SysTick timer. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t xMaximumPossibleSuppressedTicks = 0; + static uint32_t xMaximumPossibleSuppressedTicks = 0; #endif /* configUSE_TICKLESS_IDLE */ /* @@ -169,7 +170,7 @@ static UBaseType_t uxCriticalNesting = 0xaaaaa * power functionality only. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t ulStoppedTimerCompensation = 0; + static uint32_t ulStoppedTimerCompensation = 0; #endif /* configUSE_TICKLESS_IDLE */ /* @@ -178,8 +179,8 @@ static UBaseType_t uxCriticalNesting = 0xaaaaa * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY. */ #if ( configASSERT_DEFINED == 1 ) - static uint8_t ucMaxSysCallPriority = 0; - static uint32_t ulMaxPRIGROUPValue = 0; + static uint8_t ucMaxSysCallPriority = 0; + static uint32_t ulMaxPRIGROUPValue = 0; static const volatile uint8_t * const pcInterruptPriorityRegisters = ( uint8_t * ) portNVIC_IP_REGISTERS_OFFSET_16; #endif /* configASSERT_DEFINED */ @@ -319,9 +320,9 @@ BaseType_t xPortStartScheduler( void ) #if ( configASSERT_DEFINED == 1 ) { - volatile uint32_t ulOriginalPriority; + volatile uint32_t ulOriginalPriority; volatile uint8_t * const pucFirstUserPriorityRegister = ( uint8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER ); - volatile uint8_t ucMaxPriorityValue; + volatile uint8_t ucMaxPriorityValue; /* Determine the maximum priority from which ISR safe FreeRTOS API * functions can be called. ISR safe functions are those that end in @@ -329,25 +330,25 @@ BaseType_t xPortStartScheduler( void ) * ensure interrupt entry is as fast and simple as possible. * * Save the interrupt priority value that is about to be clobbered. */ - ulOriginalPriority = *pucFirstUserPriorityRegister; + ulOriginalPriority = *pucFirstUserPriorityRegister; /* Determine the number of priority bits available. First write to all * possible bits. */ *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE; /* Read the value back to see how many bits stuck. */ - ucMaxPriorityValue = *pucFirstUserPriorityRegister; + ucMaxPriorityValue = *pucFirstUserPriorityRegister; /* The kernel interrupt priority should be set to the lowest * priority. */ configASSERT( ucMaxPriorityValue == ( configKERNEL_INTERRUPT_PRIORITY & ucMaxPriorityValue ) ); /* Use the same mask on the maximum system call priority. */ - ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; + ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; /* Calculate the maximum acceptable priority group value for the number * of bits read back. */ - ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS; + ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS; while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE ) { @@ -375,8 +376,8 @@ BaseType_t xPortStartScheduler( void ) /* Shift the priority group value back to its position within the AIRCR * register. */ - ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; - ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; + ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; + ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; /* Restore the clobbered interrupt priority register to its original * value. */ @@ -393,13 +394,13 @@ BaseType_t xPortStartScheduler( void ) vPortSetupTimerInterrupt(); /* Initialise the critical nesting count ready for the first task. */ - uxCriticalNesting = 0; + uxCriticalNesting = 0; /* Ensure the VFP is enabled - it should be anyway. */ prvEnableVFP(); /* Lazy save always. */ - *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS; + *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS; /* Start the first task. */ prvStartFirstTask(); @@ -454,7 +455,7 @@ __asm void xPortPendSVHandler( void ) PRESERVE8 - mrs r0, psp + mrs r0, psp isb /* Get the location of the current TCB. */ ldr r3, = pxCurrentTCB @@ -507,7 +508,7 @@ __asm void xPortPendSVHandler( void ) } msr psp, r0 - isb + isb #ifdef WORKAROUND_PMU_CM001 /* XMC4000 specific errata */ #if WORKAROUND_PMU_CM001 == 1 push { @@ -550,7 +551,7 @@ void xPortSysTickHandler( void ) __weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ) { - uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; + uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; TickType_t xModifiableIdleTime; /* Make sure the SysTick reload value does not overflow the counter. */ @@ -568,7 +569,7 @@ void xPortSysTickHandler( void ) /* Calculate the reload value required to wait xExpectedIdleTime * tick periods. -1 is used because this code will execute part way * through one of the tick periods. */ - ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); + ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); if( ulReloadValue > ulStoppedTimerCompensation ) { @@ -587,14 +588,14 @@ void xPortSysTickHandler( void ) { /* Restart from whatever is left in the count register to complete * this tick period. */ - portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; + portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; /* Restart SysTick. */ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Reset the reload register to the value required for normal tick * periods. */ - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Re-enable interrupts - see comments above __disable_irq() call * above. */ @@ -603,21 +604,21 @@ void xPortSysTickHandler( void ) else { /* Set the new reload value. */ - portNVIC_SYSTICK_LOAD_REG = ulReloadValue; + portNVIC_SYSTICK_LOAD_REG = ulReloadValue; /* Clear the SysTick count flag and set the count value back to * zero. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Restart SysTick. */ - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can * set its parameter to 0 to indicate that its implementation contains * its own wait for interrupt or wait for event instruction, and so wfi * should not be executed again. However, the original expected idle * time variable must remain unmodified, so a copy is taken. */ - xModifiableIdleTime = xExpectedIdleTime; + xModifiableIdleTime = xExpectedIdleTime; configPRE_SLEEP_PROCESSING( xModifiableIdleTime ); if( xModifiableIdleTime > 0 ) @@ -651,7 +652,7 @@ void xPortSysTickHandler( void ) * be, but using the tickless mode will inevitably result in some tiny * drift of the time maintained by the kernel with respect to calendar * time*/ - portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); /* Determine if the SysTick clock has already counted to zero and * been set back to the current reload value (the reload back being @@ -666,7 +667,7 @@ void xPortSysTickHandler( void ) * reloaded with ulReloadValue. Reset the * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick * period. */ - ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); + ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); /* Don't allow a tiny value, or values that have somehow * underflowed because the post sleep hook did something @@ -681,7 +682,7 @@ void xPortSysTickHandler( void ) /* As the pending tick will be processed as soon as this * function exits, the tick value maintained by the tick is stepped * forward by one less than the time spent waiting. */ - ulCompleteTickPeriods = xExpectedIdleTime - 1UL; + ulCompleteTickPeriods = xExpectedIdleTime - 1UL; } else { @@ -693,20 +694,20 @@ void xPortSysTickHandler( void ) /* How many complete tick periods passed while the processor * was waiting? */ - ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; + ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; /* The reload value is set to whatever fraction of a single tick * period remains. */ - portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; + portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; } /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard * value. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; vTaskStepTick( ulCompleteTickPeriods ); - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Exit with interrupts enabled. */ __enable_irq(); @@ -728,19 +729,19 @@ void xPortSysTickHandler( void ) /* Calculate the constants required to configure the tick interrupt. */ #if ( configUSE_TICKLESS_IDLE == 1 ) { - ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); + ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick; - ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); + ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); } #endif /* configUSE_TICKLESS_IDLE */ /* Stop and clear the SysTick. */ - portNVIC_SYSTICK_CTRL_REG = 0UL; + portNVIC_SYSTICK_CTRL_REG = 0UL; portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Configure SysTick to interrupt at the requested rate. */ - portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; - portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT ); + portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT ); } #endif /* configOVERRIDE_DEFAULT_TICK_CONFIGURATION */ @@ -760,7 +761,7 @@ __asm uint32_t vPortGetIPSR( void ) void vPortValidateInterruptPriority( void ) { uint32_t ulCurrentInterrupt; - uint8_t ucCurrentPriority; + uint8_t ucCurrentPriority; /* Obtain the number of the currently executing interrupt. */ ulCurrentInterrupt = vPortGetIPSR(); diff --git a/portable/RVDS/ARM_CM4F/portmacro.h b/portable/RVDS/ARM_CM4F/portmacro.h index a44cc7eeb..b24328a43 100644 --- a/portable/RVDS/ARM_CM4F/portmacro.h +++ b/portable/RVDS/ARM_CM4F/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ @@ -135,7 +136,7 @@ /*-----------------------------------------------------------*/ - #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __clz( ( uxReadyPriorities ) ) ) + #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __clz( ( uxReadyPriorities ) ) ) #endif /* taskRECORD_READY_PRIORITY */ /*-----------------------------------------------------------*/ @@ -221,7 +222,7 @@ static portFORCE_INLINE BaseType_t xPortIsInsideInterrupt( void ) { - uint32_t ulCurrentInterrupt; + uint32_t ulCurrentInterrupt; BaseType_t xReturn; /* Obtain the number of the currently executing interrupt. */ diff --git a/portable/RVDS/ARM_CM4_MPU/port.c b/portable/RVDS/ARM_CM4_MPU/port.c index 5bd5d8da2..a87b67a96 100644 --- a/portable/RVDS/ARM_CM4_MPU/port.c +++ b/portable/RVDS/ARM_CM4_MPU/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -104,7 +105,7 @@ /* Each task maintains its own interrupt status in the critical nesting * variable. Note this is not saved as part of the task context as context * switches can only occur when uxCriticalNesting is zero. */ -static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; +static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; /* * Setup the timer to generate the tick interrupts. @@ -162,8 +163,8 @@ static uint32_t prvPortGetIPSR( void ); * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY. */ #if ( configASSERT_DEFINED == 1 ) - static uint8_t ucMaxSysCallPriority = 0; - static uint32_t ulMaxPRIGROUPValue = 0; + static uint8_t ucMaxSysCallPriority = 0; + static uint32_t ulMaxPRIGROUPValue = 0; static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const uint8_t * ) portNVIC_IP_REGISTERS_OFFSET_16; #endif /* configASSERT_DEFINED */ @@ -239,8 +240,8 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, void prvSVCHandler( uint32_t * pulParam ) { - uint8_t ucSVCNumber; - uint32_t ulReg, ulPC; + uint8_t ucSVCNumber; + uint32_t ulReg, ulPC; #if ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) extern uint32_t __syscalls_flash_start__; @@ -249,7 +250,7 @@ void prvSVCHandler( uint32_t * pulParam ) /* The stack contains: r0, r1, r2, r3, r12, LR, PC and xPSR. The first * argument (r0) is pulParam[ 0 ]. */ - ulPC = pulParam[ portOFFSET_TO_PC ]; + ulPC = pulParam[ portOFFSET_TO_PC ]; ucSVCNumber = ( ( uint8_t * ) ulPC )[ -2 ]; switch( ucSVCNumber ) @@ -328,22 +329,22 @@ __asm void prvRestoreContextOfFirstTask( void ) { PRESERVE8 - ldr r0, = 0xE000ED08 /* Use the NVIC offset register to locate the stack. */ - ldr r0, [ r0 ] + ldr r0, = 0xE000ED08 /* Use the NVIC offset register to locate the stack. */ + ldr r0, [ r0 ] ldr r0, [ r0 ] - msr msp, r0 /* Set the msp back to the start of the stack. */ - ldr r3, = pxCurrentTCB /* Restore the context. */ - ldr r1, [ r3 ] - ldr r0, [ r1 ] /* The first item in the TCB is the task top of stack. */ - add r1, r1, # 4 /* Move onto the second item in the TCB... */ + msr msp, r0 /* Set the msp back to the start of the stack. */ + ldr r3, = pxCurrentTCB /* Restore the context. */ + ldr r1, [ r3 ] + ldr r0, [ r1 ] /* The first item in the TCB is the task top of stack. */ + add r1, r1, # 4 /* Move onto the second item in the TCB... */ - dmb /* Complete outstanding transfers before disabling MPU. */ - ldr r2, = 0xe000ed94 /* MPU_CTRL register. */ - ldr r3, [ r2 ] /* Read the value of MPU_CTRL. */ - bic r3, r3, # 1 /* r3 = r3 & ~1 i.e. Clear the bit 0 in r3. */ - str r3, [ r2 ] /* Disable MPU. */ + dmb /* Complete outstanding transfers before disabling MPU. */ + ldr r2, = 0xe000ed94 /* MPU_CTRL register. */ + ldr r3, [ r2 ] /* Read the value of MPU_CTRL. */ + bic r3, r3, # 1 /* r3 = r3 & ~1 i.e. Clear the bit 0 in r3. */ + str r3, [ r2 ] /* Disable MPU. */ - ldr r2, = 0xe000ed9c /* Region Base Address register. */ + ldr r2, = 0xe000ed9c /* Region Base Address register. */ ldmia r1 !, { r4 - r11 } /* Read 4 sets of MPU registers. */ @@ -351,11 +352,11 @@ __asm void prvRestoreContextOfFirstTask( void ) r4 - r11 } /* Write 4 sets of MPU registers. */ - ldr r2, = 0xe000ed94 /* MPU_CTRL register. */ - ldr r3, [ r2 ] /* Read the value of MPU_CTRL. */ - orr r3, r3, # 1 /* r3 = r3 | 1 i.e. Set the bit 0 in r3. */ - str r3, [ r2 ] /* Enable MPU. */ - dsb /* Force memory writes before continuing. */ + ldr r2, = 0xe000ed94 /* MPU_CTRL register. */ + ldr r3, [ r2 ] /* Read the value of MPU_CTRL. */ + orr r3, r3, # 1 /* r3 = r3 | 1 i.e. Set the bit 0 in r3. */ + str r3, [ r2 ] /* Enable MPU. */ + dsb /* Force memory writes before continuing. */ ldmia r0 !, { r3 - r11, r14 @@ -380,9 +381,9 @@ BaseType_t xPortStartScheduler( void ) #if ( configASSERT_DEFINED == 1 ) { - volatile uint32_t ulOriginalPriority; + volatile uint32_t ulOriginalPriority; volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER ); - volatile uint8_t ucMaxPriorityValue; + volatile uint8_t ucMaxPriorityValue; /* Determine the maximum priority from which ISR safe FreeRTOS API * functions can be called. ISR safe functions are those that end in @@ -390,21 +391,21 @@ BaseType_t xPortStartScheduler( void ) * ensure interrupt entry is as fast and simple as possible. * * Save the interrupt priority value that is about to be clobbered. */ - ulOriginalPriority = *pucFirstUserPriorityRegister; + ulOriginalPriority = *pucFirstUserPriorityRegister; /* Determine the number of priority bits available. First write to all * possible bits. */ *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE; /* Read the value back to see how many bits stuck. */ - ucMaxPriorityValue = *pucFirstUserPriorityRegister; + ucMaxPriorityValue = *pucFirstUserPriorityRegister; /* Use the same mask on the maximum system call priority. */ - ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; + ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; /* Calculate the maximum acceptable priority group value for the number * of bits read back. */ - ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS; + ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS; while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE ) { @@ -432,8 +433,8 @@ BaseType_t xPortStartScheduler( void ) /* Shift the priority group value back to its position within the AIRCR * register. */ - ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; - ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; + ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; + ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; /* Restore the clobbered interrupt priority register to its original * value. */ @@ -455,13 +456,13 @@ BaseType_t xPortStartScheduler( void ) vSetupTimerInterrupt(); /* Initialise the critical nesting count ready for the first task. */ - uxCriticalNesting = 0; + uxCriticalNesting = 0; /* Ensure the VFP is enabled - it should be anyway. */ vPortEnableVFP(); /* Lazy save always. */ - *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS; + *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS; /* Start the first task. */ prvStartFirstTask(); @@ -541,10 +542,10 @@ __asm void xPortPendSVHandler( void ) PRESERVE8 - mrs r0, psp + mrs r0, psp - ldr r3, = pxCurrentTCB /* Get the location of the current TCB. */ - ldr r2, [ r3 ] + ldr r3, = pxCurrentTCB /* Get the location of the current TCB. */ + ldr r2, [ r3 ] tst r14, # 0x10 /* Is the task using the FPU context? If so, push high vfp registers. */ it eq @@ -573,16 +574,16 @@ __asm void xPortPendSVHandler( void ) } /* Restore the context. */ ldr r1, [ r3 ] - ldr r0, [ r1 ] /* The first item in the TCB is the task top of stack. */ - add r1, r1, # 4 /* Move onto the second item in the TCB... */ + ldr r0, [ r1 ] /* The first item in the TCB is the task top of stack. */ + add r1, r1, # 4 /* Move onto the second item in the TCB... */ - dmb /* Complete outstanding transfers before disabling MPU. */ - ldr r2, = 0xe000ed94 /* MPU_CTRL register. */ - ldr r3, [ r2 ] /* Read the value of MPU_CTRL. */ - bic r3, r3, # 1 /* r3 = r3 & ~1 i.e. Clear the bit 0 in r3. */ - str r3, [ r2 ] /* Disable MPU. */ + dmb /* Complete outstanding transfers before disabling MPU. */ + ldr r2, = 0xe000ed94 /* MPU_CTRL register. */ + ldr r3, [ r2 ] /* Read the value of MPU_CTRL. */ + bic r3, r3, # 1 /* r3 = r3 & ~1 i.e. Clear the bit 0 in r3. */ + str r3, [ r2 ] /* Disable MPU. */ - ldr r2, = 0xe000ed9c /* Region Base Address register. */ + ldr r2, = 0xe000ed9c /* Region Base Address register. */ ldmia r1 !, { r4 - r11 } /* Read 4 sets of MPU registers. */ @@ -590,11 +591,11 @@ __asm void xPortPendSVHandler( void ) r4 - r11 } /* Write 4 sets of MPU registers. */ - ldr r2, = 0xe000ed94 /* MPU_CTRL register. */ - ldr r3, [ r2 ] /* Read the value of MPU_CTRL. */ - orr r3, r3, # 1 /* r3 = r3 | 1 i.e. Set the bit 0 in r3. */ - str r3, [ r2 ] /* Enable MPU. */ - dsb /* Force memory writes before continuing. */ + ldr r2, = 0xe000ed94 /* MPU_CTRL register. */ + ldr r3, [ r2 ] /* Read the value of MPU_CTRL. */ + orr r3, r3, # 1 /* r3 = r3 | 1 i.e. Set the bit 0 in r3. */ + str r3, [ r2 ] /* Enable MPU. */ + dsb /* Force memory writes before continuing. */ ldmia r0 !, { r3 - r11, r14 @@ -609,7 +610,7 @@ __asm void xPortPendSVHandler( void ) msr psp, r0 bx r14 - nop + nop } /*-----------------------------------------------------------*/ @@ -637,12 +638,12 @@ void xPortSysTickHandler( void ) __weak void vSetupTimerInterrupt( void ) { /* Reset the SysTick. */ - portNVIC_SYSTICK_CTRL_REG = 0UL; + portNVIC_SYSTICK_CTRL_REG = 0UL; portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Configure SysTick to interrupt at the requested rate. */ - portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; - portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE; + portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; + portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE; } /*-----------------------------------------------------------*/ @@ -689,10 +690,10 @@ static void prvSetupMPU( void ) ( portMPU_REGION_VALID ) | ( portUNPRIVILEGED_FLASH_REGION ); - portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_READ_ONLY ) | - ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | - ( prvGetMPURegionSizeSetting( ( uint32_t ) __FLASH_segment_end__ - ( uint32_t ) __FLASH_segment_start__ ) ) | - ( portMPU_REGION_ENABLE ); + portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_READ_ONLY ) | + ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | + ( prvGetMPURegionSizeSetting( ( uint32_t ) __FLASH_segment_end__ - ( uint32_t ) __FLASH_segment_start__ ) ) | + ( portMPU_REGION_ENABLE ); /* Setup the privileged flash for privileged only access. This is where * the kernel code is placed. */ @@ -700,10 +701,10 @@ static void prvSetupMPU( void ) ( portMPU_REGION_VALID ) | ( portPRIVILEGED_FLASH_REGION ); - portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_PRIVILEGED_READ_ONLY ) | - ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | - ( prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_functions_end__ - ( uint32_t ) __privileged_functions_start__ ) ) | - ( portMPU_REGION_ENABLE ); + portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_PRIVILEGED_READ_ONLY ) | + ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | + ( prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_functions_end__ - ( uint32_t ) __privileged_functions_start__ ) ) | + ( portMPU_REGION_ENABLE ); /* Setup the privileged data RAM region. This is where the kernel data * is placed. */ @@ -711,10 +712,10 @@ static void prvSetupMPU( void ) ( portMPU_REGION_VALID ) | ( portPRIVILEGED_RAM_REGION ); - portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | - ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | - prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) | - ( portMPU_REGION_ENABLE ); + portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | + ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | + prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) | + ( portMPU_REGION_ENABLE ); /* By default allow everything to access the general peripherals. The * system peripherals and registers are protected. */ @@ -722,15 +723,15 @@ static void prvSetupMPU( void ) ( portMPU_REGION_VALID ) | ( portGENERAL_PERIPHERALS_REGION ); - portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) | - ( prvGetMPURegionSizeSetting( portPERIPHERALS_END_ADDRESS - portPERIPHERALS_START_ADDRESS ) ) | - ( portMPU_REGION_ENABLE ); + portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) | + ( prvGetMPURegionSizeSetting( portPERIPHERALS_END_ADDRESS - portPERIPHERALS_START_ADDRESS ) ) | + ( portMPU_REGION_ENABLE ); /* Enable the memory fault exception. */ - portNVIC_SYS_CTRL_STATE_REG |= portNVIC_MEM_FAULT_ENABLE; + portNVIC_SYS_CTRL_STATE_REG |= portNVIC_MEM_FAULT_ENABLE; /* Enable the MPU with the background region configured. */ - portMPU_CTRL_REG |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE ); + portMPU_CTRL_REG |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE ); } } /*-----------------------------------------------------------*/ @@ -794,8 +795,8 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, extern uint32_t __privileged_data_end__; - int32_t lIndex; - uint32_t ul; + int32_t lIndex; + uint32_t ul; if( xRegions == NULL ) { @@ -805,7 +806,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, ( portMPU_REGION_VALID ) | ( portSTACK_REGION ); - xMPUSettings->xRegion[ 0 ].ulRegionAttribute = + xMPUSettings->xRegion[ 0 ].ulRegionAttribute = ( portMPU_REGION_READ_WRITE ) | ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | ( prvGetMPURegionSizeSetting( ( uint32_t ) __SRAM_segment_end__ - ( uint32_t ) __SRAM_segment_start__ ) ) | @@ -818,7 +819,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, ( portMPU_REGION_VALID ) | ( portSTACK_REGION + 1 ); - xMPUSettings->xRegion[ 1 ].ulRegionAttribute = + xMPUSettings->xRegion[ 1 ].ulRegionAttribute = ( portMPU_REGION_PRIVILEGED_READ_WRITE ) | ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) | @@ -828,7 +829,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, for( ul = 2; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ ) { xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID; - xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL; + xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL; } } else @@ -845,7 +846,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, ( portMPU_REGION_VALID ) | ( portSTACK_REGION ); /* Region number. */ - xMPUSettings->xRegion[ 0 ].ulRegionAttribute = + xMPUSettings->xRegion[ 0 ].ulRegionAttribute = ( portMPU_REGION_READ_WRITE ) | /* Read and write. */ ( prvGetMPURegionSizeSetting( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) ) | ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | @@ -866,7 +867,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, ( portMPU_REGION_VALID ) | ( portSTACK_REGION + ul ); /* Region number. */ - xMPUSettings->xRegion[ ul ].ulRegionAttribute = + xMPUSettings->xRegion[ ul ].ulRegionAttribute = ( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) | ( xRegions[ lIndex ].ulParameters ) | ( portMPU_REGION_ENABLE ); @@ -875,7 +876,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings, { /* Invalidate the region. */ xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID; - xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL; + xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL; } lIndex++; @@ -898,7 +899,7 @@ __asm uint32_t prvPortGetIPSR( void ) void vPortValidateInterruptPriority( void ) { uint32_t ulCurrentInterrupt; - uint8_t ucCurrentPriority; + uint8_t ucCurrentPriority; /* Obtain the number of the currently executing interrupt. */ ulCurrentInterrupt = prvPortGetIPSR(); diff --git a/portable/RVDS/ARM_CM4_MPU/portmacro.h b/portable/RVDS/ARM_CM4_MPU/portmacro.h index ae8f6b73c..cb9c99c77 100644 --- a/portable/RVDS/ARM_CM4_MPU/portmacro.h +++ b/portable/RVDS/ARM_CM4_MPU/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ @@ -137,7 +138,7 @@ #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) - #define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT + #define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) /*-----------------------------------------------------------*/ @@ -172,7 +173,7 @@ /*-----------------------------------------------------------*/ - #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __clz( ( uxReadyPriorities ) ) ) + #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __clz( ( uxReadyPriorities ) ) ) #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ /*-----------------------------------------------------------*/ @@ -279,7 +280,7 @@ static portFORCE_INLINE BaseType_t xPortIsInsideInterrupt( void ) { - uint32_t ulCurrentInterrupt; + uint32_t ulCurrentInterrupt; BaseType_t xReturn; /* Obtain the number of the currently executing interrupt. */ diff --git a/portable/RVDS/ARM_CM7/r0p1/port.c b/portable/RVDS/ARM_CM7/r0p1/port.c index 28d6f1409..02447fe42 100644 --- a/portable/RVDS/ARM_CM7/r0p1/port.c +++ b/portable/RVDS/ARM_CM7/r0p1/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -141,13 +142,13 @@ static void prvTaskExitError( void ); /* Each task maintains its own interrupt status in the critical nesting * variable. */ -static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; +static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; /* * The number of SysTick increments that make up one tick period. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t ulTimerCountsForOneTick = 0; + static uint32_t ulTimerCountsForOneTick = 0; #endif /* configUSE_TICKLESS_IDLE */ /* @@ -155,7 +156,7 @@ static UBaseType_t uxCriticalNesting = 0xaaaaa * 24 bit resolution of the SysTick timer. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t xMaximumPossibleSuppressedTicks = 0; + static uint32_t xMaximumPossibleSuppressedTicks = 0; #endif /* configUSE_TICKLESS_IDLE */ /* @@ -163,7 +164,7 @@ static UBaseType_t uxCriticalNesting = 0xaaaaa * power functionality only. */ #if ( configUSE_TICKLESS_IDLE == 1 ) - static uint32_t ulStoppedTimerCompensation = 0; + static uint32_t ulStoppedTimerCompensation = 0; #endif /* configUSE_TICKLESS_IDLE */ /* @@ -172,8 +173,8 @@ static UBaseType_t uxCriticalNesting = 0xaaaaa * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY. */ #if ( configASSERT_DEFINED == 1 ) - static uint8_t ucMaxSysCallPriority = 0; - static uint32_t ulMaxPRIGROUPValue = 0; + static uint8_t ucMaxSysCallPriority = 0; + static uint32_t ulMaxPRIGROUPValue = 0; static const volatile uint8_t * const pcInterruptPriorityRegisters = ( uint8_t * ) portNVIC_IP_REGISTERS_OFFSET_16; #endif /* configASSERT_DEFINED */ @@ -303,9 +304,9 @@ BaseType_t xPortStartScheduler( void ) { #if ( configASSERT_DEFINED == 1 ) { - volatile uint32_t ulOriginalPriority; + volatile uint32_t ulOriginalPriority; volatile uint8_t * const pucFirstUserPriorityRegister = ( uint8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER ); - volatile uint8_t ucMaxPriorityValue; + volatile uint8_t ucMaxPriorityValue; /* Determine the maximum priority from which ISR safe FreeRTOS API * functions can be called. ISR safe functions are those that end in @@ -313,25 +314,25 @@ BaseType_t xPortStartScheduler( void ) * ensure interrupt entry is as fast and simple as possible. * * Save the interrupt priority value that is about to be clobbered. */ - ulOriginalPriority = *pucFirstUserPriorityRegister; + ulOriginalPriority = *pucFirstUserPriorityRegister; /* Determine the number of priority bits available. First write to all * possible bits. */ *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE; /* Read the value back to see how many bits stuck. */ - ucMaxPriorityValue = *pucFirstUserPriorityRegister; + ucMaxPriorityValue = *pucFirstUserPriorityRegister; /* The kernel interrupt priority should be set to the lowest * priority. */ configASSERT( ucMaxPriorityValue == ( configKERNEL_INTERRUPT_PRIORITY & ucMaxPriorityValue ) ); /* Use the same mask on the maximum system call priority. */ - ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; + ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; /* Calculate the maximum acceptable priority group value for the number * of bits read back. */ - ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS; + ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS; while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE ) { @@ -359,8 +360,8 @@ BaseType_t xPortStartScheduler( void ) /* Shift the priority group value back to its position within the AIRCR * register. */ - ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; - ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; + ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; + ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; /* Restore the clobbered interrupt priority register to its original * value. */ @@ -378,13 +379,13 @@ BaseType_t xPortStartScheduler( void ) vPortSetupTimerInterrupt(); /* Initialise the critical nesting count ready for the first task. */ - uxCriticalNesting = 0; + uxCriticalNesting = 0; /* Ensure the VFP is enabled - it should be anyway. */ prvEnableVFP(); /* Lazy save always. */ - *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS; + *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS; /* Start the first task. */ prvStartFirstTask(); @@ -439,7 +440,7 @@ __asm void xPortPendSVHandler( void ) PRESERVE8 - mrs r0, psp + mrs r0, psp isb /* Get the location of the current TCB. */ ldr r3, = pxCurrentTCB @@ -494,7 +495,7 @@ __asm void xPortPendSVHandler( void ) } msr psp, r0 - isb + isb #ifdef WORKAROUND_PMU_CM001 /* XMC4000 specific errata */ #if WORKAROUND_PMU_CM001 == 1 push { @@ -537,7 +538,7 @@ void xPortSysTickHandler( void ) __weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ) { - uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; + uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; TickType_t xModifiableIdleTime; /* Make sure the SysTick reload value does not overflow the counter. */ @@ -555,7 +556,7 @@ void xPortSysTickHandler( void ) /* Calculate the reload value required to wait xExpectedIdleTime * tick periods. -1 is used because this code will execute part way * through one of the tick periods. */ - ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); + ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); if( ulReloadValue > ulStoppedTimerCompensation ) { @@ -574,14 +575,14 @@ void xPortSysTickHandler( void ) { /* Restart from whatever is left in the count register to complete * this tick period. */ - portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; + portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; /* Restart SysTick. */ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Reset the reload register to the value required for normal tick * periods. */ - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Re-enable interrupts - see comments above __disable_irq() call * above. */ @@ -590,21 +591,21 @@ void xPortSysTickHandler( void ) else { /* Set the new reload value. */ - portNVIC_SYSTICK_LOAD_REG = ulReloadValue; + portNVIC_SYSTICK_LOAD_REG = ulReloadValue; /* Clear the SysTick count flag and set the count value back to * zero. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Restart SysTick. */ - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can * set its parameter to 0 to indicate that its implementation contains * its own wait for interrupt or wait for event instruction, and so wfi * should not be executed again. However, the original expected idle * time variable must remain unmodified, so a copy is taken. */ - xModifiableIdleTime = xExpectedIdleTime; + xModifiableIdleTime = xExpectedIdleTime; configPRE_SLEEP_PROCESSING( xModifiableIdleTime ); if( xModifiableIdleTime > 0 ) @@ -638,7 +639,7 @@ void xPortSysTickHandler( void ) * be, but using the tickless mode will inevitably result in some tiny * drift of the time maintained by the kernel with respect to calendar * time*/ - portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); /* Determine if the SysTick clock has already counted to zero and * been set back to the current reload value (the reload back being @@ -653,7 +654,7 @@ void xPortSysTickHandler( void ) * reloaded with ulReloadValue. Reset the * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick * period. */ - ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); + ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); /* Don't allow a tiny value, or values that have somehow * underflowed because the post sleep hook did something @@ -668,7 +669,7 @@ void xPortSysTickHandler( void ) /* As the pending tick will be processed as soon as this * function exits, the tick value maintained by the tick is stepped * forward by one less than the time spent waiting. */ - ulCompleteTickPeriods = xExpectedIdleTime - 1UL; + ulCompleteTickPeriods = xExpectedIdleTime - 1UL; } else { @@ -680,20 +681,20 @@ void xPortSysTickHandler( void ) /* How many complete tick periods passed while the processor * was waiting? */ - ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; + ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; /* The reload value is set to whatever fraction of a single tick * period remains. */ - portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; + portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; } /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard * value. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; vTaskStepTick( ulCompleteTickPeriods ); - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; /* Exit with interrupts enabled. */ __enable_irq(); @@ -715,19 +716,19 @@ void xPortSysTickHandler( void ) /* Calculate the constants required to configure the tick interrupt. */ #if ( configUSE_TICKLESS_IDLE == 1 ) { - ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); + ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick; - ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); + ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); } #endif /* configUSE_TICKLESS_IDLE */ /* Stop and clear the SysTick. */ - portNVIC_SYSTICK_CTRL_REG = 0UL; + portNVIC_SYSTICK_CTRL_REG = 0UL; portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; /* Configure SysTick to interrupt at the requested rate. */ - portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; - portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT ); + portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT ); } #endif /* configOVERRIDE_DEFAULT_TICK_CONFIGURATION */ @@ -747,7 +748,7 @@ __asm uint32_t vPortGetIPSR( void ) void vPortValidateInterruptPriority( void ) { uint32_t ulCurrentInterrupt; - uint8_t ucCurrentPriority; + uint8_t ucCurrentPriority; /* Obtain the number of the currently executing interrupt. */ ulCurrentInterrupt = vPortGetIPSR(); diff --git a/portable/RVDS/ARM_CM7/r0p1/portmacro.h b/portable/RVDS/ARM_CM7/r0p1/portmacro.h index a3eb46eb4..b4d8d1bbb 100644 --- a/portable/RVDS/ARM_CM7/r0p1/portmacro.h +++ b/portable/RVDS/ARM_CM7/r0p1/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ @@ -135,7 +136,7 @@ /*-----------------------------------------------------------*/ - #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __clz( ( uxReadyPriorities ) ) ) + #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __clz( ( uxReadyPriorities ) ) ) #endif /* taskRECORD_READY_PRIORITY */ /*-----------------------------------------------------------*/ @@ -225,7 +226,7 @@ static portFORCE_INLINE BaseType_t xPortIsInsideInterrupt( void ) { - uint32_t ulCurrentInterrupt; + uint32_t ulCurrentInterrupt; BaseType_t xReturn; /* Obtain the number of the currently executing interrupt. */ diff --git a/portable/Renesas/RX100/port.c b/portable/Renesas/RX100/port.c index 7ca0c881c..c3ff5dfbc 100644 --- a/portable/Renesas/RX100/port.c +++ b/portable/Renesas/RX100/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -73,8 +74,8 @@ /* The following lines are to ensure vSoftwareInterruptEntry can be referenced, * and therefore installed in the vector table, when the FreeRTOS code is built * as a library. */ -extern BaseType_t vSoftwareInterruptEntry; -const BaseType_t * p_vSoftwareInterruptEntry = &vSoftwareInterruptEntry; +extern BaseType_t vSoftwareInterruptEntry; +const BaseType_t * p_vSoftwareInterruptEntry = &vSoftwareInterruptEntry; /*-----------------------------------------------------------*/ @@ -131,7 +132,7 @@ extern void vTaskSwitchContext( void ); /*-----------------------------------------------------------*/ /* Calculate how many clock increments make up a single tick period. */ -static const uint32_t ulMatchValueForOneTick = ( ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) / configTICK_RATE_HZ ); +static const uint32_t ulMatchValueForOneTick = ( ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) / configTICK_RATE_HZ ); #if configUSE_TICKLESS_IDLE == 1 @@ -144,7 +145,7 @@ static const uint32_t ulMatchValueForOneTick = ( ( configPERIPHER /* Flag set from the tick interrupt to allow the sleep processing to know if * sleep mode was exited because of a tick interrupt, or an interrupt * generated by something else. */ - static volatile uint32_t ulTickFlag = pdFALSE; + static volatile uint32_t ulTickFlag = pdFALSE; /* The CMT counter is stopped temporarily each time it is re-programmed. * The following constant offsets the CMT counter match value by the number of @@ -152,7 +153,7 @@ static const uint32_t ulMatchValueForOneTick = ( ( configPERIPHER * compensate for the lost time. The large difference between the divided CMT * clock and the CPU clock means it is likely ulStoppedTimerCompensation will * equal zero - and be optimised away. */ - static const uint32_t ulStoppedTimerCompensation = 100UL / ( configCPU_CLOCK_HZ / ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) ); + static const uint32_t ulStoppedTimerCompensation = 100UL / ( configCPU_CLOCK_HZ / ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) ); #endif /* if configUSE_TICKLESS_IDLE == 1 */ @@ -246,7 +247,7 @@ BaseType_t xPortStartScheduler( void ) _IEN( _ICU_SWINT ) = 1; /* Ensure the software interrupt is clear. */ - _IR( _ICU_SWINT ) = 0; + _IR( _ICU_SWINT ) = 0; /* Ensure the software interrupt is set to the kernel priority. */ _IPR( _ICU_SWINT ) = configKERNEL_INTERRUPT_PRIORITY; @@ -427,19 +428,19 @@ void vPortEndScheduler( void ) static void prvSetupTimerInterrupt( void ) { /* Unlock. */ - SYSTEM.PRCR.WORD = portUNLOCK_KEY; + SYSTEM.PRCR.WORD = portUNLOCK_KEY; /* Enable CMT0. */ - MSTP( CMT0 ) = 0; + MSTP( CMT0 ) = 0; /* Lock again. */ - SYSTEM.PRCR.WORD = portLOCK_KEY; + SYSTEM.PRCR.WORD = portLOCK_KEY; /* Interrupt on compare match. */ - CMT0.CMCR.BIT.CMIE = 1; + CMT0.CMCR.BIT.CMIE = 1; /* Set the compare match value. */ - CMT0.CMCOR = ( uint16_t ) ulMatchValueForOneTick; + CMT0.CMCOR = ( uint16_t ) ulMatchValueForOneTick; /* Divide the PCLK. */ #if portCLOCK_DIVISOR == 512 @@ -466,10 +467,10 @@ static void prvSetupTimerInterrupt( void ) /* Enable the interrupt... */ - _IEN( _CMT0_CMI0 ) = 1; + _IEN( _CMT0_CMI0 ) = 1; /* ...and set its priority to the application defined kernel priority. */ - _IPR( _CMT0_CMI0 ) = configKERNEL_INTERRUPT_PRIORITY; + _IPR( _CMT0_CMI0 ) = configKERNEL_INTERRUPT_PRIORITY; /* Start the timer. */ CMT.CMSTR0.BIT.STR0 = 1; @@ -502,7 +503,7 @@ static void prvSetupTimerInterrupt( void ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ) { - uint32_t ulMatchValue, ulCompleteTickPeriods, ulCurrentCount; + uint32_t ulMatchValue, ulCompleteTickPeriods, ulCurrentCount; eSleepModeStatus eSleepAction; /* THIS FUNCTION IS CALLED WITH THE SCHEDULER SUSPENDED. */ @@ -515,7 +516,7 @@ static void prvSetupTimerInterrupt( void ) /* Calculate the reload value required to wait xExpectedIdleTime tick * periods. */ - ulMatchValue = ulMatchValueForOneTick * xExpectedIdleTime; + ulMatchValue = ulMatchValueForOneTick * xExpectedIdleTime; if( ulMatchValue > ulStoppedTimerCompensation ) { @@ -542,12 +543,12 @@ static void prvSetupTimerInterrupt( void ) /* The tick flag is set to false before sleeping. If it is true when * sleep mode is exited then sleep mode was probably exited because the * tick was suppressed for the entire xExpectedIdleTime period. */ - ulTickFlag = pdFALSE; + ulTickFlag = pdFALSE; /* If a context switch is pending then abandon the low power entry as * the context switch might have been pended by an external interrupt that * requires processing. */ - eSleepAction = eTaskConfirmSleepModeStatus(); + eSleepAction = eTaskConfirmSleepModeStatus(); if( eSleepAction == eAbortSleep ) { @@ -558,42 +559,42 @@ static void prvSetupTimerInterrupt( void ) else if( eSleepAction == eNoTasksWaitingTimeout ) { /* Protection off. */ - SYSTEM.PRCR.WORD = portUNLOCK_KEY; + SYSTEM.PRCR.WORD = portUNLOCK_KEY; /* Ready for software standby with all clocks stopped. */ SYSTEM.SBYCR.BIT.SSBY = 1; /* Protection on. */ - SYSTEM.PRCR.WORD = portLOCK_KEY; + SYSTEM.PRCR.WORD = portLOCK_KEY; /* Sleep until something happens. Calling prvSleep() will * automatically reset the i bit in the PSW. */ prvSleep( xExpectedIdleTime ); /* Restart the CMT. */ - CMT.CMSTR0.BIT.STR0 = 1; + CMT.CMSTR0.BIT.STR0 = 1; } else { /* Protection off. */ - SYSTEM.PRCR.WORD = portUNLOCK_KEY; + SYSTEM.PRCR.WORD = portUNLOCK_KEY; /* Ready for deep sleep mode. */ - SYSTEM.MSTPCRC.BIT.DSLPE = 1; + SYSTEM.MSTPCRC.BIT.DSLPE = 1; SYSTEM.MSTPCRA.BIT.MSTPA28 = 1; - SYSTEM.SBYCR.BIT.SSBY = 0; + SYSTEM.SBYCR.BIT.SSBY = 0; /* Protection on. */ - SYSTEM.PRCR.WORD = portLOCK_KEY; + SYSTEM.PRCR.WORD = portLOCK_KEY; /* Adjust the match value to take into account that the current * time slice is already partially complete. */ - ulMatchValue -= ( uint32_t ) CMT0.CMCNT; - CMT0.CMCOR = ( uint16_t ) ulMatchValue; + ulMatchValue -= ( uint32_t ) CMT0.CMCNT; + CMT0.CMCOR = ( uint16_t ) ulMatchValue; /* Restart the CMT to count up to the new match value. */ - CMT0.CMCNT = 0; - CMT.CMSTR0.BIT.STR0 = 1; + CMT0.CMCNT = 0; + CMT.CMSTR0.BIT.STR0 = 1; /* Sleep until something happens. Calling prvSleep() will * automatically reset the i bit in the PSW. */ @@ -603,14 +604,14 @@ static void prvSetupTimerInterrupt( void ) * accounted for as best it can be, but using the tickless mode will * inevitably result in some tiny drift of the time maintained by the * kernel with respect to calendar time. */ - CMT.CMSTR0.BIT.STR0 = 0; + CMT.CMSTR0.BIT.STR0 = 0; while( CMT.CMSTR0.BIT.STR0 == 1 ) { /* Nothing to do here. */ } - ulCurrentCount = ( uint32_t ) CMT0.CMCNT; + ulCurrentCount = ( uint32_t ) CMT0.CMCNT; if( ulTickFlag != pdFALSE ) { @@ -619,8 +620,8 @@ static void prvSetupTimerInterrupt( void ) * tick processing will not occur until after this function has * exited. Reset the match value with whatever remains of this * tick period. */ - ulMatchValue = ulMatchValueForOneTick - ulCurrentCount; - CMT0.CMCOR = ( uint16_t ) ulMatchValue; + ulMatchValue = ulMatchValueForOneTick - ulCurrentCount; + CMT0.CMCOR = ( uint16_t ) ulMatchValue; /* The tick interrupt handler will already have pended the tick * processing in the kernel. As the pending tick will be @@ -639,15 +640,15 @@ static void prvSetupTimerInterrupt( void ) /* The match value is set to whatever fraction of a single tick * period remains. */ - ulMatchValue = ulCurrentCount - ( ulCompleteTickPeriods * ulMatchValueForOneTick ); - CMT0.CMCOR = ( uint16_t ) ulMatchValue; + ulMatchValue = ulCurrentCount - ( ulCompleteTickPeriods * ulMatchValueForOneTick ); + CMT0.CMCOR = ( uint16_t ) ulMatchValue; } /* Restart the CMT so it runs up to the match value. The match value * will get set to the value required to generate exactly one tick period * the next time the CMT interrupt executes. */ - CMT0.CMCNT = 0; - CMT.CMSTR0.BIT.STR0 = 1; + CMT0.CMCNT = 0; + CMT.CMSTR0.BIT.STR0 = 1; /* Wind the tick forward by the number of tick periods that the CPU * remained in a low power state. */ diff --git a/portable/Renesas/RX100/portmacro.h b/portable/Renesas/RX100/portmacro.h index a56762db5..b9c029ae0 100644 --- a/portable/Renesas/RX100/portmacro.h +++ b/portable/Renesas/RX100/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ diff --git a/portable/Renesas/RX200/port.c b/portable/Renesas/RX200/port.c index 4b08a283f..ee4e5b6a2 100644 --- a/portable/Renesas/RX200/port.c +++ b/portable/Renesas/RX200/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -49,7 +50,7 @@ /* The following lines are to ensure vSoftwareInterruptEntry can be referenced, * and therefore installed in the vector table, when the FreeRTOS code is built * as a library. */ -extern BaseType_t vSoftwareInterruptEntry; +extern BaseType_t vSoftwareInterruptEntry; const BaseType_t * p_vSoftwareInterruptEntry = &vSoftwareInterruptEntry; /*-----------------------------------------------------------*/ @@ -170,7 +171,7 @@ BaseType_t xPortStartScheduler( void ) _IEN( _ICU_SWINT ) = 1; /* Ensure the software interrupt is clear. */ - _IR( _ICU_SWINT ) = 0; + _IR( _ICU_SWINT ) = 0; /* Ensure the software interrupt is set to the kernel priority. */ _IPR( _ICU_SWINT ) = configKERNEL_INTERRUPT_PRIORITY; diff --git a/portable/Renesas/RX200/portmacro.h b/portable/Renesas/RX200/portmacro.h index a1c67107b..c1a58b53f 100644 --- a/portable/Renesas/RX200/portmacro.h +++ b/portable/Renesas/RX200/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ diff --git a/portable/Renesas/RX600/port.c b/portable/Renesas/RX600/port.c index b2ef81d77..2d9db4367 100644 --- a/portable/Renesas/RX600/port.c +++ b/portable/Renesas/RX600/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -50,7 +51,7 @@ /* The following lines are to ensure vSoftwareInterruptEntry can be referenced, * and therefore installed in the vector table, when the FreeRTOS code is built * as a library. */ -extern BaseType_t vSoftwareInterruptEntry; +extern BaseType_t vSoftwareInterruptEntry; const BaseType_t * p_vSoftwareInterruptEntry = &vSoftwareInterruptEntry; /*-----------------------------------------------------------*/ @@ -169,7 +170,7 @@ BaseType_t xPortStartScheduler( void ) _IEN( _ICU_SWINT ) = 1; /* Ensure the software interrupt is clear. */ - _IR( _ICU_SWINT ) = 0; + _IR( _ICU_SWINT ) = 0; /* Ensure the software interrupt is set to the kernel priority. */ _IPR( _ICU_SWINT ) = configKERNEL_INTERRUPT_PRIORITY; diff --git a/portable/Renesas/RX600/portmacro.h b/portable/Renesas/RX600/portmacro.h index 3efa91981..94575e6a7 100644 --- a/portable/Renesas/RX600/portmacro.h +++ b/portable/Renesas/RX600/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ diff --git a/portable/Renesas/RX600v2/port.c b/portable/Renesas/RX600v2/port.c index e64d3d327..eee082c83 100644 --- a/portable/Renesas/RX600v2/port.c +++ b/portable/Renesas/RX600v2/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -54,7 +55,7 @@ /* The following lines are to ensure vSoftwareInterruptEntry can be referenced, * and therefore installed in the vector table, when the FreeRTOS code is built * as a library. */ -extern BaseType_t vSoftwareInterruptEntry; +extern BaseType_t vSoftwareInterruptEntry; const BaseType_t * p_vSoftwareInterruptEntry = &vSoftwareInterruptEntry; /*-----------------------------------------------------------*/ @@ -181,7 +182,7 @@ BaseType_t xPortStartScheduler( void ) _IEN( _ICU_SWINT ) = 1; /* Ensure the software interrupt is clear. */ - _IR( _ICU_SWINT ) = 0; + _IR( _ICU_SWINT ) = 0; /* Ensure the software interrupt is set to the kernel priority. */ _IPR( _ICU_SWINT ) = configKERNEL_INTERRUPT_PRIORITY; diff --git a/portable/Renesas/RX600v2/portmacro.h b/portable/Renesas/RX600v2/portmacro.h index a3478f29d..1f875738c 100644 --- a/portable/Renesas/RX600v2/portmacro.h +++ b/portable/Renesas/RX600v2/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ diff --git a/portable/Renesas/SH2A_FPU/port.c b/portable/Renesas/SH2A_FPU/port.c index 08a9f1329..01a992ab7 100644 --- a/portable/Renesas/SH2A_FPU/port.c +++ b/portable/Renesas/SH2A_FPU/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -228,8 +229,8 @@ void vPortYield( void ) BaseType_t xPortUsesFloatingPoint( TaskHandle_t xTask ) { - uint32_t * pulFlopBuffer; - BaseType_t xReturn; + uint32_t * pulFlopBuffer; + BaseType_t xReturn; extern void * volatile pxCurrentTCB; /* This function tells the kernel that the task referenced by xTask is @@ -258,7 +259,7 @@ BaseType_t xPortUsesFloatingPoint( TaskHandle_t xTask ) /* Use the task tag to point to the flop buffer. Pass pointer to just * above the buffer because the flop save routine uses a pre-decrement. */ vTaskSetApplicationTaskTag( xTask, ( void * ) ( pulFlopBuffer + portFLOP_REGISTERS_TO_STORE ) ); - xReturn = pdPASS; + xReturn = pdPASS; } else { diff --git a/portable/Renesas/SH2A_FPU/portmacro.h b/portable/Renesas/SH2A_FPU/portmacro.h index ed50724a0..c88b06661 100644 --- a/portable/Renesas/SH2A_FPU/portmacro.h +++ b/portable/Renesas/SH2A_FPU/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ diff --git a/portable/Rowley/MSP430F449/port.c b/portable/Rowley/MSP430F449/port.c index 01f106712..241dad997 100644 --- a/portable/Rowley/MSP430F449/port.c +++ b/portable/Rowley/MSP430F449/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Scheduler includes. */ @@ -147,24 +148,24 @@ void vPortEndScheduler( void ) void prvSetupTimerInterrupt( void ) { /* Ensure the timer is stopped. */ - TACTL = 0; + TACTL = 0; /* Run the timer of the ACLK. */ - TACTL = TASSEL_1; + TACTL = TASSEL_1; /* Clear everything to start with. */ - TACTL |= TACLR; + TACTL |= TACLR; /* Set the compare match value according to the tick rate we want. */ - TACCR0 = portACLK_FREQUENCY_HZ / configTICK_RATE_HZ; + TACCR0 = portACLK_FREQUENCY_HZ / configTICK_RATE_HZ; /* Enable the interrupts. */ TACCTL0 = CCIE; /* Start up clean. */ - TACTL |= TACLR; + TACTL |= TACLR; /* Up mode. */ - TACTL |= MC_1; + TACTL |= MC_1; } /*-----------------------------------------------------------*/ diff --git a/portable/Rowley/MSP430F449/portasm.h b/portable/Rowley/MSP430F449/portasm.h index 0bff62745..21443bd7d 100644 --- a/portable/Rowley/MSP430F449/portasm.h +++ b/portable/Rowley/MSP430F449/portasm.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORT_ASM_H diff --git a/portable/Rowley/MSP430F449/portmacro.h b/portable/Rowley/MSP430F449/portmacro.h index a17659f93..9bd65aa68 100644 --- a/portable/Rowley/MSP430F449/portmacro.h +++ b/portable/Rowley/MSP430F449/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/SDCC/Cygnal/port.c b/portable/SDCC/Cygnal/port.c index cbdb98489..786540b62 100644 --- a/portable/SDCC/Cygnal/port.c +++ b/portable/SDCC/Cygnal/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -52,7 +53,7 @@ /* Used during a context switch to store the size of the stack being copied * to or from XRAM. */ -data static uint8_t ucStackBytes; +data static uint8_t ucStackBytes; /* Used during a context switch to point to the next byte in XRAM from/to which * a RAM byte is to be copied. */ @@ -60,7 +61,7 @@ xdata static StackType_t * data pxXRAMStack; /* Used during a context switch to point to the next byte in RAM from/to which * an XRAM byte is to be copied. */ -data static StackType_t * data pxRAMStack; +data static StackType_t * data pxRAMStack; /* We require the address of the pxCurrentTCB variable, but don't want to know * any details of its type. */ @@ -84,29 +85,29 @@ static void prvSetupTimerInterrupt( void ); { \ /* pxCurrentTCB points to a TCB which itself points to the location into \ * which the first stack byte should be copied. Set pxXRAMStack to point \ - * to the location into which the first stack byte is to be copied. */ \ - pxXRAMStack = ( xdata StackType_t * ) *( ( xdata StackType_t ** ) pxCurrentTCB ); \ - \ - /* Set pxRAMStack to point to the first byte to be coped from the stack. */ \ - pxRAMStack = ( data StackType_t * data ) configSTACK_START; \ - \ + * to the location into which the first stack byte is to be copied. */ \ + pxXRAMStack = ( xdata StackType_t * ) *( ( xdata StackType_t ** ) pxCurrentTCB ); \ + \ + /* Set pxRAMStack to point to the first byte to be coped from the stack. */ \ + pxRAMStack = ( data StackType_t * data ) configSTACK_START; \ + \ /* Calculate the size of the stack we are about to copy from the current \ - * stack pointer value. */ \ - ucStackBytes = SP - ( configSTACK_START - 1 ); \ - \ + * stack pointer value. */ \ + ucStackBytes = SP - ( configSTACK_START - 1 ); \ + \ /* Before starting to copy the stack, store the calculated stack size so \ - * the stack can be restored when the task is resumed. */ \ - * pxXRAMStack = ucStackBytes; \ - \ + * the stack can be restored when the task is resumed. */\ + * pxXRAMStack = ucStackBytes; \ + \ /* Copy each stack byte in turn. pxXRAMStack is incremented first as we \ - * have already stored the stack size into XRAM. */ \ - while( ucStackBytes ) \ - { \ - pxXRAMStack ++; \ - * pxXRAMStack = * pxRAMStack; \ - pxRAMStack ++; \ - ucStackBytes --; \ - } \ + * have already stored the stack size into XRAM. */\ + while( ucStackBytes ) \ + { \ + pxXRAMStack ++; \ + * pxXRAMStack = * pxRAMStack; \ + pxRAMStack ++; \ + ucStackBytes --; \ + } \ } /*-----------------------------------------------------------*/ @@ -117,10 +118,10 @@ static void prvSetupTimerInterrupt( void ); #define portCOPY_XRAM_TO_STACK() \ { \ /* Setup the pointers as per portCOPY_STACK_TO_XRAM(), but this time to \ - * copy the data back out of XRAM and into the stack. */ \ - pxXRAMStack = ( xdata StackType_t * ) *( ( xdata StackType_t ** ) pxCurrentTCB ); \ - pxRAMStack = ( data StackType_t * data )( configSTACK_START - 1 ); \ - \ + * copy the data back out of XRAM and into the stack. */ \ + pxXRAMStack = ( xdata StackType_t * ) *( ( xdata StackType_t ** ) pxCurrentTCB ); \ + pxRAMStack = ( data StackType_t * data )( configSTACK_START - 1 ); \ + \ /* The first value stored in XRAM was the size of the stack - i.e. the \ * number of bytes we need to copy back. */ \ ucStackBytes = pxXRAMStack[ 0 ]; \ @@ -135,7 +136,7 @@ static void prvSetupTimerInterrupt( void ); } while( ucStackBytes ); \ \ /* Restore the stack pointer ready to use the restored stack. */ \ - SP = ( uint8_t ) pxRAMStack; \ + SP = ( uint8_t ) pxRAMStack; \ } /*-----------------------------------------------------------*/ @@ -194,18 +195,18 @@ static void prvSetupTimerInterrupt( void ); pop DPL \ /* The next byte of the stack is the IE register. Only the global \ * enable bit forms part of the task context. Pop off the IE then set \ - * the global enable bit to match that of the stored IE register. */ \ - pop ACC \ - JB ACC .7, 00 98$ \ - CLR IE .7 \ - LJMP 00 99$ \ - 00 98$ : \ - SETB IE .7 \ - 00 99$ : \ - /* Finally pop off the ACC, which was the first register saved. */ \ - pop ACC \ - reti \ - _endasm; \ + * the global enable bit to match that of the stored IE register. */\ + pop ACC \ + JB ACC .7, 00 98$ \ + CLR IE .7 \ + LJMP 00 99$ \ + 00 98$ : \ + SETB IE .7 \ + 00 99$ : \ + /* Finally pop off the ACC, which was the first register saved. */ \ + pop ACC \ + reti \ + _endasm; \ } /*-----------------------------------------------------------*/ @@ -216,11 +217,11 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, TaskFunction_t pxCode, void * pvParameters ) { - uint32_t ulAddress; + uint32_t ulAddress; StackType_t * pxStartOfStack; /* Leave space to write the size of the stack as the first byte. */ - pxStartOfStack = pxTopOfStack; + pxStartOfStack = pxTopOfStack; pxTopOfStack++; /* Place a few bytes of known values on the bottom of the stack. @@ -237,53 +238,53 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, * ISR. * * The return address that would have been pushed by the MCU. */ - ulAddress = ( uint32_t ) pxCode; - *pxTopOfStack = ( StackType_t ) ulAddress; - ulAddress >>= 8; + ulAddress = ( uint32_t ) pxCode; + *pxTopOfStack = ( StackType_t ) ulAddress; + ulAddress >>= 8; pxTopOfStack++; - *pxTopOfStack = ( StackType_t ) ( ulAddress ); + *pxTopOfStack = ( StackType_t ) ( ulAddress ); pxTopOfStack++; /* Next all the registers will have been pushed by portSAVE_CONTEXT(). */ - *pxTopOfStack = 0xaa; /* acc */ + *pxTopOfStack = 0xaa; /* acc */ pxTopOfStack++; /* We want tasks to start with interrupts enabled. */ - *pxTopOfStack = portGLOBAL_INTERRUPT_BIT; + *pxTopOfStack = portGLOBAL_INTERRUPT_BIT; pxTopOfStack++; /* The function parameters will be passed in the DPTR and B register as * a three byte generic pointer is used. */ - ulAddress = ( uint32_t ) pvParameters; - *pxTopOfStack = ( StackType_t ) ulAddress; /* DPL */ - ulAddress >>= 8; + ulAddress = ( uint32_t ) pvParameters; + *pxTopOfStack = ( StackType_t ) ulAddress; /* DPL */ + ulAddress >>= 8; *pxTopOfStack++; - *pxTopOfStack = ( StackType_t ) ulAddress; /* DPH */ - ulAddress >>= 8; + *pxTopOfStack = ( StackType_t ) ulAddress; /* DPH */ + ulAddress >>= 8; pxTopOfStack++; - *pxTopOfStack = ( StackType_t ) ulAddress; /* b */ + *pxTopOfStack = ( StackType_t ) ulAddress; /* b */ pxTopOfStack++; /* The remaining registers are straight forward. */ - *pxTopOfStack = 0x02; /* R2 */ + *pxTopOfStack = 0x02; /* R2 */ pxTopOfStack++; - *pxTopOfStack = 0x03; /* R3 */ + *pxTopOfStack = 0x03; /* R3 */ pxTopOfStack++; - *pxTopOfStack = 0x04; /* R4 */ + *pxTopOfStack = 0x04; /* R4 */ pxTopOfStack++; - *pxTopOfStack = 0x05; /* R5 */ + *pxTopOfStack = 0x05; /* R5 */ pxTopOfStack++; - *pxTopOfStack = 0x06; /* R6 */ + *pxTopOfStack = 0x06; /* R6 */ pxTopOfStack++; - *pxTopOfStack = 0x07; /* R7 */ + *pxTopOfStack = 0x07; /* R7 */ pxTopOfStack++; - *pxTopOfStack = 0x00; /* R0 */ + *pxTopOfStack = 0x00; /* R0 */ pxTopOfStack++; - *pxTopOfStack = 0x01; /* R1 */ + *pxTopOfStack = 0x01; /* R1 */ pxTopOfStack++; - *pxTopOfStack = 0x00; /* PSW */ + *pxTopOfStack = 0x00; /* PSW */ pxTopOfStack++; - *pxTopOfStack = 0xbb; /* BP */ + *pxTopOfStack = 0xbb; /* BP */ /* Dont increment the stack size here as we don't want to include * the stack size byte as part of the stack size count. @@ -369,7 +370,7 @@ void vPortYield( void ) _naked portCOPY_XRAM_TO_STACK(); portRESTORE_CONTEXT(); } -#else /* if configUSE_PREEMPTION == 1 */ +#else /* if configUSE_PREEMPTION == 1 */ void vTimer2ISR( void ) interrupt 5 { /* When using the cooperative scheduler the timer 2 ISR is only @@ -383,40 +384,40 @@ void vPortYield( void ) _naked static void prvSetupTimerInterrupt( void ) { - uint8_t ucOriginalSFRPage; + uint8_t ucOriginalSFRPage; /* Constants calculated to give the required timer capture values. */ - const uint32_t ulTicksPerSecond = configCPU_CLOCK_HZ / portCLOCK_DIVISOR; - const uint32_t ulCaptureTime = ulTicksPerSecond / configTICK_RATE_HZ; - const uint32_t ulCaptureValue = portMAX_TIMER_VALUE - ulCaptureTime; - const uint8_t ucLowCaptureByte = ( uint8_t ) ( ulCaptureValue & ( uint32_t ) 0xff ); - const uint8_t ucHighCaptureByte = ( uint8_t ) ( ulCaptureValue >> ( uint32_t ) 8 ); + const uint32_t ulTicksPerSecond = configCPU_CLOCK_HZ / portCLOCK_DIVISOR; + const uint32_t ulCaptureTime = ulTicksPerSecond / configTICK_RATE_HZ; + const uint32_t ulCaptureValue = portMAX_TIMER_VALUE - ulCaptureTime; + const uint8_t ucLowCaptureByte = ( uint8_t ) ( ulCaptureValue & ( uint32_t ) 0xff ); + const uint8_t ucHighCaptureByte = ( uint8_t ) ( ulCaptureValue >> ( uint32_t ) 8 ); /* NOTE: This uses a timer only present on 8052 architecture. */ /* Remember the current SFR page so we can restore it at the end of the * function. */ ucOriginalSFRPage = SFRPAGE; - SFRPAGE = 0; + SFRPAGE = 0; /* TMR2CF can be left in its default state. */ - TMR2CF = ( uint8_t ) 0; + TMR2CF = ( uint8_t ) 0; /* Setup the overflow reload value. */ - RCAP2L = ucLowCaptureByte; - RCAP2H = ucHighCaptureByte; + RCAP2L = ucLowCaptureByte; + RCAP2H = ucHighCaptureByte; /* The initial load is performed manually. */ - TMR2L = ucLowCaptureByte; - TMR2H = ucHighCaptureByte; + TMR2L = ucLowCaptureByte; + TMR2H = ucHighCaptureByte; /* Enable the timer 2 interrupts. */ - IE |= portTIMER_2_INTERRUPT_ENABLE; + IE |= portTIMER_2_INTERRUPT_ENABLE; /* Interrupts are disabled when this is called so the timer can be started * here. */ - TMR2CN = portENABLE_TIMER; + TMR2CN = portENABLE_TIMER; /* Restore the original SFR page. */ - SFRPAGE = ucOriginalSFRPage; + SFRPAGE = ucOriginalSFRPage; } diff --git a/portable/SDCC/Cygnal/portmacro.h b/portable/SDCC/Cygnal/portmacro.h index 604b46d93..2fe0a3fbb 100644 --- a/portable/SDCC/Cygnal/portmacro.h +++ b/portable/SDCC/Cygnal/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H @@ -74,16 +75,16 @@ typedef unsigned char UBaseType_t; push ACC \ push IE \ _endasm; \ - EA = 0; + EA = 0; -#define portEXIT_CRITICAL() \ - _asm \ - pop ACC \ - _endasm; \ - ACC &= 0x80; \ - IE |= ACC; \ - _asm \ - pop ACC \ +#define portEXIT_CRITICAL() \ + _asm \ + pop ACC \ + _endasm; \ + ACC &= 0x80; \ + IE |= ACC; \ + _asm \ + pop ACC \ _endasm; #define portDISABLE_INTERRUPTS() EA = 0; diff --git a/portable/Softune/MB91460/__STD_LIB_sbrk.c b/portable/Softune/MB91460/__STD_LIB_sbrk.c index bfe03bcb7..08201ca02 100644 --- a/portable/Softune/MB91460/__STD_LIB_sbrk.c +++ b/portable/Softune/MB91460/__STD_LIB_sbrk.c @@ -1,7 +1,7 @@ #include "FreeRTOSConfig.h" #include -static long brk_siz = 0; +static long brk_siz = 0; /* #if configTOTAL_HEAP_SIZE != 0 */ typedef int _heep_t; #define ROUNDUP( s ) ( ( ( s ) + sizeof( _heep_t ) - 1 ) & ~( sizeof( _heep_t ) - 1 ) ) diff --git a/portable/Softune/MB91460/port.c b/portable/Softune/MB91460/port.c index 32d00345d..23c319524 100644 --- a/portable/Softune/MB91460/port.c +++ b/portable/Softune/MB91460/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #include "FreeRTOS.h" @@ -210,18 +211,18 @@ static void prvSetupTimerInterrupt( void ) /* Setup RLT0 to generate a tick interrupt. */ - TMCSR0_CNTE = 0; /* Count Disable */ - TMCSR0_CSL = 0x2; /* CLKP/32 */ - TMCSR0_MOD = 0; /* Software trigger */ - TMCSR0_RELD = 1; /* Reload */ + TMCSR0_CNTE = 0; /* Count Disable */ + TMCSR0_CSL = 0x2; /* CLKP/32 */ + TMCSR0_MOD = 0; /* Software trigger */ + TMCSR0_RELD = 1; /* Reload */ - TMCSR0_UF = 0; /* Clear underflow flag */ - TMRLR0 = usReloadValue; - TMCSR0_INTE = 1; /* Interrupt Enable */ - TMCSR0_CNTE = 1; /* Count Enable */ - TMCSR0_TRG = 1; /* Trigger */ + TMCSR0_UF = 0; /* Clear underflow flag */ + TMRLR0 = usReloadValue; + TMCSR0_INTE = 1; /* Interrupt Enable */ + TMCSR0_CNTE = 1; /* Count Enable */ + TMCSR0_TRG = 1; /* Trigger */ - PORTEN = 0x3; /* Port Enable */ + PORTEN = 0x3; /* Port Enable */ } /*-----------------------------------------------------------*/ diff --git a/portable/Softune/MB91460/portmacro.h b/portable/Softune/MB91460/portmacro.h index b91829298..3c36f2217 100644 --- a/portable/Softune/MB91460/portmacro.h +++ b/portable/Softune/MB91460/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/Softune/MB96340/__STD_LIB_sbrk.c b/portable/Softune/MB96340/__STD_LIB_sbrk.c index 603e4db70..0906319b2 100644 --- a/portable/Softune/MB96340/__STD_LIB_sbrk.c +++ b/portable/Softune/MB96340/__STD_LIB_sbrk.c @@ -12,7 +12,7 @@ #include "FreeRTOSConfig.h" #include -static long brk_siz = 0; +static long brk_siz = 0; typedef int _heep_t; #define ROUNDUP( s ) ( ( ( s ) + sizeof( _heep_t ) - 1 ) & ~( sizeof( _heep_t ) - 1 ) ) static _heep_t _heep[ ROUNDUP( configTOTAL_HEAP_SIZE ) / sizeof( _heep_t ) ]; diff --git a/portable/Softune/MB96340/port.c b/portable/Softune/MB96340/port.c index d13f16a82..dea30bd61 100644 --- a/portable/Softune/MB96340/port.c +++ b/portable/Softune/MB96340/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #include "FreeRTOS.h" diff --git a/portable/Softune/MB96340/portmacro.h b/portable/Softune/MB96340/portmacro.h index c9a446c76..84f3bece9 100644 --- a/portable/Softune/MB96340/portmacro.h +++ b/portable/Softune/MB96340/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ diff --git a/portable/Tasking/ARM_CM4F/port.c b/portable/Tasking/ARM_CM4F/port.c index 5e591b9fa..011ad778c 100644 --- a/portable/Tasking/ARM_CM4F/port.c +++ b/portable/Tasking/ARM_CM4F/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -68,11 +69,11 @@ /* The priority used by the kernel is assigned to a variable to make access * from inline assembler easier. */ -const uint32_t ulKernelPriority = configKERNEL_INTERRUPT_PRIORITY; +const uint32_t ulKernelPriority = configKERNEL_INTERRUPT_PRIORITY; /* Each task maintains its own interrupt status in the critical nesting * variable. */ -static uint32_t ulCriticalNesting = 0xaaaaaaaaUL; +static uint32_t ulCriticalNesting = 0xaaaaaaaaUL; /* * Setup the timer to generate the tick interrupts. @@ -171,13 +172,13 @@ BaseType_t xPortStartScheduler( void ) prvSetupTimerInterrupt(); /* Initialise the critical nesting count ready for the first task. */ - ulCriticalNesting = 0; + ulCriticalNesting = 0; /* Ensure the VFP is enabled - it should be anyway. */ vPortEnableVFP(); /* Lazy save always. */ - *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS; + *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS; /* Start the first task. */ vPortStartFirstTask(); diff --git a/portable/Tasking/ARM_CM4F/portmacro.h b/portable/Tasking/ARM_CM4F/portmacro.h index 3b6d8e8ed..f15cc2b3f 100644 --- a/portable/Tasking/ARM_CM4F/portmacro.h +++ b/portable/Tasking/ARM_CM4F/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ diff --git a/portable/ThirdParty/CDK/T-HEAD_CK802/port.c b/portable/ThirdParty/CDK/T-HEAD_CK802/port.c index 0b12a8833..6cd0cc995 100644 --- a/portable/ThirdParty/CDK/T-HEAD_CK802/port.c +++ b/portable/ThirdParty/CDK/T-HEAD_CK802/port.c @@ -18,6 +18,7 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * + * 1 tab == 4 spaces! */ /* Kernel includes. */ @@ -32,7 +33,7 @@ portLONG ulCriticalNesting = 0x9999UL; /* Used to record one tack want to swtich task after enter critical area, we need know it * and implement task switch after exit critical area */ -portLONG pendsvflag = 0; +portLONG pendsvflag = 0; StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, TaskFunction_t pxCode, @@ -40,7 +41,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, { StackType_t * stk = NULL; - stk = pxTopOfStack; + stk = pxTopOfStack; *( --stk ) = ( uint32_t ) pxCode; /* Entry Point */ *( --stk ) = ( uint32_t ) 0xE0000140L; /* PSR */ diff --git a/portable/ThirdParty/CDK/T-HEAD_CK802/portmacro.h b/portable/ThirdParty/CDK/T-HEAD_CK802/portmacro.h index 9621c8ded..5840ea1e0 100644 --- a/portable/ThirdParty/CDK/T-HEAD_CK802/portmacro.h +++ b/portable/ThirdParty/CDK/T-HEAD_CK802/portmacro.h @@ -18,6 +18,7 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c b/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c index 0149034bd..6c025caaf 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c +++ b/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /** diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h b/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h index 26c0491e4..4ef9b8e3a 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h +++ b/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef ARC_FREERTOS_EXCEPTIONS_H diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c b/portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c index f838280bd..6495fd610 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c +++ b/portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #if defined( __MW__ ) @@ -81,7 +82,7 @@ static void * init_task_tls( void ) { uint32_t len = ( uint32_t ) ( _etls - _ftls ); - void * tls = NULL; + void * tls = NULL; #if FREERTOS_HEAP_SEL == 3 #warning "FreeRTOS TLS support is not compatible with heap 3 solution(FREERTOS_HEAP_SEL=3)!" diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/port.c b/portable/ThirdParty/GCC/ARC_EM_HS/port.c index 9eb326e00..cc3eb1e8f 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/port.c +++ b/portable/ThirdParty/GCC/ARC_EM_HS/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* @@ -152,7 +153,7 @@ void vPortYieldFromIsr( void ) { unsigned int status32; - status32 = cpu_lock_save(); + status32 = cpu_lock_save(); context_switch_reqflg = true; cpu_unlock_restore( status32 ); } diff --git a/portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h b/portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h index 5e735808e..96c433859 100644 --- a/portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h +++ b/portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/ThirdParty/GCC/ATmega/port.c b/portable/ThirdParty/GCC/ATmega/port.c index 4dcaacd32..9b504684e 100644 --- a/portable/ThirdParty/GCC/ATmega/port.c +++ b/portable/ThirdParty/GCC/ATmega/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ @@ -534,12 +535,12 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, /* The start of the task code will be popped off the stack last, so place * it on first. */ - usAddress = ( uint16_t ) pxCode; - *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff ); + usAddress = ( uint16_t ) pxCode; + *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff ); pxTopOfStack--; - usAddress >>= 8; - *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff ); + usAddress >>= 8; + *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff ); pxTopOfStack--; #if defined( __AVR_3_BYTE_PC__ ) @@ -562,9 +563,9 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, * portSAVE_CONTEXT places the flags on the stack immediately after r0 * to ensure the interrupts get disabled as soon as possible, and so ensuring * the stack use is minimal should a context switch interrupt occur. */ - *pxTopOfStack = ( StackType_t ) 0x00; /* R0 */ + *pxTopOfStack = ( StackType_t ) 0x00; /* R0 */ pxTopOfStack--; - *pxTopOfStack = portFLAGS_INT_ENABLED; + *pxTopOfStack = portFLAGS_INT_ENABLED; pxTopOfStack--; #if defined( __AVR_3_BYTE_PC__ ) @@ -586,21 +587,21 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, #endif /* Now the remaining registers. The compiler expects R1 to be 0. */ - *pxTopOfStack = ( StackType_t ) 0x00; /* R1 */ + *pxTopOfStack = ( StackType_t ) 0x00; /* R1 */ /* Leave R2 - R23 untouched */ - pxTopOfStack -= 23; + pxTopOfStack -= 23; /* Place the parameter on the stack in the expected location. */ - usAddress = ( uint16_t ) pvParameters; - *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff ); + usAddress = ( uint16_t ) pvParameters; + *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff ); pxTopOfStack--; - usAddress >>= 8; - *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff ); + usAddress >>= 8; + *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff ); /* Leave register R26 - R31 untouched */ - pxTopOfStack -= 7; + pxTopOfStack -= 7; return pxTopOfStack; } @@ -703,12 +704,12 @@ void vPortYieldFromTick( void ) static void prvSetupTimerInterrupt( void ) { uint32_t ulCompareMatch; - uint8_t ucLowByte; + uint8_t ucLowByte; /* Using 8bit Timer0 to generate the tick. Correct fuses must be * selected for the configCPU_CLOCK_HZ clock.*/ - ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ; + ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ; /* We only have 8 bits so have to scale 1024 to get our required tick rate. */ ulCompareMatch /= portCLOCK_PRESCALER; @@ -718,18 +719,18 @@ void vPortYieldFromTick( void ) /* Setup compare match value for compare match A. Interrupts are disabled * before this is called so we need not worry here. */ - ucLowByte = ( uint8_t ) ( ulCompareMatch & ( uint32_t ) 0xff ); - portOCRL = ucLowByte; + ucLowByte = ( uint8_t ) ( ulCompareMatch & ( uint32_t ) 0xff ); + portOCRL = ucLowByte; /* Setup clock source and compare match behaviour. */ - portTCCRa = portCLEAR_COUNTER_ON_MATCH; - portTCCRb = portPRESCALE_1024; + portTCCRa = portCLEAR_COUNTER_ON_MATCH; + portTCCRb = portPRESCALE_1024; /* Enable the interrupt - this is okay as interrupt are currently globally disabled. */ - ucLowByte = portTIMSK; - ucLowByte |= portCOMPARE_MATCH_A_INTERRUPT_ENABLE; - portTIMSK = ucLowByte; + ucLowByte = portTIMSK; + ucLowByte |= portCOMPARE_MATCH_A_INTERRUPT_ENABLE; + portTIMSK = ucLowByte; } #endif /* if defined( portUSE_WDTO ) */ diff --git a/portable/ThirdParty/GCC/ATmega/portmacro.h b/portable/ThirdParty/GCC/ATmega/portmacro.h index c28bff5f9..ab3dc1f6c 100644 --- a/portable/ThirdParty/GCC/ATmega/portmacro.h +++ b/portable/ThirdParty/GCC/ATmega/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/ThirdParty/GCC/Posix/port.c b/portable/ThirdParty/GCC/Posix/port.c index f41468bbf..a63ef7e8d 100644 --- a/portable/ThirdParty/GCC/Posix/port.c +++ b/portable/ThirdParty/GCC/Posix/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -89,15 +90,15 @@ static inline Thread_t * prvGetThreadFromTask( TaskHandle_t xTask ) /*-----------------------------------------------------------*/ -static pthread_once_t hSigSetupThread = PTHREAD_ONCE_INIT; -static sigset_t xResumeSignals; -static sigset_t xAllSignals; -static sigset_t xSchedulerOriginalSignalMask; -static pthread_t hMainThread = ( pthread_t ) NULL; +static pthread_once_t hSigSetupThread = PTHREAD_ONCE_INIT; +static sigset_t xResumeSignals; +static sigset_t xAllSignals; +static sigset_t xSchedulerOriginalSignalMask; +static pthread_t hMainThread = ( pthread_t ) NULL; static volatile portBASE_TYPE uxCriticalNesting; /*-----------------------------------------------------------*/ -static portBASE_TYPE xSchedulerEnd = pdFALSE; +static portBASE_TYPE xSchedulerEnd = pdFALSE; /*-----------------------------------------------------------*/ static void prvSetupSignalsAndSchedulerPolicy( void ); @@ -141,7 +142,7 @@ extern void * __libc_realloc( void * ptr, void * malloc( size_t size ) { sigset_t xSavedSignals; - void * ptr; + void * ptr; pthread_sigmask( SIG_BLOCK, &xAllSignals, &xSavedSignals ); ptr = __libc_malloc( size ); @@ -163,7 +164,7 @@ void * calloc( size_t nmemb, size_t size ) { sigset_t xSavedSignals; - void * ptr; + void * ptr; pthread_sigmask( SIG_BLOCK, &xAllSignals, &xSavedSignals ); ptr = __libc_calloc( nmemb, size ); @@ -199,31 +200,31 @@ portSTACK_TYPE * pxPortInitialiseStack( portSTACK_TYPE * pxTopOfStack, pdTASK_CODE pxCode, void * pvParameters ) { - Thread_t * thread; + Thread_t * thread; pthread_attr_t xThreadAttributes; - size_t ulStackSize; - int iRet; + size_t ulStackSize; + int iRet; ( void ) pthread_once( &hSigSetupThread, prvSetupSignalsAndSchedulerPolicy ); /* * Store the additional thread data at the start of the stack. */ - thread = ( Thread_t * ) ( pxTopOfStack + 1 ) - 1; - pxTopOfStack = ( portSTACK_TYPE * ) thread - 1; - ulStackSize = ( pxTopOfStack + 1 - pxEndOfStack ) * sizeof( *pxTopOfStack ); + thread = ( Thread_t * ) ( pxTopOfStack + 1 ) - 1; + pxTopOfStack = ( portSTACK_TYPE * ) thread - 1; + ulStackSize = ( pxTopOfStack + 1 - pxEndOfStack ) * sizeof( *pxTopOfStack ); - thread->pxCode = pxCode; + thread->pxCode = pxCode; thread->pvParams = pvParameters; - thread->xDying = pdFALSE; + thread->xDying = pdFALSE; pthread_attr_init( &xThreadAttributes ); pthread_attr_setstack( &xThreadAttributes, pxEndOfStack, ulStackSize ); vPortEnterCritical(); - iRet = pthread_create( &thread->pthread, &xThreadAttributes, - prvWaitForStart, thread ); + iRet = pthread_create( &thread->pthread, &xThreadAttributes, + prvWaitForStart, thread ); if( iRet ) { @@ -250,7 +251,7 @@ void vPortStartFirstTask( void ) */ portBASE_TYPE xPortStartScheduler( void ) { - int iSignal; + int iSignal; sigset_t xSignals; hMainThread = pthread_self(); @@ -285,20 +286,20 @@ void vPortEndScheduler( void ) /* Stop the timer and ignore any pending SIGALRMs that would end * up running on the main thread when it is resumed. */ - itimer.it_value.tv_sec = 0; - itimer.it_value.tv_usec = 0; + itimer.it_value.tv_sec = 0; + itimer.it_value.tv_usec = 0; - itimer.it_interval.tv_sec = 0; + itimer.it_interval.tv_sec = 0; itimer.it_interval.tv_usec = 0; ( void ) setitimer( ITIMER_REAL, &itimer, NULL ); - sigtick.sa_flags = 0; - sigtick.sa_handler = SIG_IGN; + sigtick.sa_flags = 0; + sigtick.sa_handler = SIG_IGN; sigemptyset( &sigtick.sa_mask ); sigaction( SIGALRM, &sigtick, NULL ); /* Signal the scheduler to exit its loop. */ - xSchedulerEnd = pdTRUE; + xSchedulerEnd = pdTRUE; ( void ) pthread_kill( hMainThread, SIG_RESUME ); prvSuspendSelf(); @@ -337,7 +338,7 @@ void vPortYieldFromISR( void ) vTaskSwitchContext(); - xThreadToResume = prvGetThreadFromTask( xTaskGetCurrentTaskHandle() ); + xThreadToResume = prvGetThreadFromTask( xTaskGetCurrentTaskHandle() ); prvSwitchThread( xThreadToResume, xThreadToSuspend ); } @@ -397,10 +398,10 @@ static uint64_t prvTickCount; void prvSetupTimerInterrupt( void ) { struct itimerval itimer; - int iRet; + int iRet; /* Initialise the structure with the current timer information. */ - iRet = getitimer( ITIMER_REAL, &itimer ); + iRet = getitimer( ITIMER_REAL, &itimer ); if( iRet ) { @@ -408,22 +409,22 @@ void prvSetupTimerInterrupt( void ) } /* Set the interval between timer events. */ - itimer.it_interval.tv_sec = 0; + itimer.it_interval.tv_sec = 0; itimer.it_interval.tv_usec = portTICK_RATE_MICROSECONDS; /* Set the current count-down. */ - itimer.it_value.tv_sec = 0; - itimer.it_value.tv_usec = portTICK_RATE_MICROSECONDS; + itimer.it_value.tv_sec = 0; + itimer.it_value.tv_usec = portTICK_RATE_MICROSECONDS; /* Set-up the timer interrupt. */ - iRet = setitimer( ITIMER_REAL, &itimer, NULL ); + iRet = setitimer( ITIMER_REAL, &itimer, NULL ); if( iRet ) { prvFatalError( "setitimer", errno ); } - prvStartTimeNs = prvGetTimeNs(); + prvStartTimeNs = prvGetTimeNs(); } /*-----------------------------------------------------------*/ @@ -431,16 +432,16 @@ static void vPortSystemTickHandler( int sig ) { Thread_t * pxThreadToSuspend; Thread_t * pxThreadToResume; - uint64_t xExpectedTicks; + uint64_t xExpectedTicks; uxCriticalNesting++; /* Signals are blocked in this signal handler. */ - pxThreadToSuspend = prvGetThreadFromTask( xTaskGetCurrentTaskHandle() ); + pxThreadToSuspend = prvGetThreadFromTask( xTaskGetCurrentTaskHandle() ); /* Tick Increment, accounting for any lost signals or drift in * the timer. */ - xExpectedTicks = ( prvGetTimeNs() - prvStartTimeNs ) - / ( portTICK_RATE_MICROSECONDS * 1000 ); + xExpectedTicks = ( prvGetTimeNs() - prvStartTimeNs ) + / ( portTICK_RATE_MICROSECONDS * 1000 ); do { @@ -524,7 +525,7 @@ static void prvSwitchThread( Thread_t * pxThreadToResume, prvSuspendSelf(); - uxCriticalNesting = uxSavedCriticalNesting; + uxCriticalNesting = uxSavedCriticalNesting; } } /*-----------------------------------------------------------*/ @@ -563,9 +564,9 @@ static void prvResumeThread( pthread_t xThreadId ) static void prvSetupSignalsAndSchedulerPolicy( void ) { struct sigaction sigresume, sigtick; - int iRet; + int iRet; - hMainThread = pthread_self(); + hMainThread = pthread_self(); /* Initialise common signal masks. */ sigemptyset( &xResumeSignals ); @@ -588,22 +589,22 @@ static void prvSetupSignalsAndSchedulerPolicy( void ) /* SIG_RESUME is only used with sigwait() so doesn't need a * handler. */ - sigresume.sa_flags = 0; + sigresume.sa_flags = 0; sigresume.sa_handler = SIG_IGN; sigfillset( &sigresume.sa_mask ); - sigtick.sa_flags = 0; - sigtick.sa_handler = vPortSystemTickHandler; + sigtick.sa_flags = 0; + sigtick.sa_handler = vPortSystemTickHandler; sigfillset( &sigtick.sa_mask ); - iRet = sigaction( SIG_RESUME, &sigresume, NULL ); + iRet = sigaction( SIG_RESUME, &sigresume, NULL ); if( iRet ) { prvFatalError( "sigaction", errno ); } - iRet = sigaction( SIGALRM, &sigtick, NULL ); + iRet = sigaction( SIGALRM, &sigtick, NULL ); if( iRet ) { diff --git a/portable/ThirdParty/GCC/Posix/portmacro.h b/portable/ThirdParty/GCC/Posix/portmacro.h index e43b653ef..91d44fe96 100644 --- a/portable/ThirdParty/GCC/Posix/portmacro.h +++ b/portable/ThirdParty/GCC/Posix/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ diff --git a/portable/ThirdParty/GCC/Xtensa_ESP32/include/portmacro.h b/portable/ThirdParty/GCC/Xtensa_ESP32/include/portmacro.h index 8740f2234..cf3973547 100644 --- a/portable/ThirdParty/GCC/Xtensa_ESP32/include/portmacro.h +++ b/portable/ThirdParty/GCC/Xtensa_ESP32/include/portmacro.h @@ -34,6 +34,7 @@ * FOR A PARTICULAR PURPOSE. Full license text is available from the following * link: http://www.freertos.org/a00114.html * + * 1 tab == 4 spaces! * *************************************************************************** * * @@ -59,6 +60,7 @@ * engineered and independently SIL3 certified version for use in safety and * mission critical applications that require provable dependability. * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H @@ -163,9 +165,9 @@ #else #define portMUX_INITIALIZER_UNLOCKED \ { \ - .owner = portMUX_FREE_VAL, \ - .count = 0, \ - .lastLockedFn = "(never locked)", \ + .owner = portMUX_FREE_VAL, \ + .count = 0, \ + .lastLockedFn = "(never locked)", \ .lastLockedLine = -1 \ } #endif /* ifndef CONFIG_FREERTOS_PORTMUX_DEBUG */ diff --git a/portable/ThirdParty/GCC/Xtensa_ESP32/include/xtensa_context.h b/portable/ThirdParty/GCC/Xtensa_ESP32/include/xtensa_context.h index fd235a33b..b2dbb5119 100644 --- a/portable/ThirdParty/GCC/Xtensa_ESP32/include/xtensa_context.h +++ b/portable/ThirdParty/GCC/Xtensa_ESP32/include/xtensa_context.h @@ -67,7 +67,7 @@ #if defined( _ASMLANGUAGE ) || defined( __ASSEMBLER__ ) #define STRUCT_BEGIN .pushsection.text; .struct 0 - #define STRUCT_FIELD( ctype, size, asname, name ) asname:.space size + #define STRUCT_FIELD( ctype, size, asname, name ) asname:.space size #define STRUCT_AFIELD( ctype, size, asname, name, n ) asname:.space( size ) *( n ) #define STRUCT_END( sname ) sname ## Size:; .popsection @@ -362,8 +362,8 @@ STRUCT_END( XtSolFrame ) .endm #define ENTRY0 #define RET( sz ) ret1 sz - .macro ret1 size = 0x10 - l32i a0, sp, 0 + .macro ret1 size = 0x10 + l32i a0, sp, 0 addi sp, sp, \ size ret .endm diff --git a/portable/ThirdParty/GCC/Xtensa_ESP32/port.c b/portable/ThirdParty/GCC/Xtensa_ESP32/port.c index e4b22b08f..932496938 100644 --- a/portable/ThirdParty/GCC/Xtensa_ESP32/port.c +++ b/portable/ThirdParty/GCC/Xtensa_ESP32/port.c @@ -64,6 +64,7 @@ * engineered and independently SIL3 certified version for use in safety and * mission critical applications that require provable dependability. * + * 1 tab == 4 spaces! */ /******************************************************************************* @@ -124,7 +125,7 @@ extern void _xt_coproc_init( void ); /*-----------------------------------------------------------*/ unsigned port_xSchedulerRunning[ portNUM_PROCESSORS ] = { 0 }; /* Duplicate of inaccessible xSchedulerRunning; needed at startup to avoid counting nesting */ -unsigned port_interruptNesting[ portNUM_PROCESSORS ] = { 0 }; /* Interrupt nesting level. Increased/decreased in portasm.c, _frxt_int_enter/_frxt_int_exit */ +unsigned port_interruptNesting[ portNUM_PROCESSORS ] = { 0 }; /* Interrupt nesting level. Increased/decreased in portasm.c, _frxt_int_enter/_frxt_int_exit */ /*-----------------------------------------------------------*/ @@ -145,15 +146,15 @@ void _xt_user_exit( void ); void * pvParameters ) #endif { - StackType_t * sp, * tp; - XtExcFrame * frame; + StackType_t * sp, * tp; + XtExcFrame * frame; #if XCHAL_CP_NUM > 0 uint32_t * p; #endif /* Create interrupt stack frame aligned to 16 byte boundary */ - sp = ( StackType_t * ) ( ( ( UBaseType_t ) ( pxTopOfStack + 1 ) - XT_CP_SIZE - XT_STK_FRMSZ ) & ~0xf ); + sp = ( StackType_t * ) ( ( ( UBaseType_t ) ( pxTopOfStack + 1 ) - XT_CP_SIZE - XT_STK_FRMSZ ) & ~0xf ); /* Clear the entire frame (do not use memset() because we don't depend on C library) */ for( tp = sp; tp <= pxTopOfStack; ++tp ) @@ -161,23 +162,23 @@ void _xt_user_exit( void ); *tp = 0; } - frame = ( XtExcFrame * ) sp; + frame = ( XtExcFrame * ) sp; /* Explicitly initialize certain saved registers */ - frame->pc = ( UBaseType_t ) pxCode; /* task entrypoint */ - frame->a0 = 0; /* to terminate GDB backtrace */ - frame->a1 = ( UBaseType_t ) sp + XT_STK_FRMSZ; /* physical top of stack frame */ - frame->exit = ( UBaseType_t ) _xt_user_exit; /* user exception exit dispatcher */ + frame->pc = ( UBaseType_t ) pxCode; /* task entrypoint */ + frame->a0 = 0; /* to terminate GDB backtrace */ + frame->a1 = ( UBaseType_t ) sp + XT_STK_FRMSZ; /* physical top of stack frame */ + frame->exit = ( UBaseType_t ) _xt_user_exit; /* user exception exit dispatcher */ /* Set initial PS to int level 0, EXCM disabled ('rfe' will enable), user mode. */ /* Also set entry point argument parameter. */ #ifdef __XTENSA_CALL0_ABI__ - frame->a2 = ( UBaseType_t ) pvParameters; - frame->ps = PS_UM | PS_EXCM; + frame->a2 = ( UBaseType_t ) pvParameters; + frame->ps = PS_UM | PS_EXCM; #else /* + for windowed ABI also set WOE and CALLINC (pretend task was 'call4'd). */ - frame->a6 = ( UBaseType_t ) pvParameters; - frame->ps = PS_UM | PS_EXCM | PS_WOE | PS_CALLINC( 1 ); + frame->a6 = ( UBaseType_t ) pvParameters; + frame->ps = PS_UM | PS_EXCM | PS_WOE | PS_CALLINC( 1 ); #endif #ifdef XT_USE_SWPRI @@ -191,10 +192,10 @@ void _xt_user_exit( void ); /* No access to TCB here, so derive indirectly. Stack growth is top to bottom. * //p = (uint32_t *) xMPUSettings->coproc_area; */ - p = ( uint32_t * ) ( ( ( uint32_t ) pxTopOfStack - XT_CP_SIZE ) & ~0xf ); - p[ 0 ] = 0; - p[ 1 ] = 0; - p[ 2 ] = ( ( ( uint32_t ) p ) + 12 + XCHAL_TOTAL_SA_ALIGN - 1 ) & -XCHAL_TOTAL_SA_ALIGN; + p = ( uint32_t * ) ( ( ( uint32_t ) pxTopOfStack - XT_CP_SIZE ) & ~0xf ); + p[ 0 ] = 0; + p[ 1 ] = 0; + p[ 2 ] = ( ( ( uint32_t ) p ) + 12 + XCHAL_TOTAL_SA_ALIGN - 1 ) & -XCHAL_TOTAL_SA_ALIGN; #endif return sp; @@ -238,7 +239,7 @@ BaseType_t xPortStartScheduler( void ) BaseType_t xPortSysTickHandler( void ) { BaseType_t ret; - unsigned interruptMask; + unsigned interruptMask; portbenchmarkIntLatency(); traceISR_ENTER( SYSTICK_INTR_ID ); @@ -306,10 +307,10 @@ void vPortYieldOtherCore( BaseType_t coreid ) BaseType_t xPortInIsrContext() { unsigned int irqStatus; - BaseType_t ret; + BaseType_t ret; irqStatus = portENTER_CRITICAL_NESTED(); - ret = ( port_interruptNesting[ xPortGetCoreID() ] != 0 ); + ret = ( port_interruptNesting[ xPortGetCoreID() ] != 0 ); portEXIT_CRITICAL_NESTED( irqStatus ); return ret; } @@ -340,11 +341,11 @@ void vPortCPUInitializeMutex( portMUX_TYPE * mux ) { #ifdef CONFIG_FREERTOS_PORTMUX_DEBUG ets_printf( "Initializing mux %p\n", mux ); - mux->lastLockedFn = "(never locked)"; + mux->lastLockedFn = "(never locked)"; mux->lastLockedLine = -1; #endif - mux->owner = portMUX_FREE_VAL; - mux->count = 0; + mux->owner = portMUX_FREE_VAL; + mux->count = 0; } #include "portmux_impl.h" @@ -369,13 +370,13 @@ void vPortCPUInitializeMutex( portMUX_TYPE * mux ) int line ) { unsigned int irqStatus = portENTER_CRITICAL_NESTED(); - bool result = vPortCPUAcquireMutexIntsDisabled( mux, timeout_cycles, fnName, line ); + bool result = vPortCPUAcquireMutexIntsDisabled( mux, timeout_cycles, fnName, line ); portEXIT_CRITICAL_NESTED( irqStatus ); return result; } -#else /* ifdef CONFIG_FREERTOS_PORTMUX_DEBUG */ +#else /* ifdef CONFIG_FREERTOS_PORTMUX_DEBUG */ void vPortCPUAcquireMutex( portMUX_TYPE * mux ) { unsigned int irqStatus = portENTER_CRITICAL_NESTED(); @@ -388,7 +389,7 @@ void vPortCPUInitializeMutex( portMUX_TYPE * mux ) int timeout_cycles ) { unsigned int irqStatus = portENTER_CRITICAL_NESTED(); - bool result = vPortCPUAcquireMutexIntsDisabled( mux, timeout_cycles ); + bool result = vPortCPUAcquireMutexIntsDisabled( mux, timeout_cycles ); portEXIT_CRITICAL_NESTED( irqStatus ); return result; diff --git a/portable/ThirdParty/GCC/Xtensa_ESP32/portmux_impl.inc.h b/portable/ThirdParty/GCC/Xtensa_ESP32/portmux_impl.inc.h index 30997e082..427eca6cc 100644 --- a/portable/ThirdParty/GCC/Xtensa_ESP32/portmux_impl.inc.h +++ b/portable/ThirdParty/GCC/Xtensa_ESP32/portmux_impl.inc.h @@ -50,15 +50,15 @@ static inline bool __attribute__( ( always_inline ) ) #if !CONFIG_FREERTOS_UNICORE - uint32_t res; + uint32_t res; portBASE_TYPE coreID, otherCoreID; - uint32_t ccount_start; - bool set_timeout = timeout_cycles > portMUX_NO_TIMEOUT; + uint32_t ccount_start; + bool set_timeout = timeout_cycles > portMUX_NO_TIMEOUT; #ifdef CONFIG_FREERTOS_PORTMUX_DEBUG if( !set_timeout ) { timeout_cycles = 10000; /* Always set a timeout in debug mode */ - set_timeout = true; + set_timeout = true; } #endif @@ -68,7 +68,7 @@ static inline bool __attribute__( ( always_inline ) ) } #ifdef CONFIG_FREERTOS_PORTMUX_DEBUG - uint32_t owner = mux->owner; + uint32_t owner = mux->owner; if( ( owner != portMUX_FREE_VAL ) && ( owner != CORE_ID_PRO ) && ( owner != CORE_ID_APP ) ) { @@ -130,7 +130,7 @@ static inline bool __attribute__( ( always_inline ) ) #ifdef CONFIG_FREERTOS_PORTMUX_DEBUG if( res == portMUX_FREE_VAL ) /*initial lock */ { - mux->lastLockedFn = fnName; + mux->lastLockedFn = fnName; mux->lastLockedLine = line; } else @@ -155,13 +155,13 @@ static inline bool __attribute__( ( always_inline ) ) #if !CONFIG_FREERTOS_UNICORE - portBASE_TYPE coreID; + portBASE_TYPE coreID; #ifdef CONFIG_FREERTOS_PORTMUX_DEBUG - const char * lastLockedFn = mux->lastLockedFn; - int lastLockedLine = mux->lastLockedLine; - mux->lastLockedFn = fnName; + const char * lastLockedFn = mux->lastLockedFn; + int lastLockedLine = mux->lastLockedLine; + mux->lastLockedFn = fnName; mux->lastLockedLine = line; - uint32_t owner = mux->owner; + uint32_t owner = mux->owner; if( ( owner != portMUX_FREE_VAL ) && ( owner != CORE_ID_PRO ) && ( owner != CORE_ID_APP ) ) { diff --git a/portable/ThirdParty/GCC/Xtensa_ESP32/xtensa_intr.c b/portable/ThirdParty/GCC/Xtensa_ESP32/xtensa_intr.c index ee4b7cb90..6d05ae5f9 100644 --- a/portable/ThirdParty/GCC/Xtensa_ESP32/xtensa_intr.c +++ b/portable/ThirdParty/GCC/Xtensa_ESP32/xtensa_intr.c @@ -71,7 +71,7 @@ } /* Convert exception number to _xt_exception_table name */ - n = n * portNUM_PROCESSORS + xPortGetCoreID(); + n = n * portNUM_PROCESSORS + xPortGetCoreID(); old = _xt_exception_table[ n ]; if( f ) @@ -121,7 +121,7 @@ void * arg ) { xt_handler_table_entry * entry; - xt_handler old; + xt_handler old; if( ( n < 0 ) || ( n >= XCHAL_NUM_INTERRUPTS ) ) { @@ -134,20 +134,20 @@ } /* Convert exception number to _xt_exception_table name */ - n = n * portNUM_PROCESSORS + xPortGetCoreID(); + n = n * portNUM_PROCESSORS + xPortGetCoreID(); entry = _xt_interrupt_table + n; - old = entry->handler; + old = entry->handler; if( f ) { entry->handler = f; - entry->arg = arg; + entry->arg = arg; } else { entry->handler = &xt_unhandled_interrupt; - entry->arg = ( void * ) n; + entry->arg = ( void * ) n; } return( ( old == &xt_unhandled_interrupt ) ? 0 : old ); @@ -164,7 +164,7 @@ } /* Convert exception number to _xt_exception_table name */ - n = n * portNUM_PROCESSORS + xPortGetCoreID(); + n = n * portNUM_PROCESSORS + xPortGetCoreID(); entry = _xt_interrupt_table + n; return entry->arg; diff --git a/portable/ThirdParty/XCC/Xtensa/port.c b/portable/ThirdParty/XCC/Xtensa/port.c index ab14cf26f..141263929 100644 --- a/portable/ThirdParty/XCC/Xtensa/port.c +++ b/portable/ThirdParty/XCC/Xtensa/port.c @@ -23,6 +23,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* @@ -72,7 +73,7 @@ typedef void TCB_t; extern volatile TCB_t * volatile pxCurrentTCB; unsigned port_xSchedulerRunning = 0; /* Duplicate of inaccessible xSchedulerRunning; needed at startup to avoid counting nesting */ -unsigned port_interruptNesting = 0; /* Interrupt nesting level */ +unsigned port_interruptNesting = 0; /* Interrupt nesting level */ /*-----------------------------------------------------------*/ @@ -93,15 +94,15 @@ void _xt_user_exit( void ); void * pvParameters ) #endif { - StackType_t * sp, * tp; - XtExcFrame * frame; + StackType_t * sp, * tp; + XtExcFrame * frame; #if XCHAL_CP_NUM > 0 uint32_t * p; #endif /* Create interrupt stack frame aligned to 16 byte boundary */ - sp = ( StackType_t * ) ( ( ( UBaseType_t ) ( pxTopOfStack + 1 ) - XT_CP_SIZE - XT_STK_FRMSZ ) & ~0xf ); + sp = ( StackType_t * ) ( ( ( UBaseType_t ) ( pxTopOfStack + 1 ) - XT_CP_SIZE - XT_STK_FRMSZ ) & ~0xf ); /* Clear the entire frame (do not use memset() because we don't depend on C library) */ for( tp = sp; tp <= pxTopOfStack; ++tp ) @@ -109,23 +110,23 @@ void _xt_user_exit( void ); *tp = 0; } - frame = ( XtExcFrame * ) sp; + frame = ( XtExcFrame * ) sp; /* Explicitly initialize certain saved registers */ - frame->pc = ( UBaseType_t ) pxCode; /* task entrypoint */ - frame->a0 = 0; /* to terminate GDB backtrace */ - frame->a1 = ( UBaseType_t ) sp + XT_STK_FRMSZ; /* physical top of stack frame */ - frame->exit = ( UBaseType_t ) _xt_user_exit; /* user exception exit dispatcher */ + frame->pc = ( UBaseType_t ) pxCode; /* task entrypoint */ + frame->a0 = 0; /* to terminate GDB backtrace */ + frame->a1 = ( UBaseType_t ) sp + XT_STK_FRMSZ; /* physical top of stack frame */ + frame->exit = ( UBaseType_t ) _xt_user_exit; /* user exception exit dispatcher */ /* Set initial PS to int level 0, EXCM disabled ('rfe' will enable), user mode. */ /* Also set entry point argument parameter. */ #ifdef __XTENSA_CALL0_ABI__ - frame->a2 = ( UBaseType_t ) pvParameters; - frame->ps = PS_UM | PS_EXCM; + frame->a2 = ( UBaseType_t ) pvParameters; + frame->ps = PS_UM | PS_EXCM; #else /* + for windowed ABI also set WOE and CALLINC (pretend task was 'call4'd). */ - frame->a6 = ( UBaseType_t ) pvParameters; - frame->ps = PS_UM | PS_EXCM | PS_WOE | PS_CALLINC( 1 ); + frame->a6 = ( UBaseType_t ) pvParameters; + frame->ps = PS_UM | PS_EXCM | PS_WOE | PS_CALLINC( 1 ); #endif #ifdef XT_USE_SWPRI @@ -139,10 +140,10 @@ void _xt_user_exit( void ); /* No access to TCB here, so derive indirectly. Stack growth is top to bottom. * //p = (uint32_t *) xMPUSettings->coproc_area; */ - p = ( uint32_t * ) ( ( ( uint32_t ) pxTopOfStack - XT_CP_SIZE ) & ~0xf ); - p[ 0 ] = 0; - p[ 1 ] = 0; - p[ 2 ] = ( ( ( uint32_t ) p ) + 12 + XCHAL_TOTAL_SA_ALIGN - 1 ) & -XCHAL_TOTAL_SA_ALIGN; + p = ( uint32_t * ) ( ( ( uint32_t ) pxTopOfStack - XT_CP_SIZE ) & ~0xf ); + p[ 0 ] = 0; + p[ 1 ] = 0; + p[ 2 ] = ( ( ( uint32_t ) p ) + 12 + XCHAL_TOTAL_SA_ALIGN - 1 ) & -XCHAL_TOTAL_SA_ALIGN; #endif return sp; @@ -191,7 +192,7 @@ BaseType_t xPortStartScheduler( void ) BaseType_t xPortSysTickHandler( void ) { BaseType_t ret; - uint32_t interruptMask; + uint32_t interruptMask; portbenchmarkIntLatency(); diff --git a/portable/ThirdParty/XCC/Xtensa/portclib.c b/portable/ThirdParty/XCC/Xtensa/portclib.c index add3e56a7..67d13bb94 100644 --- a/portable/ThirdParty/XCC/Xtensa/portclib.c +++ b/portable/ThirdParty/XCC/Xtensa/portclib.c @@ -87,18 +87,18 @@ void * _sbrk_r( struct _reent * reent, int32_t incr ) { - extern char _end; - extern char _heap_sentry; + extern char _end; + extern char _heap_sentry; static char * _heap_sentry_ptr = &_heap_sentry; static char * heap_ptr; - char * base; + char * base; if( !heap_ptr ) { heap_ptr = ( char * ) &_end; } - base = heap_ptr; + base = heap_ptr; if( heap_ptr + incr >= _heap_sentry_ptr ) { @@ -137,7 +137,7 @@ #include "semphr.h" static SemaphoreHandle_t xClibMutex; - static uint32_t ulClibInitDone = 0; + static uint32_t ulClibInitDone = 0; /*----------------------------------------------------------------------------- */ /* Get C library lock. */ @@ -189,18 +189,18 @@ void * _sbrk_r( struct _reent * reent, int32_t incr ) { - extern char _end; - extern char _heap_sentry; + extern char _end; + extern char _heap_sentry; static char * _heap_sentry_ptr = &_heap_sentry; static char * heap_ptr; - char * base; + char * base; if( !heap_ptr ) { heap_ptr = ( char * ) &_end; } - base = heap_ptr; + base = heap_ptr; if( heap_ptr + incr >= _heap_sentry_ptr ) { @@ -219,7 +219,7 @@ { configASSERT( !ulClibInitDone ); - xClibMutex = xSemaphoreCreateRecursiveMutex(); + xClibMutex = xSemaphoreCreateRecursiveMutex(); ulClibInitDone = 1; } diff --git a/portable/ThirdParty/XCC/Xtensa/portmacro.h b/portable/ThirdParty/XCC/Xtensa/portmacro.h index 1d7485981..d0f68d8fa 100644 --- a/portable/ThirdParty/XCC/Xtensa/portmacro.h +++ b/portable/ThirdParty/XCC/Xtensa/portmacro.h @@ -23,6 +23,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* @@ -225,7 +226,7 @@ static inline void vPortCleanUpTcbClib( struct _reent * ptr ) { FILE * fp = &( ptr->__sf[ 0 ] ); - int i; + int i; for( i = 0; i < 3; ++i, ++fp ) { diff --git a/portable/ThirdParty/XCC/Xtensa/xtensa_context.h b/portable/ThirdParty/XCC/Xtensa/xtensa_context.h index 6b0410d76..695d4411a 100644 --- a/portable/ThirdParty/XCC/Xtensa/xtensa_context.h +++ b/portable/ThirdParty/XCC/Xtensa/xtensa_context.h @@ -58,7 +58,7 @@ #if defined( _ASMLANGUAGE ) || defined( __ASSEMBLER__ ) #define STRUCT_BEGIN .pushsection.text; .struct 0 - #define STRUCT_FIELD( ctype, size, asname, name ) asname:.space size + #define STRUCT_FIELD( ctype, size, asname, name ) asname:.space size #define STRUCT_AFIELD( ctype, size, asname, name, n ) asname:.space( size ) *( n ) #define STRUCT_END( sname ) sname ## Size:; .popsection @@ -337,8 +337,8 @@ STRUCT_END( XtSolFrame ) .endm #define ENTRY0 #define RET( sz ) ret1 sz - .macro ret1 size = 0x10 - l32i a0, sp, 0 + .macro ret1 size = 0x10 + l32i a0, sp, 0 addi sp, sp, \ size ret .endm diff --git a/portable/ThirdParty/XCC/Xtensa/xtensa_init.c b/portable/ThirdParty/XCC/Xtensa/xtensa_init.c index 883549b0c..f2271864c 100644 --- a/portable/ThirdParty/XCC/Xtensa/xtensa_init.c +++ b/portable/ThirdParty/XCC/Xtensa/xtensa_init.c @@ -47,7 +47,7 @@ void _xt_tick_divisor_init( void ) { #ifdef XT_CLOCK_FREQ - _xt_tick_divisor = ( XT_CLOCK_FREQ / XT_TICK_PER_SEC ); + _xt_tick_divisor = ( XT_CLOCK_FREQ / XT_TICK_PER_SEC ); #else #ifdef XT_BOARD _xt_tick_divisor = xtbsp_clock_freq_hz() / XT_TICK_PER_SEC; diff --git a/portable/ThirdParty/XCC/Xtensa/xtensa_intr.c b/portable/ThirdParty/XCC/Xtensa/xtensa_intr.c index fa8d3a1b0..b79c9ed11 100644 --- a/portable/ThirdParty/XCC/Xtensa/xtensa_intr.c +++ b/portable/ThirdParty/XCC/Xtensa/xtensa_intr.c @@ -113,7 +113,7 @@ void * arg ) { xt_handler_table_entry * entry; - xt_handler old; + xt_handler old; if( ( n < 0 ) || ( n >= XCHAL_NUM_INTERRUPTS ) ) { @@ -126,17 +126,17 @@ } entry = _xt_interrupt_table + n; - old = entry->handler; + old = entry->handler; if( f ) { entry->handler = f; - entry->arg = arg; + entry->arg = arg; } else { entry->handler = &xt_unhandled_interrupt; - entry->arg = ( void * ) n; + entry->arg = ( void * ) n; } return( ( old == &xt_unhandled_interrupt ) ? 0 : old ); diff --git a/portable/WizC/PIC18/Drivers/Tick/Tick.c b/portable/WizC/PIC18/Drivers/Tick/Tick.c index 54a19766a..c85de5066 100644 --- a/portable/WizC/PIC18/Drivers/Tick/Tick.c +++ b/portable/WizC/PIC18/Drivers/Tick/Tick.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* @@ -89,28 +90,28 @@ void portSetupTick( void ) /* * Set the compare match value. */ - CCPR1H = ( uint8_t ) ( ( portTIMER_COMPARE_VALUE >> 8 ) & 0xff ); - CCPR1L = ( uint8_t ) ( portTIMER_COMPARE_VALUE & 0xff ); + CCPR1H = ( uint8_t ) ( ( portTIMER_COMPARE_VALUE >> 8 ) & 0xff ); + CCPR1L = ( uint8_t ) ( portTIMER_COMPARE_VALUE & 0xff ); /* * Set Compare Special Event Trigger Mode */ - bCCP1M3 = portBIT_SET; - bCCP1M2 = portBIT_CLEAR; - bCCP1M1 = portBIT_SET; - bCCP1M0 = portBIT_SET; + bCCP1M3 = portBIT_SET; + bCCP1M2 = portBIT_CLEAR; + bCCP1M1 = portBIT_SET; + bCCP1M0 = portBIT_SET; /* * Enable CCP1 interrupt */ - bCCP1IE = portBIT_SET; + bCCP1IE = portBIT_SET; /* * We are only going to use the global interrupt bit, so disable * interruptpriorities and enable peripheral interrupts. */ - bIPEN = portBIT_CLEAR; - bPEIE = portBIT_SET; + bIPEN = portBIT_CLEAR; + bPEIE = portBIT_SET; /* * Set up timer1 @@ -120,18 +121,18 @@ void portSetupTick( void ) /* * Clear the time count */ - TMR1H = ( uint8_t ) 0x00; - TMR1L = ( uint8_t ) 0x00; + TMR1H = ( uint8_t ) 0x00; + TMR1L = ( uint8_t ) 0x00; /* * Setup the timer */ - bRD16 = portBIT_SET; /* 16-bit */ + bRD16 = portBIT_SET; /* 16-bit */ bT1CKPS1 = portTIMER_COMPARE_PS1; /* prescaler */ bT1CKPS0 = portTIMER_COMPARE_PS0; /* prescaler */ bT1OSCEN = portBIT_SET; /* Oscillator enable */ - bT1SYNC = portBIT_SET; /* No external clock sync */ - bTMR1CS = portBIT_CLEAR; /* Internal clock */ + bT1SYNC = portBIT_SET; /* No external clock sync */ + bTMR1CS = portBIT_CLEAR; /* Internal clock */ - bTMR1ON = portBIT_SET; /* Start timer1 */ + bTMR1ON = portBIT_SET; /* Start timer1 */ } diff --git a/portable/WizC/PIC18/Drivers/Tick/isrTick.c b/portable/WizC/PIC18/Drivers/Tick/isrTick.c index 54f6a57e9..34dd599c9 100644 --- a/portable/WizC/PIC18/Drivers/Tick/isrTick.c +++ b/portable/WizC/PIC18/Drivers/Tick/isrTick.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* diff --git a/portable/WizC/PIC18/addFreeRTOS.h b/portable/WizC/PIC18/addFreeRTOS.h index 1c5609356..8d14df722 100644 --- a/portable/WizC/PIC18/addFreeRTOS.h +++ b/portable/WizC/PIC18/addFreeRTOS.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* diff --git a/portable/WizC/PIC18/port.c b/portable/WizC/PIC18/port.c index 696b8beed..e9182536b 100644 --- a/portable/WizC/PIC18/port.c +++ b/portable/WizC/PIC18/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* @@ -86,7 +87,7 @@ extern volatile TCB_t * volatile pxCurrentTCB; #define portSTACK_MINIMAL_CALLRETURN_DEPTH ( 10 ) #define portSTACK_OTHER_BYTES ( 20 ) -uint16_t usCalcMinStackSize = 0; +uint16_t usCalcMinStackSize = 0; /*-----------------------------------------------------------*/ @@ -118,7 +119,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, movlw OVERHEADPAGE0 - LOCOPTSIZE + MAXLOCOPTSIZE movwf PRODL, ACCESS; PRODL is used as temp register _Pragma( "asmend" ) - ucScratch = PRODL; + ucScratch = PRODL; /* * Place a few bytes of known values on the bottom of the stack. @@ -137,31 +138,31 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, * First store the function parameters. This is where the task expects * to find them when it starts running. */ - *pxTopOfStack-- = ( StackType_t ) ( ( ( uint16_t ) pvParameters >> 8 ) & 0x00ff ); - *pxTopOfStack-- = ( StackType_t ) ( ( uint16_t ) pvParameters & 0x00ff ); + *pxTopOfStack-- = ( StackType_t ) ( ( ( uint16_t ) pvParameters >> 8 ) & 0x00ff ); + *pxTopOfStack-- = ( StackType_t ) ( ( uint16_t ) pvParameters & 0x00ff ); /* * Next are all the registers that form part of the task context. */ - *pxTopOfStack-- = ( StackType_t ) 0x11; /* STATUS. */ - *pxTopOfStack-- = ( StackType_t ) 0x22; /* WREG. */ - *pxTopOfStack-- = ( StackType_t ) 0x33; /* BSR. */ - *pxTopOfStack-- = ( StackType_t ) 0x44; /* PRODH. */ - *pxTopOfStack-- = ( StackType_t ) 0x55; /* PRODL. */ - *pxTopOfStack-- = ( StackType_t ) 0x66; /* FSR0H. */ - *pxTopOfStack-- = ( StackType_t ) 0x77; /* FSR0L. */ - *pxTopOfStack-- = ( StackType_t ) 0x88; /* FSR1H. */ - *pxTopOfStack-- = ( StackType_t ) 0x99; /* FSR1L. */ - *pxTopOfStack-- = ( StackType_t ) 0xAA; /* TABLAT. */ + *pxTopOfStack-- = ( StackType_t ) 0x11; /* STATUS. */ + *pxTopOfStack-- = ( StackType_t ) 0x22; /* WREG. */ + *pxTopOfStack-- = ( StackType_t ) 0x33; /* BSR. */ + *pxTopOfStack-- = ( StackType_t ) 0x44; /* PRODH. */ + *pxTopOfStack-- = ( StackType_t ) 0x55; /* PRODL. */ + *pxTopOfStack-- = ( StackType_t ) 0x66; /* FSR0H. */ + *pxTopOfStack-- = ( StackType_t ) 0x77; /* FSR0L. */ + *pxTopOfStack-- = ( StackType_t ) 0x88; /* FSR1H. */ + *pxTopOfStack-- = ( StackType_t ) 0x99; /* FSR1L. */ + *pxTopOfStack-- = ( StackType_t ) 0xAA; /* TABLAT. */ #if _ROMSIZE > 0x8000 *pxTopOfStack-- = ( StackType_t ) 0x00; /* TBLPTRU. */ #endif - *pxTopOfStack-- = ( StackType_t ) 0xCC; /* TBLPTRH. */ - *pxTopOfStack-- = ( StackType_t ) 0xDD; /* TBLPTRL. */ + *pxTopOfStack-- = ( StackType_t ) 0xCC; /* TBLPTRH. */ + *pxTopOfStack-- = ( StackType_t ) 0xDD; /* TBLPTRL. */ #if _ROMSIZE > 0x8000 *pxTopOfStack-- = ( StackType_t ) 0xEE; /* PCLATU. */ #endif - *pxTopOfStack-- = ( StackType_t ) 0xFF; /* PCLATH. */ + *pxTopOfStack-- = ( StackType_t ) 0xFF; /* PCLATH. */ /* * Next the compiler's scratchspace. @@ -180,14 +181,14 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, #if _ROMSIZE > 0x8000 *pxTopOfStack-- = ( StackType_t ) 0; #endif - *pxTopOfStack-- = ( StackType_t ) ( ( ( uint16_t ) pxCode >> 8 ) & 0x00ff ); - *pxTopOfStack-- = ( StackType_t ) ( ( uint16_t ) pxCode & 0x00ff ); + *pxTopOfStack-- = ( StackType_t ) ( ( ( uint16_t ) pxCode >> 8 ) & 0x00ff ); + *pxTopOfStack-- = ( StackType_t ) ( ( uint16_t ) pxCode & 0x00ff ); /* * Store the number of return addresses on the hardware stack. * So far only the address of the task entry point. */ - *pxTopOfStack-- = ( StackType_t ) 1; + *pxTopOfStack-- = ( StackType_t ) 1; /* * The code generated by wizC does not maintain separate @@ -196,7 +197,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, * track of the critical section nesting. This variable has to be stored * as part of the task context and is initially set to zero. */ - *pxTopOfStack-- = ( StackType_t ) portNO_CRITICAL_SECTION_NESTING; + *pxTopOfStack-- = ( StackType_t ) portNO_CRITICAL_SECTION_NESTING; return pxTopOfStack; } diff --git a/portable/WizC/PIC18/portmacro.h b/portable/WizC/PIC18/portmacro.h index 57ecf73d2..f56855b39 100644 --- a/portable/WizC/PIC18/portmacro.h +++ b/portable/WizC/PIC18/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* @@ -199,86 +200,86 @@ * assembler definitions. */ - #define portSAVE_CONTEXT( ucInterruptForced ) \ - do \ - { \ - portDISABLE_INTERRUPTS(); \ - \ - _Pragma( "asm" ) \ - ; \ - ; Push the relevant SFR 's onto the task's stack \ - ; \ - movff STATUS, POSTDEC2 \ - movff WREG, POSTDEC2 \ - movff BSR, POSTDEC2 \ - movff PRODH, POSTDEC2 \ - movff PRODL, POSTDEC2 \ - movff FSR0H, POSTDEC2 \ - movff FSR0L, POSTDEC2 \ - movff FSR1H, POSTDEC2 \ - movff FSR1L, POSTDEC2 \ - movff TABLAT, POSTDEC2 \ - if __ROMSIZE > 0x8000 \ - movff TBLPTRU, POSTDEC2 \ - endif \ - movff TBLPTRH, POSTDEC2 \ - movff TBLPTRL, POSTDEC2 \ - if __ROMSIZE > 0x8000 \ - movff PCLATU, POSTDEC2 \ - endif \ - movff PCLATH, POSTDEC2 \ - ; \ - ; Store the compiler - scratch - area as described above. \ - ; \ - movlw OVERHEADPAGE0 - LOCOPTSIZE + MAXLOCOPTSIZE \ - clrf FSR0L, ACCESS \ - clrf FSR0H, ACCESS \ -_rtos_S1: \ - movff POSTINC0, POSTDEC2 \ - decfsz WREG, W, ACCESS \ - SMARTJUMP _rtos_S1 \ - ; \ - ; Save the pic call / return -stack belonging to the \ + #define portSAVE_CONTEXT( ucInterruptForced ) \ + do \ + { \ + portDISABLE_INTERRUPTS(); \ + \ + _Pragma( "asm" ) \ + ; \ + ; Push the relevant SFR 's onto the task's stack \ + ; \ + movff STATUS, POSTDEC2 \ + movff WREG, POSTDEC2 \ + movff BSR, POSTDEC2 \ + movff PRODH, POSTDEC2 \ + movff PRODL, POSTDEC2 \ + movff FSR0H, POSTDEC2 \ + movff FSR0L, POSTDEC2 \ + movff FSR1H, POSTDEC2 \ + movff FSR1L, POSTDEC2 \ + movff TABLAT, POSTDEC2 \ + if __ROMSIZE > 0x8000 \ + movff TBLPTRU, POSTDEC2 \ + endif \ + movff TBLPTRH, POSTDEC2 \ + movff TBLPTRL, POSTDEC2 \ + if __ROMSIZE > 0x8000 \ + movff PCLATU, POSTDEC2 \ + endif \ + movff PCLATH, POSTDEC2 \ + ; \ + ; Store the compiler - scratch - area as described above. \ + ; \ + movlw OVERHEADPAGE0 - LOCOPTSIZE + MAXLOCOPTSIZE \ + clrf FSR0L, ACCESS \ + clrf FSR0H, ACCESS \ +_rtos_S1: \ + movff POSTINC0, POSTDEC2 \ + decfsz WREG, W, ACCESS \ + SMARTJUMP _rtos_S1 \ + ; \ + ; Save the pic call / return -stack belonging to the \ ; current task by copying it to the task 's software- \ ; stack. We save the hardware stack pointer (which \ ; is the number of addresses on the stack) in the \ ; W-register first because we need it later and it \ - ; is modified in the save-loop by executing pop's. \ - ; After the loop the W - register is stored on the \ - ; stack, too. \ - ; \ - movf STKPTR, W, ACCESS \ - bz _rtos_s3 \ -_rtos_S2: \ - if __ROMSIZE > 0x8000 \ - movff TOSU, POSTDEC2 \ - endif \ - movff TOSH, POSTDEC2 \ - movff TOSL, POSTDEC2 \ - pop \ - tstfsz STKPTR, ACCESS \ - SMARTJUMP _rtos_S2 \ -_rtos_s3: \ - movwf POSTDEC2, ACCESS \ - ; \ - ; Next the value for ucCriticalNesting used by the \ - ; task is stored on the stack.When \ - ; ( ucInterruptForced == portINTERRUPTS_FORCED ), we save \ - ; it as 0 ( portNO_CRITICAL_SECTION_NESTING ). \ - ; \ - if ucInterruptForced == portINTERRUPTS_FORCED \ - clrf POSTDEC2, ACCESS \ - else{ \ - movff ucCriticalNesting, POSTDEC2 \ - endif \ - ; } \ - ; Save the new top of the software stack in the TCB. \ - ; \ - movff pxCurrentTCB, FSR0L \ - movff pxCurrentTCB + 1, FSR0H \ - movff FSR2L, POSTINC0 \ - movff FSR2H, POSTINC0 \ - _Pragma( "asmend" ) \ + ; is modified in the save-loop by executing pop's. \ + ; After the loop the W - register is stored on the \ + ; stack, too. \ + ; \ + movf STKPTR, W, ACCESS \ + bz _rtos_s3 \ +_rtos_S2: \ + if __ROMSIZE > 0x8000 \ + movff TOSU, POSTDEC2 \ + endif \ + movff TOSH, POSTDEC2 \ + movff TOSL, POSTDEC2 \ + pop \ + tstfsz STKPTR, ACCESS \ + SMARTJUMP _rtos_S2 \ +_rtos_s3: \ + movwf POSTDEC2, ACCESS \ + ; \ + ; Next the value for ucCriticalNesting used by the \ + ; task is stored on the stack.When \ + ; ( ucInterruptForced == portINTERRUPTS_FORCED ), we save \ + ; it as 0 ( portNO_CRITICAL_SECTION_NESTING ). \ + ; \ + if ucInterruptForced == portINTERRUPTS_FORCED \ + clrf POSTDEC2, ACCESS \ + else{ \ + movff ucCriticalNesting, POSTDEC2 \ + endif \ + ; } \ + ; Save the new top of the software stack in the TCB. \ + ; \ + movff pxCurrentTCB, FSR0L \ + movff pxCurrentTCB + 1, FSR0H \ + movff FSR2L, POSTINC0 \ + movff FSR2H, POSTINC0 \ + _Pragma( "asmend" ) \ } while( 0 ) /************************************************************/ @@ -286,32 +287,32 @@ _rtos_s3: /* * This is the reverse of portSAVE_CONTEXT. */ - #define portRESTORE_CONTEXT() \ - do \ - { \ - _Pragma( "asm" ) \ - ; \ - ; Set FSR0 to point to pxCurrentTCB->pxTopOfStack. \ - ; \ - movff pxCurrentTCB, FSR0L \ - movff pxCurrentTCB + 1, FSR0H \ - ; \ - ; De - reference FSR0 to set the address it holds into \ - ; FSR2( i.e. *( pxCurrentTCB->pxTopOfStack ) ).FSR2 \ - ; is used by wizC as stackpointer. \ - ; \ - movff POSTINC0, FSR2L \ - movff POSTINC0, FSR2H \ - ; \ - ; Next, the value for ucCriticalNesting used by the \ - ; task is retrieved from the stack. \ - ; \ - movff PREINC2, ucCriticalNesting \ - ; \ - ; Rebuild the pic call / return -stack.The number of \ - ; return addresses is the next item on the task stack. \ - ; Save this number in PRODL.Then fetch the addresses \ - ; and store them on the hardwarestack. \ + #define portRESTORE_CONTEXT() \ + do \ + { \ + _Pragma( "asm" ) \ + ; \ + ; Set FSR0 to point to pxCurrentTCB->pxTopOfStack. \ + ; \ + movff pxCurrentTCB, FSR0L \ + movff pxCurrentTCB + 1, FSR0H \ + ; \ + ; De - reference FSR0 to set the address it holds into \ + ; FSR2( i.e. *( pxCurrentTCB->pxTopOfStack ) ).FSR2 \ + ; is used by wizC as stackpointer. \ + ; \ + movff POSTINC0, FSR2L \ + movff POSTINC0, FSR2H \ + ; \ + ; Next, the value for ucCriticalNesting used by the \ + ; task is retrieved from the stack. \ + ; \ + movff PREINC2, ucCriticalNesting \ + ; \ + ; Rebuild the pic call / return -stack.The number of \ + ; return addresses is the next item on the task stack. \ + ; Save this number in PRODL.Then fetch the addresses \ + ; and store them on the hardwarestack. \ ; The datasheets say we can 't use movff here... \ ; \ movff PREINC2,PRODL // Use PRODL as tempregister \ @@ -331,17 +332,17 @@ _rtos_s3: decfsz PRODL,F,ACCESS \ SMARTJUMP _rtos_R1 \ ; \ - ; Restore the compiler's working storage area to page 0 \ - ; \ - movlw OVERHEADPAGE0 - LOCOPTSIZE + MAXLOCOPTSIZE \ - movwf FSR0L, ACCESS \ - clrf FSR0H, ACCESS \ -_rtos_R2: \ - decf FSR0L, F, ACCESS \ - movff PREINC2, INDF0 \ - tstfsz FSR0L, ACCESS \ - SMARTJUMP _rtos_R2 \ - ; \ + ; Restore the compiler's working storage area to page 0 \ + ; \ + movlw OVERHEADPAGE0 - LOCOPTSIZE + MAXLOCOPTSIZE \ + movwf FSR0L, ACCESS \ + clrf FSR0H, ACCESS \ +_rtos_R2: \ + decf FSR0L, F, ACCESS \ + movff PREINC2, INDF0 \ + tstfsz FSR0L, ACCESS \ + SMARTJUMP _rtos_R2 \ + ; \ ; Restore the sfr 's forming the tasks context. \ ; We cannot yet restore bsr, w and status because \ ; we need these registers for a final test. \ @@ -424,3 +425,10 @@ extern void vPortYield( void ); + + + + + + + diff --git a/portable/oWatcom/16BitDOS/Flsh186/port.c b/portable/oWatcom/16BitDOS/Flsh186/port.c index f64ea3a5e..cdc5255f9 100644 --- a/portable/oWatcom/16BitDOS/Flsh186/port.c +++ b/portable/oWatcom/16BitDOS/Flsh186/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* @@ -190,7 +191,7 @@ void vPortEndScheduler( void ) static void prvExitFunction( void ) { const uint16_t usTimerDisable = 0x0000; - uint16_t usTimer0Control; + uint16_t usTimer0Control; /* Interrupts should be disabled here anyway - but no * harm in making sure. */ @@ -209,7 +210,7 @@ static void prvExitFunction( void ) portOUTPUT_WORD( portTIMER_1_CONTROL_REGISTER, usTimerDisable ); /* Restart the DOS tick. */ - usTimer0Control = portINPUT_WORD( portTIMER_0_CONTROL_REGISTER ); + usTimer0Control = portINPUT_WORD( portTIMER_0_CONTROL_REGISTER ); usTimer0Control |= portTIMER_INTERRUPT_ENABLE; portOUTPUT_WORD( portTIMER_0_CONTROL_REGISTER, usTimer0Control ); @@ -220,25 +221,25 @@ static void prvExitFunction( void ) static void prvSetTickFrequency( uint32_t ulTickRateHz ) { - const uint16_t usMaxCountRegister = 0xff5a; + const uint16_t usMaxCountRegister = 0xff5a; const uint16_t usTimerPriorityRegister = 0xff32; - const uint16_t usTimerEnable = 0xC000; - const uint16_t usRetrigger = 0x0001; - const uint16_t usTimerHighPriority = 0x0000; - uint16_t usTimer0Control; + const uint16_t usTimerEnable = 0xC000; + const uint16_t usRetrigger = 0x0001; + const uint16_t usTimerHighPriority = 0x0000; + uint16_t usTimer0Control; /* ( CPU frequency / 4 ) / clock 2 max count [inpw( 0xff62 ) = 7] */ - const uint32_t ulClockFrequency = 0x7f31a0; + const uint32_t ulClockFrequency = 0x7f31a0; - uint32_t ulTimerCount = ulClockFrequency / ulTickRateHz; + uint32_t ulTimerCount = ulClockFrequency / ulTickRateHz; portOUTPUT_WORD( portTIMER_1_CONTROL_REGISTER, usTimerEnable | portTIMER_INTERRUPT_ENABLE | usRetrigger ); portOUTPUT_WORD( usMaxCountRegister, ( uint16_t ) ulTimerCount ); portOUTPUT_WORD( usTimerPriorityRegister, usTimerHighPriority ); /* Stop the DOS tick - don't do this if you want to maintain a TOD clock. */ - usTimer0Control = portINPUT_WORD( portTIMER_0_CONTROL_REGISTER ); + usTimer0Control = portINPUT_WORD( portTIMER_0_CONTROL_REGISTER ); usTimer0Control &= ~portTIMER_INTERRUPT_ENABLE; portOUTPUT_WORD( portTIMER_0_CONTROL_REGISTER, usTimer0Control ); } diff --git a/portable/oWatcom/16BitDOS/Flsh186/portmacro.h b/portable/oWatcom/16BitDOS/Flsh186/portmacro.h index c71eaad08..57414c62a 100644 --- a/portable/oWatcom/16BitDOS/Flsh186/portmacro.h +++ b/portable/oWatcom/16BitDOS/Flsh186/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/oWatcom/16BitDOS/PC/port.c b/portable/oWatcom/16BitDOS/PC/port.c index 857cd0208..7ef979dee 100644 --- a/portable/oWatcom/16BitDOS/PC/port.c +++ b/portable/oWatcom/16BitDOS/PC/port.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* @@ -125,8 +126,8 @@ BaseType_t xPortStartScheduler( void ) /* Remember what was on the interrupts we are going to use * so we can put them back later if required. */ - pxOldSwitchISR = _dos_getvect( portSWITCH_INT_NUMBER ); - pxOriginalTickISR = _dos_getvect( portTIMER_INT_NUMBER ); + pxOldSwitchISR = _dos_getvect( portSWITCH_INT_NUMBER ); + pxOriginalTickISR = _dos_getvect( portTIMER_INT_NUMBER ); pxOldSwitchISRPlus1 = _dos_getvect( portSWITCH_INT_NUMBER + 1 ); prvSetTickFrequency( configTICK_RATE_HZ ); @@ -154,7 +155,7 @@ BaseType_t xPortStartScheduler( void ) /* Setup a counter that is used to call the DOS interrupt as close * to it's original frequency as can be achieved given our chosen tick * frequency. */ - sDOSTickCounter = portTICKS_PER_DOS_TICK; + sDOSTickCounter = portTICKS_PER_DOS_TICK; /* Clean up function if we want to return to DOS. */ if( setjmp( xJumpBuf ) != 0 ) @@ -277,15 +278,15 @@ static void prvExitFunction( void ) static void prvSetTickFrequency( uint32_t ulTickRateHz ) { - const uint16_t usPIT_MODE = ( uint16_t ) 0x43; - const uint16_t usPIT0 = ( uint16_t ) 0x40; - const uint32_t ulPIT_CONST = ( uint32_t ) 1193180; + const uint16_t usPIT_MODE = ( uint16_t ) 0x43; + const uint16_t usPIT0 = ( uint16_t ) 0x40; + const uint32_t ulPIT_CONST = ( uint32_t ) 1193180; const uint16_t us8254_CTR0_MODE3 = ( uint16_t ) 0x36; - uint32_t ulOutput; + uint32_t ulOutput; /* Setup the 8245 to tick at the wanted frequency. */ portOUTPUT_BYTE( usPIT_MODE, us8254_CTR0_MODE3 ); - ulOutput = ulPIT_CONST / ulTickRateHz; + ulOutput = ulPIT_CONST / ulTickRateHz; portOUTPUT_BYTE( usPIT0, ( uint16_t ) ( ulOutput & ( uint32_t ) 0xff ) ); ulOutput >>= 8; @@ -295,8 +296,8 @@ static void prvSetTickFrequency( uint32_t ulTickRateHz ) static void prvSetTickFrequencyDefault( void ) { - const uint16_t usPIT_MODE = ( uint16_t ) 0x43; - const uint16_t usPIT0 = ( uint16_t ) 0x40; + const uint16_t usPIT_MODE = ( uint16_t ) 0x43; + const uint16_t usPIT0 = ( uint16_t ) 0x40; const uint16_t us8254_CTR0_MODE3 = ( uint16_t ) 0x36; portOUTPUT_BYTE( usPIT_MODE, us8254_CTR0_MODE3 ); diff --git a/portable/oWatcom/16BitDOS/PC/portmacro.h b/portable/oWatcom/16BitDOS/PC/portmacro.h index d041c0fb5..7489ffea0 100644 --- a/portable/oWatcom/16BitDOS/PC/portmacro.h +++ b/portable/oWatcom/16BitDOS/PC/portmacro.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #ifndef PORTMACRO_H diff --git a/portable/oWatcom/16BitDOS/common/portasm.h b/portable/oWatcom/16BitDOS/common/portasm.h index c47f47a30..bb5b9e7c8 100644 --- a/portable/oWatcom/16BitDOS/common/portasm.h +++ b/portable/oWatcom/16BitDOS/common/portasm.h @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ typedef void TCB_t; diff --git a/portable/oWatcom/16BitDOS/common/portcomn.c b/portable/oWatcom/16BitDOS/common/portcomn.c index eed734996..3e03a504d 100644 --- a/portable/oWatcom/16BitDOS/common/portcomn.c +++ b/portable/oWatcom/16BitDOS/common/portcomn.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* @@ -88,7 +89,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, * the address of the existing stack top to place in the SP register within * the stack frame. pxOriginalSP holds SP before (simulated) pusha was * called. */ - pxOriginalSP = pxTopOfStack; + pxOriginalSP = pxTopOfStack; /* The remaining registers would be pushed on the stack by our context * switch function. These are loaded with values simply to make debugging diff --git a/queue.c b/queue.c index bb75c50ef..dec1a07ab 100644 --- a/queue.c +++ b/queue.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ #include @@ -270,12 +271,12 @@ BaseType_t xQueueGenericReset( QueueHandle_t xQueue, taskENTER_CRITICAL(); { - pxQueue->u.xQueue.pcTail = pxQueue->pcHead + ( pxQueue->uxLength * pxQueue->uxItemSize ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */ - pxQueue->uxMessagesWaiting = ( UBaseType_t ) 0U; - pxQueue->pcWriteTo = pxQueue->pcHead; + pxQueue->u.xQueue.pcTail = pxQueue->pcHead + ( pxQueue->uxLength * pxQueue->uxItemSize ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */ + pxQueue->uxMessagesWaiting = ( UBaseType_t ) 0U; + pxQueue->pcWriteTo = pxQueue->pcHead; pxQueue->u.xQueue.pcReadFrom = pxQueue->pcHead + ( ( pxQueue->uxLength - 1U ) * pxQueue->uxItemSize ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */ - pxQueue->cRxLock = queueUNLOCKED; - pxQueue->cTxLock = queueUNLOCKED; + pxQueue->cRxLock = queueUNLOCKED; + pxQueue->cTxLock = queueUNLOCKED; if( xNewQueue == pdFALSE ) { @@ -384,7 +385,7 @@ BaseType_t xQueueGenericReset( QueueHandle_t xQueue, const uint8_t ucQueueType ) { Queue_t * pxNewQueue; - size_t xQueueSizeInBytes; + size_t xQueueSizeInBytes; uint8_t * pucQueueStorage; configASSERT( uxQueueLength > ( UBaseType_t ) 0 ); @@ -406,13 +407,13 @@ BaseType_t xQueueGenericReset( QueueHandle_t xQueue, * are greater than or equal to the pointer to char requirements the cast * is safe. In other cases alignment requirements are not strict (one or * two bytes). */ - pxNewQueue = ( Queue_t * ) pvPortMalloc( sizeof( Queue_t ) + xQueueSizeInBytes ); /*lint !e9087 !e9079 see comment above. */ + pxNewQueue = ( Queue_t * ) pvPortMalloc( sizeof( Queue_t ) + xQueueSizeInBytes ); /*lint !e9087 !e9079 see comment above. */ if( pxNewQueue != NULL ) { /* Jump past the queue structure to find the location of the queue * storage area. */ - pucQueueStorage = ( uint8_t * ) pxNewQueue; + pucQueueStorage = ( uint8_t * ) pxNewQueue; pucQueueStorage += sizeof( Queue_t ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */ #if ( configSUPPORT_STATIC_ALLOCATION == 1 ) @@ -464,7 +465,7 @@ static void prvInitialiseNewQueue( const UBaseType_t uxQueueLength, /* Initialise the queue members as described where the queue type is * defined. */ - pxNewQueue->uxLength = uxQueueLength; + pxNewQueue->uxLength = uxQueueLength; pxNewQueue->uxItemSize = uxItemSize; ( void ) xQueueGenericReset( pxNewQueue, pdTRUE ); @@ -494,8 +495,8 @@ static void prvInitialiseNewQueue( const UBaseType_t uxQueueLength, * correctly for a generic queue, but this function is creating a * mutex. Overwrite those members that need to be set differently - * in particular the information required for priority inheritance. */ - pxNewQueue->u.xSemaphore.xMutexHolder = NULL; - pxNewQueue->uxQueueType = queueQUEUE_IS_MUTEX; + pxNewQueue->u.xSemaphore.xMutexHolder = NULL; + pxNewQueue->uxQueueType = queueQUEUE_IS_MUTEX; /* In case this is a recursive mutex. */ pxNewQueue->u.xSemaphore.uxRecursiveCallCount = 0; @@ -518,7 +519,7 @@ static void prvInitialiseNewQueue( const UBaseType_t uxQueueLength, QueueHandle_t xQueueCreateMutex( const uint8_t ucQueueType ) { - QueueHandle_t xNewQueue; + QueueHandle_t xNewQueue; const UBaseType_t uxMutexLength = ( UBaseType_t ) 1, uxMutexSize = ( UBaseType_t ) 0; xNewQueue = xQueueGenericCreate( uxMutexLength, uxMutexSize, ucQueueType ); @@ -535,7 +536,7 @@ static void prvInitialiseNewQueue( const UBaseType_t uxQueueLength, QueueHandle_t xQueueCreateMutexStatic( const uint8_t ucQueueType, StaticQueue_t * pxStaticQueue ) { - QueueHandle_t xNewQueue; + QueueHandle_t xNewQueue; const UBaseType_t uxMutexLength = ( UBaseType_t ) 1, uxMutexSize = ( UBaseType_t ) 0; /* Prevent compiler warnings about unused parameters if @@ -555,7 +556,7 @@ static void prvInitialiseNewQueue( const UBaseType_t uxQueueLength, TaskHandle_t xQueueGetMutexHolder( QueueHandle_t xSemaphore ) { - TaskHandle_t pxReturn; + TaskHandle_t pxReturn; Queue_t * const pxSemaphore = ( Queue_t * ) xSemaphore; /* This function is called by xSemaphoreGetMutexHolder(), and should not @@ -612,7 +613,7 @@ static void prvInitialiseNewQueue( const UBaseType_t uxQueueLength, BaseType_t xQueueGiveMutexRecursive( QueueHandle_t xMutex ) { - BaseType_t xReturn; + BaseType_t xReturn; Queue_t * const pxMutex = ( Queue_t * ) xMutex; configASSERT( pxMutex ); @@ -668,7 +669,7 @@ static void prvInitialiseNewQueue( const UBaseType_t uxQueueLength, BaseType_t xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xTicksToWait ) { - BaseType_t xReturn; + BaseType_t xReturn; Queue_t * const pxMutex = ( Queue_t * ) xMutex; configASSERT( pxMutex ); @@ -770,8 +771,8 @@ BaseType_t xQueueGenericSend( QueueHandle_t xQueue, TickType_t xTicksToWait, const BaseType_t xCopyPosition ) { - BaseType_t xEntryTimeSet = pdFALSE, xYieldRequired; - TimeOut_t xTimeOut; + BaseType_t xEntryTimeSet = pdFALSE, xYieldRequired; + TimeOut_t xTimeOut; Queue_t * const pxQueue = xQueue; configASSERT( pxQueue ); @@ -982,8 +983,8 @@ BaseType_t xQueueGenericSendFromISR( QueueHandle_t xQueue, BaseType_t * const pxHigherPriorityTaskWoken, const BaseType_t xCopyPosition ) { - BaseType_t xReturn; - UBaseType_t uxSavedInterruptStatus; + BaseType_t xReturn; + UBaseType_t uxSavedInterruptStatus; Queue_t * const pxQueue = xQueue; configASSERT( pxQueue ); @@ -1015,7 +1016,7 @@ BaseType_t xQueueGenericSendFromISR( QueueHandle_t xQueue, { if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) ) { - const int8_t cTxLock = pxQueue->cTxLock; + const int8_t cTxLock = pxQueue->cTxLock; const UBaseType_t uxPreviousMessagesWaiting = pxQueue->uxMessagesWaiting; traceQUEUE_SEND_FROM_ISR( pxQueue ); @@ -1147,8 +1148,8 @@ BaseType_t xQueueGenericSendFromISR( QueueHandle_t xQueue, BaseType_t xQueueGiveFromISR( QueueHandle_t xQueue, BaseType_t * const pxHigherPriorityTaskWoken ) { - BaseType_t xReturn; - UBaseType_t uxSavedInterruptStatus; + BaseType_t xReturn; + UBaseType_t uxSavedInterruptStatus; Queue_t * const pxQueue = xQueue; /* Similar to xQueueGenericSendFromISR() but used with semaphores where the @@ -1298,7 +1299,7 @@ BaseType_t xQueueGiveFromISR( QueueHandle_t xQueue, pxQueue->cTxLock = ( int8_t ) ( cTxLock + 1 ); } - xReturn = pdPASS; + xReturn = pdPASS; } else { @@ -1316,9 +1317,9 @@ BaseType_t xQueueReceive( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait ) { - BaseType_t xEntryTimeSet = pdFALSE; - TimeOut_t xTimeOut; - Queue_t * const pxQueue = xQueue; + BaseType_t xEntryTimeSet = pdFALSE; + TimeOut_t xTimeOut; + Queue_t * const pxQueue = xQueue; /* Check the pointer is not NULL. */ configASSERT( ( pxQueue ) ); @@ -1458,12 +1459,12 @@ BaseType_t xQueueReceive( QueueHandle_t xQueue, BaseType_t xQueueSemaphoreTake( QueueHandle_t xQueue, TickType_t xTicksToWait ) { - BaseType_t xEntryTimeSet = pdFALSE; - TimeOut_t xTimeOut; - Queue_t * const pxQueue = xQueue; + BaseType_t xEntryTimeSet = pdFALSE; + TimeOut_t xTimeOut; + Queue_t * const pxQueue = xQueue; #if ( configUSE_MUTEXES == 1 ) - BaseType_t xInheritanceOccurred = pdFALSE; + BaseType_t xInheritanceOccurred = pdFALSE; #endif /* Check the queue pointer is not NULL. */ @@ -1678,10 +1679,10 @@ BaseType_t xQueuePeek( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait ) { - BaseType_t xEntryTimeSet = pdFALSE; - TimeOut_t xTimeOut; - int8_t * pcOriginalReadPosition; - Queue_t * const pxQueue = xQueue; + BaseType_t xEntryTimeSet = pdFALSE; + TimeOut_t xTimeOut; + int8_t * pcOriginalReadPosition; + Queue_t * const pxQueue = xQueue; /* Check the pointer is not NULL. */ configASSERT( ( pxQueue ) ); @@ -1713,7 +1714,7 @@ BaseType_t xQueuePeek( QueueHandle_t xQueue, /* Remember the read position so it can be reset after the data * is read from the queue as this function is only peeking the * data, not removing it. */ - pcOriginalReadPosition = pxQueue->u.xQueue.pcReadFrom; + pcOriginalReadPosition = pxQueue->u.xQueue.pcReadFrom; prvCopyDataFromQueue( pxQueue, pvBuffer ); traceQUEUE_PEEK( pxQueue ); @@ -1829,8 +1830,8 @@ BaseType_t xQueueReceiveFromISR( QueueHandle_t xQueue, void * const pvBuffer, BaseType_t * const pxHigherPriorityTaskWoken ) { - BaseType_t xReturn; - UBaseType_t uxSavedInterruptStatus; + BaseType_t xReturn; + UBaseType_t uxSavedInterruptStatus; Queue_t * const pxQueue = xQueue; configASSERT( pxQueue ); @@ -1906,7 +1907,7 @@ BaseType_t xQueueReceiveFromISR( QueueHandle_t xQueue, pxQueue->cRxLock = ( int8_t ) ( cRxLock + 1 ); } - xReturn = pdPASS; + xReturn = pdPASS; } else { @@ -1923,9 +1924,9 @@ BaseType_t xQueueReceiveFromISR( QueueHandle_t xQueue, BaseType_t xQueuePeekFromISR( QueueHandle_t xQueue, void * const pvBuffer ) { - BaseType_t xReturn; - UBaseType_t uxSavedInterruptStatus; - int8_t * pcOriginalReadPosition; + BaseType_t xReturn; + UBaseType_t uxSavedInterruptStatus; + int8_t * pcOriginalReadPosition; Queue_t * const pxQueue = xQueue; configASSERT( pxQueue ); @@ -1957,11 +1958,11 @@ BaseType_t xQueuePeekFromISR( QueueHandle_t xQueue, /* Remember the read position so it can be reset as nothing is * actually being removed from the queue. */ - pcOriginalReadPosition = pxQueue->u.xQueue.pcReadFrom; + pcOriginalReadPosition = pxQueue->u.xQueue.pcReadFrom; prvCopyDataFromQueue( pxQueue, pvBuffer ); pxQueue->u.xQueue.pcReadFrom = pcOriginalReadPosition; - xReturn = pdPASS; + xReturn = pdPASS; } else { @@ -1993,7 +1994,7 @@ UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue ) UBaseType_t uxQueueSpacesAvailable( const QueueHandle_t xQueue ) { - UBaseType_t uxReturn; + UBaseType_t uxReturn; Queue_t * const pxQueue = xQueue; configASSERT( pxQueue ); @@ -2010,7 +2011,7 @@ UBaseType_t uxQueueSpacesAvailable( const QueueHandle_t xQueue ) UBaseType_t uxQueueMessagesWaitingFromISR( const QueueHandle_t xQueue ) { - UBaseType_t uxReturn; + UBaseType_t uxReturn; Queue_t * const pxQueue = xQueue; configASSERT( pxQueue ); @@ -2124,12 +2125,12 @@ static BaseType_t prvCopyDataToQueue( Queue_t * const pxQueue, const void * pvItemToQueue, const BaseType_t xPosition ) { - BaseType_t xReturn = pdFALSE; + BaseType_t xReturn = pdFALSE; UBaseType_t uxMessagesWaiting; /* This function is called from a critical section. */ - uxMessagesWaiting = pxQueue->uxMessagesWaiting; + uxMessagesWaiting = pxQueue->uxMessagesWaiting; if( pxQueue->uxItemSize == ( UBaseType_t ) 0 ) { @@ -2138,7 +2139,7 @@ static BaseType_t prvCopyDataToQueue( Queue_t * const pxQueue, if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX ) { /* The mutex is no longer being held. */ - xReturn = xTaskPriorityDisinherit( pxQueue->u.xSemaphore.xMutexHolder ); + xReturn = xTaskPriorityDisinherit( pxQueue->u.xSemaphore.xMutexHolder ); pxQueue->u.xSemaphore.xMutexHolder = NULL; } else @@ -2367,7 +2368,7 @@ static BaseType_t prvIsQueueEmpty( const Queue_t * pxQueue ) BaseType_t xQueueIsQueueEmptyFromISR( const QueueHandle_t xQueue ) { - BaseType_t xReturn; + BaseType_t xReturn; Queue_t * const pxQueue = xQueue; configASSERT( pxQueue ); @@ -2408,7 +2409,7 @@ static BaseType_t prvIsQueueFull( const Queue_t * pxQueue ) BaseType_t xQueueIsQueueFullFromISR( const QueueHandle_t xQueue ) { - BaseType_t xReturn; + BaseType_t xReturn; Queue_t * const pxQueue = xQueue; configASSERT( pxQueue ); @@ -2432,7 +2433,7 @@ BaseType_t xQueueIsQueueFullFromISR( const QueueHandle_t xQueue ) const void * pvItemToQueue, TickType_t xTicksToWait ) { - BaseType_t xReturn; + BaseType_t xReturn; Queue_t * const pxQueue = xQueue; /* If the queue is already full we may have to block. A critical section @@ -2511,7 +2512,7 @@ BaseType_t xQueueIsQueueFullFromISR( const QueueHandle_t xQueue ) void * pvBuffer, TickType_t xTicksToWait ) { - BaseType_t xReturn; + BaseType_t xReturn; Queue_t * const pxQueue = xQueue; /* If the queue is already empty we may have to block. A critical section @@ -2563,7 +2564,7 @@ BaseType_t xQueueIsQueueFullFromISR( const QueueHandle_t xQueue ) --( pxQueue->uxMessagesWaiting ); ( void ) memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->u.xQueue.pcReadFrom, ( unsigned ) pxQueue->uxItemSize ); - xReturn = pdPASS; + xReturn = pdPASS; /* Were any co-routines waiting for space to become available? */ if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE ) @@ -2655,7 +2656,7 @@ BaseType_t xQueueIsQueueFullFromISR( const QueueHandle_t xQueue ) void * pvBuffer, BaseType_t * pxCoRoutineWoken ) { - BaseType_t xReturn; + BaseType_t xReturn; Queue_t * const pxQueue = xQueue; /* We cannot block from an ISR, so check there is data available. If @@ -2700,7 +2701,7 @@ BaseType_t xQueueIsQueueFullFromISR( const QueueHandle_t xQueue ) mtCOVERAGE_TEST_MARKER(); } - xReturn = pdPASS; + xReturn = pdPASS; } else { @@ -2728,7 +2729,7 @@ BaseType_t xQueueIsQueueFullFromISR( const QueueHandle_t xQueue ) { /* Store the information on this queue. */ xQueueRegistry[ ux ].pcQueueName = pcQueueName; - xQueueRegistry[ ux ].xHandle = xQueue; + xQueueRegistry[ ux ].xHandle = xQueue; traceQUEUE_REGISTRY_ADD( xQueue, pcQueueName ); break; @@ -2747,7 +2748,7 @@ BaseType_t xQueueIsQueueFullFromISR( const QueueHandle_t xQueue ) const char * pcQueueGetName( QueueHandle_t xQueue ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ { - UBaseType_t ux; + UBaseType_t ux; const char * pcReturn = NULL; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ /* Note there is nothing here to protect against another task adding or @@ -2790,7 +2791,7 @@ BaseType_t xQueueIsQueueFullFromISR( const QueueHandle_t xQueue ) /* Set the handle to NULL to ensure the same queue handle cannot * appear in the registry twice if it is added, removed, then * added again. */ - xQueueRegistry[ ux ].xHandle = ( QueueHandle_t ) 0; + xQueueRegistry[ ux ].xHandle = ( QueueHandle_t ) 0; break; } else @@ -2896,7 +2897,7 @@ BaseType_t xQueueIsQueueFullFromISR( const QueueHandle_t xQueue ) BaseType_t xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ) { - BaseType_t xReturn; + BaseType_t xReturn; Queue_t * const pxQueueOrSemaphore = ( Queue_t * ) xQueueOrSemaphore; if( pxQueueOrSemaphore->pxQueueSetContainer != xQueueSet ) @@ -2959,8 +2960,8 @@ BaseType_t xQueueIsQueueFullFromISR( const QueueHandle_t xQueue ) static BaseType_t prvNotifyQueueSetContainer( const Queue_t * const pxQueue ) { - Queue_t * pxQueueSetContainer = pxQueue->pxQueueSetContainer; - BaseType_t xReturn = pdFALSE; + Queue_t * pxQueueSetContainer = pxQueue->pxQueueSetContainer; + BaseType_t xReturn = pdFALSE; /* This function must be called form a critical section. */ diff --git a/stream_buffer.c b/stream_buffer.c index a1e91e945..bef8214e2 100644 --- a/stream_buffer.c +++ b/stream_buffer.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Standard includes. */ @@ -222,7 +223,7 @@ static void prvInitialiseNewStreamBuffer( StreamBuffer_t * const pxStreamBuffer, BaseType_t xIsMessageBuffer ) { uint8_t * pucAllocatedMemory; - uint8_t ucFlags; + uint8_t ucFlags; /* In case the stream buffer is going to be used as a message buffer * (that is, it will hold discrete messages with a little meta data that @@ -291,8 +292,8 @@ static void prvInitialiseNewStreamBuffer( StreamBuffer_t * const pxStreamBuffer, StaticStreamBuffer_t * const pxStaticStreamBuffer ) { StreamBuffer_t * const pxStreamBuffer = ( StreamBuffer_t * ) pxStaticStreamBuffer; /*lint !e740 !e9087 Safe cast as StaticStreamBuffer_t is opaque Streambuffer_t. */ - StreamBufferHandle_t xReturn; - uint8_t ucFlags; + StreamBufferHandle_t xReturn; + uint8_t ucFlags; configASSERT( pucStreamBufferStorageArea ); configASSERT( pxStaticStreamBuffer ); @@ -346,7 +347,7 @@ static void prvInitialiseNewStreamBuffer( StreamBuffer_t * const pxStreamBuffer, traceSTREAM_BUFFER_CREATE( pxStreamBuffer, xIsMessageBuffer ); - xReturn = ( StreamBufferHandle_t ) pxStaticStreamBuffer; /*lint !e9087 Data hiding requires cast to opaque type. */ + xReturn = ( StreamBufferHandle_t ) pxStaticStreamBuffer; /*lint !e9087 Data hiding requires cast to opaque type. */ } else { @@ -396,10 +397,10 @@ void vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) BaseType_t xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) { StreamBuffer_t * const pxStreamBuffer = xStreamBuffer; - BaseType_t xReturn = pdFAIL; + BaseType_t xReturn = pdFAIL; #if ( configUSE_TRACE_FACILITY == 1 ) - UBaseType_t uxStreamBufferNumber; + UBaseType_t uxStreamBufferNumber; #endif configASSERT( pxStreamBuffer ); @@ -446,7 +447,7 @@ BaseType_t xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, size_t xTriggerLevel ) { StreamBuffer_t * const pxStreamBuffer = xStreamBuffer; - BaseType_t xReturn; + BaseType_t xReturn; configASSERT( pxStreamBuffer ); @@ -461,7 +462,7 @@ BaseType_t xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, if( xTriggerLevel <= pxStreamBuffer->xLength ) { pxStreamBuffer->xTriggerLevelBytes = xTriggerLevel; - xReturn = pdPASS; + xReturn = pdPASS; } else { @@ -479,7 +480,7 @@ size_t xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) configASSERT( pxStreamBuffer ); - xSpace = pxStreamBuffer->xLength + pxStreamBuffer->xTail; + xSpace = pxStreamBuffer->xLength + pxStreamBuffer->xTail; xSpace -= pxStreamBuffer->xHead; xSpace -= ( size_t ) 1; @@ -514,9 +515,9 @@ size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, TickType_t xTicksToWait ) { StreamBuffer_t * const pxStreamBuffer = xStreamBuffer; - size_t xReturn, xSpace = 0; - size_t xRequiredSpace = xDataLengthBytes; - TimeOut_t xTimeOut; + size_t xReturn, xSpace = 0; + size_t xRequiredSpace = xDataLengthBytes; + TimeOut_t xTimeOut; configASSERT( pvTxData ); configASSERT( pxStreamBuffer ); @@ -617,8 +618,8 @@ size_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t * const pxHigherPriorityTaskWoken ) { StreamBuffer_t * const pxStreamBuffer = xStreamBuffer; - size_t xReturn, xSpace; - size_t xRequiredSpace = xDataLengthBytes; + size_t xReturn, xSpace; + size_t xRequiredSpace = xDataLengthBytes; configASSERT( pvTxData ); configASSERT( pxStreamBuffer ); @@ -636,7 +637,7 @@ size_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer, mtCOVERAGE_TEST_MARKER(); } - xSpace = xStreamBufferSpacesAvailable( pxStreamBuffer ); + xSpace = xStreamBufferSpacesAvailable( pxStreamBuffer ); xReturn = prvWriteMessageToBuffer( pxStreamBuffer, pvTxData, xDataLengthBytes, xSpace, xRequiredSpace ); if( xReturn > ( size_t ) 0 ) @@ -669,7 +670,7 @@ static size_t prvWriteMessageToBuffer( StreamBuffer_t * const pxStreamBuffer, size_t xRequiredSpace ) { BaseType_t xShouldWrite; - size_t xReturn; + size_t xReturn; if( xSpace == ( size_t ) 0 ) { @@ -682,7 +683,7 @@ static size_t prvWriteMessageToBuffer( StreamBuffer_t * const pxStreamBuffer, /* This is a stream buffer, as opposed to a message buffer, so writing a * stream of bytes rather than discrete messages. Write as many bytes as * possible. */ - xShouldWrite = pdTRUE; + xShouldWrite = pdTRUE; xDataLengthBytes = configMIN( xDataLengthBytes, xSpace ); } else if( xSpace >= xRequiredSpace ) @@ -720,7 +721,7 @@ size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, TickType_t xTicksToWait ) { StreamBuffer_t * const pxStreamBuffer = xStreamBuffer; - size_t xReceivedLength = 0, xBytesAvailable, xBytesToStoreMessageLength; + size_t xReceivedLength = 0, xBytesAvailable, xBytesToStoreMessageLength; configASSERT( pvRxData ); configASSERT( pxStreamBuffer ); @@ -776,7 +777,7 @@ size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, pxStreamBuffer->xTaskWaitingToReceive = NULL; /* Recheck the data available after blocking. */ - xBytesAvailable = prvBytesInBuffer( pxStreamBuffer ); + xBytesAvailable = prvBytesInBuffer( pxStreamBuffer ); } else { @@ -820,8 +821,8 @@ size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, size_t xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) { - StreamBuffer_t * const pxStreamBuffer = xStreamBuffer; - size_t xReturn, xBytesAvailable, xOriginalTail; + StreamBuffer_t * const pxStreamBuffer = xStreamBuffer; + size_t xReturn, xBytesAvailable, xOriginalTail; configMESSAGE_BUFFER_LENGTH_TYPE xTempReturn; configASSERT( pxStreamBuffer ); @@ -839,9 +840,9 @@ size_t xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) * from the buffer. A copy of the tail is stored so the buffer can be * returned to its prior state as the message is not actually being * removed from the buffer. */ - xOriginalTail = pxStreamBuffer->xTail; + xOriginalTail = pxStreamBuffer->xTail; ( void ) prvReadBytesFromBuffer( pxStreamBuffer, ( uint8_t * ) &xTempReturn, sbBYTES_TO_STORE_MESSAGE_LENGTH, xBytesAvailable ); - xReturn = ( size_t ) xTempReturn; + xReturn = ( size_t ) xTempReturn; pxStreamBuffer->xTail = xOriginalTail; } else @@ -869,7 +870,7 @@ size_t xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t * const pxHigherPriorityTaskWoken ) { StreamBuffer_t * const pxStreamBuffer = xStreamBuffer; - size_t xReceivedLength = 0, xBytesAvailable, xBytesToStoreMessageLength; + size_t xReceivedLength = 0, xBytesAvailable, xBytesToStoreMessageLength; configASSERT( pvRxData ); configASSERT( pxStreamBuffer ); @@ -935,13 +936,13 @@ static size_t prvReadMessageFromBuffer( StreamBuffer_t * pxStreamBuffer, * of the message. A copy of the tail is stored so the buffer can be * returned to its prior state if the length of the message is too * large for the provided buffer. */ - xOriginalTail = pxStreamBuffer->xTail; + xOriginalTail = pxStreamBuffer->xTail; ( void ) prvReadBytesFromBuffer( pxStreamBuffer, ( uint8_t * ) &xTempNextMessageLength, xBytesToStoreMessageLength, xBytesAvailable ); xNextMessageLength = ( size_t ) xTempNextMessageLength; /* Reduce the number of bytes available by the number of bytes just * read out. */ - xBytesAvailable -= xBytesToStoreMessageLength; + xBytesAvailable -= xBytesToStoreMessageLength; /* Check there is enough space in the buffer provided by the * user. */ @@ -951,7 +952,7 @@ static size_t prvReadMessageFromBuffer( StreamBuffer_t * pxStreamBuffer, * so return the buffer to its previous state (so the length of * the message is in the buffer again). */ pxStreamBuffer->xTail = xOriginalTail; - xNextMessageLength = 0; + xNextMessageLength = 0; } else { @@ -976,7 +977,7 @@ BaseType_t xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) { const StreamBuffer_t * const pxStreamBuffer = xStreamBuffer; BaseType_t xReturn; - size_t xTail; + size_t xTail; configASSERT( pxStreamBuffer ); @@ -999,7 +1000,7 @@ BaseType_t xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) BaseType_t xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) { BaseType_t xReturn; - size_t xBytesToStoreMessageLength; + size_t xBytesToStoreMessageLength; const StreamBuffer_t * const pxStreamBuffer = xStreamBuffer; configASSERT( pxStreamBuffer ); @@ -1035,8 +1036,8 @@ BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer BaseType_t * pxHigherPriorityTaskWoken ) { StreamBuffer_t * const pxStreamBuffer = xStreamBuffer; - BaseType_t xReturn; - UBaseType_t uxSavedInterruptStatus; + BaseType_t xReturn; + UBaseType_t uxSavedInterruptStatus; configASSERT( pxStreamBuffer ); @@ -1049,7 +1050,7 @@ BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer eNoAction, pxHigherPriorityTaskWoken ); ( pxStreamBuffer )->xTaskWaitingToReceive = NULL; - xReturn = pdTRUE; + xReturn = pdTRUE; } else { @@ -1066,8 +1067,8 @@ BaseType_t xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuf BaseType_t * pxHigherPriorityTaskWoken ) { StreamBuffer_t * const pxStreamBuffer = xStreamBuffer; - BaseType_t xReturn; - UBaseType_t uxSavedInterruptStatus; + BaseType_t xReturn; + UBaseType_t uxSavedInterruptStatus; configASSERT( pxStreamBuffer ); @@ -1080,7 +1081,7 @@ BaseType_t xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuf eNoAction, pxHigherPriorityTaskWoken ); ( pxStreamBuffer )->xTaskWaitingToSend = NULL; - xReturn = pdTRUE; + xReturn = pdTRUE; } else { @@ -1101,12 +1102,12 @@ static size_t prvWriteBytesToBuffer( StreamBuffer_t * const pxStreamBuffer, configASSERT( xCount > ( size_t ) 0 ); - xNextHead = pxStreamBuffer->xHead; + xNextHead = pxStreamBuffer->xHead; /* Calculate the number of bytes that can be added in the first write - * which may be less than the total number of bytes that need to be added if * the buffer will wrap back to the beginning. */ - xFirstLength = configMIN( pxStreamBuffer->xLength - xNextHead, xCount ); + xFirstLength = configMIN( pxStreamBuffer->xLength - xNextHead, xCount ); /* Write as many bytes as can be written in the first write. */ configASSERT( ( xNextHead + xFirstLength ) <= pxStreamBuffer->xLength ); @@ -1125,7 +1126,7 @@ static size_t prvWriteBytesToBuffer( StreamBuffer_t * const pxStreamBuffer, mtCOVERAGE_TEST_MARKER(); } - xNextHead += xCount; + xNextHead += xCount; if( xNextHead >= pxStreamBuffer->xLength ) { @@ -1154,12 +1155,12 @@ static size_t prvReadBytesFromBuffer( StreamBuffer_t * pxStreamBuffer, if( xCount > ( size_t ) 0 ) { - xNextTail = pxStreamBuffer->xTail; + xNextTail = pxStreamBuffer->xTail; /* Calculate the number of bytes that can be read - which may be * less than the number wanted if the data wraps around to the start of * the buffer. */ - xFirstLength = configMIN( pxStreamBuffer->xLength - xNextTail, xCount ); + xFirstLength = configMIN( pxStreamBuffer->xLength - xNextTail, xCount ); /* Obtain the number of bytes it is possible to obtain in the first * read. Asserts check bounds of read and write. */ @@ -1182,7 +1183,7 @@ static size_t prvReadBytesFromBuffer( StreamBuffer_t * pxStreamBuffer, /* Move the tail pointer to effectively remove the data read from * the buffer. */ - xNextTail += xCount; + xNextTail += xCount; if( xNextTail >= pxStreamBuffer->xLength ) { @@ -1205,7 +1206,7 @@ static size_t prvBytesInBuffer( const StreamBuffer_t * const pxStreamBuffer ) /* Returns the distance between xTail and xHead. */ size_t xCount; - xCount = pxStreamBuffer->xLength + pxStreamBuffer->xHead; + xCount = pxStreamBuffer->xLength + pxStreamBuffer->xHead; xCount -= pxStreamBuffer->xTail; if( xCount >= pxStreamBuffer->xLength ) @@ -1241,10 +1242,10 @@ static void prvInitialiseNewStreamBuffer( StreamBuffer_t * const pxStreamBuffer, #endif ( void ) memset( ( void * ) pxStreamBuffer, 0x00, sizeof( StreamBuffer_t ) ); /*lint !e9087 memset() requires void *. */ - pxStreamBuffer->pucBuffer = pucBuffer; - pxStreamBuffer->xLength = xBufferSizeBytes; + pxStreamBuffer->pucBuffer = pucBuffer; + pxStreamBuffer->xLength = xBufferSizeBytes; pxStreamBuffer->xTriggerLevelBytes = xTriggerLevelBytes; - pxStreamBuffer->ucFlags = ucFlags; + pxStreamBuffer->ucFlags = ucFlags; } #if ( configUSE_TRACE_FACILITY == 1 ) diff --git a/tasks.c b/tasks.c index 4c5fe06e8..9b9424a99 100644 --- a/tasks.c +++ b/tasks.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Standard includes. */ @@ -203,8 +204,8 @@ /* The delayed tasks list should be empty when the lists are switched. */ \ configASSERT( ( listLIST_IS_EMPTY( pxDelayedTaskList ) ) ); \ \ - pxTemp = pxDelayedTaskList; \ - pxDelayedTaskList = pxOverflowDelayedTaskList; \ + pxTemp = pxDelayedTaskList; \ + pxDelayedTaskList = pxOverflowDelayedTaskList; \ pxOverflowDelayedTaskList = pxTemp; \ xNumOfOverflows++; \ prvResetNextTaskUnblockTime(); \ @@ -335,22 +336,22 @@ typedef tskTCB TCB_t; /*lint -save -e956 A manual analysis and inspection has been used to determine * which static variables must be declared volatile. */ -PRIVILEGED_DATA TCB_t * volatile pxCurrentTCB = NULL; +PRIVILEGED_DATA TCB_t * volatile pxCurrentTCB = NULL; /* Lists for ready and blocked tasks. -------------------- * xDelayedTaskList1 and xDelayedTaskList2 could be move to function scople but * doing so breaks some kernel aware debuggers and debuggers that rely on removing * the static qualifier. */ -PRIVILEGED_DATA static List_t pxReadyTasksLists[ configMAX_PRIORITIES ]; /*< Prioritised ready tasks. */ -PRIVILEGED_DATA static List_t xDelayedTaskList1; /*< Delayed tasks. */ -PRIVILEGED_DATA static List_t xDelayedTaskList2; /*< Delayed tasks (two lists are used - one for delays that have overflowed the current tick count. */ -PRIVILEGED_DATA static List_t * volatile pxDelayedTaskList; /*< Points to the delayed task list currently being used. */ -PRIVILEGED_DATA static List_t * volatile pxOverflowDelayedTaskList; /*< Points to the delayed task list currently being used to hold tasks that have overflowed the current tick count. */ -PRIVILEGED_DATA static List_t xPendingReadyList; /*< Tasks that have been readied while the scheduler was suspended. They will be moved to the ready list when the scheduler is resumed. */ +PRIVILEGED_DATA static List_t pxReadyTasksLists[ configMAX_PRIORITIES ]; /*< Prioritised ready tasks. */ +PRIVILEGED_DATA static List_t xDelayedTaskList1; /*< Delayed tasks. */ +PRIVILEGED_DATA static List_t xDelayedTaskList2; /*< Delayed tasks (two lists are used - one for delays that have overflowed the current tick count. */ +PRIVILEGED_DATA static List_t * volatile pxDelayedTaskList; /*< Points to the delayed task list currently being used. */ +PRIVILEGED_DATA static List_t * volatile pxOverflowDelayedTaskList; /*< Points to the delayed task list currently being used to hold tasks that have overflowed the current tick count. */ +PRIVILEGED_DATA static List_t xPendingReadyList; /*< Tasks that have been readied while the scheduler was suspended. They will be moved to the ready list when the scheduler is resumed. */ #if ( INCLUDE_vTaskDelete == 1 ) - PRIVILEGED_DATA static List_t xTasksWaitingTermination; /*< Tasks that have been deleted - but their memory not yet freed. */ + PRIVILEGED_DATA static List_t xTasksWaitingTermination; /*< Tasks that have been deleted - but their memory not yet freed. */ PRIVILEGED_DATA static volatile UBaseType_t uxDeletedTasksWaitingCleanUp = ( UBaseType_t ) 0U; #endif @@ -368,16 +369,16 @@ PRIVILEGED_DATA static List_t xPendingReadyList; #endif /* Other file private variables. --------------------------------*/ -PRIVILEGED_DATA static volatile UBaseType_t uxCurrentNumberOfTasks = ( UBaseType_t ) 0U; -PRIVILEGED_DATA static volatile TickType_t xTickCount = ( TickType_t ) configINITIAL_TICK_COUNT; -PRIVILEGED_DATA static volatile UBaseType_t uxTopReadyPriority = tskIDLE_PRIORITY; -PRIVILEGED_DATA static volatile BaseType_t xSchedulerRunning = pdFALSE; -PRIVILEGED_DATA static volatile TickType_t xPendedTicks = ( TickType_t ) 0U; -PRIVILEGED_DATA static volatile BaseType_t xYieldPending = pdFALSE; -PRIVILEGED_DATA static volatile BaseType_t xNumOfOverflows = ( BaseType_t ) 0; -PRIVILEGED_DATA static UBaseType_t uxTaskNumber = ( UBaseType_t ) 0U; -PRIVILEGED_DATA static volatile TickType_t xNextTaskUnblockTime = ( TickType_t ) 0U; /* Initialised to portMAX_DELAY before the scheduler starts. */ -PRIVILEGED_DATA static TaskHandle_t xIdleTaskHandle = NULL; /*< Holds the handle of the idle task. The idle task is created automatically when the scheduler is started. */ +PRIVILEGED_DATA static volatile UBaseType_t uxCurrentNumberOfTasks = ( UBaseType_t ) 0U; +PRIVILEGED_DATA static volatile TickType_t xTickCount = ( TickType_t ) configINITIAL_TICK_COUNT; +PRIVILEGED_DATA static volatile UBaseType_t uxTopReadyPriority = tskIDLE_PRIORITY; +PRIVILEGED_DATA static volatile BaseType_t xSchedulerRunning = pdFALSE; +PRIVILEGED_DATA static volatile TickType_t xPendedTicks = ( TickType_t ) 0U; +PRIVILEGED_DATA static volatile BaseType_t xYieldPending = pdFALSE; +PRIVILEGED_DATA static volatile BaseType_t xNumOfOverflows = ( BaseType_t ) 0; +PRIVILEGED_DATA static UBaseType_t uxTaskNumber = ( UBaseType_t ) 0U; +PRIVILEGED_DATA static volatile TickType_t xNextTaskUnblockTime = ( TickType_t ) 0U; /* Initialised to portMAX_DELAY before the scheduler starts. */ +PRIVILEGED_DATA static TaskHandle_t xIdleTaskHandle = NULL; /*< Holds the handle of the idle task. The idle task is created automatically when the scheduler is started. */ /* Context switches are held pending while the scheduler is suspended. Also, * interrupts must not manipulate the xStateListItem of a TCB, or any of the @@ -387,14 +388,14 @@ PRIVILEGED_DATA static TaskHandle_t xIdleTaskHandle = N * kernel to move the task from the pending ready list into the real ready list * when the scheduler is unsuspended. The pending ready list itself can only be * accessed from a critical section. */ -PRIVILEGED_DATA static volatile UBaseType_t uxSchedulerSuspended = ( UBaseType_t ) pdFALSE; +PRIVILEGED_DATA static volatile UBaseType_t uxSchedulerSuspended = ( UBaseType_t ) pdFALSE; #if ( configGENERATE_RUN_TIME_STATS == 1 ) /* Do not move these variables to function scope as doing so prevents the * code working with debuggers that need to remove the static qualifier. */ - PRIVILEGED_DATA static uint32_t ulTaskSwitchedInTime = 0UL; /*< Holds the value of a timer/counter the last time a task was switched in. */ - PRIVILEGED_DATA static volatile uint32_t ulTotalRunTime = 0UL; /*< Holds the total amount of execution time as defined by the run time counter clock. */ + PRIVILEGED_DATA static uint32_t ulTaskSwitchedInTime = 0UL; /*< Holds the value of a timer/counter the last time a task was switched in. */ + PRIVILEGED_DATA static volatile uint32_t ulTotalRunTime = 0UL; /*< Holds the total amount of execution time as defined by the run time counter clock. */ #endif @@ -595,7 +596,7 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB ) PRIVILEGED_FUNCTION; StackType_t * const puxStackBuffer, StaticTask_t * const pxTaskBuffer ) { - TCB_t * pxNewTCB; + TCB_t * pxNewTCB; TaskHandle_t xReturn; configASSERT( puxStackBuffer != NULL ); @@ -616,7 +617,7 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB ) PRIVILEGED_FUNCTION; { /* The memory used for the task's TCB and stack are passed into this * function - use them. */ - pxNewTCB = ( TCB_t * ) pxTaskBuffer; /*lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */ + pxNewTCB = ( TCB_t * ) pxTaskBuffer; /*lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */ pxNewTCB->pxStack = ( StackType_t * ) puxStackBuffer; #if ( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */ @@ -646,7 +647,7 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB ) PRIVILEGED_FUNCTION; BaseType_t xTaskCreateRestrictedStatic( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t * pxCreatedTask ) { - TCB_t * pxNewTCB; + TCB_t * pxNewTCB; BaseType_t xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY; configASSERT( pxTaskDefinition->puxStackBuffer != NULL ); @@ -657,7 +658,7 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB ) PRIVILEGED_FUNCTION; /* Allocate space for the TCB. Where the memory comes from depends * on the implementation of the port malloc function and whether or * not static allocation is being used. */ - pxNewTCB = ( TCB_t * ) pxTaskDefinition->pxTaskBuffer; + pxNewTCB = ( TCB_t * ) pxTaskDefinition->pxTaskBuffer; /* Store the stack location in the TCB. */ pxNewTCB->pxStack = pxTaskDefinition->puxStackBuffer; @@ -679,7 +680,7 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB ) PRIVILEGED_FUNCTION; pxTaskDefinition->xRegions ); prvAddNewTaskToReadyList( pxNewTCB ); - xReturn = pdPASS; + xReturn = pdPASS; } return xReturn; @@ -693,7 +694,7 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB ) PRIVILEGED_FUNCTION; BaseType_t xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t * pxCreatedTask ) { - TCB_t * pxNewTCB; + TCB_t * pxNewTCB; BaseType_t xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY; configASSERT( pxTaskDefinition->puxStackBuffer ); @@ -728,7 +729,7 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB ) PRIVILEGED_FUNCTION; pxTaskDefinition->xRegions ); prvAddNewTaskToReadyList( pxNewTCB ); - xReturn = pdPASS; + xReturn = pdPASS; } } @@ -747,7 +748,7 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB ) PRIVILEGED_FUNCTION; UBaseType_t uxPriority, TaskHandle_t * const pxCreatedTask ) { - TCB_t * pxNewTCB; + TCB_t * pxNewTCB; BaseType_t xReturn; /* If the stack grows down then allocate the stack then the TCB so the stack @@ -840,8 +841,8 @@ static void prvInitialiseNewTask( TaskFunction_t pxTaskCode, TCB_t * pxNewTCB, const MemoryRegion_t * const xRegions ) { - StackType_t * pxTopOfStack; - UBaseType_t x; + StackType_t * pxTopOfStack; + UBaseType_t x; #if ( portUSING_MPU_WRAPPERS == 1 ) /* Should the task be created in privileged mode? */ @@ -855,7 +856,7 @@ static void prvInitialiseNewTask( TaskFunction_t pxTaskCode, { xRunPrivileged = pdFALSE; } - uxPriority &= ~portPRIVILEGE_BIT; + uxPriority &= ~portPRIVILEGE_BIT; #endif /* portUSING_MPU_WRAPPERS == 1 */ /* Avoid dependency on memset() if it is not required. */ @@ -888,7 +889,7 @@ static void prvInitialiseNewTask( TaskFunction_t pxTaskCode, } #else /* portSTACK_GROWTH */ { - pxTopOfStack = pxNewTCB->pxStack; + pxTopOfStack = pxNewTCB->pxStack; /* Check the alignment of the stack buffer is correct. */ configASSERT( ( ( ( portPOINTER_SIZE_TYPE ) pxNewTCB->pxStack & ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) == 0UL ) ); @@ -945,7 +946,7 @@ static void prvInitialiseNewTask( TaskFunction_t pxTaskCode, #if ( configUSE_MUTEXES == 1 ) { pxNewTCB->uxBasePriority = uxPriority; - pxNewTCB->uxMutexesHeld = 0; + pxNewTCB->uxMutexesHeld = 0; } #endif /* configUSE_MUTEXES */ @@ -1280,7 +1281,7 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB ) const TickType_t xConstTickCount = xTickCount; /* Generate the tick time at which the task wants to wake. */ - xTimeToWake = *pxPreviousWakeTime + xTimeIncrement; + xTimeToWake = *pxPreviousWakeTime + xTimeIncrement; if( xConstTickCount < *pxPreviousWakeTime ) { @@ -1395,8 +1396,8 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB ) eTaskState eTaskGetState( TaskHandle_t xTask ) { - eTaskState eReturn; - List_t const * pxStateList, * pxDelayedList, * pxOverflowedDelayedList; + eTaskState eReturn; + List_t const * pxStateList, * pxDelayedList, * pxOverflowedDelayedList; const TCB_t * const pxTCB = xTask; configASSERT( pxTCB ); @@ -1410,8 +1411,8 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB ) { taskENTER_CRITICAL(); { - pxStateList = listLIST_ITEM_CONTAINER( &( pxTCB->xStateListItem ) ); - pxDelayedList = pxDelayedTaskList; + pxStateList = listLIST_ITEM_CONTAINER( &( pxTCB->xStateListItem ) ); + pxDelayedList = pxDelayedTaskList; pxOverflowedDelayedList = pxOverflowDelayedTaskList; } taskEXIT_CRITICAL(); @@ -1493,13 +1494,13 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB ) UBaseType_t uxTaskPriorityGet( const TaskHandle_t xTask ) { TCB_t const * pxTCB; - UBaseType_t uxReturn; + UBaseType_t uxReturn; taskENTER_CRITICAL(); { /* If null is passed in here then it is the priority of the task * that called uxTaskPriorityGet() that is being queried. */ - pxTCB = prvGetTCBFromHandle( xTask ); + pxTCB = prvGetTCBFromHandle( xTask ); uxReturn = pxTCB->uxPriority; } taskEXIT_CRITICAL(); @@ -1515,7 +1516,7 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB ) UBaseType_t uxTaskPriorityGetFromISR( const TaskHandle_t xTask ) { TCB_t const * pxTCB; - UBaseType_t uxReturn, uxSavedInterruptState; + UBaseType_t uxReturn, uxSavedInterruptState; /* RTOS ports that support interrupt nesting have the concept of a * maximum system call (or maximum API call) interrupt priority. @@ -1539,7 +1540,7 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB ) { /* If null is passed in here then it is the priority of the calling * task that is being queried. */ - pxTCB = prvGetTCBFromHandle( xTask ); + pxTCB = prvGetTCBFromHandle( xTask ); uxReturn = pxTCB->uxPriority; } portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptState ); @@ -1555,9 +1556,9 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB ) void vTaskPrioritySet( TaskHandle_t xTask, UBaseType_t uxNewPriority ) { - TCB_t * pxTCB; + TCB_t * pxTCB; UBaseType_t uxCurrentBasePriority, uxPriorityUsedOnEntry; - BaseType_t xYieldRequired = pdFALSE; + BaseType_t xYieldRequired = pdFALSE; configASSERT( ( uxNewPriority < configMAX_PRIORITIES ) ); @@ -1826,8 +1827,8 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB ) static BaseType_t prvTaskIsTaskSuspended( const TaskHandle_t xTask ) { - BaseType_t xReturn = pdFALSE; - const TCB_t * const pxTCB = xTask; + BaseType_t xReturn = pdFALSE; + const TCB_t * const pxTCB = xTask; /* Accesses xPendingReadyList so must be called from a critical * section. */ @@ -1926,9 +1927,9 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB ) BaseType_t xTaskResumeFromISR( TaskHandle_t xTaskToResume ) { - BaseType_t xYieldRequired = pdFALSE; - TCB_t * const pxTCB = xTaskToResume; - UBaseType_t uxSavedInterruptStatus; + BaseType_t xYieldRequired = pdFALSE; + TCB_t * const pxTCB = xTaskToResume; + UBaseType_t uxSavedInterruptStatus; configASSERT( xTaskToResume ); @@ -2001,9 +2002,9 @@ void vTaskStartScheduler( void ) /* Add the idle task at the lowest priority. */ #if ( configSUPPORT_STATIC_ALLOCATION == 1 ) { - StaticTask_t * pxIdleTaskTCBBuffer = NULL; - StackType_t * pxIdleTaskStackBuffer = NULL; - uint32_t ulIdleTaskStackSize; + StaticTask_t * pxIdleTaskTCBBuffer = NULL; + StackType_t * pxIdleTaskStackBuffer = NULL; + uint32_t ulIdleTaskStackSize; /* The Idle task is created using user provided RAM - obtain the * address of the RAM then create the idle task. */ @@ -2079,8 +2080,8 @@ void vTaskStartScheduler( void ) #endif /* configUSE_NEWLIB_REENTRANT */ xNextTaskUnblockTime = portMAX_DELAY; - xSchedulerRunning = pdTRUE; - xTickCount = ( TickType_t ) configINITIAL_TICK_COUNT; + xSchedulerRunning = pdTRUE; + xTickCount = ( TickType_t ) configINITIAL_TICK_COUNT; /* If configGENERATE_RUN_TIME_STATS is defined then the following * macro must be defined to configure the timer/counter used to generate @@ -2154,7 +2155,7 @@ void vTaskSuspendAll( void ) static TickType_t prvGetExpectedIdleTime( void ) { - TickType_t xReturn; + TickType_t xReturn; UBaseType_t uxHigherPriorityReadyTasks = pdFALSE; /* uxHigherPriorityReadyTasks takes care of the case where @@ -2215,7 +2216,7 @@ void vTaskSuspendAll( void ) BaseType_t xTaskResumeAll( void ) { - TCB_t * pxTCB = NULL; + TCB_t * pxTCB = NULL; BaseType_t xAlreadyYielded = pdFALSE; /* If uxSchedulerSuspended is zero then this function does not match a @@ -2341,7 +2342,7 @@ TickType_t xTaskGetTickCount( void ) TickType_t xTaskGetTickCountFromISR( void ) { - TickType_t xReturn; + TickType_t xReturn; UBaseType_t uxSavedInterruptStatus; /* RTOS ports that support interrupt nesting have the concept of a maximum @@ -2395,10 +2396,10 @@ char * pcTaskGetName( TaskHandle_t xTaskToQuery ) /*lint !e971 Unqualified char static TCB_t * prvSearchForNameWithinSingleList( List_t * pxList, const char pcNameToQuery[] ) { - TCB_t * pxNextTCB, * pxFirstTCB, * pxReturn = NULL; + TCB_t * pxNextTCB, * pxFirstTCB, * pxReturn = NULL; UBaseType_t x; - char cNextChar; - BaseType_t xBreakLoop; + char cNextChar; + BaseType_t xBreakLoop; /* This function is called with the scheduler suspended. */ @@ -2427,7 +2428,7 @@ char * pcTaskGetName( TaskHandle_t xTaskToQuery ) /*lint !e971 Unqualified char { /* Both strings terminated, a match must have been * found. */ - pxReturn = pxNextTCB; + pxReturn = pxNextTCB; xBreakLoop = pdTRUE; } else @@ -2464,7 +2465,7 @@ char * pcTaskGetName( TaskHandle_t xTaskToQuery ) /*lint !e971 Unqualified char TaskHandle_t xTaskGetHandle( const char * pcNameToQuery ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ { UBaseType_t uxQueue = configMAX_PRIORITIES; - TCB_t * pxTCB; + TCB_t * pxTCB; /* Task names will be truncated to configMAX_TASK_NAME_LEN - 1 bytes. */ configASSERT( strlen( pcNameToQuery ) < configMAX_TASK_NAME_LEN ); @@ -2641,7 +2642,7 @@ BaseType_t xTaskCatchUpTicks( TickType_t xTicksToCatchUp ) /* Use xPendedTicks to mimic xTicksToCatchUp number of ticks occurring when * the scheduler is suspended so the ticks are executed in xTaskResumeAll(). */ vTaskSuspendAll(); - xPendedTicks += xTicksToCatchUp; + xPendedTicks += xTicksToCatchUp; xYieldOccurred = xTaskResumeAll(); return xYieldOccurred; @@ -2652,7 +2653,7 @@ BaseType_t xTaskCatchUpTicks( TickType_t xTicksToCatchUp ) BaseType_t xTaskAbortDelay( TaskHandle_t xTask ) { - TCB_t * pxTCB = xTask; + TCB_t * pxTCB = xTask; BaseType_t xReturn; configASSERT( pxTCB ); @@ -2730,7 +2731,7 @@ BaseType_t xTaskCatchUpTicks( TickType_t xTicksToCatchUp ) BaseType_t xTaskIncrementTick( void ) { - TCB_t * pxTCB; + TCB_t * pxTCB; TickType_t xItemValue; BaseType_t xSwitchRequired = pdFALSE; @@ -2782,7 +2783,7 @@ BaseType_t xTaskIncrementTick( void ) * item at the head of the delayed list. This is the time * at which the task at the head of the delayed list must * be removed from the Blocked state. */ - pxTCB = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ + pxTCB = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ xItemValue = listGET_LIST_ITEM_VALUE( &( pxTCB->xStateListItem ) ); if( xConstTickCount < xItemValue ) @@ -2935,7 +2936,7 @@ BaseType_t xTaskIncrementTick( void ) TaskHookFunction_t xTaskGetApplicationTaskTag( TaskHandle_t xTask ) { - TCB_t * pxTCB; + TCB_t * pxTCB; TaskHookFunction_t xReturn; /* If xTask is NULL then set the calling task's hook. */ @@ -2959,12 +2960,12 @@ BaseType_t xTaskIncrementTick( void ) TaskHookFunction_t xTaskGetApplicationTaskTagFromISR( TaskHandle_t xTask ) { - TCB_t * pxTCB; + TCB_t * pxTCB; TaskHookFunction_t xReturn; - UBaseType_t uxSavedInterruptStatus; + UBaseType_t uxSavedInterruptStatus; /* If xTask is NULL then set the calling task's hook. */ - pxTCB = prvGetTCBFromHandle( xTask ); + pxTCB = prvGetTCBFromHandle( xTask ); /* Save the hook function in the TCB. A critical section is required as * the value can be accessed from an interrupt. */ @@ -2985,7 +2986,7 @@ BaseType_t xTaskIncrementTick( void ) BaseType_t xTaskCallApplicationTaskHook( TaskHandle_t xTask, void * pvParameter ) { - TCB_t * xTCB; + TCB_t * xTCB; BaseType_t xReturn; /* If xTask is NULL then we are calling our own task hook. */ @@ -3031,7 +3032,7 @@ void vTaskSwitchContext( void ) #ifdef portALT_GET_RUN_TIME_COUNTER_VALUE portALT_GET_RUN_TIME_COUNTER_VALUE( ulTotalRunTime ); #else - ulTotalRunTime = portGET_RUN_TIME_COUNTER_VALUE(); + ulTotalRunTime = portGET_RUN_TIME_COUNTER_VALUE(); #endif /* Add the amount of time the task has been running to the @@ -3170,7 +3171,7 @@ void vTaskPlaceOnUnorderedEventList( List_t * pxEventList, BaseType_t xTaskRemoveFromEventList( const List_t * const pxEventList ) { - TCB_t * pxUnblockedTCB; + TCB_t * pxUnblockedTCB; BaseType_t xReturn; /* THIS FUNCTION MUST BE CALLED FROM A CRITICAL SECTION. It can also be @@ -3221,7 +3222,7 @@ BaseType_t xTaskRemoveFromEventList( const List_t * const pxEventList ) /* Return true if the task removed from the event list has a higher * priority than the calling task. This allows the calling task to know if * it should force a context switch now. */ - xReturn = pdTRUE; + xReturn = pdTRUE; /* Mark that a yield is pending in case the user is not using the * "xHigherPriorityTaskWoken" parameter to an ISR safe FreeRTOS function. */ @@ -3290,7 +3291,7 @@ void vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) configASSERT( pxTimeOut ); taskENTER_CRITICAL(); { - pxTimeOut->xOverflowCount = xNumOfOverflows; + pxTimeOut->xOverflowCount = xNumOfOverflows; pxTimeOut->xTimeOnEntering = xTickCount; } taskEXIT_CRITICAL(); @@ -3300,7 +3301,7 @@ void vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) void vTaskInternalSetTimeOutState( TimeOut_t * const pxTimeOut ) { /* For internal use only as it does not use a critical section. */ - pxTimeOut->xOverflowCount = xNumOfOverflows; + pxTimeOut->xOverflowCount = xNumOfOverflows; pxTimeOut->xTimeOnEntering = xTickCount; } /*-----------------------------------------------------------*/ @@ -3317,7 +3318,7 @@ BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, { /* Minor optimisation. The tick count cannot change in this block. */ const TickType_t xConstTickCount = xTickCount; - const TickType_t xElapsedTime = xConstTickCount - pxTimeOut->xTimeOnEntering; + const TickType_t xElapsedTime = xConstTickCount - pxTimeOut->xTimeOnEntering; #if ( INCLUDE_xTaskAbortDelay == 1 ) if( pxCurrentTCB->ucDelayAborted != ( uint8_t ) pdFALSE ) @@ -3325,7 +3326,7 @@ BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, /* The delay was aborted, which is not the same as a time out, * but has the same result. */ pxCurrentTCB->ucDelayAborted = pdFALSE; - xReturn = pdTRUE; + xReturn = pdTRUE; } else #endif @@ -3355,12 +3356,12 @@ BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, /* Not a genuine timeout. Adjust parameters for time remaining. */ *pxTicksToWait -= xElapsedTime; vTaskInternalSetTimeOutState( pxTimeOut ); - xReturn = pdFALSE; + xReturn = pdFALSE; } else { *pxTicksToWait = 0; - xReturn = pdTRUE; + xReturn = pdTRUE; } } taskEXIT_CRITICAL(); @@ -3379,12 +3380,12 @@ void vTaskMissedYield( void ) UBaseType_t uxTaskGetTaskNumber( TaskHandle_t xTask ) { - UBaseType_t uxReturn; + UBaseType_t uxReturn; TCB_t const * pxTCB; if( xTask != NULL ) { - pxTCB = xTask; + pxTCB = xTask; uxReturn = pxTCB->uxTaskNumber; } else @@ -3407,7 +3408,7 @@ void vTaskMissedYield( void ) if( xTask != NULL ) { - pxTCB = xTask; + pxTCB = xTask; pxTCB->uxTaskNumber = uxHandle; } } @@ -3548,7 +3549,7 @@ static portTASK_FUNCTION( prvIdleTask, pvParameters ) { /* The idle task exists in addition to the application tasks. */ const UBaseType_t uxNonApplicationTasks = 1; - eSleepModeStatus eReturn = eStandardSleep; + eSleepModeStatus eReturn = eStandardSleep; /* This function must be called from a critical section. */ @@ -3600,7 +3601,7 @@ static portTASK_FUNCTION( prvIdleTask, pvParameters ) if( xIndex < configNUM_THREAD_LOCAL_STORAGE_POINTERS ) { - pxTCB = prvGetTCBFromHandle( xTaskToSet ); + pxTCB = prvGetTCBFromHandle( xTaskToSet ); configASSERT( pxTCB != NULL ); pxTCB->pvThreadLocalStoragePointers[ xIndex ] = pvValue; } @@ -3614,12 +3615,12 @@ static portTASK_FUNCTION( prvIdleTask, pvParameters ) void * pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, BaseType_t xIndex ) { - void * pvReturn = NULL; + void * pvReturn = NULL; TCB_t * pxTCB; if( xIndex < configNUM_THREAD_LOCAL_STORAGE_POINTERS ) { - pxTCB = prvGetTCBFromHandle( xTaskToQuery ); + pxTCB = prvGetTCBFromHandle( xTaskToQuery ); pvReturn = pxTCB->pvThreadLocalStoragePointers[ xIndex ]; } else @@ -3677,7 +3678,7 @@ static void prvInitialiseTaskLists( void ) /* Start with pxDelayedTaskList using list1 and the pxOverflowDelayedTaskList * using list2. */ - pxDelayedTaskList = &xDelayedTaskList1; + pxDelayedTaskList = &xDelayedTaskList1; pxOverflowDelayedTaskList = &xDelayedTaskList2; } /*-----------------------------------------------------------*/ @@ -3720,13 +3721,13 @@ static void prvCheckTasksWaitingTermination( void ) TCB_t * pxTCB; /* xTask is NULL then get the state of the calling task. */ - pxTCB = prvGetTCBFromHandle( xTask ); + pxTCB = prvGetTCBFromHandle( xTask ); - pxTaskStatus->xHandle = ( TaskHandle_t ) pxTCB; - pxTaskStatus->pcTaskName = ( const char * ) &( pxTCB->pcTaskName[ 0 ] ); + pxTaskStatus->xHandle = ( TaskHandle_t ) pxTCB; + pxTaskStatus->pcTaskName = ( const char * ) &( pxTCB->pcTaskName[ 0 ] ); pxTaskStatus->uxCurrentPriority = pxTCB->uxPriority; - pxTaskStatus->pxStackBase = pxTCB->pxStack; - pxTaskStatus->xTaskNumber = pxTCB->uxTCBNumber; + pxTaskStatus->pxStackBase = pxTCB->pxStack; + pxTaskStatus->xTaskNumber = pxTCB->uxTCBNumber; #if ( configUSE_MUTEXES == 1 ) { @@ -3816,7 +3817,7 @@ static void prvCheckTasksWaitingTermination( void ) eTaskState eState ) { configLIST_VOLATILE TCB_t * pxNextTCB, * pxFirstTCB; - UBaseType_t uxTask = 0; + UBaseType_t uxTask = 0; if( listCURRENT_LIST_LENGTH( pxList ) > ( UBaseType_t ) 0 ) { @@ -3873,8 +3874,8 @@ static void prvCheckTasksWaitingTermination( void ) * applications that expect an 8-bit return type. */ configSTACK_DEPTH_TYPE uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) { - TCB_t * pxTCB; - uint8_t * pucEndOfStack; + TCB_t * pxTCB; + uint8_t * pucEndOfStack; configSTACK_DEPTH_TYPE uxReturn; /* uxTaskGetStackHighWaterMark() and uxTaskGetStackHighWaterMark2() are @@ -3884,7 +3885,7 @@ static void prvCheckTasksWaitingTermination( void ) * backward compatibility for applications that expect an 8-bit return * type. */ - pxTCB = prvGetTCBFromHandle( xTask ); + pxTCB = prvGetTCBFromHandle( xTask ); #if portSTACK_GROWTH < 0 { @@ -3908,11 +3909,11 @@ static void prvCheckTasksWaitingTermination( void ) UBaseType_t uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) { - TCB_t * pxTCB; - uint8_t * pucEndOfStack; + TCB_t * pxTCB; + uint8_t * pucEndOfStack; UBaseType_t uxReturn; - pxTCB = prvGetTCBFromHandle( xTask ); + pxTCB = prvGetTCBFromHandle( xTask ); #if portSTACK_GROWTH < 0 { @@ -4061,7 +4062,7 @@ static void prvResetNextTaskUnblockTime( void ) BaseType_t xTaskPriorityInherit( TaskHandle_t const pxMutexHolder ) { TCB_t * const pxMutexHolderTCB = pxMutexHolder; - BaseType_t xReturn = pdFALSE; + BaseType_t xReturn = pdFALSE; /* If the mutex was given back by an interrupt while the queue was * locked then the mutex holder might now be NULL. _RB_ Is this still @@ -4150,8 +4151,8 @@ static void prvResetNextTaskUnblockTime( void ) BaseType_t xTaskPriorityDisinherit( TaskHandle_t const pxMutexHolder ) { - TCB_t * const pxTCB = pxMutexHolder; - BaseType_t xReturn = pdFALSE; + TCB_t * const pxTCB = pxMutexHolder; + BaseType_t xReturn = pdFALSE; if( pxMutexHolder != NULL ) { @@ -4203,7 +4204,7 @@ static void prvResetNextTaskUnblockTime( void ) * returned, even if a task was waiting on it, then a context * switch should occur when the last mutex is returned whether * a task is waiting on it or not. */ - xReturn = pdTRUE; + xReturn = pdTRUE; } else { @@ -4231,8 +4232,8 @@ static void prvResetNextTaskUnblockTime( void ) void vTaskPriorityDisinheritAfterTimeout( TaskHandle_t const pxMutexHolder, UBaseType_t uxHighestPriorityWaitingTask ) { - TCB_t * const pxTCB = pxMutexHolder; - UBaseType_t uxPriorityUsedOnEntry, uxPriorityToUse; + TCB_t * const pxTCB = pxMutexHolder; + UBaseType_t uxPriorityUsedOnEntry, uxPriorityToUse; const UBaseType_t uxOnlyOneMutexHeld = ( UBaseType_t ) 1; if( pxMutexHolder != NULL ) @@ -4273,7 +4274,7 @@ static void prvResetNextTaskUnblockTime( void ) * state. */ traceTASK_PRIORITY_DISINHERIT( pxTCB, uxPriorityToUse ); uxPriorityUsedOnEntry = pxTCB->uxPriority; - pxTCB->uxPriority = uxPriorityToUse; + pxTCB->uxPriority = uxPriorityToUse; /* Only reset the event list item value if the value is not * being used for anything else. */ @@ -4427,8 +4428,8 @@ static void prvResetNextTaskUnblockTime( void ) void vTaskList( char * pcWriteBuffer ) { TaskStatus_t * pxTaskStatusArray; - UBaseType_t uxArraySize, x; - char cStatus; + UBaseType_t uxArraySize, x; + char cStatus; /* * PLEASE NOTE: @@ -4456,11 +4457,11 @@ static void prvResetNextTaskUnblockTime( void ) /* Make sure the write buffer does not contain a string. */ - *pcWriteBuffer = ( char ) 0x00; + *pcWriteBuffer = ( char ) 0x00; /* Take a snapshot of the number of tasks in case it changes while this * function is executing. */ - uxArraySize = uxCurrentNumberOfTasks; + uxArraySize = uxCurrentNumberOfTasks; /* Allocate an array index for each task. NOTE! if * configSUPPORT_DYNAMIC_ALLOCATION is set to 0 then pvPortMalloc() will @@ -4506,7 +4507,7 @@ static void prvResetNextTaskUnblockTime( void ) /* Write the task name to the string, padding with spaces so it * can be printed in tabular form more easily. */ - pcWriteBuffer = prvWriteNameToBuffer( pcWriteBuffer, pxTaskStatusArray[ x ].pcTaskName ); + pcWriteBuffer = prvWriteNameToBuffer( pcWriteBuffer, pxTaskStatusArray[ x ].pcTaskName ); /* Write the rest of the string. */ sprintf( pcWriteBuffer, "\t%c\t%u\t%u\t%u\r\n", cStatus, ( unsigned int ) pxTaskStatusArray[ x ].uxCurrentPriority, ( unsigned int ) pxTaskStatusArray[ x ].usStackHighWaterMark, ( unsigned int ) pxTaskStatusArray[ x ].xTaskNumber ); /*lint !e586 sprintf() allowed as this is compiled with many compilers and this is a utility function only - not part of the core kernel implementation. */ @@ -4531,8 +4532,8 @@ static void prvResetNextTaskUnblockTime( void ) void vTaskGetRunTimeStats( char * pcWriteBuffer ) { TaskStatus_t * pxTaskStatusArray; - UBaseType_t uxArraySize, x; - uint32_t ulTotalTime, ulStatsAsPercentage; + UBaseType_t uxArraySize, x; + uint32_t ulTotalTime, ulStatsAsPercentage; #if ( configUSE_TRACE_FACILITY != 1 ) { @@ -4566,11 +4567,11 @@ static void prvResetNextTaskUnblockTime( void ) */ /* Make sure the write buffer does not contain a string. */ - *pcWriteBuffer = ( char ) 0x00; + *pcWriteBuffer = ( char ) 0x00; /* Take a snapshot of the number of tasks in case it changes while this * function is executing. */ - uxArraySize = uxCurrentNumberOfTasks; + uxArraySize = uxCurrentNumberOfTasks; /* Allocate an array index for each task. NOTE! If * configSUPPORT_DYNAMIC_ALLOCATION is set to 0 then pvPortMalloc() will @@ -4580,7 +4581,7 @@ static void prvResetNextTaskUnblockTime( void ) if( pxTaskStatusArray != NULL ) { /* Generate the (binary) data. */ - uxArraySize = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, &ulTotalTime ); + uxArraySize = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, &ulTotalTime ); /* For percentage calculations. */ ulTotalTime /= 100UL; @@ -4599,7 +4600,7 @@ static void prvResetNextTaskUnblockTime( void ) /* Write the task name to the string, padding with * spaces so it can be printed in tabular form more * easily. */ - pcWriteBuffer = prvWriteNameToBuffer( pcWriteBuffer, pxTaskStatusArray[ x ].pcTaskName ); + pcWriteBuffer = prvWriteNameToBuffer( pcWriteBuffer, pxTaskStatusArray[ x ].pcTaskName ); if( ulStatsAsPercentage > 0UL ) { @@ -4632,7 +4633,7 @@ static void prvResetNextTaskUnblockTime( void ) #endif } - pcWriteBuffer += strlen( pcWriteBuffer ); /*lint !e9016 Pointer arithmetic ok on char pointers especially as in this case where it best denotes the intent of the code. */ + pcWriteBuffer += strlen( pcWriteBuffer ); /*lint !e9016 Pointer arithmetic ok on char pointers especially as in this case where it best denotes the intent of the code. */ } } else @@ -4728,7 +4729,7 @@ TickType_t uxTaskResetEventItemValue( void ) taskENTER_CRITICAL(); { traceTASK_NOTIFY_TAKE( uxIndexToWait ); - ulReturn = pxCurrentTCB->ulNotifiedValue[ uxIndexToWait ]; + ulReturn = pxCurrentTCB->ulNotifiedValue[ uxIndexToWait ]; if( ulReturn != 0UL ) { @@ -4779,7 +4780,7 @@ TickType_t uxTaskResetEventItemValue( void ) pxCurrentTCB->ulNotifiedValue[ uxIndexToWait ] &= ~ulBitsToClearOnEntry; /* Mark this task as waiting for a notification. */ - pxCurrentTCB->ucNotifyState[ uxIndexToWait ] = taskWAITING_NOTIFICATION; + pxCurrentTCB->ucNotifyState[ uxIndexToWait ] = taskWAITING_NOTIFICATION; if( xTicksToWait > ( TickType_t ) 0 ) { @@ -4829,7 +4830,7 @@ TickType_t uxTaskResetEventItemValue( void ) /* A notification was already pending or a notification was * received while the task was waiting. */ pxCurrentTCB->ulNotifiedValue[ uxIndexToWait ] &= ~ulBitsToClearOnExit; - xReturn = pdTRUE; + xReturn = pdTRUE; } pxCurrentTCB->ucNotifyState[ uxIndexToWait ] = taskNOT_WAITING_NOTIFICATION; @@ -4850,9 +4851,9 @@ TickType_t uxTaskResetEventItemValue( void ) eNotifyAction eAction, uint32_t * pulPreviousNotificationValue ) { - TCB_t * pxTCB; + TCB_t * pxTCB; BaseType_t xReturn = pdPASS; - uint8_t ucOriginalNotifyState; + uint8_t ucOriginalNotifyState; configASSERT( uxIndexToNotify < configTASK_NOTIFICATION_ARRAY_ENTRIES ); configASSERT( xTaskToNotify ); @@ -4865,7 +4866,7 @@ TickType_t uxTaskResetEventItemValue( void ) *pulPreviousNotificationValue = pxTCB->ulNotifiedValue[ uxIndexToNotify ]; } - ucOriginalNotifyState = pxTCB->ucNotifyState[ uxIndexToNotify ]; + ucOriginalNotifyState = pxTCB->ucNotifyState[ uxIndexToNotify ]; pxTCB->ucNotifyState[ uxIndexToNotify ] = taskNOTIFICATION_RECEIVED; @@ -4880,7 +4881,7 @@ TickType_t uxTaskResetEventItemValue( void ) break; case eSetValueWithOverwrite: - pxTCB->ulNotifiedValue[ uxIndexToNotify ] = ulValue; + pxTCB->ulNotifiedValue[ uxIndexToNotify ] = ulValue; break; case eSetValueWithoutOverwrite: @@ -4974,9 +4975,9 @@ TickType_t uxTaskResetEventItemValue( void ) uint32_t * pulPreviousNotificationValue, BaseType_t * pxHigherPriorityTaskWoken ) { - TCB_t * pxTCB; - uint8_t ucOriginalNotifyState; - BaseType_t xReturn = pdPASS; + TCB_t * pxTCB; + uint8_t ucOriginalNotifyState; + BaseType_t xReturn = pdPASS; UBaseType_t uxSavedInterruptStatus; configASSERT( xTaskToNotify ); @@ -5000,7 +5001,7 @@ TickType_t uxTaskResetEventItemValue( void ) * http://www.freertos.org/RTOS-Cortex-M3-M4.html */ portASSERT_IF_INTERRUPT_PRIORITY_INVALID(); - pxTCB = xTaskToNotify; + pxTCB = xTaskToNotify; uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); { @@ -5009,7 +5010,7 @@ TickType_t uxTaskResetEventItemValue( void ) *pulPreviousNotificationValue = pxTCB->ulNotifiedValue[ uxIndexToNotify ]; } - ucOriginalNotifyState = pxTCB->ucNotifyState[ uxIndexToNotify ]; + ucOriginalNotifyState = pxTCB->ucNotifyState[ uxIndexToNotify ]; pxTCB->ucNotifyState[ uxIndexToNotify ] = taskNOTIFICATION_RECEIVED; switch( eAction ) @@ -5023,7 +5024,7 @@ TickType_t uxTaskResetEventItemValue( void ) break; case eSetValueWithOverwrite: - pxTCB->ulNotifiedValue[ uxIndexToNotify ] = ulValue; + pxTCB->ulNotifiedValue[ uxIndexToNotify ] = ulValue; break; case eSetValueWithoutOverwrite: @@ -5110,8 +5111,8 @@ TickType_t uxTaskResetEventItemValue( void ) UBaseType_t uxIndexToNotify, BaseType_t * pxHigherPriorityTaskWoken ) { - TCB_t * pxTCB; - uint8_t ucOriginalNotifyState; + TCB_t * pxTCB; + uint8_t ucOriginalNotifyState; UBaseType_t uxSavedInterruptStatus; configASSERT( xTaskToNotify ); @@ -5135,11 +5136,11 @@ TickType_t uxTaskResetEventItemValue( void ) * http://www.freertos.org/RTOS-Cortex-M3-M4.html */ portASSERT_IF_INTERRUPT_PRIORITY_INVALID(); - pxTCB = xTaskToNotify; + pxTCB = xTaskToNotify; uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); { - ucOriginalNotifyState = pxTCB->ucNotifyState[ uxIndexToNotify ]; + ucOriginalNotifyState = pxTCB->ucNotifyState[ uxIndexToNotify ]; pxTCB->ucNotifyState[ uxIndexToNotify ] = taskNOTIFICATION_RECEIVED; /* 'Giving' is equivalent to incrementing a count in a counting @@ -5198,7 +5199,7 @@ TickType_t uxTaskResetEventItemValue( void ) BaseType_t xTaskGenericNotifyStateClear( TaskHandle_t xTask, UBaseType_t uxIndexToClear ) { - TCB_t * pxTCB; + TCB_t * pxTCB; BaseType_t xReturn; configASSERT( uxIndexToClear < configTASK_NOTIFICATION_ARRAY_ENTRIES ); @@ -5212,7 +5213,7 @@ TickType_t uxTaskResetEventItemValue( void ) if( pxTCB->ucNotifyState[ uxIndexToClear ] == taskNOTIFICATION_RECEIVED ) { pxTCB->ucNotifyState[ uxIndexToClear ] = taskNOT_WAITING_NOTIFICATION; - xReturn = pdPASS; + xReturn = pdPASS; } else { @@ -5233,7 +5234,7 @@ TickType_t uxTaskResetEventItemValue( void ) UBaseType_t uxIndexToClear, uint32_t ulBitsToClear ) { - TCB_t * pxTCB; + TCB_t * pxTCB; uint32_t ulReturn; /* If null is passed in here then it is the calling task that is having @@ -5244,7 +5245,7 @@ TickType_t uxTaskResetEventItemValue( void ) { /* Return the notification as it was before the bits were cleared, * then clear the bit mask. */ - ulReturn = pxCurrentTCB->ulNotifiedValue[ uxIndexToClear ]; + ulReturn = pxCurrentTCB->ulNotifiedValue[ uxIndexToClear ]; pxTCB->ulNotifiedValue[ uxIndexToClear ] &= ~ulBitsToClear; } taskEXIT_CRITICAL(); @@ -5268,7 +5269,7 @@ TickType_t uxTaskResetEventItemValue( void ) static void prvAddCurrentTaskToDelayedList( TickType_t xTicksToWait, const BaseType_t xCanBlockIndefinitely ) { - TickType_t xTimeToWake; + TickType_t xTimeToWake; const TickType_t xConstTickCount = xTickCount; #if ( INCLUDE_xTaskAbortDelay == 1 ) diff --git a/timers.c b/timers.c index 7cebee5ce..bd7fc8e46 100644 --- a/timers.c +++ b/timers.c @@ -22,6 +22,7 @@ * http://www.FreeRTOS.org * http://aws.amazon.com/freertos * + * 1 tab == 4 spaces! */ /* Standard includes. */ @@ -131,14 +132,14 @@ * xActiveTimerList1 and xActiveTimerList2 could be at function scope but that * breaks some kernel aware debuggers, and debuggers that reply on removing the * static qualifier. */ - PRIVILEGED_DATA static List_t xActiveTimerList1; - PRIVILEGED_DATA static List_t xActiveTimerList2; - PRIVILEGED_DATA static List_t * pxCurrentTimerList; - PRIVILEGED_DATA static List_t * pxOverflowTimerList; + PRIVILEGED_DATA static List_t xActiveTimerList1; + PRIVILEGED_DATA static List_t xActiveTimerList2; + PRIVILEGED_DATA static List_t * pxCurrentTimerList; + PRIVILEGED_DATA static List_t * pxOverflowTimerList; /* A queue that is used to send commands to the timer service task. */ - PRIVILEGED_DATA static QueueHandle_t xTimerQueue = NULL; - PRIVILEGED_DATA static TaskHandle_t xTimerTaskHandle = NULL; + PRIVILEGED_DATA static QueueHandle_t xTimerQueue = NULL; + PRIVILEGED_DATA static TaskHandle_t xTimerTaskHandle = NULL; /*lint -restore */ @@ -244,9 +245,9 @@ { #if ( configSUPPORT_STATIC_ALLOCATION == 1 ) { - StaticTask_t * pxTimerTaskTCBBuffer = NULL; - StackType_t * pxTimerTaskStackBuffer = NULL; - uint32_t ulTimerTaskStackSize; + StaticTask_t * pxTimerTaskTCBBuffer = NULL; + StackType_t * pxTimerTaskStackBuffer = NULL; + uint32_t ulTimerTaskStackSize; vApplicationGetTimerTaskMemory( &pxTimerTaskTCBBuffer, &pxTimerTaskStackBuffer, &ulTimerTaskStackSize ); xTimerTaskHandle = xTaskCreateStatic( prvTimerTask, @@ -370,10 +371,10 @@ /* Initialise the timer structure members using the function * parameters. */ - pxNewTimer->pcTimerName = pcTimerName; + pxNewTimer->pcTimerName = pcTimerName; pxNewTimer->xTimerPeriodInTicks = xTimerPeriodInTicks; - pxNewTimer->pvTimerID = pvTimerID; - pxNewTimer->pxCallbackFunction = pxCallbackFunction; + pxNewTimer->pvTimerID = pvTimerID; + pxNewTimer->pxCallbackFunction = pxCallbackFunction; vListInitialiseItem( &( pxNewTimer->xTimerListItem ) ); if( uxAutoReload != pdFALSE ) @@ -392,7 +393,7 @@ BaseType_t * const pxHigherPriorityTaskWoken, const TickType_t xTicksToWait ) { - BaseType_t xReturn = pdFAIL; + BaseType_t xReturn = pdFAIL; DaemonTaskMessage_t xMessage; configASSERT( xTimer ); @@ -402,9 +403,9 @@ if( xTimerQueue != NULL ) { /* Send a command to the timer service task to start the xTimer timer. */ - xMessage.xMessageID = xCommandID; + xMessage.xMessageID = xCommandID; xMessage.u.xTimerParameters.xMessageValue = xOptionalValue; - xMessage.u.xTimerParameters.pxTimer = xTimer; + xMessage.u.xTimerParameters.pxTimer = xTimer; if( xCommandID < tmrFIRST_FROM_ISR_COMMAND ) { @@ -474,7 +475,7 @@ UBaseType_t uxTimerGetReloadMode( TimerHandle_t xTimer ) { - Timer_t * pxTimer = xTimer; + Timer_t * pxTimer = xTimer; UBaseType_t uxReturn; configASSERT( xTimer ); @@ -499,7 +500,7 @@ TickType_t xTimerGetExpiryTime( TimerHandle_t xTimer ) { - Timer_t * pxTimer = xTimer; + Timer_t * pxTimer = xTimer; TickType_t xReturn; configASSERT( xTimer ); @@ -520,7 +521,7 @@ static void prvProcessExpiredTimer( const TickType_t xNextExpireTime, const TickType_t xTimeNow ) { - BaseType_t xResult; + BaseType_t xResult; Timer_t * const pxTimer = ( Timer_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList ); /*lint !e9087 !e9079 void * is used as this macro is used with tasks and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ /* Remove the timer from the list of active timers. A check has already @@ -690,7 +691,7 @@ TickType_t xTimeNow; PRIVILEGED_DATA static TickType_t xLastTime = ( TickType_t ) 0U; /*lint !e956 Variable is only accessible to one task. */ - xTimeNow = xTaskGetTickCount(); + xTimeNow = xTaskGetTickCount(); if( xTimeNow < xLastTime ) { @@ -755,9 +756,9 @@ static void prvProcessReceivedCommands( void ) { DaemonTaskMessage_t xMessage; - Timer_t * pxTimer; - BaseType_t xTimerListsWereSwitched, xResult; - TickType_t xTimeNow; + Timer_t * pxTimer; + BaseType_t xTimerListsWereSwitched, xResult; + TickType_t xTimeNow; while( xQueueReceive( xTimerQueue, &xMessage, tmrNO_DELAY ) != pdFAIL ) /*lint !e603 xMessage does not have to be initialised as it is passed out, not in, and it is not used unless xQueueReceive() returns pdTRUE. */ { @@ -789,7 +790,7 @@ { /* The messages uses the xTimerParameters member to work on a * software timer. */ - pxTimer = xMessage.u.xTimerParameters.pxTimer; + pxTimer = xMessage.u.xTimerParameters.pxTimer; if( listIS_CONTAINED_WITHIN( NULL, &( pxTimer->xTimerListItem ) ) == pdFALSE ) /*lint !e961. The cast is only redundant when NULL is passed into the macro. */ { @@ -819,7 +820,7 @@ case tmrCOMMAND_RESET_FROM_ISR: case tmrCOMMAND_START_DONT_TRACE: /* Start or restart a timer. */ - pxTimer->ucStatus |= tmrSTATUS_IS_ACTIVE; + pxTimer->ucStatus |= tmrSTATUS_IS_ACTIVE; if( prvInsertTimerInActiveList( pxTimer, xMessage.u.xTimerParameters.xMessageValue + pxTimer->xTimerPeriodInTicks, xTimeNow, xMessage.u.xTimerParameters.xMessageValue ) != pdFALSE ) { @@ -849,12 +850,12 @@ case tmrCOMMAND_STOP: case tmrCOMMAND_STOP_FROM_ISR: /* The timer has already been removed from the active list. */ - pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE; + pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE; break; case tmrCOMMAND_CHANGE_PERIOD: case tmrCOMMAND_CHANGE_PERIOD_FROM_ISR: - pxTimer->ucStatus |= tmrSTATUS_IS_ACTIVE; + pxTimer->ucStatus |= tmrSTATUS_IS_ACTIVE; pxTimer->xTimerPeriodInTicks = xMessage.u.xTimerParameters.xMessageValue; configASSERT( ( pxTimer->xTimerPeriodInTicks > 0 ) ); @@ -905,8 +906,8 @@ static void prvSwitchTimerLists( void ) { TickType_t xNextExpireTime, xReloadTime; - List_t * pxTemp; - Timer_t * pxTimer; + List_t * pxTemp; + Timer_t * pxTimer; BaseType_t xResult; /* The tick count has overflowed. The timer lists must be switched. @@ -918,7 +919,7 @@ xNextExpireTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxCurrentTimerList ); /* Remove the timer from the list. */ - pxTimer = ( Timer_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList ); /*lint !e9087 !e9079 void * is used as this macro is used with tasks and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ + pxTimer = ( Timer_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList ); /*lint !e9087 !e9079 void * is used as this macro is used with tasks and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ ( void ) uxListRemove( &( pxTimer->xTimerListItem ) ); traceTIMER_EXPIRED( pxTimer ); @@ -956,8 +957,8 @@ } } - pxTemp = pxCurrentTimerList; - pxCurrentTimerList = pxOverflowTimerList; + pxTemp = pxCurrentTimerList; + pxCurrentTimerList = pxOverflowTimerList; pxOverflowTimerList = pxTemp; } /*-----------------------------------------------------------*/ @@ -973,15 +974,15 @@ { vListInitialise( &xActiveTimerList1 ); vListInitialise( &xActiveTimerList2 ); - pxCurrentTimerList = &xActiveTimerList1; + pxCurrentTimerList = &xActiveTimerList1; pxOverflowTimerList = &xActiveTimerList2; #if ( configSUPPORT_STATIC_ALLOCATION == 1 ) { /* The timer queue is allocated statically in case * configSUPPORT_DYNAMIC_ALLOCATION is 0. */ - static StaticQueue_t xStaticTimerQueue; /*lint !e956 Ok to declare in this manner to prevent additional conditional compilation guards in other locations. */ - static uint8_t ucStaticTimerQueueStorage[ ( size_t ) configTIMER_QUEUE_LENGTH * sizeof( DaemonTaskMessage_t ) ]; /*lint !e956 Ok to declare in this manner to prevent additional conditional compilation guards in other locations. */ + static StaticQueue_t xStaticTimerQueue; /*lint !e956 Ok to declare in this manner to prevent additional conditional compilation guards in other locations. */ + static uint8_t ucStaticTimerQueueStorage[ ( size_t ) configTIMER_QUEUE_LENGTH * sizeof( DaemonTaskMessage_t ) ]; /*lint !e956 Ok to declare in this manner to prevent additional conditional compilation guards in other locations. */ xTimerQueue = xQueueCreateStatic( ( UBaseType_t ) configTIMER_QUEUE_LENGTH, ( UBaseType_t ) sizeof( DaemonTaskMessage_t ), &( ucStaticTimerQueueStorage[ 0 ] ), &xStaticTimerQueue ); } @@ -1016,7 +1017,7 @@ BaseType_t xTimerIsTimerActive( TimerHandle_t xTimer ) { BaseType_t xReturn; - Timer_t * pxTimer = xTimer; + Timer_t * pxTimer = xTimer; configASSERT( xTimer ); @@ -1041,7 +1042,7 @@ void * pvTimerGetTimerID( const TimerHandle_t xTimer ) { Timer_t * const pxTimer = xTimer; - void * pvReturn; + void * pvReturn; configASSERT( xTimer ); @@ -1078,14 +1079,14 @@ BaseType_t * pxHigherPriorityTaskWoken ) { DaemonTaskMessage_t xMessage; - BaseType_t xReturn; + BaseType_t xReturn; /* Complete the message with the function parameters and post it to the * daemon task. */ - xMessage.xMessageID = tmrCOMMAND_EXECUTE_CALLBACK_FROM_ISR; + xMessage.xMessageID = tmrCOMMAND_EXECUTE_CALLBACK_FROM_ISR; xMessage.u.xCallbackParameters.pxCallbackFunction = xFunctionToPend; - xMessage.u.xCallbackParameters.pvParameter1 = pvParameter1; - xMessage.u.xCallbackParameters.ulParameter2 = ulParameter2; + xMessage.u.xCallbackParameters.pvParameter1 = pvParameter1; + xMessage.u.xCallbackParameters.ulParameter2 = ulParameter2; xReturn = xQueueSendFromISR( xTimerQueue, &xMessage, pxHigherPriorityTaskWoken ); @@ -1105,7 +1106,7 @@ TickType_t xTicksToWait ) { DaemonTaskMessage_t xMessage; - BaseType_t xReturn; + BaseType_t xReturn; /* This function can only be called after a timer has been created or * after the scheduler has been started because, until then, the timer @@ -1114,10 +1115,10 @@ /* Complete the message with the function parameters and post it to the * daemon task. */ - xMessage.xMessageID = tmrCOMMAND_EXECUTE_CALLBACK; + xMessage.xMessageID = tmrCOMMAND_EXECUTE_CALLBACK; xMessage.u.xCallbackParameters.pxCallbackFunction = xFunctionToPend; - xMessage.u.xCallbackParameters.pvParameter1 = pvParameter1; - xMessage.u.xCallbackParameters.ulParameter2 = ulParameter2; + xMessage.u.xCallbackParameters.pvParameter1 = pvParameter1; + xMessage.u.xCallbackParameters.ulParameter2 = ulParameter2; xReturn = xQueueSendToBack( xTimerQueue, &xMessage, xTicksToWait );