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Alfred Gedeon 2020-07-07 17:42:07 -07:00 • committed by alfred gedeon
parent 66a815653b
commit 587a83d647
385 changed files with 4714 additions and 4338 deletions
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161
portable/RVDS/ARM_CM4_MPU/port.c
View file

@ -22,6 +22,7 @@
* http://www.FreeRTOS.org
* http://aws.amazon.com/freertos
*
* 1 tab == 4 spaces!
*/
/*-----------------------------------------------------------
@ -104,7 +105,7 @@
/* Each task maintains its own interrupt status in the critical nesting
* variable. Note this is not saved as part of the task context as context
* switches can only occur when uxCriticalNesting is zero. */
static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
/*
* Setup the timer to generate the tick interrupts.
@ -162,8 +163,8 @@ static uint32_t prvPortGetIPSR( void );
* a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
*/
#if ( configASSERT_DEFINED == 1 )
static uint8_t ucMaxSysCallPriority = 0;
static uint32_t ulMaxPRIGROUPValue = 0;
static uint8_t ucMaxSysCallPriority = 0;
static uint32_t ulMaxPRIGROUPValue = 0;
static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const uint8_t * ) portNVIC_IP_REGISTERS_OFFSET_16;
#endif /* configASSERT_DEFINED */
@ -239,8 +240,8 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
void prvSVCHandler( uint32_t * pulParam )
{
uint8_t ucSVCNumber;
uint32_t ulReg, ulPC;
uint8_t ucSVCNumber;
uint32_t ulReg, ulPC;
#if ( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 )
extern uint32_t __syscalls_flash_start__;
@ -249,7 +250,7 @@ void prvSVCHandler( uint32_t * pulParam )
/* The stack contains: r0, r1, r2, r3, r12, LR, PC and xPSR. The first
* argument (r0) is pulParam[ 0 ]. */
ulPC = pulParam[ portOFFSET_TO_PC ];
ulPC = pulParam[ portOFFSET_TO_PC ];
ucSVCNumber = ( ( uint8_t * ) ulPC )[ -2 ];
switch( ucSVCNumber )
@ -328,22 +329,22 @@ __asm void prvRestoreContextOfFirstTask( void )
{
PRESERVE8
ldr r0, = 0xE000ED08 /* Use the NVIC offset register to locate the stack. */
ldr r0, [ r0 ]
ldr r0, = 0xE000ED08 /* Use the NVIC offset register to locate the stack. */
ldr r0, [ r0 ]
ldr r0, [ r0 ]
msr msp, r0 /* Set the msp back to the start of the stack. */
ldr r3, = pxCurrentTCB /* Restore the context. */
ldr r1, [ r3 ]
ldr r0, [ r1 ] /* The first item in the TCB is the task top of stack. */
add r1, r1, # 4 /* Move onto the second item in the TCB... */
msr msp, r0 /* Set the msp back to the start of the stack. */
ldr r3, = pxCurrentTCB /* Restore the context. */
ldr r1, [ r3 ]
ldr r0, [ r1 ] /* The first item in the TCB is the task top of stack. */
add r1, r1, # 4 /* Move onto the second item in the TCB... */
dmb /* Complete outstanding transfers before disabling MPU. */
ldr r2, = 0xe000ed94 /* MPU_CTRL register. */
ldr r3, [ r2 ] /* Read the value of MPU_CTRL. */
bic r3, r3, # 1 /* r3 = r3 & ~1 i.e. Clear the bit 0 in r3. */
str r3, [ r2 ] /* Disable MPU. */
dmb /* Complete outstanding transfers before disabling MPU. */
ldr r2, = 0xe000ed94 /* MPU_CTRL register. */
ldr r3, [ r2 ] /* Read the value of MPU_CTRL. */
bic r3, r3, # 1 /* r3 = r3 & ~1 i.e. Clear the bit 0 in r3. */
str r3, [ r2 ] /* Disable MPU. */
ldr r2, = 0xe000ed9c /* Region Base Address register. */
ldr r2, = 0xe000ed9c /* Region Base Address register. */
ldmia r1 !, {
r4 - r11
} /* Read 4 sets of MPU registers. */
@ -351,11 +352,11 @@ __asm void prvRestoreContextOfFirstTask( void )
r4 - r11
} /* Write 4 sets of MPU registers. */
ldr r2, = 0xe000ed94 /* MPU_CTRL register. */
ldr r3, [ r2 ] /* Read the value of MPU_CTRL. */
orr r3, r3, # 1 /* r3 = r3 | 1 i.e. Set the bit 0 in r3. */
str r3, [ r2 ] /* Enable MPU. */
dsb /* Force memory writes before continuing. */
ldr r2, = 0xe000ed94 /* MPU_CTRL register. */
ldr r3, [ r2 ] /* Read the value of MPU_CTRL. */
orr r3, r3, # 1 /* r3 = r3 | 1 i.e. Set the bit 0 in r3. */
str r3, [ r2 ] /* Enable MPU. */
dsb /* Force memory writes before continuing. */
ldmia r0 !, {
r3 - r11, r14
@ -380,9 +381,9 @@ BaseType_t xPortStartScheduler( void )
#if ( configASSERT_DEFINED == 1 )
{
volatile uint32_t ulOriginalPriority;
volatile uint32_t ulOriginalPriority;
volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
volatile uint8_t ucMaxPriorityValue;
volatile uint8_t ucMaxPriorityValue;
/* Determine the maximum priority from which ISR safe FreeRTOS API
* functions can be called. ISR safe functions are those that end in
@ -390,21 +391,21 @@ BaseType_t xPortStartScheduler( void )
* ensure interrupt entry is as fast and simple as possible.
*
* Save the interrupt priority value that is about to be clobbered. */
ulOriginalPriority = *pucFirstUserPriorityRegister;
ulOriginalPriority = *pucFirstUserPriorityRegister;
/* Determine the number of priority bits available. First write to all
* possible bits. */
*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
/* Read the value back to see how many bits stuck. */
ucMaxPriorityValue = *pucFirstUserPriorityRegister;
ucMaxPriorityValue = *pucFirstUserPriorityRegister;
/* Use the same mask on the maximum system call priority. */
ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
/* Calculate the maximum acceptable priority group value for the number
* of bits read back. */
ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
{
@ -432,8 +433,8 @@ BaseType_t xPortStartScheduler( void )
/* Shift the priority group value back to its position within the AIRCR
* register. */
ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
/* Restore the clobbered interrupt priority register to its original
* value. */
@ -455,13 +456,13 @@ BaseType_t xPortStartScheduler( void )
vSetupTimerInterrupt();
/* Initialise the critical nesting count ready for the first task. */
uxCriticalNesting = 0;
uxCriticalNesting = 0;
/* Ensure the VFP is enabled - it should be anyway. */
vPortEnableVFP();
/* Lazy save always. */
*( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
*( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
/* Start the first task. */
prvStartFirstTask();
@ -541,10 +542,10 @@ __asm void xPortPendSVHandler( void )
PRESERVE8
mrs r0, psp
mrs r0, psp
ldr r3, = pxCurrentTCB /* Get the location of the current TCB. */
ldr r2, [ r3 ]
ldr r3, = pxCurrentTCB /* Get the location of the current TCB. */
ldr r2, [ r3 ]
tst r14, # 0x10 /* Is the task using the FPU context? If so, push high vfp registers. */
it eq
@ -573,16 +574,16 @@ __asm void xPortPendSVHandler( void )
}
/* Restore the context. */
ldr r1, [ r3 ]
ldr r0, [ r1 ] /* The first item in the TCB is the task top of stack. */
add r1, r1, # 4 /* Move onto the second item in the TCB... */
ldr r0, [ r1 ] /* The first item in the TCB is the task top of stack. */
add r1, r1, # 4 /* Move onto the second item in the TCB... */
dmb /* Complete outstanding transfers before disabling MPU. */
ldr r2, = 0xe000ed94 /* MPU_CTRL register. */
ldr r3, [ r2 ] /* Read the value of MPU_CTRL. */
bic r3, r3, # 1 /* r3 = r3 & ~1 i.e. Clear the bit 0 in r3. */
str r3, [ r2 ] /* Disable MPU. */
dmb /* Complete outstanding transfers before disabling MPU. */
ldr r2, = 0xe000ed94 /* MPU_CTRL register. */
ldr r3, [ r2 ] /* Read the value of MPU_CTRL. */
bic r3, r3, # 1 /* r3 = r3 & ~1 i.e. Clear the bit 0 in r3. */
str r3, [ r2 ] /* Disable MPU. */
ldr r2, = 0xe000ed9c /* Region Base Address register. */
ldr r2, = 0xe000ed9c /* Region Base Address register. */
ldmia r1 !, {
r4 - r11
} /* Read 4 sets of MPU registers. */
@ -590,11 +591,11 @@ __asm void xPortPendSVHandler( void )
r4 - r11
} /* Write 4 sets of MPU registers. */
ldr r2, = 0xe000ed94 /* MPU_CTRL register. */
ldr r3, [ r2 ] /* Read the value of MPU_CTRL. */
orr r3, r3, # 1 /* r3 = r3 | 1 i.e. Set the bit 0 in r3. */
str r3, [ r2 ] /* Enable MPU. */
dsb /* Force memory writes before continuing. */
ldr r2, = 0xe000ed94 /* MPU_CTRL register. */
ldr r3, [ r2 ] /* Read the value of MPU_CTRL. */
orr r3, r3, # 1 /* r3 = r3 | 1 i.e. Set the bit 0 in r3. */
str r3, [ r2 ] /* Enable MPU. */
dsb /* Force memory writes before continuing. */
ldmia r0 !, {
r3 - r11, r14
@ -609,7 +610,7 @@ __asm void xPortPendSVHandler( void )
msr psp, r0
bx r14
nop
nop
}
/*-----------------------------------------------------------*/
@ -637,12 +638,12 @@ void xPortSysTickHandler( void )
__weak void vSetupTimerInterrupt( void )
{
/* Reset the SysTick. */
portNVIC_SYSTICK_CTRL_REG = 0UL;
portNVIC_SYSTICK_CTRL_REG = 0UL;
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
/* Configure SysTick to interrupt at the requested rate. */
portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
}
/*-----------------------------------------------------------*/
@ -689,10 +690,10 @@ static void prvSetupMPU( void )
( portMPU_REGION_VALID ) |
( portUNPRIVILEGED_FLASH_REGION );
portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_READ_ONLY ) |
( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
( prvGetMPURegionSizeSetting( ( uint32_t ) __FLASH_segment_end__ - ( uint32_t ) __FLASH_segment_start__ ) ) |
( portMPU_REGION_ENABLE );
portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_READ_ONLY ) |
( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
( prvGetMPURegionSizeSetting( ( uint32_t ) __FLASH_segment_end__ - ( uint32_t ) __FLASH_segment_start__ ) ) |
( portMPU_REGION_ENABLE );
/* Setup the privileged flash for privileged only access. This is where
* the kernel code is placed. */
@ -700,10 +701,10 @@ static void prvSetupMPU( void )
( portMPU_REGION_VALID ) |
( portPRIVILEGED_FLASH_REGION );
portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_PRIVILEGED_READ_ONLY ) |
( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
( prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_functions_end__ - ( uint32_t ) __privileged_functions_start__ ) ) |
( portMPU_REGION_ENABLE );
portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_PRIVILEGED_READ_ONLY ) |
( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
( prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_functions_end__ - ( uint32_t ) __privileged_functions_start__ ) ) |
( portMPU_REGION_ENABLE );
/* Setup the privileged data RAM region. This is where the kernel data
* is placed. */
@ -711,10 +712,10 @@ static void prvSetupMPU( void )
( portMPU_REGION_VALID ) |
( portPRIVILEGED_RAM_REGION );
portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) |
( portMPU_REGION_ENABLE );
portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) |
( portMPU_REGION_ENABLE );
/* By default allow everything to access the general peripherals. The
* system peripherals and registers are protected. */
@ -722,15 +723,15 @@ static void prvSetupMPU( void )
( portMPU_REGION_VALID ) |
( portGENERAL_PERIPHERALS_REGION );
portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) |
( prvGetMPURegionSizeSetting( portPERIPHERALS_END_ADDRESS - portPERIPHERALS_START_ADDRESS ) ) |
( portMPU_REGION_ENABLE );
portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) |
( prvGetMPURegionSizeSetting( portPERIPHERALS_END_ADDRESS - portPERIPHERALS_START_ADDRESS ) ) |
( portMPU_REGION_ENABLE );
/* Enable the memory fault exception. */
portNVIC_SYS_CTRL_STATE_REG |= portNVIC_MEM_FAULT_ENABLE;
portNVIC_SYS_CTRL_STATE_REG |= portNVIC_MEM_FAULT_ENABLE;
/* Enable the MPU with the background region configured. */
portMPU_CTRL_REG |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE );
portMPU_CTRL_REG |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE );
}
}
/*-----------------------------------------------------------*/
@ -794,8 +795,8 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
extern uint32_t __privileged_data_end__;
int32_t lIndex;
uint32_t ul;
int32_t lIndex;
uint32_t ul;
if( xRegions == NULL )
{
@ -805,7 +806,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
( portMPU_REGION_VALID ) |
( portSTACK_REGION );
xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
( portMPU_REGION_READ_WRITE ) |
( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
( prvGetMPURegionSizeSetting( ( uint32_t ) __SRAM_segment_end__ - ( uint32_t ) __SRAM_segment_start__ ) ) |
@ -818,7 +819,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
( portMPU_REGION_VALID ) |
( portSTACK_REGION + 1 );
xMPUSettings->xRegion[ 1 ].ulRegionAttribute =
xMPUSettings->xRegion[ 1 ].ulRegionAttribute =
( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_data_end__ - ( uint32_t ) __privileged_data_start__ ) |
@ -828,7 +829,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
for( ul = 2; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )
{
xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;
xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;
xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;
}
}
else
@ -845,7 +846,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
( portMPU_REGION_VALID ) |
( portSTACK_REGION ); /* Region number. */
xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
( portMPU_REGION_READ_WRITE ) | /* Read and write. */
( prvGetMPURegionSizeSetting( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) ) |
( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
@ -866,7 +867,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
( portMPU_REGION_VALID ) |
( portSTACK_REGION + ul ); /* Region number. */
xMPUSettings->xRegion[ ul ].ulRegionAttribute =
xMPUSettings->xRegion[ ul ].ulRegionAttribute =
( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) |
( xRegions[ lIndex ].ulParameters ) |
( portMPU_REGION_ENABLE );
@ -875,7 +876,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
{
/* Invalidate the region. */
xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;
xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;
xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;
}
lIndex++;
@ -898,7 +899,7 @@ __asm uint32_t prvPortGetIPSR( void )
void vPortValidateInterruptPriority( void )
{
uint32_t ulCurrentInterrupt;
uint8_t ucCurrentPriority;
uint8_t ucCurrentPriority;
/* Obtain the number of the currently executing interrupt. */
ulCurrentInterrupt = prvPortGetIPSR();

7
portable/RVDS/ARM_CM4_MPU/portmacro.h
View file

@ -22,6 +22,7 @@
* http://www.FreeRTOS.org
* http://aws.amazon.com/freertos
*
* 1 tab == 4 spaces!
*/
@ -137,7 +138,7 @@
#define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
/*-----------------------------------------------------------*/
@ -172,7 +173,7 @@
/*-----------------------------------------------------------*/
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __clz( ( uxReadyPriorities ) ) )
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __clz( ( uxReadyPriorities ) ) )
#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
/*-----------------------------------------------------------*/
@ -279,7 +280,7 @@
static portFORCE_INLINE BaseType_t xPortIsInsideInterrupt( void )
{
uint32_t ulCurrentInterrupt;
uint32_t ulCurrentInterrupt;
BaseType_t xReturn;
/* Obtain the number of the currently executing interrupt. */