Style: uncrustify kernel files

This commit is contained in:
Alfred Gedeon 2020-07-07 17:42:07 -07:00 committed by alfred gedeon
parent 66a815653b
commit 587a83d647
385 changed files with 4714 additions and 4338 deletions

View file

@ -22,6 +22,7 @@
* http://www.FreeRTOS.org
* http://aws.amazon.com/freertos
*
* 1 tab == 4 spaces!
*/
/*
@ -346,7 +347,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
void * pvParameters )
{
uint32_t ulAddress;
uint8_t ucBlock;
uint8_t ucBlock;
/* Place a few bytes of known values on the bottom of the stack.
* This is just useful for debugging. */
@ -364,11 +365,11 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
*
* First store the function parameters. This is where the task will expect to
* find them when it starts running. */
ulAddress = ( uint32_t ) pvParameters;
ulAddress = ( uint32_t ) pvParameters;
*pxTopOfStack = ( StackType_t ) ( ulAddress & ( uint32_t ) 0x00ff );
pxTopOfStack++;
ulAddress >>= 8;
ulAddress >>= 8;
*pxTopOfStack = ( StackType_t ) ( ulAddress & ( uint32_t ) 0x00ff );
pxTopOfStack++;
@ -446,17 +447,17 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
/* The only function return address so far is the address of the
* task. */
ulAddress = ( uint32_t ) pxCode;
ulAddress = ( uint32_t ) pxCode;
/* TOS low. */
*pxTopOfStack = ( StackType_t ) ( ulAddress & ( uint32_t ) 0x00ff );
pxTopOfStack++;
ulAddress >>= 8;
ulAddress >>= 8;
/* TOS high. */
*pxTopOfStack = ( StackType_t ) ( ulAddress & ( uint32_t ) 0x00ff );
pxTopOfStack++;
ulAddress >>= 8;
ulAddress >>= 8;
/* TOS even higher. */
*pxTopOfStack = ( StackType_t ) ( ulAddress & ( uint32_t ) 0x00ff );
@ -581,8 +582,8 @@ static void prvTickISR( void )
static void prvSetupTimerInterrupt( void )
{
const uint32_t ulConstCompareValue = ( ( configCPU_CLOCK_HZ / portTIMER_FOSC_SCALE ) / configTICK_RATE_HZ );
uint32_t ulCompareValue;
uint8_t ucByte;
uint32_t ulCompareValue;
uint8_t ucByte;
/* Interrupts are disabled when this function is called.
*
@ -590,24 +591,24 @@ static void prvSetupTimerInterrupt( void )
* 1.
*
* Clear the time count then setup timer. */
TMR1H = ( uint8_t ) 0x00;
TMR1L = ( uint8_t ) 0x00;
TMR1H = ( uint8_t ) 0x00;
TMR1L = ( uint8_t ) 0x00;
/* Set the compare match value. */
ulCompareValue = ulConstCompareValue;
CCPR1L = ( uint8_t ) ( ulCompareValue & ( uint32_t ) 0xff );
ulCompareValue >>= ( uint32_t ) 8;
CCPR1H = ( uint8_t ) ( ulCompareValue & ( uint32_t ) 0xff );
ulCompareValue = ulConstCompareValue;
CCPR1L = ( uint8_t ) ( ulCompareValue & ( uint32_t ) 0xff );
ulCompareValue >>= ( uint32_t ) 8;
CCPR1H = ( uint8_t ) ( ulCompareValue & ( uint32_t ) 0xff );
CCP1CONbits.CCP1M0 = portBIT_SET; /*< Compare match mode. */
CCP1CONbits.CCP1M1 = portBIT_SET; /*< Compare match mode. */
CCP1CONbits.CCP1M2 = portBIT_CLEAR; /*< Compare match mode. */
CCP1CONbits.CCP1M3 = portBIT_SET; /*< Compare match mode. */
PIE1bits.CCP1IE = portBIT_SET; /*< Interrupt enable. */
PIE1bits.CCP1IE = portBIT_SET; /*< Interrupt enable. */
/* We are only going to use the global interrupt bit, so set the peripheral
* bit to true. */
INTCONbits.GIEL = portBIT_SET;
INTCONbits.GIEL = portBIT_SET;
/* Provided library function for setting up the timer that will produce the
* tick. */

View file

@ -22,6 +22,7 @@
* http://www.FreeRTOS.org
* http://aws.amazon.com/freertos
*
* 1 tab == 4 spaces!
*/
#ifndef PORTMACRO_H
@ -71,9 +72,9 @@ typedef unsigned char UBaseType_t;
#define portENABLE_INTERRUPTS() INTCONbits.GIEH = 1;
/* Push the INTCON register onto the stack, then disable interrupts. */
#define portENTER_CRITICAL() \
POSTINC1 = INTCON; \
INTCONbits.GIEH = 0;
#define portENTER_CRITICAL() \
POSTINC1 = INTCON; \
INTCONbits.GIEH = 0;
/* Retrieve the INTCON register from the stack, and enable interrupts
* if they were saved as being enabled. Don't modify any other bits

View file

@ -22,6 +22,7 @@
* http://www.FreeRTOS.org
* http://aws.amazon.com/freertos
*
* 1 tab == 4 spaces!
*/
/*
@ -162,8 +163,8 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
TaskFunction_t pxCode,
void * pvParameters )
{
uint16_t usCode;
UBaseType_t i;
uint16_t usCode;
UBaseType_t i;
const StackType_t xInitialStack[] =
{
@ -203,22 +204,22 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
/* Setup the stack as if a yield had occurred.
*
* Save the low bytes of the program counter. */
usCode = ( uint16_t ) pxCode;
*pxTopOfStack = ( StackType_t ) usCode;
usCode = ( uint16_t ) pxCode;
*pxTopOfStack = ( StackType_t ) usCode;
pxTopOfStack++;
/* Save the high byte of the program counter. This will always be zero
* here as it is passed in a 16bit pointer. If the address is greater than
* 16 bits then the pointer will point to a jump table. */
*pxTopOfStack = ( StackType_t ) 0;
*pxTopOfStack = ( StackType_t ) 0;
pxTopOfStack++;
/* Status register with interrupts enabled. */
*pxTopOfStack = portINITIAL_SR;
*pxTopOfStack = portINITIAL_SR;
pxTopOfStack++;
/* Parameters are passed in W0. */
*pxTopOfStack = ( StackType_t ) pvParameters;
*pxTopOfStack = ( StackType_t ) pvParameters;
pxTopOfStack++;
for( i = 0; i < ( sizeof( xInitialStack ) / sizeof( StackType_t ) ); i++ )
@ -227,7 +228,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
pxTopOfStack++;
}
*pxTopOfStack = CORCON;
*pxTopOfStack = CORCON;
pxTopOfStack++;
#if defined( __HAS_EDS__ )
@ -241,7 +242,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
#endif /* __HAS_EDS__ */
/* Finally the critical nesting depth. */
*pxTopOfStack = 0x00;
*pxTopOfStack = 0x00;
pxTopOfStack++;
return pxTopOfStack;
@ -280,26 +281,26 @@ __attribute__( ( weak ) ) void vApplicationSetupTickTimerInterrupt( void )
const uint32_t ulCompareMatch = ( ( configCPU_CLOCK_HZ / portTIMER_PRESCALE ) / configTICK_RATE_HZ ) - 1;
/* Prescale of 8. */
T1CON = 0;
TMR1 = 0;
T1CON = 0;
TMR1 = 0;
PR1 = ( uint16_t ) ulCompareMatch;
PR1 = ( uint16_t ) ulCompareMatch;
/* Setup timer 1 interrupt priority. */
IPC0bits.T1IP = configKERNEL_INTERRUPT_PRIORITY;
IPC0bits.T1IP = configKERNEL_INTERRUPT_PRIORITY;
/* Clear the interrupt as a starting condition. */
IFS0bits.T1IF = 0;
IFS0bits.T1IF = 0;
/* Enable the interrupt. */
IEC0bits.T1IE = 1;
IEC0bits.T1IE = 1;
/* Setup the prescale value. */
T1CONbits.TCKPS0 = 1;
T1CONbits.TCKPS1 = 0;
/* Start the timer. */
T1CONbits.TON = 1;
T1CONbits.TON = 1;
}
/*-----------------------------------------------------------*/

View file

@ -22,6 +22,7 @@
* http://www.FreeRTOS.org
* http://aws.amazon.com/freertos
*
* 1 tab == 4 spaces!
*/
#ifndef PORTMACRO_H

View file

@ -22,6 +22,7 @@
* http://www.FreeRTOS.org
* http://aws.amazon.com/freertos
*
* 1 tab == 4 spaces!
*/
#include "FreeRTOSConfig.h"

View file

@ -22,6 +22,7 @@
* http://www.FreeRTOS.org
* http://aws.amazon.com/freertos
*
* 1 tab == 4 spaces!
*/
/*-----------------------------------------------------------
@ -113,7 +114,7 @@
* the ISR stack. */
#define portISR_STACK_FILL_BYTE 0xee
static const uint8_t ucExpectedStackBytes[] =
static const uint8_t ucExpectedStackBytes[] =
{
portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
@ -140,17 +141,17 @@ static void prvTaskExitError( void );
/* Records the interrupt nesting depth. This is initialised to one as it is
* decremented to 0 when the first task starts. */
volatile UBaseType_t uxInterruptNesting = 0x01;
volatile UBaseType_t uxInterruptNesting = 0x01;
/* Stores the task stack pointer when a switch is made to use the system stack. */
UBaseType_t uxSavedTaskStackPointer = 0;
UBaseType_t uxSavedTaskStackPointer = 0;
/* The stack used by interrupt service routines that cause a context switch. */
StackType_t xISRStack[ configISR_STACK_SIZE ] = { 0 };
StackType_t xISRStack[ configISR_STACK_SIZE ] = { 0 };
/* The top of stack value ensures there is enough space to store 6 registers on
* the callers stack, as some functions seem to want to do this. */
const StackType_t * const xISRStackTop = &( xISRStack[ configISR_STACK_SIZE - 7 ] );
const StackType_t * const xISRStackTop = &( xISRStack[ configISR_STACK_SIZE - 7 ] );
/*-----------------------------------------------------------*/
@ -232,17 +233,17 @@ __attribute__( ( weak ) ) void vApplicationSetupTickTimerInterrupt( void )
configASSERT( ulPreload != 0UL );
/* Configure the RTOS timer. */
portMMCR_RTMR_CONTROL = 0ul;
portMMCR_RTMR_PRELOAD = ulPreload;
portMMCR_RTMR_CONTROL = 0ul;
portMMCR_RTMR_PRELOAD = ulPreload;
/* Configure interrupts from the RTOS timer. */
portMMCR_JTVIC_GIRQ23_SRC = ( portGIRQ23_RTOS_TIMER_MASK );
portMMCR_JTVIC_GIRQ23_SRC = ( portGIRQ23_RTOS_TIMER_MASK );
portMMCR_JTVIC_GIRQ23_PRIA &= ~( 0x0Ful << 16 );
portMMCR_JTVIC_GIRQ23_PRIA |= ( ( portIPL_TO_CODE( configKERNEL_INTERRUPT_PRIORITY ) ) << 16 );
portMMCR_JTVIC_GIRQ23_SETEN = ( portGIRQ23_RTOS_TIMER_MASK );
/* Enable the RTOS timer. */
portMMCR_RTMR_CONTROL = 0x0Fu;
portMMCR_RTMR_CONTROL = 0x0Fu;
}
/*-----------------------------------------------------------*/
@ -267,7 +268,7 @@ BaseType_t xPortStartScheduler( void )
#endif /* configCHECK_FOR_STACK_OVERFLOW > 2 */
/* Clear the software interrupt flag. */
portMMCR_JTVIC_GIRQ24_SRC = ( portGIRQ24_M14K_SOFTIRQ0_MASK );
portMMCR_JTVIC_GIRQ24_SRC = ( portGIRQ24_M14K_SOFTIRQ0_MASK );
/* Set software timer priority. Each GIRQn has one nibble containing its
* priority */
@ -283,7 +284,7 @@ BaseType_t xPortStartScheduler( void )
/* Start the highest priority task that has been created so far. Its stack
* location is loaded into uxSavedTaskStackPointer. */
uxSavedTaskStackPointer = *( UBaseType_t * ) pxCurrentTCB;
uxSavedTaskStackPointer = *( UBaseType_t * ) pxCurrentTCB;
vPortStartFirstTask();
/* Should never get here as the tasks will now be executing! Call the task
@ -299,14 +300,14 @@ BaseType_t xPortStartScheduler( void )
void vPortIncrementTick( void )
{
UBaseType_t uxSavedStatus;
uint32_t ulCause;
uint32_t ulCause;
uxSavedStatus = uxPortSetInterruptMaskFromISR();
{
if( xTaskIncrementTick() != pdFALSE )
{
/* Pend a context switch. */
ulCause = ulPortGetCP0Cause();
ulCause = ulPortGetCP0Cause();
ulCause |= ( 1ul << 8UL );
vPortSetCP0Cause( ulCause );
}

View file

@ -22,6 +22,7 @@
* http://www.FreeRTOS.org
* http://aws.amazon.com/freertos
*
* 1 tab == 4 spaces!
*/
#ifndef PORTMACRO_H
@ -161,19 +162,19 @@
{ \
uint32_t ulStatus; \
/* Mask interrupts at and below the kernel interrupt priority. */ \
ulStatus = ulPortGetCP0Status(); \
ulStatus = ulPortGetCP0Status(); \
ulStatus &= ~portALL_IPL_BITS; \
vPortSetCP0Status( ( ulStatus | ( configMAX_SYSCALL_INTERRUPT_PRIORITY << portIPL_SHIFT ) ) ); \
}
#endif /* configASSERT */
#define portENABLE_INTERRUPTS() \
{ \
uint32_t ulStatus; \
/* Unmask all interrupts. */ \
ulStatus = ulPortGetCP0Status(); \
ulStatus &= ~portALL_IPL_BITS; \
vPortSetCP0Status( ulStatus ); \
#define portENABLE_INTERRUPTS() \
{ \
uint32_t ulStatus; \
/* Unmask all interrupts. */ \
ulStatus = ulPortGetCP0Status(); \
ulStatus &= ~portALL_IPL_BITS; \
vPortSetCP0Status( ulStatus ); \
}
@ -205,7 +206,7 @@
/*-----------------------------------------------------------*/
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - _clz( ( uxReadyPriorities ) ) )
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - _clz( ( uxReadyPriorities ) ) )
#endif /* taskRECORD_READY_PRIORITY */
@ -217,7 +218,7 @@
{ \
uint32_t ulCause; \
/* Trigger software interrupt. */ \
ulCause = ulPortGetCP0Cause(); \
ulCause = ulPortGetCP0Cause(); \
ulCause |= portSW0_BIT; \
vPortSetCP0Cause( ulCause ); \
}

View file

@ -22,6 +22,7 @@
* http://www.FreeRTOS.org
* http://aws.amazon.com/freertos
*
* 1 tab == 4 spaces!
*/
#include "FreeRTOSConfig.h"

View file

@ -22,6 +22,7 @@
* http://www.FreeRTOS.org
* http://aws.amazon.com/freertos
*
* 1 tab == 4 spaces!
*/
/*-----------------------------------------------------------
@ -71,7 +72,7 @@
*/
#ifndef configTICK_INTERRUPT_VECTOR
#define configTICK_INTERRUPT_VECTOR _TIMER_1_VECTOR
#define configCLEAR_TICK_TIMER_INTERRUPT() IFS0CLR = _IFS0_T1IF_MASK
#define configCLEAR_TICK_TIMER_INTERRUPT() IFS0CLR = _IFS0_T1IF_MASK
#else
#ifndef configCLEAR_TICK_TIMER_INTERRUPT
#error If configTICK_INTERRUPT_VECTOR is defined in application code then configCLEAR_TICK_TIMER_INTERRUPT must also be defined in application code.
@ -141,17 +142,17 @@ static void prvTaskExitError( void );
/* Records the interrupt nesting depth. This is initialised to one as it is
* decremented to 0 when the first task starts. */
volatile UBaseType_t uxInterruptNesting = 0x01;
volatile UBaseType_t uxInterruptNesting = 0x01;
/* Stores the task stack pointer when a switch is made to use the system stack. */
UBaseType_t uxSavedTaskStackPointer = 0;
UBaseType_t uxSavedTaskStackPointer = 0;
/* The stack used by interrupt service routines that cause a context switch. */
__attribute__( ( aligned( 8 ) ) ) StackType_t xISRStack[ configISR_STACK_SIZE ] = { 0 };
/* The top of stack value ensures there is enough space to store 6 registers on
* the callers stack, as some functions seem to want to do this. */
const StackType_t * const xISRStackTop = &( xISRStack[ ( configISR_STACK_SIZE & ~portBYTE_ALIGNMENT_MASK ) - 8 ] );
const StackType_t * const xISRStackTop = &( xISRStack[ ( configISR_STACK_SIZE & ~portBYTE_ALIGNMENT_MASK ) - 8 ] );
/*-----------------------------------------------------------*/
@ -220,19 +221,19 @@ __attribute__( ( weak ) ) void vApplicationSetupTickTimerInterrupt( void )
{
const uint32_t ulCompareMatch = ( ( configPERIPHERAL_CLOCK_HZ / portTIMER_PRESCALE ) / configTICK_RATE_HZ ) - 1;
T1CON = 0x0000;
T1CON = 0x0000;
T1CONbits.TCKPS = portPRESCALE_BITS;
PR1 = ulCompareMatch;
IPC1bits.T1IP = configKERNEL_INTERRUPT_PRIORITY;
PR1 = ulCompareMatch;
IPC1bits.T1IP = configKERNEL_INTERRUPT_PRIORITY;
/* Clear the interrupt as a starting condition. */
IFS0bits.T1IF = 0;
IFS0bits.T1IF = 0;
/* Enable the interrupt. */
IEC0bits.T1IE = 1;
IEC0bits.T1IE = 1;
/* Start the timer. */
T1CONbits.TON = 1;
T1CONbits.TON = 1;
}
/*-----------------------------------------------------------*/
@ -257,15 +258,15 @@ BaseType_t xPortStartScheduler( void )
#endif /* configCHECK_FOR_STACK_OVERFLOW > 2 */
/* Clear the software interrupt flag. */
IFS0CLR = _IFS0_CS0IF_MASK;
IFS0CLR = _IFS0_CS0IF_MASK;
/* Set software timer priority. */
IPC0CLR = _IPC0_CS0IP_MASK;
IPC0SET = ( configKERNEL_INTERRUPT_PRIORITY << _IPC0_CS0IP_POSITION );
IPC0CLR = _IPC0_CS0IP_MASK;
IPC0SET = ( configKERNEL_INTERRUPT_PRIORITY << _IPC0_CS0IP_POSITION );
/* Enable software interrupt. */
IEC0CLR = _IEC0_CS0IE_MASK;
IEC0SET = 1 << _IEC0_CS0IE_POSITION;
IEC0CLR = _IEC0_CS0IE_MASK;
IEC0SET = 1 << _IEC0_CS0IE_POSITION;
/* Setup the timer to generate the tick. Interrupts will have been
* disabled by the time we get here. */

View file

@ -22,6 +22,7 @@
* http://www.FreeRTOS.org
* http://aws.amazon.com/freertos
*
* 1 tab == 4 spaces!
*/
#ifndef PORTMACRO_H
@ -110,7 +111,7 @@
uint32_t ulStatus; \
\
/* Mask interrupts at and below the kernel interrupt priority. */ \
ulStatus = _CP0_GET_STATUS(); \
ulStatus = _CP0_GET_STATUS(); \
ulStatus &= ~portALL_IPL_BITS; \
_CP0_SET_STATUS( ( ulStatus | ( configMAX_SYSCALL_INTERRUPT_PRIORITY << portIPL_SHIFT ) ) ); \
}
@ -121,7 +122,7 @@
uint32_t ulStatus; \
\
/* Unmask all interrupts. */ \
ulStatus = _CP0_GET_STATUS(); \
ulStatus = _CP0_GET_STATUS(); \
ulStatus &= ~portALL_IPL_BITS; \
_CP0_SET_STATUS( ulStatus ); \
}
@ -155,7 +156,7 @@
/*-----------------------------------------------------------*/
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - _clz( ( uxReadyPriorities ) ) )
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - _clz( ( uxReadyPriorities ) ) )
#endif /* taskRECORD_READY_PRIORITY */
@ -168,7 +169,7 @@
uint32_t ulCause; \
\
/* Trigger software interrupt. */ \
ulCause = _CP0_GET_CAUSE(); \
ulCause = _CP0_GET_CAUSE(); \
ulCause |= portSW0_BIT; \
_CP0_SET_CAUSE( ulCause ); \
}

View file

@ -22,6 +22,7 @@
* http://www.FreeRTOS.org
* http://aws.amazon.com/freertos
*
* 1 tab == 4 spaces!
*/
#include "FreeRTOSConfig.h"
@ -164,7 +165,7 @@ sw k1, portSTATUS_STACK_LOCATION( sp )
/* Prepare to enable interrupts above the current priority. */
srl k0, k0, 0xa
ins k1, k0, 10, 7
srl k0, k0, 0x7 /* This copies the MSB of the IPL, but it would be an error if it was set anyway. */
srl k0, k0, 0x7 /* This copies the MSB of the IPL, but it would be an error if it was set anyway. */
ins k1, k0, 18, 1
ins k1, zero, 1, 4
@ -395,7 +396,7 @@ sw k1, 0 ( k0 )
beq zero, zero, 2f
nop
1 : /* Restore the STATUS and EPC registers */
1 : /* Restore the STATUS and EPC registers */
lw k0, portSTATUS_STACK_LOCATION( s5 )
lw k1, portEPC_STACK_LOCATION( s5 )
@ -404,7 +405,7 @@ sw k1, 0 ( k0 )
add sp, zero, s5
lw s5, 40 ( sp )
2 : /* Adjust the stack pointer */
2 : /* Adjust the stack pointer */
addiu sp, sp, portCONTEXT_SIZE
#else /* if ( __mips_hard_float == 1 ) && ( configUSE_TASK_FPU_SUPPORT == 1 ) */

View file

@ -22,6 +22,7 @@
* http://www.FreeRTOS.org
* http://aws.amazon.com/freertos
*
* 1 tab == 4 spaces!
*/
/*-----------------------------------------------------------
@ -93,7 +94,7 @@
*/
#ifndef configTICK_INTERRUPT_VECTOR
#define configTICK_INTERRUPT_VECTOR _TIMER_1_VECTOR
#define configCLEAR_TICK_TIMER_INTERRUPT() IFS0CLR = _IFS0_T1IF_MASK
#define configCLEAR_TICK_TIMER_INTERRUPT() IFS0CLR = _IFS0_T1IF_MASK
#else
#ifndef configCLEAR_TICK_TIMER_INTERRUPT
#error If configTICK_INTERRUPT_VECTOR is defined in application code then configCLEAR_TICK_TIMER_INTERRUPT must also be defined in application code.
@ -146,10 +147,10 @@ static void prvTaskExitError( void );
/* Records the interrupt nesting depth. This is initialised to one as it is
* decremented to 0 when the first task starts. */
volatile UBaseType_t uxInterruptNesting = 0x01;
volatile UBaseType_t uxInterruptNesting = 0x01;
/* Stores the task stack pointer when a switch is made to use the system stack. */
UBaseType_t uxSavedTaskStackPointer = 0;
UBaseType_t uxSavedTaskStackPointer = 0;
/* The stack used by interrupt service routines that cause a context switch. */
__attribute__( ( aligned( 8 ) ) ) StackType_t xISRStack[ configISR_STACK_SIZE ] = { 0 };
@ -158,12 +159,12 @@ __attribute__( ( aligned( 8 ) ) ) StackType_t xISRStack[ configISR_STACK_SIZE ]
* the callers stack, as some functions seem to want to do this. 8 byte alignment
* is required to allow double word floating point stack pushes generated by the
* compiler. */
const StackType_t * const xISRStackTop = &( xISRStack[ ( configISR_STACK_SIZE & ~portBYTE_ALIGNMENT_MASK ) - 8 ] );
const StackType_t * const xISRStackTop = &( xISRStack[ ( configISR_STACK_SIZE & ~portBYTE_ALIGNMENT_MASK ) - 8 ] );
/* Saved as part of the task context. Set to pdFALSE if the task does not
* require an FPU context. */
#if ( __mips_hard_float == 1 ) && ( configUSE_TASK_FPU_SUPPORT == 1 )
uint32_t ulTaskHasFPUContext = 0;
uint32_t ulTaskHasFPUContext = 0;
#endif
/*-----------------------------------------------------------*/
@ -239,19 +240,19 @@ __attribute__( ( weak ) ) void vApplicationSetupTickTimerInterrupt( void )
{
const uint32_t ulCompareMatch = ( ( configPERIPHERAL_CLOCK_HZ / portTIMER_PRESCALE ) / configTICK_RATE_HZ ) - 1UL;
T1CON = 0x0000;
T1CON = 0x0000;
T1CONbits.TCKPS = portPRESCALE_BITS;
PR1 = ulCompareMatch;
IPC1bits.T1IP = configKERNEL_INTERRUPT_PRIORITY;
PR1 = ulCompareMatch;
IPC1bits.T1IP = configKERNEL_INTERRUPT_PRIORITY;
/* Clear the interrupt as a starting condition. */
IFS0bits.T1IF = 0;
IFS0bits.T1IF = 0;
/* Enable the interrupt. */
IEC0bits.T1IE = 1;
IEC0bits.T1IE = 1;
/* Start the timer. */
T1CONbits.TON = 1;
T1CONbits.TON = 1;
}
/*-----------------------------------------------------------*/
@ -276,15 +277,15 @@ BaseType_t xPortStartScheduler( void )
#endif /* configCHECK_FOR_STACK_OVERFLOW > 2 */
/* Clear the software interrupt flag. */
IFS0CLR = _IFS0_CS0IF_MASK;
IFS0CLR = _IFS0_CS0IF_MASK;
/* Set software timer priority. */
IPC0CLR = _IPC0_CS0IP_MASK;
IPC0SET = ( configKERNEL_INTERRUPT_PRIORITY << _IPC0_CS0IP_POSITION );
IPC0CLR = _IPC0_CS0IP_MASK;
IPC0SET = ( configKERNEL_INTERRUPT_PRIORITY << _IPC0_CS0IP_POSITION );
/* Enable software interrupt. */
IEC0CLR = _IEC0_CS0IE_MASK;
IEC0SET = 1 << _IEC0_CS0IE_POSITION;
IEC0CLR = _IEC0_CS0IE_MASK;
IEC0SET = 1 << _IEC0_CS0IE_POSITION;
/* Setup the timer to generate the tick. Interrupts will have been
* disabled by the time we get here. */

View file

@ -22,6 +22,7 @@
* http://www.FreeRTOS.org
* http://aws.amazon.com/freertos
*
* 1 tab == 4 spaces!
*/
#ifndef PORTMACRO_H
@ -113,7 +114,7 @@
uint32_t ulStatus; \
\
/* Mask interrupts at and below the kernel interrupt priority. */ \
ulStatus = _CP0_GET_STATUS(); \
ulStatus = _CP0_GET_STATUS(); \
ulStatus &= ~portALL_IPL_BITS; \
_CP0_SET_STATUS( ( ulStatus | ( configMAX_SYSCALL_INTERRUPT_PRIORITY << portIPL_SHIFT ) ) ); \
}
@ -124,7 +125,7 @@
uint32_t ulStatus; \
\
/* Unmask all interrupts. */ \
ulStatus = _CP0_GET_STATUS(); \
ulStatus = _CP0_GET_STATUS(); \
ulStatus &= ~portALL_IPL_BITS; \
_CP0_SET_STATUS( ulStatus ); \
}
@ -167,7 +168,7 @@
/*-----------------------------------------------------------*/
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - _clz( ( uxReadyPriorities ) ) )
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - _clz( ( uxReadyPriorities ) ) )
#endif /* taskRECORD_READY_PRIORITY */
@ -180,7 +181,7 @@
uint32_t ulCause; \
\
/* Trigger software interrupt. */ \
ulCause = _CP0_GET_CAUSE(); \
ulCause = _CP0_GET_CAUSE(); \
ulCause |= portSW0_BIT; \
_CP0_SET_CAUSE( ulCause ); \
}