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Remove __NVIC_PRIO_BITS and configPRIO_BITS check in port (#683)

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* Remove __NVIC_PRIO_BITS and configPRIO_BITS check in CM3, CM4 and ARMv8.
* Add hardware not implemented bits check. These bits should be zero.

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
This commit is contained in:
chinglee-iot 2023-06-08 10:52:08 +08:00 • committed by GitHub
parent d3c289fe5b
commit 4a35c97fec
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GPG key ID: 4AEE18F83AFDEB23
37 changed files with 148 additions and 961 deletions
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26
portable/RVDS/ARM_CM3/port.c
View file

@ -294,6 +294,10 @@ BaseType_t xPortStartScheduler( void )
* See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
configASSERT( ucMaxSysCallPriority );
/* Check that the bits not implemented bits in hardware are zero in
* configMAX_SYSCALL_INTERRUPT_PRIORITY. */
configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY & ( ~ucMaxPriorityValue ) ) == 0U );
/* Calculate the maximum acceptable priority group value for the number
* of bits read back. */
@ -330,28 +334,6 @@ BaseType_t xPortStartScheduler( void )
ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS - ulImplementedPrioBits;
}
#ifdef __NVIC_PRIO_BITS
{
/*
* Check that the number of implemented priority bits queried from
* hardware is at least as many as specified in the CMSIS
* __NVIC_PRIO_BITS configuration macro.
*/
configASSERT( ulImplementedPrioBits >= __NVIC_PRIO_BITS );
}
#endif
#ifdef configPRIO_BITS
{
/*
* Check that the number of implemented priority bits queried from
* hardware is at least as many as specified in the FreeRTOS
* configPRIO_BITS configuration macro.
*/
configASSERT( ulImplementedPrioBits >= configPRIO_BITS );
}
#endif
/* Shift the priority group value back to its position within the AIRCR
* register. */
ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;

26
portable/RVDS/ARM_CM4F/port.c
View file

@ -360,6 +360,10 @@ BaseType_t xPortStartScheduler( void )
* See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
configASSERT( ucMaxSysCallPriority );
/* Check that the bits not implemented bits in hardware are zero in
* configMAX_SYSCALL_INTERRUPT_PRIORITY. */
configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY & ( ~ucMaxPriorityValue ) ) == 0U );
/* Calculate the maximum acceptable priority group value for the number
* of bits read back. */
@ -396,28 +400,6 @@ BaseType_t xPortStartScheduler( void )
ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS - ulImplementedPrioBits;
}
#ifdef __NVIC_PRIO_BITS
{
/*
* Check that the number of implemented priority bits queried from
* hardware is at least as many as specified in the CMSIS
* __NVIC_PRIO_BITS configuration macro.
*/
configASSERT( ulImplementedPrioBits >= __NVIC_PRIO_BITS );
}
#endif
#ifdef configPRIO_BITS
{
/*
* Check that the number of implemented priority bits queried from
* hardware is at least as many as specified in the FreeRTOS
* configPRIO_BITS configuration macro.
*/
configASSERT( ulImplementedPrioBits >= configPRIO_BITS );
}
#endif
/* Shift the priority group value back to its position within the AIRCR
* register. */
ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;

26
portable/RVDS/ARM_CM4_MPU/port.c
View file

@ -453,6 +453,10 @@ BaseType_t xPortStartScheduler( void )
* See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
configASSERT( ucMaxSysCallPriority );
/* Check that the bits not implemented bits in hardware are zero in
* configMAX_SYSCALL_INTERRUPT_PRIORITY. */
configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY & ( ~ucMaxPriorityValue ) ) == 0U );
/* Calculate the maximum acceptable priority group value for the number
* of bits read back. */
@ -489,28 +493,6 @@ BaseType_t xPortStartScheduler( void )
ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS - ulImplementedPrioBits;
}
#ifdef __NVIC_PRIO_BITS
{
/*
* Check that the number of implemented priority bits queried from
* hardware is at least as many as specified in the CMSIS
* __NVIC_PRIO_BITS configuration macro.
*/
configASSERT( ulImplementedPrioBits >= __NVIC_PRIO_BITS );
}
#endif
#ifdef configPRIO_BITS
{
/*
* Check that the number of implemented priority bits queried from
* hardware is at least as many as specified in the FreeRTOS
* configPRIO_BITS configuration macro.
*/
configASSERT( ulImplementedPrioBits >= configPRIO_BITS );
}
#endif
/* Shift the priority group value back to its position within the AIRCR
* register. */
ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;

26
portable/RVDS/ARM_CM7/r0p1/port.c
View file

@ -344,6 +344,10 @@ BaseType_t xPortStartScheduler( void )
* See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
configASSERT( ucMaxSysCallPriority );
/* Check that the bits not implemented bits in hardware are zero in
* configMAX_SYSCALL_INTERRUPT_PRIORITY. */
configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY & ( ~ucMaxPriorityValue ) ) == 0U );
/* Calculate the maximum acceptable priority group value for the number
* of bits read back. */
@ -380,28 +384,6 @@ BaseType_t xPortStartScheduler( void )
ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS - ulImplementedPrioBits;
}
#ifdef __NVIC_PRIO_BITS
{
/*
* Check that the number of implemented priority bits queried from
* hardware is at least as many as specified in the CMSIS
* __NVIC_PRIO_BITS configuration macro.
*/
configASSERT( ulImplementedPrioBits >= __NVIC_PRIO_BITS );
}
#endif
#ifdef configPRIO_BITS
{
/*
* Check that the number of implemented priority bits queried from
* hardware is at least as many as specified in the FreeRTOS
* configPRIO_BITS configuration macro.
*/
configASSERT( ulImplementedPrioBits >= configPRIO_BITS );
}
#endif
/* Shift the priority group value back to its position within the AIRCR
* register. */
ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;