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Remove __NVIC_PRIO_BITS and configPRIO_BITS check in port (#683)

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* Remove __NVIC_PRIO_BITS and configPRIO_BITS check in CM3, CM4 and ARMv8.
* Add hardware not implemented bits check. These bits should be zero.

---------

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
This commit is contained in:
chinglee-iot 2023-06-08 10:52:08 +08:00 • committed by GitHub
parent d3c289fe5b
commit 4a35c97fec
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37 changed files with 148 additions and 961 deletions
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33
portable/GCC/ARM_CM35P/non_secure/port.c
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@ -1128,6 +1128,10 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
* See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
configASSERT( ucMaxSysCallPriority );
/* Check that the bits not implemented bits in hardware are zero in
* configMAX_SYSCALL_INTERRUPT_PRIORITY. */
configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY & ( ~ucMaxPriorityValue ) ) == 0U );
/* Calculate the maximum acceptable priority group value for the number
* of bits read back. */
@ -1164,35 +1168,6 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS - ulImplementedPrioBits;
}
/* The interrupt priority bits are not modelled in QEMU and the assert that
* checks the number of implemented bits and __NVIC_PRIO_BITS will always fail.
* Therefore, this assert is not adding any value for QEMU targets. The config
* option `configDISABLE_INTERRUPT_PRIO_BITS_CHECK` should be defined in the
* `FreeRTOSConfig.h` for QEMU targets. */
#ifndef configDISABLE_INTERRUPT_PRIO_BITS_CHECK
{
#ifdef __NVIC_PRIO_BITS
{
/*
* Check that the number of implemented priority bits queried from
* hardware is equal to the CMSIS __NVIC_PRIO_BITS configuration macro.
*/
configASSERT( ulImplementedPrioBits == __NVIC_PRIO_BITS );
}
#endif /* __NVIC_PRIO_BITS */
#ifdef configPRIO_BITS
{
/*
* Check that the number of implemented priority bits queried from
* hardware is equal to the FreeRTOS configPRIO_BITS configuration macro.
*/
configASSERT( ulImplementedPrioBits == configPRIO_BITS );
}
#endif /* configPRIO_BITS */
}
#endif /* #ifndef configDISABLE_INTERRUPT_PRIO_BITS_CHECK */
/* Shift the priority group value back to its position within the AIRCR
* register. */
ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;