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Add IAR projects for LPC55S69 (#1007)
* Add IAR projects for LPC55S69 * IAR Project for trustzone * MCUXpresso and IAR projects for non-trustzone (NTZ) ports Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Fix build issues and warnings Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Fix formatting check Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
This commit is contained in:
Gaurav-Aggarwal-AWS
GitHub
parent
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commit
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48 changed files with 25781 additions and 790 deletions
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@ -1,6 +1,9 @@
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# IDE autogenerated files.
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.settings/
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*.settings.xml
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*.launch
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settings/
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*.ewt
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*.dep
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# Build Artifacts
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Debug/
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File diff suppressed because it is too large
Load diff
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@ -0,0 +1,635 @@
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;/*****************************************************************************
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; * @file: startup_LPC55S69_cm33_core0.s
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; * @purpose: CMSIS Cortex-M33 Core Device Startup File
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; * LPC55S69_cm33_core0
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; * @version: 1.1
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; * @date: 2019-5-16
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; *----------------------------------------------------------------------------
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; *
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; Copyright 1997-2016 Freescale Semiconductor, Inc.
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; Copyright 2016-2021 NXP
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; All rights reserved.
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;
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; SPDX-License-Identifier: BSD-3-Clause
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;
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; The modules in this file are included in the libraries, and may be replaced
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; by any user-defined modules that define the PUBLIC symbol _program_start or
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; a user defined start symbol.
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; To override the cstartup defined in the library, simply add your modified
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; version to the workbench project.
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;
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; The vector table is normally located at address 0.
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; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
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; The name "__vector_table" has special meaning for C-SPY:
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; it is where the SP start value is found, and the NVIC vector
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; table register (VTOR) is initialized to this address if != 0.
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;
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; Cortex-M version
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;
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MODULE ?cstartup
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;; Forward declaration of sections.
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SECTION CSTACK:DATA:NOROOT(3)
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SECTION .intvec:CODE:NOROOT(2)
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EXTERN __iar_program_start
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EXTERN SystemInit
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PUBLIC __vector_table
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PUBLIC __vector_table_0x1c
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PUBLIC __Vectors
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PUBLIC __Vectors_End
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PUBLIC __Vectors_Size
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DATA
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__iar_init$$done: ; The vector table is not needed
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; until after copy initialization is done
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__vector_table
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DCD sfe(CSTACK)
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DCD Reset_Handler
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DCD NMI_Handler
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DCD HardFault_Handler
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DCD MemManage_Handler
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DCD BusFault_Handler
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DCD UsageFault_Handler
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__vector_table_0x1c
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DCD SecureFault_Handler
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DCD 0
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DCD 0
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DCD 0
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DCD SVC_Handler
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DCD DebugMon_Handler
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DCD 0
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DCD PendSV_Handler
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DCD SysTick_Handler
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; External Interrupts
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DCD WDT_BOD_IRQHandler ; Windowed watchdog timer, Brownout detect, Flash interrupt
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DCD DMA0_IRQHandler ; DMA0 controller
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DCD GINT0_IRQHandler ; GPIO group 0
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DCD GINT1_IRQHandler ; GPIO group 1
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DCD PIN_INT0_IRQHandler ; Pin interrupt 0 or pattern match engine slice 0
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DCD PIN_INT1_IRQHandler ; Pin interrupt 1or pattern match engine slice 1
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DCD PIN_INT2_IRQHandler ; Pin interrupt 2 or pattern match engine slice 2
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DCD PIN_INT3_IRQHandler ; Pin interrupt 3 or pattern match engine slice 3
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DCD UTICK0_IRQHandler ; Micro-tick Timer
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DCD MRT0_IRQHandler ; Multi-rate timer
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DCD CTIMER0_IRQHandler ; Standard counter/timer CTIMER0
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DCD CTIMER1_IRQHandler ; Standard counter/timer CTIMER1
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DCD SCT0_IRQHandler ; SCTimer/PWM
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DCD CTIMER3_IRQHandler ; Standard counter/timer CTIMER3
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DCD FLEXCOMM0_IRQHandler ; Flexcomm Interface 0 (USART, SPI, I2C, I2S, FLEXCOMM)
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DCD FLEXCOMM1_IRQHandler ; Flexcomm Interface 1 (USART, SPI, I2C, I2S, FLEXCOMM)
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DCD FLEXCOMM2_IRQHandler ; Flexcomm Interface 2 (USART, SPI, I2C, I2S, FLEXCOMM)
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DCD FLEXCOMM3_IRQHandler ; Flexcomm Interface 3 (USART, SPI, I2C, I2S, FLEXCOMM)
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DCD FLEXCOMM4_IRQHandler ; Flexcomm Interface 4 (USART, SPI, I2C, I2S, FLEXCOMM)
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DCD FLEXCOMM5_IRQHandler ; Flexcomm Interface 5 (USART, SPI, I2C, I2S, FLEXCOMM)
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DCD FLEXCOMM6_IRQHandler ; Flexcomm Interface 6 (USART, SPI, I2C, I2S, FLEXCOMM)
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DCD FLEXCOMM7_IRQHandler ; Flexcomm Interface 7 (USART, SPI, I2C, I2S, FLEXCOMM)
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DCD ADC0_IRQHandler ; ADC0
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DCD Reserved39_IRQHandler ; Reserved interrupt
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DCD ACMP_IRQHandler ; ACMP interrupts
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DCD Reserved41_IRQHandler ; Reserved interrupt
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DCD Reserved42_IRQHandler ; Reserved interrupt
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DCD USB0_NEEDCLK_IRQHandler ; USB Activity Wake-up Interrupt
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DCD USB0_IRQHandler ; USB device
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DCD RTC_IRQHandler ; RTC alarm and wake-up interrupts
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DCD Reserved46_IRQHandler ; Reserved interrupt
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DCD MAILBOX_IRQHandler ; WAKEUP,Mailbox interrupt (present on selected devices)
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DCD PIN_INT4_IRQHandler ; Pin interrupt 4 or pattern match engine slice 4 int
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DCD PIN_INT5_IRQHandler ; Pin interrupt 5 or pattern match engine slice 5 int
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DCD PIN_INT6_IRQHandler ; Pin interrupt 6 or pattern match engine slice 6 int
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DCD PIN_INT7_IRQHandler ; Pin interrupt 7 or pattern match engine slice 7 int
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DCD CTIMER2_IRQHandler ; Standard counter/timer CTIMER2
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DCD CTIMER4_IRQHandler ; Standard counter/timer CTIMER4
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DCD OS_EVENT_IRQHandler ; OSEVTIMER0 and OSEVTIMER0_WAKEUP interrupts
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DCD Reserved55_IRQHandler ; Reserved interrupt
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DCD Reserved56_IRQHandler ; Reserved interrupt
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DCD Reserved57_IRQHandler ; Reserved interrupt
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DCD SDIO_IRQHandler ; SD/MMC
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DCD Reserved59_IRQHandler ; Reserved interrupt
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DCD Reserved60_IRQHandler ; Reserved interrupt
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DCD Reserved61_IRQHandler ; Reserved interrupt
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DCD USB1_PHY_IRQHandler ; USB1_PHY
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DCD USB1_IRQHandler ; USB1 interrupt
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DCD USB1_NEEDCLK_IRQHandler ; USB1 activity
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DCD SEC_HYPERVISOR_CALL_IRQHandler ; SEC_HYPERVISOR_CALL interrupt
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DCD SEC_GPIO_INT0_IRQ0_IRQHandler ; SEC_GPIO_INT0_IRQ0 interrupt
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DCD SEC_GPIO_INT0_IRQ1_IRQHandler ; SEC_GPIO_INT0_IRQ1 interrupt
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DCD PLU_IRQHandler ; PLU interrupt
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DCD SEC_VIO_IRQHandler ; SEC_VIO interrupt
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DCD HASHCRYPT_IRQHandler ; HASHCRYPT interrupt
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DCD CASER_IRQHandler ; CASPER interrupt
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DCD PUF_IRQHandler ; PUF interrupt
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DCD PQ_IRQHandler ; PQ interrupt
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DCD DMA1_IRQHandler ; DMA1 interrupt
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DCD FLEXCOMM8_IRQHandler ; Flexcomm Interface 8 (SPI, , FLEXCOMM)
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__Vectors_End
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__Vectors EQU __vector_table
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__Vectors_Size EQU __Vectors_End - __Vectors
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;
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;; Default interrupt handlers.
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;;
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THUMB
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PUBWEAK Reset_Handler
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SECTION .text:CODE:REORDER:NOROOT(2)
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Reset_Handler
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CPSID I ; Mask interrupts
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LDR R0, =0xE000ED08
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LDR R1, =__vector_table
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STR R1, [R0]
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LDR R2, [R1]
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MSR MSP, R2
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LDR R0, =sfb(CSTACK)
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MSR MSPLIM, R0
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CPSIE I ; Unmask interrupts
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LDR R0, =SystemInit
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BLX R0
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LDR R0, =__iar_program_start
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BX R0
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PUBWEAK NMI_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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NMI_Handler
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B .
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PUBWEAK HardFault_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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HardFault_Handler
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B .
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PUBWEAK MemManage_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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MemManage_Handler
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B .
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PUBWEAK BusFault_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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BusFault_Handler
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B .
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PUBWEAK UsageFault_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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UsageFault_Handler
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B .
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PUBWEAK SecureFault_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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SecureFault_Handler
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B .
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PUBWEAK SVC_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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SVC_Handler
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B .
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PUBWEAK DebugMon_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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DebugMon_Handler
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B .
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PUBWEAK PendSV_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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PendSV_Handler
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B .
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PUBWEAK SysTick_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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SysTick_Handler
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B .
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PUBWEAK WDT_BOD_IRQHandler
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PUBWEAK WDT_BOD_DriverIRQHandler
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SECTION .text:CODE:REORDER:NOROOT(2)
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WDT_BOD_IRQHandler
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LDR R0, =WDT_BOD_DriverIRQHandler
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BX R0
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PUBWEAK DMA0_IRQHandler
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PUBWEAK DMA0_DriverIRQHandler
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SECTION .text:CODE:REORDER:NOROOT(2)
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DMA0_IRQHandler
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LDR R0, =DMA0_DriverIRQHandler
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BX R0
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PUBWEAK GINT0_IRQHandler
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PUBWEAK GINT0_DriverIRQHandler
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SECTION .text:CODE:REORDER:NOROOT(2)
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GINT0_IRQHandler
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LDR R0, =GINT0_DriverIRQHandler
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BX R0
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PUBWEAK GINT1_IRQHandler
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PUBWEAK GINT1_DriverIRQHandler
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SECTION .text:CODE:REORDER:NOROOT(2)
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GINT1_IRQHandler
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LDR R0, =GINT1_DriverIRQHandler
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BX R0
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PUBWEAK PIN_INT0_IRQHandler
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PUBWEAK PIN_INT0_DriverIRQHandler
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SECTION .text:CODE:REORDER:NOROOT(2)
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PIN_INT0_IRQHandler
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LDR R0, =PIN_INT0_DriverIRQHandler
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BX R0
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PUBWEAK PIN_INT1_IRQHandler
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PUBWEAK PIN_INT1_DriverIRQHandler
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SECTION .text:CODE:REORDER:NOROOT(2)
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PIN_INT1_IRQHandler
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LDR R0, =PIN_INT1_DriverIRQHandler
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BX R0
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PUBWEAK PIN_INT2_IRQHandler
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PUBWEAK PIN_INT2_DriverIRQHandler
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SECTION .text:CODE:REORDER:NOROOT(2)
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PIN_INT2_IRQHandler
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LDR R0, =PIN_INT2_DriverIRQHandler
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BX R0
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PUBWEAK PIN_INT3_IRQHandler
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PUBWEAK PIN_INT3_DriverIRQHandler
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SECTION .text:CODE:REORDER:NOROOT(2)
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PIN_INT3_IRQHandler
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LDR R0, =PIN_INT3_DriverIRQHandler
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BX R0
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PUBWEAK UTICK0_IRQHandler
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PUBWEAK UTICK0_DriverIRQHandler
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SECTION .text:CODE:REORDER:NOROOT(2)
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UTICK0_IRQHandler
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LDR R0, =UTICK0_DriverIRQHandler
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BX R0
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PUBWEAK MRT0_IRQHandler
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PUBWEAK MRT0_DriverIRQHandler
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SECTION .text:CODE:REORDER:NOROOT(2)
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MRT0_IRQHandler
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LDR R0, =MRT0_DriverIRQHandler
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BX R0
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PUBWEAK CTIMER0_IRQHandler
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PUBWEAK CTIMER0_DriverIRQHandler
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SECTION .text:CODE:REORDER:NOROOT(2)
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CTIMER0_IRQHandler
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LDR R0, =CTIMER0_DriverIRQHandler
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BX R0
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PUBWEAK CTIMER1_IRQHandler
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PUBWEAK CTIMER1_DriverIRQHandler
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SECTION .text:CODE:REORDER:NOROOT(2)
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CTIMER1_IRQHandler
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LDR R0, =CTIMER1_DriverIRQHandler
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BX R0
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PUBWEAK SCT0_IRQHandler
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PUBWEAK SCT0_DriverIRQHandler
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SECTION .text:CODE:REORDER:NOROOT(2)
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SCT0_IRQHandler
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LDR R0, =SCT0_DriverIRQHandler
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BX R0
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PUBWEAK CTIMER3_IRQHandler
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PUBWEAK CTIMER3_DriverIRQHandler
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SECTION .text:CODE:REORDER:NOROOT(2)
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CTIMER3_IRQHandler
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LDR R0, =CTIMER3_DriverIRQHandler
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BX R0
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PUBWEAK FLEXCOMM0_IRQHandler
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PUBWEAK FLEXCOMM0_DriverIRQHandler
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SECTION .text:CODE:REORDER:NOROOT(2)
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FLEXCOMM0_IRQHandler
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LDR R0, =FLEXCOMM0_DriverIRQHandler
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BX R0
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PUBWEAK FLEXCOMM1_IRQHandler
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PUBWEAK FLEXCOMM1_DriverIRQHandler
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SECTION .text:CODE:REORDER:NOROOT(2)
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FLEXCOMM1_IRQHandler
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LDR R0, =FLEXCOMM1_DriverIRQHandler
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BX R0
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PUBWEAK FLEXCOMM2_IRQHandler
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PUBWEAK FLEXCOMM2_DriverIRQHandler
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SECTION .text:CODE:REORDER:NOROOT(2)
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FLEXCOMM2_IRQHandler
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LDR R0, =FLEXCOMM2_DriverIRQHandler
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BX R0
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PUBWEAK FLEXCOMM3_IRQHandler
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PUBWEAK FLEXCOMM3_DriverIRQHandler
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SECTION .text:CODE:REORDER:NOROOT(2)
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FLEXCOMM3_IRQHandler
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LDR R0, =FLEXCOMM3_DriverIRQHandler
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BX R0
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PUBWEAK FLEXCOMM4_IRQHandler
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PUBWEAK FLEXCOMM4_DriverIRQHandler
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SECTION .text:CODE:REORDER:NOROOT(2)
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FLEXCOMM4_IRQHandler
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LDR R0, =FLEXCOMM4_DriverIRQHandler
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BX R0
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PUBWEAK FLEXCOMM5_IRQHandler
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PUBWEAK FLEXCOMM5_DriverIRQHandler
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SECTION .text:CODE:REORDER:NOROOT(2)
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FLEXCOMM5_IRQHandler
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LDR R0, =FLEXCOMM5_DriverIRQHandler
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BX R0
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PUBWEAK FLEXCOMM6_IRQHandler
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PUBWEAK FLEXCOMM6_DriverIRQHandler
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SECTION .text:CODE:REORDER:NOROOT(2)
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FLEXCOMM6_IRQHandler
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LDR R0, =FLEXCOMM6_DriverIRQHandler
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BX R0
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PUBWEAK FLEXCOMM7_IRQHandler
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PUBWEAK FLEXCOMM7_DriverIRQHandler
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SECTION .text:CODE:REORDER:NOROOT(2)
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FLEXCOMM7_IRQHandler
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LDR R0, =FLEXCOMM7_DriverIRQHandler
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BX R0
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||||
PUBWEAK ADC0_IRQHandler
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PUBWEAK ADC0_DriverIRQHandler
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||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
ADC0_IRQHandler
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||||
LDR R0, =ADC0_DriverIRQHandler
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BX R0
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||||
PUBWEAK Reserved39_IRQHandler
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PUBWEAK Reserved39_DriverIRQHandler
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||||
SECTION .text:CODE:REORDER:NOROOT(2)
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Reserved39_IRQHandler
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LDR R0, =Reserved39_DriverIRQHandler
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BX R0
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PUBWEAK ACMP_IRQHandler
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||||
PUBWEAK ACMP_DriverIRQHandler
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SECTION .text:CODE:REORDER:NOROOT(2)
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ACMP_IRQHandler
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LDR R0, =ACMP_DriverIRQHandler
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BX R0
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PUBWEAK Reserved41_IRQHandler
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PUBWEAK Reserved41_DriverIRQHandler
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||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
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Reserved41_IRQHandler
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||||
LDR R0, =Reserved41_DriverIRQHandler
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BX R0
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PUBWEAK Reserved42_IRQHandler
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PUBWEAK Reserved42_DriverIRQHandler
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||||
SECTION .text:CODE:REORDER:NOROOT(2)
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Reserved42_IRQHandler
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||||
LDR R0, =Reserved42_DriverIRQHandler
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||||
BX R0
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||||
PUBWEAK USB0_NEEDCLK_IRQHandler
|
||||
PUBWEAK USB0_NEEDCLK_DriverIRQHandler
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||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
USB0_NEEDCLK_IRQHandler
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||||
LDR R0, =USB0_NEEDCLK_DriverIRQHandler
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||||
BX R0
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PUBWEAK USB0_IRQHandler
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PUBWEAK USB0_DriverIRQHandler
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SECTION .text:CODE:REORDER:NOROOT(2)
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USB0_IRQHandler
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LDR R0, =USB0_DriverIRQHandler
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BX R0
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PUBWEAK RTC_IRQHandler
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PUBWEAK RTC_DriverIRQHandler
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SECTION .text:CODE:REORDER:NOROOT(2)
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RTC_IRQHandler
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LDR R0, =RTC_DriverIRQHandler
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BX R0
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PUBWEAK Reserved46_IRQHandler
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PUBWEAK Reserved46_DriverIRQHandler
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SECTION .text:CODE:REORDER:NOROOT(2)
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Reserved46_IRQHandler
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LDR R0, =Reserved46_DriverIRQHandler
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BX R0
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PUBWEAK MAILBOX_IRQHandler
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PUBWEAK MAILBOX_DriverIRQHandler
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SECTION .text:CODE:REORDER:NOROOT(2)
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MAILBOX_IRQHandler
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LDR R0, =MAILBOX_DriverIRQHandler
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BX R0
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PUBWEAK PIN_INT4_IRQHandler
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||||
PUBWEAK PIN_INT4_DriverIRQHandler
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||||
SECTION .text:CODE:REORDER:NOROOT(2)
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PIN_INT4_IRQHandler
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||||
LDR R0, =PIN_INT4_DriverIRQHandler
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||||
BX R0
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PUBWEAK PIN_INT5_IRQHandler
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||||
PUBWEAK PIN_INT5_DriverIRQHandler
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SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
PIN_INT5_IRQHandler
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LDR R0, =PIN_INT5_DriverIRQHandler
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||||
BX R0
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PUBWEAK PIN_INT6_IRQHandler
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PUBWEAK PIN_INT6_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
PIN_INT6_IRQHandler
|
||||
LDR R0, =PIN_INT6_DriverIRQHandler
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BX R0
|
||||
PUBWEAK PIN_INT7_IRQHandler
|
||||
PUBWEAK PIN_INT7_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
PIN_INT7_IRQHandler
|
||||
LDR R0, =PIN_INT7_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK CTIMER2_IRQHandler
|
||||
PUBWEAK CTIMER2_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
CTIMER2_IRQHandler
|
||||
LDR R0, =CTIMER2_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK CTIMER4_IRQHandler
|
||||
PUBWEAK CTIMER4_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
CTIMER4_IRQHandler
|
||||
LDR R0, =CTIMER4_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK OS_EVENT_IRQHandler
|
||||
PUBWEAK OS_EVENT_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
OS_EVENT_IRQHandler
|
||||
LDR R0, =OS_EVENT_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK Reserved55_IRQHandler
|
||||
PUBWEAK Reserved55_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
Reserved55_IRQHandler
|
||||
LDR R0, =Reserved55_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK Reserved56_IRQHandler
|
||||
PUBWEAK Reserved56_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
Reserved56_IRQHandler
|
||||
LDR R0, =Reserved56_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK Reserved57_IRQHandler
|
||||
PUBWEAK Reserved57_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
Reserved57_IRQHandler
|
||||
LDR R0, =Reserved57_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK SDIO_IRQHandler
|
||||
PUBWEAK SDIO_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
SDIO_IRQHandler
|
||||
LDR R0, =SDIO_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK Reserved59_IRQHandler
|
||||
PUBWEAK Reserved59_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
Reserved59_IRQHandler
|
||||
LDR R0, =Reserved59_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK Reserved60_IRQHandler
|
||||
PUBWEAK Reserved60_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
Reserved60_IRQHandler
|
||||
LDR R0, =Reserved60_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK Reserved61_IRQHandler
|
||||
PUBWEAK Reserved61_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
Reserved61_IRQHandler
|
||||
LDR R0, =Reserved61_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK USB1_PHY_IRQHandler
|
||||
PUBWEAK USB1_PHY_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
USB1_PHY_IRQHandler
|
||||
LDR R0, =USB1_PHY_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK USB1_IRQHandler
|
||||
PUBWEAK USB1_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
USB1_IRQHandler
|
||||
LDR R0, =USB1_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK USB1_NEEDCLK_IRQHandler
|
||||
PUBWEAK USB1_NEEDCLK_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
USB1_NEEDCLK_IRQHandler
|
||||
LDR R0, =USB1_NEEDCLK_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK SEC_HYPERVISOR_CALL_IRQHandler
|
||||
PUBWEAK SEC_HYPERVISOR_CALL_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
SEC_HYPERVISOR_CALL_IRQHandler
|
||||
LDR R0, =SEC_HYPERVISOR_CALL_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK SEC_GPIO_INT0_IRQ0_IRQHandler
|
||||
PUBWEAK SEC_GPIO_INT0_IRQ0_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
SEC_GPIO_INT0_IRQ0_IRQHandler
|
||||
LDR R0, =SEC_GPIO_INT0_IRQ0_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK SEC_GPIO_INT0_IRQ1_IRQHandler
|
||||
PUBWEAK SEC_GPIO_INT0_IRQ1_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
SEC_GPIO_INT0_IRQ1_IRQHandler
|
||||
LDR R0, =SEC_GPIO_INT0_IRQ1_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK PLU_IRQHandler
|
||||
PUBWEAK PLU_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
PLU_IRQHandler
|
||||
LDR R0, =PLU_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK SEC_VIO_IRQHandler
|
||||
PUBWEAK SEC_VIO_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
SEC_VIO_IRQHandler
|
||||
LDR R0, =SEC_VIO_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK HASHCRYPT_IRQHandler
|
||||
PUBWEAK HASHCRYPT_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
HASHCRYPT_IRQHandler
|
||||
LDR R0, =HASHCRYPT_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK CASER_IRQHandler
|
||||
PUBWEAK CASER_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
CASER_IRQHandler
|
||||
LDR R0, =CASER_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK PUF_IRQHandler
|
||||
PUBWEAK PUF_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
PUF_IRQHandler
|
||||
LDR R0, =PUF_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK PQ_IRQHandler
|
||||
PUBWEAK PQ_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
PQ_IRQHandler
|
||||
LDR R0, =PQ_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK DMA1_IRQHandler
|
||||
PUBWEAK DMA1_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
DMA1_IRQHandler
|
||||
LDR R0, =DMA1_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK FLEXCOMM8_IRQHandler
|
||||
PUBWEAK FLEXCOMM8_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
FLEXCOMM8_IRQHandler
|
||||
LDR R0, =FLEXCOMM8_DriverIRQHandler
|
||||
BX R0
|
||||
WDT_BOD_DriverIRQHandler
|
||||
DMA0_DriverIRQHandler
|
||||
GINT0_DriverIRQHandler
|
||||
GINT1_DriverIRQHandler
|
||||
PIN_INT0_DriverIRQHandler
|
||||
PIN_INT1_DriverIRQHandler
|
||||
PIN_INT2_DriverIRQHandler
|
||||
PIN_INT3_DriverIRQHandler
|
||||
UTICK0_DriverIRQHandler
|
||||
MRT0_DriverIRQHandler
|
||||
CTIMER0_DriverIRQHandler
|
||||
CTIMER1_DriverIRQHandler
|
||||
SCT0_DriverIRQHandler
|
||||
CTIMER3_DriverIRQHandler
|
||||
FLEXCOMM0_DriverIRQHandler
|
||||
FLEXCOMM1_DriverIRQHandler
|
||||
FLEXCOMM2_DriverIRQHandler
|
||||
FLEXCOMM3_DriverIRQHandler
|
||||
FLEXCOMM4_DriverIRQHandler
|
||||
FLEXCOMM5_DriverIRQHandler
|
||||
FLEXCOMM6_DriverIRQHandler
|
||||
FLEXCOMM7_DriverIRQHandler
|
||||
ADC0_DriverIRQHandler
|
||||
Reserved39_DriverIRQHandler
|
||||
ACMP_DriverIRQHandler
|
||||
Reserved41_DriverIRQHandler
|
||||
Reserved42_DriverIRQHandler
|
||||
USB0_NEEDCLK_DriverIRQHandler
|
||||
USB0_DriverIRQHandler
|
||||
RTC_DriverIRQHandler
|
||||
Reserved46_DriverIRQHandler
|
||||
MAILBOX_DriverIRQHandler
|
||||
PIN_INT4_DriverIRQHandler
|
||||
PIN_INT5_DriverIRQHandler
|
||||
PIN_INT6_DriverIRQHandler
|
||||
PIN_INT7_DriverIRQHandler
|
||||
CTIMER2_DriverIRQHandler
|
||||
CTIMER4_DriverIRQHandler
|
||||
OS_EVENT_DriverIRQHandler
|
||||
Reserved55_DriverIRQHandler
|
||||
Reserved56_DriverIRQHandler
|
||||
Reserved57_DriverIRQHandler
|
||||
SDIO_DriverIRQHandler
|
||||
Reserved59_DriverIRQHandler
|
||||
Reserved60_DriverIRQHandler
|
||||
Reserved61_DriverIRQHandler
|
||||
USB1_PHY_DriverIRQHandler
|
||||
USB1_DriverIRQHandler
|
||||
USB1_NEEDCLK_DriverIRQHandler
|
||||
SEC_HYPERVISOR_CALL_DriverIRQHandler
|
||||
SEC_GPIO_INT0_IRQ0_DriverIRQHandler
|
||||
SEC_GPIO_INT0_IRQ1_DriverIRQHandler
|
||||
PLU_DriverIRQHandler
|
||||
SEC_VIO_DriverIRQHandler
|
||||
HASHCRYPT_DriverIRQHandler
|
||||
CASER_DriverIRQHandler
|
||||
PUF_DriverIRQHandler
|
||||
PQ_DriverIRQHandler
|
||||
DMA1_DriverIRQHandler
|
||||
FLEXCOMM8_DriverIRQHandler
|
||||
DefaultISR
|
||||
B .
|
||||
|
||||
END
|
||||
|
|
@ -1,272 +1,272 @@
|
|||
/***********************************************************************************************************************
|
||||
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
|
||||
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/* clang-format off */
|
||||
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
|
||||
!!GlobalInfo
|
||||
product: TEE v3.0
|
||||
processor: LPC55S69
|
||||
package_id: LPC55S69JBD100
|
||||
mcu_data: ksdk2_0
|
||||
processor_version: 0.10.1
|
||||
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
|
||||
/* clang-format on */
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Included files
|
||||
**********************************************************************************************************************/
|
||||
#include "fsl_common.h"
|
||||
#include "tzm_config.h"
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Definitions
|
||||
**********************************************************************************************************************/
|
||||
/* SAU region boundaries */
|
||||
#define SAU_REGION_0_BASE 0
|
||||
#define SAU_REGION_0_END 0x0FFFFFFFU
|
||||
#define SAU_REGION_1_BASE 0x20000000U
|
||||
#define SAU_REGION_1_END 0xDFFFFFFFU
|
||||
#define SAU_REGION_2_BASE 0x1000FE00U
|
||||
#define SAU_REGION_2_END 0x1000FFFFU
|
||||
|
||||
|
||||
|
||||
/* clang-format off */
|
||||
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
|
||||
functional_group:
|
||||
- called_from_default_init: 'true'
|
||||
- id_prefix: ''
|
||||
- prefix_user_defined: 'true'
|
||||
- name: 'BOARD_InitTEE'
|
||||
- description: ''
|
||||
- ahb:
|
||||
- regions: [{memory: PROGRAM_FLASH, security: s_priv, start: '0x00000000', size: '0x00010000'}, {memory: PROGRAM_FLASH, security: ns_user, start: '0x00010000',
|
||||
size: '0x00090000'}, {memory: BootROM, security: ns_user, start: '0x00000000', size: '0x00020000'}, {memory: SRAMX, security: ns_user, start: '0x00000000',
|
||||
size: '0x00008000'}, {memory: SRAM0, security: s_priv, start: '0x00000000', size: '0x00008000'}, {memory: SRAM0, security: ns_user, start: '0x00008000', size: '0x00008000'},
|
||||
{memory: SRAM1, security: ns_user, start: '0x00000000', size: '0x00010000'}, {memory: SRAM2, security: ns_user, start: '0x00000000', size: '0x00010000'}, {memory: SRAM3,
|
||||
security: ns_user, start: '0x00000000', size: '0x00010000'}, {memory: SRAM4, security: ns_user, start: '0x00000000', size: '0x00004000'}, {memory: USB_RAM,
|
||||
security: ns_user, start: '0x00000000', size: '0x00004000'}]
|
||||
- masters: {ns_user: {id: [HASH, MCM33C, MCM33S, PQ, SDIO, SDMA0, SDMA1, USBFSD, USBFSH]}}
|
||||
- peripherals: {ns_user: {id: [ADC0, AHB_SECURE_CTRL, ANACTRL, CASPER, CRC_ENGINE, CTIMER0, CTIMER1, CTIMER2, CTIMER3, CTIMER4, DBGMAILBOX, DMA0, DMA1, FLASH,
|
||||
FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, GINT0, GINT1, GPIO, HASHCRYPT, INPUTMUX, MAILBOX, MRT0, OSTIMER, PINT, PLU, PMC,
|
||||
POWERQUAD, PRINCE, PUF, RNG, RTC, SCT0, SDIF, SECGPIO, SECPINT, SPI8, SYSCTL, USB0, USBFSH, USBHSD, USBHSH, USBPHY, UTICK0, WWDT]}, s_priv: {id: [FLEXCOMM0,
|
||||
IOCON, SYSCON]}}
|
||||
- interrupts:
|
||||
- masking: {Non-masked: {id: [acmp_capt_irq, adc_irq, casper_irq, ctimer0_irq, ctimer1_irq, ctimer2_irq, ctimer3_irq, ctimer4_irq, flexcomm0_irq, flexcomm1_irq,
|
||||
flexcomm2_irq, flexcomm3_irq, flexcomm4_irq, flexcomm5_irq, flexcomm6_irq, flexcomm7_irq, global_irq0, global_irq1, lspi_hs_irq, mailbox_irq, mrt_irq, os_event_irq,
|
||||
pin_int4, pin_int5, pin_int6, pin_int7, pin_irq0, pin_irq1, pin_irq2, pin_irq3, plu_irq, pq_irq, qddkey_irq, rtc_irq, sct_irq, sdio_irq, sdma0_irq, sdma1_irq,
|
||||
sec_hypervisor_call_irq, sec_int0, sec_int1, sec_vio_irq, sha_irq, sys_irq, usb0_irq, usb0_needclk_irq, usb1_irq, usb1_needclk_irq, usb1_utmi_irq, utick_irq]}}
|
||||
- security: {Secure: {id: [acmp_capt_irq, adc_irq, casper_irq, ctimer0_irq, ctimer1_irq, ctimer2_irq, ctimer3_irq, ctimer4_irq, flexcomm0_irq, flexcomm1_irq,
|
||||
flexcomm2_irq, flexcomm3_irq, flexcomm4_irq, flexcomm5_irq, flexcomm6_irq, flexcomm7_irq, global_irq0, global_irq1, lspi_hs_irq, mailbox_irq, mrt_irq, os_event_irq,
|
||||
pin_int4, pin_int5, pin_int6, pin_int7, pin_irq0, pin_irq1, pin_irq2, pin_irq3, plu_irq, pq_irq, qddkey_irq, rtc_irq, sct_irq, sdio_irq, sdma0_irq, sdma1_irq,
|
||||
sec_hypervisor_call_irq, sec_int0, sec_int1, sec_vio_irq, sha_irq, sys_irq, usb0_irq, usb0_needclk_irq, usb1_irq, usb1_needclk_irq, usb1_utmi_irq, utick_irq]}}
|
||||
- pins_masks:
|
||||
- pio0: {Non-masked: {id: ['0', '1', '10', '11', '12', '13', '14', '15', '16', '17', '18', '19', '2', '20', '21', '22', '23', '24', '25', '26', '27', '28',
|
||||
'3', '31', '4', '5', '6', '7', '8', '9']}, Masked: {id: ['29', '30']}}
|
||||
- pio1: {Non-masked: {id: ['0', '1', '10', '11', '12', '13', '14', '15', '16', '17', '18', '19', '2', '20', '21', '22', '23', '24', '25', '26', '27', '28',
|
||||
'29', '3', '30', '31', '4', '5', '6', '7', '8', '9']}}
|
||||
- sau:
|
||||
- enabled: 'true'
|
||||
- all_non_secure: 'false'
|
||||
- generate_code_for_disabled_regions: 'false'
|
||||
- regions: [{index: '0', enabled: 'true', security: ns, start: '0x00000000', size: '0x10000000'}, {index: '1', enabled: 'true', security: ns, start: '0x20000000',
|
||||
size: '0xC0000000'}, {index: '2', enabled: 'true', security: nsc, start: '0x1000FE00', size: '0x00000200'}, {index: '3', enabled: 'false', security: ns, start: '0x00000000',
|
||||
size: '0x00000020'}, {index: '4', enabled: 'false', security: ns, start: '0x00000000', size: '0x00000020'}, {index: '5', enabled: 'false', security: ns, start: '0x00000000',
|
||||
size: '0x00000020'}, {index: '6', enabled: 'false', security: ns, start: '0x00000000', size: '0x00000020'}, {index: '7', enabled: 'false', security: ns, start: '0x00000000',
|
||||
size: '0x00000020'}]
|
||||
- global_options:
|
||||
- no:
|
||||
- id: [AIRCR_PRIS, AIRCR_BFHFNMINS, AIRCR_SYSRESETREQS, SCR_SLEEPDEEPS, SHCSR_SECUREFAULTENA, NSACR_CP2, NSACR_CP3, NSACR_CP4, NSACR_CP5, NSACR_CP6, NSACR_CP7,
|
||||
CPPWR_SU0, CPPWR_SUS0, CPPWR_SU1, CPPWR_SUS1, CPPWR_SU2, CPPWR_SUS2, CPPWR_SU3, CPPWR_SUS3, CPPWR_SU4, CPPWR_SUS4, CPPWR_SU5, CPPWR_SUS5, CPPWR_SU6, CPPWR_SUS6,
|
||||
CPPWR_SU7, CPPWR_SUS7, CPPWR_SU10, CPPWR_SUS10, CPPWR_SU11, CPPWR_SUS11, SEC_GPIO_MASK0_LOCK, SEC_GPIO_MASK1_LOCK, SEC_CPU1_INT_MASK0_LOCK, SEC_CPU1_INT_MASK1_LOCK,
|
||||
MASTER_SEC_LEVEL_LOCK, CPU0_LOCK_NS_VTOR, CPU0_LOCK_NS_MPU, CPU0_LOCK_S_VTAIRCR, CPU0_LOCK_S_MPU, CPU0_LOCK_SAU, CPU0_LOCK_REG_LOCK, CPU1_LOCK_NS_VTOR, CPU1_LOCK_NS_MPU,
|
||||
CPU1_LOCK_REG_LOCK, AHB_MISC_CTRL_REG_ENABLE_S_PRIV_CHECK, AHB_MISC_CTRL_REG_ENABLE_NS_PRIV_CHECK, AHB_MISC_CTRL_REG_DISABLE_VIOLATION_ABORT, AHB_MISC_CTRL_REG_DISABLE_SIMPLE_MASTER_STRICT_MODE,
|
||||
AHB_MISC_CTRL_REG_DISABLE_SMART_MASTER_STRICT_MODE, AHB_MISC_CTRL_REG_IDAU_ALL_NS]
|
||||
- yes:
|
||||
- id: [NSACR_CP0, NSACR_CP1, NSACR_CP10, NSACR_CP11, AHB_MISC_CTRL_REG_ENABLE_SECURE_CHECKING, AHB_MISC_CTRL_REG_WRITE_LOCK, _legacy_source_names_]
|
||||
- c_code:
|
||||
- id: [_output_type_]
|
||||
- user_memory_regions: [{id: Region_1, security: s_priv, name: Secure Code, start: '0x10000000', size: '0x0000FE00'}, {id: Region_2, security: nsc_priv, name: Veneer
|
||||
Table, start: '0x1000FE00', size: '0x00000200'}, {id: Region_3, security: s_priv, name: Secure Stack and Data, start: '0x30000000', size: '0x00008000'}, {id: Region_4,
|
||||
security: ns_user, name: Non-secure Code, description: Privilege check is disabled so reset value (NS-User) can be used, start: '0x00010000', size: '0x00068000'},
|
||||
{id: Region_5, security: ns_user, name: Non-secure Stack and Data, description: 'Privilege check is disabled so reset value (NS-User) can be used. ', start: '0x20008000',
|
||||
size: '0x0002B000'}]
|
||||
- mpus:
|
||||
- mpu:
|
||||
- enabled: 'false'
|
||||
- id: 's'
|
||||
- priv_default_map: 'false'
|
||||
- handler_enabled: 'false'
|
||||
- generate_code_for_disabled_regions: 'false'
|
||||
- attributes: [{index: '0', id: '0', memory_type: device, device: nGnRE}, {index: '1', id: '1', memory_type: device, device: nGnRE}, {index: '2', id: '2', memory_type: device,
|
||||
device: nGnRE}, {index: '3', id: '3', memory_type: device, device: nGnRE}, {index: '4', id: '4', memory_type: device, device: nGnRE}, {index: '5', id: '5',
|
||||
memory_type: device, device: nGnRE}, {index: '6', id: '6', memory_type: device, device: nGnRE}, {index: '7', id: '7', memory_type: device, device: nGnRE}]
|
||||
- regions: [{executable: 'false', read_only: 'false', attributes_index: '0', index: '0', enabled: 'false', security: priv, start: '0x00000000', size: '0x00000020'},
|
||||
{executable: 'false', read_only: 'false', attributes_index: '0', index: '1', enabled: 'false', security: priv, start: '0x00000000', size: '0x00000020'}, {executable: 'false',
|
||||
read_only: 'false', attributes_index: '0', index: '2', enabled: 'false', security: priv, start: '0x00000000', size: '0x00000020'}, {executable: 'false', read_only: 'false',
|
||||
attributes_index: '0', index: '3', enabled: 'false', security: priv, start: '0x00000000', size: '0x00000020'}, {executable: 'false', read_only: 'false', attributes_index: '0',
|
||||
index: '4', enabled: 'false', security: priv, start: '0x00000000', size: '0x00000020'}, {executable: 'false', read_only: 'false', attributes_index: '0', index: '5',
|
||||
enabled: 'false', security: priv, start: '0x00000000', size: '0x00000020'}, {executable: 'false', read_only: 'false', attributes_index: '0', index: '6', enabled: 'false',
|
||||
security: priv, start: '0x00000000', size: '0x00000020'}, {executable: 'false', read_only: 'false', attributes_index: '0', index: '7', enabled: 'false', security: priv,
|
||||
start: '0x00000000', size: '0x00000020'}]
|
||||
- mpu:
|
||||
- enabled: 'false'
|
||||
- id: 'ns'
|
||||
- priv_default_map: 'false'
|
||||
- handler_enabled: 'false'
|
||||
- generate_code_for_disabled_regions: 'false'
|
||||
- attributes: [{index: '0', id: '0', memory_type: device, device: nGnRE}, {index: '1', id: '1', memory_type: device, device: nGnRE}, {index: '2', id: '2', memory_type: device,
|
||||
device: nGnRE}, {index: '3', id: '3', memory_type: device, device: nGnRE}, {index: '4', id: '4', memory_type: device, device: nGnRE}, {index: '5', id: '5',
|
||||
memory_type: device, device: nGnRE}, {index: '6', id: '6', memory_type: device, device: nGnRE}, {index: '7', id: '7', memory_type: device, device: nGnRE}]
|
||||
- regions: [{executable: 'false', read_only: 'false', attributes_index: '0', index: '0', enabled: 'false', security: priv, start: '0x00000000', size: '0x00000020'},
|
||||
{executable: 'false', read_only: 'false', attributes_index: '0', index: '1', enabled: 'false', security: priv, start: '0x00000000', size: '0x00000020'}, {executable: 'false',
|
||||
read_only: 'false', attributes_index: '0', index: '2', enabled: 'false', security: priv, start: '0x00000000', size: '0x00000020'}, {executable: 'false', read_only: 'false',
|
||||
attributes_index: '0', index: '3', enabled: 'false', security: priv, start: '0x00000000', size: '0x00000020'}, {executable: 'false', read_only: 'false', attributes_index: '0',
|
||||
index: '4', enabled: 'false', security: priv, start: '0x00000000', size: '0x00000020'}, {executable: 'false', read_only: 'false', attributes_index: '0', index: '5',
|
||||
enabled: 'false', security: priv, start: '0x00000000', size: '0x00000020'}, {executable: 'false', read_only: 'false', attributes_index: '0', index: '6', enabled: 'false',
|
||||
security: priv, start: '0x00000000', size: '0x00000020'}, {executable: 'false', read_only: 'false', attributes_index: '0', index: '7', enabled: 'false', security: priv,
|
||||
start: '0x00000000', size: '0x00000020'}]
|
||||
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
|
||||
/* clang-format on */
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* BOARD_InitTrustZone function
|
||||
**********************************************************************************************************************/
|
||||
void BOARD_InitTrustZone()
|
||||
{
|
||||
/* SAU configuration */
|
||||
|
||||
/* Set SAU Control register: Disable SAU and All Secure */
|
||||
SAU->CTRL = 0;
|
||||
|
||||
/* Set SAU region number */
|
||||
SAU->RNR = 0;
|
||||
/* Region base address */
|
||||
SAU->RBAR = SAU_REGION_0_BASE & SAU_RBAR_BADDR_Msk;
|
||||
/* Region end address */
|
||||
SAU->RLAR = (SAU_REGION_0_END & SAU_RLAR_LADDR_Msk)
|
||||
| ((0U << SAU_RLAR_NSC_Pos) & SAU_RLAR_NSC_Msk)
|
||||
| ((1U << SAU_RLAR_ENABLE_Pos) & SAU_RLAR_ENABLE_Msk);
|
||||
|
||||
/* Set SAU region number */
|
||||
SAU->RNR = 1;
|
||||
/* Region base address */
|
||||
SAU->RBAR = SAU_REGION_1_BASE & SAU_RBAR_BADDR_Msk;
|
||||
/* Region end address */
|
||||
SAU->RLAR = (SAU_REGION_1_END & SAU_RLAR_LADDR_Msk)
|
||||
| ((0U << SAU_RLAR_NSC_Pos) & SAU_RLAR_NSC_Msk)
|
||||
| ((1U << SAU_RLAR_ENABLE_Pos) & SAU_RLAR_ENABLE_Msk);
|
||||
|
||||
/* Set SAU region number */
|
||||
SAU->RNR = 2;
|
||||
/* Region base address */
|
||||
SAU->RBAR = SAU_REGION_2_BASE & SAU_RBAR_BADDR_Msk;
|
||||
/* Region end address */
|
||||
SAU->RLAR = (SAU_REGION_2_END & SAU_RLAR_LADDR_Msk)
|
||||
| ((1U << SAU_RLAR_NSC_Pos) & SAU_RLAR_NSC_Msk)
|
||||
| ((1U << SAU_RLAR_ENABLE_Pos) & SAU_RLAR_ENABLE_Msk);
|
||||
|
||||
/* Force memory writes before continuing */
|
||||
__DSB();
|
||||
/* Flush and refill pipeline with updated permissions */
|
||||
__ISB();
|
||||
|
||||
/* Set SAU Control register: Enable SAU and All Secure (applied only if disabled) */
|
||||
SAU->CTRL = ((0U << SAU_CTRL_ALLNS_Pos) & SAU_CTRL_ALLNS_Msk)
|
||||
| ((1U << SAU_CTRL_ENABLE_Pos) & SAU_CTRL_ENABLE_Msk);
|
||||
|
||||
/* AHB configuration */
|
||||
|
||||
/*--------------------------------------------------------------------
|
||||
- AHB Security Level Configurations
|
||||
-------------------------------------------------------------------*/
|
||||
/* Configuration of AHB Secure Controller
|
||||
Possible values for every memory sector or peripheral rule:
|
||||
0 Non-secure, User access allowed.
|
||||
1 Non-secure, Privileged access allowed.
|
||||
2 Secure, User access allowed.
|
||||
3 Secure, Privileged access allowed.
|
||||
*/
|
||||
|
||||
/* Security level configuration of MPC checker */
|
||||
AHB_SECURE_CTRL->SEC_CTRL_FLASH_ROM[0].SEC_CTRL_FLASH_MEM_RULE[0] = 0x00000033U;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_FLASH_ROM[0].SEC_CTRL_FLASH_MEM_RULE[1] = 0;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_FLASH_ROM[0].SEC_CTRL_FLASH_MEM_RULE[2] = 0;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_FLASH_ROM[0].SEC_CTRL_ROM_MEM_RULE[0] = 0;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_FLASH_ROM[0].SEC_CTRL_ROM_MEM_RULE[1] = 0;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_FLASH_ROM[0].SEC_CTRL_ROM_MEM_RULE[2] = 0;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_FLASH_ROM[0].SEC_CTRL_ROM_MEM_RULE[3] = 0;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_RAMX[0].MEM_RULE[0] = 0;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_RAM0[0].MEM_RULE[0] = 0x33333333U;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_RAM0[0].MEM_RULE[1] = 0;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_RAM1[0].MEM_RULE[0] = 0;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_RAM1[0].MEM_RULE[1] = 0;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_RAM2[0].MEM_RULE[0] = 0;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_RAM2[0].MEM_RULE[1] = 0;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_RAM3[0].MEM_RULE[0] = 0;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_RAM3[0].MEM_RULE[1] = 0;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_RAM4[0].MEM_RULE[0] = 0;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_USB_HS[0].MEM_RULE[0] = 0;
|
||||
|
||||
/* Security level configuration of PPC checker */
|
||||
AHB_SECURE_CTRL->SEC_CTRL_APB_BRIDGE[0].SEC_CTRL_APB_BRIDGE0_MEM_CTRL0 = 0xFCCCCCFFU;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_APB_BRIDGE[0].SEC_CTRL_APB_BRIDGE0_MEM_CTRL1 = 0xFCCCFFCCU;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_APB_BRIDGE[0].SEC_CTRL_APB_BRIDGE0_MEM_CTRL2 = 0xFFFFCFFFU;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_APB_BRIDGE[0].SEC_CTRL_APB_BRIDGE1_MEM_CTRL0 = 0xFFFFCFFCU;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_APB_BRIDGE[0].SEC_CTRL_APB_BRIDGE1_MEM_CTRL1 = 0xFFCCFCCCU;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_APB_BRIDGE[0].SEC_CTRL_APB_BRIDGE1_MEM_CTRL2 = 0xFFCCFFFFU;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_APB_BRIDGE[0].SEC_CTRL_APB_BRIDGE1_MEM_CTRL3 = 0xFFCFCCFCU;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_AHB_PORT8_SLAVE0_RULE = 0xCFCCFCFFU;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_AHB_PORT8_SLAVE1_RULE = 0xFFFCCCCCU;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_AHB_PORT9_SLAVE0_RULE = 0xCCCCFFFFU;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_AHB_PORT9_SLAVE1_RULE = 0xCFFCCFFCU;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_AHB_PORT10[0].SLAVE0_RULE = 0xCCCCCCFCU;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_AHB_PORT10[0].SLAVE1_RULE = 0xFFFFFFCCU;
|
||||
|
||||
/* Security level configuration of masters */
|
||||
AHB_SECURE_CTRL->MASTER_SEC_LEVEL = 0x80000000U;
|
||||
AHB_SECURE_CTRL->MASTER_SEC_ANTI_POL_REG = 0xBFFFFFFFU;
|
||||
|
||||
/*--------------------------------------------------------------------
|
||||
- Pins: Reading GPIO state
|
||||
-------------------------------------------------------------------*/
|
||||
/* Possible values for every pin:
|
||||
* 0b0 Deny
|
||||
* 0b1 Allow */
|
||||
AHB_SECURE_CTRL->SEC_GPIO_MASK0 = 0x9FFFFFFFU;
|
||||
AHB_SECURE_CTRL->SEC_GPIO_MASK1 = 0xFFFFFFFFU;
|
||||
|
||||
/*--------------------------------------------------------------------
|
||||
- Interrupts: Interrupt handling by Core1
|
||||
-------------------------------------------------------------------*/
|
||||
/* Possible values for every interrupt:
|
||||
* 0b0 Deny
|
||||
* 0b1 Allow */
|
||||
AHB_SECURE_CTRL->SEC_CPU_INT_MASK0 = 0xFFFFFFFFU;
|
||||
AHB_SECURE_CTRL->SEC_CPU_INT_MASK1 = 0xFFFFFFFFU;
|
||||
|
||||
/*--------------------------------------------------------------------
|
||||
- Interrupts: Interrupt security configuration
|
||||
-------------------------------------------------------------------*/
|
||||
/* Possible values for every interrupt:
|
||||
* 0b0 Secure
|
||||
* 0b1 Non-secure */
|
||||
NVIC->ITNS[0] = 0;
|
||||
NVIC->ITNS[1] = 0;
|
||||
|
||||
/* Global Options */
|
||||
SCB->AIRCR = (SCB->AIRCR & 0x000009FF7U) | 0x005FA0000U;
|
||||
SCB->SCR &= 0x0FFFFFFF7U;
|
||||
SCB->SHCSR &= 0x0FFF7FFFFU;
|
||||
SCB->NSACR = 0x00000C03U;
|
||||
SCnSCB->CPPWR = 0;
|
||||
AHB_SECURE_CTRL->SEC_MASK_LOCK = 0x00000AAAU;
|
||||
AHB_SECURE_CTRL->MASTER_SEC_LEVEL = (AHB_SECURE_CTRL->MASTER_SEC_LEVEL & 0x03FFFFFFFU) | 0x080000000U;
|
||||
AHB_SECURE_CTRL->MASTER_SEC_ANTI_POL_REG = (AHB_SECURE_CTRL->MASTER_SEC_ANTI_POL_REG & 0x03FFFFFFFU) | 0x080000000U;
|
||||
AHB_SECURE_CTRL->CPU0_LOCK_REG = 0x800002AAU;
|
||||
AHB_SECURE_CTRL->CPU1_LOCK_REG = 0x8000000AU;
|
||||
AHB_SECURE_CTRL->MISC_CTRL_REG = (AHB_SECURE_CTRL->MISC_CTRL_REG & 0x0FFFF0003U) | 0x00000AAA4U;
|
||||
AHB_SECURE_CTRL->MISC_CTRL_DP_REG = 0x0000AAA5U;
|
||||
}
|
||||
/***********************************************************************************************************************
|
||||
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
|
||||
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/* clang-format off */
|
||||
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
|
||||
!!GlobalInfo
|
||||
product: TEE v3.0
|
||||
processor: LPC55S69
|
||||
package_id: LPC55S69JBD100
|
||||
mcu_data: ksdk2_0
|
||||
processor_version: 0.10.1
|
||||
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
|
||||
/* clang-format on */
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Included files
|
||||
**********************************************************************************************************************/
|
||||
#include "fsl_common.h"
|
||||
#include "tzm_config.h"
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Definitions
|
||||
**********************************************************************************************************************/
|
||||
/* SAU region boundaries */
|
||||
#define SAU_REGION_0_BASE 0
|
||||
#define SAU_REGION_0_END 0x0FFFFFFFU
|
||||
#define SAU_REGION_1_BASE 0x20000000U
|
||||
#define SAU_REGION_1_END 0xDFFFFFFFU
|
||||
#define SAU_REGION_2_BASE 0x1000FE00U
|
||||
#define SAU_REGION_2_END 0x1000FFFFU
|
||||
|
||||
|
||||
|
||||
/* clang-format off */
|
||||
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
|
||||
functional_group:
|
||||
- called_from_default_init: 'true'
|
||||
- id_prefix: ''
|
||||
- prefix_user_defined: 'true'
|
||||
- name: 'BOARD_InitTEE'
|
||||
- description: ''
|
||||
- ahb:
|
||||
- regions: [{memory: PROGRAM_FLASH, security: s_priv, start: '0x00000000', size: '0x00010000'}, {memory: PROGRAM_FLASH, security: ns_user, start: '0x00010000',
|
||||
size: '0x00090000'}, {memory: BootROM, security: ns_user, start: '0x00000000', size: '0x00020000'}, {memory: SRAMX, security: ns_user, start: '0x00000000',
|
||||
size: '0x00008000'}, {memory: SRAM0, security: s_priv, start: '0x00000000', size: '0x00008000'}, {memory: SRAM0, security: ns_user, start: '0x00008000', size: '0x00008000'},
|
||||
{memory: SRAM1, security: ns_user, start: '0x00000000', size: '0x00010000'}, {memory: SRAM2, security: ns_user, start: '0x00000000', size: '0x00010000'}, {memory: SRAM3,
|
||||
security: ns_user, start: '0x00000000', size: '0x00010000'}, {memory: SRAM4, security: ns_user, start: '0x00000000', size: '0x00004000'}, {memory: USB_RAM,
|
||||
security: ns_user, start: '0x00000000', size: '0x00004000'}]
|
||||
- masters: {ns_user: {id: [HASH, MCM33C, MCM33S, PQ, SDIO, SDMA0, SDMA1, USBFSD, USBFSH]}}
|
||||
- peripherals: {ns_user: {id: [ADC0, AHB_SECURE_CTRL, ANACTRL, CASPER, CRC_ENGINE, CTIMER0, CTIMER1, CTIMER2, CTIMER3, CTIMER4, DBGMAILBOX, DMA0, DMA1, FLASH,
|
||||
FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, GINT0, GINT1, GPIO, HASHCRYPT, INPUTMUX, MAILBOX, MRT0, OSTIMER, PINT, PLU, PMC,
|
||||
POWERQUAD, PRINCE, PUF, RNG, RTC, SCT0, SDIF, SECGPIO, SECPINT, SPI8, SYSCTL, USB0, USBFSH, USBHSD, USBHSH, USBPHY, UTICK0, WWDT]}, s_priv: {id: [FLEXCOMM0,
|
||||
IOCON, SYSCON]}}
|
||||
- interrupts:
|
||||
- masking: {Non-masked: {id: [acmp_capt_irq, adc_irq, casper_irq, ctimer0_irq, ctimer1_irq, ctimer2_irq, ctimer3_irq, ctimer4_irq, flexcomm0_irq, flexcomm1_irq,
|
||||
flexcomm2_irq, flexcomm3_irq, flexcomm4_irq, flexcomm5_irq, flexcomm6_irq, flexcomm7_irq, global_irq0, global_irq1, lspi_hs_irq, mailbox_irq, mrt_irq, os_event_irq,
|
||||
pin_int4, pin_int5, pin_int6, pin_int7, pin_irq0, pin_irq1, pin_irq2, pin_irq3, plu_irq, pq_irq, qddkey_irq, rtc_irq, sct_irq, sdio_irq, sdma0_irq, sdma1_irq,
|
||||
sec_hypervisor_call_irq, sec_int0, sec_int1, sec_vio_irq, sha_irq, sys_irq, usb0_irq, usb0_needclk_irq, usb1_irq, usb1_needclk_irq, usb1_utmi_irq, utick_irq]}}
|
||||
- security: {Secure: {id: [acmp_capt_irq, adc_irq, casper_irq, ctimer0_irq, ctimer1_irq, ctimer2_irq, ctimer3_irq, ctimer4_irq, flexcomm0_irq, flexcomm1_irq,
|
||||
flexcomm2_irq, flexcomm3_irq, flexcomm4_irq, flexcomm5_irq, flexcomm6_irq, flexcomm7_irq, global_irq0, global_irq1, lspi_hs_irq, mailbox_irq, mrt_irq, os_event_irq,
|
||||
pin_int4, pin_int5, pin_int6, pin_int7, pin_irq0, pin_irq1, pin_irq2, pin_irq3, plu_irq, pq_irq, qddkey_irq, rtc_irq, sct_irq, sdio_irq, sdma0_irq, sdma1_irq,
|
||||
sec_hypervisor_call_irq, sec_int0, sec_int1, sec_vio_irq, sha_irq, sys_irq, usb0_irq, usb0_needclk_irq, usb1_irq, usb1_needclk_irq, usb1_utmi_irq, utick_irq]}}
|
||||
- pins_masks:
|
||||
- pio0: {Non-masked: {id: ['0', '1', '10', '11', '12', '13', '14', '15', '16', '17', '18', '19', '2', '20', '21', '22', '23', '24', '25', '26', '27', '28',
|
||||
'3', '31', '4', '5', '6', '7', '8', '9']}, Masked: {id: ['29', '30']}}
|
||||
- pio1: {Non-masked: {id: ['0', '1', '10', '11', '12', '13', '14', '15', '16', '17', '18', '19', '2', '20', '21', '22', '23', '24', '25', '26', '27', '28',
|
||||
'29', '3', '30', '31', '4', '5', '6', '7', '8', '9']}}
|
||||
- sau:
|
||||
- enabled: 'true'
|
||||
- all_non_secure: 'false'
|
||||
- generate_code_for_disabled_regions: 'false'
|
||||
- regions: [{index: '0', enabled: 'true', security: ns, start: '0x00000000', size: '0x10000000'}, {index: '1', enabled: 'true', security: ns, start: '0x20000000',
|
||||
size: '0xC0000000'}, {index: '2', enabled: 'true', security: nsc, start: '0x1000FE00', size: '0x00000200'}, {index: '3', enabled: 'false', security: ns, start: '0x00000000',
|
||||
size: '0x00000020'}, {index: '4', enabled: 'false', security: ns, start: '0x00000000', size: '0x00000020'}, {index: '5', enabled: 'false', security: ns, start: '0x00000000',
|
||||
size: '0x00000020'}, {index: '6', enabled: 'false', security: ns, start: '0x00000000', size: '0x00000020'}, {index: '7', enabled: 'false', security: ns, start: '0x00000000',
|
||||
size: '0x00000020'}]
|
||||
- global_options:
|
||||
- no:
|
||||
- id: [AIRCR_PRIS, AIRCR_BFHFNMINS, AIRCR_SYSRESETREQS, SCR_SLEEPDEEPS, SHCSR_SECUREFAULTENA, NSACR_CP2, NSACR_CP3, NSACR_CP4, NSACR_CP5, NSACR_CP6, NSACR_CP7,
|
||||
CPPWR_SU0, CPPWR_SUS0, CPPWR_SU1, CPPWR_SUS1, CPPWR_SU2, CPPWR_SUS2, CPPWR_SU3, CPPWR_SUS3, CPPWR_SU4, CPPWR_SUS4, CPPWR_SU5, CPPWR_SUS5, CPPWR_SU6, CPPWR_SUS6,
|
||||
CPPWR_SU7, CPPWR_SUS7, CPPWR_SU10, CPPWR_SUS10, CPPWR_SU11, CPPWR_SUS11, SEC_GPIO_MASK0_LOCK, SEC_GPIO_MASK1_LOCK, SEC_CPU1_INT_MASK0_LOCK, SEC_CPU1_INT_MASK1_LOCK,
|
||||
MASTER_SEC_LEVEL_LOCK, CPU0_LOCK_NS_VTOR, CPU0_LOCK_NS_MPU, CPU0_LOCK_S_VTAIRCR, CPU0_LOCK_S_MPU, CPU0_LOCK_SAU, CPU0_LOCK_REG_LOCK, CPU1_LOCK_NS_VTOR, CPU1_LOCK_NS_MPU,
|
||||
CPU1_LOCK_REG_LOCK, AHB_MISC_CTRL_REG_ENABLE_S_PRIV_CHECK, AHB_MISC_CTRL_REG_ENABLE_NS_PRIV_CHECK, AHB_MISC_CTRL_REG_DISABLE_VIOLATION_ABORT, AHB_MISC_CTRL_REG_DISABLE_SIMPLE_MASTER_STRICT_MODE,
|
||||
AHB_MISC_CTRL_REG_DISABLE_SMART_MASTER_STRICT_MODE, AHB_MISC_CTRL_REG_IDAU_ALL_NS]
|
||||
- yes:
|
||||
- id: [NSACR_CP0, NSACR_CP1, NSACR_CP10, NSACR_CP11, AHB_MISC_CTRL_REG_ENABLE_SECURE_CHECKING, AHB_MISC_CTRL_REG_WRITE_LOCK, _legacy_source_names_]
|
||||
- c_code:
|
||||
- id: [_output_type_]
|
||||
- user_memory_regions: [{id: Region_1, security: s_priv, name: Secure Code, start: '0x10000000', size: '0x0000FE00'}, {id: Region_2, security: nsc_priv, name: Veneer
|
||||
Table, start: '0x1000FE00', size: '0x00000200'}, {id: Region_3, security: s_priv, name: Secure Stack and Data, start: '0x30000000', size: '0x00008000'}, {id: Region_4,
|
||||
security: ns_user, name: Non-secure Code, description: Privilege check is disabled so reset value (NS-User) can be used, start: '0x00010000', size: '0x00068000'},
|
||||
{id: Region_5, security: ns_user, name: Non-secure Stack and Data, description: 'Privilege check is disabled so reset value (NS-User) can be used. ', start: '0x20008000',
|
||||
size: '0x0002B000'}]
|
||||
- mpus:
|
||||
- mpu:
|
||||
- enabled: 'false'
|
||||
- id: 's'
|
||||
- priv_default_map: 'false'
|
||||
- handler_enabled: 'false'
|
||||
- generate_code_for_disabled_regions: 'false'
|
||||
- attributes: [{index: '0', id: '0', memory_type: device, device: nGnRE}, {index: '1', id: '1', memory_type: device, device: nGnRE}, {index: '2', id: '2', memory_type: device,
|
||||
device: nGnRE}, {index: '3', id: '3', memory_type: device, device: nGnRE}, {index: '4', id: '4', memory_type: device, device: nGnRE}, {index: '5', id: '5',
|
||||
memory_type: device, device: nGnRE}, {index: '6', id: '6', memory_type: device, device: nGnRE}, {index: '7', id: '7', memory_type: device, device: nGnRE}]
|
||||
- regions: [{executable: 'false', read_only: 'false', attributes_index: '0', index: '0', enabled: 'false', security: priv, start: '0x00000000', size: '0x00000020'},
|
||||
{executable: 'false', read_only: 'false', attributes_index: '0', index: '1', enabled: 'false', security: priv, start: '0x00000000', size: '0x00000020'}, {executable: 'false',
|
||||
read_only: 'false', attributes_index: '0', index: '2', enabled: 'false', security: priv, start: '0x00000000', size: '0x00000020'}, {executable: 'false', read_only: 'false',
|
||||
attributes_index: '0', index: '3', enabled: 'false', security: priv, start: '0x00000000', size: '0x00000020'}, {executable: 'false', read_only: 'false', attributes_index: '0',
|
||||
index: '4', enabled: 'false', security: priv, start: '0x00000000', size: '0x00000020'}, {executable: 'false', read_only: 'false', attributes_index: '0', index: '5',
|
||||
enabled: 'false', security: priv, start: '0x00000000', size: '0x00000020'}, {executable: 'false', read_only: 'false', attributes_index: '0', index: '6', enabled: 'false',
|
||||
security: priv, start: '0x00000000', size: '0x00000020'}, {executable: 'false', read_only: 'false', attributes_index: '0', index: '7', enabled: 'false', security: priv,
|
||||
start: '0x00000000', size: '0x00000020'}]
|
||||
- mpu:
|
||||
- enabled: 'false'
|
||||
- id: 'ns'
|
||||
- priv_default_map: 'false'
|
||||
- handler_enabled: 'false'
|
||||
- generate_code_for_disabled_regions: 'false'
|
||||
- attributes: [{index: '0', id: '0', memory_type: device, device: nGnRE}, {index: '1', id: '1', memory_type: device, device: nGnRE}, {index: '2', id: '2', memory_type: device,
|
||||
device: nGnRE}, {index: '3', id: '3', memory_type: device, device: nGnRE}, {index: '4', id: '4', memory_type: device, device: nGnRE}, {index: '5', id: '5',
|
||||
memory_type: device, device: nGnRE}, {index: '6', id: '6', memory_type: device, device: nGnRE}, {index: '7', id: '7', memory_type: device, device: nGnRE}]
|
||||
- regions: [{executable: 'false', read_only: 'false', attributes_index: '0', index: '0', enabled: 'false', security: priv, start: '0x00000000', size: '0x00000020'},
|
||||
{executable: 'false', read_only: 'false', attributes_index: '0', index: '1', enabled: 'false', security: priv, start: '0x00000000', size: '0x00000020'}, {executable: 'false',
|
||||
read_only: 'false', attributes_index: '0', index: '2', enabled: 'false', security: priv, start: '0x00000000', size: '0x00000020'}, {executable: 'false', read_only: 'false',
|
||||
attributes_index: '0', index: '3', enabled: 'false', security: priv, start: '0x00000000', size: '0x00000020'}, {executable: 'false', read_only: 'false', attributes_index: '0',
|
||||
index: '4', enabled: 'false', security: priv, start: '0x00000000', size: '0x00000020'}, {executable: 'false', read_only: 'false', attributes_index: '0', index: '5',
|
||||
enabled: 'false', security: priv, start: '0x00000000', size: '0x00000020'}, {executable: 'false', read_only: 'false', attributes_index: '0', index: '6', enabled: 'false',
|
||||
security: priv, start: '0x00000000', size: '0x00000020'}, {executable: 'false', read_only: 'false', attributes_index: '0', index: '7', enabled: 'false', security: priv,
|
||||
start: '0x00000000', size: '0x00000020'}]
|
||||
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
|
||||
/* clang-format on */
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* BOARD_InitTrustZone function
|
||||
**********************************************************************************************************************/
|
||||
void BOARD_InitTrustZone()
|
||||
{
|
||||
/* SAU configuration */
|
||||
|
||||
/* Set SAU Control register: Disable SAU and All Secure */
|
||||
SAU->CTRL = 0;
|
||||
|
||||
/* Set SAU region number */
|
||||
SAU->RNR = 0;
|
||||
/* Region base address */
|
||||
SAU->RBAR = SAU_REGION_0_BASE & SAU_RBAR_BADDR_Msk;
|
||||
/* Region end address */
|
||||
SAU->RLAR = (SAU_REGION_0_END & SAU_RLAR_LADDR_Msk)
|
||||
| ((0U << SAU_RLAR_NSC_Pos) & SAU_RLAR_NSC_Msk)
|
||||
| ((1U << SAU_RLAR_ENABLE_Pos) & SAU_RLAR_ENABLE_Msk);
|
||||
|
||||
/* Set SAU region number */
|
||||
SAU->RNR = 1;
|
||||
/* Region base address */
|
||||
SAU->RBAR = SAU_REGION_1_BASE & SAU_RBAR_BADDR_Msk;
|
||||
/* Region end address */
|
||||
SAU->RLAR = (SAU_REGION_1_END & SAU_RLAR_LADDR_Msk)
|
||||
| ((0U << SAU_RLAR_NSC_Pos) & SAU_RLAR_NSC_Msk)
|
||||
| ((1U << SAU_RLAR_ENABLE_Pos) & SAU_RLAR_ENABLE_Msk);
|
||||
|
||||
/* Set SAU region number */
|
||||
SAU->RNR = 2;
|
||||
/* Region base address */
|
||||
SAU->RBAR = SAU_REGION_2_BASE & SAU_RBAR_BADDR_Msk;
|
||||
/* Region end address */
|
||||
SAU->RLAR = (SAU_REGION_2_END & SAU_RLAR_LADDR_Msk)
|
||||
| ((1U << SAU_RLAR_NSC_Pos) & SAU_RLAR_NSC_Msk)
|
||||
| ((1U << SAU_RLAR_ENABLE_Pos) & SAU_RLAR_ENABLE_Msk);
|
||||
|
||||
/* Force memory writes before continuing */
|
||||
__DSB();
|
||||
/* Flush and refill pipeline with updated permissions */
|
||||
__ISB();
|
||||
|
||||
/* Set SAU Control register: Enable SAU and All Secure (applied only if disabled) */
|
||||
SAU->CTRL = ((0U << SAU_CTRL_ALLNS_Pos) & SAU_CTRL_ALLNS_Msk)
|
||||
| ((1U << SAU_CTRL_ENABLE_Pos) & SAU_CTRL_ENABLE_Msk);
|
||||
|
||||
/* AHB configuration */
|
||||
|
||||
/*--------------------------------------------------------------------
|
||||
- AHB Security Level Configurations
|
||||
-------------------------------------------------------------------*/
|
||||
/* Configuration of AHB Secure Controller
|
||||
Possible values for every memory sector or peripheral rule:
|
||||
0 Non-secure, User access allowed.
|
||||
1 Non-secure, Privileged access allowed.
|
||||
2 Secure, User access allowed.
|
||||
3 Secure, Privileged access allowed.
|
||||
*/
|
||||
|
||||
/* Security level configuration of MPC checker */
|
||||
AHB_SECURE_CTRL->SEC_CTRL_FLASH_ROM[0].SEC_CTRL_FLASH_MEM_RULE[0] = 0x00000033U;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_FLASH_ROM[0].SEC_CTRL_FLASH_MEM_RULE[1] = 0;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_FLASH_ROM[0].SEC_CTRL_FLASH_MEM_RULE[2] = 0;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_FLASH_ROM[0].SEC_CTRL_ROM_MEM_RULE[0] = 0;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_FLASH_ROM[0].SEC_CTRL_ROM_MEM_RULE[1] = 0;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_FLASH_ROM[0].SEC_CTRL_ROM_MEM_RULE[2] = 0;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_FLASH_ROM[0].SEC_CTRL_ROM_MEM_RULE[3] = 0;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_RAMX[0].MEM_RULE[0] = 0;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_RAM0[0].MEM_RULE[0] = 0x33333333U;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_RAM0[0].MEM_RULE[1] = 0;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_RAM1[0].MEM_RULE[0] = 0;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_RAM1[0].MEM_RULE[1] = 0;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_RAM2[0].MEM_RULE[0] = 0;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_RAM2[0].MEM_RULE[1] = 0;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_RAM3[0].MEM_RULE[0] = 0;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_RAM3[0].MEM_RULE[1] = 0;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_RAM4[0].MEM_RULE[0] = 0;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_USB_HS[0].MEM_RULE[0] = 0;
|
||||
|
||||
/* Security level configuration of PPC checker */
|
||||
AHB_SECURE_CTRL->SEC_CTRL_APB_BRIDGE[0].SEC_CTRL_APB_BRIDGE0_MEM_CTRL0 = 0xFCCCCCFFU;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_APB_BRIDGE[0].SEC_CTRL_APB_BRIDGE0_MEM_CTRL1 = 0xFCCCFFCCU;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_APB_BRIDGE[0].SEC_CTRL_APB_BRIDGE0_MEM_CTRL2 = 0xFFFFCFFFU;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_APB_BRIDGE[0].SEC_CTRL_APB_BRIDGE1_MEM_CTRL0 = 0xFFFFCFFCU;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_APB_BRIDGE[0].SEC_CTRL_APB_BRIDGE1_MEM_CTRL1 = 0xFFCCFCCCU;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_APB_BRIDGE[0].SEC_CTRL_APB_BRIDGE1_MEM_CTRL2 = 0xFFCCFFFFU;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_APB_BRIDGE[0].SEC_CTRL_APB_BRIDGE1_MEM_CTRL3 = 0xFFCFCCFCU;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_AHB_PORT8_SLAVE0_RULE = 0xCFCCFCFFU;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_AHB_PORT8_SLAVE1_RULE = 0xFFFCCCCCU;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_AHB_PORT9_SLAVE0_RULE = 0xCCCCFFFFU;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_AHB_PORT9_SLAVE1_RULE = 0xCFFCCFFCU;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_AHB_PORT10[0].SLAVE0_RULE = 0xCCCCCCFCU;
|
||||
AHB_SECURE_CTRL->SEC_CTRL_AHB_PORT10[0].SLAVE1_RULE = 0xFFFFFFCCU;
|
||||
|
||||
/* Security level configuration of masters */
|
||||
AHB_SECURE_CTRL->MASTER_SEC_LEVEL = 0x80000000U;
|
||||
AHB_SECURE_CTRL->MASTER_SEC_ANTI_POL_REG = 0xBFFFFFFFU;
|
||||
|
||||
/*--------------------------------------------------------------------
|
||||
- Pins: Reading GPIO state
|
||||
-------------------------------------------------------------------*/
|
||||
/* Possible values for every pin:
|
||||
* 0b0 Deny
|
||||
* 0b1 Allow */
|
||||
AHB_SECURE_CTRL->SEC_GPIO_MASK0 = 0x9FFFFFFFU;
|
||||
AHB_SECURE_CTRL->SEC_GPIO_MASK1 = 0xFFFFFFFFU;
|
||||
|
||||
/*--------------------------------------------------------------------
|
||||
- Interrupts: Interrupt handling by Core1
|
||||
-------------------------------------------------------------------*/
|
||||
/* Possible values for every interrupt:
|
||||
* 0b0 Deny
|
||||
* 0b1 Allow */
|
||||
AHB_SECURE_CTRL->SEC_CPU_INT_MASK0 = 0xFFFFFFFFU;
|
||||
AHB_SECURE_CTRL->SEC_CPU_INT_MASK1 = 0xFFFFFFFFU;
|
||||
|
||||
/*--------------------------------------------------------------------
|
||||
- Interrupts: Interrupt security configuration
|
||||
-------------------------------------------------------------------*/
|
||||
/* Possible values for every interrupt:
|
||||
* 0b0 Secure
|
||||
* 0b1 Non-secure */
|
||||
NVIC->ITNS[0] = 0;
|
||||
NVIC->ITNS[1] = 0;
|
||||
|
||||
/* Global Options */
|
||||
SCB->AIRCR = (SCB->AIRCR & 0x000009FF7U) | 0x005FA0000U;
|
||||
SCB->SCR &= 0x0FFFFFFF7U;
|
||||
SCB->SHCSR &= 0x0FFF7FFFFU;
|
||||
SCB->NSACR = 0x00000C03U;
|
||||
SCnSCB->CPPWR = 0;
|
||||
AHB_SECURE_CTRL->SEC_MASK_LOCK = 0x00000AAAU;
|
||||
AHB_SECURE_CTRL->MASTER_SEC_LEVEL = (AHB_SECURE_CTRL->MASTER_SEC_LEVEL & 0x03FFFFFFFU) | 0x080000000U;
|
||||
AHB_SECURE_CTRL->MASTER_SEC_ANTI_POL_REG = (AHB_SECURE_CTRL->MASTER_SEC_ANTI_POL_REG & 0x03FFFFFFFU) | 0x080000000U;
|
||||
AHB_SECURE_CTRL->CPU0_LOCK_REG = 0x800002AAU;
|
||||
AHB_SECURE_CTRL->CPU1_LOCK_REG = 0x8000000AU;
|
||||
AHB_SECURE_CTRL->MISC_CTRL_REG = (AHB_SECURE_CTRL->MISC_CTRL_REG & 0x0FFFF0003U) | 0x00000AAA4U;
|
||||
AHB_SECURE_CTRL->MISC_CTRL_DP_REG = 0x0000AAA5U;
|
||||
}
|
||||
|
|
@ -1,18 +1,18 @@
|
|||
#ifndef _TZM_CONFIG_H_
|
||||
#define _TZM_CONFIG_H_
|
||||
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif /* __cplusplus */
|
||||
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Initialize TrustZone
|
||||
**********************************************************************************************************************/
|
||||
void BOARD_InitTrustZone(void);
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _TZM_CONFIG_H_ */
|
||||
#ifndef _TZM_CONFIG_H_
|
||||
#define _TZM_CONFIG_H_
|
||||
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif /* __cplusplus */
|
||||
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Initialize TrustZone
|
||||
**********************************************************************************************************************/
|
||||
void BOARD_InitTrustZone(void);
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _TZM_CONFIG_H_ */
|
||||
|
|
@ -0,0 +1,169 @@
|
|||
/*
|
||||
* FreeRTOS V202212.00
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
/******************************************************************************
|
||||
See http://www.freertos.org/a00110.html for an explanation of the
|
||||
definitions contained in this file.
|
||||
******************************************************************************/
|
||||
|
||||
#ifndef FREERTOS_CONFIG_H
|
||||
#define FREERTOS_CONFIG_H
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Application specific definitions.
|
||||
*
|
||||
* These definitions should be adjusted for your particular hardware and
|
||||
* application requirements.
|
||||
*
|
||||
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
|
||||
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
|
||||
* https://www.FreeRTOS.org/a00110.html
|
||||
*----------------------------------------------------------*/
|
||||
|
||||
#ifndef __IASMARM__
|
||||
#include "clock_config.h"
|
||||
#endif
|
||||
|
||||
/* Cortex M33 port configuration. */
|
||||
#define configENABLE_MPU 1
|
||||
#define configENABLE_FPU 1
|
||||
#define configENABLE_TRUSTZONE 1
|
||||
|
||||
/* Constants related to the behaviour or the scheduler. */
|
||||
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
|
||||
#define configUSE_PREEMPTION 1
|
||||
#define configUSE_TIME_SLICING 1
|
||||
#define configMAX_PRIORITIES ( 5 )
|
||||
#define configIDLE_SHOULD_YIELD 1
|
||||
#define configUSE_16_BIT_TICKS 0 /* Only for 8 and 16-bit hardware. */
|
||||
|
||||
/* Constants that describe the hardware and memory usage. */
|
||||
#define configCPU_CLOCK_HZ BOARD_BOOTCLOCKFROHF96M_CORE_CLOCK
|
||||
#define configMINIMAL_STACK_SIZE ( ( uint16_t ) 128 )
|
||||
#define configMINIMAL_SECURE_STACK_SIZE ( 1024 )
|
||||
#define configMAX_TASK_NAME_LEN ( 12 )
|
||||
#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 50 * 1024 ) )
|
||||
|
||||
/* Constants that build features in or out. */
|
||||
#define configUSE_MUTEXES 1
|
||||
#define configUSE_TICKLESS_IDLE 1
|
||||
#define configUSE_APPLICATION_TASK_TAG 0
|
||||
#define configUSE_NEWLIB_REENTRANT 0
|
||||
#define configUSE_COUNTING_SEMAPHORES 1
|
||||
#define configUSE_RECURSIVE_MUTEXES 1
|
||||
#define configUSE_QUEUE_SETS 0
|
||||
#define configUSE_TASK_NOTIFICATIONS 1
|
||||
#define configUSE_TRACE_FACILITY 1
|
||||
|
||||
/* Constants that define which hook (callback) functions should be used. */
|
||||
#define configUSE_IDLE_HOOK 0
|
||||
#define configUSE_TICK_HOOK 0
|
||||
#define configUSE_MALLOC_FAILED_HOOK 0
|
||||
|
||||
/* Constants provided for debugging and optimisation assistance. */
|
||||
#define configCHECK_FOR_STACK_OVERFLOW 2
|
||||
#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
|
||||
#define configQUEUE_REGISTRY_SIZE 0
|
||||
|
||||
/* Software timer definitions. */
|
||||
#define configUSE_TIMERS 1
|
||||
#define configTIMER_TASK_PRIORITY ( 3 )
|
||||
#define configTIMER_QUEUE_LENGTH 5
|
||||
#define configTIMER_TASK_STACK_DEPTH ( configMINIMAL_STACK_SIZE )
|
||||
|
||||
/* Set the following definitions to 1 to include the API function, or zero
|
||||
* to exclude the API function. NOTE: Setting an INCLUDE_ parameter to 0 is
|
||||
* only necessary if the linker does not automatically remove functions that are
|
||||
* not referenced anyway. */
|
||||
#define INCLUDE_vTaskPrioritySet 1
|
||||
#define INCLUDE_uxTaskPriorityGet 1
|
||||
#define INCLUDE_vTaskDelete 1
|
||||
#define INCLUDE_vTaskCleanUpResources 0
|
||||
#define INCLUDE_vTaskSuspend 1
|
||||
#define INCLUDE_vTaskDelayUntil 1
|
||||
#define INCLUDE_vTaskDelay 1
|
||||
#define INCLUDE_uxTaskGetStackHighWaterMark 0
|
||||
#define INCLUDE_xTaskGetIdleTaskHandle 0
|
||||
#define INCLUDE_eTaskGetState 1
|
||||
#define INCLUDE_xTaskResumeFromISR 0
|
||||
#define INCLUDE_xTaskGetCurrentTaskHandle 1
|
||||
#define INCLUDE_xTaskGetSchedulerState 0
|
||||
#define INCLUDE_xSemaphoreGetMutexHolder 0
|
||||
#define INCLUDE_xTimerPendFunctionCall 1
|
||||
|
||||
/* This demo makes use of one or more example stats formatting functions. These
|
||||
* format the raw data provided by the uxTaskGetSystemState() function in to
|
||||
* human readable ASCII form. See the notes in the implementation of vTaskList()
|
||||
* within FreeRTOS/Source/tasks.c for limitations. */
|
||||
#define configUSE_STATS_FORMATTING_FUNCTIONS 1
|
||||
|
||||
/* Dimensions a buffer that can be used by the FreeRTOS+CLI command interpreter.
|
||||
* See the FreeRTOS+CLI documentation for more information:
|
||||
* https://www.FreeRTOS.org/FreeRTOS-Plus/FreeRTOS_Plus_CLI/ */
|
||||
#define configCOMMAND_INT_MAX_OUTPUT_SIZE 2048
|
||||
|
||||
/* Interrupt priority configuration follows...................... */
|
||||
|
||||
/* Use the system definition, if there is one. */
|
||||
#ifdef __NVIC_PRIO_BITS
|
||||
#define configPRIO_BITS __NVIC_PRIO_BITS
|
||||
#else
|
||||
#define configPRIO_BITS 3 /* 8 priority levels. */
|
||||
#endif
|
||||
|
||||
/* The lowest interrupt priority that can be used in a call to a "set priority"
|
||||
* function. */
|
||||
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 0x07
|
||||
|
||||
/* The highest interrupt priority that can be used by any interrupt service
|
||||
* routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT
|
||||
* CALL INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A
|
||||
* HIGHER PRIORITY THAN THIS! (higher priorities are lower numeric values). */
|
||||
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
|
||||
|
||||
/* Interrupt priorities used by the kernel port layer itself. These are generic
|
||||
* to all Cortex-M ports, and do not rely on any particular library functions. */
|
||||
#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << ( 8 - configPRIO_BITS ) )
|
||||
|
||||
/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
|
||||
* See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
|
||||
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << ( 8 - configPRIO_BITS ) )
|
||||
|
||||
/* The #ifdef guards against the file being included from IAR assembly files. */
|
||||
#ifndef __IASMARM__
|
||||
|
||||
/* Constants related to the generation of run time stats. */
|
||||
#define configGENERATE_RUN_TIME_STATS 0
|
||||
#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS()
|
||||
#define portGET_RUN_TIME_COUNTER_VALUE() 0
|
||||
#define configTICK_RATE_HZ ( ( TickType_t ) 100 )
|
||||
|
||||
#endif /* __IASMARM__ */
|
||||
|
||||
/* Enable static allocation. */
|
||||
#define configSUPPORT_STATIC_ALLOCATION 1
|
||||
|
||||
#endif /* FREERTOS_CONFIG_H */
|
||||
|
|
@ -0,0 +1,22 @@
|
|||
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||
<workspace>
|
||||
<batchBuild>
|
||||
<batchDefinition>
|
||||
<name>all</name>
|
||||
<member>
|
||||
<project>FreeRTOSDemo_s</project>
|
||||
<configuration>debug</configuration>
|
||||
</member>
|
||||
<member>
|
||||
<project>FreeRTOSDemo_ns</project>
|
||||
<configuration>debug</configuration>
|
||||
</member>
|
||||
</batchDefinition>
|
||||
</batchBuild>
|
||||
<project>
|
||||
<path>$WS_DIR$/Secure/FreeRTOSDemo_s.ewp</path>
|
||||
</project>
|
||||
<project>
|
||||
<path>$WS_DIR$/NonSecure/FreeRTOSDemo_ns.ewp</path>
|
||||
</project>
|
||||
</workspace>
|
||||
|
|
@ -0,0 +1,144 @@
|
|||
/*
|
||||
** ###################################################################
|
||||
** Processors: LPC55S69JBD100_cm33_core0
|
||||
** LPC55S69JBD64_cm33_core0
|
||||
** LPC55S69JEV98_cm33_core0
|
||||
**
|
||||
** Compiler: IAR ANSI C/C++ Compiler for ARM
|
||||
** Reference manual: LPC55S6x/LPC55S2x/LPC552x User manual(UM11126) Rev.1.3 16 May 2019
|
||||
** Version: rev. 1.1, 2019-05-16
|
||||
** Build: b190926
|
||||
**
|
||||
** Abstract:
|
||||
** Linker file for the IAR ANSI C/C++ Compiler for ARM
|
||||
**
|
||||
** Copyright 2016 Freescale Semiconductor, Inc.
|
||||
** Copyright 2016-2019 NXP
|
||||
** All rights reserved.
|
||||
**
|
||||
** SPDX-License-Identifier: BSD-3-Clause
|
||||
**
|
||||
** http: www.nxp.com
|
||||
** mail: support@nxp.com
|
||||
**
|
||||
** ###################################################################
|
||||
*/
|
||||
|
||||
|
||||
/* USB BDT size */
|
||||
define symbol usb_bdt_size = 0x0;
|
||||
/* Stack and Heap Sizes */
|
||||
if (isdefinedsymbol(__stack_size__)) {
|
||||
define symbol __size_cstack__ = __stack_size__;
|
||||
} else {
|
||||
define symbol __size_cstack__ = 0x0400;
|
||||
}
|
||||
|
||||
if (isdefinedsymbol(__heap_size__)) {
|
||||
define symbol __size_heap__ = __heap_size__;
|
||||
} else {
|
||||
define symbol __size_heap__ = 0x0400;
|
||||
}
|
||||
|
||||
define symbol m_privileged_text_start = 0x00010000;
|
||||
define symbol m_privileged_text_end = 0x00017FFF;
|
||||
|
||||
define symbol m_syscalls_text_start = 0x00018000;
|
||||
define symbol m_syscalls_text_end = 0x0001FFFF;
|
||||
|
||||
define symbol m_unprivileged_text_start = 0x00020000;
|
||||
define symbol m_unprivileged_text_end = 0x00071FFF;
|
||||
|
||||
define exported symbol core1_image_start = 0x00072000;
|
||||
define exported symbol core1_image_end = 0x0009D7FF;
|
||||
|
||||
if (isdefinedsymbol(__use_shmem__)) {
|
||||
define symbol m_privileged_data_start = 0x20008000;
|
||||
define symbol m_privileged_data_end = 0x20017FFF;
|
||||
|
||||
define symbol m_unprivileged_data_start = 0x20018000;
|
||||
define symbol m_unprivileged_data_end = 0x20030FFF;
|
||||
|
||||
define exported symbol rpmsg_sh_mem_start = 0x20031800;
|
||||
define exported symbol rpmsg_sh_mem_end = 0x20032FFF;
|
||||
} else {
|
||||
define symbol m_privileged_data_start = 0x20008000;
|
||||
define symbol m_privileged_data_end = 0x20017FFF;
|
||||
|
||||
define symbol m_unprivileged_data_start = 0x20018000;
|
||||
define symbol m_unprivileged_data_end = 0x20032FFF;
|
||||
}
|
||||
|
||||
define symbol m_usb_sram_start = 0x40100000;
|
||||
define symbol m_usb_sram_end = 0x40103FFF;
|
||||
|
||||
define memory mem with size = 4G;
|
||||
|
||||
define region TEXT_privileged_region = mem:[from m_privileged_text_start to m_privileged_text_end];
|
||||
define region TEXT_syscalls_region = mem:[from m_syscalls_text_start to m_syscalls_text_end];
|
||||
define region TEXT_unprivileged_region = mem:[from m_unprivileged_text_start to m_unprivileged_text_end];
|
||||
|
||||
|
||||
define region DATA_privileged_region = mem:[from m_privileged_data_start to m_privileged_data_end];
|
||||
define region DATA_unprivileged_region = mem:[from m_unprivileged_data_start to m_unprivileged_data_end-__size_cstack__];
|
||||
define region CSTACK_region = mem:[from m_unprivileged_data_end-__size_cstack__+1 to m_unprivileged_data_end];
|
||||
|
||||
if (isdefinedsymbol(__use_shmem__)) {
|
||||
define region rpmsg_sh_mem_region = mem:[from rpmsg_sh_mem_start to rpmsg_sh_mem_end];
|
||||
}
|
||||
|
||||
define block CSTACK with alignment = 8, size = __size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __size_heap__ { };
|
||||
define block RW { readwrite };
|
||||
define block ZI { zi };
|
||||
|
||||
define region core1_region = mem:[from core1_image_start to core1_image_end];
|
||||
define block CORE1_IMAGE_WBLOCK { section __core1_image };
|
||||
|
||||
/* regions for USB */
|
||||
define region USB_BDT_region = mem:[from m_usb_sram_start to m_usb_sram_start + usb_bdt_size - 1];
|
||||
define region USB_SRAM_region = mem:[from m_usb_sram_start + usb_bdt_size to m_usb_sram_end];
|
||||
place in USB_BDT_region { section m_usb_bdt };
|
||||
place in USB_SRAM_region { section m_usb_global };
|
||||
|
||||
initialize by copy { readwrite, section .textrw };
|
||||
|
||||
if (isdefinedsymbol(__USE_DLIB_PERTHREAD))
|
||||
{
|
||||
/* Required in a multi-threaded application */
|
||||
initialize by copy with packing = none { section __DLIB_PERTHREAD };
|
||||
}
|
||||
|
||||
do not initialize { section .noinit, section m_usb_bdt, section m_usb_global };
|
||||
if (isdefinedsymbol(__use_shmem__)) {
|
||||
do not initialize { section rpmsg_sh_mem_section };
|
||||
}
|
||||
|
||||
/* Exported symbols. */
|
||||
define exported symbol __privileged_functions_start__ = m_privileged_text_start;
|
||||
define exported symbol __privileged_functions_end__ = m_privileged_text_end;
|
||||
define exported symbol __syscalls_flash_start__ = m_syscalls_text_start;
|
||||
define exported symbol __syscalls_flash_end__ = m_syscalls_text_end;
|
||||
define exported symbol __unprivileged_flash_start__ = m_unprivileged_text_start;
|
||||
define exported symbol __unprivileged_flash_end__ = m_unprivileged_text_end;
|
||||
define exported symbol __privileged_sram_start__ = m_privileged_data_start;
|
||||
define exported symbol __privileged_sram_end__ = m_privileged_data_end;
|
||||
|
||||
/* Placements. */
|
||||
place at address mem: m_privileged_text_start { readonly section .intvec };
|
||||
|
||||
place in TEXT_privileged_region { readonly section privileged_functions };
|
||||
place in TEXT_syscalls_region { readonly section freertos_system_calls };
|
||||
place in TEXT_unprivileged_region { readonly };
|
||||
|
||||
place in DATA_privileged_region { readwrite section privileged_data };
|
||||
place in DATA_unprivileged_region { block RW };
|
||||
place in DATA_unprivileged_region { block ZI };
|
||||
place in DATA_unprivileged_region { last block HEAP };
|
||||
|
||||
place in CSTACK_region { block CSTACK };
|
||||
if (isdefinedsymbol(__use_shmem__)) {
|
||||
place in rpmsg_sh_mem_region { section rpmsg_sh_mem_section };
|
||||
}
|
||||
place in core1_region { block CORE1_IMAGE_WBLOCK };
|
||||
|
||||
File diff suppressed because it is too large
Load diff
File diff suppressed because it is too large
Load diff
|
|
@ -0,0 +1,42 @@
|
|||
/*
|
||||
* FreeRTOS V202212.00
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
EXTERN vHandleMemoryFault
|
||||
PUBLIC MemManage_Handler
|
||||
|
||||
SECTION .text:CODE:NOROOT(2)
|
||||
THUMB
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
MemManage_Handler:
|
||||
tst lr, #4
|
||||
ite eq
|
||||
mrseq r0, msp
|
||||
mrsne r0, psp
|
||||
b vHandleMemoryFault
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
END
|
||||
|
|
@ -0,0 +1,122 @@
|
|||
/*
|
||||
** ###################################################################
|
||||
** Processors: LPC55S69JBD100_cm33_core0
|
||||
** LPC55S69JBD64_cm33_core0
|
||||
** LPC55S69JEV98_cm33_core0
|
||||
**
|
||||
** Compiler: IAR ANSI C/C++ Compiler for ARM
|
||||
** Reference manual: LPC55S6x/LPC55S2x/LPC552x User manual(UM11126) Rev.1.3 16 May 2019
|
||||
** Version: rev. 1.1, 2019-05-16
|
||||
** Build: b190926
|
||||
**
|
||||
** Abstract:
|
||||
** Linker file for the IAR ANSI C/C++ Compiler for ARM
|
||||
**
|
||||
** Copyright 2016 Freescale Semiconductor, Inc.
|
||||
** Copyright 2016-2019 NXP
|
||||
** All rights reserved.
|
||||
**
|
||||
** SPDX-License-Identifier: BSD-3-Clause
|
||||
**
|
||||
** http: www.nxp.com
|
||||
** mail: support@nxp.com
|
||||
**
|
||||
** ###################################################################
|
||||
*/
|
||||
|
||||
|
||||
/* USB BDT size */
|
||||
define symbol usb_bdt_size = 0x0;
|
||||
/* Stack and Heap Sizes */
|
||||
if (isdefinedsymbol(__stack_size__)) {
|
||||
define symbol __size_cstack__ = __stack_size__;
|
||||
} else {
|
||||
define symbol __size_cstack__ = 0x0400;
|
||||
}
|
||||
|
||||
if (isdefinedsymbol(__heap_size__)) {
|
||||
define symbol __size_heap__ = __heap_size__;
|
||||
} else {
|
||||
define symbol __size_heap__ = 0x0400;
|
||||
}
|
||||
|
||||
/* Only the first 64kB of flash is used as secure memory. */
|
||||
define symbol m_interrupts_start = 0x10000000;
|
||||
define symbol m_interrupts_end = 0x100001FF;
|
||||
|
||||
define symbol m_text_start = 0x10000200;
|
||||
define symbol m_text_end = 0x1000FDFF;
|
||||
|
||||
define exported symbol core1_image_start = 0x10072000;
|
||||
define exported symbol core1_image_end = 0x1009D7FF;
|
||||
|
||||
/* Only first 32kB of data RAM is used as secure memory. */
|
||||
if (isdefinedsymbol(__use_shmem__)) {
|
||||
define symbol m_data_start = 0x30000000;
|
||||
define symbol m_data_end = 0x30007FFF;
|
||||
define exported symbol rpmsg_sh_mem_start = 0x30031800;
|
||||
define exported symbol rpmsg_sh_mem_end = 0x30032FFF;
|
||||
} else {
|
||||
define symbol m_data_start = 0x30000000;
|
||||
define symbol m_data_end = 0x30007FFF;
|
||||
}
|
||||
|
||||
/* 512B - memory for veneer table (NSC - secure, non-secure callable memory) */
|
||||
define symbol m_veneer_table_start = 0x1000FE00;
|
||||
define symbol m_veneer_table_size = 0x200;
|
||||
|
||||
define symbol m_usb_sram_start = 0x50100000;
|
||||
define symbol m_usb_sram_end = 0x50103FFF;
|
||||
|
||||
define memory mem with size = 4G;
|
||||
|
||||
define region TEXT_region = mem:[from m_interrupts_start to m_interrupts_end]
|
||||
| mem:[from m_text_start to m_text_end];
|
||||
define region DATA_region = mem:[from m_data_start to m_data_end-__size_cstack__];
|
||||
define region CSTACK_region = mem:[from m_data_end-__size_cstack__+1 to m_data_end];
|
||||
if (isdefinedsymbol(__use_shmem__)) {
|
||||
define region rpmsg_sh_mem_region = mem:[from rpmsg_sh_mem_start to rpmsg_sh_mem_end];
|
||||
}
|
||||
|
||||
define region VENEER_TABLE_region = mem:[from m_veneer_table_start to m_veneer_table_start + m_veneer_table_size - 1];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __size_heap__ { };
|
||||
define block RW { readwrite };
|
||||
define block ZI { zi };
|
||||
|
||||
define region core1_region = mem:[from core1_image_start to core1_image_end];
|
||||
define block CORE1_IMAGE_WBLOCK { section __core1_image };
|
||||
|
||||
/* regions for USB */
|
||||
define region USB_BDT_region = mem:[from m_usb_sram_start to m_usb_sram_start + usb_bdt_size - 1];
|
||||
define region USB_SRAM_region = mem:[from m_usb_sram_start + usb_bdt_size to m_usb_sram_end];
|
||||
place in USB_BDT_region { section m_usb_bdt };
|
||||
place in USB_SRAM_region { section m_usb_global };
|
||||
|
||||
initialize by copy { readwrite, section .textrw };
|
||||
|
||||
if (isdefinedsymbol(__USE_DLIB_PERTHREAD))
|
||||
{
|
||||
/* Required in a multi-threaded application */
|
||||
initialize by copy with packing = none { section __DLIB_PERTHREAD };
|
||||
}
|
||||
|
||||
do not initialize { section .noinit, section m_usb_bdt, section m_usb_global };
|
||||
if (isdefinedsymbol(__use_shmem__)) {
|
||||
do not initialize { section rpmsg_sh_mem_section };
|
||||
}
|
||||
|
||||
place at address mem: m_interrupts_start { readonly section .intvec };
|
||||
place in TEXT_region { readonly };
|
||||
place in DATA_region { block RW };
|
||||
place in DATA_region { block ZI };
|
||||
place in DATA_region { last block HEAP };
|
||||
place in CSTACK_region { block CSTACK };
|
||||
place in VENEER_TABLE_region { section Veneer$$CMSE };
|
||||
|
||||
if (isdefinedsymbol(__use_shmem__)) {
|
||||
place in rpmsg_sh_mem_region { section rpmsg_sh_mem_section };
|
||||
}
|
||||
place in core1_region { block CORE1_IMAGE_WBLOCK };
|
||||
|
||||
File diff suppressed because it is too large
Load diff
File diff suppressed because it is too large
Load diff
|
|
@ -25,8 +25,8 @@
|
|||
*/
|
||||
|
||||
/******************************************************************************
|
||||
See http://www.freertos.org/a00110.html for an explanation of the
|
||||
definitions contained in this file.
|
||||
See http://www.freertos.org/a00110.html for an explanation of the
|
||||
definitions contained in this file.
|
||||
******************************************************************************/
|
||||
|
||||
#ifndef FREERTOS_CONFIG_H
|
||||
|
|
@ -46,122 +46,122 @@
|
|||
#include "clock_config.h"
|
||||
|
||||
/* Cortex M33 port configuration. */
|
||||
#define configENABLE_MPU 1
|
||||
#define configENABLE_FPU 1
|
||||
#define configENABLE_TRUSTZONE 1
|
||||
#define configENABLE_MPU 1
|
||||
#define configENABLE_FPU 1
|
||||
#define configENABLE_TRUSTZONE 1
|
||||
|
||||
/* Constants related to the behaviour or the scheduler. */
|
||||
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
|
||||
#define configUSE_PREEMPTION 1
|
||||
#define configUSE_TIME_SLICING 1
|
||||
#define configMAX_PRIORITIES ( 5 )
|
||||
#define configIDLE_SHOULD_YIELD 1
|
||||
#define configUSE_16_BIT_TICKS 0 /* Only for 8 and 16-bit hardware. */
|
||||
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
|
||||
#define configUSE_PREEMPTION 1
|
||||
#define configUSE_TIME_SLICING 1
|
||||
#define configMAX_PRIORITIES ( 5 )
|
||||
#define configIDLE_SHOULD_YIELD 1
|
||||
#define configUSE_16_BIT_TICKS 0 /* Only for 8 and 16-bit hardware. */
|
||||
|
||||
/* Constants that describe the hardware and memory usage. */
|
||||
#define configCPU_CLOCK_HZ BOARD_BOOTCLOCKFROHF96M_CORE_CLOCK
|
||||
#define configMINIMAL_STACK_SIZE ( ( uint16_t ) 128 )
|
||||
#define configMINIMAL_SECURE_STACK_SIZE ( 1024 )
|
||||
#define configMAX_TASK_NAME_LEN ( 12 )
|
||||
#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 50 * 1024 ) )
|
||||
#define configCPU_CLOCK_HZ BOARD_BOOTCLOCKFROHF96M_CORE_CLOCK
|
||||
#define configMINIMAL_STACK_SIZE ( ( uint16_t ) 128 )
|
||||
#define configMINIMAL_SECURE_STACK_SIZE ( 1024 )
|
||||
#define configMAX_TASK_NAME_LEN ( 12 )
|
||||
#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 50 * 1024 ) )
|
||||
|
||||
/* Constants that build features in or out. */
|
||||
#define configUSE_MUTEXES 1
|
||||
#define configUSE_TICKLESS_IDLE 1
|
||||
#define configUSE_APPLICATION_TASK_TAG 0
|
||||
#define configUSE_NEWLIB_REENTRANT 0
|
||||
#define configUSE_COUNTING_SEMAPHORES 1
|
||||
#define configUSE_RECURSIVE_MUTEXES 1
|
||||
#define configUSE_QUEUE_SETS 0
|
||||
#define configUSE_TASK_NOTIFICATIONS 1
|
||||
#define configUSE_TRACE_FACILITY 1
|
||||
#define configUSE_MUTEXES 1
|
||||
#define configUSE_TICKLESS_IDLE 1
|
||||
#define configUSE_APPLICATION_TASK_TAG 0
|
||||
#define configUSE_NEWLIB_REENTRANT 0
|
||||
#define configUSE_COUNTING_SEMAPHORES 1
|
||||
#define configUSE_RECURSIVE_MUTEXES 1
|
||||
#define configUSE_QUEUE_SETS 0
|
||||
#define configUSE_TASK_NOTIFICATIONS 1
|
||||
#define configUSE_TRACE_FACILITY 1
|
||||
|
||||
/* Constants that define which hook (callback) functions should be used. */
|
||||
#define configUSE_IDLE_HOOK 0
|
||||
#define configUSE_TICK_HOOK 0
|
||||
#define configUSE_MALLOC_FAILED_HOOK 0
|
||||
#define configUSE_IDLE_HOOK 0
|
||||
#define configUSE_TICK_HOOK 0
|
||||
#define configUSE_MALLOC_FAILED_HOOK 0
|
||||
|
||||
/* Constants provided for debugging and optimisation assistance. */
|
||||
#define configCHECK_FOR_STACK_OVERFLOW 2
|
||||
#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
|
||||
#define configQUEUE_REGISTRY_SIZE 0
|
||||
#define configCHECK_FOR_STACK_OVERFLOW 2
|
||||
#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
|
||||
#define configQUEUE_REGISTRY_SIZE 0
|
||||
|
||||
/* Software timer definitions. */
|
||||
#define configUSE_TIMERS 1
|
||||
#define configTIMER_TASK_PRIORITY ( 3 )
|
||||
#define configTIMER_QUEUE_LENGTH 5
|
||||
#define configTIMER_TASK_STACK_DEPTH ( configMINIMAL_STACK_SIZE )
|
||||
#define configUSE_TIMERS 1
|
||||
#define configTIMER_TASK_PRIORITY ( 3 )
|
||||
#define configTIMER_QUEUE_LENGTH 5
|
||||
#define configTIMER_TASK_STACK_DEPTH ( configMINIMAL_STACK_SIZE )
|
||||
|
||||
/* Set the following definitions to 1 to include the API function, or zero
|
||||
* to exclude the API function. NOTE: Setting an INCLUDE_ parameter to 0 is
|
||||
* only necessary if the linker does not automatically remove functions that are
|
||||
* not referenced anyway. */
|
||||
#define INCLUDE_vTaskPrioritySet 1
|
||||
#define INCLUDE_uxTaskPriorityGet 1
|
||||
#define INCLUDE_vTaskDelete 1
|
||||
#define INCLUDE_vTaskCleanUpResources 0
|
||||
#define INCLUDE_vTaskSuspend 1
|
||||
#define INCLUDE_vTaskDelayUntil 1
|
||||
#define INCLUDE_vTaskDelay 1
|
||||
#define INCLUDE_uxTaskGetStackHighWaterMark 0
|
||||
#define INCLUDE_xTaskGetIdleTaskHandle 0
|
||||
#define INCLUDE_eTaskGetState 1
|
||||
#define INCLUDE_xTaskResumeFromISR 0
|
||||
#define INCLUDE_xTaskGetCurrentTaskHandle 1
|
||||
#define INCLUDE_xTaskGetSchedulerState 0
|
||||
#define INCLUDE_xSemaphoreGetMutexHolder 0
|
||||
#define INCLUDE_xTimerPendFunctionCall 1
|
||||
#define INCLUDE_vTaskPrioritySet 1
|
||||
#define INCLUDE_uxTaskPriorityGet 1
|
||||
#define INCLUDE_vTaskDelete 1
|
||||
#define INCLUDE_vTaskCleanUpResources 0
|
||||
#define INCLUDE_vTaskSuspend 1
|
||||
#define INCLUDE_vTaskDelayUntil 1
|
||||
#define INCLUDE_vTaskDelay 1
|
||||
#define INCLUDE_uxTaskGetStackHighWaterMark 0
|
||||
#define INCLUDE_xTaskGetIdleTaskHandle 0
|
||||
#define INCLUDE_eTaskGetState 1
|
||||
#define INCLUDE_xTaskResumeFromISR 0
|
||||
#define INCLUDE_xTaskGetCurrentTaskHandle 1
|
||||
#define INCLUDE_xTaskGetSchedulerState 0
|
||||
#define INCLUDE_xSemaphoreGetMutexHolder 0
|
||||
#define INCLUDE_xTimerPendFunctionCall 1
|
||||
|
||||
/* This demo makes use of one or more example stats formatting functions. These
|
||||
* format the raw data provided by the uxTaskGetSystemState() function in to
|
||||
* human readable ASCII form. See the notes in the implementation of vTaskList()
|
||||
* within FreeRTOS/Source/tasks.c for limitations. */
|
||||
#define configUSE_STATS_FORMATTING_FUNCTIONS 1
|
||||
#define configUSE_STATS_FORMATTING_FUNCTIONS 1
|
||||
|
||||
/* Dimensions a buffer that can be used by the FreeRTOS+CLI command interpreter.
|
||||
* See the FreeRTOS+CLI documentation for more information:
|
||||
* https://www.FreeRTOS.org/FreeRTOS-Plus/FreeRTOS_Plus_CLI/ */
|
||||
#define configCOMMAND_INT_MAX_OUTPUT_SIZE 2048
|
||||
#define configCOMMAND_INT_MAX_OUTPUT_SIZE 2048
|
||||
|
||||
/* Interrupt priority configuration follows...................... */
|
||||
|
||||
/* Use the system definition, if there is one. */
|
||||
#ifdef __NVIC_PRIO_BITS
|
||||
#define configPRIO_BITS __NVIC_PRIO_BITS
|
||||
#define configPRIO_BITS __NVIC_PRIO_BITS
|
||||
#else
|
||||
#define configPRIO_BITS 3 /* 8 priority levels. */
|
||||
#define configPRIO_BITS 3 /* 8 priority levels. */
|
||||
#endif
|
||||
|
||||
/* The lowest interrupt priority that can be used in a call to a "set priority"
|
||||
* function. */
|
||||
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 0x07
|
||||
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 0x07
|
||||
|
||||
/* The highest interrupt priority that can be used by any interrupt service
|
||||
* routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT
|
||||
* CALL INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A
|
||||
* HIGHER PRIORITY THAN THIS! (higher priorities are lower numeric values). */
|
||||
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
|
||||
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
|
||||
|
||||
/* Interrupt priorities used by the kernel port layer itself. These are generic
|
||||
* to all Cortex-M ports, and do not rely on any particular library functions. */
|
||||
#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << ( 8 - configPRIO_BITS ) )
|
||||
#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << ( 8 - configPRIO_BITS ) )
|
||||
|
||||
/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
|
||||
* See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
|
||||
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << ( 8 - configPRIO_BITS ) )
|
||||
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << ( 8 - configPRIO_BITS ) )
|
||||
|
||||
/* The #ifdef guards against the file being included from IAR assembly files. */
|
||||
#ifndef __IASMARM__
|
||||
|
||||
/* Constants related to the generation of run time stats. */
|
||||
#define configGENERATE_RUN_TIME_STATS 0
|
||||
#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS()
|
||||
#define portGET_RUN_TIME_COUNTER_VALUE() 0
|
||||
#define configTICK_RATE_HZ ( ( TickType_t ) 100 )
|
||||
/* Constants related to the generation of run time stats. */
|
||||
#define configGENERATE_RUN_TIME_STATS 0
|
||||
#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS()
|
||||
#define portGET_RUN_TIME_COUNTER_VALUE() 0
|
||||
#define configTICK_RATE_HZ ( ( TickType_t ) 100 )
|
||||
|
||||
#endif /* __IASMARM__ */
|
||||
|
||||
/* Enable static allocation. */
|
||||
#define configSUPPORT_STATIC_ALLOCATION 1
|
||||
#define configSUPPORT_STATIC_ALLOCATION 1
|
||||
|
||||
#endif /* FREERTOS_CONFIG_H */
|
||||
|
|
|
|||
|
|
@ -115,6 +115,8 @@
|
|||
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="gnu.c.compiler.option.include.paths.88237135" name="Include paths (-I)" superClass="gnu.c.compiler.option.include.paths" useByScannerDiscovery="false" valueType="includePath">
|
||||
<listOptionValue builtIn="false" value="../../Config"/>
|
||||
<listOptionValue builtIn="false" value="../../Secure"/>
|
||||
<listOptionValue builtIn="false" value="../../../../NSC_Functions"/>
|
||||
<listOptionValue builtIn="false" value="../../../../RegTests"/>
|
||||
<listOptionValue builtIn="false" value="../../../../NXP_Code"/>
|
||||
<listOptionValue builtIn="false" value="../../../../NXP_Code/board"/>
|
||||
<listOptionValue builtIn="false" value="../../../../NXP_Code/source"/>
|
||||
|
|
|
|||
|
|
@ -83,19 +83,24 @@
|
|||
<locationURI>PARENT-4-PROJECT_LOC/Common/ARMv8M/tz_demo/tz_demo.h</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>User/main_ns.c</name>
|
||||
<name>User/fault_handler.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PROJECT_LOC/main_ns.c</locationURI>
|
||||
<locationURI>PROJECT_LOC/fault_handler.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>User/res_tests.c</name>
|
||||
<name>User/main_ns.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PROJECT_LOC/reg_tests.c</locationURI>
|
||||
<locationURI>DEMO_ROOT/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/User/NonSecure/main_ns.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>User/reg_tests.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>DEMO_ROOT/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/RegTests/reg_tests.c</locationURI>
|
||||
</link>
|
||||
</linkedResources>
|
||||
<filteredResources>
|
||||
<filter>
|
||||
<id>1681724631111</id>
|
||||
<id>1682451970778</id>
|
||||
<name></name>
|
||||
<type>6</type>
|
||||
<matcher>
|
||||
|
|
@ -104,7 +109,7 @@
|
|||
</matcher>
|
||||
</filter>
|
||||
<filter>
|
||||
<id>1681724631147</id>
|
||||
<id>1682451970814</id>
|
||||
<name></name>
|
||||
<type>6</type>
|
||||
<matcher>
|
||||
|
|
@ -112,6 +117,15 @@
|
|||
<arguments>1.0-name-matches-false-false-*.h</arguments>
|
||||
</matcher>
|
||||
</filter>
|
||||
<filter>
|
||||
<id>1682451751797</id>
|
||||
<name>NXP_Code</name>
|
||||
<type>10</type>
|
||||
<matcher>
|
||||
<id>org.eclipse.ui.ide.multiFilter</id>
|
||||
<arguments>1.0-name-matches-false-false-trustzone</arguments>
|
||||
</matcher>
|
||||
</filter>
|
||||
<filter>
|
||||
<id>1681721788469</id>
|
||||
<name>reg_tests</name>
|
||||
|
|
@ -157,6 +171,15 @@
|
|||
<arguments>1.0-name-matches-false-false-Common</arguments>
|
||||
</matcher>
|
||||
</filter>
|
||||
<filter>
|
||||
<id>1682451733052</id>
|
||||
<name>NXP_Code/startup</name>
|
||||
<type>6</type>
|
||||
<matcher>
|
||||
<id>org.eclipse.ui.ide.multiFilter</id>
|
||||
<arguments>1.0-name-matches-false-false-startup_LPC55S69_cm33_core0.s</arguments>
|
||||
</matcher>
|
||||
</filter>
|
||||
<filter>
|
||||
<id>1681721804811</id>
|
||||
<name>reg_tests/GCC</name>
|
||||
|
|
|
|||
|
|
@ -0,0 +1,2 @@
|
|||
eclipse.preferences.version=1
|
||||
encoding/<project>=UTF-8
|
||||
|
|
@ -0,0 +1,50 @@
|
|||
/*
|
||||
* FreeRTOS V202212.00
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief The mem fault handler.
|
||||
*
|
||||
* It calls a function called vHandleMemoryFault.
|
||||
*/
|
||||
void MemManage_Handler( void ) __attribute__ ( ( naked ) );
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void MemManage_Handler( void ) /* __attribute__ ( ( naked ) ) */
|
||||
{
|
||||
__asm volatile
|
||||
(
|
||||
" tst lr, #4 \n"
|
||||
" ite eq \n"
|
||||
" mrseq r0, msp \n"
|
||||
" mrsne r0, psp \n"
|
||||
" ldr r1, handler_address_const \n"
|
||||
" bx r1 \n"
|
||||
" \n"
|
||||
" .align 4 \n"
|
||||
" handler_address_const: .word vHandleMemoryFault \n"
|
||||
);
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
|
@ -1,198 +0,0 @@
|
|||
/*
|
||||
* FreeRTOS V202212.00
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
/* FreeRTOS include. */
|
||||
#include "FreeRTOS.h"
|
||||
#include "task.h"
|
||||
|
||||
/* Device includes. */
|
||||
#include "fsl_device_registers.h"
|
||||
#include "fsl_debug_console.h"
|
||||
#include "pin_mux.h"
|
||||
#include "board.h"
|
||||
#include "clock_config.h"
|
||||
#include "fsl_power.h"
|
||||
|
||||
/* Demo includes. */
|
||||
#include "tz_demo.h"
|
||||
#include "mpu_demo.h"
|
||||
#include "reg_tests.h"
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Create all demo tasks.
|
||||
*/
|
||||
static void prvCreateTasks( void );
|
||||
|
||||
/**
|
||||
* @brief Setup hardware.
|
||||
*/
|
||||
static void prvSetupHardware( void );
|
||||
|
||||
/**
|
||||
* @brief Application-specific implementation of the SystemInit() weak
|
||||
* function.
|
||||
*/
|
||||
void SystemInit( void );
|
||||
|
||||
/**
|
||||
* @brief The mem fault handler.
|
||||
*
|
||||
* It calls a function called vHandleMemoryFault.
|
||||
*/
|
||||
void MemManage_Handler( void ) __attribute__ ( ( naked ) );
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* For instructions on how to build and run this demo, visit the following link:
|
||||
* https://www.freertos.org/RTOS-Cortex-M33-LPC55S69-MCUXpresso-GCC.html
|
||||
*/
|
||||
|
||||
/* Non-Secure main. */
|
||||
int main( void )
|
||||
{
|
||||
/* Setup hardware. */
|
||||
prvSetupHardware();
|
||||
|
||||
/* Create tasks. */
|
||||
prvCreateTasks();
|
||||
|
||||
/* Start scheduler. */
|
||||
vTaskStartScheduler();
|
||||
|
||||
/* Will not get here if the scheduler starts successfully. If you do end up
|
||||
here then there wasn't enough heap memory available to start either the idle
|
||||
task or the timer/daemon task. https://www.freertos.org/a00111.html */
|
||||
|
||||
for( ; ; )
|
||||
{
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvCreateTasks( void )
|
||||
{
|
||||
/* Create tasks for the MPU Demo. */
|
||||
vStartMPUDemo();
|
||||
|
||||
/* Create tasks for the TZ Demo. */
|
||||
vStartTZDemo();
|
||||
|
||||
/* Create tasks for reg tests. */
|
||||
vStartRegTests();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvSetupHardware( void )
|
||||
{
|
||||
/* Set BOD VBAT level to 1.65V. */
|
||||
POWER_SetBodVbatLevel( kPOWER_BodVbatLevel1650mv, kPOWER_BodHystLevel50mv, false );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void SystemInit( void )
|
||||
{
|
||||
/* Nothing needs to be initialized for Non-Secure project. */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Stack overflow hook. */
|
||||
void vApplicationStackOverflowHook( TaskHandle_t xTask, char *pcTaskName )
|
||||
{
|
||||
/* Force an assert. */
|
||||
configASSERT( pcTaskName == 0 );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* configUSE_STATIC_ALLOCATION is set to 1, so the application must provide an
|
||||
* implementation of vApplicationGetIdleTaskMemory() to provide the memory that
|
||||
* is used by the Idle task. */
|
||||
void vApplicationGetIdleTaskMemory( StaticTask_t ** ppxIdleTaskTCBBuffer,
|
||||
StackType_t ** ppxIdleTaskStackBuffer,
|
||||
uint32_t * pulIdleTaskStackSize )
|
||||
{
|
||||
/* If the buffers to be provided to the Idle task are declared inside this
|
||||
* function then they must be declared static - otherwise they will be
|
||||
* allocated on the stack and so not exists after this function exits. */
|
||||
static StaticTask_t xIdleTaskTCB;
|
||||
static StackType_t uxIdleTaskStack[ configMINIMAL_STACK_SIZE ] __attribute__( ( aligned( 32 ) ) );
|
||||
|
||||
/* Pass out a pointer to the StaticTask_t structure in which the Idle
|
||||
* task's state will be stored. */
|
||||
*ppxIdleTaskTCBBuffer = &xIdleTaskTCB;
|
||||
|
||||
/* Pass out the array that will be used as the Idle task's stack. */
|
||||
*ppxIdleTaskStackBuffer = uxIdleTaskStack;
|
||||
|
||||
/* Pass out the size of the array pointed to by *ppxIdleTaskStackBuffer.
|
||||
* Note that, as the array is necessarily of type StackType_t,
|
||||
* configMINIMAL_STACK_SIZE is specified in words, not bytes. */
|
||||
*pulIdleTaskStackSize = configMINIMAL_STACK_SIZE;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* configUSE_STATIC_ALLOCATION and configUSE_TIMERS are both set to 1, so the
|
||||
* application must provide an implementation of vApplicationGetTimerTaskMemory()
|
||||
* to provide the memory that is used by the Timer service task. */
|
||||
void vApplicationGetTimerTaskMemory( StaticTask_t ** ppxTimerTaskTCBBuffer,
|
||||
StackType_t ** ppxTimerTaskStackBuffer,
|
||||
uint32_t * pulTimerTaskStackSize )
|
||||
{
|
||||
/* If the buffers to be provided to the Timer task are declared inside this
|
||||
* function then they must be declared static - otherwise they will be
|
||||
* allocated on the stack and so not exists after this function exits. */
|
||||
static StaticTask_t xTimerTaskTCB;
|
||||
static StackType_t uxTimerTaskStack[ configTIMER_TASK_STACK_DEPTH ] __attribute__( ( aligned( 32 ) ) );
|
||||
|
||||
/* Pass out a pointer to the StaticTask_t structure in which the Timer
|
||||
* task's state will be stored. */
|
||||
*ppxTimerTaskTCBBuffer = &xTimerTaskTCB;
|
||||
|
||||
/* Pass out the array that will be used as the Timer task's stack. */
|
||||
*ppxTimerTaskStackBuffer = uxTimerTaskStack;
|
||||
|
||||
/* Pass out the size of the array pointed to by *ppxTimerTaskStackBuffer.
|
||||
* Note that, as the array is necessarily of type StackType_t,
|
||||
* configTIMER_TASK_STACK_DEPTH is specified in words, not bytes. */
|
||||
*pulTimerTaskStackSize = configTIMER_TASK_STACK_DEPTH;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void MemManage_Handler( void )
|
||||
{
|
||||
__asm volatile
|
||||
(
|
||||
" tst lr, #4 \n"
|
||||
" ite eq \n"
|
||||
" mrseq r0, msp \n"
|
||||
" mrsne r0, psp \n"
|
||||
" ldr r1, handler_address_const \n"
|
||||
" bx r1 \n"
|
||||
" \n"
|
||||
" .align 4 \n"
|
||||
" handler_address_const: .word vHandleMemoryFault \n"
|
||||
);
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
|
@ -119,6 +119,7 @@
|
|||
<listOptionValue builtIn="false" value="../../../../NXP_Code/CMSIS"/>
|
||||
<listOptionValue builtIn="false" value="../../../../NXP_Code/device"/>
|
||||
<listOptionValue builtIn="false" value="../../../../NXP_Code/startup"/>
|
||||
<listOptionValue builtIn="false" value="../../../../NXP_Code/trustzone"/>
|
||||
<listOptionValue builtIn="false" value="../../../../NXP_Code/utilities"/>
|
||||
<listOptionValue builtIn="false" value="../../../../NXP_Code/component/uart"/>
|
||||
<listOptionValue builtIn="false" value="../../../../NXP_Code/component/lists"/>
|
||||
|
|
@ -333,16 +334,6 @@
|
|||
</tool>
|
||||
</toolChain>
|
||||
</folderInfo>
|
||||
<folderInfo id="com.crt.advproject.config.exe.debug.650465968.1580633237" name="/" resourcePath="reg_tests">
|
||||
<toolChain id="com.crt.advproject.toolchain.exe.debug.1643158192" name="NXP MCU Tools" superClass="com.crt.advproject.toolchain.exe.debug" unusedChildren="">
|
||||
<tool id="com.crt.advproject.cpp.exe.debug.1303225074" name="MCU C++ Compiler" superClass="com.crt.advproject.cpp.exe.debug.248036726"/>
|
||||
<tool id="com.crt.advproject.gcc.exe.debug.806639634" name="MCU C Compiler" superClass="com.crt.advproject.gcc.exe.debug.1827685058"/>
|
||||
<tool id="com.crt.advproject.gas.exe.debug.2004350830" name="MCU Assembler" superClass="com.crt.advproject.gas.exe.debug.355931849"/>
|
||||
<tool id="com.crt.advproject.link.cpp.exe.debug.141362876" name="MCU C++ Linker" superClass="com.crt.advproject.link.cpp.exe.debug.767850316"/>
|
||||
<tool id="com.crt.advproject.link.exe.debug.558086384" name="MCU Linker" superClass="com.crt.advproject.link.exe.debug.1425769789"/>
|
||||
<tool id="com.crt.advproject.tool.debug.debug.404468304" name="MCU Debugger" superClass="com.crt.advproject.tool.debug.debug.1632770985"/>
|
||||
</toolChain>
|
||||
</folderInfo>
|
||||
<sourceEntries>
|
||||
<entry flags="LOCAL|VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Config"/>
|
||||
<entry flags="LOCAL|VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="NSCFunctions"/>
|
||||
|
|
|
|||
|
|
@ -124,27 +124,17 @@
|
|||
<link>
|
||||
<name>User/main_s.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PROJECT_LOC/main_s.c</locationURI>
|
||||
<locationURI>DEMO_ROOT/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/User/Secure/main_s.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>User/nsc_printf.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PROJECT_LOC/nsc_printf.c</locationURI>
|
||||
<locationURI>DEMO_ROOT/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NSC_Functions/nsc_printf.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>User/nsc_printf.h</name>
|
||||
<type>1</type>
|
||||
<locationURI>PROJECT_LOC/nsc_printf.h</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>User/tzm_config.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PROJECT_LOC/tzm_config.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>User/tzm_config.h</name>
|
||||
<type>1</type>
|
||||
<locationURI>PROJECT_LOC/tzm_config.h</locationURI>
|
||||
<locationURI>DEMO_ROOT/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NSC_Functions/nsc_printf.h</locationURI>
|
||||
</link>
|
||||
</linkedResources>
|
||||
<filteredResources>
|
||||
|
|
@ -175,6 +165,15 @@
|
|||
<arguments>1.0-name-matches-false-false-GCC</arguments>
|
||||
</matcher>
|
||||
</filter>
|
||||
<filter>
|
||||
<id>1682451336783</id>
|
||||
<name>NXP_Code/startup</name>
|
||||
<type>6</type>
|
||||
<matcher>
|
||||
<id>org.eclipse.ui.ide.multiFilter</id>
|
||||
<arguments>1.0-name-matches-false-false-startup_LPC55S69_cm33_core0.s</arguments>
|
||||
</matcher>
|
||||
</filter>
|
||||
<filter>
|
||||
<id>1681721650651</id>
|
||||
<name>reg_tests/GCC</name>
|
||||
|
|
|
|||
|
|
@ -0,0 +1,2 @@
|
|||
eclipse.preferences.version=1
|
||||
encoding/<project>=UTF-8
|
||||
|
|
@ -0,0 +1,170 @@
|
|||
/*
|
||||
* FreeRTOS V202212.00
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
/******************************************************************************
|
||||
See http://www.freertos.org/a00110.html for an explanation of the
|
||||
definitions contained in this file.
|
||||
******************************************************************************/
|
||||
|
||||
#ifndef FREERTOS_CONFIG_H
|
||||
#define FREERTOS_CONFIG_H
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Application specific definitions.
|
||||
*
|
||||
* These definitions should be adjusted for your particular hardware and
|
||||
* application requirements.
|
||||
*
|
||||
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
|
||||
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
|
||||
* https://www.FreeRTOS.org/a00110.html
|
||||
*----------------------------------------------------------*/
|
||||
|
||||
#ifndef __IASMARM__
|
||||
#include "clock_config.h"
|
||||
#endif
|
||||
|
||||
/* Cortex M33 port configuration. */
|
||||
#define configENABLE_MPU 1
|
||||
#define configENABLE_FPU 1
|
||||
#define configENABLE_TRUSTZONE 0
|
||||
#define configRUN_FREERTOS_SECURE_ONLY 1
|
||||
|
||||
/* Constants related to the behaviour or the scheduler. */
|
||||
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
|
||||
#define configUSE_PREEMPTION 1
|
||||
#define configUSE_TIME_SLICING 1
|
||||
#define configMAX_PRIORITIES ( 5 )
|
||||
#define configIDLE_SHOULD_YIELD 1
|
||||
#define configUSE_16_BIT_TICKS 0 /* Only for 8 and 16-bit hardware. */
|
||||
|
||||
/* Constants that describe the hardware and memory usage. */
|
||||
#define configCPU_CLOCK_HZ BOARD_BOOTCLOCKFROHF96M_CORE_CLOCK
|
||||
#define configMINIMAL_STACK_SIZE ( ( uint16_t ) 128 )
|
||||
#define configMINIMAL_SECURE_STACK_SIZE ( 1024 )
|
||||
#define configMAX_TASK_NAME_LEN ( 12 )
|
||||
#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 50 * 1024 ) )
|
||||
|
||||
/* Constants that build features in or out. */
|
||||
#define configUSE_MUTEXES 1
|
||||
#define configUSE_TICKLESS_IDLE 1
|
||||
#define configUSE_APPLICATION_TASK_TAG 0
|
||||
#define configUSE_NEWLIB_REENTRANT 0
|
||||
#define configUSE_COUNTING_SEMAPHORES 1
|
||||
#define configUSE_RECURSIVE_MUTEXES 1
|
||||
#define configUSE_QUEUE_SETS 0
|
||||
#define configUSE_TASK_NOTIFICATIONS 1
|
||||
#define configUSE_TRACE_FACILITY 1
|
||||
|
||||
/* Constants that define which hook (callback) functions should be used. */
|
||||
#define configUSE_IDLE_HOOK 0
|
||||
#define configUSE_TICK_HOOK 0
|
||||
#define configUSE_MALLOC_FAILED_HOOK 0
|
||||
|
||||
/* Constants provided for debugging and optimisation assistance. */
|
||||
#define configCHECK_FOR_STACK_OVERFLOW 2
|
||||
#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
|
||||
#define configQUEUE_REGISTRY_SIZE 0
|
||||
|
||||
/* Software timer definitions. */
|
||||
#define configUSE_TIMERS 1
|
||||
#define configTIMER_TASK_PRIORITY ( 3 )
|
||||
#define configTIMER_QUEUE_LENGTH 5
|
||||
#define configTIMER_TASK_STACK_DEPTH ( configMINIMAL_STACK_SIZE )
|
||||
|
||||
/* Set the following definitions to 1 to include the API function, or zero
|
||||
* to exclude the API function. NOTE: Setting an INCLUDE_ parameter to 0 is
|
||||
* only necessary if the linker does not automatically remove functions that are
|
||||
* not referenced anyway. */
|
||||
#define INCLUDE_vTaskPrioritySet 1
|
||||
#define INCLUDE_uxTaskPriorityGet 1
|
||||
#define INCLUDE_vTaskDelete 1
|
||||
#define INCLUDE_vTaskCleanUpResources 0
|
||||
#define INCLUDE_vTaskSuspend 1
|
||||
#define INCLUDE_vTaskDelayUntil 1
|
||||
#define INCLUDE_vTaskDelay 1
|
||||
#define INCLUDE_uxTaskGetStackHighWaterMark 0
|
||||
#define INCLUDE_xTaskGetIdleTaskHandle 0
|
||||
#define INCLUDE_eTaskGetState 1
|
||||
#define INCLUDE_xTaskResumeFromISR 0
|
||||
#define INCLUDE_xTaskGetCurrentTaskHandle 1
|
||||
#define INCLUDE_xTaskGetSchedulerState 0
|
||||
#define INCLUDE_xSemaphoreGetMutexHolder 0
|
||||
#define INCLUDE_xTimerPendFunctionCall 1
|
||||
|
||||
/* This demo makes use of one or more example stats formatting functions. These
|
||||
* format the raw data provided by the uxTaskGetSystemState() function in to
|
||||
* human readable ASCII form. See the notes in the implementation of vTaskList()
|
||||
* within FreeRTOS/Source/tasks.c for limitations. */
|
||||
#define configUSE_STATS_FORMATTING_FUNCTIONS 1
|
||||
|
||||
/* Dimensions a buffer that can be used by the FreeRTOS+CLI command interpreter.
|
||||
* See the FreeRTOS+CLI documentation for more information:
|
||||
* https://www.FreeRTOS.org/FreeRTOS-Plus/FreeRTOS_Plus_CLI/ */
|
||||
#define configCOMMAND_INT_MAX_OUTPUT_SIZE 2048
|
||||
|
||||
/* Interrupt priority configuration follows...................... */
|
||||
|
||||
/* Use the system definition, if there is one. */
|
||||
#ifdef __NVIC_PRIO_BITS
|
||||
#define configPRIO_BITS __NVIC_PRIO_BITS
|
||||
#else
|
||||
#define configPRIO_BITS 3 /* 8 priority levels. */
|
||||
#endif
|
||||
|
||||
/* The lowest interrupt priority that can be used in a call to a "set priority"
|
||||
* function. */
|
||||
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 0x07
|
||||
|
||||
/* The highest interrupt priority that can be used by any interrupt service
|
||||
* routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT
|
||||
* CALL INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A
|
||||
* HIGHER PRIORITY THAN THIS! (higher priorities are lower numeric values). */
|
||||
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
|
||||
|
||||
/* Interrupt priorities used by the kernel port layer itself. These are generic
|
||||
* to all Cortex-M ports, and do not rely on any particular library functions. */
|
||||
#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << ( 8 - configPRIO_BITS ) )
|
||||
|
||||
/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
|
||||
* See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
|
||||
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << ( 8 - configPRIO_BITS ) )
|
||||
|
||||
/* The #ifdef guards against the file being included from IAR assembly files. */
|
||||
#ifndef __IASMARM__
|
||||
|
||||
/* Constants related to the generation of run time stats. */
|
||||
#define configGENERATE_RUN_TIME_STATS 0
|
||||
#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS()
|
||||
#define portGET_RUN_TIME_COUNTER_VALUE() 0
|
||||
#define configTICK_RATE_HZ ( ( TickType_t ) 100 )
|
||||
|
||||
#endif /* __IASMARM__ */
|
||||
|
||||
/* Enable static allocation. */
|
||||
#define configSUPPORT_STATIC_ALLOCATION 1
|
||||
|
||||
#endif /* FREERTOS_CONFIG_H */
|
||||
File diff suppressed because it is too large
Load diff
File diff suppressed because it is too large
Load diff
|
|
@ -0,0 +1,15 @@
|
|||
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||
<workspace>
|
||||
<batchBuild>
|
||||
<batchDefinition>
|
||||
<name>all</name>
|
||||
<member>
|
||||
<project>FreeRTOSDemo</project>
|
||||
<configuration>debug</configuration>
|
||||
</member>
|
||||
</batchDefinition>
|
||||
</batchBuild>
|
||||
<project>
|
||||
<path>$WS_DIR$/FreeRTOSDemo.ewp</path>
|
||||
</project>
|
||||
</workspace>
|
||||
|
|
@ -0,0 +1,144 @@
|
|||
/*
|
||||
** ###################################################################
|
||||
** Processors: LPC55S69JBD100_cm33_core0
|
||||
** LPC55S69JBD64_cm33_core0
|
||||
** LPC55S69JEV98_cm33_core0
|
||||
**
|
||||
** Compiler: IAR ANSI C/C++ Compiler for ARM
|
||||
** Reference manual: LPC55S6x/LPC55S2x/LPC552x User manual(UM11126) Rev.1.3 16 May 2019
|
||||
** Version: rev. 1.1, 2019-05-16
|
||||
** Build: b190926
|
||||
**
|
||||
** Abstract:
|
||||
** Linker file for the IAR ANSI C/C++ Compiler for ARM
|
||||
**
|
||||
** Copyright 2016 Freescale Semiconductor, Inc.
|
||||
** Copyright 2016-2019 NXP
|
||||
** All rights reserved.
|
||||
**
|
||||
** SPDX-License-Identifier: BSD-3-Clause
|
||||
**
|
||||
** http: www.nxp.com
|
||||
** mail: support@nxp.com
|
||||
**
|
||||
** ###################################################################
|
||||
*/
|
||||
|
||||
|
||||
/* USB BDT size */
|
||||
define symbol usb_bdt_size = 0x0;
|
||||
/* Stack and Heap Sizes */
|
||||
if (isdefinedsymbol(__stack_size__)) {
|
||||
define symbol __size_cstack__ = __stack_size__;
|
||||
} else {
|
||||
define symbol __size_cstack__ = 0x0400;
|
||||
}
|
||||
|
||||
if (isdefinedsymbol(__heap_size__)) {
|
||||
define symbol __size_heap__ = __heap_size__;
|
||||
} else {
|
||||
define symbol __size_heap__ = 0x0400;
|
||||
}
|
||||
|
||||
define symbol m_privileged_text_start = 0x10000000;
|
||||
define symbol m_privileged_text_end = 0x10007FFF;
|
||||
|
||||
define symbol m_syscalls_text_start = 0x10008000;
|
||||
define symbol m_syscalls_text_end = 0x1000FFFF;
|
||||
|
||||
define symbol m_unprivileged_text_start = 0x10010000;
|
||||
define symbol m_unprivileged_text_end = 0x10071FFF;
|
||||
|
||||
define exported symbol core1_image_start = 0x10072000;
|
||||
define exported symbol core1_image_end = 0x1009D7FF;
|
||||
|
||||
if (isdefinedsymbol(__use_shmem__)) {
|
||||
define symbol m_privileged_data_start = 0x30000000;
|
||||
define symbol m_privileged_data_end = 0x3000FFFF;
|
||||
|
||||
define symbol m_unprivileged_data_start = 0x30010000;
|
||||
define symbol m_unprivileged_data_end = 0x30030FFF;
|
||||
|
||||
define exported symbol rpmsg_sh_mem_start = 0x30031800;
|
||||
define exported symbol rpmsg_sh_mem_end = 0x30032FFF;
|
||||
} else {
|
||||
define symbol m_privileged_data_start = 0x30000000;
|
||||
define symbol m_privileged_data_end = 0x3000FFFF;
|
||||
|
||||
define symbol m_unprivileged_data_start = 0x30010000;
|
||||
define symbol m_unprivileged_data_end = 0x30032FFF;
|
||||
}
|
||||
|
||||
define symbol m_usb_sram_start = 0x50100000;
|
||||
define symbol m_usb_sram_end = 0x50103FFF;
|
||||
|
||||
define memory mem with size = 4G;
|
||||
|
||||
define region TEXT_privileged_region = mem:[from m_privileged_text_start to m_privileged_text_end];
|
||||
define region TEXT_syscalls_region = mem:[from m_syscalls_text_start to m_syscalls_text_end];
|
||||
define region TEXT_unprivileged_region = mem:[from m_unprivileged_text_start to m_unprivileged_text_end];
|
||||
|
||||
|
||||
define region DATA_privileged_region = mem:[from m_privileged_data_start to m_privileged_data_end];
|
||||
define region DATA_unprivileged_region = mem:[from m_unprivileged_data_start to m_unprivileged_data_end-__size_cstack__];
|
||||
define region CSTACK_region = mem:[from m_unprivileged_data_end-__size_cstack__+1 to m_unprivileged_data_end];
|
||||
|
||||
if (isdefinedsymbol(__use_shmem__)) {
|
||||
define region rpmsg_sh_mem_region = mem:[from rpmsg_sh_mem_start to rpmsg_sh_mem_end];
|
||||
}
|
||||
|
||||
define block CSTACK with alignment = 8, size = __size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __size_heap__ { };
|
||||
define block RW { readwrite };
|
||||
define block ZI { zi };
|
||||
|
||||
define region core1_region = mem:[from core1_image_start to core1_image_end];
|
||||
define block CORE1_IMAGE_WBLOCK { section __core1_image };
|
||||
|
||||
/* regions for USB */
|
||||
define region USB_BDT_region = mem:[from m_usb_sram_start to m_usb_sram_start + usb_bdt_size - 1];
|
||||
define region USB_SRAM_region = mem:[from m_usb_sram_start + usb_bdt_size to m_usb_sram_end];
|
||||
place in USB_BDT_region { section m_usb_bdt };
|
||||
place in USB_SRAM_region { section m_usb_global };
|
||||
|
||||
initialize by copy { readwrite, section .textrw };
|
||||
|
||||
if (isdefinedsymbol(__USE_DLIB_PERTHREAD))
|
||||
{
|
||||
/* Required in a multi-threaded application */
|
||||
initialize by copy with packing = none { section __DLIB_PERTHREAD };
|
||||
}
|
||||
|
||||
do not initialize { section .noinit, section m_usb_bdt, section m_usb_global };
|
||||
if (isdefinedsymbol(__use_shmem__)) {
|
||||
do not initialize { section rpmsg_sh_mem_section };
|
||||
}
|
||||
|
||||
/* Exported symbols. */
|
||||
define exported symbol __privileged_functions_start__ = m_privileged_text_start;
|
||||
define exported symbol __privileged_functions_end__ = m_privileged_text_end;
|
||||
define exported symbol __syscalls_flash_start__ = m_syscalls_text_start;
|
||||
define exported symbol __syscalls_flash_end__ = m_syscalls_text_end;
|
||||
define exported symbol __unprivileged_flash_start__ = m_unprivileged_text_start;
|
||||
define exported symbol __unprivileged_flash_end__ = m_unprivileged_text_end;
|
||||
define exported symbol __privileged_sram_start__ = m_privileged_data_start;
|
||||
define exported symbol __privileged_sram_end__ = m_privileged_data_end;
|
||||
|
||||
/* Placements. */
|
||||
place at address mem: m_privileged_text_start { readonly section .intvec };
|
||||
|
||||
place in TEXT_privileged_region { readonly section privileged_functions };
|
||||
place in TEXT_syscalls_region { readonly section freertos_system_calls };
|
||||
place in TEXT_unprivileged_region { readonly };
|
||||
|
||||
place in DATA_privileged_region { readwrite section privileged_data };
|
||||
place in DATA_unprivileged_region { block RW };
|
||||
place in DATA_unprivileged_region { block ZI };
|
||||
place in DATA_unprivileged_region { last block HEAP };
|
||||
|
||||
place in CSTACK_region { block CSTACK };
|
||||
if (isdefinedsymbol(__use_shmem__)) {
|
||||
place in rpmsg_sh_mem_region { section rpmsg_sh_mem_section };
|
||||
}
|
||||
place in core1_region { block CORE1_IMAGE_WBLOCK };
|
||||
|
||||
|
|
@ -0,0 +1,42 @@
|
|||
/*
|
||||
* FreeRTOS V202212.00
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
EXTERN vHandleMemoryFault
|
||||
PUBLIC MemManage_Handler
|
||||
|
||||
SECTION .text:CODE:NOROOT(2)
|
||||
THUMB
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
MemManage_Handler:
|
||||
tst lr, #4
|
||||
ite eq
|
||||
mrseq r0, msp
|
||||
mrsne r0, psp
|
||||
b vHandleMemoryFault
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
END
|
||||
|
|
@ -0,0 +1,398 @@
|
|||
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|
||||
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|
||||
<storageModule moduleId="org.eclipse.cdt.core.settings">
|
||||
<cconfiguration id="com.crt.advproject.config.exe.debug.650465968">
|
||||
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.crt.advproject.config.exe.debug.650465968" moduleId="org.eclipse.cdt.core.settings" name="Debug">
|
||||
<externalSettings/>
|
||||
<extensions>
|
||||
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|
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|
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|
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|
||||
<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
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|
||||
<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
</extensions>
|
||||
</storageModule>
|
||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
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<builder buildPath="${workspace_loc:/FreeRTOSDemo}/Debug" id="com.crt.advproject.builder.exe.debug.1032196782" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" superClass="com.crt.advproject.builder.exe.debug"/>
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|
||||
<TargetConfig>
|
||||
<Properties property_3="NXP" property_4="LPC55S69" property_count="5" version="100300"/>
|
||||
<infoList vendor="NXP">
|
||||
<info chip="LPC55S69" name="LPC55S69">
|
||||
<chip>
|
||||
<name>LPC55S69</name>
|
||||
<family>LPC55S6x</family>
|
||||
<vendor>NXP</vendor>
|
||||
<memory can_program="true" id="Flash" is_ro="true" size="630" type="Flash"/>
|
||||
<memory id="RAM" size="304" type="RAM"/>
|
||||
<memoryInstance derived_from="Flash" driver="LPC55xx_S.cfx" edited="true" id="PROGRAM_FLASH" location="0x10000000" size="0xfe00"/>
|
||||
<memoryInstance derived_from="Flash" edited="true" id="SG_veneer_table" location="0x1000fe00" size="0x200"/>
|
||||
<memoryInstance derived_from="RAM" edited="true" id="Ram0" location="0x30000000" size="0x8000"/>
|
||||
</chip>
|
||||
<processor>
|
||||
<name gcc_name="cortex-m33">Cortex-M33</name>
|
||||
<family>Cortex-M</family>
|
||||
</processor>
|
||||
<processor>
|
||||
<name gcc_name="cortex-m33-nodsp">Cortex-M33 (No DSP)</name>
|
||||
<family>Cortex-M</family>
|
||||
</processor>
|
||||
</info>
|
||||
</infoList>
|
||||
</TargetConfig></projectStorage>
|
||||
</storageModule>
|
||||
<storageModule moduleId="refreshScope" versionNumber="2">
|
||||
<configuration configurationName="Debug">
|
||||
<resource resourceType="PROJECT" workspacePath="/FreeRTOSDemo"/>
|
||||
</configuration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
|
||||
</cproject>
|
||||
|
|
@ -0,0 +1,221 @@
|
|||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<projectDescription>
|
||||
<name>FreeRTOSDemo</name>
|
||||
<comment></comment>
|
||||
<projects>
|
||||
</projects>
|
||||
<buildSpec>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.xtext.ui.shared.xtextBuilder</name>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
|
||||
<triggers>clean,full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
|
||||
<triggers>full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
</buildSpec>
|
||||
<natures>
|
||||
<nature>org.eclipse.cdt.core.cnature</nature>
|
||||
<nature>com.nxp.mcuxpresso.core.datamodels.sdkNature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
|
||||
<nature>org.eclipse.xtext.ui.shared.xtextNature</nature>
|
||||
</natures>
|
||||
<linkedResources>
|
||||
<link>
|
||||
<name>Demos</name>
|
||||
<type>2</type>
|
||||
<locationURI>DEMO_ROOT/Demo/Common/ARMv8M</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>FreeRTOS</name>
|
||||
<type>2</type>
|
||||
<locationURI>DEMO_ROOT/Source</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>NXP_Code</name>
|
||||
<type>2</type>
|
||||
<locationURI>DEMO_ROOT/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>RegTests</name>
|
||||
<type>2</type>
|
||||
<locationURI>DEMO_ROOT/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/RegTests</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>User</name>
|
||||
<type>2</type>
|
||||
<locationURI>DEMO_ROOT/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/User</locationURI>
|
||||
</link>
|
||||
</linkedResources>
|
||||
<filteredResources>
|
||||
<filter>
|
||||
<id>1682482851771</id>
|
||||
<name></name>
|
||||
<type>6</type>
|
||||
<matcher>
|
||||
<id>org.eclipse.ui.ide.multiFilter</id>
|
||||
<arguments>1.0-name-matches-false-false-*.c</arguments>
|
||||
</matcher>
|
||||
</filter>
|
||||
<filter>
|
||||
<id>1682482851799</id>
|
||||
<name></name>
|
||||
<type>6</type>
|
||||
<matcher>
|
||||
<id>org.eclipse.ui.ide.multiFilter</id>
|
||||
<arguments>1.0-name-matches-false-false-*.h</arguments>
|
||||
</matcher>
|
||||
</filter>
|
||||
<filter>
|
||||
<id>1682482260140</id>
|
||||
<name>Demos</name>
|
||||
<type>9</type>
|
||||
<matcher>
|
||||
<id>org.eclipse.ui.ide.multiFilter</id>
|
||||
<arguments>1.0-name-matches-false-false-mpu_demo</arguments>
|
||||
</matcher>
|
||||
</filter>
|
||||
<filter>
|
||||
<id>1682482260166</id>
|
||||
<name>Demos</name>
|
||||
<type>9</type>
|
||||
<matcher>
|
||||
<id>org.eclipse.ui.ide.multiFilter</id>
|
||||
<arguments>1.0-name-matches-false-false-reg_tests</arguments>
|
||||
</matcher>
|
||||
</filter>
|
||||
<filter>
|
||||
<id>1682480839426</id>
|
||||
<name>FreeRTOS</name>
|
||||
<type>5</type>
|
||||
<matcher>
|
||||
<id>org.eclipse.ui.ide.multiFilter</id>
|
||||
<arguments>1.0-name-matches-false-false-*.c</arguments>
|
||||
</matcher>
|
||||
</filter>
|
||||
<filter>
|
||||
<id>1682481066220</id>
|
||||
<name>NXP_Code</name>
|
||||
<type>10</type>
|
||||
<matcher>
|
||||
<id>org.eclipse.ui.ide.multiFilter</id>
|
||||
<arguments>1.0-name-matches-false-false-trustzone</arguments>
|
||||
</matcher>
|
||||
</filter>
|
||||
<filter>
|
||||
<id>1682482630619</id>
|
||||
<name>User</name>
|
||||
<type>9</type>
|
||||
<matcher>
|
||||
<id>org.eclipse.ui.ide.multiFilter</id>
|
||||
<arguments>1.0-name-matches-false-false-NTZ</arguments>
|
||||
</matcher>
|
||||
</filter>
|
||||
<filter>
|
||||
<id>1682480749369</id>
|
||||
<name>Demos/reg_tests</name>
|
||||
<type>9</type>
|
||||
<matcher>
|
||||
<id>org.eclipse.ui.ide.multiFilter</id>
|
||||
<arguments>1.0-name-matches-false-false-GCC</arguments>
|
||||
</matcher>
|
||||
</filter>
|
||||
<filter>
|
||||
<id>1682480920354</id>
|
||||
<name>FreeRTOS/portable</name>
|
||||
<type>9</type>
|
||||
<matcher>
|
||||
<id>org.eclipse.ui.ide.multiFilter</id>
|
||||
<arguments>1.0-name-matches-false-false-GCC</arguments>
|
||||
</matcher>
|
||||
</filter>
|
||||
<filter>
|
||||
<id>1682480920361</id>
|
||||
<name>FreeRTOS/portable</name>
|
||||
<type>9</type>
|
||||
<matcher>
|
||||
<id>org.eclipse.ui.ide.multiFilter</id>
|
||||
<arguments>1.0-name-matches-false-false-Common</arguments>
|
||||
</matcher>
|
||||
</filter>
|
||||
<filter>
|
||||
<id>1682480920367</id>
|
||||
<name>FreeRTOS/portable</name>
|
||||
<type>9</type>
|
||||
<matcher>
|
||||
<id>org.eclipse.ui.ide.multiFilter</id>
|
||||
<arguments>1.0-name-matches-false-false-MemMang</arguments>
|
||||
</matcher>
|
||||
</filter>
|
||||
<filter>
|
||||
<id>1682480920376</id>
|
||||
<name>FreeRTOS/portable</name>
|
||||
<type>6</type>
|
||||
<matcher>
|
||||
<id>org.eclipse.ui.ide.multiFilter</id>
|
||||
<arguments>1.0-name-matches-false-false-*</arguments>
|
||||
</matcher>
|
||||
</filter>
|
||||
<filter>
|
||||
<id>1682481041325</id>
|
||||
<name>NXP_Code/startup</name>
|
||||
<type>6</type>
|
||||
<matcher>
|
||||
<id>org.eclipse.ui.ide.multiFilter</id>
|
||||
<arguments>1.0-name-matches-false-false-startup_LPC55S69_cm33_core0.s</arguments>
|
||||
</matcher>
|
||||
</filter>
|
||||
<filter>
|
||||
<id>1682480771819</id>
|
||||
<name>Demos/reg_tests/GCC</name>
|
||||
<type>9</type>
|
||||
<matcher>
|
||||
<id>org.eclipse.ui.ide.multiFilter</id>
|
||||
<arguments>1.0-name-matches-false-false-ARM_CM33</arguments>
|
||||
</matcher>
|
||||
</filter>
|
||||
<filter>
|
||||
<id>1682480969004</id>
|
||||
<name>FreeRTOS/portable/GCC</name>
|
||||
<type>9</type>
|
||||
<matcher>
|
||||
<id>org.eclipse.ui.ide.multiFilter</id>
|
||||
<arguments>1.0-name-matches-false-false-ARM_CM33_NTZ</arguments>
|
||||
</matcher>
|
||||
</filter>
|
||||
<filter>
|
||||
<id>1682480942703</id>
|
||||
<name>FreeRTOS/portable/MemMang</name>
|
||||
<type>5</type>
|
||||
<matcher>
|
||||
<id>org.eclipse.ui.ide.multiFilter</id>
|
||||
<arguments>1.0-name-matches-false-false-heap_4.c</arguments>
|
||||
</matcher>
|
||||
</filter>
|
||||
<filter>
|
||||
<id>1682480795341</id>
|
||||
<name>Demos/reg_tests/GCC/ARM_CM33</name>
|
||||
<type>9</type>
|
||||
<matcher>
|
||||
<id>org.eclipse.ui.ide.multiFilter</id>
|
||||
<arguments>1.0-name-matches-false-false-non_secure</arguments>
|
||||
</matcher>
|
||||
</filter>
|
||||
</filteredResources>
|
||||
<variableList>
|
||||
<variable>
|
||||
<name>DEMO_ROOT</name>
|
||||
<value>$%7BPARENT-4-PROJECT_LOC%7D</value>
|
||||
</variable>
|
||||
</variableList>
|
||||
</projectDescription>
|
||||
|
|
@ -0,0 +1,2 @@
|
|||
eclipse.preferences.version=1
|
||||
encoding/<project>=UTF-8
|
||||
|
|
@ -0,0 +1,168 @@
|
|||
/*
|
||||
* FreeRTOS V202212.00
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
/******************************************************************************
|
||||
See http://www.freertos.org/a00110.html for an explanation of the
|
||||
definitions contained in this file.
|
||||
******************************************************************************/
|
||||
|
||||
#ifndef FREERTOS_CONFIG_H
|
||||
#define FREERTOS_CONFIG_H
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Application specific definitions.
|
||||
*
|
||||
* These definitions should be adjusted for your particular hardware and
|
||||
* application requirements.
|
||||
*
|
||||
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
|
||||
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
|
||||
* https://www.FreeRTOS.org/a00110.html
|
||||
*----------------------------------------------------------*/
|
||||
|
||||
#include "clock_config.h"
|
||||
|
||||
/* Cortex M33 port configuration. */
|
||||
#define configENABLE_MPU 1
|
||||
#define configENABLE_FPU 1
|
||||
#define configENABLE_TRUSTZONE 0
|
||||
#define configRUN_FREERTOS_SECURE_ONLY 1
|
||||
|
||||
/* Constants related to the behaviour or the scheduler. */
|
||||
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
|
||||
#define configUSE_PREEMPTION 1
|
||||
#define configUSE_TIME_SLICING 1
|
||||
#define configMAX_PRIORITIES ( 5 )
|
||||
#define configIDLE_SHOULD_YIELD 1
|
||||
#define configUSE_16_BIT_TICKS 0 /* Only for 8 and 16-bit hardware. */
|
||||
|
||||
/* Constants that describe the hardware and memory usage. */
|
||||
#define configCPU_CLOCK_HZ BOARD_BOOTCLOCKFROHF96M_CORE_CLOCK
|
||||
#define configMINIMAL_STACK_SIZE ( ( uint16_t ) 128 )
|
||||
#define configMINIMAL_SECURE_STACK_SIZE ( 1024 )
|
||||
#define configMAX_TASK_NAME_LEN ( 12 )
|
||||
#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 50 * 1024 ) )
|
||||
|
||||
/* Constants that build features in or out. */
|
||||
#define configUSE_MUTEXES 1
|
||||
#define configUSE_TICKLESS_IDLE 1
|
||||
#define configUSE_APPLICATION_TASK_TAG 0
|
||||
#define configUSE_NEWLIB_REENTRANT 0
|
||||
#define configUSE_COUNTING_SEMAPHORES 1
|
||||
#define configUSE_RECURSIVE_MUTEXES 1
|
||||
#define configUSE_QUEUE_SETS 0
|
||||
#define configUSE_TASK_NOTIFICATIONS 1
|
||||
#define configUSE_TRACE_FACILITY 1
|
||||
|
||||
/* Constants that define which hook (callback) functions should be used. */
|
||||
#define configUSE_IDLE_HOOK 0
|
||||
#define configUSE_TICK_HOOK 0
|
||||
#define configUSE_MALLOC_FAILED_HOOK 0
|
||||
|
||||
/* Constants provided for debugging and optimisation assistance. */
|
||||
#define configCHECK_FOR_STACK_OVERFLOW 2
|
||||
#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
|
||||
#define configQUEUE_REGISTRY_SIZE 0
|
||||
|
||||
/* Software timer definitions. */
|
||||
#define configUSE_TIMERS 1
|
||||
#define configTIMER_TASK_PRIORITY ( 3 )
|
||||
#define configTIMER_QUEUE_LENGTH 5
|
||||
#define configTIMER_TASK_STACK_DEPTH ( configMINIMAL_STACK_SIZE )
|
||||
|
||||
/* Set the following definitions to 1 to include the API function, or zero
|
||||
* to exclude the API function. NOTE: Setting an INCLUDE_ parameter to 0 is
|
||||
* only necessary if the linker does not automatically remove functions that are
|
||||
* not referenced anyway. */
|
||||
#define INCLUDE_vTaskPrioritySet 1
|
||||
#define INCLUDE_uxTaskPriorityGet 1
|
||||
#define INCLUDE_vTaskDelete 1
|
||||
#define INCLUDE_vTaskCleanUpResources 0
|
||||
#define INCLUDE_vTaskSuspend 1
|
||||
#define INCLUDE_vTaskDelayUntil 1
|
||||
#define INCLUDE_vTaskDelay 1
|
||||
#define INCLUDE_uxTaskGetStackHighWaterMark 0
|
||||
#define INCLUDE_xTaskGetIdleTaskHandle 0
|
||||
#define INCLUDE_eTaskGetState 1
|
||||
#define INCLUDE_xTaskResumeFromISR 0
|
||||
#define INCLUDE_xTaskGetCurrentTaskHandle 1
|
||||
#define INCLUDE_xTaskGetSchedulerState 0
|
||||
#define INCLUDE_xSemaphoreGetMutexHolder 0
|
||||
#define INCLUDE_xTimerPendFunctionCall 1
|
||||
|
||||
/* This demo makes use of one or more example stats formatting functions. These
|
||||
* format the raw data provided by the uxTaskGetSystemState() function in to
|
||||
* human readable ASCII form. See the notes in the implementation of vTaskList()
|
||||
* within FreeRTOS/Source/tasks.c for limitations. */
|
||||
#define configUSE_STATS_FORMATTING_FUNCTIONS 1
|
||||
|
||||
/* Dimensions a buffer that can be used by the FreeRTOS+CLI command interpreter.
|
||||
* See the FreeRTOS+CLI documentation for more information:
|
||||
* https://www.FreeRTOS.org/FreeRTOS-Plus/FreeRTOS_Plus_CLI/ */
|
||||
#define configCOMMAND_INT_MAX_OUTPUT_SIZE 2048
|
||||
|
||||
/* Interrupt priority configuration follows...................... */
|
||||
|
||||
/* Use the system definition, if there is one. */
|
||||
#ifdef __NVIC_PRIO_BITS
|
||||
#define configPRIO_BITS __NVIC_PRIO_BITS
|
||||
#else
|
||||
#define configPRIO_BITS 3 /* 8 priority levels. */
|
||||
#endif
|
||||
|
||||
/* The lowest interrupt priority that can be used in a call to a "set priority"
|
||||
* function. */
|
||||
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 0x07
|
||||
|
||||
/* The highest interrupt priority that can be used by any interrupt service
|
||||
* routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT
|
||||
* CALL INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A
|
||||
* HIGHER PRIORITY THAN THIS! (higher priorities are lower numeric values). */
|
||||
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
|
||||
|
||||
/* Interrupt priorities used by the kernel port layer itself. These are generic
|
||||
* to all Cortex-M ports, and do not rely on any particular library functions. */
|
||||
#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << ( 8 - configPRIO_BITS ) )
|
||||
|
||||
/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
|
||||
* See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
|
||||
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << ( 8 - configPRIO_BITS ) )
|
||||
|
||||
/* The #ifdef guards against the file being included from IAR assembly files. */
|
||||
#ifndef __IASMARM__
|
||||
|
||||
/* Constants related to the generation of run time stats. */
|
||||
#define configGENERATE_RUN_TIME_STATS 0
|
||||
#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS()
|
||||
#define portGET_RUN_TIME_COUNTER_VALUE() 0
|
||||
#define configTICK_RATE_HZ ( ( TickType_t ) 100 )
|
||||
|
||||
#endif /* __IASMARM__ */
|
||||
|
||||
/* Enable static allocation. */
|
||||
#define configSUPPORT_STATIC_ALLOCATION 1
|
||||
|
||||
#endif /* FREERTOS_CONFIG_H */
|
||||
|
|
@ -0,0 +1,50 @@
|
|||
/*
|
||||
* FreeRTOS V202212.00
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief The mem fault handler.
|
||||
*
|
||||
* It calls a function called vHandleMemoryFault.
|
||||
*/
|
||||
void MemManage_Handler( void ) __attribute__ ( ( naked ) );
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void MemManage_Handler( void ) /* __attribute__ ( ( naked ) ) */
|
||||
{
|
||||
__asm volatile
|
||||
(
|
||||
" tst lr, #4 \n"
|
||||
" ite eq \n"
|
||||
" mrseq r0, msp \n"
|
||||
" mrsne r0, psp \n"
|
||||
" ldr r1, handler_address_const \n"
|
||||
" bx r1 \n"
|
||||
" \n"
|
||||
" .align 4 \n"
|
||||
" handler_address_const: .word vHandleMemoryFault \n"
|
||||
);
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
|
@ -0,0 +1,213 @@
|
|||
GROUP (
|
||||
"libgcc.a"
|
||||
"libc_nano.a"
|
||||
"libm.a"
|
||||
"libcr_newlib_semihost.a"
|
||||
)
|
||||
|
||||
MEMORY
|
||||
{
|
||||
/* Define each memory region. */
|
||||
PROGRAM_FLASH (rx) : ORIGIN = 0x10000000, LENGTH = 0x82000
|
||||
Ram0 (rwx) : ORIGIN = 0x30000000, LENGTH = 0x33000
|
||||
}
|
||||
|
||||
/* Define a symbol for the top of each memory region. */
|
||||
__base_PROGRAM_FLASH = 0x10000000; /* PROGRAM_FLASH. */
|
||||
__base_Flash = 0x10000000; /* Flash. */
|
||||
__top_PROGRAM_FLASH = 0x10000000 + 0x82000;
|
||||
__top_Flash = 0x10000000 + 0x82000;
|
||||
|
||||
__base_Ram0 = 0x30000000; /* Ram0. */
|
||||
__base_RAM = 0x30000000; /* RAM. */
|
||||
__top_Ram0 = 0x30000000 + 0x33000;
|
||||
__top_RAM = 0x30000000 + 0x33000;
|
||||
|
||||
/* Entry point. */
|
||||
ENTRY(ResetISR)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
/* Vector Table Section. */
|
||||
.text : ALIGN(4)
|
||||
{
|
||||
FILL(0xff)
|
||||
__vectors_start__ = ABSOLUTE(.);
|
||||
KEEP(*(.isr_vector))
|
||||
|
||||
/* Global Section Table. */
|
||||
. = ALIGN(4);
|
||||
__section_table_start = .;
|
||||
|
||||
__data_section_table = .;
|
||||
LONG(LOADADDR(.data));
|
||||
LONG( ADDR(.data));
|
||||
LONG( SIZEOF(.data));
|
||||
__data_section_table_end = .;
|
||||
|
||||
__bss_section_table = .;
|
||||
LONG( ADDR(.bss));
|
||||
LONG( SIZEOF(.bss));
|
||||
__bss_section_table_end = .;
|
||||
|
||||
__section_table_end = .;
|
||||
/* End of Global Section Table. */
|
||||
|
||||
*(.after_vectors*)
|
||||
} > PROGRAM_FLASH
|
||||
|
||||
/* Privileged functions - Section needs to be 32 byte aligned to satisfy MPU requirements. */
|
||||
.privileged_functions : ALIGN(32)
|
||||
{
|
||||
. = ALIGN(32);
|
||||
__privileged_functions_start__ = .;
|
||||
*(privileged_functions)
|
||||
. = ALIGN(32);
|
||||
/* End address must be the last address in the region, therefore, -1. */
|
||||
__privileged_functions_end__ = . - 1;
|
||||
} > PROGRAM_FLASH
|
||||
|
||||
/* FreeRTOS System calls - Section needs to be 32 byte aligned to satisfy MPU requirements. */
|
||||
.freertos_system_calls : ALIGN(32)
|
||||
{
|
||||
. = ALIGN(32);
|
||||
__syscalls_flash_start__ = .;
|
||||
*(freertos_system_calls)
|
||||
. = ALIGN(32);
|
||||
/* End address must be the last address in the region, therefore, -1. */
|
||||
__syscalls_flash_end__ = . - 1;
|
||||
} > PROGRAM_FLASH
|
||||
|
||||
/* Main Text Section - Section needs to be 32 byte aligned to satisfy MPU requirements. */
|
||||
.text : ALIGN(32)
|
||||
{
|
||||
. = ALIGN(32);
|
||||
__unprivileged_flash_start__ = .;
|
||||
*(.text*)
|
||||
*(.rodata .rodata.* .constdata .constdata.*)
|
||||
. = ALIGN(32);
|
||||
/* End address must be the last address in the region, therefore, -1. */
|
||||
__unprivileged_flash_end__ = . - 1;
|
||||
} > PROGRAM_FLASH
|
||||
|
||||
/* For exception handling/unwind - some Newlib functions (in common
|
||||
* with C++ and StdC++) use this. */
|
||||
.ARM.extab : ALIGN(4)
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > PROGRAM_FLASH
|
||||
|
||||
.ARM.exidx : ALIGN(4)
|
||||
{
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
__exidx_end = .;
|
||||
} > PROGRAM_FLASH
|
||||
|
||||
/* Text Section End. */
|
||||
_etext = .;
|
||||
|
||||
/* Uninit Reserved Section. */
|
||||
.uninit_RESERVED : ALIGN(4)
|
||||
{
|
||||
KEEP(*(.bss.$RESERVED*))
|
||||
. = ALIGN(4);
|
||||
_end_uninit_RESERVED = .;
|
||||
} > Ram0
|
||||
|
||||
/* Main Data section (Ram0). */
|
||||
.data : ALIGN(4)
|
||||
{
|
||||
FILL(0xff)
|
||||
_data = .;
|
||||
PROVIDE(__start_data_RAM = .);
|
||||
PROVIDE(__start_data_Ram0 = .);
|
||||
|
||||
/* Privileged data - It needs to be 32 byte aligned to satisfy MPU requirements. */
|
||||
. = ALIGN(32);
|
||||
__privileged_sram_start__ = .;
|
||||
*(privileged_data)
|
||||
. = ALIGN(32);
|
||||
/* End address must be the last address in the region, therefore, -1. */
|
||||
__privileged_sram_end__ = . - 1;
|
||||
|
||||
*(vtable)
|
||||
*(.ramfunc*)
|
||||
*(.data*)
|
||||
_edata = .;
|
||||
PROVIDE(__end_data_RAM = .);
|
||||
PROVIDE(__end_data_Ram0 = .);
|
||||
} > Ram0 AT>PROGRAM_FLASH
|
||||
|
||||
/* Main BSS Section. */
|
||||
.bss : ALIGN(4)
|
||||
{
|
||||
_bss = .;
|
||||
PROVIDE(__start_bss_RAM = .);
|
||||
PROVIDE(__start_bss_Ram0 = .);
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
_ebss = .;
|
||||
PROVIDE(__end_bss_RAM = .);
|
||||
PROVIDE(__end_bss_Ram0 = .);
|
||||
PROVIDE(end = .);
|
||||
} > Ram0 AT>Ram0
|
||||
|
||||
/* Default Noinit Section. */
|
||||
.noinit (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
_noinit = .;
|
||||
PROVIDE(__start_noinit_RAM = .);
|
||||
PROVIDE(__start_noinit_Ram0 = .);
|
||||
*(.noinit*)
|
||||
. = ALIGN(4);
|
||||
_end_noinit = .;
|
||||
PROVIDE(__end_noinit_RAM = .);
|
||||
PROVIDE(__end_noinit_Ram0 = .);
|
||||
} > Ram0 AT>Ram0
|
||||
|
||||
/* Reserve space and place heap in memory map. */
|
||||
_HeapSize = 0x1000;
|
||||
.heap : ALIGN(4)
|
||||
{
|
||||
_pvHeapStart = .;
|
||||
. += _HeapSize;
|
||||
. = ALIGN(4);
|
||||
_pvHeapLimit = .;
|
||||
} > Ram0
|
||||
|
||||
/* Reserve space for stack in memory. */
|
||||
_StackSize = 0x1000;
|
||||
.heap2stackfill :
|
||||
{
|
||||
. += _StackSize;
|
||||
} > Ram0
|
||||
|
||||
/* Place actual stack in memory map. */
|
||||
.stack ORIGIN(Ram0) + LENGTH(Ram0) - _StackSize - 0 : ALIGN(4)
|
||||
{
|
||||
_vStackBase = .;
|
||||
. = ALIGN(4);
|
||||
_vStackTop = . + _StackSize;
|
||||
} > Ram0
|
||||
|
||||
/* Create checksum value (used in startup). */
|
||||
PROVIDE(__valid_user_code_checksum = 0 -
|
||||
(_vStackTop
|
||||
+ (ResetISR + 1)
|
||||
+ (NMI_Handler + 1)
|
||||
+ (HardFault_Handler + 1)
|
||||
+ (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1) /* MemManage_Handler may not be defined. */
|
||||
+ (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1) /* BusFault_Handler may not be defined. */
|
||||
+ (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined. */
|
||||
) );
|
||||
|
||||
/* Provide basic symbols giving location and size of main text block,
|
||||
* including initial values of RW data sections. Note that these will need
|
||||
* extending to give a complete picture with complex images
|
||||
* (e.g multiple Flash banks). */
|
||||
_image_start = LOADADDR(.text);
|
||||
_image_end = LOADADDR(.data) + SIZEOF(.data);
|
||||
_image_size = _image_end - _image_start;
|
||||
}
|
||||
|
|
@ -31,10 +31,13 @@
|
|||
/* Reg test includes. */
|
||||
#include "reg_tests.h"
|
||||
#include "reg_test_asm.h"
|
||||
#include "secure_reg_test_asm.h"
|
||||
|
||||
/* Printf includes. */
|
||||
#include "nsc_printf.h"
|
||||
#if( configENABLE_TRUSTZONE == 1 )
|
||||
#include "secure_reg_test_asm.h"
|
||||
#include "nsc_printf.h"
|
||||
#else
|
||||
#include "fsl_debug_console.h"
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Functions that implement reg test tasks.
|
||||
|
|
@ -43,8 +46,11 @@ static void prvRegTest1_Task( void * pvParameters );
|
|||
static void prvRegTest2_Task( void * pvParameters );
|
||||
static void prvRegTest3_Task( void * pvParameters );
|
||||
static void prvRegTest4_Task( void * pvParameters );
|
||||
static void prvRegTest_Secure_Task( void * pvParameters );
|
||||
static void prvRegTest_NonSecureCallback_Task( void * pvParameters );
|
||||
#if( configENABLE_TRUSTZONE == 1 )
|
||||
static void prvRegTest_Secure_Task( void * pvParameters );
|
||||
static void prvRegTest_NonSecureCallback_Task( void * pvParameters );
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Check task periodically checks that reg tests tasks
|
||||
* are running fine.
|
||||
|
|
@ -82,8 +88,10 @@ static void prvCheckTask( void * pvParameters );
|
|||
*/
|
||||
volatile unsigned long ulRegTest1LoopCounter = 0UL, ulRegTest2LoopCounter = 0UL;
|
||||
volatile unsigned long ulRegTest3LoopCounter = 0UL, ulRegTest4LoopCounter = 0UL;
|
||||
volatile unsigned long ulRegTestSecureLoopCounter = 0UL;
|
||||
volatile unsigned long ulRegTestNonSecureCallbackLoopCounter = 0UL;
|
||||
#if( configENABLE_TRUSTZONE == 1 )
|
||||
volatile unsigned long ulRegTestSecureLoopCounter = 0UL;
|
||||
volatile unsigned long ulRegTestNonSecureCallbackLoopCounter = 0UL;
|
||||
#endif
|
||||
|
||||
/**
|
||||
* Counter to keep a count of how may times the check task loop has detected
|
||||
|
|
@ -98,9 +106,11 @@ static StackType_t xRegTest1TaskStack[ configMINIMAL_STACK_SIZE ] __attribute__(
|
|||
static StackType_t xRegTest2TaskStack[ configMINIMAL_STACK_SIZE ] __attribute__( ( aligned( 32 ) ) );
|
||||
static StackType_t xRegTest3TaskStack[ configMINIMAL_STACK_SIZE ] __attribute__( ( aligned( 32 ) ) );
|
||||
static StackType_t xRegTest4TaskStack[ configMINIMAL_STACK_SIZE ] __attribute__( ( aligned( 32 ) ) );
|
||||
static StackType_t xRegTestSecureTaskStack[ configMINIMAL_STACK_SIZE ] __attribute__( ( aligned( 32 ) ) );
|
||||
static StackType_t xRegTestNonSecureCallbackTaskStack[ configMINIMAL_STACK_SIZE ] __attribute__( ( aligned( 32 ) ) );
|
||||
static StackType_t xCheckTaskStack[ configMINIMAL_STACK_SIZE ] __attribute__( ( aligned( 32 ) ) );
|
||||
#if( configENABLE_TRUSTZONE == 1 )
|
||||
static StackType_t xRegTestSecureTaskStack[ configMINIMAL_STACK_SIZE ] __attribute__( ( aligned( 32 ) ) );
|
||||
static StackType_t xRegTestNonSecureCallbackTaskStack[ configMINIMAL_STACK_SIZE ] __attribute__( ( aligned( 32 ) ) );
|
||||
#endif
|
||||
|
||||
TaskParameters_t xRegTest1TaskParameters =
|
||||
{
|
||||
|
|
@ -158,35 +168,6 @@ TaskParameters_t xRegTest4TaskParameters =
|
|||
{ 0, 0, 0 }
|
||||
}
|
||||
};
|
||||
TaskParameters_t xRegTestSecureTaskParameters =
|
||||
{
|
||||
.pvTaskCode = prvRegTest_Secure_Task,
|
||||
.pcName = "RegTestSecure",
|
||||
.usStackDepth = configMINIMAL_STACK_SIZE,
|
||||
.pvParameters = REG_TEST_SECURE_TASK_PARAMETER,
|
||||
.uxPriority = tskIDLE_PRIORITY | portPRIVILEGE_BIT,
|
||||
.puxStackBuffer = xRegTestSecureTaskStack,
|
||||
.xRegions = {
|
||||
{ 0, 0, 0 },
|
||||
{ 0, 0, 0 },
|
||||
{ 0, 0, 0 }
|
||||
}
|
||||
};
|
||||
TaskParameters_t xRegTestNonSecureCallbackTaskParameters =
|
||||
{
|
||||
.pvTaskCode = prvRegTest_NonSecureCallback_Task,
|
||||
.pcName = "RegTestNonSecureCallback",
|
||||
.usStackDepth = configMINIMAL_STACK_SIZE,
|
||||
.pvParameters = REG_TEST_NON_SECURE_CALLBACK_TASK_PARAMETER,
|
||||
.uxPriority = tskIDLE_PRIORITY | portPRIVILEGE_BIT,
|
||||
.puxStackBuffer = xRegTestNonSecureCallbackTaskStack,
|
||||
.xRegions = {
|
||||
{ 0, 0, 0 },
|
||||
{ 0, 0, 0 },
|
||||
{ 0, 0, 0 }
|
||||
}
|
||||
};
|
||||
|
||||
TaskParameters_t xCheckTaskParameters =
|
||||
{
|
||||
.pvTaskCode = prvCheckTask,
|
||||
|
|
@ -202,13 +183,49 @@ TaskParameters_t xCheckTaskParameters =
|
|||
}
|
||||
};
|
||||
|
||||
#if( configENABLE_TRUSTZONE == 1 )
|
||||
|
||||
TaskParameters_t xRegTestSecureTaskParameters =
|
||||
{
|
||||
.pvTaskCode = prvRegTest_Secure_Task,
|
||||
.pcName = "RegTestSecure",
|
||||
.usStackDepth = configMINIMAL_STACK_SIZE,
|
||||
.pvParameters = REG_TEST_SECURE_TASK_PARAMETER,
|
||||
.uxPriority = tskIDLE_PRIORITY | portPRIVILEGE_BIT,
|
||||
.puxStackBuffer = xRegTestSecureTaskStack,
|
||||
.xRegions = {
|
||||
{ 0, 0, 0 },
|
||||
{ 0, 0, 0 },
|
||||
{ 0, 0, 0 }
|
||||
}
|
||||
};
|
||||
TaskParameters_t xRegTestNonSecureCallbackTaskParameters =
|
||||
{
|
||||
.pvTaskCode = prvRegTest_NonSecureCallback_Task,
|
||||
.pcName = "RegTestNonSecureCallback",
|
||||
.usStackDepth = configMINIMAL_STACK_SIZE,
|
||||
.pvParameters = REG_TEST_NON_SECURE_CALLBACK_TASK_PARAMETER,
|
||||
.uxPriority = tskIDLE_PRIORITY | portPRIVILEGE_BIT,
|
||||
.puxStackBuffer = xRegTestNonSecureCallbackTaskStack,
|
||||
.xRegions = {
|
||||
{ 0, 0, 0 },
|
||||
{ 0, 0, 0 },
|
||||
{ 0, 0, 0 }
|
||||
}
|
||||
};
|
||||
|
||||
#endif /* configENABLE_TRUSTZONE */
|
||||
|
||||
xTaskCreateRestricted( &( xRegTest1TaskParameters ), NULL );
|
||||
xTaskCreateRestricted( &( xRegTest2TaskParameters ), NULL );
|
||||
xTaskCreateRestricted( &( xRegTest3TaskParameters ), NULL );
|
||||
xTaskCreateRestricted( &( xRegTest4TaskParameters ), NULL );
|
||||
xTaskCreateRestricted( &( xRegTestSecureTaskParameters ), NULL );
|
||||
xTaskCreateRestricted( &( xRegTestNonSecureCallbackTaskParameters ), NULL );
|
||||
xTaskCreateRestricted( &( xCheckTaskParameters ), NULL );
|
||||
#if( configENABLE_TRUSTZONE == 1 )
|
||||
xTaskCreateRestricted( &( xRegTestSecureTaskParameters ), NULL );
|
||||
xTaskCreateRestricted( &( xRegTestNonSecureCallbackTaskParameters ), NULL );
|
||||
#endif
|
||||
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
@ -288,6 +305,8 @@ static void prvRegTest4_Task( void * pvParameters )
|
|||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if( configENABLE_TRUSTZONE == 1 )
|
||||
|
||||
static void prvRegTest_Secure_Task( void * pvParameters )
|
||||
{
|
||||
/* This task is going to call secure side functions. */
|
||||
|
|
@ -318,8 +337,12 @@ static void prvRegTest_Secure_Task( void * pvParameters )
|
|||
* an error. */
|
||||
vTaskDelete( NULL );
|
||||
}
|
||||
|
||||
#endif /* configENABLE_TRUSTZONE */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if( configENABLE_TRUSTZONE == 1 )
|
||||
|
||||
static void prvRegTest_NonSecureCallback_Task( void * pvParameters )
|
||||
{
|
||||
/* This task is going to call secure side functions. */
|
||||
|
|
@ -351,6 +374,8 @@ static void prvRegTest_NonSecureCallback_Task( void * pvParameters )
|
|||
* an error. */
|
||||
vTaskDelete( NULL );
|
||||
}
|
||||
|
||||
#endif /* configENABLE_TRUSTZONE */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvCheckTask( void * pvParameters )
|
||||
|
|
@ -360,11 +385,14 @@ TickType_t xLastExecutionTime;
|
|||
unsigned long ulErrorFound = pdFALSE;
|
||||
static unsigned long ulLastRegTest1Value = 0, ulLastRegTest2Value = 0;
|
||||
static unsigned long ulLastRegTest3Value = 0, ulLastRegTest4Value = 0;
|
||||
static unsigned long ulLastRegTestSecureValue = 0, ulLastRegTestNonSecureCallbackValue = 0;
|
||||
|
||||
#if( configENABLE_TRUSTZONE == 1 )
|
||||
static unsigned long ulLastRegTestSecureValue = 0, ulLastRegTestNonSecureCallbackValue = 0;
|
||||
|
||||
/* This task is going to call secure side functions for
|
||||
* printing messages. */
|
||||
portALLOCATE_SECURE_CONTEXT( configMINIMAL_SECURE_STACK_SIZE );
|
||||
#endif
|
||||
|
||||
/* Just to stop compiler warnings. */
|
||||
( void ) pvParameters;
|
||||
|
|
@ -412,34 +440,46 @@ static unsigned long ulLastRegTestSecureValue = 0, ulLastRegTestNonSecureCallbac
|
|||
}
|
||||
ulLastRegTest4Value = ulRegTest4LoopCounter;
|
||||
|
||||
/* Check that the register test secure task is still running. */
|
||||
if( ulLastRegTestSecureValue == ulRegTestSecureLoopCounter )
|
||||
#if( configENABLE_TRUSTZONE == 1 )
|
||||
{
|
||||
ulErrorFound |= 1UL << 4UL;
|
||||
}
|
||||
ulLastRegTestSecureValue = ulRegTestSecureLoopCounter;
|
||||
/* Check that the register test secure task is still running. */
|
||||
if( ulLastRegTestSecureValue == ulRegTestSecureLoopCounter )
|
||||
{
|
||||
ulErrorFound |= 1UL << 4UL;
|
||||
}
|
||||
ulLastRegTestSecureValue = ulRegTestSecureLoopCounter;
|
||||
|
||||
/* Check that the register test non-secure callback task is
|
||||
* still running. */
|
||||
if( ulLastRegTestNonSecureCallbackValue == ulRegTestNonSecureCallbackLoopCounter )
|
||||
{
|
||||
ulErrorFound |= 1UL << 5UL;
|
||||
/* Check that the register test non-secure callback task is
|
||||
* still running. */
|
||||
if( ulLastRegTestNonSecureCallbackValue == ulRegTestNonSecureCallbackLoopCounter )
|
||||
{
|
||||
ulErrorFound |= 1UL << 5UL;
|
||||
}
|
||||
ulLastRegTestNonSecureCallbackValue = ulRegTestNonSecureCallbackLoopCounter;
|
||||
}
|
||||
ulLastRegTestNonSecureCallbackValue = ulRegTestNonSecureCallbackLoopCounter;
|
||||
#endif /* configENABLE_TRUSTZONE */
|
||||
|
||||
if( ulErrorFound != pdFALSE )
|
||||
{
|
||||
/* An error has been detected in one of the tasks. */
|
||||
xDelayPeriod = ERROR_CHECK_TASK_PERIOD;
|
||||
|
||||
NSC_Printf( "ERROR detected!\r\n" );
|
||||
#if( configENABLE_TRUSTZONE == 1 )
|
||||
NSC_Printf( "ERROR detected!\r\n" );
|
||||
#else
|
||||
PRINTF( "ERROR detected!\r\n" );
|
||||
#endif
|
||||
|
||||
/* Increment error detection count. */
|
||||
ulCheckTaskLoops++;
|
||||
}
|
||||
else
|
||||
{
|
||||
NSC_Printf( "No errors.\r\n" );
|
||||
#if( configENABLE_TRUSTZONE == 1 )
|
||||
NSC_Printf( "No errors.\r\n" );
|
||||
#else
|
||||
PRINTF( "No errors.\r\n" );
|
||||
#endif
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,161 @@
|
|||
/*
|
||||
* FreeRTOS V202212.00
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
/* FreeRTOS includes. */
|
||||
#include "FreeRTOS.h"
|
||||
#include "task.h"
|
||||
|
||||
/* Device includes. */
|
||||
#include "fsl_device_registers.h"
|
||||
#include "fsl_debug_console.h"
|
||||
#include "board.h"
|
||||
#include "pin_mux.h"
|
||||
#include "clock_config.h"
|
||||
#include "fsl_power.h"
|
||||
|
||||
/* Demo includes. */
|
||||
#include "mpu_demo.h"
|
||||
#include "reg_tests.h"
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Create all demo tasks.
|
||||
*/
|
||||
static void prvCreateTasks( void );
|
||||
|
||||
/**
|
||||
* @brief Setup hardware.
|
||||
*/
|
||||
static void prvSetupHardware( void );
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
int main(void)
|
||||
{
|
||||
/* Setup hardware. */
|
||||
prvSetupHardware();
|
||||
|
||||
/* Create tasks. */
|
||||
prvCreateTasks();
|
||||
|
||||
/* Start scheduler. */
|
||||
vTaskStartScheduler();
|
||||
|
||||
/* Will not get here if the scheduler starts successfully. If you do end up
|
||||
* here then there wasn't enough heap memory available to start either the idle
|
||||
* task or the timer/daemon task. https://www.freertos.org/a00111.html */
|
||||
for( ; ; )
|
||||
{
|
||||
/* Should not reach here. */
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvCreateTasks( void )
|
||||
{
|
||||
/* Create tasks for the MPU Demo. */
|
||||
vStartMPUDemo();
|
||||
|
||||
/* Create tasks for reg tests. */
|
||||
vStartRegTests();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvSetupHardware( void )
|
||||
{
|
||||
/* Set BOD VBAT level to 1.65V. */
|
||||
POWER_SetBodVbatLevel( kPOWER_BodVbatLevel1650mv, kPOWER_BodHystLevel50mv, false );
|
||||
|
||||
/* Attach main clock divide to FLEXCOMM0 (debug console). */
|
||||
CLOCK_AttachClk( BOARD_DEBUG_UART_CLK_ATTACH );
|
||||
|
||||
/* Init board hardware. */
|
||||
BOARD_InitPins();
|
||||
BOARD_BootClockFROHF96M();
|
||||
BOARD_InitDebugConsole();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Stack overflow hook. */
|
||||
void vApplicationStackOverflowHook( TaskHandle_t xTask, char *pcTaskName )
|
||||
{
|
||||
/* Force an assert. */
|
||||
configASSERT( pcTaskName == 0 );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* configUSE_STATIC_ALLOCATION is set to 1, so the application must provide an
|
||||
* implementation of vApplicationGetIdleTaskMemory() to provide the memory that
|
||||
* is used by the Idle task. */
|
||||
void vApplicationGetIdleTaskMemory( StaticTask_t ** ppxIdleTaskTCBBuffer,
|
||||
StackType_t ** ppxIdleTaskStackBuffer,
|
||||
uint32_t * pulIdleTaskStackSize )
|
||||
{
|
||||
/* If the buffers to be provided to the Idle task are declared inside this
|
||||
* function then they must be declared static - otherwise they will be
|
||||
* allocated on the stack and so not exists after this function exits. */
|
||||
static StaticTask_t xIdleTaskTCB;
|
||||
static StackType_t uxIdleTaskStack[ configMINIMAL_STACK_SIZE ] __attribute__( ( aligned( 32 ) ) );
|
||||
|
||||
/* Pass out a pointer to the StaticTask_t structure in which the Idle
|
||||
* task's state will be stored. */
|
||||
*ppxIdleTaskTCBBuffer = &xIdleTaskTCB;
|
||||
|
||||
/* Pass out the array that will be used as the Idle task's stack. */
|
||||
*ppxIdleTaskStackBuffer = uxIdleTaskStack;
|
||||
|
||||
/* Pass out the size of the array pointed to by *ppxIdleTaskStackBuffer.
|
||||
* Note that, as the array is necessarily of type StackType_t,
|
||||
* configMINIMAL_STACK_SIZE is specified in words, not bytes. */
|
||||
*pulIdleTaskStackSize = configMINIMAL_STACK_SIZE;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* configUSE_STATIC_ALLOCATION and configUSE_TIMERS are both set to 1, so the
|
||||
* application must provide an implementation of vApplicationGetTimerTaskMemory()
|
||||
* to provide the memory that is used by the Timer service task. */
|
||||
void vApplicationGetTimerTaskMemory( StaticTask_t ** ppxTimerTaskTCBBuffer,
|
||||
StackType_t ** ppxTimerTaskStackBuffer,
|
||||
uint32_t * pulTimerTaskStackSize )
|
||||
{
|
||||
/* If the buffers to be provided to the Timer task are declared inside this
|
||||
* function then they must be declared static - otherwise they will be
|
||||
* allocated on the stack and so not exists after this function exits. */
|
||||
static StaticTask_t xTimerTaskTCB;
|
||||
static StackType_t uxTimerTaskStack[ configTIMER_TASK_STACK_DEPTH ] __attribute__( ( aligned( 32 ) ) );
|
||||
|
||||
/* Pass out a pointer to the StaticTask_t structure in which the Timer
|
||||
* task's state will be stored. */
|
||||
*ppxTimerTaskTCBBuffer = &xTimerTaskTCB;
|
||||
|
||||
/* Pass out the array that will be used as the Timer task's stack. */
|
||||
*ppxTimerTaskStackBuffer = uxTimerTaskStack;
|
||||
|
||||
/* Pass out the size of the array pointed to by *ppxTimerTaskStackBuffer.
|
||||
* Note that, as the array is necessarily of type StackType_t,
|
||||
* configTIMER_TASK_STACK_DEPTH is specified in words, not bytes. */
|
||||
*pulTimerTaskStackSize = configTIMER_TASK_STACK_DEPTH;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
|
@ -0,0 +1,173 @@
|
|||
/*
|
||||
* FreeRTOS V202212.00
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
/* FreeRTOS include. */
|
||||
#include "FreeRTOS.h"
|
||||
#include "task.h"
|
||||
|
||||
/* Device includes. */
|
||||
#include "fsl_device_registers.h"
|
||||
#include "fsl_debug_console.h"
|
||||
#include "pin_mux.h"
|
||||
#include "board.h"
|
||||
#include "clock_config.h"
|
||||
#include "fsl_power.h"
|
||||
|
||||
/* Demo includes. */
|
||||
#include "tz_demo.h"
|
||||
#include "mpu_demo.h"
|
||||
#include "reg_tests.h"
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Create all demo tasks.
|
||||
*/
|
||||
static void prvCreateTasks( void );
|
||||
|
||||
/**
|
||||
* @brief Setup hardware.
|
||||
*/
|
||||
static void prvSetupHardware( void );
|
||||
|
||||
/**
|
||||
* @brief Application-specific implementation of the SystemInit() weak
|
||||
* function.
|
||||
*/
|
||||
void SystemInit( void );
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* For instructions on how to build and run this demo, visit the following link:
|
||||
* https://www.freertos.org/RTOS-Cortex-M33-LPC55S69-MCUXpresso-GCC.html
|
||||
*/
|
||||
|
||||
/* Non-Secure main. */
|
||||
int main( void )
|
||||
{
|
||||
/* Setup hardware. */
|
||||
prvSetupHardware();
|
||||
|
||||
/* Create tasks. */
|
||||
prvCreateTasks();
|
||||
|
||||
/* Start scheduler. */
|
||||
vTaskStartScheduler();
|
||||
|
||||
/* Will not get here if the scheduler starts successfully. If you do end up
|
||||
* here then there wasn't enough heap memory available to start either the idle
|
||||
* task or the timer/daemon task. https://www.freertos.org/a00111.html */
|
||||
for( ; ; )
|
||||
{
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvCreateTasks( void )
|
||||
{
|
||||
/* Create tasks for the MPU Demo. */
|
||||
vStartMPUDemo();
|
||||
|
||||
/* Create tasks for the TZ Demo. */
|
||||
vStartTZDemo();
|
||||
|
||||
/* Create tasks for reg tests. */
|
||||
vStartRegTests();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvSetupHardware( void )
|
||||
{
|
||||
/* Set BOD VBAT level to 1.65V. */
|
||||
POWER_SetBodVbatLevel( kPOWER_BodVbatLevel1650mv, kPOWER_BodHystLevel50mv, false );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void SystemInit( void )
|
||||
{
|
||||
/* Nothing needs to be initialized for Non-Secure project. */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Stack overflow hook. */
|
||||
void vApplicationStackOverflowHook( TaskHandle_t xTask, char *pcTaskName )
|
||||
{
|
||||
/* Force an assert. */
|
||||
configASSERT( pcTaskName == 0 );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* configUSE_STATIC_ALLOCATION is set to 1, so the application must provide an
|
||||
* implementation of vApplicationGetIdleTaskMemory() to provide the memory that
|
||||
* is used by the Idle task. */
|
||||
void vApplicationGetIdleTaskMemory( StaticTask_t ** ppxIdleTaskTCBBuffer,
|
||||
StackType_t ** ppxIdleTaskStackBuffer,
|
||||
uint32_t * pulIdleTaskStackSize )
|
||||
{
|
||||
/* If the buffers to be provided to the Idle task are declared inside this
|
||||
* function then they must be declared static - otherwise they will be
|
||||
* allocated on the stack and so not exists after this function exits. */
|
||||
static StaticTask_t xIdleTaskTCB;
|
||||
static StackType_t uxIdleTaskStack[ configMINIMAL_STACK_SIZE ] __attribute__( ( aligned( 32 ) ) );
|
||||
|
||||
/* Pass out a pointer to the StaticTask_t structure in which the Idle
|
||||
* task's state will be stored. */
|
||||
*ppxIdleTaskTCBBuffer = &xIdleTaskTCB;
|
||||
|
||||
/* Pass out the array that will be used as the Idle task's stack. */
|
||||
*ppxIdleTaskStackBuffer = uxIdleTaskStack;
|
||||
|
||||
/* Pass out the size of the array pointed to by *ppxIdleTaskStackBuffer.
|
||||
* Note that, as the array is necessarily of type StackType_t,
|
||||
* configMINIMAL_STACK_SIZE is specified in words, not bytes. */
|
||||
*pulIdleTaskStackSize = configMINIMAL_STACK_SIZE;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* configUSE_STATIC_ALLOCATION and configUSE_TIMERS are both set to 1, so the
|
||||
* application must provide an implementation of vApplicationGetTimerTaskMemory()
|
||||
* to provide the memory that is used by the Timer service task. */
|
||||
void vApplicationGetTimerTaskMemory( StaticTask_t ** ppxTimerTaskTCBBuffer,
|
||||
StackType_t ** ppxTimerTaskStackBuffer,
|
||||
uint32_t * pulTimerTaskStackSize )
|
||||
{
|
||||
/* If the buffers to be provided to the Timer task are declared inside this
|
||||
* function then they must be declared static - otherwise they will be
|
||||
* allocated on the stack and so not exists after this function exits. */
|
||||
static StaticTask_t xTimerTaskTCB;
|
||||
static StackType_t uxTimerTaskStack[ configTIMER_TASK_STACK_DEPTH ] __attribute__( ( aligned( 32 ) ) );
|
||||
|
||||
/* Pass out a pointer to the StaticTask_t structure in which the Timer
|
||||
* task's state will be stored. */
|
||||
*ppxTimerTaskTCBBuffer = &xTimerTaskTCB;
|
||||
|
||||
/* Pass out the array that will be used as the Timer task's stack. */
|
||||
*ppxTimerTaskStackBuffer = uxTimerTaskStack;
|
||||
|
||||
/* Pass out the size of the array pointed to by *ppxTimerTaskStackBuffer.
|
||||
* Note that, as the array is necessarily of type StackType_t,
|
||||
* configTIMER_TASK_STACK_DEPTH is specified in words, not bytes. */
|
||||
*pulTimerTaskStackSize = configTIMER_TASK_STACK_DEPTH;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
|
@ -1,131 +1,131 @@
|
|||
/*
|
||||
* FreeRTOS V202212.00
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
/* FreeRTOS includes. */
|
||||
#include "secure_port_macros.h"
|
||||
|
||||
/* Device includes. */
|
||||
#include "fsl_device_registers.h"
|
||||
#include "fsl_debug_console.h"
|
||||
#include "arm_cmse.h"
|
||||
#include "board.h"
|
||||
#include "tzm_config.h"
|
||||
#include "pin_mux.h"
|
||||
#include "clock_config.h"
|
||||
#include "fsl_power.h"
|
||||
|
||||
#if ( __ARM_FEATURE_CMSE & 1 ) == 0
|
||||
#error "Need ARMv8-M security extensions"
|
||||
#elif ( __ARM_FEATURE_CMSE & 2 ) == 0
|
||||
#error "Compile with --cmse"
|
||||
#endif
|
||||
|
||||
/* Start address of non-secure application. */
|
||||
#define mainNONSECURE_APP_START_ADDRESS ( 0x00010000UL )
|
||||
|
||||
/* typedef for non-secure Reset Handler. */
|
||||
typedef void ( *NonSecureResetHandler_t ) ( void ) __attribute__( ( cmse_nonsecure_call ) );
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Boots into the non-secure code.
|
||||
*
|
||||
* @param[in] ulNonSecureStartAddress Start address of the non-secure application.
|
||||
*/
|
||||
static void prvBootNonSecure( uint32_t ulNonSecureStartAddress );
|
||||
|
||||
/**
|
||||
* @brief Application-specific implementation of the SystemInitHook() weak
|
||||
* function.
|
||||
*/
|
||||
void SystemInitHook( void );
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* For instructions on how to build and run this demo, visit the following link:
|
||||
* https://www.freertos.org/RTOS-Cortex-M33-LPC55S69-MCUXpresso-GCC.html
|
||||
*/
|
||||
|
||||
/* Secure main(). */
|
||||
int main(void)
|
||||
{
|
||||
/* Set BOD VBAT level to 1.65V. */
|
||||
POWER_SetBodVbatLevel( kPOWER_BodVbatLevel1650mv, kPOWER_BodHystLevel50mv, false );
|
||||
|
||||
/* Attach main clock divide to FLEXCOMM0 (debug console). */
|
||||
CLOCK_AttachClk( BOARD_DEBUG_UART_CLK_ATTACH );
|
||||
|
||||
/* Init board hardware. */
|
||||
BOARD_InitPins();
|
||||
BOARD_BootClockFROHF96M();
|
||||
BOARD_InitDebugConsole();
|
||||
|
||||
/* Boot the non-secure code. */
|
||||
PRINTF( "Booting Non-Secure World.\r\n" );
|
||||
prvBootNonSecure( mainNONSECURE_APP_START_ADDRESS );
|
||||
|
||||
/* Non-secure software does not return, this code is not executed. */
|
||||
for( ; ; )
|
||||
{
|
||||
/* Should not reach here. */
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvBootNonSecure( uint32_t ulNonSecureStartAddress )
|
||||
{
|
||||
NonSecureResetHandler_t pxNonSecureResetHandler;
|
||||
|
||||
/* Setup the non-secure vector table. */
|
||||
SCB_NS->VTOR = ulNonSecureStartAddress;
|
||||
|
||||
/* Main Stack Pointer value for the non-secure side is the first entry in
|
||||
* the non-secure vector table. Read the first entry and assign the same to
|
||||
* the non-secure main stack pointer(MSP_NS). */
|
||||
secureportSET_MSP_NS( *( ( uint32_t * )( ulNonSecureStartAddress ) ) );
|
||||
|
||||
/* Reset Handler for the non-secure side is the second entry in the
|
||||
* non-secure vector table. Read the second entry to get the non-secure
|
||||
* Reset Handler. */
|
||||
pxNonSecureResetHandler = ( NonSecureResetHandler_t )( * ( ( uint32_t * ) ( ( ulNonSecureStartAddress ) + 4U ) ) );
|
||||
|
||||
/* Start non-secure state software application by jumping to the non-secure
|
||||
* Reset Handler. */
|
||||
pxNonSecureResetHandler();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void SystemInitHook( void )
|
||||
{
|
||||
/* Set CP10 and CP11 full access from Non-Secure code. */
|
||||
SCB_NS->CPACR |= ( ( 3UL << 10 * 2 ) | ( 3UL << 11 * 2 ) );
|
||||
|
||||
/* The TrustZone should be configured as early as possible after RESET.
|
||||
* Therefore it is called from SystemInit() during startup. The
|
||||
* SystemInitHook() weak function overloading is used for this purpose.
|
||||
*/
|
||||
BOARD_InitTrustZone();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
/*
|
||||
* FreeRTOS V202212.00
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
/* FreeRTOS includes. */
|
||||
#include "secure_port_macros.h"
|
||||
|
||||
/* Device includes. */
|
||||
#include "fsl_device_registers.h"
|
||||
#include "fsl_debug_console.h"
|
||||
#include "arm_cmse.h"
|
||||
#include "board.h"
|
||||
#include "tzm_config.h"
|
||||
#include "pin_mux.h"
|
||||
#include "clock_config.h"
|
||||
#include "fsl_power.h"
|
||||
|
||||
#if ( __ARM_FEATURE_CMSE & 1 ) == 0
|
||||
#error "Need ARMv8-M security extensions"
|
||||
#elif ( __ARM_FEATURE_CMSE & 2 ) == 0
|
||||
#error "Compile with --cmse"
|
||||
#endif
|
||||
|
||||
/* Start address of non-secure application. */
|
||||
#define mainNONSECURE_APP_START_ADDRESS ( 0x00010000UL )
|
||||
|
||||
/* typedef for non-secure Reset Handler. */
|
||||
typedef void ( *NonSecureResetHandler_t ) ( void ) __attribute__( ( cmse_nonsecure_call ) );
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Boots into the non-secure code.
|
||||
*
|
||||
* @param[in] ulNonSecureStartAddress Start address of the non-secure application.
|
||||
*/
|
||||
static void prvBootNonSecure( uint32_t ulNonSecureStartAddress );
|
||||
|
||||
/**
|
||||
* @brief Application-specific implementation of the SystemInitHook() weak
|
||||
* function.
|
||||
*/
|
||||
void SystemInitHook( void );
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* For instructions on how to build and run this demo, visit the following link:
|
||||
* https://www.freertos.org/RTOS-Cortex-M33-LPC55S69-MCUXpresso-GCC.html
|
||||
*/
|
||||
|
||||
/* Secure main(). */
|
||||
int main(void)
|
||||
{
|
||||
/* Set BOD VBAT level to 1.65V. */
|
||||
POWER_SetBodVbatLevel( kPOWER_BodVbatLevel1650mv, kPOWER_BodHystLevel50mv, false );
|
||||
|
||||
/* Attach main clock divide to FLEXCOMM0 (debug console). */
|
||||
CLOCK_AttachClk( BOARD_DEBUG_UART_CLK_ATTACH );
|
||||
|
||||
/* Init board hardware. */
|
||||
BOARD_InitPins();
|
||||
BOARD_BootClockFROHF96M();
|
||||
BOARD_InitDebugConsole();
|
||||
|
||||
/* Boot the non-secure code. */
|
||||
PRINTF( "Booting Non-Secure World.\r\n" );
|
||||
prvBootNonSecure( mainNONSECURE_APP_START_ADDRESS );
|
||||
|
||||
/* Non-secure software does not return, this code is not executed. */
|
||||
for( ; ; )
|
||||
{
|
||||
/* Should not reach here. */
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvBootNonSecure( uint32_t ulNonSecureStartAddress )
|
||||
{
|
||||
NonSecureResetHandler_t pxNonSecureResetHandler;
|
||||
|
||||
/* Setup the non-secure vector table. */
|
||||
SCB_NS->VTOR = ulNonSecureStartAddress;
|
||||
|
||||
/* Main Stack Pointer value for the non-secure side is the first entry in
|
||||
* the non-secure vector table. Read the first entry and assign the same to
|
||||
* the non-secure main stack pointer(MSP_NS). */
|
||||
secureportSET_MSP_NS( *( ( uint32_t * )( ulNonSecureStartAddress ) ) );
|
||||
|
||||
/* Reset Handler for the non-secure side is the second entry in the
|
||||
* non-secure vector table. Read the second entry to get the non-secure
|
||||
* Reset Handler. */
|
||||
pxNonSecureResetHandler = ( NonSecureResetHandler_t )( * ( ( uint32_t * ) ( ( ulNonSecureStartAddress ) + 4U ) ) );
|
||||
|
||||
/* Start non-secure state software application by jumping to the non-secure
|
||||
* Reset Handler. */
|
||||
pxNonSecureResetHandler();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void SystemInitHook( void )
|
||||
{
|
||||
/* Set CP10 and CP11 full access from Non-Secure code. */
|
||||
SCB_NS->CPACR |= ( ( 3UL << 10 * 2 ) | ( 3UL << 11 * 2 ) );
|
||||
|
||||
/* The TrustZone should be configured as early as possible after RESET.
|
||||
* Therefore it is called from SystemInit() during startup. The
|
||||
* SystemInitHook() weak function overloading is used for this purpose.
|
||||
*/
|
||||
BOARD_InitTrustZone();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
|
@ -60,7 +60,7 @@ static uint8_t ucSharedMemory[ SHARED_MEMORY_SIZE ] __attribute__( ( aligned( 32
|
|||
* @note We are declaring a region of 32 bytes even though we need only one. The
|
||||
* reason is that the size of an MPU region must be a multiple of 32 bytes.
|
||||
*/
|
||||
static uint8_t ucROTaskFaultTracker[ SHARED_MEMORY_SIZE ] __attribute__( ( aligned( 32 ) ) ) = { 0 };
|
||||
static volatile uint8_t ucROTaskFaultTracker[ SHARED_MEMORY_SIZE ] __attribute__( ( aligned( 32 ) ) ) = { 0 };
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
|
|
@ -234,19 +234,19 @@ void vStartMPUDemo( void )
|
|||
.puxStackBuffer = xROAccessTaskStack,
|
||||
.xRegions =
|
||||
{
|
||||
{ ucSharedMemory, 32, tskMPU_REGION_READ_ONLY | tskMPU_REGION_EXECUTE_NEVER },
|
||||
{ ( void * ) ucSharedMemory, 32, tskMPU_REGION_READ_ONLY | tskMPU_REGION_EXECUTE_NEVER },
|
||||
#if ( configTOTAL_MPU_REGIONS == 16 )
|
||||
{ ucSharedMemory1, 32, tskMPU_REGION_READ_ONLY | tskMPU_REGION_EXECUTE_NEVER },
|
||||
{ ucSharedMemory2, 32, tskMPU_REGION_READ_ONLY | tskMPU_REGION_EXECUTE_NEVER },
|
||||
{ ucSharedMemory3, 32, tskMPU_REGION_READ_ONLY | tskMPU_REGION_EXECUTE_NEVER },
|
||||
{ ucSharedMemory4, 32, tskMPU_REGION_READ_ONLY | tskMPU_REGION_EXECUTE_NEVER },
|
||||
{ ucSharedMemory5, 32, tskMPU_REGION_READ_ONLY | tskMPU_REGION_EXECUTE_NEVER },
|
||||
{ ucSharedMemory6, 32, tskMPU_REGION_READ_ONLY | tskMPU_REGION_EXECUTE_NEVER },
|
||||
{ ucSharedMemory7, 32, tskMPU_REGION_READ_ONLY | tskMPU_REGION_EXECUTE_NEVER },
|
||||
{ ucSharedMemory8, 32, tskMPU_REGION_READ_ONLY | tskMPU_REGION_EXECUTE_NEVER },
|
||||
{ ( void * ) ucSharedMemory1, 32, tskMPU_REGION_READ_ONLY | tskMPU_REGION_EXECUTE_NEVER },
|
||||
{ ( void * ) ucSharedMemory2, 32, tskMPU_REGION_READ_ONLY | tskMPU_REGION_EXECUTE_NEVER },
|
||||
{ ( void * ) ucSharedMemory3, 32, tskMPU_REGION_READ_ONLY | tskMPU_REGION_EXECUTE_NEVER },
|
||||
{ ( void * ) ucSharedMemory4, 32, tskMPU_REGION_READ_ONLY | tskMPU_REGION_EXECUTE_NEVER },
|
||||
{ ( void * ) ucSharedMemory5, 32, tskMPU_REGION_READ_ONLY | tskMPU_REGION_EXECUTE_NEVER },
|
||||
{ ( void * ) ucSharedMemory6, 32, tskMPU_REGION_READ_ONLY | tskMPU_REGION_EXECUTE_NEVER },
|
||||
{ ( void * ) ucSharedMemory7, 32, tskMPU_REGION_READ_ONLY | tskMPU_REGION_EXECUTE_NEVER },
|
||||
{ ( void * ) ucSharedMemory8, 32, tskMPU_REGION_READ_ONLY | tskMPU_REGION_EXECUTE_NEVER },
|
||||
#endif /* configTOTAL_MPU_REGIONS == 16 */
|
||||
{ ucROTaskFaultTracker, 32, tskMPU_REGION_READ_WRITE | tskMPU_REGION_EXECUTE_NEVER },
|
||||
{ 0, 0, 0 },
|
||||
{ ( void * ) ucROTaskFaultTracker, 32, tskMPU_REGION_READ_WRITE | tskMPU_REGION_EXECUTE_NEVER },
|
||||
{ 0, 0, 0 },
|
||||
}
|
||||
};
|
||||
TaskParameters_t xRWAccessTaskParameters =
|
||||
|
|
@ -259,19 +259,19 @@ void vStartMPUDemo( void )
|
|||
.puxStackBuffer = xRWAccessTaskStack,
|
||||
.xRegions =
|
||||
{
|
||||
{ ucSharedMemory, 32, tskMPU_REGION_READ_WRITE | tskMPU_REGION_EXECUTE_NEVER },
|
||||
{ ( void * ) ucSharedMemory, 32, tskMPU_REGION_READ_WRITE | tskMPU_REGION_EXECUTE_NEVER },
|
||||
#if ( configTOTAL_MPU_REGIONS == 16 )
|
||||
{ ucSharedMemory1, 32, tskMPU_REGION_READ_WRITE | tskMPU_REGION_EXECUTE_NEVER },
|
||||
{ ucSharedMemory2, 32, tskMPU_REGION_READ_WRITE | tskMPU_REGION_EXECUTE_NEVER },
|
||||
{ ucSharedMemory3, 32, tskMPU_REGION_READ_WRITE | tskMPU_REGION_EXECUTE_NEVER },
|
||||
{ ucSharedMemory4, 32, tskMPU_REGION_READ_WRITE | tskMPU_REGION_EXECUTE_NEVER },
|
||||
{ ucSharedMemory5, 32, tskMPU_REGION_READ_WRITE | tskMPU_REGION_EXECUTE_NEVER },
|
||||
{ ucSharedMemory6, 32, tskMPU_REGION_READ_WRITE | tskMPU_REGION_EXECUTE_NEVER },
|
||||
{ ucSharedMemory7, 32, tskMPU_REGION_READ_WRITE | tskMPU_REGION_EXECUTE_NEVER },
|
||||
{ ucSharedMemory8, 32, tskMPU_REGION_READ_WRITE | tskMPU_REGION_EXECUTE_NEVER },
|
||||
{ ( void * ) ucSharedMemory1, 32, tskMPU_REGION_READ_WRITE | tskMPU_REGION_EXECUTE_NEVER },
|
||||
{ ( void * ) ucSharedMemory2, 32, tskMPU_REGION_READ_WRITE | tskMPU_REGION_EXECUTE_NEVER },
|
||||
{ ( void * ) ucSharedMemory3, 32, tskMPU_REGION_READ_WRITE | tskMPU_REGION_EXECUTE_NEVER },
|
||||
{ ( void * ) ucSharedMemory4, 32, tskMPU_REGION_READ_WRITE | tskMPU_REGION_EXECUTE_NEVER },
|
||||
{ ( void * ) ucSharedMemory5, 32, tskMPU_REGION_READ_WRITE | tskMPU_REGION_EXECUTE_NEVER },
|
||||
{ ( void * ) ucSharedMemory6, 32, tskMPU_REGION_READ_WRITE | tskMPU_REGION_EXECUTE_NEVER },
|
||||
{ ( void * ) ucSharedMemory7, 32, tskMPU_REGION_READ_WRITE | tskMPU_REGION_EXECUTE_NEVER },
|
||||
{ ( void * ) ucSharedMemory8, 32, tskMPU_REGION_READ_WRITE | tskMPU_REGION_EXECUTE_NEVER },
|
||||
#endif /* configTOTAL_MPU_REGIONS == 16 */
|
||||
{ 0, 0, 0 },
|
||||
{ 0, 0, 0 },
|
||||
{ 0, 0, 0 },
|
||||
{ 0, 0, 0 },
|
||||
}
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,48 @@
|
|||
/*
|
||||
* FreeRTOS V202212.00
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef REG_TEST_ASM_H
|
||||
#define REG_TEST_ASM_H
|
||||
|
||||
/**
|
||||
* @brief Functions that implement reg tests in assembly.
|
||||
*
|
||||
* These are called from the FreeRTOS tasks on the non-secure side.
|
||||
*/
|
||||
void vRegTest1Asm_NonSecure( void ) __attribute__( ( naked ) );
|
||||
void vRegTest2Asm_NonSecure( void ) __attribute__( ( naked ) );
|
||||
void vRegTest3Asm_NonSecure( void ) __attribute__( ( naked ) );
|
||||
void vRegTest4Asm_NonSecure( void ) __attribute__( ( naked ) );
|
||||
|
||||
/**
|
||||
* @brief Function that implements reg tests in assembly.
|
||||
*
|
||||
* This is passed as function pointer to the secure side and called
|
||||
* from the secure side.
|
||||
*/
|
||||
void vRegTestAsm_NonSecureCallback( void );
|
||||
|
||||
#endif /* REG_TEST_ASM_H */
|
||||
File diff suppressed because it is too large
Load diff
|
|
@ -0,0 +1,61 @@
|
|||
/*
|
||||
* FreeRTOS V202212.00
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
/* Standard includes. */
|
||||
#include <stdint.h>
|
||||
#include <arm_cmse.h>
|
||||
|
||||
/* Interface includes. */
|
||||
#include "secure_reg_test_asm.h"
|
||||
|
||||
/* FreeRTOS includes. */
|
||||
#include "secure_port_macros.h"
|
||||
|
||||
/* Implemented in assembly. */
|
||||
extern void vRegTestAsm_SecureImpl( void );
|
||||
|
||||
/* typedef for non-secure callback function. */
|
||||
typedef __cmse_nonsecure_call void ( * NonSecureRegTestCallback_t ) ( void );
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
secureportNON_SECURE_CALLABLE void vRegTestAsm_Secure( void )
|
||||
{
|
||||
/* Call the function implemented in assembly. */
|
||||
vRegTestAsm_SecureImpl();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
secureportNON_SECURE_CALLABLE void vRegTest_NonSecureCallback( RegTestCallback_t pxRegTestCallback )
|
||||
{
|
||||
NonSecureRegTestCallback_t pxNonSecureRegTestCallback;
|
||||
|
||||
/* Return function pointer with cleared LSB. */
|
||||
pxNonSecureRegTestCallback = ( NonSecureRegTestCallback_t ) cmse_nsfptr_create( pxRegTestCallback );
|
||||
|
||||
/* Invoke the callback which runs reg tests. */
|
||||
pxNonSecureRegTestCallback();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
|
@ -0,0 +1,49 @@
|
|||
/*
|
||||
* FreeRTOS V202212.00
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef SECURE_REG_TEST_ASM_H
|
||||
#define SECURE_REG_TEST_ASM_H
|
||||
|
||||
/* Callback function pointer definition. */
|
||||
typedef void ( * RegTestCallback_t )( void );
|
||||
|
||||
/**
|
||||
* @brief Function that implements reg tests for the secure side.
|
||||
*
|
||||
* This function is exported as "non-secure callable" and is called
|
||||
* from a FreeRTOS task on the non-secure side.
|
||||
*/
|
||||
void vRegTestAsm_Secure( void );
|
||||
|
||||
/**
|
||||
* @brief Invokes the supplied reg test callback on the non-secure side.
|
||||
*
|
||||
* This function is exported as "non-secure callable" and is called
|
||||
* from a FreeRTOS task on the non-secure side..
|
||||
*/
|
||||
void vRegTest_NonSecureCallback( RegTestCallback_t pxRegTestCallback );
|
||||
|
||||
#endif /* SECURE_REG_TEST_ASM_H */
|
||||
|
|
@ -0,0 +1,265 @@
|
|||
/*
|
||||
* FreeRTOS V202212.00
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
SECTION .text:CODE:NOROOT(2)
|
||||
THUMB
|
||||
|
||||
PUBLIC vRegTestAsm_SecureImpl
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
vRegTestAsm_SecureImpl:
|
||||
/* Store callee saved registers. */
|
||||
push { r4-r12 }
|
||||
|
||||
/* Fill the core registers with known values. */
|
||||
movs r0, #200
|
||||
movs r1, #201
|
||||
movs r1, #201
|
||||
movs r2, #202
|
||||
movs r3, #203
|
||||
movs r4, #204
|
||||
movs r5, #205
|
||||
movs r6, #206
|
||||
movs r7, #207
|
||||
movs r8, #208
|
||||
movs r9, #209
|
||||
movs r10, #210
|
||||
movs r11, #211
|
||||
movs r12, #212
|
||||
|
||||
/* Fill the FPU registers with known values. */
|
||||
vmov.f32 s0, #1.0
|
||||
vmov.f32 s2, #2.0
|
||||
vmov.f32 s3, #3.5
|
||||
vmov.f32 s4, #4.5
|
||||
vmov.f32 s5, #5.0
|
||||
vmov.f32 s6, #6.0
|
||||
vmov.f32 s7, #7.5
|
||||
vmov.f32 s8, #8.5
|
||||
vmov.f32 s9, #9.0
|
||||
vmov.f32 s10, #10.0
|
||||
vmov.f32 s11, #11.5
|
||||
vmov.f32 s12, #12.5
|
||||
vmov.f32 s13, #13.0
|
||||
vmov.f32 s14, #14.0
|
||||
vmov.f32 s15, #1.5
|
||||
vmov.f32 s16, #2.5
|
||||
vmov.f32 s17, #3.0
|
||||
vmov.f32 s18, #4.0
|
||||
vmov.f32 s19, #5.5
|
||||
vmov.f32 s20, #6.5
|
||||
vmov.f32 s21, #7.0
|
||||
vmov.f32 s22, #8.0
|
||||
vmov.f32 s23, #9.5
|
||||
vmov.f32 s24, #10.5
|
||||
vmov.f32 s25, #11.0
|
||||
vmov.f32 s26, #12.0
|
||||
vmov.f32 s27, #13.5
|
||||
vmov.f32 s28, #14.5
|
||||
vmov.f32 s29, #1.0
|
||||
vmov.f32 s30, #2.0
|
||||
vmov.f32 s31, #3.5
|
||||
|
||||
/* Force a context switch by pending non-secure sv. */
|
||||
push { r0, r1 }
|
||||
movs r0, #0x01
|
||||
ldr r1, =0xe002ed04 /* NVIC_ICSR_NS. */
|
||||
lsls r0, #28 /* Shift to PendSV bit. */
|
||||
str r0, [r1]
|
||||
dsb
|
||||
pop { r0, r1 }
|
||||
|
||||
/* Verify that core registers contain correct values. */
|
||||
cmp r0, #200
|
||||
bne secure_reg_test_error_loop
|
||||
cmp r1, #201
|
||||
bne secure_reg_test_error_loop
|
||||
cmp r2, #202
|
||||
bne secure_reg_test_error_loop
|
||||
cmp r3, #203
|
||||
bne secure_reg_test_error_loop
|
||||
cmp r4, #204
|
||||
bne secure_reg_test_error_loop
|
||||
cmp r5, #205
|
||||
bne secure_reg_test_error_loop
|
||||
cmp r6, #206
|
||||
bne secure_reg_test_error_loop
|
||||
cmp r7, #207
|
||||
bne secure_reg_test_error_loop
|
||||
cmp r8, #208
|
||||
bne secure_reg_test_error_loop
|
||||
cmp r9, #209
|
||||
bne secure_reg_test_error_loop
|
||||
cmp r10, #210
|
||||
bne secure_reg_test_error_loop
|
||||
cmp r11, #211
|
||||
bne secure_reg_test_error_loop
|
||||
cmp r12, #212
|
||||
bne secure_reg_test_error_loop
|
||||
|
||||
/* Verify that FPU registers contain correct values. */
|
||||
vmov.f32 s1, #1.0
|
||||
vcmp.f32 s0, s1
|
||||
vmrs APSR_nzcv, FPSCR
|
||||
bne secure_reg_test_error_loop
|
||||
vmov.f32 s1, #2.0
|
||||
vcmp.f32 s2, s1
|
||||
vmrs APSR_nzcv, FPSCR
|
||||
bne secure_reg_test_error_loop
|
||||
vmov.f32 s1, #3.5
|
||||
vcmp.f32 s3, s1
|
||||
vmrs APSR_nzcv, FPSCR
|
||||
bne secure_reg_test_error_loop
|
||||
vmov.f32 s1, #4.5
|
||||
vcmp.f32 s4, s1
|
||||
vmrs APSR_nzcv, FPSCR
|
||||
bne secure_reg_test_error_loop
|
||||
vmov.f32 s1, #5.0
|
||||
vcmp.f32 s5, s1
|
||||
vmrs APSR_nzcv, FPSCR
|
||||
bne secure_reg_test_error_loop
|
||||
vmov.f32 s1, #6.0
|
||||
vcmp.f32 s6, s1
|
||||
vmrs APSR_nzcv, FPSCR
|
||||
bne secure_reg_test_error_loop
|
||||
vmov.f32 s1, #7.5
|
||||
vcmp.f32 s7, s1
|
||||
vmrs APSR_nzcv, FPSCR
|
||||
bne secure_reg_test_error_loop
|
||||
vmov.f32 s1, #8.5
|
||||
vcmp.f32 s8, s1
|
||||
vmrs APSR_nzcv, FPSCR
|
||||
bne secure_reg_test_error_loop
|
||||
vmov.f32 s1, #9.0
|
||||
vcmp.f32 s9, s1
|
||||
vmrs APSR_nzcv, FPSCR
|
||||
bne secure_reg_test_error_loop
|
||||
vmov.f32 s1, #10.0
|
||||
vcmp.f32 s10, s1
|
||||
vmrs APSR_nzcv, FPSCR
|
||||
bne secure_reg_test_error_loop
|
||||
vmov.f32 s1, #11.5
|
||||
vcmp.f32 s11, s1
|
||||
vmrs APSR_nzcv, FPSCR
|
||||
bne secure_reg_test_error_loop
|
||||
vmov.f32 s1, #12.5
|
||||
vcmp.f32 s12, s1
|
||||
vmrs APSR_nzcv, FPSCR
|
||||
bne secure_reg_test_error_loop
|
||||
vmov.f32 s1, #13.0
|
||||
vcmp.f32 s13, s1
|
||||
vmrs APSR_nzcv, FPSCR
|
||||
bne secure_reg_test_error_loop
|
||||
vmov.f32 s1, #14.0
|
||||
vcmp.f32 s14, s1
|
||||
vmrs APSR_nzcv, FPSCR
|
||||
bne secure_reg_test_error_loop
|
||||
vmov.f32 s1, #1.5
|
||||
vcmp.f32 s15, s1
|
||||
vmrs APSR_nzcv, FPSCR
|
||||
bne secure_reg_test_error_loop
|
||||
vmov.f32 s1, #2.5
|
||||
vcmp.f32 s16, s1
|
||||
vmrs APSR_nzcv, FPSCR
|
||||
bne secure_reg_test_error_loop
|
||||
vmov.f32 s1, #3.0
|
||||
vcmp.f32 s17, s1
|
||||
vmrs APSR_nzcv, FPSCR
|
||||
bne secure_reg_test_error_loop
|
||||
vmov.f32 s1, #4.0
|
||||
vcmp.f32 s18, s1
|
||||
vmrs APSR_nzcv, FPSCR
|
||||
bne secure_reg_test_error_loop
|
||||
vmov.f32 s1, #5.5
|
||||
vcmp.f32 s19, s1
|
||||
vmrs APSR_nzcv, FPSCR
|
||||
bne secure_reg_test_error_loop
|
||||
vmov.f32 s1, #6.5
|
||||
vcmp.f32 s20, s1
|
||||
vmrs APSR_nzcv, FPSCR
|
||||
bne secure_reg_test_error_loop
|
||||
vmov.f32 s1, #7.0
|
||||
vcmp.f32 s21, s1
|
||||
vmrs APSR_nzcv, FPSCR
|
||||
bne secure_reg_test_error_loop
|
||||
vmov.f32 s1, #8.0
|
||||
vcmp.f32 s22, s1
|
||||
vmrs APSR_nzcv, FPSCR
|
||||
bne secure_reg_test_error_loop
|
||||
vmov.f32 s1, #9.5
|
||||
vcmp.f32 s23, s1
|
||||
vmrs APSR_nzcv, FPSCR
|
||||
bne secure_reg_test_error_loop
|
||||
vmov.f32 s1, #10.5
|
||||
vcmp.f32 s24, s1
|
||||
vmrs APSR_nzcv, FPSCR
|
||||
bne secure_reg_test_error_loop
|
||||
vmov.f32 s1, #11.0
|
||||
vcmp.f32 s25, s1
|
||||
vmrs APSR_nzcv, FPSCR
|
||||
bne secure_reg_test_error_loop
|
||||
vmov.f32 s1, #12.0
|
||||
vcmp.f32 s26, s1
|
||||
vmrs APSR_nzcv, FPSCR
|
||||
bne secure_reg_test_error_loop
|
||||
vmov.f32 s1, #13.5
|
||||
vcmp.f32 s27, s1
|
||||
vmrs APSR_nzcv, FPSCR
|
||||
bne secure_reg_test_error_loop
|
||||
vmov.f32 s1, #14.5
|
||||
vcmp.f32 s28, s1
|
||||
vmrs APSR_nzcv, FPSCR
|
||||
bne secure_reg_test_error_loop
|
||||
vmov.f32 s1, #1.0
|
||||
vcmp.f32 s29, s1
|
||||
vmrs APSR_nzcv, FPSCR
|
||||
bne secure_reg_test_error_loop
|
||||
vmov.f32 s1, #2.0
|
||||
vcmp.f32 s30, s1
|
||||
vmrs APSR_nzcv, FPSCR
|
||||
bne secure_reg_test_error_loop
|
||||
vmov.f32 s1, #3.5
|
||||
vcmp.f32 s31, s1
|
||||
vmrs APSR_nzcv, FPSCR
|
||||
bne secure_reg_test_error_loop
|
||||
|
||||
/* Everything passed, finish. */
|
||||
b secure_reg_test_success
|
||||
|
||||
secure_reg_test_error_loop:
|
||||
/* If this line is hit then there was an error in
|
||||
* a core register value. The loop ensures the
|
||||
* loop counter stops incrementing. */
|
||||
b secure_reg_test_error_loop
|
||||
nop
|
||||
|
||||
secure_reg_test_success:
|
||||
/* Restore callee saved registers. */
|
||||
pop { r4-r12 }
|
||||
bx lr
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
END
|
||||
Loading…
Add table
Add a link
Reference in a new issue