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Alfred Gedeon 2020-07-01 22:55:52 -07:00 • committed by alfred gedeon
parent 718178c68a
commit 2c530ba5c3
125 changed files with 1218 additions and 1217 deletions
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48
portable/SDCC/Cygnal/port.c
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@ -95,18 +95,18 @@ static void prvSetupTimerInterrupt( void );
ucStackBytes = SP - ( configSTACK_START - 1 ); \
\
/* Before starting to copy the stack, store the calculated stack size so \
* the stack can be restored when the task is resumed. */\
* pxXRAMStack = ucStackBytes; \
\
* the stack can be restored when the task is resumed. */ \
* pxXRAMStack = ucStackBytes; \
\
/* Copy each stack byte in turn. pxXRAMStack is incremented first as we \
* have already stored the stack size into XRAM. */\
while( ucStackBytes ) \
{ \
pxXRAMStack ++; \
* pxXRAMStack = * pxRAMStack; \
pxRAMStack ++; \
ucStackBytes --; \
} \
* have already stored the stack size into XRAM. */ \
while( ucStackBytes ) \
{ \
pxXRAMStack ++; \
* pxXRAMStack = * pxRAMStack; \
pxRAMStack ++; \
ucStackBytes --; \
} \
}
/*-----------------------------------------------------------*/
@ -194,18 +194,18 @@ static void prvSetupTimerInterrupt( void );
pop DPL \
/* The next byte of the stack is the IE register. Only the global \
* enable bit forms part of the task context. Pop off the IE then set \
* the global enable bit to match that of the stored IE register. */\
pop ACC \
JB ACC .7, 00 98$ \
CLR IE .7 \
LJMP 00 99$ \
00 98$ : \
SETB IE .7 \
00 99$ : \
/* Finally pop off the ACC, which was the first register saved. */ \
pop ACC \
reti \
_endasm; \
* the global enable bit to match that of the stored IE register. */ \
pop ACC \
JB ACC .7, 00 98$ \
CLR IE .7 \
LJMP 00 99$ \
00 98$ : \
SETB IE .7 \
00 99$ : \
/* Finally pop off the ACC, which was the first register saved. */ \
pop ACC \
reti \
_endasm; \
}
/*-----------------------------------------------------------*/
@ -369,7 +369,7 @@ void vPortYield( void ) _naked
portCOPY_XRAM_TO_STACK();
portRESTORE_CONTEXT();
}
#else /* if configUSE_PREEMPTION == 1 */
#else /* if configUSE_PREEMPTION == 1 */
void vTimer2ISR( void ) interrupt 5
{
/* When using the cooperative scheduler the timer 2 ISR is only