mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-08-19 09:38:32 -04:00
Style: uncrustify
This commit is contained in:
Alfred Gedeon
alfred gedeon
parent
718178c68a
commit
2c530ba5c3
125 changed files with 1218 additions and 1217 deletions
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@ -146,9 +146,9 @@ static void prvLowInterrupt( void );
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{ \
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_asm \
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/* Save the status and WREG registers first, as these will get modified \
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* by the operations below. */\
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MOVFF WREG, PREINC1 \
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MOVFF STATUS, PREINC1 \
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* by the operations below. */ \
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MOVFF WREG, PREINC1 \
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MOVFF STATUS, PREINC1 \
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/* Save the INTCON register with the appropriate bits forced if \
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* necessary - as described above. */ \
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MOVFF INTCON, WREG \
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@ -243,75 +243,75 @@ static void prvLowInterrupt( void );
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MOVFF pxCurrentTCB + 1, FSR0H \
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\
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/* De-reference FSR0 to set the address it holds into FSR1. \
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* (i.e. *( pxCurrentTCB->pxTopOfStack ) ). */\
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MOVFF POSTINC0, FSR1L \
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MOVFF POSTINC0, FSR1H \
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\
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* (i.e. *( pxCurrentTCB->pxTopOfStack ) ). */ \
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MOVFF POSTINC0, FSR1L \
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MOVFF POSTINC0, FSR1H \
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\
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/* How many return addresses are there on the hardware stack? Discard \
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* the first byte as we are pointing to the next free space. */\
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MOVFF POSTDEC1, FSR0L \
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MOVFF POSTDEC1, FSR0L \
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_endasm \
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\
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/* Fill the hardware stack from our software stack. */ \
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STKPTR = 0; \
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\
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while( STKPTR < FSR0L ) \
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{ \
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_asm \
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PUSH \
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MOVF POSTDEC1, 0, 0 \
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MOVWF TOSU, 0 \
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MOVF POSTDEC1, 0, 0 \
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MOVWF TOSH, 0 \
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MOVF POSTDEC1, 0, 0 \
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MOVWF TOSL, 0 \
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_endasm \
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} \
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\
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_asm \
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/* Restore the .tmpdata and MATH_DATA memory. */ \
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MOVFF POSTDEC1, FSR0H \
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MOVFF POSTDEC1, FSR0L \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, INDF0 \
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/* Restore the other registers forming the tasks context. */ \
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MOVFF POSTDEC1, PCLATH \
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MOVFF POSTDEC1, PCLATU \
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MOVFF POSTDEC1, PRODL \
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MOVFF POSTDEC1, PRODH \
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MOVFF POSTDEC1, TBLPTRL \
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MOVFF POSTDEC1, TBLPTRH \
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MOVFF POSTDEC1, TBLPTRU \
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MOVFF POSTDEC1, TABLAT \
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MOVFF POSTDEC1, FSR0H \
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MOVFF POSTDEC1, FSR0L \
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MOVFF POSTDEC1, FSR2H \
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MOVFF POSTDEC1, FSR2L \
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MOVFF POSTDEC1, BSR \
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* the first byte as we are pointing to the next free space. */ \
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MOVFF POSTDEC1, FSR0L \
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MOVFF POSTDEC1, FSR0L \
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_endasm \
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\
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/* Fill the hardware stack from our software stack. */ \
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STKPTR = 0; \
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\
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while( STKPTR < FSR0L ) \
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{ \
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_asm \
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PUSH \
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MOVF POSTDEC1, 0, 0 \
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MOVWF TOSU, 0 \
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MOVF POSTDEC1, 0, 0 \
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MOVWF TOSH, 0 \
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MOVF POSTDEC1, 0, 0 \
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MOVWF TOSL, 0 \
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_endasm \
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} \
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\
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_asm \
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/* Restore the .tmpdata and MATH_DATA memory. */ \
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MOVFF POSTDEC1, FSR0H \
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MOVFF POSTDEC1, FSR0L \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, POSTDEC0 \
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MOVFF POSTDEC1, INDF0 \
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/* Restore the other registers forming the tasks context. */ \
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MOVFF POSTDEC1, PCLATH \
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MOVFF POSTDEC1, PCLATU \
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MOVFF POSTDEC1, PRODL \
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MOVFF POSTDEC1, PRODH \
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MOVFF POSTDEC1, TBLPTRL \
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MOVFF POSTDEC1, TBLPTRH \
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MOVFF POSTDEC1, TBLPTRU \
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MOVFF POSTDEC1, TABLAT \
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MOVFF POSTDEC1, FSR0H \
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MOVFF POSTDEC1, FSR0L \
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MOVFF POSTDEC1, FSR2H \
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MOVFF POSTDEC1, FSR2L \
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MOVFF POSTDEC1, BSR \
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/* The next byte is the INTCON register. Read this into WREG as some \
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* manipulation is required. */\
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MOVFF POSTDEC1, WREG \
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_endasm \
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\
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* manipulation is required. */ \
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MOVFF POSTDEC1, WREG \
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_endasm \
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\
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/* From the INTCON register, only the interrupt enable bits form part \
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* of the tasks context. It is perfectly legitimate for another task to \
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* have modified any other bits. We therefore only restore the top two bits. \
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@ -331,10 +331,10 @@ static void prvLowInterrupt( void );
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MOVFF POSTDEC1, STATUS \
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MOVFF POSTDEC1, WREG \
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/* Return without effecting interrupts. The context may have \
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* been saved from a critical region. */\
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RETURN 0 \
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_endasm \
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} \
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* been saved from a critical region. */ \
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RETURN 0 \
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_endasm \
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} \
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}
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/*-----------------------------------------------------------*/
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@ -68,77 +68,77 @@ UBaseType_t uxCriticalNesting = 0xef;
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#if defined( __PIC24E__ ) || defined( __PIC24F__ ) || defined( __PIC24FK__ ) || defined( __PIC24H__ )
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#ifdef __HAS_EDS__
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#define portRESTORE_CONTEXT() \
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asm volatile ( "MOV _pxCurrentTCB, W0 \n" /* Restore the stack pointer for the task. */ \
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"MOV [W0], W15 \n" \
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"POP W0 \n" /* Restore the critical nesting counter for the task. */ \
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"MOV W0, _uxCriticalNesting \n" \
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"POP DSWPAG \n" \
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"POP DSRPAG \n" \
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"POP CORCON \n" \
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"POP TBLPAG \n" \
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"POP RCOUNT \n" /* Restore the registers from the stack. */ \
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"POP W14 \n" \
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"POP.D W12 \n" \
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"POP.D W10 \n" \
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"POP.D W8 \n" \
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"POP.D W6 \n" \
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"POP.D W4 \n" \
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"POP.D W2 \n" \
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"POP.D W0 \n" \
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#define portRESTORE_CONTEXT() \
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asm volatile ( "MOV _pxCurrentTCB, W0 \n"/* Restore the stack pointer for the task. */ \
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"MOV [W0], W15 \n" \
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"POP W0 \n"/* Restore the critical nesting counter for the task. */\
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"MOV W0, _uxCriticalNesting \n" \
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"POP DSWPAG \n" \
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"POP DSRPAG \n" \
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"POP CORCON \n" \
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"POP TBLPAG \n" \
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"POP RCOUNT \n"/* Restore the registers from the stack. */ \
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"POP W14 \n" \
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"POP.D W12 \n" \
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"POP.D W10 \n" \
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"POP.D W8 \n" \
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"POP.D W6 \n" \
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"POP.D W4 \n" \
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"POP.D W2 \n" \
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"POP.D W0 \n" \
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"POP SR ");
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#else /* __HAS_EDS__ */
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#define portRESTORE_CONTEXT() \
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asm volatile ( "MOV _pxCurrentTCB, W0 \n" /* Restore the stack pointer for the task. */ \
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"MOV [W0], W15 \n" \
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"POP W0 \n" /* Restore the critical nesting counter for the task. */ \
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"MOV W0, _uxCriticalNesting \n" \
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"POP PSVPAG \n" \
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"POP CORCON \n" \
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"POP TBLPAG \n" \
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"POP RCOUNT \n" /* Restore the registers from the stack. */ \
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"POP W14 \n" \
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"POP.D W12 \n" \
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"POP.D W10 \n" \
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"POP.D W8 \n" \
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"POP.D W6 \n" \
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"POP.D W4 \n" \
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"POP.D W2 \n" \
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"POP.D W0 \n" \
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#define portRESTORE_CONTEXT() \
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asm volatile ( "MOV _pxCurrentTCB, W0 \n"/* Restore the stack pointer for the task. */ \
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"MOV [W0], W15 \n" \
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"POP W0 \n"/* Restore the critical nesting counter for the task. */\
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"MOV W0, _uxCriticalNesting \n" \
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"POP PSVPAG \n" \
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"POP CORCON \n" \
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"POP TBLPAG \n" \
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"POP RCOUNT \n"/* Restore the registers from the stack. */ \
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"POP W14 \n" \
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"POP.D W12 \n" \
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"POP.D W10 \n" \
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"POP.D W8 \n" \
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"POP.D W6 \n" \
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"POP.D W4 \n" \
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"POP.D W2 \n" \
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"POP.D W0 \n" \
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"POP SR ");
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#endif /* __HAS_EDS__ */
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#endif /* MPLAB_PIC24_PORT */
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#if defined( __dsPIC30F__ ) || defined( __dsPIC33F__ )
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#define portRESTORE_CONTEXT() \
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asm volatile ( "MOV _pxCurrentTCB, W0 \n" /* Restore the stack pointer for the task. */ \
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"MOV [W0], W15 \n" \
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"POP W0 \n" /* Restore the critical nesting counter for the task. */ \
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"MOV W0, _uxCriticalNesting \n" \
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"POP PSVPAG \n" \
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"POP CORCON \n" \
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"POP DOENDH \n" \
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"POP DOENDL \n" \
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"POP DOSTARTH \n" \
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"POP DOSTARTL \n" \
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"POP DCOUNT \n" \
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"POP ACCBU \n" \
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"POP ACCBH \n" \
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"POP ACCBL \n" \
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"POP ACCAU \n" \
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"POP ACCAH \n" \
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"POP ACCAL \n" \
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"POP TBLPAG \n" \
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"POP RCOUNT \n" /* Restore the registers from the stack. */ \
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"POP W14 \n" \
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"POP.D W12 \n" \
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"POP.D W10 \n" \
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"POP.D W8 \n" \
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"POP.D W6 \n" \
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"POP.D W4 \n" \
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"POP.D W2 \n" \
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"POP.D W0 \n" \
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#define portRESTORE_CONTEXT() \
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asm volatile ( "MOV _pxCurrentTCB, W0 \n"/* Restore the stack pointer for the task. */ \
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"MOV [W0], W15 \n" \
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"POP W0 \n"/* Restore the critical nesting counter for the task. */\
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"MOV W0, _uxCriticalNesting \n" \
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"POP PSVPAG \n" \
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"POP CORCON \n" \
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"POP DOENDH \n" \
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"POP DOENDL \n" \
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"POP DOSTARTH \n" \
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"POP DOSTARTL \n" \
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"POP DCOUNT \n" \
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"POP ACCBU \n" \
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"POP ACCBH \n" \
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"POP ACCBL \n" \
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"POP ACCAU \n" \
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"POP ACCAH \n" \
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"POP ACCAL \n" \
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"POP TBLPAG \n" \
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"POP RCOUNT \n"/* Restore the registers from the stack. */ \
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"POP W14 \n" \
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"POP.D W12 \n" \
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"POP.D W10 \n" \
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"POP.D W8 \n" \
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"POP.D W6 \n" \
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"POP.D W4 \n" \
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"POP.D W2 \n" \
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"POP.D W0 \n" \
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"POP SR ");
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#endif /* MPLAB_DSPIC_PORT */
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@ -123,7 +123,7 @@
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}; \
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#define portCHECK_ISR_STACK() configASSERT( ( memcmp( ( void * ) xISRStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) == 0 ) )
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#else /* if ( configCHECK_FOR_STACK_OVERFLOW > 2 ) */
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#else /* if ( configCHECK_FOR_STACK_OVERFLOW > 2 ) */
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/* Define the function away. */
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#define portCHECK_ISR_STACK()
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#endif /* configCHECK_FOR_STACK_OVERFLOW > 2 */
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@ -108,7 +108,7 @@
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}; \
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#define portCHECK_ISR_STACK() configASSERT( ( memcmp( ( void * ) xISRStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) == 0 ) )
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#else /* if ( configCHECK_FOR_STACK_OVERFLOW > 2 ) */
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#else /* if ( configCHECK_FOR_STACK_OVERFLOW > 2 ) */
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/* Define the function away. */
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#define portCHECK_ISR_STACK()
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#endif /* configCHECK_FOR_STACK_OVERFLOW > 2 */
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@ -164,7 +164,7 @@ sw k1, portSTATUS_STACK_LOCATION( sp )
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/* Prepare to enable interrupts above the current priority. */
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srl k0, k0, 0xa
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ins k1, k0, 10, 7
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srl k0, k0, 0x7 /* This copies the MSB of the IPL, but it would be an error if it was set anyway. */
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srl k0, k0, 0x7 /* This copies the MSB of the IPL, but it would be an error if it was set anyway. */
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ins k1, k0, 18, 1
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ins k1, zero, 1, 4
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@ -395,7 +395,7 @@ sw k1, 0 ( k0 )
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beq zero, zero, 2f
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nop
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1 : /* Restore the STATUS and EPC registers */
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1 : /* Restore the STATUS and EPC registers */
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lw k0, portSTATUS_STACK_LOCATION( s5 )
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lw k1, portEPC_STACK_LOCATION( s5 )
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@ -404,7 +404,7 @@ sw k1, 0 ( k0 )
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add sp, zero, s5
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lw s5, 40 ( sp )
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2 : /* Adjust the stack pointer */
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2 : /* Adjust the stack pointer */
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addiu sp, sp, portCONTEXT_SIZE
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#else /* if ( __mips_hard_float == 1 ) && ( configUSE_TASK_FPU_SUPPORT == 1 ) */
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@ -130,7 +130,7 @@
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}; \
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#define portCHECK_ISR_STACK() configASSERT( ( memcmp( ( void * ) xISRStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) == 0 ) )
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#else /* if ( configCHECK_FOR_STACK_OVERFLOW > 2 ) */
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#else /* if ( configCHECK_FOR_STACK_OVERFLOW > 2 ) */
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/* Define the function away. */
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#define portCHECK_ISR_STACK()
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#endif /* configCHECK_FOR_STACK_OVERFLOW > 2 */
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