Backup Microsemi Renode project before adding a build configuration for the target hardware.

FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/.cproject

@@ -41,7 +41,7 @@
                             							
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@@ -99,7 +99,13 @@
                                 								
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-                                    <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/FreeRTOS_Source/portable/GCC/RISC-V-RV32/CLINT}&quot;"/>
+                                    <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/FreeRTOS_Source/portable/GCC/RISC-V-RV32/CLINT_no_extensions}&quot;"/>
+                                    								
+                                </option>
+                                								
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+                                    									
+                                    <listOptionValue builtIn="false" value="portasmHANDLE_INTERRUPT=handle_m_ext_interrupt"/>
                                     								
                                 </option>
                                 								
@@ -221,6 +227,96 @@
                         					
                     </folderInfo>
                     					
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+                            <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.1053378665" name="GNU RISC-V Cross C Compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.894708922">
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+                            <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.compiler.1310039856" name="GNU RISC-V Cross C++ Compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.compiler.1713474071"/>
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+                            <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.861501790" name="GNU RISC-V Cross C Linker" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.209069143"/>
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+                            <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.archiver.835675285" name="GNU RISC-V Cross Archiver" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.archiver.690189418"/>
+                            							
+                            <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createflash.126663148" name="GNU RISC-V Cross Create Flash Image" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createflash.1183225084"/>
+                            							
+                            <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createlisting.2100288530" name="GNU RISC-V Cross Create Listing" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createlisting.876462403"/>
+                            							
+                            <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.printsize.1504637085" name="GNU RISC-V Cross Print Size" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.printsize.1868273119"/>
+                            						
+                        </toolChain>
+                        					
+                    </folderInfo>
+                    					
                     <sourceEntries>
                         						
                         <entry excluding="FreeRTOS/portable/MemMang/heap_5.c|FreeRTOS/portable/MemMang/heap_4.c|FreeRTOS/portable/MemMang/heap_3.c|FreeRTOS/portable/MemMang/heap_1.c" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>

FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/.project

@@ -214,6 +214,15 @@
 				<arguments>1.0-name-matches-false-false-heap_4.c</arguments>
 			</matcher>
 		</filter>
+		<filter>
+			<id>1545005412575</id>
+			<name>FreeRTOS_Source/portable/GCC/RISC-V-RV32</name>
+			<type>9</type>
+			<matcher>
+				<id>org.eclipse.ui.ide.multiFilter</id>
+				<arguments>1.0-name-matches-false-false-CLINT_no_extensions</arguments>
+			</matcher>
+		</filter>
 	</filteredResources>
 	<variableList>
 		<variable>

FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/.settings/language.settings.xml

@@ -11,7 +11,7 @@
             			
             <provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
             			
-            <provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="247273655846757705" id="ilg.gnumcueclipse.managedbuild.cross.riscv.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT RISC-V Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
+            <provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="1803830185129867376" id="ilg.gnumcueclipse.managedbuild.cross.riscv.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT RISC-V Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
                 				
                 <language-scope id="org.eclipse.cdt.core.gcc"/>
                 				

FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/FreeRTOSConfig.h

@@ -90,12 +90,12 @@
 #define configUSE_PREEMPTION			1
 #define configUSE_IDLE_HOOK				1
 #define configUSE_TICK_HOOK				1
-#define configCPU_CLOCK_HZ				( ( unsigned long ) ( SYS_CLK_FREQ ) )
+//#define configCPU_CLOCK_HZ				( ( unsigned long ) ( SYS_CLK_FREQ ) )
-//#define configCPU_CLOCK_HZ				( ( unsigned long ) ( SYS_CLK_FREQ / 100 ) ) /*_RB_ Seems to be a factor of 100 between machine timer frequency and CPU frequency. */
+#define configCPU_CLOCK_HZ				( ( unsigned long ) ( SYS_CLK_FREQ / 100 ) ) /*_RB_ Seems to be a factor of 100 between machine timer frequency and CPU frequency. */
 #define configTICK_RATE_HZ				( ( TickType_t ) 1000 )
 #define configMAX_PRIORITIES			( 5 )
-#define configMINIMAL_STACK_SIZE		( ( unsigned short ) 200 ) /* Can be as low as 60 but some of the demo tasks that use this constant require it to be higher. */
+#define configMINIMAL_STACK_SIZE		( ( unsigned short ) 150 ) /* Can be as low as 60 but some of the demo tasks that use this constant require it to be higher. */
-#define configTOTAL_HEAP_SIZE			( ( size_t ) ( 300 * 1024 ) )
+#define configTOTAL_HEAP_SIZE			( ( size_t ) ( 280 * 1024 ) )
 #define configMAX_TASK_NAME_LEN			( 16 )
 #define configUSE_TRACE_FACILITY		0
 #define configUSE_16_BIT_TICKS			0
@@ -145,7 +145,5 @@ header file. */
 
 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
 
-#define handle_m_ext_interrupt vPortHandleInterrupt
-
 
 #endif /* FREERTOS_CONFIG_H */

FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/Microsemi_Code/riscv_hal/entry.S

@@ -24,7 +24,7 @@
 #endif
 
   .section      .text.entry
-  .extern vPortTrapHandler
+  .extern vFreeRTOSPortTrapHandler
   .globl _start
 
 _start:
@@ -34,10 +34,10 @@ nmi_vector:
   j nmi_vector
 
 trap_vector:
-  j vPortTrapHandler
+  j vFreeRTOSPortTrapHandler
 
 handle_reset:
-  la t0, vPortTrapHandler
+  la t0, vFreeRTOSPortTrapHandler
   csrw mtvec, t0
   csrwi mstatus, 0
   csrwi mie, 0

FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/README.md

@@ -1,48 +0,0 @@
-## FreeRTOS port for Mi-V Soft Processor
-
-### HW Platform and FPGA design:
-This project is tested on following hardware platforms:
-
-RISCV-Creative-Board
-- [RISC-V Creative board Mi-V Sample Design](https://github.com/RISCV-on-Microsemi-FPGA/RISC-V-Creative-Board/tree/master/Programming_The_Target_Device/PROC_SUBSYSTEM_MIV_RV32IMA_BaseDesign)
-
-PolarFire-Eval-Kit
-- [PolarFire Eval Kit RISC-V Sample Design](https://github.com/RISCV-on-Microsemi-FPGA/PolarFire-Eval-Kit/tree/master/Programming_The_Target_Device/MIV_RV32IMA_L1_AHB_BaseDesign)
-
-SmartFusion2-Advanced-Dev-Kit
-- [SmartFusion2 Advanced Development Kit RISC-V Sample Design](https://github.com/RISCV-on-Microsemi-FPGA/SmartFusion2-Advanced-Dev-Kit/tree/master/Programming_The_Target_Device/PROC_SUBSYSTEM_BaseDesign)
-
-### How to run the FreeRTOS RISC-V port:
-To know how to use the SoftConsole workspace, please refer the [Readme.md](https://github.com/RISCV-on-Microsemi-FPGA/SoftConsole/blob/master/README.md)
-
-The miv-rv32im-freertos-port-test is a self contained project. This project demonstrates 
-the FreeRTOS running with Microsemi RISC-V processor. This project creates  two 
-tasks and runs them at regular intervals.
-    
-This example project requires USB-UART interface to be connected to a host PC. 
-The host PC must connect to the serial port using a terminal emulator such as 
-TeraTerm or PuTTY configured as follows:
-    
-        - 115200 baud
-        - 8 data bits
-        - 1 stop bit
-        - no parity
-        - no flow control
-    
-The ./hw_platform.h file contains the design related information that is required 
-for this project. If you update the design, the hw_platform.h must be updated 
-accordingly.
-
-### FreeRTOS Configurations
-You must configure the FreeRTOS as per your applications need. Please read and modify FreeRTOSConfig.h.
-E.g. You must set configCPU_CLOCK_HZ parameter in FreeRTOSConfig.h according to the hardware platform 
-design that you are using. 
-
-The RISC-V creative board design uses 66Mhz processor clock. The PolarFire Eval Kit design uses 50Mhz processor clock. The SmartFusion2 Adv. Development kit design uses 83Mhz processor clock.
-
-### Microsemi SoftConsole Toolchain
-To know more please refer: [SoftConsole](https://github.com/RISCV-on-Microsemi-FPGA/SoftConsole)
-
-### Documentation for Microsemi RISC-V processor, SoftConsole toochain, Debug Tools, FPGA design etc.
-To know more please refer: [Documentation](https://github.com/RISCV-on-Microsemi-FPGA/Documentation)
-    

FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/RTOSDemo Debug Hardware.launch

@@ -10,7 +10,7 @@
     <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbServer" value="true"/>
     <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.enableSemihosting" value="false"/>
     <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.firstResetType" value="init"/>
-    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherCommands" value="set mem inaccessible-by-default off&#13;&#10;set arch riscv:rv32"/>
+    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherCommands" value="set $target_riscv = 1&#13;&#10;set mem inaccessible-by-default off"/>
     <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherOptions" value=""/>
     <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerConnectionAddress" value=""/>
     <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerExecutable" value="${openocd_path}/${openocd_executable}"/>