mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-09-12 00:57:44 -04:00
Style: add uncrustify disable parsing for asm
This commit is contained in:
parent
888d5aa8b6
commit
1531d52a14
29 changed files with 1751 additions and 1583 deletions
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@ -29,9 +29,12 @@
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#ifndef PORTMACRO_H
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#define PORTMACRO_H
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/* *INDENT-OFF* */
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* *INDENT-ON* */
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/*-----------------------------------------------------------
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* Port specific definitions.
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@ -80,6 +83,7 @@
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#define portMPU_REGION_PRIVILEGED_READ_WRITE_UNPRIV_READ_ONLY ( 0x02UL << 24UL )
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#define portMPU_REGION_CACHEABLE_BUFFERABLE ( 0x07UL << 16UL )
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#define portMPU_REGION_EXECUTE_NEVER ( 0x01UL << 28UL )
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/* Location of the TEX,S,C,B bits in the MPU Region Attribute and Size
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* Register (RASR). */
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#define portMPU_RASR_TEX_S_C_B_LOCATION ( 16UL )
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@ -139,7 +143,7 @@
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| | | | | bus. See the table below for the cacheability policy | |
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| | | | | encoding. memory, BB=Outer policy, AA=Inner policy. | |
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+-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
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+-----------------------------------------+----------------------------------------+
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| AA or BB subfield of {TEX,C,B} encoding | Cacheability policy |
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+-----------------------------------------+----------------------------------------+
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@ -387,8 +391,11 @@
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#define configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY 0
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#endif
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/*-----------------------------------------------------------*/
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/* *INDENT-OFF* */
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#ifdef __cplusplus
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}
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#endif
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/* *INDENT-ON* */
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#endif /* PORTMACRO_H */
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@ -28,9 +28,11 @@
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#ifndef PORTMACRO_H
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#define PORTMACRO_H
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/* *INDENT-OFF* */
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* *INDENT-ON* */
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/*-----------------------------------------------------------
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* Port specific definitions.
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@ -99,8 +101,10 @@ extern void vPortYieldFromISR(void) __attribute__((naked));
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#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
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#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
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/* *INDENT-OFF* */
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#ifdef __cplusplus
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}
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#endif
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/* *INDENT-ON* */
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#endif /* PORTMACRO_H */
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@ -28,9 +28,11 @@
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#ifndef PORTMACRO_H
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#define PORTMACRO_H
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/* *INDENT-OFF* */
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* *INDENT-ON* */
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/*-----------------------------------------------------------
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* Port specific definitions.
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@ -99,8 +101,10 @@ extern void vPortYieldFromISR(void) __attribute__((naked));
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#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
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#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
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/* *INDENT-OFF* */
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#ifdef __cplusplus
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}
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#endif
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/* *INDENT-ON* */
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#endif /* PORTMACRO_H */
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@ -1051,7 +1051,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
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{
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uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
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int32_t lIndex = 0;
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#if defined( __ARMCC_VERSION )
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/* Declaration when these variable are defined in code instead of being
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* exported from linker scripts. */
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extern uint32_t * __privileged_sram_start__;
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@ -1079,8 +1081,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
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* using a separate MPU region. This is needed because privileged
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* SRAM is already protected using an MPU region and ARMv8-M does
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* not allow overlapping MPU regions. */
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if( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ &&
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ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ )
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if( ( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ ) &&
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( ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) )
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{
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xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0;
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xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0;
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@ -1051,7 +1051,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
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{
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uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
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int32_t lIndex = 0;
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#if defined( __ARMCC_VERSION )
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/* Declaration when these variable are defined in code instead of being
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* exported from linker scripts. */
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extern uint32_t * __privileged_sram_start__;
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@ -1079,8 +1081,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
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* using a separate MPU region. This is needed because privileged
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* SRAM is already protected using an MPU region and ARMv8-M does
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* not allow overlapping MPU regions. */
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if( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ &&
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ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ )
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if( ( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ ) &&
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( ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) )
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{
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xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0;
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xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0;
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@ -1051,7 +1051,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
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{
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uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
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int32_t lIndex = 0;
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#if defined( __ARMCC_VERSION )
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/* Declaration when these variable are defined in code instead of being
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* exported from linker scripts. */
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extern uint32_t * __privileged_sram_start__;
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@ -1079,8 +1081,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
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* using a separate MPU region. This is needed because privileged
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* SRAM is already protected using an MPU region and ARMv8-M does
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* not allow overlapping MPU regions. */
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if( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ &&
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ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ )
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if( ( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ ) &&
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( ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) )
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{
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xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0;
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xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0;
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#ifndef PORTMACRO_H
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#define PORTMACRO_H
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/* *INDENT-OFF* */
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* *INDENT-ON* */
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/*-----------------------------------------------------------
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* Port specific definitions.
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@ -83,6 +85,7 @@
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#define portMPU_REGION_PRIVILEGED_READ_WRITE_UNPRIV_READ_ONLY ( 0x02UL << 24UL )
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#define portMPU_REGION_CACHEABLE_BUFFERABLE ( 0x07UL << 16UL )
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#define portMPU_REGION_EXECUTE_NEVER ( 0x01UL << 28UL )
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/* Location of the TEX,S,C,B bits in the MPU Region Attribute and Size
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* Register (RASR). */
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#define portMPU_RASR_TEX_S_C_B_LOCATION ( 16UL )
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| | | | | bus. See the table below for the cacheability policy | |
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| | | | | encoding. memory, BB=Outer policy, AA=Inner policy. | |
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+-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
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+-----------------------------------------+----------------------------------------+
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| AA or BB subfield of {TEX,C,B} encoding | Cacheability policy |
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+-----------------------------------------+----------------------------------------+
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@ -345,8 +348,10 @@
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#pragma diag_suppress=Be006
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/*-----------------------------------------------------------*/
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/* *INDENT-OFF* */
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#ifdef __cplusplus
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}
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#endif
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/* *INDENT-ON* */
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#endif /* PORTMACRO_H */
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@ -45,8 +45,9 @@
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#define portNO_CRITICAL_NESTING ( ( UBaseType_t ) 0 )
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/* Stores the critical section nesting. This must not be initialised to 0.
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It will be initialised when a task starts. */
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* It will be initialised when a task starts. */
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UBaseType_t uxCriticalNesting = 0x50;
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/*
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* Setup timer to generate a tick interrupt.
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*/
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@ -64,37 +65,40 @@ extern void vPortStart( void );
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/*
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* See header file for description.
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*/
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StackType_t *pxPortInitialiseStack(StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters)
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StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
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TaskFunction_t pxCode,
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void * pvParameters )
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{
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uint16_t usAddress;
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StackType_t * pxTopOfHardwareStack;
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/* Simulate how the stack would look after a call to vPortYield(). */
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/*lint -e950 -e611 -e923 Lint doesn't like this much - but nothing I can do about it. */
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/* The IAR compiler requires two stacks per task. First there is the
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hardware call stack which uses the AVR stack pointer. Second there is the
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software stack (local variables, parameter passing, etc.) which uses the
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AVR Y register.
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This function places both stacks within the memory block passed in as the
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first parameter. The hardware stack is placed at the bottom of the memory
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block. A gap is then left for the hardware stack to grow. Next the software
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stack is placed. The amount of space between the software and hardware
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stacks is defined by configCALL_STACK_SIZE.
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The first part of the stack is the hardware stack. Place the start
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address of the task on the hardware stack. */
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* hardware call stack which uses the AVR stack pointer. Second there is the
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* software stack (local variables, parameter passing, etc.) which uses the
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* AVR Y register.
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* This function places both stacks within the memory block passed in as the
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* first parameter. The hardware stack is placed at the bottom of the memory
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* block. A gap is then left for the hardware stack to grow. Next the software
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* stack is placed. The amount of space between the software and hardware
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* stacks is defined by configCALL_STACK_SIZE.
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* The first part of the stack is the hardware stack. Place the start
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* address of the task on the hardware stack. */
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/* Place a few bytes of known values on the bottom of the stack.
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This is just useful for debugging. */
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//*pxTopOfStack = 0x11;
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//pxTopOfStack--;
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//*pxTopOfStack = 0x22;
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//pxTopOfStack--;
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//*pxTopOfStack = 0x33;
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//pxTopOfStack--;
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* This is just useful for debugging. */
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/**pxTopOfStack = 0x11; */
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/*pxTopOfStack--; */
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/**pxTopOfStack = 0x22; */
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/*pxTopOfStack--; */
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/**pxTopOfStack = 0x33; */
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/*pxTopOfStack--; */
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/* Remember where the top of the hardware stack is - this is required
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below. */
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* below. */
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pxTopOfHardwareStack = pxTopOfStack;
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usAddress = ( uint16_t ) pxCode;
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pxTopOfStack--;
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/* Leave enough space for the hardware stack before starting the software
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stack. The '- 2' is because we have already used two spaces for the
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address of the start of the task. */
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* stack. The '- 2' is because we have already used two spaces for the
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* address of the start of the task. */
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pxTopOfStack -= ( configCALL_STACK_SIZE - 2 );
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/* Next simulate the stack as if after a call to portSAVE_CONTEXT().
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portSAVE_CONTEXT places the flags on the stack immediately after r0
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to ensure the interrupts get disabled as soon as possible, and so ensuring
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the stack use is minimal should a context switch interrupt occur. */
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* portSAVE_CONTEXT places the flags on the stack immediately after r0
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* to ensure the interrupts get disabled as soon as possible, and so ensuring
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* the stack use is minimal should a context switch interrupt occur. */
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*pxTopOfStack = ( StackType_t ) 0x00; /* R0 */
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pxTopOfStack--;
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*pxTopOfStack = portFLAGS_INT_ENABLED;
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pxTopOfStack--;
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/* Next place the address of the hardware stack. This is required so
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the AVR stack pointer can be restored to point to the hardware stack. */
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* the AVR stack pointer can be restored to point to the hardware stack. */
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pxTopOfHardwareStack -= portBYTES_USED_BY_RETURN_ADDRESS;
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usAddress = ( uint16_t ) pxTopOfHardwareStack;
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@ -198,7 +202,7 @@ StackType_t *pxTopOfHardwareStack;
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pxTopOfStack--;
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/* The Y register is not stored as it is used as the software stack and
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gets saved into the task control block. */
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* gets saved into the task control block. */
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*pxTopOfStack = ( StackType_t ) 0x30; /* R30 Z */
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pxTopOfStack--;
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@ -219,8 +223,8 @@ BaseType_t xPortStartScheduler(void)
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prvSetupTimerInterrupt();
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/* Restore the context of the first task that is going to run.
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Normally we would just call portRESTORE_CONTEXT() here, but as the IAR
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compiler does not fully support inline assembler we have to make a call.*/
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* Normally we would just call portRESTORE_CONTEXT() here, but as the IAR
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* compiler does not fully support inline assembler we have to make a call.*/
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vPortStart();
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/* Should not get here. */
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@ -246,6 +250,7 @@ static void prvSetupTimerInterrupt(void)
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/*-----------------------------------------------------------*/
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#if configUSE_PREEMPTION == 1
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/*
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* Tick ISR for preemptive scheduler. We can use a naked attribute as
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* the context is saved at the start of vPortYieldFromTick(). The tick
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@ -258,6 +263,7 @@ __task void TICK_INT(void)
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asm ( "reti" );
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}
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#else
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/*
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* Tick ISR for the cooperative scheduler. All this does is increment the
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* tick count. We don't need to switch context, this can only be done by
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@ -271,7 +277,7 @@ __interrupt void TICK_INT(void)
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xTaskIncrementTick();
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}
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#endif
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#endif /* if configUSE_PREEMPTION == 1 */
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/*-----------------------------------------------------------*/
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@ -286,6 +292,7 @@ void vPortEnterCritical( void )
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void vPortExitCritical( void )
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{
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uxCriticalNesting--;
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if( uxCriticalNesting == portNO_CRITICAL_NESTING )
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{
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portENABLE_INTERRUPTS();
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@ -29,9 +29,11 @@
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#ifndef PORTMACRO_H
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#define PORTMACRO_H
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/* *INDENT-OFF* */
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* *INDENT-ON* */
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/*-----------------------------------------------------------
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* Port specific definitions.
|
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@ -98,8 +100,10 @@ extern void vPortYieldFromISR(void);
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#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
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#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
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/* *INDENT-OFF* */
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#ifdef __cplusplus
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}
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#endif
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/* *INDENT-ON* */
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#endif /* PORTMACRO_H */
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@ -45,8 +45,9 @@
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#define portNO_CRITICAL_NESTING ( ( UBaseType_t ) 0 )
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/* Stores the critical section nesting. This must not be initialised to 0.
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It will be initialised when a task starts. */
|
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* It will be initialised when a task starts. */
|
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UBaseType_t uxCriticalNesting = 0x50;
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|
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/*
|
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* Setup timer to generate a tick interrupt.
|
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*/
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|
@ -64,37 +65,40 @@ extern void vPortStart( void );
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/*
|
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* See header file for description.
|
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*/
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StackType_t *pxPortInitialiseStack(StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters)
|
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StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
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TaskFunction_t pxCode,
|
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void * pvParameters )
|
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{
|
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uint16_t usAddress;
|
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StackType_t * pxTopOfHardwareStack;
|
||||
|
||||
/* Simulate how the stack would look after a call to vPortYield(). */
|
||||
|
||||
/*lint -e950 -e611 -e923 Lint doesn't like this much - but nothing I can do about it. */
|
||||
|
||||
/* The IAR compiler requires two stacks per task. First there is the
|
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hardware call stack which uses the AVR stack pointer. Second there is the
|
||||
software stack (local variables, parameter passing, etc.) which uses the
|
||||
AVR Y register.
|
||||
This function places both stacks within the memory block passed in as the
|
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first parameter. The hardware stack is placed at the bottom of the memory
|
||||
block. A gap is then left for the hardware stack to grow. Next the software
|
||||
stack is placed. The amount of space between the software and hardware
|
||||
stacks is defined by configCALL_STACK_SIZE.
|
||||
The first part of the stack is the hardware stack. Place the start
|
||||
address of the task on the hardware stack. */
|
||||
* hardware call stack which uses the AVR stack pointer. Second there is the
|
||||
* software stack (local variables, parameter passing, etc.) which uses the
|
||||
* AVR Y register.
|
||||
* This function places both stacks within the memory block passed in as the
|
||||
* first parameter. The hardware stack is placed at the bottom of the memory
|
||||
* block. A gap is then left for the hardware stack to grow. Next the software
|
||||
* stack is placed. The amount of space between the software and hardware
|
||||
* stacks is defined by configCALL_STACK_SIZE.
|
||||
* The first part of the stack is the hardware stack. Place the start
|
||||
* address of the task on the hardware stack. */
|
||||
|
||||
/* Place a few bytes of known values on the bottom of the stack.
|
||||
This is just useful for debugging. */
|
||||
//*pxTopOfStack = 0x11;
|
||||
//pxTopOfStack--;
|
||||
//*pxTopOfStack = 0x22;
|
||||
//pxTopOfStack--;
|
||||
//*pxTopOfStack = 0x33;
|
||||
//pxTopOfStack--;
|
||||
* This is just useful for debugging. */
|
||||
/**pxTopOfStack = 0x11; */
|
||||
/*pxTopOfStack--; */
|
||||
/**pxTopOfStack = 0x22; */
|
||||
/*pxTopOfStack--; */
|
||||
/**pxTopOfStack = 0x33; */
|
||||
/*pxTopOfStack--; */
|
||||
|
||||
/* Remember where the top of the hardware stack is - this is required
|
||||
below. */
|
||||
* below. */
|
||||
pxTopOfHardwareStack = pxTopOfStack;
|
||||
|
||||
usAddress = ( uint16_t ) pxCode;
|
||||
|
@ -106,21 +110,21 @@ StackType_t *pxTopOfHardwareStack;
|
|||
pxTopOfStack--;
|
||||
|
||||
/* Leave enough space for the hardware stack before starting the software
|
||||
stack. The '- 2' is because we have already used two spaces for the
|
||||
address of the start of the task. */
|
||||
* stack. The '- 2' is because we have already used two spaces for the
|
||||
* address of the start of the task. */
|
||||
pxTopOfStack -= ( configCALL_STACK_SIZE - 2 );
|
||||
|
||||
/* Next simulate the stack as if after a call to portSAVE_CONTEXT().
|
||||
portSAVE_CONTEXT places the flags on the stack immediately after r0
|
||||
to ensure the interrupts get disabled as soon as possible, and so ensuring
|
||||
the stack use is minimal should a context switch interrupt occur. */
|
||||
* portSAVE_CONTEXT places the flags on the stack immediately after r0
|
||||
* to ensure the interrupts get disabled as soon as possible, and so ensuring
|
||||
* the stack use is minimal should a context switch interrupt occur. */
|
||||
*pxTopOfStack = ( StackType_t ) 0x00; /* R0 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = portFLAGS_INT_ENABLED;
|
||||
pxTopOfStack--;
|
||||
|
||||
/* Next place the address of the hardware stack. This is required so
|
||||
the AVR stack pointer can be restored to point to the hardware stack. */
|
||||
* the AVR stack pointer can be restored to point to the hardware stack. */
|
||||
pxTopOfHardwareStack -= portBYTES_USED_BY_RETURN_ADDRESS;
|
||||
usAddress = ( uint16_t ) pxTopOfHardwareStack;
|
||||
|
||||
|
@ -196,7 +200,7 @@ StackType_t *pxTopOfHardwareStack;
|
|||
pxTopOfStack--;
|
||||
|
||||
/* The Y register is not stored as it is used as the software stack and
|
||||
gets saved into the task control block. */
|
||||
* gets saved into the task control block. */
|
||||
|
||||
*pxTopOfStack = ( StackType_t ) 0x30; /* R30 Z */
|
||||
pxTopOfStack--;
|
||||
|
@ -217,8 +221,8 @@ BaseType_t xPortStartScheduler(void)
|
|||
prvSetupTimerInterrupt();
|
||||
|
||||
/* Restore the context of the first task that is going to run.
|
||||
Normally we would just call portRESTORE_CONTEXT() here, but as the IAR
|
||||
compiler does not fully support inline assembler we have to make a call.*/
|
||||
* Normally we would just call portRESTORE_CONTEXT() here, but as the IAR
|
||||
* compiler does not fully support inline assembler we have to make a call.*/
|
||||
vPortStart();
|
||||
|
||||
/* Should not get here. */
|
||||
|
@ -244,6 +248,7 @@ static void prvSetupTimerInterrupt(void)
|
|||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if configUSE_PREEMPTION == 1
|
||||
|
||||
/*
|
||||
* Tick ISR for preemptive scheduler. We can use a naked attribute as
|
||||
* the context is saved at the start of vPortYieldFromTick(). The tick
|
||||
|
@ -256,6 +261,7 @@ __task void TICK_INT(void)
|
|||
asm ( "reti" );
|
||||
}
|
||||
#else
|
||||
|
||||
/*
|
||||
* Tick ISR for the cooperative scheduler. All this does is increment the
|
||||
* tick count. We don't need to switch context, this can only be done by
|
||||
|
@ -269,7 +275,7 @@ __interrupt void TICK_INT(void)
|
|||
|
||||
xTaskIncrementTick();
|
||||
}
|
||||
#endif
|
||||
#endif /* if configUSE_PREEMPTION == 1 */
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
@ -284,6 +290,7 @@ void vPortEnterCritical( void )
|
|||
void vPortExitCritical( void )
|
||||
{
|
||||
uxCriticalNesting--;
|
||||
|
||||
if( uxCriticalNesting == portNO_CRITICAL_NESTING )
|
||||
{
|
||||
portENABLE_INTERRUPTS();
|
||||
|
|
|
@ -29,9 +29,11 @@
|
|||
#ifndef PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Port specific definitions.
|
||||
|
@ -98,8 +100,10 @@ extern void vPortYieldFromISR(void);
|
|||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
|
|
|
@ -246,6 +246,7 @@ static void prvTaskExitError( void )
|
|||
void vPortSVCHandler( void ) iv IVT_INT_SVCall ics ICS_OFF
|
||||
{
|
||||
__asm {
|
||||
/* *INDENT-OFF* */
|
||||
ldr r3, =_pxCurrentTCB /* Restore the context. */
|
||||
ldr r1, [ r3 ] /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */
|
||||
ldr r0, [ r1 ] /* The first item in pxCurrentTCB is the task top of stack. */
|
||||
|
@ -255,6 +256,7 @@ void vPortSVCHandler( void ) iv IVT_INT_SVCall ics ICS_OFF
|
|||
mov r0, #0
|
||||
msr basepri, r0
|
||||
bx r14
|
||||
/* *INDENT-ON* */
|
||||
};
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
@ -262,6 +264,7 @@ void vPortSVCHandler( void ) iv IVT_INT_SVCall ics ICS_OFF
|
|||
static void prvPortStartFirstTask( void )
|
||||
{
|
||||
__asm {
|
||||
/* *INDENT-OFF* */
|
||||
ldr r0, =0xE000ED08 /* Use the NVIC offset register to locate the stack. */
|
||||
ldr r0, [ r0 ]
|
||||
ldr r0, [ r0 ]
|
||||
|
@ -279,6 +282,7 @@ static void prvPortStartFirstTask( void )
|
|||
isb
|
||||
svc #0 /* System call to start first task. */
|
||||
nop
|
||||
/* *INDENT-ON* */
|
||||
};
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
@ -432,6 +436,7 @@ void xPortPendSVHandler( void ) iv IVT_INT_PendSV ics ICS_OFF
|
|||
{
|
||||
__asm {
|
||||
#ifdef HW_DEBUG
|
||||
/* *INDENT-OFF* */
|
||||
|
||||
/* The function is not truly naked, so add back the 4 bytes subtracted
|
||||
* from the stack pointer by the function prologue. */
|
||||
|
@ -474,6 +479,7 @@ void xPortPendSVHandler( void ) iv IVT_INT_PendSV ics ICS_OFF
|
|||
msr psp, r0
|
||||
isb
|
||||
bx r14
|
||||
/* *INDENT-ON* */
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
@ -730,12 +736,14 @@ void xPortSysTickHandler( void ) iv IVT_INT_SysTick ics ICS_AUTO
|
|||
static void vPortEnableVFP( void )
|
||||
{
|
||||
__asm {
|
||||
/* *INDENT-OFF* */
|
||||
ldr r0, =0xE000ED88 /* The FPU enable bits are in the CPACR. */
|
||||
ldr r1, [ r0 ]
|
||||
|
||||
orr r1, r1, #0xF00000 /* Enable CP10 and CP11 coprocessors, then save back. */
|
||||
str r1, [ r0 ]
|
||||
bx r14
|
||||
/* *INDENT-ON* */
|
||||
};
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
@ -772,11 +780,13 @@ BaseType_t xPortIsInsideInterrupt( void )
|
|||
{
|
||||
/* Obtain the number of the currently executing interrupt. */
|
||||
__asm {
|
||||
/* *INDENT-OFF* */
|
||||
push( r0, r1 )
|
||||
mrs r0, ipsr
|
||||
ldr r1, =_ulCurrentInterrupt
|
||||
str r0, [ r1 ]
|
||||
pop( r0, r1 )
|
||||
/* *INDENT-ON* */
|
||||
};
|
||||
|
||||
/* Is the interrupt number a user defined interrupt? */
|
||||
|
|
|
@ -177,6 +177,7 @@ __asm void prvPortStartFirstTask( void )
|
|||
/* The MSP stack is not reset as, unlike on M3/4 parts, there is no vector
|
||||
* table offset register that can be used to locate the initial stack value.
|
||||
* Not all M0 parts have the application vector table at address 0. */
|
||||
/* *INDENT-OFF* */
|
||||
|
||||
ldr r3, = pxCurrentTCB /* Obtain location of pxCurrentTCB. */
|
||||
ldr r1, [ r3 ]
|
||||
|
@ -200,6 +201,7 @@ __asm void prvPortStartFirstTask( void )
|
|||
bx r3 /* Finally, jump to the user defined task code. */
|
||||
|
||||
ALIGN
|
||||
/* *INDENT-ON* */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
@ -289,6 +291,7 @@ __asm void xPortPendSVHandler( void )
|
|||
extern vTaskSwitchContext
|
||||
extern pxCurrentTCB
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
PRESERVE8
|
||||
|
||||
mrs r0, psp
|
||||
|
@ -339,6 +342,7 @@ __asm void xPortPendSVHandler( void )
|
|||
|
||||
bx r3
|
||||
ALIGN
|
||||
/* *INDENT-ON* */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
@ -213,6 +213,7 @@ static void prvTaskExitError( void )
|
|||
|
||||
__asm void vPortSVCHandler( void )
|
||||
{
|
||||
/* *INDENT-OFF* */
|
||||
PRESERVE8
|
||||
|
||||
ldr r3, = pxCurrentTCB /* Restore the context. */
|
||||
|
@ -227,11 +228,13 @@ __asm void vPortSVCHandler( void )
|
|||
msr basepri, r0
|
||||
orr r14, # 0xd
|
||||
bx r14
|
||||
/* *INDENT-ON* */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
__asm void prvStartFirstTask( void )
|
||||
{
|
||||
/* *INDENT-OFF* */
|
||||
PRESERVE8
|
||||
|
||||
/* Use the NVIC offset register to locate the stack. */
|
||||
|
@ -250,6 +253,7 @@ __asm void prvStartFirstTask( void )
|
|||
svc 0
|
||||
nop
|
||||
nop
|
||||
/* *INDENT-ON* */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
@ -388,6 +392,7 @@ __asm void xPortPendSVHandler( void )
|
|||
extern pxCurrentTCB;
|
||||
extern vTaskSwitchContext;
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
PRESERVE8
|
||||
|
||||
mrs r0, psp
|
||||
|
@ -424,6 +429,7 @@ __asm void xPortPendSVHandler( void )
|
|||
isb
|
||||
bx r14
|
||||
nop
|
||||
/* *INDENT-ON* */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
@ -651,10 +657,12 @@ void xPortSysTickHandler( void )
|
|||
|
||||
__asm uint32_t vPortGetIPSR( void )
|
||||
{
|
||||
/* *INDENT-OFF* */
|
||||
PRESERVE8
|
||||
|
||||
mrs r0, ipsr
|
||||
bx r14
|
||||
/* *INDENT-ON* */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
@ -240,6 +240,7 @@ static void prvTaskExitError( void )
|
|||
|
||||
__asm void vPortSVCHandler( void )
|
||||
{
|
||||
/* *INDENT-OFF* */
|
||||
PRESERVE8
|
||||
|
||||
/* Get the location of the current TCB. */
|
||||
|
@ -255,11 +256,13 @@ __asm void vPortSVCHandler( void )
|
|||
mov r0, # 0
|
||||
msr basepri, r0
|
||||
bx r14
|
||||
/* *INDENT-ON* */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
__asm void prvStartFirstTask( void )
|
||||
{
|
||||
/* *INDENT-OFF* */
|
||||
PRESERVE8
|
||||
|
||||
/* Use the NVIC offset register to locate the stack. */
|
||||
|
@ -284,11 +287,13 @@ __asm void prvStartFirstTask( void )
|
|||
svc 0
|
||||
nop
|
||||
nop
|
||||
/* *INDENT-ON* */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
__asm void prvEnableVFP( void )
|
||||
{
|
||||
/* *INDENT-OFF* */
|
||||
PRESERVE8
|
||||
|
||||
/* The FPU enable bits are in the CPACR. */
|
||||
|
@ -300,6 +305,7 @@ __asm void prvEnableVFP( void )
|
|||
str r1, [ r0 ]
|
||||
bx r14
|
||||
nop
|
||||
/* *INDENT-ON* */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
@ -453,6 +459,7 @@ __asm void xPortPendSVHandler( void )
|
|||
extern pxCurrentTCB;
|
||||
extern vTaskSwitchContext;
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
PRESERVE8
|
||||
|
||||
mrs r0, psp
|
||||
|
@ -522,6 +529,7 @@ __asm void xPortPendSVHandler( void )
|
|||
#endif
|
||||
|
||||
bx r14
|
||||
/* *INDENT-ON* */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
@ -749,10 +757,12 @@ void xPortSysTickHandler( void )
|
|||
|
||||
__asm uint32_t vPortGetIPSR( void )
|
||||
{
|
||||
/* *INDENT-OFF* */
|
||||
PRESERVE8
|
||||
|
||||
mrs r0, ipsr
|
||||
bx r14
|
||||
/* *INDENT-ON* */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
@ -310,6 +310,7 @@ __asm void vPortSVCHandler( void )
|
|||
{
|
||||
extern prvSVCHandler
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
PRESERVE8
|
||||
|
||||
/* Assumes psp was in use. */
|
||||
|
@ -323,11 +324,13 @@ __asm void vPortSVCHandler( void )
|
|||
#endif
|
||||
|
||||
b prvSVCHandler
|
||||
/* *INDENT-ON* */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
__asm void prvRestoreContextOfFirstTask( void )
|
||||
{
|
||||
/* *INDENT-OFF* */
|
||||
PRESERVE8
|
||||
|
||||
ldr r0, =0xE000ED08 /* Use the NVIC offset register to locate the stack. */
|
||||
|
@ -346,14 +349,26 @@ __asm void prvRestoreContextOfFirstTask( void )
|
|||
str r3, [ r2 ] /* Disable MPU. */
|
||||
|
||||
ldr r2, =0xe000ed9c /* Region Base Address register. */
|
||||
ldmia r1!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
|
||||
stmia r2, {r4-r11} /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
|
||||
ldmia r1 !, {
|
||||
r4 - r11
|
||||
} /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
|
||||
stmia r2, {
|
||||
r4 - r11
|
||||
} /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
|
||||
|
||||
#if ( portTOTAL_NUM_REGIONS == 16 )
|
||||
ldmia r1!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
|
||||
stmia r2, {r4-r11} /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
|
||||
ldmia r1!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
|
||||
stmia r2, {r4-r11} /* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
|
||||
ldmia r1 !, {
|
||||
r4 - r11
|
||||
} /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
|
||||
stmia r2, {
|
||||
r4 - r11
|
||||
} /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
|
||||
ldmia r1 !, {
|
||||
r4 - r11
|
||||
} /* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
|
||||
stmia r2, {
|
||||
r4 - r11
|
||||
} /* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
|
||||
#endif /* portTOTAL_NUM_REGIONS == 16. */
|
||||
|
||||
ldr r2, =0xe000ed94 /* MPU_CTRL register. */
|
||||
|
@ -362,13 +377,16 @@ __asm void prvRestoreContextOfFirstTask( void )
|
|||
str r3, [ r2 ] /* Enable MPU. */
|
||||
dsb /* Force memory writes before continuing. */
|
||||
|
||||
ldmia r0!, {r3-r11, r14} /* Pop the registers that are not automatically saved on exception entry. */
|
||||
ldmia r0 !, {
|
||||
r3 - r11, r14
|
||||
} /* Pop the registers that are not automatically saved on exception entry. */
|
||||
msr control, r3
|
||||
msr psp, r0 /* Restore the task stack pointer. */
|
||||
mov r0, #0
|
||||
msr basepri, r0
|
||||
bx r14
|
||||
nop
|
||||
/* *INDENT-ON* */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
@ -476,6 +494,7 @@ BaseType_t xPortStartScheduler( void )
|
|||
|
||||
__asm void prvStartFirstTask( void )
|
||||
{
|
||||
/* *INDENT-OFF* */
|
||||
PRESERVE8
|
||||
|
||||
/* Use the NVIC offset register to locate the stack. */
|
||||
|
@ -499,6 +518,7 @@ __asm void prvStartFirstTask( void )
|
|||
svc portSVC_START_SCHEDULER /* System call to start first task. */
|
||||
nop
|
||||
nop
|
||||
/* *INDENT-ON* */
|
||||
}
|
||||
|
||||
void vPortEndScheduler( void )
|
||||
|
@ -542,6 +562,7 @@ __asm void xPortPendSVHandler( void )
|
|||
extern pxCurrentTCB;
|
||||
extern vTaskSwitchContext;
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
PRESERVE8
|
||||
|
||||
mrs r0, psp
|
||||
|
@ -551,13 +572,19 @@ __asm void xPortPendSVHandler( void )
|
|||
|
||||
tst r14, #0x10 /* Is the task using the FPU context? If so, push high vfp registers. */
|
||||
it eq
|
||||
vstmdbeq r0!, {s16-s31}
|
||||
vstmdbeq r0 !, {
|
||||
s16 - s31
|
||||
}
|
||||
|
||||
mrs r1, control
|
||||
stmdb r0!, {r1, r4-r11, r14} /* Save the remaining registers. */
|
||||
stmdb r0 !, {
|
||||
r1, r4 - r11, r14
|
||||
} /* Save the remaining registers. */
|
||||
str r0, [ r2 ] /* Save the new top of stack into the first member of the TCB. */
|
||||
|
||||
stmdb sp!, {r0, r3}
|
||||
stmdb sp !, {
|
||||
r0, r3
|
||||
}
|
||||
mov r0, # configMAX_SYSCALL_INTERRUPT_PRIORITY
|
||||
msr basepri, r0
|
||||
dsb
|
||||
|
@ -565,7 +592,9 @@ __asm void xPortPendSVHandler( void )
|
|||
bl vTaskSwitchContext
|
||||
mov r0, #0
|
||||
msr basepri, r0
|
||||
ldmia sp!, {r0, r3}
|
||||
ldmia sp !, {
|
||||
r0, r3
|
||||
}
|
||||
/* Restore the context. */
|
||||
ldr r1, [ r3 ]
|
||||
ldr r0, [ r1 ] /* The first item in the TCB is the task top of stack. */
|
||||
|
@ -578,14 +607,26 @@ __asm void xPortPendSVHandler( void )
|
|||
str r3, [ r2 ] /* Disable MPU. */
|
||||
|
||||
ldr r2, =0xe000ed9c /* Region Base Address register. */
|
||||
ldmia r1!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
|
||||
stmia r2, {r4-r11} /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
|
||||
ldmia r1 !, {
|
||||
r4 - r11
|
||||
} /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
|
||||
stmia r2, {
|
||||
r4 - r11
|
||||
} /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
|
||||
|
||||
#if ( portTOTAL_NUM_REGIONS == 16 )
|
||||
ldmia r1!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
|
||||
stmia r2, {r4-r11} /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
|
||||
ldmia r1!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
|
||||
stmia r2, {r4-r11} /* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
|
||||
ldmia r1 !, {
|
||||
r4 - r11
|
||||
} /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
|
||||
stmia r2, {
|
||||
r4 - r11
|
||||
} /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
|
||||
ldmia r1 !, {
|
||||
r4 - r11
|
||||
} /* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
|
||||
stmia r2, {
|
||||
r4 - r11
|
||||
} /* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
|
||||
#endif /* portTOTAL_NUM_REGIONS == 16. */
|
||||
|
||||
ldr r2, =0xe000ed94 /* MPU_CTRL register. */
|
||||
|
@ -594,16 +635,21 @@ __asm void xPortPendSVHandler( void )
|
|||
str r3, [ r2 ] /* Enable MPU. */
|
||||
dsb /* Force memory writes before continuing. */
|
||||
|
||||
ldmia r0!, {r3-r11, r14} /* Pop the registers that are not automatically saved on exception entry. */
|
||||
ldmia r0 !, {
|
||||
r3 - r11, r14
|
||||
} /* Pop the registers that are not automatically saved on exception entry. */
|
||||
msr control, r3
|
||||
|
||||
tst r14, #0x10 /* Is the task using the FPU context? If so, pop the high vfp registers too. */
|
||||
it eq
|
||||
vldmiaeq r0!, {s16-s31}
|
||||
vldmiaeq r0 !, {
|
||||
s16 - s31
|
||||
}
|
||||
|
||||
msr psp, r0
|
||||
bx r14
|
||||
nop
|
||||
/* *INDENT-ON* */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
@ -642,17 +688,20 @@ __weak void vSetupTimerInterrupt( void )
|
|||
|
||||
__asm void vPortSwitchToUserMode( void )
|
||||
{
|
||||
/* *INDENT-OFF* */
|
||||
PRESERVE8
|
||||
|
||||
mrs r0, control
|
||||
orr r0, #1
|
||||
msr control, r0
|
||||
bx r14
|
||||
/* *INDENT-ON* */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
__asm void vPortEnableVFP( void )
|
||||
{
|
||||
/* *INDENT-OFF* */
|
||||
PRESERVE8
|
||||
|
||||
ldr.w r0, =0xE000ED88 /* The FPU enable bits are in the CPACR. */
|
||||
|
@ -663,6 +712,7 @@ __asm void vPortEnableVFP( void )
|
|||
bx r14
|
||||
nop
|
||||
nop
|
||||
/* *INDENT-ON* */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
@ -761,6 +811,7 @@ static uint32_t prvGetMPURegionSizeSetting( uint32_t ulActualSizeInBytes )
|
|||
|
||||
__asm BaseType_t xIsPrivileged( void )
|
||||
{
|
||||
/* *INDENT-OFF* */
|
||||
PRESERVE8
|
||||
|
||||
mrs r0, control /* r0 = CONTROL. */
|
||||
|
@ -769,17 +820,20 @@ __asm BaseType_t xIsPrivileged( void )
|
|||
movne r0, #0 /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
|
||||
moveq r0, #1 /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
|
||||
bx lr /* Return. */
|
||||
/* *INDENT-ON* */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
__asm void vResetPrivilege( void )
|
||||
{
|
||||
/* *INDENT-OFF* */
|
||||
PRESERVE8
|
||||
|
||||
mrs r0, control /* r0 = CONTROL. */
|
||||
orrs r0, #1 /* r0 = r0 | 1. */
|
||||
msr control, r0 /* CONTROL = r0. */
|
||||
bx lr /* Return. */
|
||||
/* *INDENT-ON* */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
@ -886,10 +940,12 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
|||
|
||||
__asm uint32_t prvPortGetIPSR( void )
|
||||
{
|
||||
/* *INDENT-OFF* */
|
||||
PRESERVE8
|
||||
|
||||
mrs r0, ipsr
|
||||
bx r14
|
||||
/* *INDENT-ON* */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
@ -29,9 +29,11 @@
|
|||
#ifndef PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Port specific definitions.
|
||||
|
@ -80,6 +82,7 @@
|
|||
#define portMPU_REGION_PRIVILEGED_READ_WRITE_UNPRIV_READ_ONLY ( 0x02UL << 24UL )
|
||||
#define portMPU_REGION_CACHEABLE_BUFFERABLE ( 0x07UL << 16UL )
|
||||
#define portMPU_REGION_EXECUTE_NEVER ( 0x01UL << 28UL )
|
||||
|
||||
/* Location of the TEX,S,C,B bits in the MPU Region Attribute and Size
|
||||
* Register (RASR). */
|
||||
#define portMPU_RASR_TEX_S_C_B_LOCATION ( 16UL )
|
||||
|
@ -139,7 +142,7 @@
|
|||
| | | | | bus. See the table below for the cacheability policy | |
|
||||
| | | | | encoding. memory, BB=Outer policy, AA=Inner policy. | |
|
||||
+-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
|
||||
|
||||
|
|
||||
+-----------------------------------------+----------------------------------------+
|
||||
| AA or BB subfield of {TEX,C,B} encoding | Cacheability policy |
|
||||
+-----------------------------------------+----------------------------------------+
|
||||
|
@ -314,7 +317,9 @@
|
|||
{
|
||||
/* Barrier instructions are not used as this function is only used to
|
||||
* lower the BASEPRI value. */
|
||||
/* *INDENT-OFF* */
|
||||
msr basepri, ulBASEPRI
|
||||
/* *INDENT-ON* */
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
@ -327,9 +332,11 @@
|
|||
{
|
||||
/* Set BASEPRI to the max syscall priority to effect a critical
|
||||
* section. */
|
||||
/* *INDENT-OFF* */
|
||||
msr basepri, ulNewBASEPRI
|
||||
dsb
|
||||
isb
|
||||
/* *INDENT-ON* */
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
@ -341,7 +348,9 @@
|
|||
/* Set BASEPRI to 0 so no interrupts are masked. This function is only
|
||||
* used to lower the mask in an interrupt, so memory barriers are not
|
||||
* used. */
|
||||
/* *INDENT-OFF* */
|
||||
msr basepri, # 0
|
||||
/* *INDENT-ON* */
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
@ -354,10 +363,12 @@
|
|||
{
|
||||
/* Set BASEPRI to the max syscall priority to effect a critical
|
||||
* section. */
|
||||
/* *INDENT-OFF* */
|
||||
mrs ulReturn, basepri
|
||||
msr basepri, ulNewBASEPRI
|
||||
dsb
|
||||
isb
|
||||
/* *INDENT-ON* */
|
||||
}
|
||||
|
||||
return ulReturn;
|
||||
|
@ -394,8 +405,10 @@
|
|||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
|
|
|
@ -236,6 +236,7 @@ __asm void vPortSVCHandler( void )
|
|||
{
|
||||
PRESERVE8
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
/* Get the location of the current TCB. */
|
||||
ldr r3, =pxCurrentTCB
|
||||
ldr r1, [ r3 ]
|
||||
|
@ -249,11 +250,13 @@ __asm void vPortSVCHandler( void )
|
|||
mov r0, #0
|
||||
msr basepri, r0
|
||||
bx r14
|
||||
/* *INDENT-ON* */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
__asm void prvStartFirstTask( void )
|
||||
{
|
||||
/* *INDENT-OFF* */
|
||||
PRESERVE8
|
||||
|
||||
/* Use the NVIC offset register to locate the stack. */
|
||||
|
@ -278,11 +281,13 @@ __asm void prvStartFirstTask( void )
|
|||
svc 0
|
||||
nop
|
||||
nop
|
||||
/* *INDENT-ON* */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
__asm void prvEnableVFP( void )
|
||||
{
|
||||
/* *INDENT-OFF* */
|
||||
PRESERVE8
|
||||
|
||||
/* The FPU enable bits are in the CPACR. */
|
||||
|
@ -294,6 +299,7 @@ __asm void prvEnableVFP( void )
|
|||
str r1, [ r0 ]
|
||||
bx r14
|
||||
nop
|
||||
/* *INDENT-ON* */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
@ -438,6 +444,7 @@ __asm void xPortPendSVHandler( void )
|
|||
extern pxCurrentTCB;
|
||||
extern vTaskSwitchContext;
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
PRESERVE8
|
||||
|
||||
mrs r0, psp
|
||||
|
@ -509,6 +516,7 @@ __asm void xPortPendSVHandler( void )
|
|||
#endif
|
||||
|
||||
bx r14
|
||||
/* *INDENT-ON* */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
@ -736,10 +744,12 @@ void xPortSysTickHandler( void )
|
|||
|
||||
__asm uint32_t vPortGetIPSR( void )
|
||||
{
|
||||
/* *INDENT-OFF* */
|
||||
PRESERVE8
|
||||
|
||||
mrs r0, ipsr
|
||||
bx r14
|
||||
/* *INDENT-ON* */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
@ -55,6 +55,7 @@
|
|||
extern void __mw_run_tls_ctor();
|
||||
|
||||
extern uint32_t exc_nest_count;
|
||||
|
||||
/*
|
||||
* Linker generated symbols to mark .tls section addresses
|
||||
* first byte .. last byte
|
||||
|
|
|
@ -28,9 +28,11 @@
|
|||
#ifndef PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
/* record stack high address for stack check */
|
||||
#ifndef configRECORD_STACK_HIGH_ADDRESS
|
||||
|
@ -148,8 +150,10 @@
|
|||
void vPortYield( void );
|
||||
void vPortYieldFromIsr( void );
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
|
|
|
@ -66,9 +66,11 @@
|
|||
#ifndef PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
#ifndef __ASSEMBLER__
|
||||
|
||||
|
@ -491,8 +493,10 @@
|
|||
|
||||
#endif // __ASSEMBLER__
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue