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Style: add uncrustify disable parsing for asm

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This commit is contained in:
Alfred Gedeon 2020-08-13 12:16:28 -07:00
parent 888d5aa8b6
commit 1531d52a14
29 changed files with 1751 additions and 1583 deletions
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223
portable/GCC/ARM_CM4_MPU/portmacro.h
View file

@ -27,11 +27,14 @@
#ifndef PORTMACRO_H #ifndef PORTMACRO_H
#define PORTMACRO_H #define PORTMACRO_H
#ifdef __cplusplus
/* *INDENT-OFF* */
#ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* *INDENT-ON* */
/*----------------------------------------------------------- /*-----------------------------------------------------------
* Port specific definitions. * Port specific definitions.
@ -44,54 +47,55 @@
*/ */
/* Type definitions. */ /* Type definitions. */
#define portCHAR char #define portCHAR char
#define portFLOAT float #define portFLOAT float
#define portDOUBLE double #define portDOUBLE double
#define portLONG long #define portLONG long
#define portSHORT short #define portSHORT short
#define portSTACK_TYPE uint32_t #define portSTACK_TYPE uint32_t
#define portBASE_TYPE long #define portBASE_TYPE long
typedef portSTACK_TYPE StackType_t; typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t; typedef long BaseType_t;
typedef unsigned long UBaseType_t; typedef unsigned long UBaseType_t;
#if ( configUSE_16_BIT_TICKS == 1 ) #if ( configUSE_16_BIT_TICKS == 1 )
typedef uint16_t TickType_t; typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff #define portMAX_DELAY ( TickType_t ) 0xffff
#else #else
typedef uint32_t TickType_t; typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
* not need to be guarded with a critical section. */ * not need to be guarded with a critical section. */
#define portTICK_TYPE_IS_ATOMIC 1 #define portTICK_TYPE_IS_ATOMIC 1
#endif #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* MPU specific constants. */ /* MPU specific constants. */
#define portUSING_MPU_WRAPPERS 1 #define portUSING_MPU_WRAPPERS 1
#define portPRIVILEGE_BIT ( 0x80000000UL ) #define portPRIVILEGE_BIT ( 0x80000000UL )
#define portMPU_REGION_READ_WRITE ( 0x03UL << 24UL ) #define portMPU_REGION_READ_WRITE ( 0x03UL << 24UL )
#define portMPU_REGION_PRIVILEGED_READ_ONLY ( 0x05UL << 24UL ) #define portMPU_REGION_PRIVILEGED_READ_ONLY ( 0x05UL << 24UL )
#define portMPU_REGION_READ_ONLY ( 0x06UL << 24UL ) #define portMPU_REGION_READ_ONLY ( 0x06UL << 24UL )
#define portMPU_REGION_PRIVILEGED_READ_WRITE ( 0x01UL << 24UL ) #define portMPU_REGION_PRIVILEGED_READ_WRITE ( 0x01UL << 24UL )
#define portMPU_REGION_PRIVILEGED_READ_WRITE_UNPRIV_READ_ONLY ( 0x02UL << 24UL ) #define portMPU_REGION_PRIVILEGED_READ_WRITE_UNPRIV_READ_ONLY ( 0x02UL << 24UL )
#define portMPU_REGION_CACHEABLE_BUFFERABLE ( 0x07UL << 16UL ) #define portMPU_REGION_CACHEABLE_BUFFERABLE ( 0x07UL << 16UL )
#define portMPU_REGION_EXECUTE_NEVER ( 0x01UL << 28UL ) #define portMPU_REGION_EXECUTE_NEVER ( 0x01UL << 28UL )
/* Location of the TEX,S,C,B bits in the MPU Region Attribute and Size
/* Location of the TEX,S,C,B bits in the MPU Region Attribute and Size
* Register (RASR). */ * Register (RASR). */
#define portMPU_RASR_TEX_S_C_B_LOCATION ( 16UL ) #define portMPU_RASR_TEX_S_C_B_LOCATION ( 16UL )
#define portMPU_RASR_TEX_S_C_B_MASK ( 0x3FUL ) #define portMPU_RASR_TEX_S_C_B_MASK ( 0x3FUL )
/* MPU settings that can be overriden in FreeRTOSConfig.h. */ /* MPU settings that can be overriden in FreeRTOSConfig.h. */
#ifndef configTOTAL_MPU_REGIONS #ifndef configTOTAL_MPU_REGIONS
/* Define to 8 for backward compatibility. */ /* Define to 8 for backward compatibility. */
#define configTOTAL_MPU_REGIONS ( 8UL ) #define configTOTAL_MPU_REGIONS ( 8UL )
#endif #endif
/* /*
* The TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits define the * The TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits define the
* memory type, and where necessary the cacheable and shareable properties * memory type, and where necessary the cacheable and shareable properties
* of the memory region. * of the memory region.
@ -139,7 +143,7 @@
| | | | | bus. See the table below for the cacheability policy | | | | | | | bus. See the table below for the cacheability policy | |
| | | | | encoding. memory, BB=Outer policy, AA=Inner policy. | | | | | | | encoding. memory, BB=Outer policy, AA=Inner policy. | |
+-----+---+---+------------------------+--------------------------------------------------------+-------------------------+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
|
+-----------------------------------------+----------------------------------------+ +-----------------------------------------+----------------------------------------+
| AA or BB subfield of {TEX,C,B} encoding | Cacheability policy | | AA or BB subfield of {TEX,C,B} encoding | Cacheability policy |
+-----------------------------------------+----------------------------------------+ +-----------------------------------------+----------------------------------------+
@ -153,60 +157,60 @@
+-----------------------------------------+----------------------------------------+ +-----------------------------------------+----------------------------------------+
*/ */
/* TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits for flash /* TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits for flash
* region. */ * region. */
#ifndef configTEX_S_C_B_FLASH #ifndef configTEX_S_C_B_FLASH
/* Default to TEX=000, S=1, C=1, B=1 for backward compatibility. */ /* Default to TEX=000, S=1, C=1, B=1 for backward compatibility. */
#define configTEX_S_C_B_FLASH ( 0x07UL ) #define configTEX_S_C_B_FLASH ( 0x07UL )
#endif #endif
/* TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits for RAM /* TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits for RAM
* region. */ * region. */
#ifndef configTEX_S_C_B_SRAM #ifndef configTEX_S_C_B_SRAM
/* Default to TEX=000, S=1, C=1, B=1 for backward compatibility. */ /* Default to TEX=000, S=1, C=1, B=1 for backward compatibility. */
#define configTEX_S_C_B_SRAM ( 0x07UL ) #define configTEX_S_C_B_SRAM ( 0x07UL )
#endif #endif
#define portUNPRIVILEGED_FLASH_REGION ( 0UL ) #define portUNPRIVILEGED_FLASH_REGION ( 0UL )
#define portPRIVILEGED_FLASH_REGION ( 1UL ) #define portPRIVILEGED_FLASH_REGION ( 1UL )
#define portPRIVILEGED_RAM_REGION ( 2UL ) #define portPRIVILEGED_RAM_REGION ( 2UL )
#define portGENERAL_PERIPHERALS_REGION ( 3UL ) #define portGENERAL_PERIPHERALS_REGION ( 3UL )
#define portSTACK_REGION ( 4UL ) #define portSTACK_REGION ( 4UL )
#define portFIRST_CONFIGURABLE_REGION ( 5UL ) #define portFIRST_CONFIGURABLE_REGION ( 5UL )
#define portTOTAL_NUM_REGIONS ( configTOTAL_MPU_REGIONS ) #define portTOTAL_NUM_REGIONS ( configTOTAL_MPU_REGIONS )
#define portNUM_CONFIGURABLE_REGIONS ( portTOTAL_NUM_REGIONS - portFIRST_CONFIGURABLE_REGION ) #define portNUM_CONFIGURABLE_REGIONS ( portTOTAL_NUM_REGIONS - portFIRST_CONFIGURABLE_REGION )
#define portLAST_CONFIGURABLE_REGION ( portTOTAL_NUM_REGIONS - 1 ) #define portLAST_CONFIGURABLE_REGION ( portTOTAL_NUM_REGIONS - 1 )
#define portSWITCH_TO_USER_MODE() __asm volatile ( " mrs r0, control \n orr r0, #1 \n msr control, r0 " ::: "r0", "memory" ) #define portSWITCH_TO_USER_MODE() __asm volatile ( " mrs r0, control \n orr r0, #1 \n msr control, r0 " ::: "r0", "memory" )
typedef struct MPU_REGION_REGISTERS typedef struct MPU_REGION_REGISTERS
{ {
uint32_t ulRegionBaseAddress; uint32_t ulRegionBaseAddress;
uint32_t ulRegionAttribute; uint32_t ulRegionAttribute;
} xMPU_REGION_REGISTERS; } xMPU_REGION_REGISTERS;
/* Plus 1 to create space for the stack region. */ /* Plus 1 to create space for the stack region. */
typedef struct MPU_SETTINGS typedef struct MPU_SETTINGS
{ {
xMPU_REGION_REGISTERS xRegion[ portTOTAL_NUM_REGIONS ]; xMPU_REGION_REGISTERS xRegion[ portTOTAL_NUM_REGIONS ];
} xMPU_SETTINGS; } xMPU_SETTINGS;
/* Architecture specifics. */ /* Architecture specifics. */
#define portSTACK_GROWTH ( -1 ) #define portSTACK_GROWTH ( -1 )
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ ) #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 8 #define portBYTE_ALIGNMENT 8
#define portDONT_DISCARD __attribute__( ( used ) ) #define portDONT_DISCARD __attribute__( ( used ) )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* SVC numbers for various services. */ /* SVC numbers for various services. */
#define portSVC_START_SCHEDULER 0 #define portSVC_START_SCHEDULER 0
#define portSVC_YIELD 1 #define portSVC_YIELD 1
#define portSVC_RAISE_PRIVILEGE 2 #define portSVC_RAISE_PRIVILEGE 2
/* Scheduler utilities. */ /* Scheduler utilities. */
#define portYIELD() __asm volatile ( " SVC %0 \n"::"i" ( portSVC_YIELD ) : "memory" ) #define portYIELD() __asm volatile ( " SVC %0 \n"::"i" ( portSVC_YIELD ) : "memory" )
#define portYIELD_WITHIN_API() \ #define portYIELD_WITHIN_API() \
{ \ { \
/* Set a PendSV to request a context switch. */ \ /* Set a PendSV to request a context switch. */ \
portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
@ -217,37 +221,37 @@
__asm volatile ( "isb" ); \ __asm volatile ( "isb" ); \
} }
#define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT #define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Critical section management. */ /* Critical section management. */
extern void vPortEnterCritical( void ); extern void vPortEnterCritical( void );
extern void vPortExitCritical( void ); extern void vPortExitCritical( void );
#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortRaiseBASEPRI() #define portSET_INTERRUPT_MASK_FROM_ISR() ulPortRaiseBASEPRI()
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vPortSetBASEPRI( x ) #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vPortSetBASEPRI( x )
#define portDISABLE_INTERRUPTS() vPortRaiseBASEPRI() #define portDISABLE_INTERRUPTS() vPortRaiseBASEPRI()
#define portENABLE_INTERRUPTS() vPortSetBASEPRI( 0 ) #define portENABLE_INTERRUPTS() vPortSetBASEPRI( 0 )
#define portENTER_CRITICAL() vPortEnterCritical() #define portENTER_CRITICAL() vPortEnterCritical()
#define portEXIT_CRITICAL() vPortExitCritical() #define portEXIT_CRITICAL() vPortExitCritical()
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Task function macros as described on the FreeRTOS.org WEB site. These are /* Task function macros as described on the FreeRTOS.org WEB site. These are
* not necessary for to use this port. They are defined so the common demo files * not necessary for to use this port. They are defined so the common demo files
* (which build with all the ports) will build. */ * (which build with all the ports) will build. */
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters ) #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters ) #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Architecture specific optimisations. */ /* Architecture specific optimisations. */
#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
#endif #endif
#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
/* Generic helper function. */ /* Generic helper function. */
__attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap ) __attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap )
@ -272,49 +276,49 @@
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) ) #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) )
#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#ifdef configASSERT #ifdef configASSERT
void vPortValidateInterruptPriority( void ); void vPortValidateInterruptPriority( void );
#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority() #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority()
#endif #endif
/* portNOP() is not required by this port. */ /* portNOP() is not required by this port. */
#define portNOP() #define portNOP()
#define portINLINE __inline #define portINLINE __inline
#ifndef portFORCE_INLINE #ifndef portFORCE_INLINE
#define portFORCE_INLINE inline __attribute__( ( always_inline ) ) #define portFORCE_INLINE inline __attribute__( ( always_inline ) )
#endif #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
extern BaseType_t xIsPrivileged( void ); extern BaseType_t xIsPrivileged( void );
extern void vResetPrivilege( void ); extern void vResetPrivilege( void );
/** /**
* @brief Checks whether or not the processor is privileged. * @brief Checks whether or not the processor is privileged.
* *
* @return 1 if the processor is already privileged, 0 otherwise. * @return 1 if the processor is already privileged, 0 otherwise.
*/ */
#define portIS_PRIVILEGED() xIsPrivileged() #define portIS_PRIVILEGED() xIsPrivileged()
/** /**
* @brief Raise an SVC request to raise privilege. * @brief Raise an SVC request to raise privilege.
*/ */
#define portRAISE_PRIVILEGE() __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" ); #define portRAISE_PRIVILEGE() __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
/** /**
* @brief Lowers the privilege level by setting the bit 0 of the CONTROL * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
* register. * register.
*/ */
#define portRESET_PRIVILEGE() vResetPrivilege() #define portRESET_PRIVILEGE() vResetPrivilege()
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void ) portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )
{ {
uint32_t ulCurrentInterrupt; uint32_t ulCurrentInterrupt;
BaseType_t xReturn; BaseType_t xReturn;
@ -331,12 +335,12 @@
} }
return xReturn; return xReturn;
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
portFORCE_INLINE static void vPortRaiseBASEPRI( void ) portFORCE_INLINE static void vPortRaiseBASEPRI( void )
{ {
uint32_t ulNewBASEPRI; uint32_t ulNewBASEPRI;
__asm volatile __asm volatile
@ -347,12 +351,12 @@
" dsb \n"\ " dsb \n"\
: "=r" ( ulNewBASEPRI ) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory" : "=r" ( ulNewBASEPRI ) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void ) portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )
{ {
uint32_t ulOriginalBASEPRI, ulNewBASEPRI; uint32_t ulOriginalBASEPRI, ulNewBASEPRI;
__asm volatile __asm volatile
@ -368,27 +372,30 @@
/* This return will not be reached but is necessary to prevent compiler /* This return will not be reached but is necessary to prevent compiler
* warnings. */ * warnings. */
return ulOriginalBASEPRI; return ulOriginalBASEPRI;
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue ) portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
{ {
__asm volatile __asm volatile
( (
" msr basepri, %0 "::"r" ( ulNewMaskValue ) : "memory" " msr basepri, %0 "::"r" ( ulNewMaskValue ) : "memory"
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#define portMEMORY_BARRIER() __asm volatile ( "" ::: "memory" ) #define portMEMORY_BARRIER() __asm volatile ( "" ::: "memory" )
#ifndef configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY #ifndef configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY
#warning "configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY is not defined. We recommend defining it to 1 in FreeRTOSConfig.h for better security. https: /*www.freertos.org/FreeRTOS-V10.3.x.html" */ #warning "configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY is not defined. We recommend defining it to 1 in FreeRTOSConfig.h for better security. https: /*www.freertos.org/FreeRTOS-V10.3.x.html" */
#define configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY 0 #define configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY 0
#endif #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* *INDENT-OFF* */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
/* *INDENT-ON* */
#endif /* PORTMACRO_H */ #endif /* PORTMACRO_H */

56
portable/GCC/AVR_AVRDx/portmacro.h
View file

@ -23,14 +23,16 @@
* http://aws.amazon.com/freertos * http://aws.amazon.com/freertos
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */
#ifndef PORTMACRO_H #ifndef PORTMACRO_H
#define PORTMACRO_H #define PORTMACRO_H
#ifdef __cplusplus /* *INDENT-OFF* */
extern "C" { #ifdef __cplusplus
#endif extern "C" {
#endif
/* *INDENT-ON* */
/*----------------------------------------------------------- /*-----------------------------------------------------------
* Port specific definitions. * Port specific definitions.
@ -57,50 +59,52 @@ typedef portSTACK_TYPE StackType_t;
typedef signed char BaseType_t; typedef signed char BaseType_t;
typedef unsigned char UBaseType_t; typedef unsigned char UBaseType_t;
#if (configUSE_16_BIT_TICKS == 1) #if ( configUSE_16_BIT_TICKS == 1 )
typedef uint16_t TickType_t; typedef uint16_t TickType_t;
#define portMAX_DELAY (TickType_t)0xffff #define portMAX_DELAY ( TickType_t ) 0xffff
#else #else
typedef uint32_t TickType_t; typedef uint32_t TickType_t;
#define portMAX_DELAY (TickType_t)0xffffffffUL #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
#endif #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Critical section management. */ /* Critical section management. */
#define portENTER_CRITICAL() \ #define portENTER_CRITICAL() \
asm volatile("in __tmp_reg__, __SREG__"); \ asm volatile ( "in __tmp_reg__, __SREG__" ); \
asm volatile("cli"); \ asm volatile ( "cli" ); \
asm volatile("push __tmp_reg__") asm volatile ( "push __tmp_reg__" )
#define portEXIT_CRITICAL() \ #define portEXIT_CRITICAL() \
asm volatile("pop __tmp_reg__"); \ asm volatile ( "pop __tmp_reg__" ); \
asm volatile("out __SREG__, __tmp_reg__") asm volatile ( "out __SREG__, __tmp_reg__" )
#define portDISABLE_INTERRUPTS() asm volatile("cli" ::); #define portDISABLE_INTERRUPTS() asm volatile ( "cli" ::);
#define portENABLE_INTERRUPTS() asm volatile("sei" ::); #define portENABLE_INTERRUPTS() asm volatile ( "sei" ::);
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Architecture specifics. */ /* Architecture specifics. */
#define portSTACK_GROWTH (-1) #define portSTACK_GROWTH ( -1 )
#define portTICK_PERIOD_MS ((TickType_t)1000 / configTICK_RATE_HZ) #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 1 #define portBYTE_ALIGNMENT 1
#define portNOP() asm volatile("nop"); #define portNOP() asm volatile ( "nop" );
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Kernel utilities. */ /* Kernel utilities. */
extern void vPortYield(void) __attribute__((naked)); extern void vPortYield( void ) __attribute__( ( naked ) );
#define portYIELD() vPortYield() #define portYIELD() vPortYield()
extern void vPortYieldFromISR(void) __attribute__((naked)); extern void vPortYieldFromISR( void ) __attribute__( ( naked ) );
#define portYIELD_FROM_ISR() vPortYieldFromISR() #define portYIELD_FROM_ISR() vPortYieldFromISR()
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Task function macros as described on the FreeRTOS.org WEB site. */ /* Task function macros as described on the FreeRTOS.org WEB site. */
#define portTASK_FUNCTION_PROTO(vFunction, pvParameters) void vFunction(void *pvParameters) #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
#define portTASK_FUNCTION(vFunction, pvParameters) void vFunction(void *pvParameters) #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
#ifdef __cplusplus /* *INDENT-OFF* */
} #ifdef __cplusplus
#endif }
#endif
/* *INDENT-ON* */
#endif /* PORTMACRO_H */ #endif /* PORTMACRO_H */

48
portable/GCC/AVR_Mega0/portmacro.h
View file

@ -23,14 +23,16 @@
* http://aws.amazon.com/freertos * http://aws.amazon.com/freertos
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */
#ifndef PORTMACRO_H #ifndef PORTMACRO_H
#define PORTMACRO_H #define PORTMACRO_H
/* *INDENT-OFF* */
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* *INDENT-ON* */
/*----------------------------------------------------------- /*-----------------------------------------------------------
* Port specific definitions. * Port specific definitions.
@ -57,50 +59,52 @@ typedef portSTACK_TYPE StackType_t;
typedef signed char BaseType_t; typedef signed char BaseType_t;
typedef unsigned char UBaseType_t; typedef unsigned char UBaseType_t;
#if (configUSE_16_BIT_TICKS == 1) #if ( configUSE_16_BIT_TICKS == 1 )
typedef uint16_t TickType_t; typedef uint16_t TickType_t;
#define portMAX_DELAY (TickType_t)0xffff #define portMAX_DELAY ( TickType_t ) 0xffff
#else #else
typedef uint32_t TickType_t; typedef uint32_t TickType_t;
#define portMAX_DELAY (TickType_t)0xffffffffUL #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
#endif #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Critical section management. */ /* Critical section management. */
#define portENTER_CRITICAL() \ #define portENTER_CRITICAL() \
asm volatile("in __tmp_reg__, __SREG__"); \ asm volatile ( "in __tmp_reg__, __SREG__" ); \
asm volatile("cli"); \ asm volatile ( "cli" ); \
asm volatile("push __tmp_reg__") asm volatile ( "push __tmp_reg__" )
#define portEXIT_CRITICAL() \ #define portEXIT_CRITICAL() \
asm volatile("pop __tmp_reg__"); \ asm volatile ( "pop __tmp_reg__" ); \
asm volatile("out __SREG__, __tmp_reg__") asm volatile ( "out __SREG__, __tmp_reg__" )
#define portDISABLE_INTERRUPTS() asm volatile("cli" ::); #define portDISABLE_INTERRUPTS() asm volatile ( "cli" ::);
#define portENABLE_INTERRUPTS() asm volatile("sei" ::); #define portENABLE_INTERRUPTS() asm volatile ( "sei" ::);
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Architecture specifics. */ /* Architecture specifics. */
#define portSTACK_GROWTH (-1) #define portSTACK_GROWTH ( -1 )
#define portTICK_PERIOD_MS ((TickType_t)1000 / configTICK_RATE_HZ) #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 1 #define portBYTE_ALIGNMENT 1
#define portNOP() asm volatile("nop"); #define portNOP() asm volatile ( "nop" );
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Kernel utilities. */ /* Kernel utilities. */
extern void vPortYield(void) __attribute__((naked)); extern void vPortYield( void ) __attribute__( ( naked ) );
#define portYIELD() vPortYield() #define portYIELD() vPortYield()
extern void vPortYieldFromISR(void) __attribute__((naked)); extern void vPortYieldFromISR( void ) __attribute__( ( naked ) );
#define portYIELD_FROM_ISR() vPortYieldFromISR() #define portYIELD_FROM_ISR() vPortYieldFromISR()
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Task function macros as described on the FreeRTOS.org WEB site. */ /* Task function macros as described on the FreeRTOS.org WEB site. */
#define portTASK_FUNCTION_PROTO(vFunction, pvParameters) void vFunction(void *pvParameters) #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
#define portTASK_FUNCTION(vFunction, pvParameters) void vFunction(void *pvParameters) #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
/* *INDENT-OFF* */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
/* *INDENT-ON* */
#endif /* PORTMACRO_H */ #endif /* PORTMACRO_H */

6
portable/IAR/ARM_CM23_NTZ/non_secure/port.c
View file

@ -1051,7 +1051,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
{ {
uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber; uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
int32_t lIndex = 0; int32_t lIndex = 0;
#if defined( __ARMCC_VERSION ) #if defined( __ARMCC_VERSION )
/* Declaration when these variable are defined in code instead of being /* Declaration when these variable are defined in code instead of being
* exported from linker scripts. */ * exported from linker scripts. */
extern uint32_t * __privileged_sram_start__; extern uint32_t * __privileged_sram_start__;
@ -1079,8 +1081,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
* using a separate MPU region. This is needed because privileged * using a separate MPU region. This is needed because privileged
* SRAM is already protected using an MPU region and ARMv8-M does * SRAM is already protected using an MPU region and ARMv8-M does
* not allow overlapping MPU regions. */ * not allow overlapping MPU regions. */
if( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ && if( ( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ ) &&
ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) ( ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) )
{ {
xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0; xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0;
xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0; xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0;

6
portable/IAR/ARM_CM33/non_secure/port.c
View file

@ -1051,7 +1051,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
{ {
uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber; uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
int32_t lIndex = 0; int32_t lIndex = 0;
#if defined( __ARMCC_VERSION ) #if defined( __ARMCC_VERSION )
/* Declaration when these variable are defined in code instead of being /* Declaration when these variable are defined in code instead of being
* exported from linker scripts. */ * exported from linker scripts. */
extern uint32_t * __privileged_sram_start__; extern uint32_t * __privileged_sram_start__;
@ -1079,8 +1081,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
* using a separate MPU region. This is needed because privileged * using a separate MPU region. This is needed because privileged
* SRAM is already protected using an MPU region and ARMv8-M does * SRAM is already protected using an MPU region and ARMv8-M does
* not allow overlapping MPU regions. */ * not allow overlapping MPU regions. */
if( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ && if( ( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ ) &&
ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) ( ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) )
{ {
xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0; xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0;
xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0; xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0;

6
portable/IAR/ARM_CM33_NTZ/non_secure/port.c
View file

@ -1051,7 +1051,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
{ {
uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber; uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
int32_t lIndex = 0; int32_t lIndex = 0;
#if defined( __ARMCC_VERSION ) #if defined( __ARMCC_VERSION )
/* Declaration when these variable are defined in code instead of being /* Declaration when these variable are defined in code instead of being
* exported from linker scripts. */ * exported from linker scripts. */
extern uint32_t * __privileged_sram_start__; extern uint32_t * __privileged_sram_start__;
@ -1079,8 +1081,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
* using a separate MPU region. This is needed because privileged * using a separate MPU region. This is needed because privileged
* SRAM is already protected using an MPU region and ARMv8-M does * SRAM is already protected using an MPU region and ARMv8-M does
* not allow overlapping MPU regions. */ * not allow overlapping MPU regions. */
if( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ && if( ( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ ) &&
ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) ( ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) )
{ {
xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0; xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0;
xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0; xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0;

211
portable/IAR/ARM_CM4F_MPU/portmacro.h
View file

@ -27,11 +27,13 @@
#ifndef PORTMACRO_H #ifndef PORTMACRO_H
#define PORTMACRO_H #define PORTMACRO_H
#ifdef __cplusplus /* *INDENT-OFF* */
#ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* *INDENT-ON* */
/*----------------------------------------------------------- /*-----------------------------------------------------------
* Port specific definitions. * Port specific definitions.
@ -44,57 +46,58 @@
*/ */
/* IAR includes. */ /* IAR includes. */
#include <intrinsics.h> #include <intrinsics.h>
/* Type definitions. */ /* Type definitions. */
#define portCHAR char #define portCHAR char
#define portFLOAT float #define portFLOAT float
#define portDOUBLE double #define portDOUBLE double
#define portLONG long #define portLONG long
#define portSHORT short #define portSHORT short
#define portSTACK_TYPE uint32_t #define portSTACK_TYPE uint32_t
#define portBASE_TYPE long #define portBASE_TYPE long
typedef portSTACK_TYPE StackType_t; typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t; typedef long BaseType_t;
typedef unsigned long UBaseType_t; typedef unsigned long UBaseType_t;
#if ( configUSE_16_BIT_TICKS == 1 ) #if ( configUSE_16_BIT_TICKS == 1 )
typedef uint16_t TickType_t; typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff #define portMAX_DELAY ( TickType_t ) 0xffff
#else #else
typedef uint32_t TickType_t; typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
* not need to be guarded with a critical section. */ * not need to be guarded with a critical section. */
#define portTICK_TYPE_IS_ATOMIC 1 #define portTICK_TYPE_IS_ATOMIC 1
#endif #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* MPU specific constants. */ /* MPU specific constants. */
#define portUSING_MPU_WRAPPERS 1 #define portUSING_MPU_WRAPPERS 1
#define portPRIVILEGE_BIT ( 0x80000000UL ) #define portPRIVILEGE_BIT ( 0x80000000UL )
#define portMPU_REGION_READ_WRITE ( 0x03UL << 24UL ) #define portMPU_REGION_READ_WRITE ( 0x03UL << 24UL )
#define portMPU_REGION_PRIVILEGED_READ_ONLY ( 0x05UL << 24UL ) #define portMPU_REGION_PRIVILEGED_READ_ONLY ( 0x05UL << 24UL )
#define portMPU_REGION_READ_ONLY ( 0x06UL << 24UL ) #define portMPU_REGION_READ_ONLY ( 0x06UL << 24UL )
#define portMPU_REGION_PRIVILEGED_READ_WRITE ( 0x01UL << 24UL ) #define portMPU_REGION_PRIVILEGED_READ_WRITE ( 0x01UL << 24UL )
#define portMPU_REGION_PRIVILEGED_READ_WRITE_UNPRIV_READ_ONLY ( 0x02UL << 24UL ) #define portMPU_REGION_PRIVILEGED_READ_WRITE_UNPRIV_READ_ONLY ( 0x02UL << 24UL )
#define portMPU_REGION_CACHEABLE_BUFFERABLE ( 0x07UL << 16UL ) #define portMPU_REGION_CACHEABLE_BUFFERABLE ( 0x07UL << 16UL )
#define portMPU_REGION_EXECUTE_NEVER ( 0x01UL << 28UL ) #define portMPU_REGION_EXECUTE_NEVER ( 0x01UL << 28UL )
/* Location of the TEX,S,C,B bits in the MPU Region Attribute and Size
/* Location of the TEX,S,C,B bits in the MPU Region Attribute and Size
* Register (RASR). */ * Register (RASR). */
#define portMPU_RASR_TEX_S_C_B_LOCATION ( 16UL ) #define portMPU_RASR_TEX_S_C_B_LOCATION ( 16UL )
#define portMPU_RASR_TEX_S_C_B_MASK ( 0x3FUL ) #define portMPU_RASR_TEX_S_C_B_MASK ( 0x3FUL )
/* MPU settings that can be overriden in FreeRTOSConfig.h. */ /* MPU settings that can be overriden in FreeRTOSConfig.h. */
#ifndef configTOTAL_MPU_REGIONS #ifndef configTOTAL_MPU_REGIONS
/* Define to 8 for backward compatibility. */ /* Define to 8 for backward compatibility. */
#define configTOTAL_MPU_REGIONS ( 8UL ) #define configTOTAL_MPU_REGIONS ( 8UL )
#endif #endif
/* /*
* The TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits define the * The TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits define the
* memory type, and where necessary the cacheable and shareable properties * memory type, and where necessary the cacheable and shareable properties
* of the memory region. * of the memory region.
@ -142,7 +145,7 @@
| | | | | bus. See the table below for the cacheability policy | | | | | | | bus. See the table below for the cacheability policy | |
| | | | | encoding. memory, BB=Outer policy, AA=Inner policy. | | | | | | | encoding. memory, BB=Outer policy, AA=Inner policy. | |
+-----+---+---+------------------------+--------------------------------------------------------+-------------------------+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
|
+-----------------------------------------+----------------------------------------+ +-----------------------------------------+----------------------------------------+
| AA or BB subfield of {TEX,C,B} encoding | Cacheability policy | | AA or BB subfield of {TEX,C,B} encoding | Cacheability policy |
+-----------------------------------------+----------------------------------------+ +-----------------------------------------+----------------------------------------+
@ -156,59 +159,59 @@
+-----------------------------------------+----------------------------------------+ +-----------------------------------------+----------------------------------------+
*/ */
/* TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits for flash /* TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits for flash
* region. */ * region. */
#ifndef configTEX_S_C_B_FLASH #ifndef configTEX_S_C_B_FLASH
/* Default to TEX=000, S=1, C=1, B=1 for backward compatibility. */ /* Default to TEX=000, S=1, C=1, B=1 for backward compatibility. */
#define configTEX_S_C_B_FLASH ( 0x07UL ) #define configTEX_S_C_B_FLASH ( 0x07UL )
#endif #endif
/* TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits for RAM /* TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits for RAM
* region. */ * region. */
#ifndef configTEX_S_C_B_SRAM #ifndef configTEX_S_C_B_SRAM
/* Default to TEX=000, S=1, C=1, B=1 for backward compatibility. */ /* Default to TEX=000, S=1, C=1, B=1 for backward compatibility. */
#define configTEX_S_C_B_SRAM ( 0x07UL ) #define configTEX_S_C_B_SRAM ( 0x07UL )
#endif #endif
#define portUNPRIVILEGED_FLASH_REGION ( 0UL ) #define portUNPRIVILEGED_FLASH_REGION ( 0UL )
#define portPRIVILEGED_FLASH_REGION ( 1UL ) #define portPRIVILEGED_FLASH_REGION ( 1UL )
#define portPRIVILEGED_RAM_REGION ( 2UL ) #define portPRIVILEGED_RAM_REGION ( 2UL )
#define portGENERAL_PERIPHERALS_REGION ( 3UL ) #define portGENERAL_PERIPHERALS_REGION ( 3UL )
#define portSTACK_REGION ( 4UL ) #define portSTACK_REGION ( 4UL )
#define portFIRST_CONFIGURABLE_REGION ( 5UL ) #define portFIRST_CONFIGURABLE_REGION ( 5UL )
#define portTOTAL_NUM_REGIONS ( configTOTAL_MPU_REGIONS ) #define portTOTAL_NUM_REGIONS ( configTOTAL_MPU_REGIONS )
#define portNUM_CONFIGURABLE_REGIONS ( portTOTAL_NUM_REGIONS - portFIRST_CONFIGURABLE_REGION ) #define portNUM_CONFIGURABLE_REGIONS ( portTOTAL_NUM_REGIONS - portFIRST_CONFIGURABLE_REGION )
#define portLAST_CONFIGURABLE_REGION ( portTOTAL_NUM_REGIONS - 1UL ) #define portLAST_CONFIGURABLE_REGION ( portTOTAL_NUM_REGIONS - 1UL )
#define portSWITCH_TO_USER_MODE() __asm volatile ( " mrs r0, control \n orr r0, r0, #1 \n msr control, r0 " ::: "r0", "memory" ) #define portSWITCH_TO_USER_MODE() __asm volatile ( " mrs r0, control \n orr r0, r0, #1 \n msr control, r0 " ::: "r0", "memory" )
typedef struct MPU_REGION_REGISTERS typedef struct MPU_REGION_REGISTERS
{ {
uint32_t ulRegionBaseAddress; uint32_t ulRegionBaseAddress;
uint32_t ulRegionAttribute; uint32_t ulRegionAttribute;
} xMPU_REGION_REGISTERS; } xMPU_REGION_REGISTERS;
/* Plus 1 to create space for the stack region. */ /* Plus 1 to create space for the stack region. */
typedef struct MPU_SETTINGS typedef struct MPU_SETTINGS
{ {
xMPU_REGION_REGISTERS xRegion[ portTOTAL_NUM_REGIONS ]; xMPU_REGION_REGISTERS xRegion[ portTOTAL_NUM_REGIONS ];
} xMPU_SETTINGS; } xMPU_SETTINGS;
/* Architecture specifics. */ /* Architecture specifics. */
#define portSTACK_GROWTH ( -1 ) #define portSTACK_GROWTH ( -1 )
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ ) #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 8 #define portBYTE_ALIGNMENT 8
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* SVC numbers for various services. */ /* SVC numbers for various services. */
#define portSVC_START_SCHEDULER 0 #define portSVC_START_SCHEDULER 0
#define portSVC_YIELD 1 #define portSVC_YIELD 1
#define portSVC_RAISE_PRIVILEGE 2 #define portSVC_RAISE_PRIVILEGE 2
/* Scheduler utilities. */ /* Scheduler utilities. */
#define portYIELD() __asm volatile ( " SVC %0 \n"::"i" ( portSVC_YIELD ) : "memory" ) #define portYIELD() __asm volatile ( " SVC %0 \n"::"i" ( portSVC_YIELD ) : "memory" )
#define portYIELD_WITHIN_API() \ #define portYIELD_WITHIN_API() \
{ \ { \
/* Set a PendSV to request a context switch. */ \ /* Set a PendSV to request a context switch. */ \
portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
@ -216,18 +219,18 @@
__ISB(); \ __ISB(); \
} }
#define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) portYIELD_WITHIN_API() #define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) portYIELD_WITHIN_API()
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Architecture specific optimisations. */ /* Architecture specific optimisations. */
#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
#endif #endif
#if ( configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 ) #if ( configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 )
/* Check the configuration. */ /* Check the configuration. */
#if ( configMAX_PRIORITIES > 32 ) #if ( configMAX_PRIORITIES > 32 )
@ -242,52 +245,52 @@
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( ( uint32_t ) __CLZ( ( uxReadyPriorities ) ) ) ) #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( ( uint32_t ) __CLZ( ( uxReadyPriorities ) ) ) )
#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Critical section management. */ /* Critical section management. */
extern void vPortEnterCritical( void ); extern void vPortEnterCritical( void );
extern void vPortExitCritical( void ); extern void vPortExitCritical( void );
#define portDISABLE_INTERRUPTS() \ #define portDISABLE_INTERRUPTS() \
{ \ { \
__set_BASEPRI( configMAX_SYSCALL_INTERRUPT_PRIORITY ); \ __set_BASEPRI( configMAX_SYSCALL_INTERRUPT_PRIORITY ); \
__DSB(); \ __DSB(); \
__ISB(); \ __ISB(); \
} }
#define portENABLE_INTERRUPTS() __set_BASEPRI( 0 ) #define portENABLE_INTERRUPTS() __set_BASEPRI( 0 )
#define portENTER_CRITICAL() vPortEnterCritical() #define portENTER_CRITICAL() vPortEnterCritical()
#define portEXIT_CRITICAL() vPortExitCritical() #define portEXIT_CRITICAL() vPortExitCritical()
#define portSET_INTERRUPT_MASK_FROM_ISR() __get_BASEPRI(); portDISABLE_INTERRUPTS() #define portSET_INTERRUPT_MASK_FROM_ISR() __get_BASEPRI(); portDISABLE_INTERRUPTS()
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) __set_BASEPRI( x ) #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) __set_BASEPRI( x )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Task function macros as described on the FreeRTOS.org WEB site. These are /* Task function macros as described on the FreeRTOS.org WEB site. These are
* not necessary for to use this port. They are defined so the common demo files * not necessary for to use this port. They are defined so the common demo files
* (which build with all the ports) will build. */ * (which build with all the ports) will build. */
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters ) #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters ) #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#ifdef configASSERT #ifdef configASSERT
void vPortValidateInterruptPriority( void ); void vPortValidateInterruptPriority( void );
#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority() #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority()
#endif #endif
/* portNOP() is not required by this port. */ /* portNOP() is not required by this port. */
#define portNOP() #define portNOP()
#define portINLINE __inline #define portINLINE __inline
#ifndef portFORCE_INLINE #ifndef portFORCE_INLINE
#define portFORCE_INLINE inline __attribute__( ( always_inline ) ) #define portFORCE_INLINE inline __attribute__( ( always_inline ) )
#endif #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void ) portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )
{ {
uint32_t ulCurrentInterrupt; uint32_t ulCurrentInterrupt;
BaseType_t xReturn; BaseType_t xReturn;
@ -304,49 +307,51 @@
} }
return xReturn; return xReturn;
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
extern BaseType_t xIsPrivileged( void ); extern BaseType_t xIsPrivileged( void );
extern void vResetPrivilege( void ); extern void vResetPrivilege( void );
/** /**
* @brief Checks whether or not the processor is privileged. * @brief Checks whether or not the processor is privileged.
* *
* @return 1 if the processor is already privileged, 0 otherwise. * @return 1 if the processor is already privileged, 0 otherwise.
*/ */
#define portIS_PRIVILEGED() xIsPrivileged() #define portIS_PRIVILEGED() xIsPrivileged()
/** /**
* @brief Raise an SVC request to raise privilege. * @brief Raise an SVC request to raise privilege.
*/ */
#define portRAISE_PRIVILEGE() __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" ); #define portRAISE_PRIVILEGE() __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
/** /**
* @brief Lowers the privilege level by setting the bit 0 of the CONTROL * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
* register. * register.
*/ */
#define portRESET_PRIVILEGE() vResetPrivilege() #define portRESET_PRIVILEGE() vResetPrivilege()
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#ifndef configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY #ifndef configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY
#warning "configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY is not defined. We recommend defining it to 1 in FreeRTOSConfig.h for better security. https: /*www.freertos.org/FreeRTOS-V10.3.x.html" */ #warning "configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY is not defined. We recommend defining it to 1 in FreeRTOSConfig.h for better security. https: /*www.freertos.org/FreeRTOS-V10.3.x.html" */
#define configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY 0 #define configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY 0
#endif #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Suppress warnings that are generated by the IAR tools, but cannot be fixed in /* Suppress warnings that are generated by the IAR tools, but cannot be fixed in
* the source code because to do so would cause other compilers to generate * the source code because to do so would cause other compilers to generate
* warnings. */ * warnings. */
#pragma diag_suppress=Pe191 #pragma diag_suppress=Pe191
#pragma diag_suppress=Pa082 #pragma diag_suppress=Pa082
#pragma diag_suppress=Be006 #pragma diag_suppress=Be006
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#ifdef __cplusplus /* *INDENT-OFF* */
#ifdef __cplusplus
} }
#endif #endif
/* *INDENT-ON* */
#endif /* PORTMACRO_H */ #endif /* PORTMACRO_H */

105
portable/IAR/AVR_AVRDx/port.c
View file

@ -32,11 +32,11 @@
#include "task.h" #include "task.h"
/*----------------------------------------------------------- /*-----------------------------------------------------------
* Implementation of functions defined in portable.h for the AVR port. * Implementation of functions defined in portable.h for the AVR port.
*----------------------------------------------------------*/ *----------------------------------------------------------*/
/* Start tasks with interrupts enables. */ /* Start tasks with interrupts enables. */
#define portFLAGS_INT_ENABLED ((StackType_t) 0x80) #define portFLAGS_INT_ENABLED ( ( StackType_t ) 0x80 )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -45,12 +45,13 @@
#define portNO_CRITICAL_NESTING ( ( UBaseType_t ) 0 ) #define portNO_CRITICAL_NESTING ( ( UBaseType_t ) 0 )
/* Stores the critical section nesting. This must not be initialised to 0. /* Stores the critical section nesting. This must not be initialised to 0.
It will be initialised when a task starts. */ * It will be initialised when a task starts. */
UBaseType_t uxCriticalNesting = 0x50; UBaseType_t uxCriticalNesting = 0x50;
/* /*
* Setup timer to generate a tick interrupt. * Setup timer to generate a tick interrupt.
*/ */
static void prvSetupTimerInterrupt(void); static void prvSetupTimerInterrupt( void );
/* /*
* The IAR compiler does not have full support for inline assembler, so * The IAR compiler does not have full support for inline assembler, so
@ -64,37 +65,40 @@ extern void vPortStart( void );
/* /*
* See header file for description. * See header file for description.
*/ */
StackType_t *pxPortInitialiseStack(StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters) StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
TaskFunction_t pxCode,
void * pvParameters )
{ {
uint16_t usAddress; uint16_t usAddress;
StackType_t *pxTopOfHardwareStack; StackType_t * pxTopOfHardwareStack;
/* Simulate how the stack would look after a call to vPortYield(). */ /* Simulate how the stack would look after a call to vPortYield(). */
/*lint -e950 -e611 -e923 Lint doesn't like this much - but nothing I can do about it. */ /*lint -e950 -e611 -e923 Lint doesn't like this much - but nothing I can do about it. */
/* The IAR compiler requires two stacks per task. First there is the /* The IAR compiler requires two stacks per task. First there is the
hardware call stack which uses the AVR stack pointer. Second there is the * hardware call stack which uses the AVR stack pointer. Second there is the
software stack (local variables, parameter passing, etc.) which uses the * software stack (local variables, parameter passing, etc.) which uses the
AVR Y register. * AVR Y register.
This function places both stacks within the memory block passed in as the * This function places both stacks within the memory block passed in as the
first parameter. The hardware stack is placed at the bottom of the memory * first parameter. The hardware stack is placed at the bottom of the memory
block. A gap is then left for the hardware stack to grow. Next the software * block. A gap is then left for the hardware stack to grow. Next the software
stack is placed. The amount of space between the software and hardware * stack is placed. The amount of space between the software and hardware
stacks is defined by configCALL_STACK_SIZE. * stacks is defined by configCALL_STACK_SIZE.
The first part of the stack is the hardware stack. Place the start * The first part of the stack is the hardware stack. Place the start
address of the task on the hardware stack. */ * address of the task on the hardware stack. */
/* Place a few bytes of known values on the bottom of the stack. /* Place a few bytes of known values on the bottom of the stack.
This is just useful for debugging. */ * This is just useful for debugging. */
//*pxTopOfStack = 0x11; /**pxTopOfStack = 0x11; */
//pxTopOfStack--; /*pxTopOfStack--; */
//*pxTopOfStack = 0x22; /**pxTopOfStack = 0x22; */
//pxTopOfStack--; /*pxTopOfStack--; */
//*pxTopOfStack = 0x33; /**pxTopOfStack = 0x33; */
//pxTopOfStack--; /*pxTopOfStack--; */
/* Remember where the top of the hardware stack is - this is required /* Remember where the top of the hardware stack is - this is required
below. */ * below. */
pxTopOfHardwareStack = pxTopOfStack; pxTopOfHardwareStack = pxTopOfStack;
usAddress = ( uint16_t ) pxCode; usAddress = ( uint16_t ) pxCode;
@ -106,14 +110,14 @@ StackType_t *pxTopOfHardwareStack;
pxTopOfStack--; pxTopOfStack--;
/* Leave enough space for the hardware stack before starting the software /* Leave enough space for the hardware stack before starting the software
stack. The '- 2' is because we have already used two spaces for the * stack. The '- 2' is because we have already used two spaces for the
address of the start of the task. */ * address of the start of the task. */
pxTopOfStack -= ( configCALL_STACK_SIZE - 2 ); pxTopOfStack -= ( configCALL_STACK_SIZE - 2 );
/* Next simulate the stack as if after a call to portSAVE_CONTEXT(). /* Next simulate the stack as if after a call to portSAVE_CONTEXT().
portSAVE_CONTEXT places the flags on the stack immediately after r0 * portSAVE_CONTEXT places the flags on the stack immediately after r0
to ensure the interrupts get disabled as soon as possible, and so ensuring * to ensure the interrupts get disabled as soon as possible, and so ensuring
the stack use is minimal should a context switch interrupt occur. */ * the stack use is minimal should a context switch interrupt occur. */
*pxTopOfStack = ( StackType_t ) 0x00; /* R0 */ *pxTopOfStack = ( StackType_t ) 0x00; /* R0 */
pxTopOfStack--; pxTopOfStack--;
*pxTopOfStack = portFLAGS_INT_ENABLED; *pxTopOfStack = portFLAGS_INT_ENABLED;
@ -122,7 +126,7 @@ StackType_t *pxTopOfHardwareStack;
pxTopOfStack--; pxTopOfStack--;
/* Next place the address of the hardware stack. This is required so /* Next place the address of the hardware stack. This is required so
the AVR stack pointer can be restored to point to the hardware stack. */ * the AVR stack pointer can be restored to point to the hardware stack. */
pxTopOfHardwareStack -= portBYTES_USED_BY_RETURN_ADDRESS; pxTopOfHardwareStack -= portBYTES_USED_BY_RETURN_ADDRESS;
usAddress = ( uint16_t ) pxTopOfHardwareStack; usAddress = ( uint16_t ) pxTopOfHardwareStack;
@ -168,12 +172,12 @@ StackType_t *pxTopOfHardwareStack;
pxTopOfStack--; pxTopOfStack--;
/* Place the parameter on the stack in the expected location. */ /* Place the parameter on the stack in the expected location. */
usAddress = (uint16_t) pvParameters; usAddress = ( uint16_t ) pvParameters;
*pxTopOfStack = (StackType_t) (usAddress & (uint16_t) 0x00ff); *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
pxTopOfStack--; pxTopOfStack--;
usAddress >>= 8; usAddress >>= 8;
*pxTopOfStack = (StackType_t) (usAddress & (uint16_t) 0x00ff); *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
pxTopOfStack--; pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) 0x18; /* R18 */ *pxTopOfStack = ( StackType_t ) 0x18; /* R18 */
@ -198,7 +202,7 @@ StackType_t *pxTopOfHardwareStack;
pxTopOfStack--; pxTopOfStack--;
/* The Y register is not stored as it is used as the software stack and /* The Y register is not stored as it is used as the software stack and
gets saved into the task control block. */ * gets saved into the task control block. */
*pxTopOfStack = ( StackType_t ) 0x30; /* R30 Z */ *pxTopOfStack = ( StackType_t ) 0x30; /* R30 Z */
pxTopOfStack--; pxTopOfStack--;
@ -213,14 +217,14 @@ StackType_t *pxTopOfHardwareStack;
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
BaseType_t xPortStartScheduler(void) BaseType_t xPortStartScheduler( void )
{ {
/* Setup the hardware to generate the tick. */ /* Setup the hardware to generate the tick. */
prvSetupTimerInterrupt(); prvSetupTimerInterrupt();
/* Restore the context of the first task that is going to run. /* Restore the context of the first task that is going to run.
Normally we would just call portRESTORE_CONTEXT() here, but as the IAR * Normally we would just call portRESTORE_CONTEXT() here, but as the IAR
compiler does not fully support inline assembler we have to make a call.*/ * compiler does not fully support inline assembler we have to make a call.*/
vPortStart(); vPortStart();
/* Should not get here. */ /* Should not get here. */
@ -228,7 +232,7 @@ BaseType_t xPortStartScheduler(void)
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void vPortEndScheduler(void) void vPortEndScheduler( void )
{ {
/* vPortEndScheduler is not implemented in this port. */ /* vPortEndScheduler is not implemented in this port. */
} }
@ -238,7 +242,7 @@ void vPortEndScheduler(void)
/* /*
* Setup timer to generate a tick interrupt. * Setup timer to generate a tick interrupt.
*/ */
static void prvSetupTimerInterrupt(void) static void prvSetupTimerInterrupt( void )
{ {
TICK_init(); TICK_init();
} }
@ -246,32 +250,34 @@ static void prvSetupTimerInterrupt(void)
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if configUSE_PREEMPTION == 1 #if configUSE_PREEMPTION == 1
/* /*
* Tick ISR for preemptive scheduler. We can use a naked attribute as * Tick ISR for preemptive scheduler. We can use a naked attribute as
* the context is saved at the start of vPortYieldFromTick(). The tick * the context is saved at the start of vPortYieldFromTick(). The tick
* count is incremented after the context is saved. * count is incremented after the context is saved.
*/ */
__task void TICK_INT(void) __task void TICK_INT( void )
{ {
vPortYieldFromTick(); vPortYieldFromTick();
asm("reti"); asm ( "reti" );
} }
#else #else
/* /*
* Tick ISR for the cooperative scheduler. All this does is increment the * Tick ISR for the cooperative scheduler. All this does is increment the
* tick count. We don't need to switch context, this can only be done by * tick count. We don't need to switch context, this can only be done by
* manual calls to taskYIELD(); * manual calls to taskYIELD();
*/ */
__interrupt void TICK_INT(void) __interrupt void TICK_INT( void )
{ {
/* Clear tick interrupt flag. */ /* Clear tick interrupt flag. */
INT_FLAGS = INT_MASK; INT_FLAGS = INT_MASK;
xTaskIncrementTick(); xTaskIncrementTick();
} }
#endif #endif /* if configUSE_PREEMPTION == 1 */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -286,6 +292,7 @@ void vPortEnterCritical( void )
void vPortExitCritical( void ) void vPortExitCritical( void )
{ {
uxCriticalNesting--; uxCriticalNesting--;
if( uxCriticalNesting == portNO_CRITICAL_NESTING ) if( uxCriticalNesting == portNO_CRITICAL_NESTING )
{ {
portENABLE_INTERRUPTS(); portENABLE_INTERRUPTS();

32
portable/IAR/AVR_AVRDx/portmacro.h
View file

@ -29,9 +29,11 @@
#ifndef PORTMACRO_H #ifndef PORTMACRO_H
#define PORTMACRO_H #define PORTMACRO_H
/* *INDENT-OFF* */
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* *INDENT-ON* */
/*----------------------------------------------------------- /*-----------------------------------------------------------
* Port specific definitions. * Port specific definitions.
@ -58,12 +60,12 @@ typedef portSTACK_TYPE StackType_t;
typedef signed char BaseType_t; typedef signed char BaseType_t;
typedef unsigned char UBaseType_t; typedef unsigned char UBaseType_t;
#if (configUSE_16_BIT_TICKS == 1) #if ( configUSE_16_BIT_TICKS == 1 )
typedef uint16_t TickType_t; typedef uint16_t TickType_t;
#define portMAX_DELAY (TickType_t)0xffff #define portMAX_DELAY ( TickType_t ) 0xffff
#else #else
typedef uint32_t TickType_t; typedef uint32_t TickType_t;
#define portMAX_DELAY (TickType_t)0xffffffffUL #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
#endif #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -75,31 +77,33 @@ extern void vPortExitCritical( void );
#define portENTER_CRITICAL() vPortEnterCritical() #define portENTER_CRITICAL() vPortEnterCritical()
#define portEXIT_CRITICAL() vPortExitCritical() #define portEXIT_CRITICAL() vPortExitCritical()
#define portDISABLE_INTERRUPTS() asm( "cli" ) #define portDISABLE_INTERRUPTS() asm ( "cli" )
#define portENABLE_INTERRUPTS() asm( "sei" ) #define portENABLE_INTERRUPTS() asm ( "sei" )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Architecture specifics. */ /* Architecture specifics. */
#define portSTACK_GROWTH (-1) #define portSTACK_GROWTH ( -1 )
#define portTICK_PERIOD_MS ((TickType_t)1000 / configTICK_RATE_HZ) #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 1 #define portBYTE_ALIGNMENT 1
#define portNOP() asm( "nop" ) #define portNOP() asm ( "nop" )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Kernel utilities. */ /* Kernel utilities. */
extern void vPortYield(void); extern void vPortYield( void );
#define portYIELD() vPortYield() #define portYIELD() vPortYield()
extern void vPortYieldFromISR(void); extern void vPortYieldFromISR( void );
#define portYIELD_FROM_ISR() vPortYieldFromISR() #define portYIELD_FROM_ISR() vPortYieldFromISR()
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Task function macros as described on the FreeRTOS.org WEB site. */ /* Task function macros as described on the FreeRTOS.org WEB site. */
#define portTASK_FUNCTION_PROTO(vFunction, pvParameters) void vFunction(void *pvParameters) #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
#define portTASK_FUNCTION(vFunction, pvParameters) void vFunction(void *pvParameters) #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
/* *INDENT-OFF* */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
/* *INDENT-ON* */
#endif /* PORTMACRO_H */ #endif /* PORTMACRO_H */

105
portable/IAR/AVR_Mega0/port.c
View file

@ -32,11 +32,11 @@
#include "task.h" #include "task.h"
/*----------------------------------------------------------- /*-----------------------------------------------------------
* Implementation of functions defined in portable.h for the AVR port. * Implementation of functions defined in portable.h for the AVR port.
*----------------------------------------------------------*/ *----------------------------------------------------------*/
/* Start tasks with interrupts enables. */ /* Start tasks with interrupts enables. */
#define portFLAGS_INT_ENABLED ((StackType_t) 0x80) #define portFLAGS_INT_ENABLED ( ( StackType_t ) 0x80 )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -45,12 +45,13 @@
#define portNO_CRITICAL_NESTING ( ( UBaseType_t ) 0 ) #define portNO_CRITICAL_NESTING ( ( UBaseType_t ) 0 )
/* Stores the critical section nesting. This must not be initialised to 0. /* Stores the critical section nesting. This must not be initialised to 0.
It will be initialised when a task starts. */ * It will be initialised when a task starts. */
UBaseType_t uxCriticalNesting = 0x50; UBaseType_t uxCriticalNesting = 0x50;
/* /*
* Setup timer to generate a tick interrupt. * Setup timer to generate a tick interrupt.
*/ */
static void prvSetupTimerInterrupt(void); static void prvSetupTimerInterrupt( void );
/* /*
* The IAR compiler does not have full support for inline assembler, so * The IAR compiler does not have full support for inline assembler, so
@ -64,37 +65,40 @@ extern void vPortStart( void );
/* /*
* See header file for description. * See header file for description.
*/ */
StackType_t *pxPortInitialiseStack(StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters) StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
TaskFunction_t pxCode,
void * pvParameters )
{ {
uint16_t usAddress; uint16_t usAddress;
StackType_t *pxTopOfHardwareStack; StackType_t * pxTopOfHardwareStack;
/* Simulate how the stack would look after a call to vPortYield(). */ /* Simulate how the stack would look after a call to vPortYield(). */
/*lint -e950 -e611 -e923 Lint doesn't like this much - but nothing I can do about it. */ /*lint -e950 -e611 -e923 Lint doesn't like this much - but nothing I can do about it. */
/* The IAR compiler requires two stacks per task. First there is the /* The IAR compiler requires two stacks per task. First there is the
hardware call stack which uses the AVR stack pointer. Second there is the * hardware call stack which uses the AVR stack pointer. Second there is the
software stack (local variables, parameter passing, etc.) which uses the * software stack (local variables, parameter passing, etc.) which uses the
AVR Y register. * AVR Y register.
This function places both stacks within the memory block passed in as the * This function places both stacks within the memory block passed in as the
first parameter. The hardware stack is placed at the bottom of the memory * first parameter. The hardware stack is placed at the bottom of the memory
block. A gap is then left for the hardware stack to grow. Next the software * block. A gap is then left for the hardware stack to grow. Next the software
stack is placed. The amount of space between the software and hardware * stack is placed. The amount of space between the software and hardware
stacks is defined by configCALL_STACK_SIZE. * stacks is defined by configCALL_STACK_SIZE.
The first part of the stack is the hardware stack. Place the start * The first part of the stack is the hardware stack. Place the start
address of the task on the hardware stack. */ * address of the task on the hardware stack. */
/* Place a few bytes of known values on the bottom of the stack. /* Place a few bytes of known values on the bottom of the stack.
This is just useful for debugging. */ * This is just useful for debugging. */
//*pxTopOfStack = 0x11; /**pxTopOfStack = 0x11; */
//pxTopOfStack--; /*pxTopOfStack--; */
//*pxTopOfStack = 0x22; /**pxTopOfStack = 0x22; */
//pxTopOfStack--; /*pxTopOfStack--; */
//*pxTopOfStack = 0x33; /**pxTopOfStack = 0x33; */
//pxTopOfStack--; /*pxTopOfStack--; */
/* Remember where the top of the hardware stack is - this is required /* Remember where the top of the hardware stack is - this is required
below. */ * below. */
pxTopOfHardwareStack = pxTopOfStack; pxTopOfHardwareStack = pxTopOfStack;
usAddress = ( uint16_t ) pxCode; usAddress = ( uint16_t ) pxCode;
@ -106,21 +110,21 @@ StackType_t *pxTopOfHardwareStack;
pxTopOfStack--; pxTopOfStack--;
/* Leave enough space for the hardware stack before starting the software /* Leave enough space for the hardware stack before starting the software
stack. The '- 2' is because we have already used two spaces for the * stack. The '- 2' is because we have already used two spaces for the
address of the start of the task. */ * address of the start of the task. */
pxTopOfStack -= ( configCALL_STACK_SIZE - 2 ); pxTopOfStack -= ( configCALL_STACK_SIZE - 2 );
/* Next simulate the stack as if after a call to portSAVE_CONTEXT(). /* Next simulate the stack as if after a call to portSAVE_CONTEXT().
portSAVE_CONTEXT places the flags on the stack immediately after r0 * portSAVE_CONTEXT places the flags on the stack immediately after r0
to ensure the interrupts get disabled as soon as possible, and so ensuring * to ensure the interrupts get disabled as soon as possible, and so ensuring
the stack use is minimal should a context switch interrupt occur. */ * the stack use is minimal should a context switch interrupt occur. */
*pxTopOfStack = ( StackType_t ) 0x00; /* R0 */ *pxTopOfStack = ( StackType_t ) 0x00; /* R0 */
pxTopOfStack--; pxTopOfStack--;
*pxTopOfStack = portFLAGS_INT_ENABLED; *pxTopOfStack = portFLAGS_INT_ENABLED;
pxTopOfStack--; pxTopOfStack--;
/* Next place the address of the hardware stack. This is required so /* Next place the address of the hardware stack. This is required so
the AVR stack pointer can be restored to point to the hardware stack. */ * the AVR stack pointer can be restored to point to the hardware stack. */
pxTopOfHardwareStack -= portBYTES_USED_BY_RETURN_ADDRESS; pxTopOfHardwareStack -= portBYTES_USED_BY_RETURN_ADDRESS;
usAddress = ( uint16_t ) pxTopOfHardwareStack; usAddress = ( uint16_t ) pxTopOfHardwareStack;
@ -166,12 +170,12 @@ StackType_t *pxTopOfHardwareStack;
pxTopOfStack--; pxTopOfStack--;
/* Place the parameter on the stack in the expected location. */ /* Place the parameter on the stack in the expected location. */
usAddress = (uint16_t) pvParameters; usAddress = ( uint16_t ) pvParameters;
*pxTopOfStack = (StackType_t) (usAddress & (uint16_t) 0x00ff); *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
pxTopOfStack--; pxTopOfStack--;
usAddress >>= 8; usAddress >>= 8;
*pxTopOfStack = (StackType_t) (usAddress & (uint16_t) 0x00ff); *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
pxTopOfStack--; pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) 0x18; /* R18 */ *pxTopOfStack = ( StackType_t ) 0x18; /* R18 */
@ -196,7 +200,7 @@ StackType_t *pxTopOfHardwareStack;
pxTopOfStack--; pxTopOfStack--;
/* The Y register is not stored as it is used as the software stack and /* The Y register is not stored as it is used as the software stack and
gets saved into the task control block. */ * gets saved into the task control block. */
*pxTopOfStack = ( StackType_t ) 0x30; /* R30 Z */ *pxTopOfStack = ( StackType_t ) 0x30; /* R30 Z */
pxTopOfStack--; pxTopOfStack--;
@ -211,14 +215,14 @@ StackType_t *pxTopOfHardwareStack;
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
BaseType_t xPortStartScheduler(void) BaseType_t xPortStartScheduler( void )
{ {
/* Setup the hardware to generate the tick. */ /* Setup the hardware to generate the tick. */
prvSetupTimerInterrupt(); prvSetupTimerInterrupt();
/* Restore the context of the first task that is going to run. /* Restore the context of the first task that is going to run.
Normally we would just call portRESTORE_CONTEXT() here, but as the IAR * Normally we would just call portRESTORE_CONTEXT() here, but as the IAR
compiler does not fully support inline assembler we have to make a call.*/ * compiler does not fully support inline assembler we have to make a call.*/
vPortStart(); vPortStart();
/* Should not get here. */ /* Should not get here. */
@ -226,7 +230,7 @@ BaseType_t xPortStartScheduler(void)
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void vPortEndScheduler(void) void vPortEndScheduler( void )
{ {
/* vPortEndScheduler is not implemented in this port. */ /* vPortEndScheduler is not implemented in this port. */
} }
@ -236,7 +240,7 @@ void vPortEndScheduler(void)
/* /*
* Setup timer to generate a tick interrupt. * Setup timer to generate a tick interrupt.
*/ */
static void prvSetupTimerInterrupt(void) static void prvSetupTimerInterrupt( void )
{ {
TICK_init(); TICK_init();
} }
@ -244,32 +248,34 @@ static void prvSetupTimerInterrupt(void)
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if configUSE_PREEMPTION == 1 #if configUSE_PREEMPTION == 1
/* /*
* Tick ISR for preemptive scheduler. We can use a naked attribute as * Tick ISR for preemptive scheduler. We can use a naked attribute as
* the context is saved at the start of vPortYieldFromTick(). The tick * the context is saved at the start of vPortYieldFromTick(). The tick
* count is incremented after the context is saved. * count is incremented after the context is saved.
*/ */
__task void TICK_INT(void) __task void TICK_INT( void )
{ {
vPortYieldFromTick(); vPortYieldFromTick();
asm("reti"); asm ( "reti" );
} }
#else #else
/* /*
* Tick ISR for the cooperative scheduler. All this does is increment the * Tick ISR for the cooperative scheduler. All this does is increment the
* tick count. We don't need to switch context, this can only be done by * tick count. We don't need to switch context, this can only be done by
* manual calls to taskYIELD(); * manual calls to taskYIELD();
*/ */
__interrupt void TICK_INT(void) __interrupt void TICK_INT( void )
{ {
/* Clear tick interrupt flag. */ /* Clear tick interrupt flag. */
INT_FLAGS = INT_MASK; INT_FLAGS = INT_MASK;
xTaskIncrementTick(); xTaskIncrementTick();
} }
#endif #endif /* if configUSE_PREEMPTION == 1 */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -284,6 +290,7 @@ void vPortEnterCritical( void )
void vPortExitCritical( void ) void vPortExitCritical( void )
{ {
uxCriticalNesting--; uxCriticalNesting--;
if( uxCriticalNesting == portNO_CRITICAL_NESTING ) if( uxCriticalNesting == portNO_CRITICAL_NESTING )
{ {
portENABLE_INTERRUPTS(); portENABLE_INTERRUPTS();

32
portable/IAR/AVR_Mega0/portmacro.h
View file

@ -29,9 +29,11 @@
#ifndef PORTMACRO_H #ifndef PORTMACRO_H
#define PORTMACRO_H #define PORTMACRO_H
/* *INDENT-OFF* */
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* *INDENT-ON* */
/*----------------------------------------------------------- /*-----------------------------------------------------------
* Port specific definitions. * Port specific definitions.
@ -58,12 +60,12 @@ typedef portSTACK_TYPE StackType_t;
typedef signed char BaseType_t; typedef signed char BaseType_t;
typedef unsigned char UBaseType_t; typedef unsigned char UBaseType_t;
#if (configUSE_16_BIT_TICKS == 1) #if ( configUSE_16_BIT_TICKS == 1 )
typedef uint16_t TickType_t; typedef uint16_t TickType_t;
#define portMAX_DELAY (TickType_t)0xffff #define portMAX_DELAY ( TickType_t ) 0xffff
#else #else
typedef uint32_t TickType_t; typedef uint32_t TickType_t;
#define portMAX_DELAY (TickType_t)0xffffffffUL #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
#endif #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -75,31 +77,33 @@ extern void vPortExitCritical( void );
#define portENTER_CRITICAL() vPortEnterCritical() #define portENTER_CRITICAL() vPortEnterCritical()
#define portEXIT_CRITICAL() vPortExitCritical() #define portEXIT_CRITICAL() vPortExitCritical()
#define portDISABLE_INTERRUPTS() asm( "cli" ) #define portDISABLE_INTERRUPTS() asm ( "cli" )
#define portENABLE_INTERRUPTS() asm( "sei" ) #define portENABLE_INTERRUPTS() asm ( "sei" )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Architecture specifics. */ /* Architecture specifics. */
#define portSTACK_GROWTH (-1) #define portSTACK_GROWTH ( -1 )
#define portTICK_PERIOD_MS ((TickType_t)1000 / configTICK_RATE_HZ) #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 1 #define portBYTE_ALIGNMENT 1
#define portNOP() asm( "nop" ) #define portNOP() asm ( "nop" )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Kernel utilities. */ /* Kernel utilities. */
extern void vPortYield(void); extern void vPortYield( void );
#define portYIELD() vPortYield() #define portYIELD() vPortYield()
extern void vPortYieldFromISR(void); extern void vPortYieldFromISR( void );
#define portYIELD_FROM_ISR() vPortYieldFromISR() #define portYIELD_FROM_ISR() vPortYieldFromISR()
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Task function macros as described on the FreeRTOS.org WEB site. */ /* Task function macros as described on the FreeRTOS.org WEB site. */
#define portTASK_FUNCTION_PROTO(vFunction, pvParameters) void vFunction(void *pvParameters) #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
#define portTASK_FUNCTION(vFunction, pvParameters) void vFunction(void *pvParameters) #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
/* *INDENT-OFF* */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
/* *INDENT-ON* */
#endif /* PORTMACRO_H */ #endif /* PORTMACRO_H */

46
portable/MikroC/ARM_CM4F/port.c
View file

@ -246,15 +246,17 @@ static void prvTaskExitError( void )
void vPortSVCHandler( void ) iv IVT_INT_SVCall ics ICS_OFF void vPortSVCHandler( void ) iv IVT_INT_SVCall ics ICS_OFF
{ {
__asm { __asm {
ldr r3, = _pxCurrentTCB /* Restore the context. */ /* *INDENT-OFF* */
ldr r3, =_pxCurrentTCB /* Restore the context. */
ldr r1, [ r3 ] /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */ ldr r1, [ r3 ] /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */
ldr r0, [ r1 ] /* The first item in pxCurrentTCB is the task top of stack. */ ldr r0, [ r1 ] /* The first item in pxCurrentTCB is the task top of stack. */
ldm r0 !, ( r4 - r11, r14 ) /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */ ldm r0 !, ( r4 - r11, r14 ) /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */
msr psp, r0 /* Restore the task stack pointer. */ msr psp, r0 /* Restore the task stack pointer. */
isb isb
mov r0, # 0 mov r0, #0
msr basepri, r0 msr basepri, r0
bx r14 bx r14
/* *INDENT-ON* */
}; };
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -262,7 +264,8 @@ void vPortSVCHandler( void ) iv IVT_INT_SVCall ics ICS_OFF
static void prvPortStartFirstTask( void ) static void prvPortStartFirstTask( void )
{ {
__asm { __asm {
ldr r0, = 0xE000ED08 /* Use the NVIC offset register to locate the stack. */ /* *INDENT-OFF* */
ldr r0, =0xE000ED08 /* Use the NVIC offset register to locate the stack. */
ldr r0, [ r0 ] ldr r0, [ r0 ]
ldr r0, [ r0 ] ldr r0, [ r0 ]
msr msp, r0 /* Set the msp back to the start of the stack. */ msr msp, r0 /* Set the msp back to the start of the stack. */
@ -271,14 +274,15 @@ static void prvPortStartFirstTask( void )
* before the scheduler was started - which would otherwise result in the * before the scheduler was started - which would otherwise result in the
* unnecessary leaving of space in the SVC stack for lazy saving of FPU * unnecessary leaving of space in the SVC stack for lazy saving of FPU
* registers. */ * registers. */
mov r0, # 0 mov r0, #0
msr control, r0 msr control, r0
cpsie i /* Globally enable interrupts. */ cpsie i /* Globally enable interrupts. */
cpsie f cpsie f
dsb dsb
isb isb
svc # 0 /* System call to start first task. */ svc #0 /* System call to start first task. */
nop nop
/* *INDENT-ON* */
}; };
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -432,6 +436,7 @@ void xPortPendSVHandler( void ) iv IVT_INT_PendSV ics ICS_OFF
{ {
__asm { __asm {
#ifdef HW_DEBUG #ifdef HW_DEBUG
/* *INDENT-OFF* */
/* The function is not truly naked, so add back the 4 bytes subtracted /* The function is not truly naked, so add back the 4 bytes subtracted
* from the stack pointer by the function prologue. */ * from the stack pointer by the function prologue. */
@ -440,10 +445,10 @@ void xPortPendSVHandler( void ) iv IVT_INT_PendSV ics ICS_OFF
mrs r0, psp mrs r0, psp
isb isb
ldr r3, = _pxCurrentTCB /* Get the location of the current TCB. */ ldr r3, =_pxCurrentTCB /* Get the location of the current TCB. */
ldr r2, [ r3 ] ldr r2, [ r3 ]
tst r14, # 0x10 /* Is the task using the FPU context? If so, push high vfp registers. */ tst r14, #0x10 /* Is the task using the FPU context? If so, push high vfp registers. */
it eq it eq
vstmdbeq r0 !, ( s16 - s31 ) vstmdbeq r0 !, ( s16 - s31 )
@ -458,7 +463,7 @@ void xPortPendSVHandler( void ) iv IVT_INT_PendSV ics ICS_OFF
dsb dsb
isb isb
bl _vTaskSwitchContext bl _vTaskSwitchContext
mov r0, # 0 mov r0, #0
msr basepri, r0 msr basepri, r0
ldm sp !, ( r0, r3 ) ldm sp !, ( r0, r3 )
@ -467,13 +472,14 @@ void xPortPendSVHandler( void ) iv IVT_INT_PendSV ics ICS_OFF
ldm r0 !, ( r4 - r11, r14 ) /* Pop the core registers. */ ldm r0 !, ( r4 - r11, r14 ) /* Pop the core registers. */
tst r14, # 0x10 /* Is the task using the FPU context? If so, pop the high vfp registers too. */ tst r14, #0x10 /* Is the task using the FPU context? If so, pop the high vfp registers too. */
it eq it eq
vldmiaeq r0 !, ( s16 - s31 ) vldmiaeq r0 !, ( s16 - s31 )
msr psp, r0 msr psp, r0
isb isb
bx r14 bx r14
/* *INDENT-ON* */
} }
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -499,7 +505,7 @@ void xPortSysTickHandler( void ) iv IVT_INT_SysTick ics ICS_AUTO
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if ( ( configUSE_TICKLESS_IDLE == 1 ) && ( configOVERRIDE_DEFAULT_TICK_CONFIGURATION == 0 ) ) #if ( ( configUSE_TICKLESS_IDLE == 1 ) && ( configOVERRIDE_DEFAULT_TICK_CONFIGURATION == 0 ) )
void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
{ {
@ -694,14 +700,14 @@ void xPortSysTickHandler( void ) iv IVT_INT_SysTick ics ICS_AUTO
} }
} }
#endif /* #if configUSE_TICKLESS_IDLE */ #endif /* #if configUSE_TICKLESS_IDLE */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* /*
* Setup the systick timer to generate the tick interrupts at the required * Setup the systick timer to generate the tick interrupts at the required
* frequency. * frequency.
*/ */
#if ( configOVERRIDE_DEFAULT_TICK_CONFIGURATION == 0 ) #if ( configOVERRIDE_DEFAULT_TICK_CONFIGURATION == 0 )
void vPortSetupTimerInterrupt( void ) void vPortSetupTimerInterrupt( void )
{ {
@ -723,19 +729,21 @@ void xPortSysTickHandler( void ) iv IVT_INT_SysTick ics ICS_AUTO
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT ); portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
} }
#endif /* configOVERRIDE_DEFAULT_TICK_CONFIGURATION */ #endif /* configOVERRIDE_DEFAULT_TICK_CONFIGURATION */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* This is a naked function. */ /* This is a naked function. */
static void vPortEnableVFP( void ) static void vPortEnableVFP( void )
{ {
__asm { __asm {
ldr r0, = 0xE000ED88 /* The FPU enable bits are in the CPACR. */ /* *INDENT-OFF* */
ldr r0, =0xE000ED88 /* The FPU enable bits are in the CPACR. */
ldr r1, [ r0 ] ldr r1, [ r0 ]
orr r1, r1, # 0xF00000 /* Enable CP10 and CP11 coprocessors, then save back. */ orr r1, r1, #0xF00000 /* Enable CP10 and CP11 coprocessors, then save back. */
str r1, [ r0 ] str r1, [ r0 ]
bx r14 bx r14
/* *INDENT-ON* */
}; };
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -758,7 +766,7 @@ BaseType_t xPortIsInsideInterrupt( void )
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if ( configASSERT_DEFINED == 1 ) #if ( configASSERT_DEFINED == 1 )
/* Limitations in the MikroC inline asm means ulCurrentInterrupt has to be /* Limitations in the MikroC inline asm means ulCurrentInterrupt has to be
* global - which makes vPortValidateInterruptPriority() non re-entrant. * global - which makes vPortValidateInterruptPriority() non re-entrant.
@ -772,11 +780,13 @@ BaseType_t xPortIsInsideInterrupt( void )
{ {
/* Obtain the number of the currently executing interrupt. */ /* Obtain the number of the currently executing interrupt. */
__asm { __asm {
/* *INDENT-OFF* */
push( r0, r1 ) push( r0, r1 )
mrs r0, ipsr mrs r0, ipsr
ldr r1, = _ulCurrentInterrupt ldr r1, =_ulCurrentInterrupt
str r0, [ r1 ] str r0, [ r1 ]
pop( r0, r1 ) pop( r0, r1 )
/* *INDENT-ON* */
}; };
/* Is the interrupt number a user defined interrupt? */ /* Is the interrupt number a user defined interrupt? */
@ -827,4 +837,4 @@ BaseType_t xPortIsInsideInterrupt( void )
configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue ); configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
} }
#endif /* configASSERT_DEFINED */ #endif /* configASSERT_DEFINED */

4
portable/RVDS/ARM_CM0/port.c
View file

@ -177,6 +177,7 @@ __asm void prvPortStartFirstTask( void )
/* The MSP stack is not reset as, unlike on M3/4 parts, there is no vector /* The MSP stack is not reset as, unlike on M3/4 parts, there is no vector
* table offset register that can be used to locate the initial stack value. * table offset register that can be used to locate the initial stack value.
* Not all M0 parts have the application vector table at address 0. */ * Not all M0 parts have the application vector table at address 0. */
/* *INDENT-OFF* */
ldr r3, = pxCurrentTCB /* Obtain location of pxCurrentTCB. */ ldr r3, = pxCurrentTCB /* Obtain location of pxCurrentTCB. */
ldr r1, [ r3 ] ldr r1, [ r3 ]
@ -200,6 +201,7 @@ __asm void prvPortStartFirstTask( void )
bx r3 /* Finally, jump to the user defined task code. */ bx r3 /* Finally, jump to the user defined task code. */
ALIGN ALIGN
/* *INDENT-ON* */
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -289,6 +291,7 @@ __asm void xPortPendSVHandler( void )
extern vTaskSwitchContext extern vTaskSwitchContext
extern pxCurrentTCB extern pxCurrentTCB
/* *INDENT-OFF* */
PRESERVE8 PRESERVE8
mrs r0, psp mrs r0, psp
@ -339,6 +342,7 @@ __asm void xPortPendSVHandler( void )
bx r3 bx r3
ALIGN ALIGN
/* *INDENT-ON* */
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/

14
portable/RVDS/ARM_CM3/port.c
View file

@ -213,6 +213,7 @@ static void prvTaskExitError( void )
__asm void vPortSVCHandler( void ) __asm void vPortSVCHandler( void )
{ {
/* *INDENT-OFF* */
PRESERVE8 PRESERVE8
ldr r3, = pxCurrentTCB /* Restore the context. */ ldr r3, = pxCurrentTCB /* Restore the context. */
@ -227,11 +228,13 @@ __asm void vPortSVCHandler( void )
msr basepri, r0 msr basepri, r0
orr r14, # 0xd orr r14, # 0xd
bx r14 bx r14
/* *INDENT-ON* */
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
__asm void prvStartFirstTask( void ) __asm void prvStartFirstTask( void )
{ {
/* *INDENT-OFF* */
PRESERVE8 PRESERVE8
/* Use the NVIC offset register to locate the stack. */ /* Use the NVIC offset register to locate the stack. */
@ -250,6 +253,7 @@ __asm void prvStartFirstTask( void )
svc 0 svc 0
nop nop
nop nop
/* *INDENT-ON* */
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -388,12 +392,13 @@ __asm void xPortPendSVHandler( void )
extern pxCurrentTCB; extern pxCurrentTCB;
extern vTaskSwitchContext; extern vTaskSwitchContext;
/* *INDENT-OFF* */
PRESERVE8 PRESERVE8
mrs r0, psp mrs r0, psp
isb isb
ldr r3, = pxCurrentTCB /* Get the location of the current TCB. */ ldr r3, =pxCurrentTCB /* Get the location of the current TCB. */
ldr r2, [ r3 ] ldr r2, [ r3 ]
stmdb r0 !, { stmdb r0 !, {
@ -404,12 +409,12 @@ __asm void xPortPendSVHandler( void )
stmdb sp !, { stmdb sp !, {
r3, r14 r3, r14
} }
mov r0, # configMAX_SYSCALL_INTERRUPT_PRIORITY mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
msr basepri, r0 msr basepri, r0
dsb dsb
isb isb
bl vTaskSwitchContext bl vTaskSwitchContext
mov r0, # 0 mov r0, #0
msr basepri, r0 msr basepri, r0
ldmia sp !, { ldmia sp !, {
r3, r14 r3, r14
@ -424,6 +429,7 @@ __asm void xPortPendSVHandler( void )
isb isb
bx r14 bx r14
nop nop
/* *INDENT-ON* */
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -651,10 +657,12 @@ void xPortSysTickHandler( void )
__asm uint32_t vPortGetIPSR( void ) __asm uint32_t vPortGetIPSR( void )
{ {
/* *INDENT-OFF* */
PRESERVE8 PRESERVE8
mrs r0, ipsr mrs r0, ipsr
bx r14 bx r14
/* *INDENT-ON* */
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/

20
portable/RVDS/ARM_CM4F/port.c
View file

@ -240,6 +240,7 @@ static void prvTaskExitError( void )
__asm void vPortSVCHandler( void ) __asm void vPortSVCHandler( void )
{ {
/* *INDENT-OFF* */
PRESERVE8 PRESERVE8
/* Get the location of the current TCB. */ /* Get the location of the current TCB. */
@ -255,15 +256,17 @@ __asm void vPortSVCHandler( void )
mov r0, # 0 mov r0, # 0
msr basepri, r0 msr basepri, r0
bx r14 bx r14
/* *INDENT-ON* */
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
__asm void prvStartFirstTask( void ) __asm void prvStartFirstTask( void )
{ {
/* *INDENT-OFF* */
PRESERVE8 PRESERVE8
/* Use the NVIC offset register to locate the stack. */ /* Use the NVIC offset register to locate the stack. */
ldr r0, = 0xE000ED08 ldr r0, =0xE000ED08
ldr r0, [ r0 ] ldr r0, [ r0 ]
ldr r0, [ r0 ] ldr r0, [ r0 ]
/* Set the msp back to the start of the stack. */ /* Set the msp back to the start of the stack. */
@ -273,7 +276,7 @@ __asm void prvStartFirstTask( void )
* before the scheduler was started - which would otherwise result in the * before the scheduler was started - which would otherwise result in the
* unnecessary leaving of space in the SVC stack for lazy saving of FPU * unnecessary leaving of space in the SVC stack for lazy saving of FPU
* registers. */ * registers. */
mov r0, # 0 mov r0, #0
msr control, r0 msr control, r0
/* Globally enable interrupts. */ /* Globally enable interrupts. */
cpsie i cpsie i
@ -284,15 +287,17 @@ __asm void prvStartFirstTask( void )
svc 0 svc 0
nop nop
nop nop
/* *INDENT-ON* */
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
__asm void prvEnableVFP( void ) __asm void prvEnableVFP( void )
{ {
/* *INDENT-OFF* */
PRESERVE8 PRESERVE8
/* The FPU enable bits are in the CPACR. */ /* The FPU enable bits are in the CPACR. */
ldr.w r0, = 0xE000ED88 ldr.w r0, =0xE000ED88
ldr r1, [ r0 ] ldr r1, [ r0 ]
/* Enable CP10 and CP11 coprocessors, then save back. */ /* Enable CP10 and CP11 coprocessors, then save back. */
@ -300,6 +305,7 @@ __asm void prvEnableVFP( void )
str r1, [ r0 ] str r1, [ r0 ]
bx r14 bx r14
nop nop
/* *INDENT-ON* */
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -453,16 +459,17 @@ __asm void xPortPendSVHandler( void )
extern pxCurrentTCB; extern pxCurrentTCB;
extern vTaskSwitchContext; extern vTaskSwitchContext;
/* *INDENT-OFF* */
PRESERVE8 PRESERVE8
mrs r0, psp mrs r0, psp
isb isb
/* Get the location of the current TCB. */ /* Get the location of the current TCB. */
ldr r3, = pxCurrentTCB ldr r3, =pxCurrentTCB
ldr r2, [ r3 ] ldr r2, [ r3 ]
/* Is the task using the FPU context? If so, push high vfp registers. */ /* Is the task using the FPU context? If so, push high vfp registers. */
tst r14, # 0x10 tst r14, #0x10
it eq it eq
vstmdbeq r0 !, { vstmdbeq r0 !, {
s16 - s31 s16 - s31
@ -522,6 +529,7 @@ __asm void xPortPendSVHandler( void )
#endif #endif
bx r14 bx r14
/* *INDENT-ON* */
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -749,10 +757,12 @@ void xPortSysTickHandler( void )
__asm uint32_t vPortGetIPSR( void ) __asm uint32_t vPortGetIPSR( void )
{ {
/* *INDENT-OFF* */
PRESERVE8 PRESERVE8
mrs r0, ipsr mrs r0, ipsr
bx r14 bx r14
/* *INDENT-ON* */
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/

154
portable/RVDS/ARM_CM4_MPU/port.c
View file

@ -310,6 +310,7 @@ __asm void vPortSVCHandler( void )
{ {
extern prvSVCHandler extern prvSVCHandler
/* *INDENT-OFF* */
PRESERVE8 PRESERVE8
/* Assumes psp was in use. */ /* Assumes psp was in use. */
@ -323,52 +324,69 @@ __asm void vPortSVCHandler( void )
#endif #endif
b prvSVCHandler b prvSVCHandler
/* *INDENT-ON* */
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
__asm void prvRestoreContextOfFirstTask( void ) __asm void prvRestoreContextOfFirstTask( void )
{ {
/* *INDENT-OFF* */
PRESERVE8 PRESERVE8
ldr r0, = 0xE000ED08 /* Use the NVIC offset register to locate the stack. */ ldr r0, =0xE000ED08 /* Use the NVIC offset register to locate the stack. */
ldr r0, [ r0 ] ldr r0, [ r0 ]
ldr r0, [ r0 ] ldr r0, [ r0 ]
msr msp, r0 /* Set the msp back to the start of the stack. */ msr msp, r0 /* Set the msp back to the start of the stack. */
ldr r3, = pxCurrentTCB /* Restore the context. */ ldr r3, =pxCurrentTCB /* Restore the context. */
ldr r1, [ r3 ] ldr r1, [ r3 ]
ldr r0, [ r1 ] /* The first item in the TCB is the task top of stack. */ ldr r0, [ r1 ] /* The first item in the TCB is the task top of stack. */
add r1, r1, # 4 /* Move onto the second item in the TCB... */ add r1, r1, #4 /* Move onto the second item in the TCB... */
dmb /* Complete outstanding transfers before disabling MPU. */ dmb /* Complete outstanding transfers before disabling MPU. */
ldr r2, = 0xe000ed94 /* MPU_CTRL register. */ ldr r2, =0xe000ed94 /* MPU_CTRL register. */
ldr r3, [ r2 ] /* Read the value of MPU_CTRL. */ ldr r3, [ r2 ] /* Read the value of MPU_CTRL. */
bic r3, r3, # 1 /* r3 = r3 & ~1 i.e. Clear the bit 0 in r3. */ bic r3, r3, # 1 /* r3 = r3 & ~1 i.e. Clear the bit 0 in r3. */
str r3, [ r2 ] /* Disable MPU. */ str r3, [ r2 ] /* Disable MPU. */
ldr r2, = 0xe000ed9c /* Region Base Address register. */ ldr r2, =0xe000ed9c /* Region Base Address register. */
ldmia r1!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */ ldmia r1 !, {
stmia r2, {r4-r11} /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */ r4 - r11
} /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
stmia r2, {
r4 - r11
} /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
#if ( portTOTAL_NUM_REGIONS == 16 ) #if ( portTOTAL_NUM_REGIONS == 16 )
ldmia r1!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */ ldmia r1 !, {
stmia r2, {r4-r11} /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */ r4 - r11
ldmia r1!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */ } /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
stmia r2, {r4-r11} /* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */ stmia r2, {
#endif /* portTOTAL_NUM_REGIONS == 16. */ r4 - r11
} /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
ldmia r1 !, {
r4 - r11
} /* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
stmia r2, {
r4 - r11
} /* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
#endif /* portTOTAL_NUM_REGIONS == 16. */
ldr r2, = 0xe000ed94 /* MPU_CTRL register. */ ldr r2, =0xe000ed94 /* MPU_CTRL register. */
ldr r3, [ r2 ] /* Read the value of MPU_CTRL. */ ldr r3, [ r2 ] /* Read the value of MPU_CTRL. */
orr r3, r3, # 1 /* r3 = r3 | 1 i.e. Set the bit 0 in r3. */ orr r3, r3, #1 /* r3 = r3 | 1 i.e. Set the bit 0 in r3. */
str r3, [ r2 ] /* Enable MPU. */ str r3, [ r2 ] /* Enable MPU. */
dsb /* Force memory writes before continuing. */ dsb /* Force memory writes before continuing. */
ldmia r0!, {r3-r11, r14} /* Pop the registers that are not automatically saved on exception entry. */ ldmia r0 !, {
r3 - r11, r14
} /* Pop the registers that are not automatically saved on exception entry. */
msr control, r3 msr control, r3
msr psp, r0 /* Restore the task stack pointer. */ msr psp, r0 /* Restore the task stack pointer. */
mov r0, # 0 mov r0, #0
msr basepri, r0 msr basepri, r0
bx r14 bx r14
nop nop
/* *INDENT-ON* */
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -476,10 +494,11 @@ BaseType_t xPortStartScheduler( void )
__asm void prvStartFirstTask( void ) __asm void prvStartFirstTask( void )
{ {
/* *INDENT-OFF* */
PRESERVE8 PRESERVE8
/* Use the NVIC offset register to locate the stack. */ /* Use the NVIC offset register to locate the stack. */
ldr r0, = 0xE000ED08 ldr r0, =0xE000ED08
ldr r0, [ r0 ] ldr r0, [ r0 ]
ldr r0, [ r0 ] ldr r0, [ r0 ]
/* Set the msp back to the start of the stack. */ /* Set the msp back to the start of the stack. */
@ -489,7 +508,7 @@ __asm void prvStartFirstTask( void )
* before the scheduler was started - which would otherwise result in the * before the scheduler was started - which would otherwise result in the
* unnecessary leaving of space in the SVC stack for lazy saving of FPU * unnecessary leaving of space in the SVC stack for lazy saving of FPU
* registers. */ * registers. */
mov r0, # 0 mov r0, #0
msr control, r0 msr control, r0
/* Globally enable interrupts. */ /* Globally enable interrupts. */
cpsie i cpsie i
@ -499,6 +518,7 @@ __asm void prvStartFirstTask( void )
svc portSVC_START_SCHEDULER /* System call to start first task. */ svc portSVC_START_SCHEDULER /* System call to start first task. */
nop nop
nop nop
/* *INDENT-ON* */
} }
void vPortEndScheduler( void ) void vPortEndScheduler( void )
@ -542,68 +562,94 @@ __asm void xPortPendSVHandler( void )
extern pxCurrentTCB; extern pxCurrentTCB;
extern vTaskSwitchContext; extern vTaskSwitchContext;
/* *INDENT-OFF* */
PRESERVE8 PRESERVE8
mrs r0, psp mrs r0, psp
ldr r3, = pxCurrentTCB /* Get the location of the current TCB. */ ldr r3, =pxCurrentTCB /* Get the location of the current TCB. */
ldr r2, [ r3 ] ldr r2, [ r3 ]
tst r14, # 0x10 /* Is the task using the FPU context? If so, push high vfp registers. */ tst r14, #0x10 /* Is the task using the FPU context? If so, push high vfp registers. */
it eq it eq
vstmdbeq r0!, {s16-s31} vstmdbeq r0 !, {
s16 - s31
}
mrs r1, control mrs r1, control
stmdb r0!, {r1, r4-r11, r14} /* Save the remaining registers. */ stmdb r0 !, {
r1, r4 - r11, r14
} /* Save the remaining registers. */
str r0, [ r2 ] /* Save the new top of stack into the first member of the TCB. */ str r0, [ r2 ] /* Save the new top of stack into the first member of the TCB. */
stmdb sp!, {r0, r3} stmdb sp !, {
r0, r3
}
mov r0, # configMAX_SYSCALL_INTERRUPT_PRIORITY mov r0, # configMAX_SYSCALL_INTERRUPT_PRIORITY
msr basepri, r0 msr basepri, r0
dsb dsb
isb isb
bl vTaskSwitchContext bl vTaskSwitchContext
mov r0, # 0 mov r0, #0
msr basepri, r0 msr basepri, r0
ldmia sp!, {r0, r3} ldmia sp !, {
r0, r3
}
/* Restore the context. */ /* Restore the context. */
ldr r1, [ r3 ] ldr r1, [ r3 ]
ldr r0, [ r1 ] /* The first item in the TCB is the task top of stack. */ ldr r0, [ r1 ] /* The first item in the TCB is the task top of stack. */
add r1, r1, # 4 /* Move onto the second item in the TCB... */ add r1, r1, #4 /* Move onto the second item in the TCB... */
dmb /* Complete outstanding transfers before disabling MPU. */ dmb /* Complete outstanding transfers before disabling MPU. */
ldr r2, = 0xe000ed94 /* MPU_CTRL register. */ ldr r2, =0xe000ed94 /* MPU_CTRL register. */
ldr r3, [ r2 ] /* Read the value of MPU_CTRL. */ ldr r3, [ r2 ] /* Read the value of MPU_CTRL. */
bic r3, r3, # 1 /* r3 = r3 & ~1 i.e. Clear the bit 0 in r3. */ bic r3, r3, #1 /* r3 = r3 & ~1 i.e. Clear the bit 0 in r3. */
str r3, [ r2 ] /* Disable MPU. */ str r3, [ r2 ] /* Disable MPU. */
ldr r2, = 0xe000ed9c /* Region Base Address register. */ ldr r2, =0xe000ed9c /* Region Base Address register. */
ldmia r1!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */ ldmia r1 !, {
stmia r2, {r4-r11} /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */ r4 - r11
} /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
stmia r2, {
r4 - r11
} /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
#if ( portTOTAL_NUM_REGIONS == 16 ) #if ( portTOTAL_NUM_REGIONS == 16 )
ldmia r1!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */ ldmia r1 !, {
stmia r2, {r4-r11} /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */ r4 - r11
ldmia r1!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */ } /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
stmia r2, {r4-r11} /* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */ stmia r2, {
#endif /* portTOTAL_NUM_REGIONS == 16. */ r4 - r11
} /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
ldmia r1 !, {
r4 - r11
} /* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
stmia r2, {
r4 - r11
} /* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
#endif /* portTOTAL_NUM_REGIONS == 16. */
ldr r2, = 0xe000ed94 /* MPU_CTRL register. */ ldr r2, =0xe000ed94 /* MPU_CTRL register. */
ldr r3, [ r2 ] /* Read the value of MPU_CTRL. */ ldr r3, [ r2 ] /* Read the value of MPU_CTRL. */
orr r3, r3, #1 /* r3 = r3 | 1 i.e. Set the bit 0 in r3. */ orr r3, r3, #1 /* r3 = r3 | 1 i.e. Set the bit 0 in r3. */
str r3, [ r2 ] /* Enable MPU. */ str r3, [ r2 ] /* Enable MPU. */
dsb /* Force memory writes before continuing. */ dsb /* Force memory writes before continuing. */
ldmia r0!, {r3-r11, r14} /* Pop the registers that are not automatically saved on exception entry. */ ldmia r0 !, {
r3 - r11, r14
} /* Pop the registers that are not automatically saved on exception entry. */
msr control, r3 msr control, r3
tst r14, # 0x10 /* Is the task using the FPU context? If so, pop the high vfp registers too. */ tst r14, #0x10 /* Is the task using the FPU context? If so, pop the high vfp registers too. */
it eq it eq
vldmiaeq r0!, {s16-s31} vldmiaeq r0 !, {
s16 - s31
}
msr psp, r0 msr psp, r0
bx r14 bx r14
nop nop
/* *INDENT-ON* */
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -642,27 +688,31 @@ __weak void vSetupTimerInterrupt( void )
__asm void vPortSwitchToUserMode( void ) __asm void vPortSwitchToUserMode( void )
{ {
/* *INDENT-OFF* */
PRESERVE8 PRESERVE8
mrs r0, control mrs r0, control
orr r0, # 1 orr r0, #1
msr control, r0 msr control, r0
bx r14 bx r14
/* *INDENT-ON* */
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
__asm void vPortEnableVFP( void ) __asm void vPortEnableVFP( void )
{ {
/* *INDENT-OFF* */
PRESERVE8 PRESERVE8
ldr.w r0, = 0xE000ED88 /* The FPU enable bits are in the CPACR. */ ldr.w r0, =0xE000ED88 /* The FPU enable bits are in the CPACR. */
ldr r1, [ r0 ] ldr r1, [ r0 ]
orr r1, r1, # ( 0xf << 20 ) /* Enable CP10 and CP11 coprocessors, then save back. */ orr r1, r1, #( 0xf << 20 ) /* Enable CP10 and CP11 coprocessors, then save back. */
str r1, [ r0 ] str r1, [ r0 ]
bx r14 bx r14
nop nop
nop nop
/* *INDENT-ON* */
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -761,25 +811,29 @@ static uint32_t prvGetMPURegionSizeSetting( uint32_t ulActualSizeInBytes )
__asm BaseType_t xIsPrivileged( void ) __asm BaseType_t xIsPrivileged( void )
{ {
/* *INDENT-OFF* */
PRESERVE8 PRESERVE8
mrs r0, control /* r0 = CONTROL. */ mrs r0, control /* r0 = CONTROL. */
tst r0, # 1 /* Perform r0 & 1 (bitwise AND) and update the conditions flag. */ tst r0, #1 /* Perform r0 & 1 (bitwise AND) and update the conditions flag. */
ite ne ite ne
movne r0, # 0 /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */ movne r0, #0 /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
moveq r0, # 1 /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */ moveq r0, #1 /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
bx lr /* Return. */ bx lr /* Return. */
/* *INDENT-ON* */
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
__asm void vResetPrivilege( void ) __asm void vResetPrivilege( void )
{ {
/* *INDENT-OFF* */
PRESERVE8 PRESERVE8
mrs r0, control /* r0 = CONTROL. */ mrs r0, control /* r0 = CONTROL. */
orrs r0, # 1 /* r0 = r0 | 1. */ orrs r0, #1 /* r0 = r0 | 1. */
msr control, r0 /* CONTROL = r0. */ msr control, r0 /* CONTROL = r0. */
bx lr /* Return. */ bx lr /* Return. */
/* *INDENT-ON* */
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -886,10 +940,12 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
__asm uint32_t prvPortGetIPSR( void ) __asm uint32_t prvPortGetIPSR( void )
{ {
/* *INDENT-OFF* */
PRESERVE8 PRESERVE8
mrs r0, ipsr mrs r0, ipsr
bx r14 bx r14
/* *INDENT-ON* */
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/

239
portable/RVDS/ARM_CM4_MPU/portmacro.h
View file

@ -27,11 +27,13 @@
#ifndef PORTMACRO_H #ifndef PORTMACRO_H
#define PORTMACRO_H #define PORTMACRO_H
#ifdef __cplusplus /* *INDENT-OFF* */
#ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* *INDENT-ON* */
/*----------------------------------------------------------- /*-----------------------------------------------------------
* Port specific definitions. * Port specific definitions.
@ -44,54 +46,55 @@
*/ */
/* Type definitions. */ /* Type definitions. */
#define portCHAR char #define portCHAR char
#define portFLOAT float #define portFLOAT float
#define portDOUBLE double #define portDOUBLE double
#define portLONG long #define portLONG long
#define portSHORT short #define portSHORT short
#define portSTACK_TYPE uint32_t #define portSTACK_TYPE uint32_t
#define portBASE_TYPE long #define portBASE_TYPE long
typedef portSTACK_TYPE StackType_t; typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t; typedef long BaseType_t;
typedef unsigned long UBaseType_t; typedef unsigned long UBaseType_t;
#if ( configUSE_16_BIT_TICKS == 1 ) #if ( configUSE_16_BIT_TICKS == 1 )
typedef uint16_t TickType_t; typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff #define portMAX_DELAY ( TickType_t ) 0xffff
#else #else
typedef uint32_t TickType_t; typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
* not need to be guarded with a critical section. */ * not need to be guarded with a critical section. */
#define portTICK_TYPE_IS_ATOMIC 1 #define portTICK_TYPE_IS_ATOMIC 1
#endif #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* MPU specific constants. */ /* MPU specific constants. */
#define portUSING_MPU_WRAPPERS 1 #define portUSING_MPU_WRAPPERS 1
#define portPRIVILEGE_BIT ( 0x80000000UL ) #define portPRIVILEGE_BIT ( 0x80000000UL )
#define portMPU_REGION_READ_WRITE ( 0x03UL << 24UL ) #define portMPU_REGION_READ_WRITE ( 0x03UL << 24UL )
#define portMPU_REGION_PRIVILEGED_READ_ONLY ( 0x05UL << 24UL ) #define portMPU_REGION_PRIVILEGED_READ_ONLY ( 0x05UL << 24UL )
#define portMPU_REGION_READ_ONLY ( 0x06UL << 24UL ) #define portMPU_REGION_READ_ONLY ( 0x06UL << 24UL )
#define portMPU_REGION_PRIVILEGED_READ_WRITE ( 0x01UL << 24UL ) #define portMPU_REGION_PRIVILEGED_READ_WRITE ( 0x01UL << 24UL )
#define portMPU_REGION_PRIVILEGED_READ_WRITE_UNPRIV_READ_ONLY ( 0x02UL << 24UL ) #define portMPU_REGION_PRIVILEGED_READ_WRITE_UNPRIV_READ_ONLY ( 0x02UL << 24UL )
#define portMPU_REGION_CACHEABLE_BUFFERABLE ( 0x07UL << 16UL ) #define portMPU_REGION_CACHEABLE_BUFFERABLE ( 0x07UL << 16UL )
#define portMPU_REGION_EXECUTE_NEVER ( 0x01UL << 28UL ) #define portMPU_REGION_EXECUTE_NEVER ( 0x01UL << 28UL )
/* Location of the TEX,S,C,B bits in the MPU Region Attribute and Size
/* Location of the TEX,S,C,B bits in the MPU Region Attribute and Size
* Register (RASR). */ * Register (RASR). */
#define portMPU_RASR_TEX_S_C_B_LOCATION ( 16UL ) #define portMPU_RASR_TEX_S_C_B_LOCATION ( 16UL )
#define portMPU_RASR_TEX_S_C_B_MASK ( 0x3FUL ) #define portMPU_RASR_TEX_S_C_B_MASK ( 0x3FUL )
/* MPU settings that can be overriden in FreeRTOSConfig.h. */ /* MPU settings that can be overriden in FreeRTOSConfig.h. */
#ifndef configTOTAL_MPU_REGIONS #ifndef configTOTAL_MPU_REGIONS
/* Define to 8 for backward compatibility. */ /* Define to 8 for backward compatibility. */
#define configTOTAL_MPU_REGIONS ( 8UL ) #define configTOTAL_MPU_REGIONS ( 8UL )
#endif #endif
/* /*
* The TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits define the * The TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits define the
* memory type, and where necessary the cacheable and shareable properties * memory type, and where necessary the cacheable and shareable properties
* of the memory region. * of the memory region.
@ -139,7 +142,7 @@
| | | | | bus. See the table below for the cacheability policy | | | | | | | bus. See the table below for the cacheability policy | |
| | | | | encoding. memory, BB=Outer policy, AA=Inner policy. | | | | | | | encoding. memory, BB=Outer policy, AA=Inner policy. | |
+-----+---+---+------------------------+--------------------------------------------------------+-------------------------+ +-----+---+---+------------------------+--------------------------------------------------------+-------------------------+
|
+-----------------------------------------+----------------------------------------+ +-----------------------------------------+----------------------------------------+
| AA or BB subfield of {TEX,C,B} encoding | Cacheability policy | | AA or BB subfield of {TEX,C,B} encoding | Cacheability policy |
+-----------------------------------------+----------------------------------------+ +-----------------------------------------+----------------------------------------+
@ -153,64 +156,64 @@
+-----------------------------------------+----------------------------------------+ +-----------------------------------------+----------------------------------------+
*/ */
/* TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits for Flash /* TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits for Flash
* region. */ * region. */
#ifndef configTEX_S_C_B_FLASH #ifndef configTEX_S_C_B_FLASH
/* Default to TEX=000, S=1, C=1, B=1 for backward compatibility. */ /* Default to TEX=000, S=1, C=1, B=1 for backward compatibility. */
#define configTEX_S_C_B_FLASH ( 0x07UL ) #define configTEX_S_C_B_FLASH ( 0x07UL )
#endif #endif
/* TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits for SRAM /* TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits for SRAM
* region. */ * region. */
#ifndef configTEX_S_C_B_SRAM #ifndef configTEX_S_C_B_SRAM
/* Default to TEX=000, S=1, C=1, B=1 for backward compatibility. */ /* Default to TEX=000, S=1, C=1, B=1 for backward compatibility. */
#define configTEX_S_C_B_SRAM ( 0x07UL ) #define configTEX_S_C_B_SRAM ( 0x07UL )
#endif #endif
#define portUNPRIVILEGED_FLASH_REGION ( 0UL ) #define portUNPRIVILEGED_FLASH_REGION ( 0UL )
#define portPRIVILEGED_FLASH_REGION ( 1UL ) #define portPRIVILEGED_FLASH_REGION ( 1UL )
#define portPRIVILEGED_RAM_REGION ( 2UL ) #define portPRIVILEGED_RAM_REGION ( 2UL )
#define portGENERAL_PERIPHERALS_REGION ( 3UL ) #define portGENERAL_PERIPHERALS_REGION ( 3UL )
#define portSTACK_REGION ( 4UL ) #define portSTACK_REGION ( 4UL )
#define portFIRST_CONFIGURABLE_REGION ( 5UL ) #define portFIRST_CONFIGURABLE_REGION ( 5UL )
#define portTOTAL_NUM_REGIONS ( configTOTAL_MPU_REGIONS ) #define portTOTAL_NUM_REGIONS ( configTOTAL_MPU_REGIONS )
#define portNUM_CONFIGURABLE_REGIONS ( portTOTAL_NUM_REGIONS - portFIRST_CONFIGURABLE_REGION ) #define portNUM_CONFIGURABLE_REGIONS ( portTOTAL_NUM_REGIONS - portFIRST_CONFIGURABLE_REGION )
#define portLAST_CONFIGURABLE_REGION ( portTOTAL_NUM_REGIONS - 1 ) #define portLAST_CONFIGURABLE_REGION ( portTOTAL_NUM_REGIONS - 1 )
void vPortSwitchToUserMode( void ); void vPortSwitchToUserMode( void );
#define portSWITCH_TO_USER_MODE() vPortSwitchToUserMode() #define portSWITCH_TO_USER_MODE() vPortSwitchToUserMode()
typedef struct MPU_REGION_REGISTERS typedef struct MPU_REGION_REGISTERS
{ {
uint32_t ulRegionBaseAddress; uint32_t ulRegionBaseAddress;
uint32_t ulRegionAttribute; uint32_t ulRegionAttribute;
} xMPU_REGION_REGISTERS; } xMPU_REGION_REGISTERS;
/* Plus 1 to create space for the stack region. */ /* Plus 1 to create space for the stack region. */
typedef struct MPU_SETTINGS typedef struct MPU_SETTINGS
{ {
xMPU_REGION_REGISTERS xRegion[ portTOTAL_NUM_REGIONS ]; xMPU_REGION_REGISTERS xRegion[ portTOTAL_NUM_REGIONS ];
} xMPU_SETTINGS; } xMPU_SETTINGS;
/* Architecture specifics. */ /* Architecture specifics. */
#define portSTACK_GROWTH ( -1 ) #define portSTACK_GROWTH ( -1 )
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ ) #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 8 #define portBYTE_ALIGNMENT 8
/* Constants used with memory barrier intrinsics. */ /* Constants used with memory barrier intrinsics. */
#define portSY_FULL_READ_WRITE ( 15 ) #define portSY_FULL_READ_WRITE ( 15 )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* SVC numbers for various services. */ /* SVC numbers for various services. */
#define portSVC_START_SCHEDULER 0 #define portSVC_START_SCHEDULER 0
#define portSVC_YIELD 1 #define portSVC_YIELD 1
#define portSVC_RAISE_PRIVILEGE 2 #define portSVC_RAISE_PRIVILEGE 2
/* Scheduler utilities. */ /* Scheduler utilities. */
#define portYIELD() __asm{ SVC portSVC_YIELD } #define portYIELD() __asm{ SVC portSVC_YIELD }
#define portYIELD_WITHIN_API() \ #define portYIELD_WITHIN_API() \
{ \ { \
/* Set a PendSV to request a context switch. */ \ /* Set a PendSV to request a context switch. */ \
portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
@ -222,31 +225,31 @@
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT #define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Critical section management. */ /* Critical section management. */
extern void vPortEnterCritical( void ); extern void vPortEnterCritical( void );
extern void vPortExitCritical( void ); extern void vPortExitCritical( void );
#define portDISABLE_INTERRUPTS() vPortRaiseBASEPRI() #define portDISABLE_INTERRUPTS() vPortRaiseBASEPRI()
#define portENABLE_INTERRUPTS() vPortSetBASEPRI( 0 ) #define portENABLE_INTERRUPTS() vPortSetBASEPRI( 0 )
#define portENTER_CRITICAL() vPortEnterCritical() #define portENTER_CRITICAL() vPortEnterCritical()
#define portEXIT_CRITICAL() vPortExitCritical() #define portEXIT_CRITICAL() vPortExitCritical()
#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortRaiseBASEPRI() #define portSET_INTERRUPT_MASK_FROM_ISR() ulPortRaiseBASEPRI()
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vPortSetBASEPRI( x ) #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vPortSetBASEPRI( x )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Architecture specific optimisations. */ /* Architecture specific optimisations. */
#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
#endif #endif
#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
/* Check the configuration. */ /* Check the configuration. */
#if ( configMAX_PRIORITIES > 32 ) #if ( configMAX_PRIORITIES > 32 )
@ -261,111 +264,119 @@
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __clz( ( uxReadyPriorities ) ) ) #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __clz( ( uxReadyPriorities ) ) )
#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Task function macros as described on the FreeRTOS.org WEB site. These are /* Task function macros as described on the FreeRTOS.org WEB site. These are
* not necessary for to use this port. They are defined so the common demo files * not necessary for to use this port. They are defined so the common demo files
* (which build with all the ports) will build. */ * (which build with all the ports) will build. */
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters ) #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters ) #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#ifdef configASSERT #ifdef configASSERT
void vPortValidateInterruptPriority( void ); void vPortValidateInterruptPriority( void );
#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority() #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority()
#endif #endif
/* portNOP() is not required by this port. */ /* portNOP() is not required by this port. */
#define portNOP() #define portNOP()
#define portINLINE __inline #define portINLINE __inline
#ifndef portFORCE_INLINE #ifndef portFORCE_INLINE
#define portFORCE_INLINE __forceinline #define portFORCE_INLINE __forceinline
#endif #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
extern BaseType_t xIsPrivileged( void ); extern BaseType_t xIsPrivileged( void );
extern void vResetPrivilege( void ); extern void vResetPrivilege( void );
/** /**
* @brief Checks whether or not the processor is privileged. * @brief Checks whether or not the processor is privileged.
* *
* @return 1 if the processor is already privileged, 0 otherwise. * @return 1 if the processor is already privileged, 0 otherwise.
*/ */
#define portIS_PRIVILEGED() xIsPrivileged() #define portIS_PRIVILEGED() xIsPrivileged()
/** /**
* @brief Raise an SVC request to raise privilege. * @brief Raise an SVC request to raise privilege.
*/ */
#define portRAISE_PRIVILEGE() __asm { svc portSVC_RAISE_PRIVILEGE } #define portRAISE_PRIVILEGE() __asm { svc portSVC_RAISE_PRIVILEGE }
/** /**
* @brief Lowers the privilege level by setting the bit 0 of the CONTROL * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
* register. * register.
*/ */
#define portRESET_PRIVILEGE() vResetPrivilege() #define portRESET_PRIVILEGE() vResetPrivilege()
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
static portFORCE_INLINE void vPortSetBASEPRI( uint32_t ulBASEPRI ) static portFORCE_INLINE void vPortSetBASEPRI( uint32_t ulBASEPRI )
{ {
__asm __asm
{ {
/* Barrier instructions are not used as this function is only used to /* Barrier instructions are not used as this function is only used to
* lower the BASEPRI value. */ * lower the BASEPRI value. */
/* *INDENT-OFF* */
msr basepri, ulBASEPRI msr basepri, ulBASEPRI
/* *INDENT-ON* */
} }
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
static portFORCE_INLINE void vPortRaiseBASEPRI( void ) static portFORCE_INLINE void vPortRaiseBASEPRI( void )
{ {
uint32_t ulNewBASEPRI = configMAX_SYSCALL_INTERRUPT_PRIORITY; uint32_t ulNewBASEPRI = configMAX_SYSCALL_INTERRUPT_PRIORITY;
__asm __asm
{ {
/* Set BASEPRI to the max syscall priority to effect a critical /* Set BASEPRI to the max syscall priority to effect a critical
* section. */ * section. */
/* *INDENT-OFF* */
msr basepri, ulNewBASEPRI msr basepri, ulNewBASEPRI
dsb dsb
isb isb
/* *INDENT-ON* */
} }
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
static portFORCE_INLINE void vPortClearBASEPRIFromISR( void ) static portFORCE_INLINE void vPortClearBASEPRIFromISR( void )
{ {
__asm __asm
{ {
/* Set BASEPRI to 0 so no interrupts are masked. This function is only /* Set BASEPRI to 0 so no interrupts are masked. This function is only
* used to lower the mask in an interrupt, so memory barriers are not * used to lower the mask in an interrupt, so memory barriers are not
* used. */ * used. */
/* *INDENT-OFF* */
msr basepri, # 0 msr basepri, # 0
/* *INDENT-ON* */
} }
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
static portFORCE_INLINE uint32_t ulPortRaiseBASEPRI( void ) static portFORCE_INLINE uint32_t ulPortRaiseBASEPRI( void )
{ {
uint32_t ulReturn, ulNewBASEPRI = configMAX_SYSCALL_INTERRUPT_PRIORITY; uint32_t ulReturn, ulNewBASEPRI = configMAX_SYSCALL_INTERRUPT_PRIORITY;
__asm __asm
{ {
/* Set BASEPRI to the max syscall priority to effect a critical /* Set BASEPRI to the max syscall priority to effect a critical
* section. */ * section. */
/* *INDENT-OFF* */
mrs ulReturn, basepri mrs ulReturn, basepri
msr basepri, ulNewBASEPRI msr basepri, ulNewBASEPRI
dsb dsb
isb isb
/* *INDENT-ON* */
} }
return ulReturn; return ulReturn;
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
static portFORCE_INLINE BaseType_t xPortIsInsideInterrupt( void ) static portFORCE_INLINE BaseType_t xPortIsInsideInterrupt( void )
{ {
uint32_t ulCurrentInterrupt; uint32_t ulCurrentInterrupt;
BaseType_t xReturn; BaseType_t xReturn;
@ -385,17 +396,19 @@
} }
return xReturn; return xReturn;
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#ifndef configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY #ifndef configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY
#warning "configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY is not defined. We recommend defining it to 1 in FreeRTOSConfig.h for better security. https: /*www.freertos.org/FreeRTOS-V10.3.x.html" */ #warning "configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY is not defined. We recommend defining it to 1 in FreeRTOSConfig.h for better security. https: /*www.freertos.org/FreeRTOS-V10.3.x.html" */
#define configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY 0 #define configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY 0
#endif #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#ifdef __cplusplus /* *INDENT-OFF* */
#ifdef __cplusplus
} }
#endif #endif
/* *INDENT-ON* */
#endif /* PORTMACRO_H */ #endif /* PORTMACRO_H */

32
portable/RVDS/ARM_CM7/r0p1/port.c
View file

@ -236,8 +236,9 @@ __asm void vPortSVCHandler( void )
{ {
PRESERVE8 PRESERVE8
/* *INDENT-OFF* */
/* Get the location of the current TCB. */ /* Get the location of the current TCB. */
ldr r3, = pxCurrentTCB ldr r3, =pxCurrentTCB
ldr r1, [ r3 ] ldr r1, [ r3 ]
ldr r0, [ r1 ] ldr r0, [ r1 ]
/* Pop the core registers. */ /* Pop the core registers. */
@ -246,18 +247,20 @@ __asm void vPortSVCHandler( void )
} }
msr psp, r0 msr psp, r0
isb isb
mov r0, # 0 mov r0, #0
msr basepri, r0 msr basepri, r0
bx r14 bx r14
/* *INDENT-ON* */
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
__asm void prvStartFirstTask( void ) __asm void prvStartFirstTask( void )
{ {
/* *INDENT-OFF* */
PRESERVE8 PRESERVE8
/* Use the NVIC offset register to locate the stack. */ /* Use the NVIC offset register to locate the stack. */
ldr r0, = 0xE000ED08 ldr r0, =0xE000ED08
ldr r0, [ r0 ] ldr r0, [ r0 ]
ldr r0, [ r0 ] ldr r0, [ r0 ]
/* Set the msp back to the start of the stack. */ /* Set the msp back to the start of the stack. */
@ -267,7 +270,7 @@ __asm void prvStartFirstTask( void )
* before the scheduler was started - which would otherwise result in the * before the scheduler was started - which would otherwise result in the
* unnecessary leaving of space in the SVC stack for lazy saving of FPU * unnecessary leaving of space in the SVC stack for lazy saving of FPU
* registers. */ * registers. */
mov r0, # 0 mov r0, #0
msr control, r0 msr control, r0
/* Globally enable interrupts. */ /* Globally enable interrupts. */
cpsie i cpsie i
@ -278,22 +281,25 @@ __asm void prvStartFirstTask( void )
svc 0 svc 0
nop nop
nop nop
/* *INDENT-ON* */
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
__asm void prvEnableVFP( void ) __asm void prvEnableVFP( void )
{ {
/* *INDENT-OFF* */
PRESERVE8 PRESERVE8
/* The FPU enable bits are in the CPACR. */ /* The FPU enable bits are in the CPACR. */
ldr.w r0, = 0xE000ED88 ldr.w r0, =0xE000ED88
ldr r1, [ r0 ] ldr r1, [ r0 ]
/* Enable CP10 and CP11 coprocessors, then save back. */ /* Enable CP10 and CP11 coprocessors, then save back. */
orr r1, r1, # ( 0xf << 20 ) orr r1, r1, #( 0xf << 20 )
str r1, [ r0 ] str r1, [ r0 ]
bx r14 bx r14
nop nop
/* *INDENT-ON* */
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -438,16 +444,17 @@ __asm void xPortPendSVHandler( void )
extern pxCurrentTCB; extern pxCurrentTCB;
extern vTaskSwitchContext; extern vTaskSwitchContext;
/* *INDENT-OFF* */
PRESERVE8 PRESERVE8
mrs r0, psp mrs r0, psp
isb isb
/* Get the location of the current TCB. */ /* Get the location of the current TCB. */
ldr r3, = pxCurrentTCB ldr r3, =pxCurrentTCB
ldr r2, [ r3 ] ldr r2, [ r3 ]
/* Is the task using the FPU context? If so, push high vfp registers. */ /* Is the task using the FPU context? If so, push high vfp registers. */
tst r14, # 0x10 tst r14, #0x10
it eq it eq
vstmdbeq r0 !, { vstmdbeq r0 !, {
s16 - s31 s16 - s31
@ -464,14 +471,14 @@ __asm void xPortPendSVHandler( void )
stmdb sp !, { stmdb sp !, {
r0, r3 r0, r3
} }
mov r0, # configMAX_SYSCALL_INTERRUPT_PRIORITY mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
cpsid i cpsid i
msr basepri, r0 msr basepri, r0
dsb dsb
isb isb
cpsie i cpsie i
bl vTaskSwitchContext bl vTaskSwitchContext
mov r0, # 0 mov r0, #0
msr basepri, r0 msr basepri, r0
ldmia sp !, { ldmia sp !, {
r0, r3 r0, r3
@ -488,7 +495,7 @@ __asm void xPortPendSVHandler( void )
/* Is the task using the FPU context? If so, pop the high vfp registers /* Is the task using the FPU context? If so, pop the high vfp registers
* too. */ * too. */
tst r14, # 0x10 tst r14, #0x10
it eq it eq
vldmiaeq r0 !, { vldmiaeq r0 !, {
s16 - s31 s16 - s31
@ -509,6 +516,7 @@ __asm void xPortPendSVHandler( void )
#endif #endif
bx r14 bx r14
/* *INDENT-ON* */
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -736,10 +744,12 @@ void xPortSysTickHandler( void )
__asm uint32_t vPortGetIPSR( void ) __asm uint32_t vPortGetIPSR( void )
{ {
/* *INDENT-OFF* */
PRESERVE8 PRESERVE8
mrs r0, ipsr mrs r0, ipsr
bx r14 bx r14
/* *INDENT-ON* */
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/

3
portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c vendored
View file

@ -54,7 +54,8 @@
extern void __mw_run_tls_dtor(); extern void __mw_run_tls_dtor();
extern void __mw_run_tls_ctor(); extern void __mw_run_tls_ctor();
extern uint32_t exc_nest_count; extern uint32_t exc_nest_count;
/* /*
* Linker generated symbols to mark .tls section addresses * Linker generated symbols to mark .tls section addresses
* first byte .. last byte * first byte .. last byte

104
portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h vendored
View file

@ -26,16 +26,18 @@
*/ */
#ifndef PORTMACRO_H #ifndef PORTMACRO_H
#define PORTMACRO_H #define PORTMACRO_H
#ifdef __cplusplus /* *INDENT-OFF* */
#ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* *INDENT-ON* */
/* record stack high address for stack check */ /* record stack high address for stack check */
#ifndef configRECORD_STACK_HIGH_ADDRESS #ifndef configRECORD_STACK_HIGH_ADDRESS
#define configRECORD_STACK_HIGH_ADDRESS 1 #define configRECORD_STACK_HIGH_ADDRESS 1
#endif #endif
/*----------------------------------------------------------- /*-----------------------------------------------------------
* Port specific definitions. * Port specific definitions.
@ -48,78 +50,78 @@
*/ */
/* Type definitions. */ /* Type definitions. */
#define portCHAR char #define portCHAR char
#define portFLOAT float #define portFLOAT float
#define portDOUBLE double #define portDOUBLE double
#define portLONG long #define portLONG long
#define portSHORT short #define portSHORT short
#define portSTACK_TYPE unsigned int #define portSTACK_TYPE unsigned int
#define portBASE_TYPE portLONG #define portBASE_TYPE portLONG
#ifndef Asm #ifndef Asm
#define Asm __asm__ volatile #define Asm __asm__ volatile
#endif #endif
/* /*
* normal constants * normal constants
*/ */
#ifndef NULL #ifndef NULL
#define NULL 0 /* invalid pointer */ #define NULL 0 /* invalid pointer */
#endif /* NULL */ #endif /* NULL */
#ifndef true #ifndef true
#define true 1 /* true */ #define true 1 /* true */
#endif /* true */ #endif /* true */
#ifndef false #ifndef false
#define false 0 /* false */ #define false 0 /* false */
#endif /* false */ #endif /* false */
typedef portSTACK_TYPE StackType_t; typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t; typedef long BaseType_t;
typedef unsigned long UBaseType_t; typedef unsigned long UBaseType_t;
#if ( configUSE_16_BIT_TICKS == 1 ) #if ( configUSE_16_BIT_TICKS == 1 )
typedef uint16_t TickType_t; typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff #define portMAX_DELAY ( TickType_t ) 0xffff
#else #else
typedef unsigned int TickType_t; typedef unsigned int TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
#endif #endif
#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 ) #define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
#define portSTACK_GROWTH ( -1 ) #define portSTACK_GROWTH ( -1 )
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ ) #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 8 #define portBYTE_ALIGNMENT 8
#define portNOP() Asm( "nop_s" ); #define portNOP() Asm( "nop_s" );
#define IPM_ENABLE_ALL 1 #define IPM_ENABLE_ALL 1
#define portYIELD_FROM_ISR() vPortYieldFromIsr() #define portYIELD_FROM_ISR() vPortYieldFromIsr()
#define portYIELD() vPortYield() #define portYIELD() vPortYield()
/* Critical section management. */ /* Critical section management. */
#define portDISABLE_INTERRUPTS() \ #define portDISABLE_INTERRUPTS() \
{ \ { \
Asm( "clri" ); \ Asm( "clri" ); \
Asm( "" ::: "memory" ); \ Asm( "" ::: "memory" ); \
} \ } \
#define portENABLE_INTERRUPTS() \ #define portENABLE_INTERRUPTS() \
{ \ { \
Asm( "" ::: "memory" ); \ Asm( "" ::: "memory" ); \
Asm( "seti" ); \ Asm( "seti" ); \
} \ } \
extern volatile unsigned int ulCriticalNesting; extern volatile unsigned int ulCriticalNesting;
#define portENTER_CRITICAL() \ #define portENTER_CRITICAL() \
{ \ { \
portDISABLE_INTERRUPTS() \ portDISABLE_INTERRUPTS() \
ulCriticalNesting++; \ ulCriticalNesting++; \
} }
#define portEXIT_CRITICAL() \ #define portEXIT_CRITICAL() \
{ \ { \
if( ulCriticalNesting > portNO_CRITICAL_NESTING ) \ if( ulCriticalNesting > portNO_CRITICAL_NESTING ) \
{ \ { \
@ -132,24 +134,26 @@
} }
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters ) #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters ) #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() do {} while( 0 ) /* we use the timer */ #define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() do {} while( 0 ) /* we use the timer */
#define portALT_GET_RUN_TIME_COUNTER_VALUE( dest ) ( dest = xTickCount ) #define portALT_GET_RUN_TIME_COUNTER_VALUE( dest ) ( dest = xTickCount )
#if defined( __MW__ ) #if defined( __MW__ )
extern void task_end_hook( void * pxTCB ); extern void task_end_hook( void * pxTCB );
#define portCLEAN_UP_TCB( pxTCB ) task_end_hook( ( void * ) pxTCB ) #define portCLEAN_UP_TCB( pxTCB ) task_end_hook( ( void * ) pxTCB )
#else #else
#define portCLEAN_UP_TCB( pxTCB ) ( void ) pxTCB #define portCLEAN_UP_TCB( pxTCB ) ( void ) pxTCB
#endif #endif
void vPortYield( void ); void vPortYield( void );
void vPortYieldFromIsr( void ); void vPortYieldFromIsr( void );
#ifdef __cplusplus /* *INDENT-OFF* */
#ifdef __cplusplus
} }
#endif #endif
/* *INDENT-ON* */
#endif /* PORTMACRO_H */ #endif /* PORTMACRO_H */

18
portable/ThirdParty/GCC/Xtensa_ESP32/include/portmacro.h vendored
View file

@ -64,13 +64,15 @@
*/ */
#ifndef PORTMACRO_H #ifndef PORTMACRO_H
#define PORTMACRO_H #define PORTMACRO_H
#ifdef __cplusplus /* *INDENT-OFF* */
#ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* *INDENT-ON* */
#ifndef __ASSEMBLER__ #ifndef __ASSEMBLER__
#include <stdint.h> #include <stdint.h>
@ -489,10 +491,12 @@
#define configASSERT( x ) if( !( x ) ) { porttracePrint( -1 ); printf( "\nAssertion failed in %s:%d\n", __FILE__, __LINE__ ); exit( -1 ); } #define configASSERT( x ) if( !( x ) ) { porttracePrint( -1 ); printf( "\nAssertion failed in %s:%d\n", __FILE__, __LINE__ ); exit( -1 ); }
#endif #endif
#endif // __ASSEMBLER__ #endif // __ASSEMBLER__
#ifdef __cplusplus /* *INDENT-OFF* */
#ifdef __cplusplus
} }
#endif #endif
/* *INDENT-ON* */
#endif /* PORTMACRO_H */ #endif /* PORTMACRO_H */