forked from len0rd/rockbox
2d89143962
I noticed a few mistakes in the old driver code and it was in need of an overhaul anyway... I decided to scale things back, simplify the code and remove most of the debug menus, netting a nice code size savings. One new feature is an advanced debug menu which is accessible by recompiling the code with AXP_EXTRA_DEBUG. It adds quite a bit of code size and isn't useful other than for development so it must be manually enabled by editing the source. Change-Id: I30e17c1194c14823decd726a574ed14451d4cb2d
308 lines
8.8 KiB
C
308 lines
8.8 KiB
C
/* Internal header for axp192 driver - not for general inclusion */
|
|
|
|
#ifndef DEFREG
|
|
# define DEFREG(...)
|
|
#endif
|
|
#ifndef DEFFLD
|
|
# define DEFFLD(...)
|
|
#endif
|
|
|
|
#define DEFBIT(regname, fldname, bitpos, ...) \
|
|
DEFFLD(regname, fldname, bitpos, bitpos, __VA_ARGS__)
|
|
|
|
DEFREG(PWRSTS, 0x00)
|
|
DEFREG(CHGSTS, 0x01)
|
|
DEFREG(CHIPID, 0x03)
|
|
DEFREG(VBUSSTS, 0x04)
|
|
DEFREG(DATA0, 0x06)
|
|
DEFREG(DATA1, 0x07)
|
|
DEFREG(DATA2, 0x08)
|
|
DEFREG(DATA3, 0x09)
|
|
DEFREG(DATA4, 0x0a)
|
|
DEFREG(DATA5, 0x0b)
|
|
DEFREG(PWRCTL1, 0x10)
|
|
DEFREG(PWRCTL2, 0x12)
|
|
DEFREG(DCDC2VOLT, 0x23)
|
|
DEFREG(DCDC2RAMP, 0x25)
|
|
DEFREG(DCDC1VOLT, 0x26)
|
|
DEFREG(DCDC3VOLT, 0x27)
|
|
DEFREG(LDO2LDO3VOLT, 0x28)
|
|
DEFREG(VBUSIPSOUT, 0x30)
|
|
DEFREG(VOFF, 0x31)
|
|
DEFREG(PWROFF, 0x32)
|
|
DEFREG(CHGCTL1, 0x33)
|
|
DEFREG(CHGCTL2, 0x34)
|
|
DEFREG(BKPCHGCTL, 0x35)
|
|
DEFREG(PEKPARAM, 0x36)
|
|
DEFREG(DCDCFREQ, 0x37)
|
|
DEFREG(VLTFCHG, 0x38)
|
|
DEFREG(VHTFCHG, 0x39)
|
|
DEFREG(APSLOW1, 0x3a)
|
|
DEFREG(APSLOW2, 0x3b)
|
|
DEFREG(VLTFDCHG, 0x3c)
|
|
DEFREG(VHTFDCHG, 0x3d)
|
|
DEFREG(IRQEN1, 0x40)
|
|
DEFREG(IRQEN2, 0x41)
|
|
DEFREG(IRQEN3, 0x42)
|
|
DEFREG(IRQEN4, 0x43)
|
|
DEFREG(IRQSTS1, 0x44)
|
|
DEFREG(IRQSTS2, 0x45)
|
|
DEFREG(IRQSTS3, 0x46)
|
|
DEFREG(IRQSTS4, 0x47)
|
|
DEFREG(IRQEN5, 0x4a)
|
|
DEFREG(IRQSTS5, 0x4d)
|
|
DEFREG(DCDCMODE, 0x80)
|
|
DEFREG(ADCEN1, 0x82)
|
|
DEFREG(ADCEN2, 0x83)
|
|
DEFREG(ADCCTL, 0x84)
|
|
DEFREG(ADCRANGE, 0x85)
|
|
DEFREG(TIMERCTL, 0x8a)
|
|
DEFREG(VBUSSRP, 0x8b)
|
|
DEFREG(OTPOWEROFF, 0x8f)
|
|
DEFREG(GPIO0FUNC, 0x90)
|
|
DEFREG(GPIO0LDO, 0x91)
|
|
DEFREG(GPIO1FUNC, 0x92)
|
|
DEFREG(GPIO2FUNC, 0x93)
|
|
DEFREG(GPIOLEVEL1, 0x94)
|
|
DEFREG(GPIO3GPIO4FUNC, 0x95)
|
|
DEFREG(GPIOLEVEL2, 0x96)
|
|
DEFREG(GPIOPULL, 0x97)
|
|
DEFREG(PWM1X, 0x98)
|
|
DEFREG(PWM1Y1, 0x99)
|
|
DEFREG(PWM1Y2, 0x9a)
|
|
DEFREG(PWM2X, 0x9b)
|
|
DEFREG(PWM2Y1, 0x9c)
|
|
DEFREG(PWM2Y2, 0x9d)
|
|
DEFREG(NRSTO, 0x9e)
|
|
DEFREG(CC_CTL, 0xb8)
|
|
|
|
DEFBIT(PWRSTS, ACIN_PRESENT, 7)
|
|
DEFBIT(PWRSTS, ACIN_VALID, 6)
|
|
DEFBIT(PWRSTS, VBUS_PRESENT, 5)
|
|
DEFBIT(PWRSTS, VBUS_VALID, 4)
|
|
DEFBIT(PWRSTS, VBUS_VHOLD, 3)
|
|
DEFBIT(PWRSTS, BATT_CURR_DIR, 2)
|
|
DEFBIT(PWRSTS, PCB_SHORTED, 1)
|
|
DEFBIT(PWRSTS, BOOT_TRIG, 0)
|
|
|
|
DEFBIT(VBUSSTS, VALID, 2)
|
|
DEFBIT(VBUSSTS, SESS_AB_VALID, 1)
|
|
DEFBIT(VBUSSTS, SESS_END, 0)
|
|
|
|
DEFBIT(CHGSTS, OVER_TEMP, 7)
|
|
DEFBIT(CHGSTS, CHARGING, 6)
|
|
DEFBIT(CHGSTS, BATT_PRESENT, 5)
|
|
DEFBIT(CHGSTS, BATT_ERROR, 3)
|
|
DEFBIT(CHGSTS, LOW_CHARGE, 2)
|
|
|
|
/* NOTE: These two bits are mirrored in the upper nibble of PWRCTL2.
|
|
* Modifications through one register will immediately reflect in the
|
|
* other register. */
|
|
DEFBIT(PWRCTL1, EXTEN_SW, 2)
|
|
DEFBIT(PWRCTL1, DCDC2_SW, 0)
|
|
|
|
DEFBIT(PWRCTL2, EXTEN_SW, 6)
|
|
DEFBIT(PWRCTL2, DCDC2_SW, 4)
|
|
DEFBIT(PWRCTL2, LDO3_SW, 3)
|
|
DEFBIT(PWRCTL2, LDO2_SW, 2)
|
|
DEFBIT(PWRCTL2, DCDC3_SW, 1)
|
|
DEFBIT(PWRCTL2, DCDC1_SW, 0)
|
|
|
|
DEFFLD(DCDC2VOLT, VALUE, 5, 0)
|
|
|
|
DEFBIT(DCDC2RAMP, ENABLE, 2)
|
|
DEFBIT(DCDC2RAMP, SLOPE, 0)
|
|
|
|
DEFFLD(DCDC1VOLT, VALUE, 6, 0)
|
|
DEFFLD(DCDC3VOLT, VALUE, 6, 0)
|
|
|
|
DEFFLD(LDO2LDO3VOLT, LDO2_VALUE, 7, 4)
|
|
DEFFLD(LDO2LDO3VOLT, LDO3_VALUE, 3, 0)
|
|
|
|
DEFBIT(VBUSIPSOUT, ACCESS, 7)
|
|
DEFBIT(VBUSIPSOUT, VHOLD_LIM, 6)
|
|
DEFFLD(VBUSIPSOUT, VHOLD_LEV, 5, 3)
|
|
DEFBIT(VBUSIPSOUT, VBUS_LIM, 1)
|
|
DEFBIT(VBUSIPSOUT, LIM_100mA, 0)
|
|
|
|
DEFFLD(VOFF, VALUE, 3, 0)
|
|
|
|
DEFBIT(PWROFF, SHUTDOWN, 7)
|
|
DEFBIT(PWROFF, MON_EN, 6)
|
|
DEFFLD(PWROFF, LEDFUNC, 5, 4)
|
|
DEFBIT(PWROFF, LEDCTL, 3)
|
|
DEFBIT(PWROFF, DELAY, 1, 0)
|
|
|
|
DEFBIT(CHGCTL1, CHARGE_EN, 7)
|
|
DEFFLD(CHGCTL1, CHARGE_TGT, 6, 5)
|
|
DEFBIT(CHGCTL1, CHARGE_ENDCURR, 4)
|
|
DEFFLD(CHGCTL1, CHARGE_CURRENT, 3, 0)
|
|
|
|
DEFFLD(CHGCTL2, PRECHARGE_OT, 7, 6)
|
|
DEFFLD(CHGCTL2, EACCESS_CURRENT, 5, 3)
|
|
DEFBIT(CHGCTL2, EACCESS_CHG_EN, 2)
|
|
DEFFLD(CHGCTL2, CONST_CURR_OT, 1, 0)
|
|
|
|
DEFBIT(BKPCHGCTL, ENABLE, 7)
|
|
DEFFLD(BKPCHGCTL, TGT_VOLTAGE, 6, 5)
|
|
DEFFLD(BKPCHGCTL, CHARGE_CURRENT, 1, 0)
|
|
|
|
DEFFLD(PEKPARAM, POWER_ON_TIME, 7, 6)
|
|
DEFFLD(PEKPARAM, LONG_TIME, 5, 4)
|
|
DEFBIT(PEKPARAM, POWEROFF_EN, 3)
|
|
DEFBIT(PEKPARAM, PWROK_DELAY, 2)
|
|
DEFFLD(PEKPARAM, POWEROFF_TIME, 1, 0)
|
|
|
|
DEFFLD(DCDCFREQ, VALUE, 3, 0)
|
|
DEFFLD(VLTFCHG, VALUE, 7, 0)
|
|
DEFFLD(VHTFCHG, VALUE, 7, 0)
|
|
DEFFLD(APSLOW1, VALUE, 7, 0)
|
|
DEFFLD(APSLOW2, VALUE, 7, 0)
|
|
DEFFLD(VLTFDCHG, VALUE, 7, 0)
|
|
DEFFLD(VHTFDCHG, VALUE, 7, 0)
|
|
|
|
DEFBIT(IRQEN1, ACIN_OVER_VOLTAGE, 7)
|
|
DEFBIT(IRQEN1, ACIN_INSERT, 6)
|
|
DEFBIT(IRQEN1, ACIN_REMOVE, 5)
|
|
DEFBIT(IRQEN1, VBUS_OVER_VOLTAGE, 4)
|
|
DEFBIT(IRQEN1, VBUS_INSERT, 3)
|
|
DEFBIT(IRQEN1, VBUS_REMOVE, 2)
|
|
DEFBIT(IRQEN1, VBUS_BELOW_VHOLD, 1)
|
|
DEFBIT(IRQEN2, BATTERY_INSERT, 7)
|
|
DEFBIT(IRQEN2, BATTERY_REMOVE, 6)
|
|
DEFBIT(IRQEN2, BATTERY_ERROR, 5)
|
|
DEFBIT(IRQEN2, BATTERY_ERROR_CLR, 4)
|
|
DEFBIT(IRQEN2, CHARGING_STARTED, 3)
|
|
DEFBIT(IRQEN2, CHARGING_COMPLETE, 2)
|
|
DEFBIT(IRQEN2, BATTERY_OVER_TEMP, 1)
|
|
DEFBIT(IRQEN2, BATTERY_UNDER_TEMP, 0)
|
|
DEFBIT(IRQEN3, INTERNAL_OVER_TEMP, 7)
|
|
DEFBIT(IRQEN3, LOW_CHARGE_CURRENT, 6)
|
|
DEFBIT(IRQEN3, DCDC1_UNDER_VOLT, 5)
|
|
DEFBIT(IRQEN3, DCDC2_UNDER_VOLT, 4)
|
|
DEFBIT(IRQEN3, DCDC3_UNDER_VOLT, 3)
|
|
DEFBIT(IRQEN3, SHORT_PRESS, 1)
|
|
DEFBIT(IRQEN3, LONG_PRESS, 0)
|
|
DEFBIT(IRQEN4, POWER_ON_N_OE, 7)
|
|
DEFBIT(IRQEN4, POWER_OFF_N_OE, 6)
|
|
DEFBIT(IRQEN4, VBUS_VALID, 5)
|
|
DEFBIT(IRQEN4, VBUS_INVALID, 4)
|
|
DEFBIT(IRQEN4, VBUS_SESS_AB, 3)
|
|
DEFBIT(IRQEN4, VBUS_SESS_END, 2)
|
|
DEFBIT(IRQEN4, APS_UNDER_VOLT, 0)
|
|
|
|
DEFBIT(IRQSTS1, ACIN_OVER_VOLTAGE, 7)
|
|
DEFBIT(IRQSTS1, ACIN_INSERT, 6)
|
|
DEFBIT(IRQSTS1, ACIN_REMOVE, 5)
|
|
DEFBIT(IRQSTS1, VBUS_OVER_VOLTAGE, 4)
|
|
DEFBIT(IRQSTS1, VBUS_INSERT, 3)
|
|
DEFBIT(IRQSTS1, VBUS_REMOVE, 2)
|
|
DEFBIT(IRQSTS1, VBUS_BELOW_VHOLD, 1)
|
|
DEFBIT(IRQSTS2, BATTERY_INSERT, 7)
|
|
DEFBIT(IRQSTS2, BATTERY_REMOVE, 6)
|
|
DEFBIT(IRQSTS2, BATTERY_ERROR, 5)
|
|
DEFBIT(IRQSTS2, BATTERY_ERROR_CLR, 4)
|
|
DEFBIT(IRQSTS2, CHARGING_STARTED, 3)
|
|
DEFBIT(IRQSTS2, CHARGING_STOPPED, 2)
|
|
DEFBIT(IRQSTS2, BATTERY_OVER_TEMP, 1)
|
|
DEFBIT(IRQSTS2, BATTERY_UNDER_TEMP, 0)
|
|
DEFBIT(IRQSTS3, INTERNAL_OVER_TEMP, 7)
|
|
DEFBIT(IRQSTS3, LOW_CHARGE_CURRENT, 6)
|
|
DEFBIT(IRQSTS3, DCDC1_UNDER_VOLT, 5)
|
|
DEFBIT(IRQSTS3, DCDC2_UNDER_VOLT, 4)
|
|
DEFBIT(IRQSTS3, DCDC3_UNDER_VOLT, 3)
|
|
DEFBIT(IRQSTS3, SHORT_PRESS, 1)
|
|
DEFBIT(IRQSTS3, LONG_PRESS, 0)
|
|
DEFBIT(IRQSTS4, POWER_ON_N_OE, 7)
|
|
DEFBIT(IRQSTS4, POWER_OFF_N_OE, 6)
|
|
DEFBIT(IRQSTS4, VBUS_VALID, 5)
|
|
DEFBIT(IRQSTS4, VBUS_INVALID, 4)
|
|
DEFBIT(IRQSTS4, VBUS_SESS_AB, 3)
|
|
DEFBIT(IRQSTS4, VBUS_SESS_END, 2)
|
|
DEFBIT(IRQSTS4, APS_UNDER_VOLT, 0)
|
|
|
|
/* NOTE: IRQEN5 and IRQSTS5 are only listed on the Chinese datasheet. */
|
|
DEFBIT(IRQEN5, TIME_OUT, 7)
|
|
DEFBIT(IRQEN5, GPIO2_CHANGE, 2)
|
|
DEFBIT(IRQEN5, GPIO1_CHANGE, 1)
|
|
DEFBIT(IRQEN5, GPIO0_CHANGE, 0)
|
|
|
|
DEFBIT(IRQSTS5, TIME_OUT, 7)
|
|
DEFBIT(IRQSTS5, GPIO2_CHANGE, 2)
|
|
DEFBIT(IRQSTS5, GPIO1_CHANGE, 1)
|
|
DEFBIT(IRQSTS5, GPIO0_CHANGE, 0)
|
|
|
|
DEFFLD(DCDCMODE, VALUE, 3, 1)
|
|
|
|
DEFBIT(ADCEN1, BATTERY_VOLTAGE, 7)
|
|
DEFBIT(ADCEN1, BATTERY_CURRENT, 6)
|
|
DEFBIT(ADCEN1, ACIN_VOLTAGE, 5)
|
|
DEFBIT(ADCEN1, ACIN_CURRENT, 4)
|
|
DEFBIT(ADCEN1, VBUS_VOLTAGE, 3)
|
|
DEFBIT(ADCEN1, VBUS_CURRENT, 2)
|
|
DEFBIT(ADCEN1, APS_VOLTAGE, 1)
|
|
DEFBIT(ADCEN1, TS_PIN, 0)
|
|
|
|
DEFBIT(ADCEN2, INTERNAL_TEMP, 7)
|
|
DEFBIT(ADCEN2, GPIO0, 3)
|
|
DEFBIT(ADCEN2, GPIO1, 2)
|
|
DEFBIT(ADCEN2, GPIO2, 1)
|
|
DEFBIT(ADCEN2, GPIO3, 0)
|
|
|
|
DEFFLD(ADCCTL, SAMPLE_RATE, 7, 6)
|
|
DEFFLD(ADCCTL, TS_OUT_CURR, 5, 4)
|
|
DEFBIT(ADCCTL, TS_FUNCTION, 2)
|
|
DEFFLD(ADCCTL, TS_OUT_MODE, 1, 0)
|
|
|
|
DEFBIT(ADCRANGE, GPIO3HIGH, 3)
|
|
DEFBIT(ADCRANGE, GPIO2HIGH, 2)
|
|
DEFBIT(ADCRANGE, GPIO1HIGH, 1)
|
|
DEFBIT(ADCRANGE, GPIO0HIGH, 0)
|
|
|
|
DEFBIT(TIMERCTL, TIMEOUT, 7)
|
|
DEFFLD(TIMERCTL, DURATION, 6, 0)
|
|
|
|
DEFFLD(VBUSSRP, VBUSVALID_VOLTAGE, 5, 4)
|
|
DEFBIT(VBUSSRP, VBUSVALID_MONITOR, 3)
|
|
DEFBIT(VBUSSRP, VBUS_SESS_MONITOR, 2)
|
|
DEFBIT(VBUSSRP, VBUS_DCHG_RESISTOR, 1)
|
|
DEFBIT(VBUSSRP, VBUS_CHG_RESISTOR, 0)
|
|
|
|
DEFBIT(OTPOWEROFF, ENABLE, 2)
|
|
|
|
DEFFLD(GPIO0FUNC, VALUE, 2, 0)
|
|
DEFFLD(GPIO0LDO, VALUE, 7, 4)
|
|
DEFFLD(GPIO1FUNC, VALUE, 2, 0)
|
|
DEFFLD(GPIO2FUNC, VALUE, 2, 0)
|
|
|
|
DEFBIT(GPIOLEVEL1, IN2, 6)
|
|
DEFBIT(GPIOLEVEL1, IN1, 5)
|
|
DEFBIT(GPIOLEVEL1, IN0, 4)
|
|
DEFBIT(GPIOLEVEL1, OUT2, 2)
|
|
DEFBIT(GPIOLEVEL1, OUT1, 1)
|
|
DEFBIT(GPIOLEVEL1, OUT0, 0)
|
|
|
|
DEFFLD(GPIO3GPIO4FUNC, FUNC3, 3, 2)
|
|
DEFFLD(GPIO3GPIO4FUNC, FUNC4, 1, 0)
|
|
|
|
DEFBIT(GPIOLEVEL2, IN4, 5)
|
|
DEFBIT(GPIOLEVEL2, IN3, 4)
|
|
DEFBIT(GPIOLEVEL2, OUT4, 1)
|
|
DEFBIT(GPIOLEVEL2, OUT3, 0)
|
|
|
|
DEFBIT(GPIOPULL, PULL2, 2)
|
|
DEFBIT(GPIOPULL, PULL1, 1)
|
|
DEFBIT(GPIOPULL, PULL0, 0)
|
|
|
|
DEFBIT(NRSTO, FUNC, 7)
|
|
DEFBIT(NRSTO, GPIO_DIR, 6)
|
|
DEFBIT(NRSTO, GPIO_OUT, 5)
|
|
DEFBIT(NRSTO, GPIO_IN, 4)
|
|
|
|
DEFBIT(CC_CTL, OPEN, 7)
|
|
DEFBIT(CC_CTL, PAUSE, 6)
|
|
DEFBIT(CC_CTL, CLEAR, 5)
|
|
|
|
#undef DEFBIT
|
|
#undef DEFFLD
|
|
#undef DEFREG
|