forked from len0rd/rockbox
Ok. Really fix red
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@14951 a1c6a512-1295-4272-9138-f99709370657
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c9f699432d
commit
b6dab33dfd
2 changed files with 25 additions and 28 deletions
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@ -82,10 +82,10 @@ void audiohw_mute(bool mute)
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if (mute)
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{
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/* Set DACMU = 1 to soft-mute the audio DACs. */
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wmcodec_write(DACCTRL, 0x8);
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wmcodec_write(DAPCTRL, 0x8);
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} else {
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/* Set DACMU = 0 to soft-un-mute the audio DACs. */
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wmcodec_write(DACCTRL, 0x0);
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wmcodec_write(DAPCTRL, 0x0);
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}
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}
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@ -117,7 +117,7 @@ void audiohw_enable_output(bool enable)
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wmcodec_write(0x4, 0x10);
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/* set power register to POWEROFF=0 on OUTPD=0, DACPD=0 */
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wmcodec_write(PWRMGMT, 0x67);
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wmcodec_write(PDCTRL, 0x67);
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/* BCLKINV=0(Dont invert BCLK) MS=1(Enable Master) LRSWAP=0 LRP=0 */
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/* IWL=00(16 bit) FORMAT=10(I2S format) */
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@ -133,7 +133,7 @@ void audiohw_enable_output(bool enable)
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codec_set_active(1);
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/* 5. Set DACMU = 0 to soft-un-mute the audio DACs. */
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wmcodec_write(DACCTRL, 0x0);
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wmcodec_write(DAPCTRL, 0x0);
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audiohw_mute(0);
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} else {
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@ -158,22 +158,19 @@ int audiohw_set_master_vol(int vol_l, int vol_r)
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void audiohw_close(void)
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{
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/* set DACMU=1 DEEMPH=0 */
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wmcodec_write(DACCTRL, 0x8);
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wmcodec_write(DAPCTRL, 0x8);
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/* ACTIVE=0 */
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codec_set_active(0x0);
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/* line in mute left & right*/
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wmcodec_write(LINVOL, 0x100 | 0x80);
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/* set DACSEL=0, MUTEMIC=1 */
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wmcodec_write(0x4, 0x2);
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/* set POWEROFF=0 OUTPD=0 DACPD=1 */
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wmcodec_write(PWRMGMT, 0x6f);
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wmcodec_write(PDCTRL, 0x6f);
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/* set POWEROFF=1 OUTPD=1 DACPD=1 */
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wmcodec_write(PWRMGMT, 0xff);
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wmcodec_write(PDCTRL, 0xff);
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}
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/* Change the order of the noise shaper, 5th order is recommended above 32kHz */
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@ -61,23 +61,23 @@ extern void audiohw_set_sample_rate(int sampling_control);
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#define PDCTRL_POWEROFF (1 << 7)
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#define AINTFCE 0x07
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#define AINTFCE_FORMAT_MSB_RJUST(0 << 0)
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#define AINTFCE_FORMAT_MSB_LJUST(1 << 0)
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#define AINTFCE_FORMAT_I2S (2 << 0)
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#define AINTFCE_FORMAT_DSP (3 << 0)
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#define AINTFCE_FORMAT_MASK (3 << 0)
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#define AINTFCE_IWL_16BIT (0 << 2)
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#define AINTFCE_IWL_20BIT (1 << 2)
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#define AINTFCE_IWL_24BIT (2 << 2)
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#define AINTFCE_IWL_32BIT (3 << 2)
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#define AINTFCE_IWL_MASK (3 << 2)
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#define AINTFCE_LRP_I2S_RLO (0 << 4)
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#define AINTFCE_LRP_I2S_RHI (1 << 4)
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#define AINTFCE_DSP_MODE_A (0 << 4)
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#define AINTFCE_DSP_MODE_B (1 << 4)
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#define AINTFCE_LRSWAP (1 << 5)
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#define AINTFCE_MS (1 << 6)
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#define AINTFCE_BCLKINV (1 << 7)
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#define AINTFCE_FORMAT_MSB_RJUST (0 << 0)
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#define AINTFCE_FORMAT_MSB_LJUST (1 << 0)
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#define AINTFCE_FORMAT_I2S (2 << 0)
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#define AINTFCE_FORMAT_DSP (3 << 0)
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#define AINTFCE_FORMAT_MASK (3 << 0)
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#define AINTFCE_IWL_16BIT (0 << 2)
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#define AINTFCE_IWL_20BIT (1 << 2)
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#define AINTFCE_IWL_24BIT (2 << 2)
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#define AINTFCE_IWL_32BIT (3 << 2)
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#define AINTFCE_IWL_MASK (3 << 2)
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#define AINTFCE_LRP_I2S_RLO (0 << 4)
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#define AINTFCE_LRP_I2S_RHI (1 << 4)
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#define AINTFCE_DSP_MODE_A (0 << 4)
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#define AINTFCE_DSP_MODE_B (1 << 4)
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#define AINTFCE_LRSWAP (1 << 5)
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#define AINTFCE_MS (1 << 6)
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#define AINTFCE_BCLKINV (1 << 7)
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#define SAMPCTRL 0x08
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#define SAMPCTRL_USB (1 << 0)
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@ -86,7 +86,7 @@ extern void audiohw_set_sample_rate(int sampling_control);
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#define SAMPCTRL_BOSR_USB_250fs (0 << 1)
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#define SAMPCTRL_BOSR_USB_272fs (1 << 1)
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/* Bits 2-5:
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* Sample rate setting are device-specific. See WM8731(L) datasheet
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* Sample rate setting are device-specific. See WM8721 datasheet
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* for proper settings for the device's clocking */
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#define SAMPCTRL_SR_MASK (0xf << 2)
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#define SAMPCTRL_CLKIDIV2 (1 << 6)
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