forked from len0rd/rockbox
Gigabeat S: Interrupt enabled bootloader. Miscellaneous integration changes.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@16243 a1c6a512-1295-4272-9138-f99709370657
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7667a865ff
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15 changed files with 283 additions and 194 deletions
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@ -23,7 +23,8 @@
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#define REG16_PTR_T volatile unsigned short *
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#define REG32_PTR_T volatile unsigned long *
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#define TTB_BASE_ADDR (0x80000000 + (64*1024*1024)-TTB_SIZE)
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/* Place in the section with the framebuffer */
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#define TTB_BASE_ADDR (0x80100000 + 0x00100000 - TTB_SIZE)
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#define IRAM_BASE_ADDR 0x1fffc000
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#define L2CC_BASE_ADDR 0x30000000
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@ -275,6 +276,7 @@
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#define INTENABLEL (*(REG32_PTR_T)(AVIC_BASE_ADDR+0x14))
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#define INTTYPEH (*(REG32_PTR_T)(AVIC_BASE_ADDR+0x18))
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#define INTTYPEL (*(REG32_PTR_T)(AVIC_BASE_ADDR+0x1C))
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#define NIPRIORITY(n) (((REG32_PTR_T)(AVIC_BASE_ADDR+0x20))[n])
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#define NIPRIORITY7 (*(REG32_PTR_T)(AVIC_BASE_ADDR+0x20))
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#define NIPRIORITY6 (*(REG32_PTR_T)(AVIC_BASE_ADDR+0x24))
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#define NIPRIORITY5 (*(REG32_PTR_T)(AVIC_BASE_ADDR+0x28))
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@ -294,7 +296,7 @@
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#define FIPNDH (*(REG32_PTR_T)(AVIC_BASE_ADDR+0x60))
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#define FIPNDL (*(REG32_PTR_T)(AVIC_BASE_ADDR+0x64))
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#define VECTOR_BASE_ADDR (AVIC_BASE_ADDR+0x100)
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#define VECTOR(n) (*(REG32_PTR_T)(VECTOR_BASE_ADDR+((n)*4)))
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#define VECTOR(n) (((REG32_PTR_T)VECTOR_BASE_ADDR)[n])
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/* The vectors go all the way up to 63. 4 bytes for each */
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#define INTCNTL_ABFLAG (1 << 25)
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